phylib: SIOCGMIIREG/SIOCSMIIREG: allow access to all mdio addresses

phylib would silently ignore the phy_id argument to these ioctls and
perform the read/write with the active phydev address, whereas most
non-phylib drivers seem to allow access to all mdio addresses
(E.G. pcnet_cs).

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index a8445c72fc13aeb7066c3f1a2b930126935c2bda..f7670330f98829e021c994376fb49b145fc74ef0 100644 (file)
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -319,7 +319,8 @@ int phy_mii_ioctl(struct phy_device *phydev,
                /* fall through */
 
        case SIOCGMIIREG:
-               mii_data->val_out = phy_read(phydev, mii_data->reg_num);
+               mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,
+                                                mii_data->reg_num);
                break;
 
        case SIOCSMIIREG:
@@ -350,8 +351,9 @@ int phy_mii_ioctl(struct phy_device *phydev,
                        }
                }
 
-               phy_write(phydev, mii_data->reg_num, val);
-               
+               mdiobus_write(phydev->bus, mii_data->phy_id,
+                             mii_data->reg_num, val);
+
                if (mii_data->reg_num == MII_BMCR &&
                    val & BMCR_RESET &&
                    phydev->drv->config_init) {