return false;
}
+static void ath_btcoex_set_weight(struct ath_btcoex_info *btcoex_info,
+ u32 bt_weight,
+ u32 wlan_weight)
+{
+ btcoex_info->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
+ SM(wlan_weight, AR_BTCOEX_WL_WGHT);
+}
+
+void ath9k_hw_btcoex_init_weight(struct ath_hw *ah)
+{
+ ath_btcoex_set_weight(&ah->btcoex_info, AR_BT_COEX_WGHT,
+ AR_STOMP_LOW_WLAN_WGHT);
+}
+
/*
* Detects if there is any priority bt traffic
*/
static void ath_detect_bt_priority(struct ath_softc *sc)
{
struct ath_btcoex *btcoex = &sc->btcoex;
+ struct ath_hw *ah = sc->sc_ah;
- if (ath9k_hw_gpio_get(sc->sc_ah, sc->btcoex_info.btpriority_gpio))
+ if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_info.btpriority_gpio))
btcoex->bt_priority_cnt++;
if (time_after(jiffies, btcoex->bt_priority_time +
static void ath_btcoex_period_timer(unsigned long data)
{
struct ath_softc *sc = (struct ath_softc *) data;
+ struct ath_hw *ah = sc->sc_ah;
struct ath_btcoex *btcoex = &sc->btcoex;
- struct ath_btcoex_info *btinfo = &sc->btcoex_info;
+ struct ath_btcoex_info *btinfo = &ah->btcoex_info;
ath_detect_bt_priority(sc);
if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
if (btcoex->hw_timer_enabled)
- ath_gen_timer_stop(sc->sc_ah, btinfo->no_stomp_timer);
+ ath_gen_timer_stop(ah, btinfo->no_stomp_timer);
- ath_gen_timer_start(sc->sc_ah,
+ ath_gen_timer_start(ah,
btinfo->no_stomp_timer,
(ath9k_hw_gettsf32(sc->sc_ah) +
btcoex->btcoex_no_stomp),
static void ath_btcoex_no_stomp_timer(void *arg)
{
struct ath_softc *sc = (struct ath_softc *)arg;
+ struct ath_hw *ah = sc->sc_ah;
struct ath_btcoex *btcoex = &sc->btcoex;
- struct ath_btcoex_info *btinfo = &sc->btcoex_info;
+ struct ath_btcoex_info *btinfo = &ah->btcoex_info;
- DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "no stomp timer running \n");
+ DPRINTF(ah, ATH_DBG_BTCOEX, "no stomp timer running \n");
spin_lock_bh(&btcoex->btcoex_lock);
spin_unlock_bh(&btcoex->btcoex_lock);
}
-static int ath_init_btcoex_info(struct ath_hw *hw,
+static int ath_init_btcoex_info(struct ath_hw *ah,
struct ath_btcoex_info *btcoex_info)
{
- struct ath_btcoex *btcoex = &hw->ah_sc->btcoex;
+ struct ath_btcoex *btcoex = &ah->ah_sc->btcoex;
u32 i;
int qnum;
- qnum = ath_tx_get_qnum(hw->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
+ qnum = ath_tx_get_qnum(ah->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
btcoex_info->bt_coex_mode =
(btcoex_info->bt_coex_mode & AR_BT_QCU_THRESH) |
btcoex->btcoex_period / 100;
for (i = 0; i < 32; i++)
- hw->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
+ ah->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
- (unsigned long) hw->ah_sc);
+ (unsigned long) ah->ah_sc);
- btcoex_info->no_stomp_timer = ath_gen_timer_alloc(hw,
+ btcoex_info->no_stomp_timer = ath_gen_timer_alloc(ah,
ath_btcoex_no_stomp_timer,
ath_btcoex_no_stomp_timer,
- (void *)hw->ah_sc, AR_FIRST_NDP_TIMER);
+ (void *)ah->ah_sc, AR_FIRST_NDP_TIMER);
if (btcoex_info->no_stomp_timer == NULL)
return -ENOMEM;
int ath9k_hw_btcoex_init(struct ath_hw *ah)
{
- struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
+ struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
int ret = 0;
if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
void ath9k_hw_btcoex_enable(struct ath_hw *ah)
{
- struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
+ struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
/* Configure the desired GPIO port for TX_FRAME output */
void ath9k_hw_btcoex_disable(struct ath_hw *ah)
{
- struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info;
+ struct ath_btcoex_info *btcoex_info = &ah->btcoex_info;
ath9k_hw_set_gpio(ah, btcoex_info->wlanactive_gpio, 0);
void ath_btcoex_timer_pause(struct ath_softc *sc)
{
struct ath_btcoex *btcoex = &sc->btcoex;
+ struct ath_hw *ah = sc->sc_ah;
del_timer_sync(&btcoex->period_timer);
if (btcoex->hw_timer_enabled)
- ath_gen_timer_stop(sc->sc_ah, sc->btcoex_info.no_stomp_timer);
+ ath_gen_timer_stop(ah, ah->btcoex_info.no_stomp_timer);
btcoex->hw_timer_enabled = false;
}
void ath_btcoex_timer_resume(struct ath_softc *sc)
{
struct ath_btcoex *btcoex = &sc->btcoex;
+ struct ath_hw *ah = sc->sc_ah;
- DPRINTF(sc->sc_ah, ATH_DBG_BTCOEX, "Starting btcoex timers");
+ DPRINTF(ah, ATH_DBG_BTCOEX, "Starting btcoex timers");
/* make sure duty cycle timer is also stopped when resuming */
if (btcoex->hw_timer_enabled)
- ath_gen_timer_stop(sc->sc_ah, sc->btcoex_info.no_stomp_timer);
+ ath_gen_timer_stop(sc->sc_ah, ah->btcoex_info.no_stomp_timer);
btcoex->bt_priority_cnt = 0;
btcoex->bt_priority_time = jiffies;
#include <linux/nl80211.h>
#include "ath9k.h"
+#include "btcoex.h"
static char *dev_info = "ath9k";
*/
void ath_update_chainmask(struct ath_softc *sc, int is_ht)
{
+ struct ath_hw *ah = sc->sc_ah;
+
if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
- (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
+ (ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
} else {
sc->rx_chainmask = 1;
}
- DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
+ DPRINTF(ah, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n",
sc->tx_chainmask, sc->rx_chainmask);
}
static void ath9k_tasklet(unsigned long data)
{
struct ath_softc *sc = (struct ath_softc *)data;
+ struct ath_hw *ah = sc->sc_ah;
+
u32 status = sc->intrstatus;
ath9k_ps_wakeup(sc);
* TSF sync does not look correct; remain awake to sync with
* the next Beacon.
*/
- DPRINTF(sc->sc_ah, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
+ DPRINTF(ah, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n");
sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
}
- if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
+ if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
if (status & ATH9K_INT_GENTIMER)
ath_gen_timer_isr(sc->sc_ah);
/* re-enable hardware interrupt */
- ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
+ ath9k_hw_set_interrupts(ah, sc->imask);
ath9k_ps_restore(sc);
}
if (ATH_TXQ_SETUP(sc, i))
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
- if ((sc->btcoex_info.no_stomp_timer) &&
- sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
- ath_gen_timer_free(ah, sc->btcoex_info.no_stomp_timer);
+ if ((ah->btcoex_info.no_stomp_timer) &&
+ ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
+ ath_gen_timer_free(ah, ah->btcoex_info.no_stomp_timer);
ath9k_hw_detach(ah);
- ath9k_exit_debug(sc->sc_ah);
+ ath9k_exit_debug(ah);
sc->sc_ah = NULL;
}
ARRAY_SIZE(ath9k_5ghz_chantable);
}
- if (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) {
+ if (ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) {
r = ath9k_hw_btcoex_init(ah);
if (r)
goto bad2;
{
struct ath_wiphy *aphy = hw->priv;
struct ath_softc *sc = aphy->sc;
+ struct ath_hw *ah = sc->sc_ah;
struct ieee80211_channel *curchan = hw->conf.channel;
struct ath9k_channel *init_channel;
int r;
- DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Starting driver with "
+ DPRINTF(ah, ATH_DBG_CONFIG, "Starting driver with "
"initial channel: %d MHz\n", curchan->center_freq);
mutex_lock(&sc->mutex);
init_channel = ath_get_curchannel(sc, hw);
/* Reset SERDES registers */
- ath9k_hw_configpcipowersave(sc->sc_ah, 0, 0);
+ ath9k_hw_configpcipowersave(ah, 0, 0);
/*
* The basic interface to setting the hardware in a good
* and then setup of the interrupt mask.
*/
spin_lock_bh(&sc->sc_resetlock);
- r = ath9k_hw_reset(sc->sc_ah, init_channel, false);
+ r = ath9k_hw_reset(ah, init_channel, false);
if (r) {
- DPRINTF(sc->sc_ah, ATH_DBG_FATAL,
+ DPRINTF(ah, ATH_DBG_FATAL,
"Unable to reset hardware; reset status %d "
"(freq %u MHz)\n", r,
curchan->center_freq);
* here except setup the interrupt mask.
*/
if (ath_startrecv(sc) != 0) {
- DPRINTF(sc->sc_ah, ATH_DBG_FATAL, "Unable to start recv logic\n");
+ DPRINTF(ah, ATH_DBG_FATAL, "Unable to start recv logic\n");
r = -EIO;
goto mutex_unlock;
}
| ATH9K_INT_RXEOL | ATH9K_INT_RXORN
| ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
+ if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
sc->imask |= ATH9K_INT_GTT;
- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
+ if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
sc->imask |= ATH9K_INT_CST;
ath_cache_conf_rate(sc, &hw->conf);
/* Disable BMISS interrupt when we're not associated */
sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
- ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
+ ath9k_hw_set_interrupts(ah, sc->imask);
ieee80211_wake_queues(hw);
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
- if ((sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) &&
+ if ((ah->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) &&
!(sc->sc_flags & SC_OP_BTCOEX_ENABLED)) {
- ath_btcoex_set_weight(&sc->btcoex_info, AR_BT_COEX_WGHT,
- AR_STOMP_LOW_WLAN_WGHT);
- ath9k_hw_btcoex_enable(sc->sc_ah);
+ ath9k_hw_btcoex_init_weight(ah);
+ ath9k_hw_btcoex_enable(ah);
ath_pcie_aspm_disable(sc);
- if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
+ if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
ath_btcoex_timer_resume(sc);
}
{
struct ath_wiphy *aphy = hw->priv;
struct ath_softc *sc = aphy->sc;
+ struct ath_hw *ah = sc->sc_ah;
mutex_lock(&sc->mutex);
}
if (sc->sc_flags & SC_OP_INVALID) {
- DPRINTF(sc->sc_ah, ATH_DBG_ANY, "Device not present\n");
+ DPRINTF(ah, ATH_DBG_ANY, "Device not present\n");
mutex_unlock(&sc->mutex);
return;
}
}
if (sc->sc_flags & SC_OP_BTCOEX_ENABLED) {
- ath9k_hw_btcoex_disable(sc->sc_ah);
- if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
+ ath9k_hw_btcoex_disable(ah);
+ if (ah->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
ath_btcoex_timer_pause(sc);
}
/* make sure h/w will not generate any interrupt
* before setting the invalid flag. */
- ath9k_hw_set_interrupts(sc->sc_ah, 0);
+ ath9k_hw_set_interrupts(ah, 0);
if (!(sc->sc_flags & SC_OP_INVALID)) {
ath_drain_all_txq(sc, false);
ath_stoprecv(sc);
- ath9k_hw_phy_disable(sc->sc_ah);
+ ath9k_hw_phy_disable(ah);
} else
sc->rx.rxlink = NULL;
/* disable HAL and put h/w to sleep */
- ath9k_hw_disable(sc->sc_ah);
- ath9k_hw_configpcipowersave(sc->sc_ah, 1, 1);
- ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
+ ath9k_hw_disable(ah);
+ ath9k_hw_configpcipowersave(ah, 1, 1);
+ ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
sc->sc_flags |= SC_OP_INVALID;
mutex_unlock(&sc->mutex);
- DPRINTF(sc->sc_ah, ATH_DBG_CONFIG, "Driver halt\n");
+ DPRINTF(ah, ATH_DBG_CONFIG, "Driver halt\n");
}
static int ath9k_add_interface(struct ieee80211_hw *hw,