drm/radeon: properly set dto for dp on DCE4/5
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 27 Feb 2015 19:43:47 +0000 (14:43 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Mar 2015 22:28:24 +0000 (17:28 -0500)
If DCPLL or ext PLL is used, use the disp clk.  If
PPLL is used, use the dp clock.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/evergreen_hdmi.c
drivers/gpu/drm/radeon/radeon_audio.c

index bdf2ca8b0be449ff8653fdc50b0669940e181b97..c18d4ecbd95d02baa907d4d15b6da43f282f4e67 100644 (file)
@@ -272,7 +272,7 @@ void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
 }
 
 void dce4_dp_audio_set_dto(struct radeon_device *rdev,
-       struct radeon_crtc *crtc, unsigned int clock)
+                          struct radeon_crtc *crtc, unsigned int clock)
 {
        u32 value;
 
@@ -294,7 +294,7 @@ void dce4_dp_audio_set_dto(struct radeon_device *rdev,
         * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
         */
        WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);
-       WREG32(DCCG_AUDIO_DTO1_MODULE, rdev->clock.max_pixel_clock * 10);
+       WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
 }
 
 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
index 31de59271007ad504afb1bbd6ed4af171f58a6f8..b21ef69a34ac2a2703f7adad0ee20a15f07d3509 100644 (file)
@@ -724,6 +724,10 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
        struct radeon_device *rdev = dev->dev_private;
        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
        struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+       struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
+       struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+       struct radeon_connector_atom_dig *dig_connector =
+               radeon_connector->con_priv;
 
        if (!dig || !dig->afmt)
                return;
@@ -731,7 +735,10 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
        radeon_audio_write_speaker_allocation(encoder);
        radeon_audio_write_sad_regs(encoder);
        radeon_audio_write_latency_fields(encoder, mode);
-       radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
+       if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev))
+               radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
+       else
+               radeon_audio_set_dto(encoder, dig_connector->dp_clock);
        radeon_audio_set_audio_packet(encoder);
        radeon_audio_select_pin(encoder);