drm/amdgpu/si_dpm: Limit clocks on HD86xx part
authorTom St Denis <tom.stdenis@amd.com>
Thu, 13 Oct 2016 21:46:45 +0000 (17:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Oct 2016 23:18:57 +0000 (19:18 -0400)
Limit clocks on a specific HD86xx part to avoid
crashes (while awaiting an appropriate PP fix).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/si_dpm.c

index 8bd08925b370b753fbe217031c1e29e5b3b4426e..3de7bca5854b1b06f20077d177c5476511d5e74b 100644 (file)
@@ -3499,6 +3499,12 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
                max_sclk = 75000;
                max_mclk = 80000;
        }
+       /* Limit clocks for some HD8600 parts */
+       if (adev->pdev->device == 0x6660 &&
+           adev->pdev->revision == 0x83) {
+               max_sclk = 75000;
+               max_mclk = 80000;
+       }
 
        if (rps->vce_active) {
                rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;