spi: rspi: Increase accuracy of bit rate for RZ

When you leave the clock divider at 0, 130kHz is the lowest you can go.
Also, by adjusting the clock divider you can get more accurate resolutions
for clock speeds lower than 16MHz. This patch uses the clock divider as
part of the bit rate setup.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 818843336932c9af8ea4a7bfe223888a179d31c6..a816f07e168e84b0192224dcaadb99cb377ac9ed 100644 (file)
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -295,14 +295,24 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
 static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
 {
        int spbr;
+       int div = 0;
+       unsigned long clksrc;
 
        /* Sets output mode, MOSI signal, and (optionally) loopback */
        rspi_write8(rspi, rspi->sppcr, RSPI_SPPCR);
 
+       clksrc = clk_get_rate(rspi->clk);
+       while (div < 3) {
+               if (rspi->max_speed_hz >= clksrc/4) /* 4=(CLK/2)/2 */
+                       break;
+               div++;
+               clksrc /= 2;
+       }
+
        /* Sets transfer bit rate */
-       spbr = DIV_ROUND_UP(clk_get_rate(rspi->clk),
-                           2 * rspi->max_speed_hz) - 1;
+       spbr = DIV_ROUND_UP(clksrc, 2 * rspi->max_speed_hz) - 1;
        rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
+       rspi->spcmd |= div << 2;
 
        /* Disable dummy transmission, set byte access */
        rspi_write8(rspi, SPDCR_SPLBYTE, RSPI_SPDCR);