#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/platform_device.h>
+#include <linux/mfd/mc13783.h>
+#include <linux/spi/spi.h>
+#include <linux/regulator/machine.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0,
MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
+ /* MC13783 IRQ */
+ IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
+};
+
+/* Regulators */
+static struct regulator_init_data pwgtx_init = {
+ .constraints = {
+ .boot_on = 1,
+ .always_on = 1,
+ },
+};
+
+static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
+ {
+ .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
+ .init_data = &pwgtx_init,
+ }, {
+ .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
+ .init_data = &pwgtx_init,
+ },
+};
+
+/* MC13783 */
+static struct mc13783_platform_data mc13783_pdata __initdata = {
+ .regulators = mx31_3ds_regulators,
+ .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
+ .flags = MC13783_USE_REGULATOR,
};
/* SPI */
.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
};
+static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
+ {
+ .modalias = "mc13783",
+ .max_speed_hz = 1000000,
+ .bus_num = 1,
+ .chip_select = 1, /* SS2 */
+ .platform_data = &mc13783_pdata,
+ .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+ .mode = SPI_CS_HIGH,
+ },
+};
+
/*
* NAND Flash
*/
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
+
mxc_register_device(&mxc_spi_device1, &spi1_pdata);
+ spi_register_board_info(mx31_3ds_spi_devs,
+ ARRAY_SIZE(mx31_3ds_spi_devs));
if (!mx31_3ds_init_expio())
platform_device_register(&smsc911x_device);