cfg1 |= CFG1_RX_ENABLE|CFG1_TX_ENABLE|CFG1_TX_FLOW;
/* Initialize loop back to off */
cfg1 &= ~(CFG1_LOOPBACK|CFG1_RX_FLOW);
- if (etdev->FlowControl == RxOnly || etdev->FlowControl == Both)
+ if (etdev->flowcontrol == FLOW_RXONLY || etdev->flowcontrol == FLOW_BOTH)
cfg1 |= CFG1_RX_FLOW;
writel(cfg1, &pMac->cfg1);
* cfpt - control frame pause timer set to 64 (0x40)
* cfep - control frame extended pause timer set to 0x0
*/
- if (etdev->FlowControl == None)
+ if (etdev->flowcontrol == FLOW_NONE)
writel(0, &txmac->cf_param);
else
writel(0x40, &txmac->cf_param);
void ConfigFlowControl(struct et131x_adapter *etdev)
{
if (etdev->duplex_mode == 0) {
- etdev->FlowControl = None;
+ etdev->flowcontrol = FLOW_NONE;
} else {
char remote_pause, remote_async_pause;
if ((remote_pause == TRUEPHY_BIT_SET) &&
(remote_async_pause == TRUEPHY_BIT_SET)) {
- etdev->FlowControl = etdev->RegistryFlowControl;
+ etdev->flowcontrol = etdev->wanted_flow;
} else if ((remote_pause == TRUEPHY_BIT_SET) &&
(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
- if (etdev->RegistryFlowControl == Both)
- etdev->FlowControl = Both;
+ if (etdev->wanted_flow == FLOW_BOTH)
+ etdev->flowcontrol = FLOW_BOTH;
else
- etdev->FlowControl = None;
+ etdev->flowcontrol = FLOW_NONE;
} else if ((remote_pause == TRUEPHY_BIT_CLEAR) &&
(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
- etdev->FlowControl = None;
+ etdev->flowcontrol = FLOW_NONE;
} else {/* if (remote_pause == TRUEPHY_CLEAR_BIT &&
remote_async_pause == TRUEPHY_SET_BIT) */
- if (etdev->RegistryFlowControl == Both)
- etdev->FlowControl = RxOnly;
+ if (etdev->wanted_flow == FLOW_BOTH)
+ etdev->flowcontrol = FLOW_RXONLY;
else
- etdev->FlowControl = None;
+ etdev->flowcontrol = FLOW_NONE;
}
}
}
/* Determine if we need to go into a force mode and set it */
if (etdev->AiForceSpeed == 0 && etdev->AiForceDpx == 0) {
- if (etdev->RegistryFlowControl == TxOnly ||
- etdev->RegistryFlowControl == Both)
+ if (etdev->wanted_flow == FLOW_TXONLY ||
+ etdev->wanted_flow == FLOW_BOTH)
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_SET, 4, 11, NULL);
else
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_CLEAR, 4, 11, NULL);
- if (etdev->RegistryFlowControl == Both)
+ if (etdev->wanted_flow == FLOW_BOTH)
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_SET, 4, 10, NULL);
else
/* Set to the correct force mode. */
if (etdev->AiForceDpx != 1) {
- if (etdev->RegistryFlowControl == TxOnly ||
- etdev->RegistryFlowControl == Both)
+ if (etdev->wanted_flow == FLOW_TXONLY ||
+ etdev->wanted_flow == FLOW_BOTH)
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_SET, 4, 11, NULL);
else
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_CLEAR, 4, 11, NULL);
- if (etdev->RegistryFlowControl == Both)
+ if (etdev->wanted_flow == FLOW_BOTH)
ET1310_PhyAccessMiBit(etdev,
TRUEPHY_BIT_SET, 4, 10, NULL);
else
tcb->index_start = etdev->tx_ring.send_idx;
tcb->stale = 0;
- spin_lock_irqsave(&etdev->SendHWLock, flags);
+ spin_lock_irqsave(&etdev->send_hw_lock, flags);
thiscopy = NUM_DESC_PER_RING_TX -
INDEX10(etdev->tx_ring.send_idx);
writel(PARM_TX_TIME_INT_DEF * NANO_IN_A_MICRO,
&etdev->regs->global.watchdog_timer);
}
- spin_unlock_irqrestore(&etdev->SendHWLock, flags);
+ spin_unlock_irqrestore(&etdev->send_hw_lock, flags);
return 0;
}
u8 ringindex;
} MP_RFD, *PMP_RFD;
-/* Enum for Flow Control */
-typedef enum _eflow_control_t {
- Both = 0,
- TxOnly = 1,
- RxOnly = 2,
- None = 3
-} eFLOW_CONTROL_t, *PeFLOW_CONTROL_t;
+/* Flow Control */
+#define FLOW_BOTH 0
+#define FLOW_TXONLY 1
+#define FLOW_RXONLY 2
+#define FLOW_NONE 3
/* Struct to define some device statistics */
typedef struct _ce_stats_t {
spinlock_t TCBReadyQLock;
spinlock_t send_hw_lock;
- spinlock_t RcvLock;
+ spinlock_t rcv_lock;
spinlock_t RcvPendLock;
spinlock_t FbrLock;
/* Registry parameters */
u8 SpeedDuplex; /* speed/duplex */
- eFLOW_CONTROL_t RegistryFlowControl; /* for 802.3x flow control */
+ u8 wanted_flow; /* Flow we want for 802.3x flow control */
u8 RegistryPhyComa; /* Phy Coma mode enable/disable */
u32 RegistryRxMemEnd; /* Size of internal rx memory */
/* Derived from the registry: */
u8 AiForceDpx; /* duplex setting */
- u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */
- eFLOW_CONTROL_t FlowControl; /* flow control validated by the far-end */
+ u16 AiForceSpeed; /* 'Speed', user over-ride of line speed */
+ u8 flowcontrol; /* flow control validated by the far-end */
enum {
NETIF_STATUS_INVALID = 0,
NETIF_STATUS_MEDIA_CONNECT,
u32 mask;
/* Enable all global interrupts */
- if (adapter->FlowControl == TxOnly || adapter->FlowControl == Both)
+ if (adapter->flowcontrol == FLOW_TXONLY || adapter->flowcontrol == FLOW_BOTH)
mask = INT_MASK_ENABLE;
else
mask = INT_MASK_ENABLE_NO_FLOW;
*/
status = readl(&adapter->regs->global.int_status);
- if (adapter->FlowControl == TxOnly ||
- adapter->FlowControl == Both) {
+ if (adapter->flowcontrol == FLOW_TXONLY ||
+ adapter->flowcontrol == FLOW_BOTH) {
status &= ~INT_MASK_ENABLE;
} else {
status &= ~INT_MASK_ENABLE_NO_FLOW;
/* If the user has flow control on, then we will
* send a pause packet, otherwise just exit
*/
- if (etdev->FlowControl == TxOnly ||
- etdev->FlowControl == Both) {
+ if (etdev->flowcontrol == FLOW_TXONLY ||
+ etdev->flowcontrol == FLOW_BOTH) {
u32 pm_csr;
/* Tell the device to send a pause packet via