drm/i915: Pass plane and crtc to intel_update_sprite_watermarks

We're going to want to know the crtc in the watermark code to avoid
doing more work than we have to. We should also pass the plane we're
disabling so that we know where to stick our watermark parameters
without having to go look the plane up.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2cfa21fbedce5774cf4ffc0962697b9228520aaf..550ad171628cff4d7b1f2bf75f8a9bc0f9a5e4ea 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -359,7 +359,8 @@ struct drm_i915_display_funcs {
                          struct dpll *match_clock,
                          struct dpll *best_clock);
        void (*update_wm)(struct drm_device *dev);
-       void (*update_sprite_wm)(struct drm_device *dev, int pipe,
+       void (*update_sprite_wm)(struct drm_plane *plane,
+                                struct drm_crtc *crtc,
                                 uint32_t sprite_width, int pixel_size,
                                 bool enable, bool scaled);
        void (*modeset_global_resources)(struct drm_device *dev);

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index da394f354453afdffa3e13df58b0cda373ca4ac6..caf8b8dfe17a4967a4142cb9dcd230c694d67db9 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -716,7 +716,8 @@ extern void intel_ddi_init(struct drm_device *dev, enum port port);
 
 /* For use by IVB LP watermark workaround in intel_sprite.c */
 extern void intel_update_watermarks(struct drm_device *dev);
-extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
+extern void intel_update_sprite_watermarks(struct drm_plane *plane,
+                                          struct drm_crtc *crtc,
                                           uint32_t sprite_width, int pixel_size,
                                           bool enabled, bool scaled);
 

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ed772fecbb079bd81a93929e6f16608ea3a932b1..023e287da01f45f55af6188c04c0c5c359338494 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2866,25 +2866,19 @@ static void haswell_update_wm(struct drm_device *dev)
        hsw_write_wm_values(dev_priv, best_results, partitioning);
 }
 
-static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
+static void haswell_update_sprite_wm(struct drm_plane *plane,
+                                    struct drm_crtc *crtc,
                                     uint32_t sprite_width, int pixel_size,
                                     bool enabled, bool scaled)
 {
-       struct drm_plane *plane;
-
-       list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
-               struct intel_plane *intel_plane = to_intel_plane(plane);
+       struct intel_plane *intel_plane = to_intel_plane(plane);
 
-               if (intel_plane->pipe == pipe) {
-                       intel_plane->wm.enabled = enabled;
-                       intel_plane->wm.scaled = scaled;
-                       intel_plane->wm.horiz_pixels = sprite_width;
-                       intel_plane->wm.bytes_per_pixel = pixel_size;
-                       break;
-               }
-       }
+       intel_plane->wm.enabled = enabled;
+       intel_plane->wm.scaled = scaled;
+       intel_plane->wm.horiz_pixels = sprite_width;
+       intel_plane->wm.bytes_per_pixel = pixel_size;
 
-       haswell_update_wm(dev);
+       haswell_update_wm(plane->dev);
 }
 
 static bool
@@ -2963,11 +2957,14 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
        return *sprite_wm > 0x3ff ? false : true;
 }
 
-static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
+static void sandybridge_update_sprite_wm(struct drm_plane *plane,
+                                        struct drm_crtc *crtc,
                                         uint32_t sprite_width, int pixel_size,
                                         bool enabled, bool scaled)
 {
+       struct drm_device *dev = plane->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
+       int pipe = to_intel_plane(plane)->pipe;
        int latency = dev_priv->wm.spr_latency[0] * 100;        /* In unit 0.1us */
        u32 val;
        int sprite_wm, reg;
@@ -3086,14 +3083,15 @@ void intel_update_watermarks(struct drm_device *dev)
                dev_priv->display.update_wm(dev);
 }
 
-void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
+void intel_update_sprite_watermarks(struct drm_plane *plane,
+                                   struct drm_crtc *crtc,
                                    uint32_t sprite_width, int pixel_size,
                                    bool enabled, bool scaled)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
+       struct drm_i915_private *dev_priv = plane->dev->dev_private;
 
        if (dev_priv->display.update_sprite_wm)
-               dev_priv->display.update_sprite_wm(dev, pipe, sprite_width,
+               dev_priv->display.update_sprite_wm(plane, crtc, sprite_width,
                                                   pixel_size, enabled, scaled);
 }
 

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0a174d7e5854b7e77320db09edbc6dfe25e13078..05742f7d70062baa2151025e1cec1cef54ff55b6 100644 (file)
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -109,7 +109,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
 
        sprctl |= SP_ENABLE;
 
-       intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
+       intel_update_sprite_watermarks(dplane, crtc, src_w, pixel_size, true,
                                       src_w != crtc_w || src_h != crtc_h);
 
        /* Sizes are 0 based */
@@ -265,7 +265,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
        if (IS_HASWELL(dev))
                sprctl |= SPRITE_PIPE_CSC_ENABLE;
 
-       intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
+       intel_update_sprite_watermarks(plane, crtc, src_w, pixel_size, true,
                                       src_w != crtc_w || src_h != crtc_h);
 
        /* Sizes are 0 based */
@@ -340,7 +340,7 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
 
        dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
 
-       intel_update_sprite_watermarks(dev, pipe, 0, 0, false, false);
+       intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
 
        /* potentially re-enable LP watermarks */
        if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
@@ -455,7 +455,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
                dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
        dvscntr |= DVS_ENABLE;
 
-       intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
+       intel_update_sprite_watermarks(plane, crtc, src_w, pixel_size, true,
                                       src_w != crtc_w || src_h != crtc_h);
 
        /* Sizes are 0 based */