avr32: Allow reserving multiple pins at once

at32_reserve_pin now takes an u32 bitmask rather than a single pin.
This allows to reserve multiple pins at once.

Remove (undocumented) SDCS (pin PE26) from reservation in board
setup code.

Signed-off-by: Alex Raimondi <raimondi@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 5c5cdf3b464fb8d99394e408ed49b700babc1ec4..11e7800c16329d5ae579af52506a4e7fd6bac66d 100644 (file)
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -287,23 +287,7 @@ static int __init atstk1002_init(void)
         * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
         * SDRAM-specific pins so that nobody messes with them.
         */
-       at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
-       at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
-       at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
-       at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
-       at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
-       at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
-       at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
-       at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
-       at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
-       at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
-       at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
-       at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
-       at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
-       at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
-       at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
-       at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
-       at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
+       at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 
 #ifdef CONFIG_BOARD_ATSTK1006
        smc_set_timing(&nand_config, &nand_timing);

diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
index 134b566630b0f62a75aad5832278c4dcf7aeac91..ac31666613a14560eef995c9152deaa4b7e40595 100644 (file)
--- a/arch/avr32/boards/atstk1000/atstk1003.c
+++ b/arch/avr32/boards/atstk1000/atstk1003.c
@@ -131,23 +131,7 @@ static int __init atstk1003_init(void)
         * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
         * SDRAM-specific pins so that nobody messes with them.
         */
-       at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
-       at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
-       at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
-       at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
-       at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
-       at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
-       at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
-       at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
-       at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
-       at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
-       at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
-       at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
-       at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
-       at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
-       at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
-       at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
-       at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
+       at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 
 #ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
        at32_add_device_usart(1);

diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index ff8235a30ecd1aea8276495ae50deac97caee98b..006a04e8bef2c1a6da0d1da541ca6c9c80f0b8e9 100644 (file)
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -307,23 +307,7 @@ static int __init favr32_init(void)
         * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
         * pins so that nobody messes with them.
         */
-       at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
-       at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
-       at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
-       at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
-       at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
-       at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
-       at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
-       at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
-       at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
-       at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
-       at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
-       at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
-       at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
-       at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
-       at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
-       at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
-       at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
+       at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 
        at32_select_gpio(GPIO_PIN_PB(3), 0);    /* IRQ from ADS7843 */
 

diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index a77d372f6f3ea8660ffeec96cc31b52381a04b77..5c4c971eed8e217c23da6127dfa791de982f599e 100644 (file)
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -211,4 +211,7 @@
 
 #define ATMEL_LCDC_ALT_15BIT   (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
 
+/* Bitmask for all EBI data (D16..D31) pins on port E */
+#define ATMEL_EBI_PE_DATA_ALL  (0x0000FFFF)
+
 #endif /* __ASM_ARCH_AT32AP700X_H__ */

diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
index 21c79373b53f04dae129e8a3907638f180577b7e..4873024e3b961b9277d547a6e544003757e2961f 100644 (file)
--- a/arch/avr32/mach-at32ap/include/mach/portmux.h
+++ b/arch/avr32/mach-at32ap/include/mach/portmux.h
@@ -25,6 +25,6 @@ void at32_select_periph(unsigned int port, unsigned int pin,
                        unsigned int periph, unsigned long flags);
 void at32_select_gpio(unsigned int pin, unsigned long flags);
 void at32_deselect_pin(unsigned int pin);
-void at32_reserve_pin(unsigned int pin);
+void at32_reserve_pin(unsigned int port, u32 pin_mask);
 
 #endif /* __ASM_ARCH_PORTMUX_H__ */

diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index ed81a8bcb22d44ffa733beed2b43119caca29036..09a274c9d0b72a5b336478280d4c5d9df5ec2df5 100644 (file)
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -167,22 +167,29 @@ void at32_deselect_pin(unsigned int pin)
 }
 
 /* Reserve a pin, preventing anyone else from changing its configuration. */
-void __init at32_reserve_pin(unsigned int pin)
+void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
 {
        struct pio_device *pio;
-       unsigned int pin_index = pin & 0x1f;
 
-       pio = gpio_to_pio(pin);
+       /* assign and verify pio */
+       pio = gpio_to_pio(port);
        if (unlikely(!pio)) {
-               printk("pio: invalid pin %u\n", pin);
+               printk(KERN_WARNING "pio: invalid port %u\n", port);
                goto fail;
        }
 
-       if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
-               printk("%s: pin %u is busy\n", pio->name, pin_index);
+       /* Test if any of the requested pins is already muxed */
+       spin_lock(&pio_lock);
+       if (unlikely(pio->pinmux_mask & pin_mask)) {
+               printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
+                      pio->name, pin_mask, pio->pinmux_mask & pin_mask);
+               spin_unlock(&pio_lock);
                goto fail;
        }
 
+       /* Reserve pins */
+       pio->pinmux_mask |= pin_mask;
+       spin_unlock(&pio_lock);
        return;
 
 fail: