drm/i915/skl: Don't clear all watermarks when updating. (v2)

Clearing the watermarks for all pipes/planes when updating the
watermarks for a single CRTC change seems like the wrong thing to
do here. As is, this code will ony update any pipe/plane watermarks
that need updating and leave the remaining set to zero.  Later, the
watermark checks in check_wm_state() will flag these zero'd out pipe/plane
watermarks and throw errors.

By clearing only the watermark values associated with the specific crtc
the other watermark values may remain unchanged.

v2: Make sure all the dirty flags are cleared. Damien
    Clear all values assoicated with crtc/pipe being updated.  Damien

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 920872acf4db2474709e587b597f9e9d9a8baefb..bec4e0e3d549c053debe297906c9f4f327bac215 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3689,6 +3689,26 @@ static void skl_update_other_pipe_wm(struct drm_device *dev,
        }
 }
 
+static void skl_clear_wm(struct skl_wm_values *watermarks, enum pipe pipe)
+{
+       watermarks->wm_linetime[pipe] = 0;
+       memset(watermarks->plane[pipe], 0,
+              sizeof(uint32_t) * 8 * I915_MAX_PLANES);
+       memset(watermarks->cursor[pipe], 0, sizeof(uint32_t) * 8);
+       memset(watermarks->plane_trans[pipe],
+              0, sizeof(uint32_t) * I915_MAX_PLANES);
+       watermarks->cursor_trans[pipe] = 0;
+
+       /* Clear ddb entries for pipe */
+       memset(&watermarks->ddb.pipe[pipe], 0, sizeof(struct skl_ddb_entry));
+       memset(&watermarks->ddb.plane[pipe], 0,
+              sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
+       memset(&watermarks->ddb.y_plane[pipe], 0,
+              sizeof(struct skl_ddb_entry) * I915_MAX_PLANES);
+       memset(&watermarks->ddb.cursor[pipe], 0, sizeof(struct skl_ddb_entry));
+
+}
+
 static void skl_update_wm(struct drm_crtc *crtc)
 {
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -3699,7 +3719,11 @@ static void skl_update_wm(struct drm_crtc *crtc)
        struct skl_pipe_wm pipe_wm = {};
        struct intel_wm_config config = {};
 
-       memset(results, 0, sizeof(*results));
+
+       /* Clear all dirty flags */
+       memset(results->dirty, 0, sizeof(bool) * I915_MAX_PIPES);
+
+       skl_clear_wm(results, intel_crtc->pipe);
 
        skl_compute_wm_global_parameters(dev, &config);