[PATCH] skge: clear PCI PHY COMA mode on boot

When skge is booted up, the PHY may be stuck in power down state
by the previous OS. So we may need to turn it on.

Signed-off-by: Stephen Hemminger <shemminger@osdl.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>

diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 572f121b1f4edaf29533eba3d3c0bd7c7a4e959b..fe806dbc1914fb6d19bf8be8f5234fec04128734 100644 (file)
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -2893,6 +2893,7 @@ static const char *skge_board_name(const struct skge_hw *hw)
  */
 static int skge_reset(struct skge_hw *hw)
 {
+       u32 reg;
        u16 ctst;
        u8 t8, mac_cfg, pmd_type, phy_type;
        int i;
@@ -2971,6 +2972,7 @@ static int skge_reset(struct skge_hw *hw)
                /* switch power to VCC (WA for VAUX problem) */
                skge_write8(hw, B0_POWER_CTRL,
                            PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
+
                /* avoid boards with stuck Hardware error bits */
                if ((skge_read32(hw, B0_ISRC) & IS_HW_ERR) &&
                    (skge_read32(hw, B0_HWE_ISRC) & IS_IRQ_SENSOR)) {
@@ -2978,6 +2980,14 @@ static int skge_reset(struct skge_hw *hw)
                        hw->intr_mask &= ~IS_HW_ERR;
                }
 
+               /* Clear PHY COMA */
+               skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
+               pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg);
+               reg &= ~PCI_PHY_COMA;
+               pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg);
+               skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
+
+
                for (i = 0; i < hw->ports; i++) {
                        skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
                        skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);

diff --git a/drivers/net/skge.h b/drivers/net/skge.h
index 72c175b87a5a26d8aeb15bfb286712cebb5ef364..ee123c15f5450947f874bcd3b5963ba61f1dc98f 100644 (file)
--- a/drivers/net/skge.h
+++ b/drivers/net/skge.h
@@ -6,6 +6,8 @@
 
 /* PCI config registers */
 #define PCI_DEV_REG1   0x40
+#define  PCI_PHY_COMA  0x8000000
+#define  PCI_VIO       0x2000000
 #define PCI_DEV_REG2   0x44
 #define  PCI_REV_DESC   0x4