vendor/motorola/exynos9610-common/proprietary/vendor/etc/sim_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/sim_configuration.xml \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_flexi/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_maestro_siso/wlan/wlan_t_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/bluetooth/bt.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/bluetooth/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_robusta2_nofem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_smdk/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_smdk/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_smdk/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_smdk/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_smdk/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_smdk/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_smdk/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_smdk/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_smdk/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_smdk/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/bluetooth/bt.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/bluetooth/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_troika_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/bluetooth/bt.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/bluetooth/bt.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/bluetooth/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/bluetooth/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/conf/leman_s620_wing_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/common/log-strings.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/common/log-strings.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/cortexR7.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/cortexR7.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_ap2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_ap2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_apm2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_apm2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_cp2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_cp2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_shub2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_shub2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_wlbt2abox_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_wlbt2abox_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/mb_wlbt2gnss_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/mb_wlbt2gnss_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/moredump.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/moredump.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/moredump.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/moredump.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/peri_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/peri_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/periph_gic_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/periph_gic_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/periph_int_ifc_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/periph_int_ifc_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/periph_scu_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/periph_scu_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/pmu_conf_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/pmu_conf_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/hardware/moredump/rf_chip_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/hardware/moredump/rf_chip_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/hip_signals.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/hip_signals.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/hydra_config.sdb:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/hydra_config.sdb \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/id.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/id.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/mib_out.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/mib_out.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/symbols.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/symbols.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/unicli.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/unicli.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/unitab.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/unitab.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/univif.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/univif.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140/debug/wlan/xide_mib.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140/debug/wlan/xide_mib.dbg \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s612_smdk/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_flexi/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_maestro_siso/wlan/wlan_t_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_robusta2_nofem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_smdk/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/platform.txt \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_sw.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_t.hcf \
vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_troika_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/platform.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/platform.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_t.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_t.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_t_sw.hcf:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/conf/leman_s620_wing_dualfem/wlan/wlan_t_sw.hcf \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/common/log-strings.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/common/log-strings.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/cortexR7.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/cortexR7.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_ap2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_ap2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_apm2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_apm2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_cp2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_cp2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_shub2wlbt_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_shub2wlbt_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_wlbt2abox_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_wlbt2abox_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/mb_wlbt2gnss_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/mb_wlbt2gnss_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/moredump.bin:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/moredump.bin \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/moredump.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/moredump.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/peri_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/peri_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/periph_gic_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/periph_gic_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/periph_int_ifc_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/periph_int_ifc_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/periph_scu_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/periph_scu_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/pmu_conf_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/pmu_conf_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/hardware/moredump/rf_chip_registers.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/hardware/moredump/rf_chip_registers.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/hip_signals.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/hip_signals.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/hydra_config.sdb:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/hydra_config.sdb \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/id.txt:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/id.txt \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/mib_out.xml:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/mib_out.xml \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/symbols.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/symbols.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/unicli.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/unicli.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/unitab.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/unitab.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/univif.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/univif.dbg \
+ vendor/motorola/exynos9610-common/proprietary/vendor/etc/wifi/mx140_t/debug/wlan/xide_mib.dbg:$(TARGET_COPY_OUT_VENDOR)/etc/wifi/mx140_t/debug/wlan/xide_mib.dbg \
vendor/motorola/exynos9610-common/proprietary/vendor/firmware/AP_AUDIO_SLSI.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/AP_AUDIO_SLSI.bin \
vendor/motorola/exynos9610-common/proprietary/vendor/firmware/CC_DRAM_CODE_FLASH.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/CC_DRAM_CODE_FLASH.bin \
vendor/motorola/exynos9610-common/proprietary/vendor/firmware/CC_DRAM_CODE_FLASH_HIFI.bin:$(TARGET_COPY_OUT_VENDOR)/firmware/CC_DRAM_CODE_FLASH_HIFI.bin \
--- /dev/null
+leman_s620_flexi
--- /dev/null
+leman_s620_flexi
--- /dev/null
+leman_s620_maestro
--- /dev/null
+leman_s620_maestro
--- /dev/null
+leman_s620_maestro_siso
--- /dev/null
+leman_s620_maestro_siso
--- /dev/null
+leman_s620_robusta2_nofem
--- /dev/null
+leman_s620_robusta2_nofem
--- /dev/null
+leman_s620_smdk
--- /dev/null
+leman_s620_smdk
--- /dev/null
+leman_s620_wing_dualfem
--- /dev/null
+leman_s620_wing_dualfem
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2017, moredump definitions for Cortex R7 processor
+-->
+
+<processor xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:schemaLocation="http://www.samsung.com Processor.xsd"
+ name="Cortex R7"
+ comment="Cortex R7 Processor/co-processors">
+
+ <cpuregister name="R0"/>
+ <cpuregister name="R1"/>
+ <cpuregister name="R2"/>
+ <cpuregister name="R3"/>
+ <cpuregister name="R4"/>
+ <cpuregister name="R5"/>
+ <cpuregister name="R6"/>
+ <cpuregister name="R7"/>
+ <cpuregister name="R8"/>
+ <cpuregister name="R9"/>
+ <cpuregister name="R10"/>
+ <cpuregister name="R11"/>
+ <cpuregister name="R12"/>
+ <cpuregister name="R13"/>
+ <cpuregister name="R14"/>
+ <cpuregister name="PC"/>
+ <cpuregister name="SPSR"/>
+ <cpuregister name="CPSR"/>
+ <cpuregister name="R8_USR"/>
+ <cpuregister name="R9_USR"/>
+ <cpuregister name="R10_USR"/>
+ <cpuregister name="R11_USR"/>
+ <cpuregister name="R12_USR"/>
+ <cpuregister name="R13_USR"/>
+ <cpuregister name="R14_USR"/>
+ <cpuregister name="R8_FIQ"/>
+ <cpuregister name="R9_FIQ"/>
+ <cpuregister name="R10_FIQ"/>
+ <cpuregister name="R11_FIQ"/>
+ <cpuregister name="R12_FIQ"/>
+ <cpuregister name="R13_FIQ"/>
+ <cpuregister name="R14_FIQ"/>
+ <cpuregister name="SPSR_FIQ"/>
+ <cpuregister name="R13_SVC"/>
+ <cpuregister name="R14_SVC"/>
+ <cpuregister name="SPSR_SVC"/>
+ <cpuregister name="R13_IRQ"/>
+ <cpuregister name="R14_IRQ"/>
+ <cpuregister name="SPSR_IRQ"/>
+ <cpuregister name="R13_UND"/>
+ <cpuregister name="R14_UND"/>
+ <cpuregister name="SPSR_UND"/>
+ <cpuregister name="R13_ABT"/>
+ <cpuregister name="R14_ABT"/>
+ <cpuregister name="SPSR_ABT"/>
+
+ <coprocessor name="System Control" id="C15">
+ <block name="C0 Registers">
+ <register addr="0000" rw_flags="R" width="4" name="MIDR" comment="Main ID Register"/>
+ <register addr="0100" rw_flags="R" width="4" name="CTR" comment="Cache Type Register"/>
+ <register addr="0200" rw_flags="R" width="4" name="TCMTR" comment="TCM Type Register"/>
+ <register addr="0400" rw_flags="R" width="4" name="MPUIR" comment="MPU Type Register"/>
+ <register addr="0500" rw_flags="R" width="4" name="MPIDR" comment="Multiprocessor Affinity Register"/>
+ <register addr="0600" rw_flags="R" width="4" name="REVIDR" comment="Revision ID Register"/>
+ <register addr="0010" rw_flags="R" width="4" name="PFR0" comment="Processor Feature Register 0"/>
+ <register addr="0110" rw_flags="R" width="4" name="PFR1" comment="Processor Feature Register 1"/>
+ <register addr="0210" rw_flags="R" width="4" name="DFR0" comment="Debug Feature Register 0"/>
+ <register addr="0310" rw_flags="R" width="4" name="AFR0" comment="Auxiliary Feature Register 0"/>
+ <register addr="0410" rw_flags="R" width="4" name="MMFR0" comment="Memory Model Feature Register 0"/>
+ <register addr="0510" rw_flags="R" width="4" name="MMFR1" comment="Memory Model Feature Register 1"/>
+ <register addr="0610" rw_flags="R" width="4" name="MMFR2" comment="Memory Model Feature Register 2"/>
+ <register addr="0710" rw_flags="R" width="4" name="MMFR3" comment="Memory Model Feature Register 3"/>
+ <register addr="0020" rw_flags="R" width="4" name="ISAR0" comment="Instruction Set Attributes Register 0"/>
+ <register addr="0120" rw_flags="R" width="4" name="ISAR1" comment="Instruction Set Attributes Register 1"/>
+ <register addr="0220" rw_flags="R" width="4" name="ISAR2" comment="Instruction Set Attributes Register 2"/>
+ <register addr="0320" rw_flags="R" width="4" name="ISAR3" comment="Instruction Set Attributes Register 3"/>
+ <register addr="0420" rw_flags="R" width="4" name="ISAR4" comment="Instruction Set Attributes Register 4"/>
+ <register addr="1000" rw_flags="R" width="4" name="CCSIDR" comment="Cache Size ID Register"/>
+ <register addr="1100" rw_flags="R" width="4" name="CLIDR" comment="Cache Level ID Register"/>
+ <register addr="2000" rw_flags="RW" width="4" name="CSSELR" comment="Cache Size Selection Register"/>
+ </block>
+
+ <block name="C1 Registers">
+ <register addr="0101" rw_flags="RW" width="4" name="ACTLR" comment="Auxiliary Control Register"/>
+ <register addr="0201" rw_flags="RW" width="4" name="CPACR" comment="Coprocessor Access Control Register"/>
+ </block>
+
+ <block name="C5 Registers">
+ <register addr="0005" rw_flags="RW" width="4" name="DFSR" comment="Data Fault Status Register"/>
+ <register addr="0105" rw_flags="RW" width="4" name="IFSR" comment="Instruction Fault Status Register"/>
+ </block>
+
+ <block name="C6 Registers">
+ <register addr="0006" rw_flags="RW" width="4" name="DFAR" comment="Data Fault Address Register"/>
+ <register addr="0206" rw_flags="RW" width="4" name="IFAR" comment="Instruction Fault Address Register"/>
+ <table name="MPU Regions">
+ <indexregister addr="0026" rw_flags="RW" width="4" name="RGNR" comment="MPU Region Number Register">
+ <countfrom addr="0400" rw_flags="RW" width="4" name="MPUIR" comment="MPU type register" shift="8" mask="00FF"/>
+ </indexregister>
+ <register addr="0016" rw_flags="RW" width="4" name="DRBAR" comment="Region Base Address Register"/>
+ <register addr="0216" rw_flags="RW" width="4" name="DRSR" comment="Region Size and Enable Register"/>
+ <register addr="0416" rw_flags="RW" width="4" name="DRACR" comment="Region Access Control Register"/>
+ </table>
+ <!-- Must restore this after MPU -->
+ <register addr="0001" rw_flags="RW" width="4" name="SCTLR" comment="Control Register"/>
+ </block>
+
+ <block name="C7 Registers">
+ <register addr="0407" rw_flags="W" width="4" name="NOP" comment="No Operation Register"/>
+ <register addr="0017" rw_flags="W" width="4" name="ICIALLUIS" comment="Invalidate All Instruction Caches To PoU Inner Shareable Register"/>
+ <register addr="0617" rw_flags="W" width="4" name="BPIALLIS" comment="Invalidate Entire Branch Predictor Array Inner Shareable Register"/>
+ <register addr="0057" rw_flags="W" width="4" name="ICIALLU" comment="Invalidate Entire Instruction Cache Register"/>
+ <register addr="0157" rw_flags="W" width="4" name="ICIMVAU" comment="Invalidate Instruction Cache Line by VA to Point-of-Unification Register"/>
+ <register addr="0457" rw_flags="W" width="4" name="CP15ISB" comment="Instruction Synchronization Barrier Register"/>
+ <register addr="0657" rw_flags="W" width="4" name="BPIALL" comment="Invalidate Entire Branch Predictor Array (NOP) Register"/>
+ <register addr="0757" rw_flags="W" width="4" name="BPIMVA" comment="Invalidate MVA From Branch Predictors Register"/>
+ <register addr="0167" rw_flags="W" width="4" name="DCIMVAC" comment="Invalidate Data Cache Line by VA to PoC Register"/>
+ <register addr="0267" rw_flags="W" width="4" name="DCISW" comment="Invalidate Data Cache Line by Set/Way Register"/>
+ <register addr="01a7" rw_flags="W" width="4" name="DCCMVAC" comment="Clean Data Cache Line to PoC by VA Register"/>
+ <register addr="02a7" rw_flags="W" width="4" name="DCCSW" comment="Clean Data Cache Line by Set/Way Register"/>
+ <register addr="04a7" rw_flags="W" width="4" name="CP15DSB" comment="Data Synchronization Barrier Register"/>
+ <register addr="05a7" rw_flags="W" width="4" name="CP15DMB" comment="Data Memory Barrier Register"/>
+ <register addr="01b7" rw_flags="W" width="4" name="DCCMVAU" comment="Clean Data Or Unified Cache Line By VA To PoU Register"/>
+ <register addr="01e7" rw_flags="W" width="4" name="DCCIMVAC" comment="Clean and Invalidate Data Cache Line by VA to PoC Register"/>
+ <register addr="02e7" rw_flags="W" width="4" name="DCCISW" comment="Clean and Invalidate Data Cache Line by Set/Way Register"/>
+ </block>
+
+ <block name="C9 Registers">
+ <register addr="0019" rw_flags="RW" width="4" name="DTCMRR" comment="DTCM Region Register"/>
+ <register addr="0119" rw_flags="RW" width="4" name="ITCMRR" comment="ITCM Region Register"/>
+ <register addr="00c9" rw_flags="RW" width="4" name="PMCR" comment="Performance Monitor Count Register"/>
+ <register addr="01c9" rw_flags="RW" width="4" name="PMCNTENSET" comment="Count Enable Set Register"/>
+ <register addr="02c9" rw_flags="RW" width="4" name="PMCNTENCLR" comment="Count Enable Clear Register"/>
+ <register addr="03c9" rw_flags="RW" width="4" name="PMOVSR" comment="Overflow Flag Status Register"/>
+ <register addr="04c9" rw_flags="W" width="4" name="PMSWINC" comment="Software Increment Register"/>
+ <table name="Performance Counters">
+ <indexregister addr="05c9" rw_flags="RW" width="4" name="PMSELR" comment="Performance Counter Selection Register">
+ <count value="8"/>
+ </indexregister>
+ <register addr="00d9" rw_flags="RW" width="4" name="PMCCNTR" comment="Cycle Count Register"/>
+ <register addr="01d9" rw_flags="RW" width="4" name="PMXEVTYPER" comment="Event Type Selection Register"/>
+ <register addr="02d9" rw_flags="RW" width="4" name="PMXEVCNTR" comment="Event Count Register"/>
+ </table>
+ <register addr="00e9" rw_flags="RW" width="4" name="PMUSERENR" comment="User Enable Register"/>
+ <register addr="01e9" rw_flags="RW" width="4" name="PMINTENSET" comment="Interrupt Enable Set Register"/>
+ <register addr="02e9" rw_flags="RW" width="4" name="PMINTENCLR" comment="Interrupt Enable Clear Register"/>
+ </block>
+
+ <block name="C13 Registers">
+ <register addr="010d" rw_flags="RW" width="4" name="CONTEXTIDR" comment="Context ID Register"/>
+ <register addr="020d" rw_flags="RW" width="4" name="TPIDRURW" comment="User Read/Write Thread ID Register"/>
+ <register addr="030d" rw_flags="RW" width="4" name="TPIDRURO" comment="User Read-only Thread ID Register"/>
+ <register addr="040d" rw_flags="RW" width="4" name="TPIDRPRW" comment="Privileged Only Thread ID Register"/>
+ </block>
+
+ <block name="C15 Registers">
+ <register addr="000f" rw_flags="RW" width="4" name="PCR" comment="Power Control Register"/>
+ <register addr="001f" rw_flags="RW" width="4" name="CTDOR" comment="Cache and TCM Debug Operation Register"/>
+ <register addr="011f" rw_flags="RW" width="4" name="RADRLO" comment="RAM Access Data Low Register"/>
+ <register addr="021f" rw_flags="RW" width="4" name="RADRHI" comment="RAM Access Data High Register"/>
+ <register addr="031f" rw_flags="RW" width="4" name="RAECCR" comment="RAM Access ECC Register"/>
+ <register addr="002f" rw_flags="R" width="4" name="D_ECC_ENTRY_0" comment="D ECC Error Entry 0 Register"/>
+ <register addr="012f" rw_flags="R" width="4" name="D_ECC_ENTRY_1" comment="D ECC Error Entry 1 Register"/>
+ <register addr="022f" rw_flags="R" width="4" name="D_ECC_ENTRY_2" comment="D ECC Error Entry 2 Register"/>
+ <register addr="003f" rw_flags="R" width="4" name="I_ECC_ENTRY_0" comment="I ECC Error Entry 0 Register"/>
+ <register addr="013f" rw_flags="R" width="4" name="I_ECC_ENTRY_1" comment="I ECC Error Entry 1 Register"/>
+ <register addr="023f" rw_flags="R" width="4" name="I_ECC_ENTRY_2" comment="I ECC Error Entry 2 Register"/>
+ <register addr="004f" rw_flags="RW" width="4" name="DTCM_ECC_ENTRY" comment="DTCM ECC Entry Register"/>
+ <register addr="005f" rw_flags="RW" width="4" name="ITCM_ECC_ENTRY" comment="ITCM ECC Entry Register"/>
+ </block>
+ </coprocessor>
+
+ <coprocessor name="Memory mapped registers" id="C14">
+ <block name="Debug registers">
+ <register addr="0000" rw_flags="R" width="4" name="DBGDIDR" comment="Debug ID Register"/>
+ <register addr="0007" rw_flags="RW" width="4" name="DBGVCR" comment="Vector Catch Register"/>
+ <register addr="0020" rw_flags="R" width="4" name="DBGDTRRX" comment="Data Transfer Register (External View)"/>
+ <register addr="0021" rw_flags="W" width="4" name="DBGITR" comment="Instruction Transfer Register"/>
+ <register addr="0021" rw_flags="R" width="4" name="DBGPCSR" comment="Program Counter Sampling Register"/>
+ <register addr="0022" rw_flags="RW" width="4" name="DBGDSCR" comment="Debug Status and Control Register (External View)"/>
+ <register addr="0023" rw_flags="RW" width="4" name="DBGDTRTX" comment="Target to Host Data Transfer Register (External View)"/>
+ <register addr="0024" rw_flags="W" width="4" name="DBGDRCR" comment="Debug Run Control Register"/>
+
+ <register addr="0040" rw_flags="RW" width="4" name="DBGBVR0" comment="Breakpoint Value 0 Register"/>
+ <register addr="0041" rw_flags="RW" width="4" name="DBGBVR1" comment="Breakpoint Value 1 Register"/>
+ <register addr="0042" rw_flags="RW" width="4" name="DBGBVR2" comment="Breakpoint Value 2 Register"/>
+ <register addr="0043" rw_flags="RW" width="4" name="DBGBVR3" comment="Breakpoint Value 3 Register"/>
+ <register addr="0044" rw_flags="RW" width="4" name="DBGBVR4" comment="Breakpoint Value 4 Register"/>
+ <register addr="0045" rw_flags="RW" width="4" name="DBGBVR5" comment="Breakpoint Value 5 Register"/>
+
+ <register addr="0050" rw_flags="RW" width="4" name="DBGBCR0" comment="Breakpoint Control 0 Register"/>
+ <register addr="0051" rw_flags="RW" width="4" name="DBGBCR1" comment="Breakpoint Control 1 Register"/>
+ <register addr="0052" rw_flags="RW" width="4" name="DBGBCR2" comment="Breakpoint Control 2 Register"/>
+ <register addr="0053" rw_flags="RW" width="4" name="DBGBCR3" comment="Breakpoint Control 3 Register"/>
+ <register addr="0054" rw_flags="RW" width="4" name="DBGBCR4" comment="Breakpoint Control 4 Register"/>
+ <register addr="0055" rw_flags="RW" width="4" name="DBGBCR5" comment="Breakpoint Control 5 Register"/>
+
+ <register addr="0060" rw_flags="RW" width="4" name="DBGWVR0" comment="Watchpoint Value 0 Register"/>
+ <register addr="0061" rw_flags="RW" width="4" name="DBGWVR1" comment="Watchpoint Value 1 Register"/>
+ <register addr="0062" rw_flags="RW" width="4" name="DBGWVR2" comment="Watchpoint Value 2 Register"/>
+ <register addr="0063" rw_flags="RW" width="4" name="DBGWVR3" comment="Watchpoint Value 3 Register"/>
+
+ <register addr="0070" rw_flags="RW" width="4" name="DBGWCR0" comment="Watchpoint Control 0 Register"/>
+ <register addr="0071" rw_flags="RW" width="4" name="DBGWCR1" comment="Watchpoint Control 1 Register"/>
+ <register addr="0072" rw_flags="RW" width="4" name="DBGWCR2" comment="Watchpoint Control 2 Register"/>
+ <register addr="0073" rw_flags="RW" width="4" name="DBGWCR3" comment="Watchpoint Control 3 Register"/>
+
+ <register addr="00c4" rw_flags="RW" width="4" name="DBGPRCR" comment="Device Power-down and Reset Control Register"/>
+ <register addr="00c5" rw_flags="R" width="4" name="DBGPRSR" comment="Device Power-down and Reset Status Register"/>
+ </block>
+
+ <block name="Processor ID Registers">
+ <register addr="0340" rw_flags="R" width="4" name="CPUID" comment="Main ID Register"/>
+ <register addr="0341" rw_flags="R" width="4" name="CTR" comment="Cache Type Register"/>
+ <register addr="0342" rw_flags="R" width="4" name="TCMTR" comment="TCM Type Register"/>
+ <register addr="0348" rw_flags="R" width="4" name="ID_PFR0" comment="Processor Feature Register 0"/>
+ <register addr="0349" rw_flags="R" width="4" name="ID_PFR1" comment="Processor Feature Register 1"/>
+ <register addr="034a" rw_flags="R" width="4" name="ID_DFR0" comment="Debug Feature Register 0"/>
+ <register addr="034b" rw_flags="R" width="4" name="ID_AFR0" comment="Auxiliary Feature Register 0"/>
+ <register addr="034c" rw_flags="R" width="4" name="ID_MMFR0" comment="Processor Feature Register 0"/>
+ <register addr="034d" rw_flags="R" width="4" name="ID_MMFR1" comment="Processor Feature Register 1"/>
+ <register addr="034e" rw_flags="R" width="4" name="ID_MMFR2" comment="Processor Feature Register 2"/>
+ <register addr="034f" rw_flags="R" width="4" name="ID_MMFR3" comment="Processor Feature Register 3"/>
+ <register addr="0350" rw_flags="R" width="4" name="ID_ISAR0" comment="ISA Feature Register 0"/>
+ <register addr="0351" rw_flags="R" width="4" name="ID_ISAR1" comment="ISA Feature Register 1"/>
+ <register addr="0352" rw_flags="R" width="4" name="ID_ISAR2" comment="ISA Feature Register 2"/>
+ <register addr="0353" rw_flags="R" width="4" name="ID_ISAR3" comment="ISA Feature Register 3"/>
+ <register addr="0354" rw_flags="R" width="4" name="ID_ISAR4" comment="ISA Feature Register 4"/>
+ <register addr="0355" rw_flags="R" width="4" name="ID_ISAR5" comment="ISA Feature Register 5"/>
+ </block>
+
+ <block name="Management Registers">
+ <register addr="03c0" rw_flags="RW" width="4" name="DBGITCTRL" comment="Integration Mode Control Register"/>
+ <register addr="03e8" rw_flags="RW" width="4" name="DBGCLAIMSET" comment="Claim Tag Set Register"/>
+ <register addr="03e9" rw_flags="RW" width="4" name="DBGCLAIMCLR" comment="Claim Tag Clear Register"/>
+ <register addr="03ec" rw_flasg="W" width="4" name="DBGLAR" comment="Lock Access Register"/>
+ <register addr="03ed" rw_flags="R" width="4" name="DBGLSR" comment="Lock Status Register"/>
+ <register addr="03ee" rw_flags="R" width="4" name="DBGAUTHSTATUS" comment="Authentication Status Register"/>
+ <register addr="03f2" rw_flags="R" width="4" name="DBGDEVID" comment="Debug Device ID Register"/>
+ <register addr="03f3" rw_flags="R" width="4" name="DBGDEVTYPE" comment="Device Type Register"/>
+ </block>
+
+ <block name="CoreSight Identification Registers">
+ <register addr="03f8" rw_flags="R" width="4" name="PERIPHERALID0" comment="Peripheral Identification Register 0"/>
+ <register addr="03f9" rw_flags="R" width="4" name="PERIPHERALID1" comment="Peripheral Identification Register 1"/>
+ <register addr="03fa" rw_flags="R" width="4" name="PERIPHERALID2" comment="Peripheral Identification Register 2"/>
+ <register addr="03fb" rw_flags="R" width="4" name="PERIPHERALID3" comment="Peripheral Identification Register 3"/>
+ <register addr="03f4" rw_flags="R" width="4" name="PERIPHERALID4" comment="Peripheral Identification Register 4"/>
+ <register addr="03fc" rw_flags="R" width="4" name="COMPONENTID0" comment="Component Identification Register 0"/>
+ <register addr="03fd" rw_flags="R" width="4" name="COMPONENTID1" comment="Component Identification Register 1"/>
+ <register addr="03fe" rw_flags="R" width="4" name="COMPONENTID2" comment="Component Identification Register 2"/>
+ <register addr="03ff" rw_flags="R" width="4" name="COMPONENTID3" comment="Component Identification Register 3"/>
+ </block>
+ </coprocessor>
+</processor>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_ap2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_ap2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0030000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0030008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a003000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0030010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0030014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0030018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a003001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0030020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0030024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0030028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a003002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0030050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0030080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0030084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0030088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a003008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_apm2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_apm2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0020000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0020008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a002000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0020010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0020014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0020018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a002001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0020020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0020024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0020028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a002002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0020050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0020080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0020084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0020088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a002008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_cp2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_cp2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0000000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0000008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a000000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0000010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0000014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0000018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a000001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0000020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0000024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0000028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a000002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0000050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0000080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0000084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0000088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a000008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_shub2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_shub2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0010000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0010008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a001000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0010010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0010014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0010018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a001001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0010020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0010024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0010028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a001002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0010050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0010080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0010084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0010088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a001008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_wlbt2abox subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_wlbt2abox">
+ <block name="mailbox" comment="">
+ <register addr="a0040000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0040008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a004000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0040010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0040014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0040018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a004001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0040020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0040024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0040028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a004002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0040050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0040080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0040084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0040088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a004008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_wlbt2gnss subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_wlbt2gnss">
+ <block name="mailbox" comment="">
+ <register addr="a0050000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0050008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a005000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0050010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0050014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0050018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a005001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0050020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0050024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0050028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a005002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0050050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0050080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0050084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0050088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a005008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2017, definitions for moredump3: leman/ramen platform
+-->
+
+<moredump xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:schemaLocation="http://www.samsung.com ..\Moredump.xsd">
+
+ <target name="leman" aka="mxl250" idat="51000000" chipid="A4" firmware="80000000"
+ comment="http://confluence/display/MXL250/Maxwell250+Memory+Map">
+ <!-- Define the mmap range - DO NOT CHANGE THIS -->
+ <mmap startAddr="80000000" endAddr="805FFFFF" dev="/dev/mx_0_mmap"/>
+
+ <bb>
+ <!-- Fix this: SSB-30790 /dev/mx_0_r7_gdb -->
+ <cpu name="CortexR7" xml="cortexR7.xml" t32API="20001" t32GDB="30001" dev="/dev/mx_0_r4_gdb">
+ <extraXml name ="GIC" xml="periph_gic_registers.xml"/>
+ </cpu>
+ <subsystem name="btwl" xml="peri_registers.xml"/>
+ </bb>
+
+ <memory>
+ <region startAddr="00000000" endAddr="0000FFFF" name="ITCM" comment="64K"/>
+ <region startAddr="10000000" endAddr="1000FFFF" name="DTCM" comment="64K"/>
+ <region startAddr="52008000" endAddr="520083FF" name="KARAM" comment="1K"/>
+ <region startAddr="60000000" endAddr="60047FFF" name="RAMS" comment="288KB" />
+ <region startAddr="80000000" endAddr="805FFFFF" name="DRAM" comment="6MB" />
+ <region startAddr="82000000" endAddr="8209FFFF" name="SMAPPER0" comment="640KB" />
+ <region startAddr="82100000" endAddr="8219FFFF" name="SMAPPER1" comment="640KB" />
+ <region startAddr="82200000" endAddr="8229FFFF" name="SMAPPER2" comment="640KB" />
+ <region startAddr="82300000" endAddr="8239FFFF" name="SMAPPER3" comment="640KB" />
+
+ <extraXml name="A-BOX mailbox" xml="mb_wlbt2abox_registers.xml"/>
+ <extraXml name="AP mailbox" xml="mb_ap2wlbt_registers.xml"/>
+ <extraXml name="APM mailbox" xml="mb_apm2wlbt_registers.xml"/>
+ <extraXml name="Sensor hub mailbox" xml="mb_shub2wlbt_registers.xml"/>
+ <extraXml name="Cellular mailbox" xml="mb_cp2wlbt_registers.xml"/>
+ <extraXml name="GNSS mailbox" xml="mb_wlbt2gnss_registers.xml"/>
+ </memory>
+ </target>
+
+ <rfchips bt_speedy="56002000" wl_speedy="50130000" zippy="56100000">
+ <!-- Both of these point to the same xml, it is up to the build system to deploy the correct xml -->
+ <rfchip name="jar" idat="0000" chipid="B1" interface="speedy" comment="S612">
+ </rfchip>
+ <rfchip name="hopper" idat ="0000" chipid ="B2" interface ="zippy" comment="S620">
+ </rfchip>
+ </rfchips>
+</moredump>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for peri subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="peri">
+ <block name="bbic_pad_control" comment="">
+ <register addr="54000000" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL0" comment="Control register for pad RFIC_CTRL0"/>
+ <register addr="54000004" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL1" comment="Control register for pad RFIC_CTRL1"/>
+ <register addr="54000008" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL2" comment="Control register for pad RFIC_CTRL2"/>
+ <register addr="5400000c" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL3" comment="Control register for pad RFIC_CTRL3"/>
+ </block>
+ <block name="bt_bb_bsp" comment="">
+ <register addr="56001000" rw_flags="R" width="4" name="BT_DEBUG" comment="BT Debug readback."/>
+ <register addr="56001004" rw_flags="RW" width="4" name="BT_DEBUG_MUX" comment="BT Debug Mux Selection."/>
+ <register addr="56001008" rw_flags="RW" width="4" name="BT_WBREE_CONFIG" comment="Enables Wibree featues."/>
+ <register addr="5600100c" rw_flags="RW" width="4" name="BT_WBREE_CONFIG_EXT" comment="Extra Wibree controls."/>
+ <register addr="56001010" rw_flags="RW" width="2" name="BT_WBREE_CONFIG_2M" comment="2M Wibree controls."/>
+ <register addr="56001014" rw_flags="RW" width="1" name="BT_WBREE_CONFIG_LR" comment="LR Wibree controls."/>
+ <register addr="56001018" rw_flags="RW" width="4" name="BT_WBREE_CONFIG_ANGLE" comment="AOD /AOAWibree controls."/>
+ <register addr="5600101c" rw_flags="RW" width="4" name="BT_WBREE_SUPP_ENABLES" comment="More AOD /AOA Wibree controls."/>
+ <register addr="56001020" rw_flags="RW" width="4" name="BT_WBREE_LEN_PARAMS" comment="Configure BLE length paramters"/>
+ <register addr="56001024" rw_flags="RW" width="2" name="BT_LEN_PARAMS" comment="Configure BR, EDR length paramters"/>
+ <register addr="56001028" rw_flags="RW" width="2" name="BT_ANTPLUS_CONFIG" comment="Enables ANT+ featues."/>
+ <register addr="5600102c" rw_flags="RW" width="4" name="BT_LLR_TRIGGER_LSW" comment="LLR Access Code to transmit or receive LSW"/>
+ <register addr="56001030" rw_flags="RW" width="4" name="BT_LLR_TRIGGER_MSW" comment="LLR Access Code to transmit or receive MSW"/>
+ <register addr="56001034" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_1" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="56001038" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_2" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="5600103c" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_3" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="56001040" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_1" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001044" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_2" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001048" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_3" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="5600104c" rw_flags="RW" width="2" name="BT_AES_ACL23_CFG_4" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001050" rw_flags="RW" width="4" name="BT_AES_ESCO_CFG" comment="Enable BT AES modes on ESCO packets"/>
+ <register addr="56001054" rw_flags="RW" width="4" name="BT_AES_ESCO23_CFG" comment="Enable BT AES modes on EDR ESCO packets"/>
+ <register addr="56001058" rw_flags="RW" width="4" name="BT_AES_MISC_CFG" comment="Miscellaneous BT AES config"/>
+ <register addr="5600105c" rw_flags="RW" width="4" name="BT_CONFIG_TX" comment="BT Config TX on Bitstream processing control"/>
+ <register addr="56001060" rw_flags="RW" width="2" name="BT_CONFIG_TX2" comment="BT Config TX on Bitstream processing control"/>
+ <register addr="56001064" rw_flags="RW" width="4" name="BT_TX_AUTO_START_TIME" comment="Automatically turn on the Tx Bitstream digital at this time when TX_AUTO_START_EN is set."/>
+ <register addr="56001068" rw_flags="RW" width="4" name="BT_CONFIG_RX" comment="BT Config RX on Bitstream processing control"/>
+ <register addr="5600106c" rw_flags="RW" width="4" name="BT_RX_AUTO_START_TIME" comment="Automatically turn on the Rx Bitstream digital at this time when RX_AUTO_START_EN is set."/>
+ <register addr="56001070" rw_flags="RW" width="2" name="BT_CONFIG_COEX" comment="BT Config Coex Masking "/>
+ <register addr="56001074" rw_flags="RW" width="1" name="BT_SPEEDY_RST" comment="BT reset on Bitstream processing control"/>
+ <register addr="56001078" rw_flags="RW" width="4" name="BT_SPEEDY_S_MON_CTRL" comment="BT Speedy Slave Monitor Ctrl"/>
+ <register addr="5600107c" rw_flags="RW" width="4" name="BT_SPEEDY_M_MON_CTRL" comment="BT Speedy Master Monitor Ctrl"/>
+ <register addr="56001080" rw_flags="R" width="4" name="BT_SPEEDY_MON_STATUS" comment="BT Speedy Monitor Status"/>
+ <register addr="56001084" rw_flags="R" width="1" name="BT_SPEEDY_INT_STATUS" comment="BT Speedy Monitor Status"/>
+ <register addr="56001088" rw_flags="RW" width="2" name="BT_BUF_CTRL" comment="BT Axi Buffer Ctrl"/>
+ <register addr="5600108c" rw_flags="R" width="4" name="BT_BUF_STATUS" comment="BT Axi Buffer Status"/>
+ <register addr="56001090" rw_flags="R" width="4" name="BT_BUF_STATUS2" comment="BT Axi Buffer Status bits"/>
+ <register addr="56001094" rw_flags="RW" width="1" name="BT_TX_LINK_TYPE" comment=""/>
+ <register addr="56001098" rw_flags="RW" width="1" name="BT_TX_CORRUPT_CRC" comment="Corrupt transmitted CRC by inverting for BLE/BDR/EDR"/>
+ <register addr="5600109c" rw_flags="R" width="2" name="BT_TX_CRC" comment="Transmitted BR/EDR CRC"/>
+ <register addr="560010a0" rw_flags="RW" width="2" name="BT_TX_PACKET_HEADER" comment="Bluetooth packet header data."/>
+ <register addr="560010a4" rw_flags="RW" width="2" name="BT_TX_PAYLOAD_HEADER" comment="Bluetooth payload header data."/>
+ <register addr="560010a8" rw_flags="RW" width="2" name="BT_TX_PAYLOAD_LENGTH" comment="Bluetooth payload length, used by the state machine to seperate from payload_header field changes"/>
+ <register addr="560010ac" rw_flags="RW" width="4" name="BT_TX_VOICE_BUFFER" comment="Buffer Handle for voice data"/>
+ <register addr="560010b0" rw_flags="RW" width="4" name="BT_TX_DATA_BUFFER" comment="Buffer Handle for data"/>
+ <register addr="560010b4" rw_flags="RW" width="4" name="BT_TX_PACKET_CONFIG1" comment=""/>
+ <register addr="560010b8" rw_flags="RW" width="4" name="BT_TX_WBREE_SUPP" comment="Supplemental field for AoA Data packets."/>
+ <register addr="560010bc" rw_flags="RW" width="2" name="BT_TX_WBREE_EXT_HEADER" comment="Advertising extensions field and supplemental field for Data packets."/>
+ <register addr="560010c0" rw_flags="RW" width="2" name="BT_TX_ESCO_NUM_VOICE_BYTES" comment=""/>
+ <register addr="560010c4" rw_flags="R" width="1" name="BT_TX_STATE" comment=""/>
+ <register addr="560010c8" rw_flags="R" width="1" name="BT_TX_EVENT_TYPE" comment="Status of last transmitted packet"/>
+ <register addr="560010cc" rw_flags="R" width="1" name="BT_TX_EVENT_TYPE_BIT" comment="Latch of Status/Errors of last transmitted packet - each bit corresponds to event type value"/>
+ <register addr="560010d0" rw_flags="R" width="4" name="BT_TX_STATE_STATUS_BIT" comment="Latch of TX State Status - each bit corresponds to state we've transitioned through"/>
+ <register addr="560010d4" rw_flags="RW" width="4" name="BT_TX_WBREE_ACCESS_ADDR" comment="Wibree transmit sync word"/>
+ <register addr="560010d8" rw_flags="RW" width="2" name="BT_TX_WBREE_HDR_DATA" comment="Wibree tranamit header - this is what is sent on air"/>
+ <register addr="560010dc" rw_flags="RW" width="1" name="BT_TX_WBREE_LENGTH" comment="Seoerate the length field (use for ctrl), in case field moves"/>
+ <register addr="560010e0" rw_flags="RW" width="4" name="BT_TX_WBREE_AD_ADDR_LSW" comment="Wibree Advertiser address - transmitted by master in an advertising packet LSW"/>
+ <register addr="560010e4" rw_flags="RW" width="2" name="BT_TX_WBREE_AD_ADDR_MSW" comment="Wibree Advertiser address - transmitted by master in an advertising packet MSW"/>
+ <register addr="560010e8" rw_flags="RW" width="4" name="BT_TX_WBREE_CRC_SEED" comment="Seed value for Wibree CRC and ICV checksum"/>
+ <register addr="560010ec" rw_flags="RW" width="4" name="BT_TX_WBREE_BUFFER" comment="Buffer handle for Wibree data"/>
+ <register addr="560010f0" rw_flags="R" width="4" name="BT_TX_WBREE_CRC" comment="Transmitted Wibree CRC/ICV"/>
+ <register addr="560010f4" rw_flags="RW" width="1" name="BT_TX_ANTPLUS_LENGTH" comment="Length of ANT+ frame to transmit in bytes (including access code, etc.). For example, a standard fixed frame length should be 18."/>
+ <register addr="560010f8" rw_flags="RW" width="2" name="BT_TX_LLR_CONFIG" comment="Transmit LLR config : "/>
+ <register addr="560010fc" rw_flags="RW" width="2" name="BT_TX_LLR_REPETTIONS" comment="Number of times to repeat the LLR Trigger code"/>
+ <register addr="56001100" rw_flags="RW" width="4" name="BT_TX_WBREE_HDR_ADV_MASK" comment="Wibree transmit common adv extended header decoding masks"/>
+ <register addr="56001104" rw_flags="RW" width="4" name="BT_TX_WBREE_HDR_ADV_TYPE_DECODE" comment="Wibree transmit common adv extended header type values"/>
+ <register addr="56001108" rw_flags="RW" width="1" name="BT_TX_WAIT_FOR_RFIC_DONE" comment="Wait for the TxDone acknowledgement to come back from the RFIC before firing the end of packet interrupt"/>
+ <register addr="5600110c" rw_flags="RW" width="4" name="BT_TX_DATA_FETCH" comment="BT Config Data Fetch for TX on Bitstream processing control"/>
+ <register addr="56001110" rw_flags="RW" width="1" name="BT_RX_MEMBER_ADDRESS" comment="Receive member address"/>
+ <register addr="56001114" rw_flags="RW" width="2" name="BT_RX_LINK_TYPE" comment="Bluetooth link type"/>
+ <register addr="56001118" rw_flags="RW" width="4" name="BT_RX_FHS_BUFFER" comment="MMU FHS buffer handle"/>
+ <register addr="5600111c" rw_flags="RW" width="4" name="BT_RX_LMP_BUFFER" comment="MMU LMP buffer handle"/>
+ <register addr="56001120" rw_flags="RW" width="4" name="BT_RX_VOICE_BUFFER" comment="MMU Voice buffer handle"/>
+ <register addr="56001124" rw_flags="RW" width="4" name="BT_RX_DATA_BUFFER" comment="MMU Data buffer handle"/>
+ <register addr="56001128" rw_flags="RW" width="2" name="BT_RX_FHS_BUF_SIZE" comment="MMU FHS buffer size "/>
+ <register addr="5600112c" rw_flags="RW" width="2" name="BT_RX_LMP_BUF_SIZE" comment="MMU LMP buffer size "/>
+ <register addr="56001130" rw_flags="RW" width="2" name="BT_RX_VOICE_BUF_SIZE" comment="MMU Voice buffer size"/>
+ <register addr="56001134" rw_flags="RW" width="2" name="BT_RX_DATA_BUF_SIZE" comment="MMU Data buffer size"/>
+ <register addr="56001138" rw_flags="RW" width="4" name="BT_RX_CONFIG" comment=""/>
+ <register addr="5600113c" rw_flags="RW" width="4" name="BT_RX_PACKET_CONFIG1" comment="Receive packet configuration - part1"/>
+ <register addr="56001140" rw_flags="RW" width="2" name="BT_RX_ESCO_NUM_VOICE_BYTES" comment=""/>
+ <register addr="56001144" rw_flags="RW" width="1" name="BT_RX_MR_DEBUG_CONFIG" comment="Enable EDR debug - non zero"/>
+ <register addr="56001148" rw_flags="R" width="1" name="BT_RX_STATE" comment="Debug register - current state of rx_control"/>
+ <register addr="5600114c" rw_flags="R" width="1" name="BT_RX_FEC_NUM_CORR_HEADER_ERRORS" comment="FEC correctable header error count"/>
+ <register addr="56001150" rw_flags="R" width="2" name="BT_RX_PACKET_HEADER" comment="Received packet header"/>
+ <register addr="56001154" rw_flags="R" width="2" name="BT_RX_PAYLOAD_HEADER" comment="Received payload header"/>
+ <register addr="56001158" rw_flags="RW" width="1" name="BT_RX_PAYLOAD_LENGTH_FIELD" comment="ctrl to determine length field in received payload header, Reset to standard payload header length field being bits 12:3"/>
+ <register addr="5600115c" rw_flags="R" width="2" name="BT_RX_PAYLOAD_NUM_VOICE_BYTES" comment="Number of voice bytes received"/>
+ <register addr="56001160" rw_flags="R" width="2" name="BT_RX_PAYLOAD_NUM_DATA_BYTES" comment="Number of data bytes received"/>
+ <register addr="56001164" rw_flags="R" width="1" name="BT_RX_FEC_NUM_CORR_ERRORS" comment="FEC correctable error count"/>
+ <register addr="56001168" rw_flags="R" width="1" name="BT_RX_FEC_NUM_UNCORR_ERRORS" comment="FEC un-correctable error count"/>
+ <register addr="5600116c" rw_flags="W" width="1" name="BT_RX_EVENT_CLEAR" comment="Write to clear receive event and interrupt without disabling the RX - Write sensitive"/>
+ <register addr="56001170" rw_flags="R" width="1" name="BT_RX_EVENT_TYPE" comment="Received event type"/>
+ <register addr="56001174" rw_flags="R" width="4" name="BT_RX_EVENT_TYPE_BIT" comment="Received event type - Latch of bits for each error/event type"/>
+ <register addr="56001178" rw_flags="R" width="4" name="BT_RX_STATE_STATUS_BIT" comment="Latch of RX State Status - each bit corresponds to state we've transitioned through"/>
+ <register addr="5600117c" rw_flags="R" width="4" name="BT_RX_WBREE_HDR_DATA" comment="Wibree received header"/>
+ <register addr="56001180" rw_flags="RW" width="2" name="BT_RX_WBREE_HDR_STP" comment="Wibree received header SP field decoding"/>
+ <register addr="56001184" rw_flags="RW" width="4" name="BT_RX_WBREE_HDR_ADV_MASK" comment="Wibree received common adv extended header decoding masks"/>
+ <register addr="56001188" rw_flags="RW" width="4" name="BT_RX_WBREE_HDR_ADV_TYPE_DECODE" comment="Wibree received common adv extended header type values"/>
+ <register addr="5600118c" rw_flags="RW" width="1" name="BT_RX_WBREE_LENGTH_FIELD" comment="ctrl to determine where to look for length field in received payload header, Reset to standard payload header length field being bits 8:0"/>
+ <register addr="56001190" rw_flags="R" width="1" name="BT_RX_WBREE_SUPP_DATA" comment="Wibree received SuppInfo"/>
+ <register addr="56001194" rw_flags="R" width="4" name="BT_RX_WBREE_AD_ADDR_LSW" comment="Received Advertiser address - applicable to adverting packets only LSW"/>
+ <register addr="56001198" rw_flags="R" width="2" name="BT_RX_WBREE_AD_ADDR_MSW" comment="Received Advertiser address - applicable to adverting packets only MSW"/>
+ <register addr="5600119c" rw_flags="RW" width="4" name="BT_RX_WBREE_CRC_SEED" comment="Wibree CRC seed"/>
+ <register addr="560011a0" rw_flags="RW" width="4" name="BT_RX_WBREE_BUFFER" comment="Wibree receive buffer handle"/>
+ <register addr="560011a4" rw_flags="RW" width="2" name="BT_RX_WBREE_BUF_SIZE" comment="Wibree receive buffer size"/>
+ <register addr="560011a8" rw_flags="RW" width="4" name="BT_RX_WBREE_SUPP_BUFFER" comment="Wibree receive Supplemental buffer handle"/>
+ <register addr="560011ac" rw_flags="RW" width="4" name="BT41_ZL_NONCE_CFG" comment="Set zero flag on Rcv Nonce for zero length packets received with following types:"/>
+ <register addr="560011b0" rw_flags="R" width="4" name="AES_CCM_DATA" comment="Received encrypted MIC"/>
+ <register addr="560011b4" rw_flags="R" width="4" name="AES_EXP_CCM_DATA" comment="Expected encrypted MIC"/>
+ <register addr="560011b8" rw_flags="RW" width="1" name="BT41_SNIFF_MODE" comment="Prevent decryption of incoming data stream"/>
+ <register addr="560011bc" rw_flags="RW" width="1" name="BT_RX_ANTPLUS_LENGTH" comment="ANT plus packet length (for receive state machine)"/>
+ <register addr="560011c0" rw_flags="RW" width="1" name="BT_RX_WAIT_FOR_RFIC_DONE" comment="Wait for the RxDone acknowledgement to come back from the RFIC before firing the end of packet interrupt"/>
+ <register addr="560011c4" rw_flags="RW" width="1" name="BT_RX_DISABLE_RF_PAYLOAD_MSG" comment="Option to allow the disabling of the payload length being sent for MLSE/MLE"/>
+ <register addr="560011c8" rw_flags="RW" width="1" name="BT_RX_BDR_SYNC_INT_EN" comment="Enable generation of interrupt on BDR Sync"/>
+ <register addr="560011cc" rw_flags="RW" width="1" name="BT_RX_MLE_ACL_PAYLOAD_DELAY" comment="Number of clock cycles to delay sending the ACL payload to the RFIC. This is used to correct a potential timing issue (see SB-17048)"/>
+ <register addr="560011d0" rw_flags="RW" width="4" name="BT_TXRX_MASTER_CLOCK" comment="Master clock seed for BT encryption LSFR"/>
+ <register addr="560011d4" rw_flags="RW" width="4" name="BT_TXRX_MASTER_ADDRESS_LSW" comment="Master address seed for BT encryption LSFR"/>
+ <register addr="560011d8" rw_flags="RW" width="2" name="BT_TXRX_MASTER_ADDRESS_MSW" comment="Master address seed for BT encryption LSFR"/>
+ <register addr="560011dc" rw_flags="RW" width="4" name="BT_TXRX_ACCESS_CODE_LAP" comment="Lower 24 bits of BT address to generate access code"/>
+ <register addr="560011e0" rw_flags="RW" width="1" name="BT_TXRX_WHITEN_ACTIVE" comment="Enable data whitening"/>
+ <register addr="560011e4" rw_flags="RW" width="1" name="BT_TXRX_WHITEN_SEED" comment="Whitener seed for BT and Wibree packets"/>
+ <register addr="560011e8" rw_flags="RW" width="1" name="BT_TXRX_ENCRYPT_ACTIVE" comment="Enable BT encryption"/>
+ <register addr="560011ec" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[0]" comment="BT encryption key"/>
+ <register addr="560011f0" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[1]" comment="BT encryption key"/>
+ <register addr="560011f4" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[2]" comment="BT encryption key"/>
+ <register addr="560011f8" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[3]" comment="BT encryption key"/>
+ <register addr="560011fc" rw_flags="RW" width="1" name="BT_TXRX_HEC_CRC_SEED" comment="Transmit and receive Header Error CRC seed"/>
+ <register addr="56001200" rw_flags="RW" width="1" name="BT_TXRX_AES_DBG_ADDR" comment="Select data to be read in AES_DBG_DATA"/>
+ <register addr="56001204" rw_flags="R" width="2" name="BT_TXRX_AES_DBG_DATA" comment="P and K debug data"/>
+ <register addr="56001208" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[0]" comment="AES key"/>
+ <register addr="5600120c" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[1]" comment="AES key"/>
+ <register addr="56001210" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[2]" comment="AES key"/>
+ <register addr="56001214" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[3]" comment="AES key"/>
+ <register addr="56001218" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[0]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600121c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[1]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001220" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[2]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001224" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[3]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001228" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[4]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600122c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[5]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001230" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[6]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001234" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[7]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001238" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[8]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600123c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[9]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001240" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[10]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001244" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[11]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001248" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[12]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600124c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[0]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001250" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[1]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001254" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[2]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001258" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[3]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600125c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[4]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001260" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[5]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001264" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[6]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001268" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[7]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600126c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[8]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001270" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[9]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001274" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[10]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001278" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[11]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600127c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[12]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001280" rw_flags="RW" width="2" name="BT_TXRX_AES_CCM_HDR_EN1" comment="Select which bits of header make up B0 key for AES-CCM"/>
+ <register addr="56001284" rw_flags="RW" width="2" name="BT_TXRX_AES_CCM_HDR_EN2" comment="Select which bits of header make up B0 key for AES-CCM"/>
+ <register addr="56001288" rw_flags="RW" width="1" name="BT_TXRX_AES_CCM_FLAG_B0" comment="Aes-Ccm B0 flag"/>
+ <register addr="5600128c" rw_flags="RW" width="1" name="BT_TXRX_AES_CCM_FLAG_C0" comment="Aes-Ccm C0 flag"/>
+ <register addr="56001290" rw_flags="RW" width="2" name="BT_TXRX_AES_CONFIG" comment="AES config CMM select / Nonce Select"/>
+ <register addr="56001294" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[0]" comment="AES key for standalone engine"/>
+ <register addr="56001298" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[1]" comment="AES key for standalone engine"/>
+ <register addr="5600129c" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[2]" comment="AES key for standalone engine"/>
+ <register addr="560012a0" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[3]" comment="AES key for standalone engine"/>
+ <register addr="560012a4" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[0]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012a8" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[1]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012ac" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[2]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012b0" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[3]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012b4" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[0]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012b8" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[1]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012bc" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[2]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012c0" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[3]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012c4" rw_flags="RW" width="2" name="BT_TXRX_STANDALONE_AES_CONTROL" comment="Write to start standalone AES engine"/>
+ <register addr="560012c8" rw_flags="R" width="1" name="BT_TXRX_STANDALONE_AES_BUSY" comment="Indicates that the AES engine is currently busy. Goes high immediately when BT_TXRX_STANDALONE_AES_START is written. BT_TXRX_STANDALONE_AES_CRYPTTEXT is not valid until it goes low."/>
+ <register addr="560012cc" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[0]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d0" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[1]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d4" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[2]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d8" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[3]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012dc" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[4]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e0" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[5]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e4" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[6]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e8" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[7]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012ec" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[8]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012f0" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[0]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012f4" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[1]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012f8" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[2]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012fc" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[3]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001300" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[4]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001304" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[5]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001308" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[6]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="5600130c" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[7]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001310" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[8]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001314" rw_flags="RW" width="2" name="BT_VOICE_SETTING" comment="SCO voice setting"/>
+ <register addr="56001318" rw_flags="RW" width="1" name="BT_TXRX_HOP_SEQ_TYPE" comment="Configure HOP sequence type"/>
+ <register addr="5600131c" rw_flags="RW" width="4" name="BT_TXRX_HOP_UAP_LAP" comment="Upper and Lower BT address to determine frequecy hopping sequence"/>
+ <register addr="56001320" rw_flags="RW" width="4" name="BT_TXRX_HOP_CLOCK" comment="Master clock"/>
+ <register addr="56001324" rw_flags="RW" width="1" name="BT_TXRX_HOP_Y1" comment="Y1 from BT specification,"/>
+ <register addr="56001328" rw_flags="RW" width="1" name="BT_TXRX_HOP_K_SEL" comment="K from BT specification, 0: Koffset=24, 1: Koffset=8"/>
+ <register addr="5600132c" rw_flags="RW" width="1" name="BT_TXRX_HOP_N" comment="Number of channels in adapted hop sequence"/>
+ <register addr="56001330" rw_flags="RW" width="1" name="BT_TXRX_HOP_F" comment="Adapted Hop sequence mapping (F from BT specification)"/>
+ <register addr="56001334" rw_flags="R" width="2" name="BT_TXRX_HOP_INDEX_PRE_MOD" comment="Index of required hop before final modulus"/>
+ <register addr="56001338" rw_flags="R" width="1" name="BT_TXRX_HOP_INDEX" comment="Index of required hop (0 to 78 or 0 to 22)"/>
+ </block>
+ <block name="bt_bb_clkgen" comment="">
+ <register addr="56000000" rw_flags="R" width="4" name="BT_CLKGEN_SYSTEM_TIME" comment="The current microsecond system time."/>
+ <register addr="56000004" rw_flags="RW" width="4" name="BT_CLKGEN_ENABLES" comment="This register enables the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="56000008" rw_flags="RW" width="4" name="BT_AUDIO_CLOCK0" comment="Audio clock 0 configuration"/>
+ <register addr="5600000c" rw_flags="RW" width="4" name="BT_AUDIO_CLOCK1" comment="Audio clock 1 configuration"/>
+ <register addr="56000010" rw_flags="RW" width="2" name="BT_AUDIO_CLOCK_EN" comment="Audio clock En"/>
+ </block>
+ <block name="bt_speedy" comment="">
+ <register addr="56002000" rw_flags="RW" width="4" name="BT_SPEEDY_ADDR_CTRL" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="56002004" rw_flags="RW" width="4" name="BT_SPEEDY_WRITE_DATA" comment="Data to write to APB over Speedy"/>
+ <register addr="56002008" rw_flags="R" width="4" name="BT_SPEEDY_READ_DATA" comment="Data read back for APB over Speedy"/>
+ <register addr="5600200c" rw_flags="R" width="1" name="BT_SPEEDY_APB_STATUS" comment="Status of the current APB cycle"/>
+ <register addr="56002010" rw_flags="RW" width="1" name="BT_SPEEDY_ERROR_RECOVERY" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="coex_bb" comment="">
+ <register addr="56200000" rw_flags="RW" width="1" name="COEX_BB_DEBUG_SEL" comment=""/>
+ </block>
+ <block name="coex_bb_bt" comment="">
+ <register addr="56210000" rw_flags="RW" width="1" name="COEX_BT_CFG" comment=""/>
+ <register addr="56210004" rw_flags="RW" width="1" name="COEX_BT_DEBUG_SEL" comment=""/>
+ <register addr="56210008" rw_flags="RW" width="1" name="COEX_BT_SW_IF_DEBUG_SEL" comment=""/>
+ <register addr="5621000c" rw_flags="RW" width="1" name="COEX_BT_CDL_DEBUG_SEL" comment=""/>
+ <register addr="56210010" rw_flags="RW" width="1" name="COEX_BT_SW_RESET" comment="Write a 1 to reset BT Coexistence digital on BBIC."/>
+ <register addr="56210014" rw_flags="RW" width="1" name="COEX_BT_ALLOWED_ORIDE" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="56210018" rw_flags="RW" width="4" name="COEX_BT_TX_COL[0]" comment=""/>
+ <register addr="5621001c" rw_flags="RW" width="4" name="COEX_BT_TX_COL[1]" comment=""/>
+ <register addr="56210020" rw_flags="RW" width="4" name="COEX_BT_RX_COL[0]" comment=""/>
+ <register addr="56210024" rw_flags="RW" width="4" name="COEX_BT_RX_COL[1]" comment=""/>
+ <register addr="56210028" rw_flags="RW" width="4" name="COEX_BT_ASTX" comment="BT ASTX configuration."/>
+ <register addr="5621002c" rw_flags="RW" width="4" name="COEX_BT_ASTX1" comment="BT ASTX configuration."/>
+ <register addr="56210030" rw_flags="RW" width="4" name="COEX_BT_ASTX_START_TIME" comment="BT ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="56210034" rw_flags="RW" width="1" name="COEX_BT_ASTX_UPDATE" comment="BT ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="56210038" rw_flags="R" width="1" name="COEX_BT_ASTX_STICKY_STATUS" comment="BT ASTX status register. Contents are cleared when a 1 is written to COEX_BT_ASTX_UPDATE."/>
+ <register addr="5621003c" rw_flags="R" width="1" name="COEX_BT_ASTX_DEFER_COUNT" comment="BT ASTX defer counter. An accumulative count showing the number of times BT ASTX has been deferred."/>
+ <register addr="56210040" rw_flags="RW" width="1" name="COEX_BT_ASTX_CLR_DEFER_COUNT" comment="BT ASTX defer count clear - write a 1 in order to clear COEX_BT_ASTX_DEFER_COUNT."/>
+ <register addr="56210044" rw_flags="RW" width="4" name="COEX_BT_ASRX" comment="BT ASRX configuration."/>
+ <register addr="56210048" rw_flags="RW" width="4" name="COEX_BT_ASRX1" comment="BT ASTX configuration."/>
+ <register addr="5621004c" rw_flags="RW" width="4" name="COEX_BT_ASRX_START_TIME" comment="BT ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="56210050" rw_flags="RW" width="1" name="COEX_BT_ASRX_UPDATE" comment="BT ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="56210054" rw_flags="R" width="1" name="COEX_BT_ASRX_STICKY_STATUS" comment="BT ASRX status register. Contents are cleared when a 1 is written to COEX_BT_ASRX_UPDATE."/>
+ <register addr="56210058" rw_flags="R" width="1" name="COEX_BT_ASRX_DEFER_COUNT" comment="BT ASRX defer counter. An accumulative count showing the number of times BT ASRX has been deferred."/>
+ <register addr="5621005c" rw_flags="RW" width="1" name="COEX_BT_ASRX_CLR_DEFER_COUNT" comment="BT ASRX defer count clear - write a 1 in order to clear COEX_BT_ASRX_DEFER_COUNT."/>
+ </block>
+ <block name="coex_bb_wl_0" comment="">
+ <register addr="56220000" rw_flags="RW" width="1" name="COEX_WL_CFG_I0" comment=""/>
+ <register addr="56220004" rw_flags="RW" width="1" name="COEX_WL_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220008" rw_flags="RW" width="1" name="COEX_WL_MAC_IF_DEBUG_SEL_I0" comment=""/>
+ <register addr="5622000c" rw_flags="RW" width="1" name="COEX_WL_SW_IF_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220010" rw_flags="RW" width="1" name="COEX_WL_CDL_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220014" rw_flags="RW" width="1" name="COEX_WL_SW_RESET_I0" comment="Set in order to force a software reset of the WL Coexistence digital."/>
+ <register addr="56220018" rw_flags="RW" width="1" name="COEX_WL_ALLOWED_ORIDE_I0" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="5622001c" rw_flags="RW" width="4" name="COEX_WL_TX_COL_I0" comment=""/>
+ <register addr="56220020" rw_flags="RW" width="4" name="COEX_WL_RX_COL_I0" comment=""/>
+ <register addr="56220024" rw_flags="RW" width="1" name="COEX_WL_DELAY_DEFERS_EN_I0" comment="When set to 1, the CDL defer is gated until the remote Activity Set is in progress."/>
+ <register addr="56220028" rw_flags="RW" width="2" name="COEX_WL_TRAN_CTRL_CFG_I0" comment="Coexistence Transition Control configuration."/>
+ <register addr="5622002c" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I0[0]" comment="5G RF Switch Configurations"/>
+ <register addr="56220030" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I0[1]" comment="5G RF Switch Configurations"/>
+ <register addr="56220034" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_PRIORITY_I0" comment="The WLAN priority to use for transmitted Acks."/>
+ <register addr="56220038" rw_flags="RW" width="1" name="COEX_WL_TX_DATA_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a transmitted Data frame. (should not be required)."/>
+ <register addr="5622003c" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a transmitted Ack (should not be required)."/>
+ <register addr="56220040" rw_flags="RW" width="2" name="COEX_WL_TX_START_CHANNEL_I0" comment=""/>
+ <register addr="56220044" rw_flags="RW" width="2" name="COEX_WL_TX_END_CHANNEL_I0" comment=""/>
+ <register addr="56220048" rw_flags="RW" width="2" name="COEX_WL_TX_MISC_CFG_I0" comment="Misc WLAN Tx configuration."/>
+ <register addr="5622004c" rw_flags="R" width="1" name="COEX_WL_TX_STICKY_STATUS_I0" comment="WLAN ASTX status register. Contents are cleared when the MAC Acc makes a new Tx request."/>
+ <register addr="56220050" rw_flags="R" width="1" name="COEX_WL_TX_DEFER_COUNT_I0" comment="WLAN ASTX defer counter. An accumulative count showing the number of times WLAN ASTX has been deferred."/>
+ <register addr="56220054" rw_flags="RW" width="1" name="COEX_WL_TX_CLR_DEFER_COUNT_I0" comment="WLAN ASTX defer count clear - write a 1 in order to clear COEX_WL_ASTX_DEFER_COUNT."/>
+ <register addr="56220058" rw_flags="RW" width="2" name="COEX_WL_RX_LISTEN_DURATION_I0" comment="The advertised ASRX duration when WLAN is listening. ASRX is automatically updated when this time expires."/>
+ <register addr="5622005c" rw_flags="RW" width="1" name="COEX_WL_RX_LISTEN_PRIORITY_I0" comment="The WLAN priority when WLAN is listening."/>
+ <register addr="56220060" rw_flags="RW" width="1" name="COEX_WL_RX_PHYACT_PRIORITY_I0" comment="The WLAN priority when the PHY is actively receiving (but Rx is not confirmed by MAC Acc)."/>
+ <register addr="56220064" rw_flags="RW" width="1" name="COEX_WL_RX_MAC_PRIORITY_I0" comment="The WLAN priority when MAC Acc confirms Rx."/>
+ <register addr="56220068" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_PRIORITY_I0" comment="The WLAN priority for Rx acknowledgements."/>
+ <register addr="5622006c" rw_flags="RW" width="1" name="COEX_WL_RX_DATA_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a received Data frame. (should not be required)."/>
+ <register addr="56220070" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a received Ack. (should not be required)."/>
+ <register addr="56220074" rw_flags="RW" width="1" name="COEX_WL_RX_MIN_ANT_SEL_I0" comment="Select minimum number of antenna(s) to use for Rx."/>
+ <register addr="56220078" rw_flags="RW" width="2" name="COEX_WL_RX_START_CHANNEL_I0" comment=""/>
+ <register addr="5622007c" rw_flags="RW" width="2" name="COEX_WL_RX_END_CHANNEL_I0" comment=""/>
+ <register addr="56220080" rw_flags="RW" width="1" name="COEX_WL_RX_MISC_CFG_I0" comment="Misc WLAN Rx configuration"/>
+ <register addr="56220084" rw_flags="R" width="1" name="COEX_WL_RX_STICKY_STATUS_I0" comment="WLAN ASRX status register. Contents are cleared when the MAC Acc makes a new Rx request."/>
+ <register addr="56220088" rw_flags="R" width="1" name="COEX_WL_RX_DEFER_COUNT_I0" comment="WLAN ASRX defer counter. An accumulative count showing the number of times WLAN ASRX has been deferred."/>
+ <register addr="5622008c" rw_flags="RW" width="1" name="COEX_WL_RX_CLR_DEFER_COUNT_I0" comment="WLAN ASRX defer count clear - write a 1 in order to clear COEX_WL_ASRX_DEFER_COUNT."/>
+ <register addr="56220090" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_I0" comment="WLAN Software ASTX configuration."/>
+ <register addr="56220094" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX1_I0" comment="WLAN Software ASTX configuration."/>
+ <register addr="56220098" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_START_TIME_I0" comment="WLAN Software ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="5622009c" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_UPDATE_I0" comment="WLAN Software ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="562200a0" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_STICKY_STATUS_I0" comment="WLAN Software ASTX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASTX_UPDATE"/>
+ <register addr="562200a4" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_DEFER_COUNT_I0" comment="WLAN Software ASTX defer counter. An accumulative count showing the number of times WLAN Software ASTX has been deferred."/>
+ <register addr="562200a8" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_CLR_DEFER_COUNT_I0" comment="WLAN Software ASTX defer count clear - write a 1 in order to clear COEX_WL_SW_ASTX_DEFER_COUNT"/>
+ <register addr="562200ac" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_I0" comment="WLAN Software ASRX configuration."/>
+ <register addr="562200b0" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX1_I0" comment="WLAN Software ASRX configuration."/>
+ <register addr="562200b4" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_START_TIME_I0" comment="WLAN Software ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="562200b8" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_UPDATE_I0" comment="WLAN Software ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="562200bc" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_STICKY_STATUS_I0" comment="WLAN Software ASRX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASRX_UPDATE"/>
+ <register addr="562200c0" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_DEFER_COUNT_I0" comment="WLAN Software ASRX defer counter. An accumulative count showing the number of times WLAN Software ASRX has been deferred."/>
+ <register addr="562200c4" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_CLR_DEFER_COUNT_I0" comment="WLAN Software ASRX defer count clear - write a 1 in order to clear COEX_WL_SW_ASRX_DEFER_COUNT"/>
+ </block>
+ <block name="coex_bb_wl_1" comment="">
+ <register addr="56230000" rw_flags="RW" width="1" name="COEX_WL_CFG_I1" comment=""/>
+ <register addr="56230004" rw_flags="RW" width="1" name="COEX_WL_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230008" rw_flags="RW" width="1" name="COEX_WL_MAC_IF_DEBUG_SEL_I1" comment=""/>
+ <register addr="5623000c" rw_flags="RW" width="1" name="COEX_WL_SW_IF_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230010" rw_flags="RW" width="1" name="COEX_WL_CDL_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230014" rw_flags="RW" width="1" name="COEX_WL_SW_RESET_I1" comment="Set in order to force a software reset of the WL Coexistence digital."/>
+ <register addr="56230018" rw_flags="RW" width="1" name="COEX_WL_ALLOWED_ORIDE_I1" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="5623001c" rw_flags="RW" width="4" name="COEX_WL_TX_COL_I1" comment=""/>
+ <register addr="56230020" rw_flags="RW" width="4" name="COEX_WL_RX_COL_I1" comment=""/>
+ <register addr="56230024" rw_flags="RW" width="1" name="COEX_WL_DELAY_DEFERS_EN_I1" comment="When set to 1, the CDL defer is gated until the remote Activity Set is in progress."/>
+ <register addr="56230028" rw_flags="RW" width="2" name="COEX_WL_TRAN_CTRL_CFG_I1" comment="Coexistence Transition Control configuration."/>
+ <register addr="5623002c" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I1[0]" comment="5G RF Switch Configurations"/>
+ <register addr="56230030" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I1[1]" comment="5G RF Switch Configurations"/>
+ <register addr="56230034" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_PRIORITY_I1" comment="The WLAN priority to use for transmitted Acks."/>
+ <register addr="56230038" rw_flags="RW" width="1" name="COEX_WL_TX_DATA_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a transmitted Data frame. (should not be required)."/>
+ <register addr="5623003c" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a transmitted Ack (should not be required)."/>
+ <register addr="56230040" rw_flags="RW" width="2" name="COEX_WL_TX_START_CHANNEL_I1" comment=""/>
+ <register addr="56230044" rw_flags="RW" width="2" name="COEX_WL_TX_END_CHANNEL_I1" comment=""/>
+ <register addr="56230048" rw_flags="RW" width="2" name="COEX_WL_TX_MISC_CFG_I1" comment="Misc WLAN Tx configuration."/>
+ <register addr="5623004c" rw_flags="R" width="1" name="COEX_WL_TX_STICKY_STATUS_I1" comment="WLAN ASTX status register. Contents are cleared when the MAC Acc makes a new Tx request."/>
+ <register addr="56230050" rw_flags="R" width="1" name="COEX_WL_TX_DEFER_COUNT_I1" comment="WLAN ASTX defer counter. An accumulative count showing the number of times WLAN ASTX has been deferred."/>
+ <register addr="56230054" rw_flags="RW" width="1" name="COEX_WL_TX_CLR_DEFER_COUNT_I1" comment="WLAN ASTX defer count clear - write a 1 in order to clear COEX_WL_ASTX_DEFER_COUNT."/>
+ <register addr="56230058" rw_flags="RW" width="2" name="COEX_WL_RX_LISTEN_DURATION_I1" comment="The advertised ASRX duration when WLAN is listening. ASRX is automatically updated when this time expires."/>
+ <register addr="5623005c" rw_flags="RW" width="1" name="COEX_WL_RX_LISTEN_PRIORITY_I1" comment="The WLAN priority when WLAN is listening."/>
+ <register addr="56230060" rw_flags="RW" width="1" name="COEX_WL_RX_PHYACT_PRIORITY_I1" comment="The WLAN priority when the PHY is actively receiving (but Rx is not confirmed by MAC Acc)."/>
+ <register addr="56230064" rw_flags="RW" width="1" name="COEX_WL_RX_MAC_PRIORITY_I1" comment="The WLAN priority when MAC Acc confirms Rx."/>
+ <register addr="56230068" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_PRIORITY_I1" comment="The WLAN priority for Rx acknowledgements."/>
+ <register addr="5623006c" rw_flags="RW" width="1" name="COEX_WL_RX_DATA_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a received Data frame. (should not be required)."/>
+ <register addr="56230070" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a received Ack. (should not be required)."/>
+ <register addr="56230074" rw_flags="RW" width="1" name="COEX_WL_RX_MIN_ANT_SEL_I1" comment="Select minimum number of antenna(s) to use for Rx."/>
+ <register addr="56230078" rw_flags="RW" width="2" name="COEX_WL_RX_START_CHANNEL_I1" comment=""/>
+ <register addr="5623007c" rw_flags="RW" width="2" name="COEX_WL_RX_END_CHANNEL_I1" comment=""/>
+ <register addr="56230080" rw_flags="RW" width="1" name="COEX_WL_RX_MISC_CFG_I1" comment="Misc WLAN Rx configuration"/>
+ <register addr="56230084" rw_flags="R" width="1" name="COEX_WL_RX_STICKY_STATUS_I1" comment="WLAN ASRX status register. Contents are cleared when the MAC Acc makes a new Rx request."/>
+ <register addr="56230088" rw_flags="R" width="1" name="COEX_WL_RX_DEFER_COUNT_I1" comment="WLAN ASRX defer counter. An accumulative count showing the number of times WLAN ASRX has been deferred."/>
+ <register addr="5623008c" rw_flags="RW" width="1" name="COEX_WL_RX_CLR_DEFER_COUNT_I1" comment="WLAN ASRX defer count clear - write a 1 in order to clear COEX_WL_ASRX_DEFER_COUNT."/>
+ <register addr="56230090" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_I1" comment="WLAN Software ASTX configuration."/>
+ <register addr="56230094" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX1_I1" comment="WLAN Software ASTX configuration."/>
+ <register addr="56230098" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_START_TIME_I1" comment="WLAN Software ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="5623009c" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_UPDATE_I1" comment="WLAN Software ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="562300a0" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_STICKY_STATUS_I1" comment="WLAN Software ASTX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASTX_UPDATE"/>
+ <register addr="562300a4" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_DEFER_COUNT_I1" comment="WLAN Software ASTX defer counter. An accumulative count showing the number of times WLAN Software ASTX has been deferred."/>
+ <register addr="562300a8" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_CLR_DEFER_COUNT_I1" comment="WLAN Software ASTX defer count clear - write a 1 in order to clear COEX_WL_SW_ASTX_DEFER_COUNT"/>
+ <register addr="562300ac" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_I1" comment="WLAN Software ASRX configuration."/>
+ <register addr="562300b0" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX1_I1" comment="WLAN Software ASRX configuration."/>
+ <register addr="562300b4" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_START_TIME_I1" comment="WLAN Software ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="562300b8" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_UPDATE_I1" comment="WLAN Software ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="562300bc" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_STICKY_STATUS_I1" comment="WLAN Software ASRX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASRX_UPDATE"/>
+ <register addr="562300c0" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_DEFER_COUNT_I1" comment="WLAN Software ASRX defer counter. An accumulative count showing the number of times WLAN Software ASRX has been deferred."/>
+ <register addr="562300c4" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_CLR_DEFER_COUNT_I1" comment="WLAN Software ASRX defer count clear - write a 1 in order to clear COEX_WL_SW_ASRX_DEFER_COUNT"/>
+ </block>
+ <block name="mif_axi_monitor" comment="">
+ <register addr="51200000" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[0]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200004" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[1]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200008" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[2]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="5120000c" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[3]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200010" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[4]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200014" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[5]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200018" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[6]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="5120001c" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[7]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200020" rw_flags="R" width="4" name="MIF_AXI_MON_READ_BURST_COUNT" comment="Count of the number of read burst transactions on the AXI read channel."/>
+ <register addr="51200024" rw_flags="R" width="4" name="MIF_AXI_MON_READ_BYTE_COUNT" comment="Count of the number of bytes transferred in the read burst transactions on the AXI read channel."/>
+ <register addr="51200028" rw_flags="R" width="4" name="MIF_AXI_MON_WRITE_BURST_COUNT" comment="Count of the number of write burst transactions on the AXI read channel."/>
+ <register addr="5120002c" rw_flags="R" width="4" name="MIF_AXI_MON_WRITE_BYTE_COUNT" comment="Count of the number of bytes transferred in the write burst transactions on the AXI write channel."/>
+ </block>
+ <block name="mildred_sfr_core" comment="">
+ <register addr="5200fe04" rw_flags="RW" width="1" name="MILDRED_SP" comment="Stack pointer"/>
+ <register addr="5200fe08" rw_flags="RW" width="1" name="MILDRED_DPL" comment="Data pointer low byte"/>
+ <register addr="5200fe0c" rw_flags="RW" width="1" name="MILDRED_DPH" comment="Data pointer high byte"/>
+ <register addr="5200fe10" rw_flags="RW" width="1" name="MILDRED_CONTROL" comment="Control Mildred"/>
+ <register addr="5200fe14" rw_flags="RW" width="1" name="MILDRED_SET_PC_LO" comment="Set Mildred's PC - lower half"/>
+ <register addr="5200fe18" rw_flags="RW" width="1" name="MILDRED_SET_PC_HI" comment="Set Mildred's PC - upper half. Setting this register causes the update to occur if Mildred is stopped."/>
+ <register addr="5200fe1c" rw_flags="RW" width="1" name="MILDRED_PCON" comment="Power control"/>
+ <register addr="5200fe20" rw_flags="RW" width="1" name="MILDRED_TCON" comment="Timer control"/>
+ <register addr="5200fe24" rw_flags="RW" width="1" name="MILDRED_TMOD" comment="Timer mode"/>
+ <register addr="5200fe28" rw_flags="RW" width="1" name="MILDRED_TL0" comment="Timer low 0"/>
+ <register addr="5200fe2c" rw_flags="RW" width="1" name="MILDRED_TL1" comment="Timer low 1"/>
+ <register addr="5200fe30" rw_flags="RW" width="1" name="MILDRED_TH0" comment="Timer high 0"/>
+ <register addr="5200fe34" rw_flags="RW" width="1" name="MILDRED_TH1" comment="Timer high 1"/>
+ <register addr="5200fe60" rw_flags="RW" width="1" name="MILDRED_SCON" comment="Serial interface unit (SIU) control."/>
+ <register addr="5200fe64" rw_flags="RW" width="1" name="MILDRED_SBUF" comment="Serial data buffer"/>
+ <register addr="5200fe84" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_PRESCALE_INT" comment="Set the integer part of the timer/counter prescaler"/>
+ <register addr="5200fe88" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_PRESCALE_FRAC" comment="Set the fractional part of the timer/counter prescaler"/>
+ <register addr="5200fe94" rw_flags="R" width="1" name="MILDRED_PROGRAM_COUNTER_LO" comment="Register view of the Mildred program counter"/>
+ <register addr="5200fe98" rw_flags="R" width="1" name="MILDRED_PROGRAM_COUNTER_HI" comment="Register view of the Mildred program counter"/>
+ <register addr="5200fe9c" rw_flags="RW" width="1" name="MILDRED_READ_WRITE_INTERNAL_INT_STATE" comment="Clear Mildred's internal interrupt status flops. This is a bitfield register."/>
+ <register addr="5200fea0" rw_flags="RW" width="1" name="MILDRED_IE" comment="Interrupt enable"/>
+ <register addr="5200fee0" rw_flags="RW" width="1" name="MILDRED_IP" comment="Interrupt priority"/>
+ <register addr="5200ff40" rw_flags="RW" width="1" name="MILDRED_PSW" comment="Program and status word"/>
+ <register addr="5200ff80" rw_flags="RW" width="1" name="MILDRED_ACC" comment="Accumulator"/>
+ <register addr="5200ff84" rw_flags="RW" width="1" name="MILDRED_SIU_SDIV" comment="Control the SDIV input to the serial interface unit"/>
+ <register addr="5200ffc0" rw_flags="RW" width="1" name="MILDRED_B" comment="B register"/>
+ </block>
+ <block name="mildred_sfr_pmu" comment="">
+ <register addr="5200fe00" rw_flags="RW" width="1" name="MILDRED_P0" comment="PIO 0-7 config/status"/>
+ <register addr="5200fe38" rw_flags="RW" width="1" name="MILDRED_P0_RISING" comment="Reads bits 07:00 of the PIO rising edge capture register. When a PIO is high the matching bit is asynchronously set. If low, writing a 1 clears the bit."/>
+ <register addr="5200fe3c" rw_flags="RW" width="1" name="MILDRED_P1_RISING" comment="Reads bits 15:08 of the PIO rising edge capture register. When a PIO is high the matching bit is asynchronously set. If low, writing a 1 clears the bit."/>
+ <register addr="5200fe40" rw_flags="RW" width="1" name="MILDRED_P1" comment="PIO 8-15 config/status"/>
+ <register addr="5200fe44" rw_flags="RW" width="1" name="RESET" comment="Resets for main MXL140 clock generator, WLBT toplevel"/>
+ <register addr="5200fe48" rw_flags="RW" width="1" name="CLOCK_ENABLE" comment="Enables for main clock generator"/>
+ <register addr="5200fe4c" rw_flags="RW" width="1" name="CLOCK_ENABLE2" comment="Enables for main clock generator"/>
+ <register addr="5200fe50" rw_flags="RW" width="1" name="QREQ_OFF_OVR" comment="Q-channel request overrides"/>
+ <register addr="5200fe54" rw_flags="R" width="1" name="RANDOM_NUMBER_15_08" comment="Random number."/>
+ <register addr="5200fe58" rw_flags="R" width="1" name="RANDOM_NUMBER_07_00" comment="Random number."/>
+ <register addr="5200fe5c" rw_flags="RW" width="1" name="PIO" comment="PIO Vdd Alive registers"/>
+ <register addr="5200fe68" rw_flags="RW" width="1" name="WPLL_DSM_F_26_24" comment="PLL F controls"/>
+ <register addr="5200fe6c" rw_flags="RW" width="1" name="WPLL_DSM_F_23_16" comment="PLL F controls"/>
+ <register addr="5200fe70" rw_flags="RW" width="1" name="WPLL_DSM_F_15_08" comment="PLL F controls"/>
+ <register addr="5200fe74" rw_flags="RW" width="1" name="WPLL_DSM_F_07_00" comment="PLL F controls"/>
+ <register addr="5200fe78" rw_flags="RW" width="1" name="CLOCK_MUX_SEL" comment="Choose which clock to run the PMU on."/>
+ <register addr="5200fe7c" rw_flags="RW" width="1" name="MILDRED_P0_FALLING" comment="Reads bits 07:00 of the PIO falling edge capture register. When a PIO is low the matching bit is asynchronously set. If high, writing a 1 clears the bit."/>
+ <register addr="5200fe80" rw_flags="RW" width="1" name="MILDRED_RESOURCE_REQ" comment="Outgoing resource requests from WLBT to AP/CP."/>
+ <register addr="5200fe8c" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_T0_MUX_SEL" comment="Choose the source for timer/counter 0. 0-15 = PIO[15:0]."/>
+ <register addr="5200fe90" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_T1_MUX_SEL" comment="Choose the source for timer/counter 0. 0-15 = PIO[15:0]."/>
+ <register addr="5200fea4" rw_flags="RW" width="1" name="CLOCK_MUX_CBUS_SEL" comment="Choose which clock to run the PMU on."/>
+ <register addr="5200fea8" rw_flags="RW" width="1" name="CLK_GATE_OVR" comment="Clock Gate overrides"/>
+ <register addr="5200feac" rw_flags="R" width="1" name="WPLL_STATUS" comment=""/>
+ <register addr="5200feb0" rw_flags="RW" width="1" name="PCH_REQ" comment="PCH Power down request"/>
+ <register addr="5200feb4" rw_flags="R" width="1" name="PCH_ACK" comment="PCH Power down acknoledge"/>
+ <register addr="5200feb8" rw_flags="RW" width="1" name="MILDRED_IPC_IRQ" comment="Interprocessor communication interrupts "/>
+ <register addr="5200febc" rw_flags="RW" width="1" name="MILDRED_EXT_RESET_REQUEST" comment="Requests and status out of WLBT"/>
+ <register addr="5200fec0" rw_flags="R" width="1" name="MILDRED_RESOURCE_ACK" comment="Outgoing resource status/acknowledgement"/>
+ <register addr="5200fec4" rw_flags="RW" width="1" name="SWEEPER_CONTROL" comment="Controls the DBUS Sweeper module in WLBT."/>
+ <register addr="5200fec8" rw_flags="R" width="1" name="SWEEPER_STATUS" comment="Status from the PBUS Sweeper module in WLBT."/>
+ <register addr="5200fecc" rw_flags="R" width="1" name="MILDRED_AP2WB_REQ" comment="Incoming requests from AP to WLBT."/>
+ <register addr="5200fed0" rw_flags="RW" width="1" name="MILDRED_WB2AP_ACK" comment="Outgoing acknowledgement from WLBT to AP."/>
+ <register addr="5200fed4" rw_flags="RW" width="1" name="MILDRED_P1_FALLING" comment="Reads bits 15:08 of the PIO falling edge capture register. When a PIO is low the matching bit is asynchronously set. If high, writing a 1 clears the bit."/>
+ <register addr="5200fed8" rw_flags="RW" width="1" name="WATCHDOG_ENABLE" comment="Writing '1' enables the watchdog regardless of its previous state and resets its state machine to 0."/>
+ <register addr="5200fedc" rw_flags="RW" width="1" name="WATCHDOG_DISABLE" comment=" NOTE VALUES CHANGED FOR MAXWELL Writing the 3 disable codes in sequence to this register will disable the watchdog. Writing WATCHDOG_DEBUG_CODE3 instead of WATCHDOG_DISABLE_CODE3 will set the watchdog into debug mode. Each correct code written will advance the WATCHDOG_STATUS by 1 until it reaches 3. A status of 3 indicates that the watchdog has been disabled A status of 4 indicates that the watchdog is in debug mode. If an incorrect code is written at any time, the status will revert to 0 (enabled). The watchdog will not stop counting down until all three codes have been written correctly."/>
+ <register addr="5200fee4" rw_flags="RW" width="1" name="WATCHDOG_KICK" comment="Writing to this register causes the countdown value to be reset to the value stored in WATCHDOG_DELAY."/>
+ <register addr="5200fee8" rw_flags="R" width="1" name="WATCHDOG_KICK_PENDING" comment="This indicates that WATCHDOG_KICK has been written to recently, but has not yet been transferred to the slow clock domain to reset the countdown value."/>
+ <register addr="5200feec" rw_flags="R" width="1" name="WATCHDOG_SLOW_KICK_PENDING" comment="This indicates that the WATCHDOG_KICK has got as far as the slow clock domain, and the countdown reset will occur on the next slow clock edge."/>
+ <register addr="5200fef0" rw_flags="R" width="1" name="WATCHDOG_STATUS" comment="This indicates the current status of the enable/disable state machine. The states are: 0 - Enabled; 1 - Disable1; 2 - Disable2; 3 - Disabled; 4 - Debug mode. The watchdog is not fully disabled until it is in state 3. In addition, bit 3 is set if the watchdog has fired in debug mode."/>
+ <register addr="5200fef4" rw_flags="RW" width="1" name="MILDRED_INT_EN" comment="Interrupt enable."/>
+ <register addr="5200fef8" rw_flags="RW" width="1" name="DRCG" comment="Dynamic Root Clock gating "/>
+ <register addr="5200fefc" rw_flags="RW" width="1" name="MILDRED_INT_VECTOR_HI" comment="Interrupt vector top 8 bits."/>
+ <register addr="5200ff00" rw_flags="RW" width="1" name="MILDRED_INT_STATUS" comment="Interrupt status. Write to clear."/>
+ <register addr="5200ff04" rw_flags="RW" width="1" name="WPLL_CONTROLS_0" comment="PLL controls"/>
+ <register addr="5200ff08" rw_flags="RW" width="1" name="WPLL_CONTROLS_1" comment="PLL controls"/>
+ <register addr="5200ff0c" rw_flags="RW" width="1" name="WPLL_CONTROLS_2" comment="PLL controls"/>
+ <register addr="5200ff10" rw_flags="RW" width="1" name="WPLL_CONTROLS_3" comment="PLL controls"/>
+ <register addr="5200ff14" rw_flags="RW" width="1" name="WPLL_CONTROLS_4" comment="PLL controls"/>
+ <register addr="5200ff18" rw_flags="RW" width="1" name="WPLL_CONTROLS_5" comment="PLL controls"/>
+ <register addr="5200ff1c" rw_flags="RW" width="1" name="WPLL_CONTROLS_6" comment="PLL controls"/>
+ <register addr="5200ff20" rw_flags="RW" width="1" name="MILDRED_INT_PRIORITIES" comment="Interrupt source priorities."/>
+ <register addr="5200ff24" rw_flags="RW" width="1" name="WPLL_DSM_K_26_24" comment="PLL K controls"/>
+ <register addr="5200ff28" rw_flags="RW" width="1" name="WPLL_DSM_K_23_16" comment="PLL K controls"/>
+ <register addr="5200ff2c" rw_flags="RW" width="1" name="WPLL_DSM_K_15_08" comment="PLL K controls"/>
+ <register addr="5200ff30" rw_flags="RW" width="1" name="WPLL_DSM_K_07_00" comment="PLL K controls"/>
+ <register addr="5200ff34" rw_flags="RW" width="1" name="PD_CONTROL_WLAN" comment="Controls the state of switches, isolation and reset in WLAN power domain"/>
+ <register addr="5200ff38" rw_flags="RW" width="1" name="PD_CONTROL_CORE" comment="Controls the state of switches, isolation and reset in CORE power domain"/>
+ <register addr="5200ff3c" rw_flags="R" width="1" name="PD_STATUS" comment="Indicates the status of the switches in each power domain"/>
+ <register addr="5200ff44" rw_flags="RW" width="1" name="WPLL_CONTROLS_7" comment="PLL controls"/>
+ <register addr="5200ff48" rw_flags="RW" width="1" name="WPLL_CONTROLS_8" comment="PLL controls"/>
+ <register addr="5200ff4c" rw_flags="RW" width="1" name="WPLL_CONTROLS_9" comment="PLL controls"/>
+ <register addr="5200ff50" rw_flags="RW" width="1" name="WPLL_CONTROLS_10" comment="PLL controls"/>
+ <register addr="5200ff54" rw_flags="RW" width="1" name="WPLL_CONTROLS_11" comment="PLL controls"/>
+ <register addr="5200ff58" rw_flags="RW" width="1" name="MILDRED_P0_RISING_MASK" comment="Bits 07:00 of the PIO rising edge interrupt mask register. The contents of this register are ANDed with MILDRED_P0_RISING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff5c" rw_flags="RW" width="1" name="MILDRED_P1_RISING_MASK" comment="Bits 15:08 of the PIO rising edge interrupt mask register. The contents of this register are ANDed with MILDRED_P1_RISING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff60" rw_flags="RW" width="1" name="MILDRED_INT_SOURCES_EN" comment="Interrupt sources enable."/>
+ <register addr="5200ff64" rw_flags="RW" width="1" name="MILDRED_P0_FALLING_MASK" comment="Bits 07:00 of the PIO falling edge interrupt mask register. The contents of this register are ANDed with MILDRED_P0_FALLING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff68" rw_flags="RW" width="1" name="MILDRED_P1_FALLING_MASK" comment="Bits 15:08 of the PIO falling edge interrupt mask register. The contents of this register are ANDed with MILDRED_P1_FALLING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff6c" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_31_24" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff70" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_23_16" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff74" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_15_08" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff78" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_07_00" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff7c" rw_flags="RW" width="1" name="WPLL_CONTROLS_12" comment="PLL controls"/>
+ <register addr="5200ff8c" rw_flags="RW" width="1" name="WATCHDOG_DELAY_31_24" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff90" rw_flags="RW" width="1" name="WATCHDOG_DELAY_23_16" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff94" rw_flags="RW" width="1" name="WATCHDOG_DELAY_15_08" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff98" rw_flags="RW" width="1" name="WATCHDOG_DELAY_07_00" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff9c" rw_flags="RW" width="1" name="WPLL_CONTROLS_13" comment="PLL controls"/>
+ <register addr="5200ffa0" rw_flags="RW" width="1" name="MILDRED_PIO_0700_DRIVE_ENABLE" comment="Bits [ 7: 0] of PIO drive enable bus. These 8 PIO drive enable bits are bit-addressable to allow convenient switching for use with e.g. I2C."/>
+ <register addr="5200ffa4" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_0700_WAKEUP_ENABLES" comment="This register enables the PIO[7:0] inputs individually to allow them to create a deep sleep wakeup event."/>
+ <register addr="5200ffa8" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_0700_WAKEUP_INVERT" comment="This register inverts the PIO[7:0] inputs individually before feeding them into the deep sleep wakeup logic. A 1 on the resulting bit may cause a wakeup event."/>
+ <register addr="5200ffac" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_PIO_0700_WAKEUP_STICKY" comment="This register returns a sticky version of the PIO[7:0] deep sleep wakeup activities. Clear the sticky activity flops by writing 1 to DEEP_SLEEP_WAKEUP_CLR_PIO."/>
+ <register addr="5200ffb0" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_1508_WAKEUP_ENABLES" comment="This register enables the PIO[15:8] inputs individually to allow them to create a deep sleep wakeup event."/>
+ <register addr="5200ffb4" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_1508_WAKEUP_INVERT" comment="This register inverts the PIO[15:8] inputs individually before feeding them into the deep sleep wakeup logic. A 1 on the resulting bit may cause a wakeup event."/>
+ <register addr="5200ffb8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_PIO_1508_WAKEUP_STICKY" comment="This register returns a sticky version of the PIO[15:8] deep sleep wakeup activities. Clear the sticky activity flops by writing 1 to DEEP_SLEEP_WAKEUP_CLR_PIO."/>
+ <register addr="5200ffbc" rw_flags="RW" width="1" name="DEEP_SLEEP_CMD" comment="This register is used to trigger events in the sleep block"/>
+ <register addr="5200ffc4" rw_flags="RW" width="1" name="DEEP_SLEEP_WAKEUP_ENABLES0" comment="This register controls the sources which can cause deep sleep wakeup. Functions are enabled by setting individual bits. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffc8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS0" comment="This register indicates the currently-active deep sleep wakeup sources."/>
+ <register addr="5200ffcc" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_STICKY0" comment="This register returns a sticky version of DEEP_SLEEP_STATUS, recording all wakeup events since it was last cleared. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffd0" rw_flags="RW" width="1" name="DEEP_SLEEP_WAKEUP_ENABLES1" comment="This register controls the sources which can cause deep sleep wakeup. Functions are enabled by setting individual bits. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffd4" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS1" comment="This register indicates the currently-active deep sleep wakeup sources."/>
+ <register addr="5200ffd8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_STICKY1" comment="This register returns a sticky version of DEEP_SLEEP_STATUS, recording all wakeup events since it was last cleared. "/>
+ <register addr="5200ffdc" rw_flags="RW" width="1" name="PROC_CONFIG" comment="PROC processor platform configuration cleanable on PROC POR only"/>
+ <register addr="5200ffe0" rw_flags="RW" width="1" name="MILDRED_PIO_1508_DRIVE_ENABLE" comment="Bits [15: 8] of PIO drive enable bus. These 8 PIO drive enable bits are bit-addressable to allow convenient switching for use with e.g. I2C."/>
+ <register addr="5200ffe4" rw_flags="RW" width="1" name="MILDRED_MISC_CONTROL" comment="Miscellaneous control signals"/>
+ <register addr="5200ffe8" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_31_24" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200ffec" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_23_16" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff0" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_15_08" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff4" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_07_00" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff8" rw_flags="RW" width="1" name="PAD_RETENTION" comment="Pad retention controls."/>
+ <register addr="5200fffc" rw_flags="RW" width="1" name="DEBUG_SOURCE_SELECT" comment="Select the ouput on DEBUG_OUT[15:0] on the PMU"/>
+ </block>
+ <block name="pcr_config" comment="">
+ <register addr="51000000" rw_flags="R" width="4" name="PCR_VERSION" comment=""/>
+ <register addr="51000004" rw_flags="RW" width="1" name="PCR_RST_CONFIG" comment="Processor platform configuration cleanable on reset"/>
+ <register addr="51000008" rw_flags="RW" width="1" name="PCR_RTC_IRQ_EN" comment="RTC Interrupt enable. Any writes to this register also clear any RTC interrupt."/>
+ <register addr="5100000c" rw_flags="RW" width="4" name="PCR_SYSTEM_CTRL" comment="Processor platform general system control"/>
+ <register addr="51000010" rw_flags="RW" width="1" name="PCR_WL_ADC_COMMON_CFG" comment=""/>
+ <register addr="51000014" rw_flags="RW" width="2" name="PCR_WL_ADC0_CFG" comment=""/>
+ <register addr="51000018" rw_flags="RW" width="2" name="PCR_WL_ADC1_CFG" comment=""/>
+ <register addr="5100001c" rw_flags="RW" width="1" name="PCR_WL_DAC0_CFG" comment=""/>
+ <register addr="51000020" rw_flags="RW" width="1" name="PCR_WL_DAC1_CFG" comment=""/>
+ <register addr="51000024" rw_flags="RW" width="2" name="PCR_WL_ADC0_CTRLI" comment=""/>
+ <register addr="51000028" rw_flags="RW" width="2" name="PCR_WL_ADC0_CTRLQ" comment=""/>
+ <register addr="5100002c" rw_flags="RW" width="2" name="PCR_WL_ADC1_CTRLI" comment=""/>
+ <register addr="51000030" rw_flags="RW" width="2" name="PCR_WL_ADC1_CTRLQ" comment=""/>
+ <register addr="51000034" rw_flags="RW" width="4" name="PCR_WL_DAC0_CTRLI" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000038" rw_flags="RW" width="4" name="PCR_WL_DAC0_CTRLQ" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="5100003c" rw_flags="RW" width="4" name="PCR_WL_DAC1_CTRLI" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000040" rw_flags="RW" width="4" name="PCR_WL_DAC1_CTRLQ" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000044" rw_flags="RW" width="2" name="PCR_PIO_DRIVE" comment="PIO output values for PIO[15:0]"/>
+ <register addr="51000048" rw_flags="RW" width="2" name="PCR_PIO_DRIVE_EN" comment="PIO output enable for PIO[15:0]"/>
+ <register addr="5100004c" rw_flags="R" width="2" name="PCR_PIO_STATUS" comment="PIO status values for PIO[15:0]"/>
+ <register addr="51000050" rw_flags="RW" width="4" name="PCR_QOS" comment="Quality of service values of the matrix AXI masters"/>
+ <register addr="51000054" rw_flags="RW" width="1" name="PCR_RMP_RGN0_BOOT" comment="PROC0 Boot Address Remapping Region 0 Enable"/>
+ <register addr="51000058" rw_flags="RW" width="4" name="PCR_RMP_RGN0_BASE" comment="PROC0 Address Remapping Region 0 Start Address (4K address)"/>
+ <register addr="5100005c" rw_flags="RW" width="1" name="PCR_RMP_RGN0_SIZE" comment="PROC0 Address Remapping Region 0 Size (4K bytes)"/>
+ <register addr="51000060" rw_flags="RW" width="4" name="PCR_RMP_RGN0_OFST" comment="PROC0 Address Remapping Region 0 Offset (4K bytes)"/>
+ <register addr="51000064" rw_flags="RW" width="4" name="PCR_RMP_RGN1_BASE" comment="PROC0 Address Remapping Region 1 Start Address (4K address)"/>
+ <register addr="51000068" rw_flags="RW" width="1" name="PCR_RMP_RGN1_SIZE" comment="PROC0 Address Remapping Region 1 Size (4K bytes)"/>
+ <register addr="5100006c" rw_flags="RW" width="4" name="PCR_RMP_RGN1_OFST" comment="PROC0 Address Remapping Region 1 Offset (4K bytes)"/>
+ <register addr="51000070" rw_flags="RW" width="4" name="PCR_RMP_RGN2_BASE" comment="PROC0 Address Remapping Region 2 Start Address (4K address)"/>
+ <register addr="51000074" rw_flags="RW" width="1" name="PCR_RMP_RGN2_SIZE" comment="PROC0 Address Remapping Region 2 Size (4K bytes)"/>
+ <register addr="51000078" rw_flags="RW" width="4" name="PCR_RMP_RGN2_OFST" comment="PROC0 Address Remapping Region 2 Offset (4K bytes)"/>
+ <register addr="5100007c" rw_flags="RW" width="4" name="PCR_RMP_RGN3_BASE" comment="PROC0 Address Remapping Region 3 Start Address (4K address)"/>
+ <register addr="51000080" rw_flags="RW" width="1" name="PCR_RMP_RGN3_SIZE" comment="PROC0 Address Remapping Region 3 Size (4K bytes)"/>
+ <register addr="51000084" rw_flags="RW" width="4" name="PCR_RMP_RGN3_OFST" comment="PROC0 Address Remapping Region 3 Offset (4K bytes)"/>
+ <register addr="51000088" rw_flags="RW" width="4" name="PCR_RMP_RGN4_BASE" comment="PROC0 Address Remapping Region 4 Start Address (4K address)"/>
+ <register addr="5100008c" rw_flags="RW" width="1" name="PCR_RMP_RGN4_SIZE" comment="PROC0 Address Remapping Region 4 Size (4K bytes)"/>
+ <register addr="51000090" rw_flags="RW" width="4" name="PCR_RMP_RGN4_OFST" comment="PROC0 Address Remapping Region 4 Offset (4K bytes)"/>
+ <register addr="51000094" rw_flags="RW" width="4" name="PCR_RMP_RGN5_BASE" comment="PROC0 Address Remapping Region 5 Start Address (4K address)"/>
+ <register addr="51000098" rw_flags="RW" width="1" name="PCR_RMP_RGN5_SIZE" comment="PROC0 Address Remapping Region 5 Size (4K bytes)"/>
+ <register addr="5100009c" rw_flags="RW" width="4" name="PCR_RMP_RGN5_OFST" comment="PROC0 Address Remapping Region 5 Offset (4K bytes)"/>
+ <register addr="510000a0" rw_flags="RW" width="1" name="PCR_MEMARB_QOS_EN" comment="Memory arbiters QoS enable"/>
+ <register addr="510000a4" rw_flags="RW" width="1" name="PCR_SPLT_LOW_ADDR_BITS" comment="Splitting Memory with lsbits(1) or msbits(0)"/>
+ <register addr="510000a8" rw_flags="RW" width="1" name="PCR_QREQ_OFF_XDMA" comment="XDMA Q-channel request"/>
+ <register addr="510000ac" rw_flags="RW" width="2" name="PCR_DRAM_EARLY_WAKEUP" comment="DRAM Early Wakeup"/>
+ <register addr="510000b0" rw_flags="RW" width="4" name="PCR_QEXP" comment="Expiration Q-channel registers"/>
+ </block>
+ <block name="pcr_ticker" comment="">
+ <register addr="51100000" rw_flags="R" width="4" name="TCKR_VALUE" comment="Current value of the ticker"/>
+ <register addr="51100004" rw_flags="RW" width="4" name="TCKR_SET_VALUE" comment="Set a new value of the ticker"/>
+ <register addr="51100008" rw_flags="RW" width="4" name="TCKR_ALARM0" comment="Set the Proc alarm 0 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="5110000c" rw_flags="RW" width="4" name="TCKR_ALARM1" comment="Set the Proc alarm 1 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100010" rw_flags="RW" width="4" name="TCKR_ALARM2" comment="Set the Proc alarm 2 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100014" rw_flags="RW" width="4" name="TCKR_ALARM3" comment="Set the Proc alarm 3 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100018" rw_flags="RW" width="4" name="TCKR_ALARM4" comment="Set the Proc alarm 4 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="5110001c" rw_flags="RW" width="4" name="TCKR_TIMESTAMP_CTRL" comment="Control of timestamping"/>
+ <register addr="51100020" rw_flags="R" width="4" name="TCKR_TIMESTAMP0_COARSE_VAL" comment="Timestamp 0 block microsecond count"/>
+ <register addr="51100024" rw_flags="R" width="4" name="TCKR_TIMESTAMP1_COARSE_VAL" comment="Timestamp 1 block microsecond count"/>
+ <register addr="51100028" rw_flags="R" width="4" name="TCKR_TIMESTAMP2_COARSE_VAL" comment="Timestamp 2 block microsecond count"/>
+ <register addr="5110002c" rw_flags="R" width="4" name="TCKR_TIMESTAMP3_COARSE_VAL" comment="Timestamp 3 block microsecond count"/>
+ <register addr="51100030" rw_flags="R" width="2" name="TCKR_TIMESTAMP0_FINE_VAL" comment="Timestamp 0 block 1/80 microsecond count"/>
+ <register addr="51100034" rw_flags="R" width="2" name="TCKR_TIMESTAMP1_FINE_VAL" comment="Timestamp 1 block 1/80 microsecond count"/>
+ <register addr="51100038" rw_flags="R" width="2" name="TCKR_TIMESTAMP2_FINE_VAL" comment="Timestamp 2 block 1/80 microsecond count"/>
+ <register addr="5110003c" rw_flags="R" width="2" name="TCKR_TIMESTAMP3_FINE_VAL" comment="Timestamp 3 block 1/80 microsecond count"/>
+ <register addr="51100040" rw_flags="R" width="1" name="TCKR_TIMESTAMP_OCCURRED" comment="Timestamp edge has happened (one bit for each block)"/>
+ <register addr="51100044" rw_flags="RW" width="1" name="TCKR_TIMESTAMP_OCCURRED_CLEAR" comment="Clears corresponding TIMESTAMP_OCCURRED flag"/>
+ <register addr="51100048" rw_flags="RW" width="1" name="TCKR_CTRL0" comment="The Proc alarm 0 control register"/>
+ <register addr="5110004c" rw_flags="RW" width="1" name="TCKR_CTRL1" comment="The Proc alarm 1 control register"/>
+ <register addr="51100050" rw_flags="RW" width="1" name="TCKR_CTRL2" comment="The Proc alarm 2 control register"/>
+ <register addr="51100054" rw_flags="RW" width="1" name="TCKR_CTRL3" comment="The Proc alarm 3 control register"/>
+ <register addr="51100058" rw_flags="RW" width="1" name="TCKR_CTRL4" comment="The Proc alarm 4 control register"/>
+ </block>
+ <block name="phy" comment="">
+ <register addr="50000000" rw_flags="R" width="4" name="PHY_ID_0" comment='PHY ID 0, ASCII "PHY-"'/>
+ <register addr="50000004" rw_flags="R" width="4" name="PHY_ID_1" comment="PHY ID 1, ASCII BANDWIDTH,TX_SS,RX_SS,TC"/>
+ <register addr="50000008" rw_flags="RW" width="4" name="PHY_CONFIG[0]" comment="PHY configuration (one for each of the two paths in RSDB builds)"/>
+ <register addr="5000000c" rw_flags="RW" width="4" name="PHY_CONFIG[1]" comment="PHY configuration (one for each of the two paths in RSDB builds)"/>
+ <register addr="50000010" rw_flags="RW" width="2" name="PHY_RESET" comment="Async reset for phy blocks"/>
+ <register addr="50000014" rw_flags="R" width="4" name="PHY_MAC_STATUS" comment="Status register showing the current value of the private MAC baseband control registers"/>
+ <register addr="50000018" rw_flags="RW" width="4" name="PHY_CONTROL" comment="Allows the CPU to override MAC start/abort of baseband operations"/>
+ <register addr="5000001c" rw_flags="RW" width="2" name="CAPTURE_INTERVAL" comment=" capture interval in steps of 50ns"/>
+ <register addr="50000020" rw_flags="RW" width="4" name="CAPTURE_BASE_ADDR" comment=" Capture base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000024" rw_flags="RW" width="4" name="CAPTURE_BUFFER_LEN" comment=" Capture buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000028" rw_flags="RW" width="4" name="CAPTURE_CONTROL" comment="This register controls the data capture features within the capture block"/>
+ <register addr="5000002c" rw_flags="RW" width="4" name="EVENT_COUNT_CONTROL[0]" comment="This register configure capture trigger events to be counted"/>
+ <register addr="50000030" rw_flags="RW" width="4" name="EVENT_COUNT_CONTROL[1]" comment="This register configure capture trigger events to be counted"/>
+ <register addr="50000034" rw_flags="R" width="2" name="EVENT_COUNT[0]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000038" rw_flags="R" width="2" name="EVENT_COUNT[1]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="5000003c" rw_flags="R" width="2" name="EVENT_COUNT[2]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000040" rw_flags="R" width="2" name="EVENT_COUNT[3]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000044" rw_flags="R" width="2" name="EVENT_COUNT[4]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000048" rw_flags="R" width="2" name="EVENT_COUNT[5]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="5000004c" rw_flags="R" width="2" name="EVENT_COUNT[6]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000050" rw_flags="R" width="2" name="EVENT_COUNT[7]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000054" rw_flags="R" width="2" name="CAPTURE_STATUS" comment="Capture and DMA channel state "/>
+ <register addr="50000058" rw_flags="R" width="4" name="CAPTURE_CUR_ADDR" comment=" Capture current address"/>
+ <register addr="5000005c" rw_flags="RW" width="4" name="PLAYBACK_BASE_ADDR" comment=" Playback base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000060" rw_flags="RW" width="4" name="PLAYBACK_BUFFER_LEN" comment=" Playback buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000064" rw_flags="RW" width="4" name="PLAYBACK_CONTROL" comment="This register controls the data Playback features within the Playback block"/>
+ <register addr="50000068" rw_flags="R" width="2" name="PLAYBACK_STATUS" comment="Playback and DMA channel state"/>
+ <register addr="5000006c" rw_flags="R" width="4" name="PLAYBACK_CUR_ADDR" comment=" Playback current address"/>
+ <register addr="50000070" rw_flags="RW" width="4" name="EVENT_CONTROL_0" comment="enables for event capture"/>
+ <register addr="50000074" rw_flags="RW" width="4" name="EVENT_CONTROL_1" comment="enables for event capture"/>
+ <register addr="50000078" rw_flags="W" width="4" name="EVENT_GENERATE" comment="generates event from software"/>
+ <register addr="5000007c" rw_flags="RW" width="4" name="EVENT_HIGH" comment="high 32 bits of software generated events"/>
+ <register addr="50000080" rw_flags="RW" width="4" name="EVENT_MATCH[0]" comment="Event ID matches that generate interrupt or capture trigger"/>
+ <register addr="50000084" rw_flags="RW" width="4" name="EVENT_MATCH[1]" comment="Event ID matches that generate interrupt or capture trigger"/>
+ <register addr="50000088" rw_flags="RW" width="4" name="EVENT_DMA_BASE_ADDR" comment=" Events logging base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="5000008c" rw_flags="RW" width="4" name="EVENT_DMA_BUFFER_LEN" comment="Events logging buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000090" rw_flags="R" width="2" name="EVENT_STATUS" comment=" EVENT logging status "/>
+ <register addr="50000094" rw_flags="R" width="4" name="EVENT_DMA_CUR_ADDR" comment=" Beamformee0 DMA read current address"/>
+ <register addr="50000098" rw_flags="RW" width="1" name="BBA_BF_RX0_CONTROL" comment="Beamformee 0 control to request CBR upon next NDP"/>
+ <register addr="5000009c" rw_flags="RW" width="1" name="BBA_BF_RX0_DMA_EN" comment=" Beamformee 0 DMA channel enable "/>
+ <register addr="500000a0" rw_flags="RW" width="4" name="BBA_BF_RX0_DMA_BASE_ADDR" comment=" Beamformee 0 base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000a4" rw_flags="RW" width="2" name="BBA_BF_RX0_DMA_BUFFER_LEN" comment=" Beamformee 0 buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000a8" rw_flags="R" width="2" name="BBA_BF_RX0_STATUS" comment=" BBA_BF_RX0 status "/>
+ <register addr="500000ac" rw_flags="R" width="4" name="BBA_BF_RX0_DMA_CUR_ADDR" comment=" Beamformee0 DMA read current address"/>
+ <register addr="500000b0" rw_flags="RW" width="1" name="BBA_BF_RX1_CONTROL" comment="Beamformee 1 control to request CBR upon next NDP"/>
+ <register addr="500000b4" rw_flags="RW" width="1" name="BBA_BF_RX1_DMA_EN" comment=" Beamformee 1 DMA channel enable "/>
+ <register addr="500000b8" rw_flags="RW" width="4" name="BBA_BF_RX1_DMA_BASE_ADDR" comment=" Beamformee 1 base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000bc" rw_flags="RW" width="2" name="BBA_BF_RX1_DMA_BUFFER_LEN" comment=" Beamformee 1 buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000c0" rw_flags="R" width="2" name="BBA_BF_RX1_STATUS" comment=" BBA_BF_RX1 status "/>
+ <register addr="500000c4" rw_flags="R" width="4" name="BBA_BF_RX1_DMA_CUR_ADDR" comment=" Beamformee1 DMA read current address"/>
+ <register addr="500000c8" rw_flags="RW" width="1" name="BBA_BF_TX_DMA_CONTROL" comment="This register controls the beamformer angle fetch DMA "/>
+ <register addr="500000cc" rw_flags="RW" width="4" name="BBA_BF_TX_DMA_BASE_ADDR" comment="Beamformer angle fetch DMA base address (byte address)"/>
+ <register addr="500000d0" rw_flags="RW" width="4" name="BBA_BF_TX_DMA_BUFFER_LEN" comment="Beamformer angle fetch buffer length (bytes)"/>
+ <register addr="500000d4" rw_flags="R" width="2" name="BBA_BF_TX_STATUS" comment=" BBA_BF_TX_status "/>
+ <register addr="500000d8" rw_flags="R" width="4" name="BBA_BF_TX_DMA_CUR_ADDR" comment=" Beamformer DMA read current address"/>
+ <register addr="500000dc" rw_flags="RW" width="4" name="DMA_INT_EN" comment="Write one to enable corresponding DMA interrupt "/>
+ <register addr="500000e0" rw_flags="R" width="4" name="DMA_EVENTS" comment="Generated DMA events.Register has the same fields as DMA_INT "/>
+ <register addr="500000e4" rw_flags="RW" width="4" name="DMA_INT_CLEAR" comment="Write one to clear DMA event.Register has the same fields as DMA_INT_EN "/>
+ </block>
+ <block name="phy_clkgen_0" comment="">
+ <register addr="50010000" rw_flags="RW" width="1" name="CLKGEN_DEBUG_SELECT_I0" comment="This register selects which of a variety of debug buses are driven out of the block"/>
+ <register addr="50010004" rw_flags="R" width="2" name="CLKGEN_TIMER_FAST_STATUS_I0" comment="This read-only register contains the current value of the fast timer. It is used to set time changes on PIOs to implement serial buses. The value is in units of 12.5ns (80MHz) and it is free running all the time that the CLKGEN_TIMER_FAST_EN bit in CLKGEN_TIMER_ENABLES is set."/>
+ <register addr="50010008" rw_flags="RW" width="2" name="WL_CLKGEN_ENABLES_I0" comment="This register enables many of the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="5001000c" rw_flags="RW" width="1" name="CLKGEN_PP_ENABLES_I0" comment="This register enables processor platform clocks. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50010010" rw_flags="RW" width="2" name="CLKGEN_WL_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN specific clocks"/>
+ <register addr="50010014" rw_flags="RW" width="2" name="CLKGEN_BB_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN baseband specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="50010018" rw_flags="RW" width="1" name="CLKGEN_LDPC_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with LDPC specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="5001001c" rw_flags="RW" width="1" name="CLKGEN_CLKMAC_SLEEP_CONFIG_I0" comment="This register selects which of the clock requests and the Mac Activity input are capable of forcing the Clk20MRadio clock to be active. This could be useful to software in controlling sleep modes for the Mac Accelerator."/>
+ <register addr="50010020" rw_flags="R" width="2" name="CLKGEN_STATUS_I0" comment="This register returns the instantaneous status of the various deep sleep wakeup sources, along with the deep sleep mode bit and the status of the slow clock"/>
+ <register addr="50010024" rw_flags="RW" width="4" name="CLKGEN_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50010028" rw_flags="RW" width="2" name="CLKGEN_BB_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="5001002c" rw_flags="RW" width="1" name="CLKGEN_LDPC_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50010030" rw_flags="R" width="2" name="CLKGEN_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50010034" rw_flags="R" width="2" name="CLKGEN_BB_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50010038" rw_flags="R" width="1" name="CLKGEN_LDPC_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="5001003c" rw_flags="RW" width="1" name="CLKGEN_VITERBI_PRESCALE_CFG_I0" comment="Register to set 480MHz clock prescaling before it is used to create Viterbi clock. Prescaled clock would be 480, 240, 120 and 80 MHz when set to 1, 2, 3 and 4 respectfully. Recommended settings are SISO 1, 1, 2 and 4 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 1, 1, 3, 4 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 1."/>
+ <register addr="50010040" rw_flags="RW" width="1" name="CLKGEN_VITERBI_SCALE_CFG_I0" comment="Register to divide prescaled 480MHz clock to create Viterbi clock. The scaling value applied is (Register Value + 1)/8. Recommended settings are SISO 5, 5, 5 and 7 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 7, 7, 7, 6 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 4."/>
+ </block>
+ <block name="phy_clkgen_1" comment="">
+ <register addr="50020000" rw_flags="RW" width="1" name="CLKGEN_DEBUG_SELECT_I1" comment="This register selects which of a variety of debug buses are driven out of the block"/>
+ <register addr="50020004" rw_flags="R" width="2" name="CLKGEN_TIMER_FAST_STATUS_I1" comment="This read-only register contains the current value of the fast timer. It is used to set time changes on PIOs to implement serial buses. The value is in units of 12.5ns (80MHz) and it is free running all the time that the CLKGEN_TIMER_FAST_EN bit in CLKGEN_TIMER_ENABLES is set."/>
+ <register addr="50020008" rw_flags="RW" width="2" name="WL_CLKGEN_ENABLES_I1" comment="This register enables many of the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="5002000c" rw_flags="RW" width="1" name="CLKGEN_PP_ENABLES_I1" comment="This register enables processor platform clocks. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50020010" rw_flags="RW" width="2" name="CLKGEN_WL_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN specific clocks"/>
+ <register addr="50020014" rw_flags="RW" width="2" name="CLKGEN_BB_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN baseband specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="50020018" rw_flags="RW" width="1" name="CLKGEN_LDPC_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with LDPC specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="5002001c" rw_flags="RW" width="1" name="CLKGEN_CLKMAC_SLEEP_CONFIG_I1" comment="This register selects which of the clock requests and the Mac Activity input are capable of forcing the Clk20MRadio clock to be active. This could be useful to software in controlling sleep modes for the Mac Accelerator."/>
+ <register addr="50020020" rw_flags="R" width="2" name="CLKGEN_STATUS_I1" comment="This register returns the instantaneous status of the various deep sleep wakeup sources, along with the deep sleep mode bit and the status of the slow clock"/>
+ <register addr="50020024" rw_flags="RW" width="4" name="CLKGEN_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50020028" rw_flags="RW" width="2" name="CLKGEN_BB_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="5002002c" rw_flags="RW" width="1" name="CLKGEN_LDPC_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50020030" rw_flags="R" width="2" name="CLKGEN_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50020034" rw_flags="R" width="2" name="CLKGEN_BB_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50020038" rw_flags="R" width="1" name="CLKGEN_LDPC_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="5002003c" rw_flags="RW" width="1" name="CLKGEN_VITERBI_PRESCALE_CFG_I1" comment="Register to set 480MHz clock prescaling before it is used to create Viterbi clock. Prescaled clock would be 480, 240, 120 and 80 MHz when set to 1, 2, 3 and 4 respectfully. Recommended settings are SISO 1, 1, 2 and 4 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 1, 1, 3, 4 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 1."/>
+ <register addr="50020040" rw_flags="RW" width="1" name="CLKGEN_VITERBI_SCALE_CFG_I1" comment="Register to divide prescaled 480MHz clock to create Viterbi clock. The scaling value applied is (Register Value + 1)/8. Recommended settings are SISO 5, 5, 5 and 7 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 7, 7, 7, 6 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 4."/>
+ </block>
+ <block name="phy_dfe" comment="">
+ <register addr="50030000" rw_flags="RW" width="4" name="DFE_RX_CONFIG[0]" comment="Rx configuration bits"/>
+ <register addr="50030004" rw_flags="R" width="4" name="DFE_RX_STATUS[0]" comment="Rx status bits per channel"/>
+ <register addr="50030008" rw_flags="RW" width="1" name="DFE_RX_LNA_PHASE_COMP_CONFIG1[0]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="5003000c" rw_flags="RW" width="2" name="DFE_RX_LNA_PHASE_COMP_CONFIG2[0]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030010" rw_flags="RW" width="2" name="DFE_RX_NOTCH_CONFIG[0]" comment="This register configures the two notch filters in each of the receive chains. The lower 5 bits configure the OFDM filter and the next 5 bits the CCK filter. The MSB enables the notch filter in front of the rx_ctrl module"/>
+ <register addr="50030014" rw_flags="RW" width="2" name="DFE_RX_NOTCH_PRELOAD[0]" comment="This is the value loaded into the memory element of the notch filters if requested"/>
+ <register addr="50030018" rw_flags="RW" width="2" name="DFE_SIGANAL_CONFIG[0]" comment="This register configures the signal analyser"/>
+ <register addr="5003001c" rw_flags="RW" width="2" name="DFE_SIGANAL_FREQ[0]" comment="This sets the frequency of the tone used by the signal analyser. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000.This sets the frequency of the tone used by the signal analyser."/>
+ <register addr="50030020" rw_flags="RW" width="1" name="DFE_RX_COMP_CONFIG1[0]" comment="This register controls phase and magnitude compensation for the receive signals in the first receive chain, and has a bit which enables frequency compensation for both receive chains."/>
+ <register addr="50030024" rw_flags="RW" width="2" name="DFE_RX_COMP_CONFIG2[0]" comment="Configuration parameters for the averaging block in the Rx IQ Compensation measurement block"/>
+ <register addr="50030028" rw_flags="RW" width="2" name="DFE_RX_COMP_DELAY_CONFIG[0]" comment="This register controls the receiver delay compensation parameters"/>
+ <register addr="5003002c" rw_flags="RW" width="2" name="DFE_RX_COMP_PHASE_CONFIG[0]" comment="Configuration for receiver phase compensation"/>
+ <register addr="50030030" rw_flags="RW" width="2" name="DFE_RX_COMP_AMPL_CONFIG[0]" comment="Configuration for receiver amplitude compensation"/>
+ <register addr="50030034" rw_flags="R" width="2" name="DFE_RX_COMP_AUTO_COEFFS[0]" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the DFE_RX_COMP_LUT_READ_EN bit in the DFE_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50030038" rw_flags="R" width="1" name="DFE_RX_PHASE_COMP_LUT_STATUS[0]" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="5003003c" rw_flags="R" width="1" name="DFE_RX_AMPL_COMP_LUT_STATUS[0]" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="50030040" rw_flags="R" width="4" name="DFE_SIGANAL_I_POSITIVE_OUTPUT[0]" comment="This contains the I value generated by the positive frequency signal analyser"/>
+ <register addr="50030044" rw_flags="R" width="4" name="DFE_SIGANAL_Q_POSITIVE_OUTPUT[0]" comment="This contains the Q value generated by the positive frequency signal analyser"/>
+ <register addr="50030048" rw_flags="R" width="4" name="DFE_SIGANAL_I_NEGATIVE_OUTPUT[0]" comment="This contains the I value generated by the negative frequency signal analyser"/>
+ <register addr="5003004c" rw_flags="R" width="4" name="DFE_SIGANAL_Q_NEGATIVE_OUTPUT[0]" comment="This contains the Q value generated by the negative frequency signal analyser"/>
+ <register addr="50030050" rw_flags="R" width="1" name="DFE_SIGANAL_RSSI[0]" comment="This register contains the RSSI too loud indicati ons collected while the signal analyser was running. Bits set in this register mean that the corresponding signal analyser output may be unreliable"/>
+ <register addr="50030054" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_CONTROL[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030058" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_HDRLEN[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003005c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI0[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030060" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ0[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030064" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI1[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030068" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ1[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003006c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI2[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030070" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ2[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030074" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI3[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030078" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ3[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003007c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI4[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030080" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ4[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030084" rw_flags="RW" width="4" name="DFE_RX_CONFIG[1]" comment="Rx configuration bits"/>
+ <register addr="50030088" rw_flags="R" width="4" name="DFE_RX_STATUS[1]" comment="Rx status bits per channel"/>
+ <register addr="5003008c" rw_flags="RW" width="1" name="DFE_RX_LNA_PHASE_COMP_CONFIG1[1]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030090" rw_flags="RW" width="2" name="DFE_RX_LNA_PHASE_COMP_CONFIG2[1]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030094" rw_flags="RW" width="2" name="DFE_RX_NOTCH_CONFIG[1]" comment="This register configures the two notch filters in each of the receive chains. The lower 5 bits configure the OFDM filter and the next 5 bits the CCK filter. The MSB enables the notch filter in front of the rx_ctrl module"/>
+ <register addr="50030098" rw_flags="RW" width="2" name="DFE_RX_NOTCH_PRELOAD[1]" comment="This is the value loaded into the memory element of the notch filters if requested"/>
+ <register addr="5003009c" rw_flags="RW" width="2" name="DFE_SIGANAL_CONFIG[1]" comment="This register configures the signal analyser"/>
+ <register addr="500300a0" rw_flags="RW" width="2" name="DFE_SIGANAL_FREQ[1]" comment="This sets the frequency of the tone used by the signal analyser. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000.This sets the frequency of the tone used by the signal analyser."/>
+ <register addr="500300a4" rw_flags="RW" width="1" name="DFE_RX_COMP_CONFIG1[1]" comment="This register controls phase and magnitude compensation for the receive signals in the first receive chain, and has a bit which enables frequency compensation for both receive chains."/>
+ <register addr="500300a8" rw_flags="RW" width="2" name="DFE_RX_COMP_CONFIG2[1]" comment="Configuration parameters for the averaging block in the Rx IQ Compensation measurement block"/>
+ <register addr="500300ac" rw_flags="RW" width="2" name="DFE_RX_COMP_DELAY_CONFIG[1]" comment="This register controls the receiver delay compensation parameters"/>
+ <register addr="500300b0" rw_flags="RW" width="2" name="DFE_RX_COMP_PHASE_CONFIG[1]" comment="Configuration for receiver phase compensation"/>
+ <register addr="500300b4" rw_flags="RW" width="2" name="DFE_RX_COMP_AMPL_CONFIG[1]" comment="Configuration for receiver amplitude compensation"/>
+ <register addr="500300b8" rw_flags="R" width="2" name="DFE_RX_COMP_AUTO_COEFFS[1]" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the DFE_RX_COMP_LUT_READ_EN bit in the DFE_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="500300bc" rw_flags="R" width="1" name="DFE_RX_PHASE_COMP_LUT_STATUS[1]" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="500300c0" rw_flags="R" width="1" name="DFE_RX_AMPL_COMP_LUT_STATUS[1]" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="500300c4" rw_flags="R" width="4" name="DFE_SIGANAL_I_POSITIVE_OUTPUT[1]" comment="This contains the I value generated by the positive frequency signal analyser"/>
+ <register addr="500300c8" rw_flags="R" width="4" name="DFE_SIGANAL_Q_POSITIVE_OUTPUT[1]" comment="This contains the Q value generated by the positive frequency signal analyser"/>
+ <register addr="500300cc" rw_flags="R" width="4" name="DFE_SIGANAL_I_NEGATIVE_OUTPUT[1]" comment="This contains the I value generated by the negative frequency signal analyser"/>
+ <register addr="500300d0" rw_flags="R" width="4" name="DFE_SIGANAL_Q_NEGATIVE_OUTPUT[1]" comment="This contains the Q value generated by the negative frequency signal analyser"/>
+ <register addr="500300d4" rw_flags="R" width="1" name="DFE_SIGANAL_RSSI[1]" comment="This register contains the RSSI too loud indicati ons collected while the signal analyser was running. Bits set in this register mean that the corresponding signal analyser output may be unreliable"/>
+ <register addr="500300d8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_CONTROL[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300dc" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_HDRLEN[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e0" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI0[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e4" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ0[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI1[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300ec" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ1[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f0" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI2[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f4" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ2[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI3[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300fc" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ3[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030100" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI4[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030104" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ4[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030108" rw_flags="RW" width="1" name="DFE_SIGGEN_ENABLE" comment="bit N = 1 : Signal Generator N is Enabled "/>
+ <register addr="5003010c" rw_flags="RW" width="4" name="DFE_SIGGEN_CONFIG[0]" comment="Register to control operation of the internal signal generator. SigGen must be enabled in DFE_SIGGEN_ENABLE to start"/>
+ <register addr="50030110" rw_flags="RW" width="2" name="DFE_SIGGEN_CONFIG2[0]" comment="Register to control operation of the internal signal generator- logical extension of DFE_SIGGEN_CONFIG"/>
+ <register addr="50030114" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ1[0]" comment="This sets the frequency of the primary (only) tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000."/>
+ <register addr="50030118" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ2[0]" comment="This sets the frequency of the secondary tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000"/>
+ <register addr="5003011c" rw_flags="RW" width="2" name="DFE_SIGGEN_PHASE[0]" comment="This register has two functions: it is the value preloaded into the accumulator used to generate the first tone, so can set the phase of that tone relative to the second tone or the signal analyser tone. Also, it is used to provide the DC level in that mode of operation"/>
+ <register addr="50030120" rw_flags="RW" width="4" name="DFE_SIGGEN_CONFIG[1]" comment="Register to control operation of the internal signal generator. SigGen must be enabled in DFE_SIGGEN_ENABLE to start"/>
+ <register addr="50030124" rw_flags="RW" width="2" name="DFE_SIGGEN_CONFIG2[1]" comment="Register to control operation of the internal signal generator- logical extension of DFE_SIGGEN_CONFIG"/>
+ <register addr="50030128" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ1[1]" comment="This sets the frequency of the primary (only) tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000."/>
+ <register addr="5003012c" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ2[1]" comment="This sets the frequency of the secondary tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000"/>
+ <register addr="50030130" rw_flags="RW" width="2" name="DFE_SIGGEN_PHASE[1]" comment="This register has two functions: it is the value preloaded into the accumulator used to generate the first tone, so can set the phase of that tone relative to the second tone or the signal analyser tone. Also, it is used to provide the DC level in that mode of operation"/>
+ <register addr="50030134" rw_flags="RW" width="1" name="DFE_TX_CONFIG[0]" comment="Rx configuration bits"/>
+ <register addr="50030138" rw_flags="RW" width="2" name="DFE_TX_COMP_LP_SCALE_CONFIG[0]" comment="This register contains the Low Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="5003013c" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_SCALE_CONFIG[0]" comment="This register contains the High Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030140" rw_flags="RW" width="4" name="DFE_TX_COMP_LP_OFFSET_CONFIG[0]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - low power mode"/>
+ <register addr="50030144" rw_flags="RW" width="2" name="DFE_TX_COMP_PHASE_CONFIG[0]" comment="Additional Tx compensation value used for phase imbalance correction"/>
+ <register addr="50030148" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_OFFSET_CONFIG[0]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - high power mode"/>
+ <register addr="5003014c" rw_flags="RW" width="1" name="DFE_TX_COMP_DELAY_CONFIG[0]" comment="This register controls the transmit delay compensation parameters"/>
+ <register addr="50030150" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][0]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030154" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][1]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030158" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][2]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003015c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][3]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030160" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][4]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030164" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][5]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030168" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][6]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003016c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][7]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030170" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][8]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030174" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][9]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030178" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][10]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003017c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][11]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030180" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][12]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030184" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][13]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030188" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][14]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003018c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][15]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030190" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][16]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030194" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][17]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030198" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][18]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003019c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][19]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][20]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][21]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][22]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301ac" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][23]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301b0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301b4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301b8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301bc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301cc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301dc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e0" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e4" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e8" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301ec" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f0" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f4" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f8" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301fc" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030200" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030204" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030208" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003020c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030210" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG1[0]" comment="Predist Mode and block enables, LutWr and LutRd Config Register"/>
+ <register addr="50030214" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG2[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030218" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG3[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003021c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG4[0]" comment="Predistortion OFDM0 Config"/>
+ <register addr="50030220" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG5[0]" comment="Predistortion OFDM1 Config"/>
+ <register addr="50030224" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG6[0]" comment="Predistortion Mode CCK Config"/>
+ <register addr="50030228" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG7[0]" comment="Training Mode Config1"/>
+ <register addr="5003022c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG8[0]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030230" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG9[0]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030234" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG10[0]" comment="Predistortion - Feedback FIR Filter Config1"/>
+ <register addr="50030238" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG11[0]" comment="Predistortion - Feedback FIR Filter Config2"/>
+ <register addr="5003023c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG12[0]" comment="Predistortion - Feedback Notch Mode Config1"/>
+ <register addr="50030240" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG13[0]" comment="Predistortion - Feedback Notch Mode Config2"/>
+ <register addr="50030244" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG14[0]" comment="Predistortion - Feedback Signal Power Config"/>
+ <register addr="50030248" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG15[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="5003024c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG16[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030250" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG17[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030254" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG18[0]" comment="DPD Interpolator gain,force enable control register"/>
+ <register addr="50030258" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG19[0]" comment="DPD Training force enable control register"/>
+ <register addr="5003025c" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS1[0]" comment="Predistortion - Output DC Bias and FIR Register"/>
+ <register addr="50030260" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS2[0]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="50030264" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS3[0]" comment="Predistortion - Debug Register"/>
+ <register addr="50030268" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_RE[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003026c" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_IM[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030270" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS5[0]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="50030274" rw_flags="R" width="2" name="DFE_TX_PREDIST_STATUS6[0]" comment="Training sequence read register 1"/>
+ <register addr="50030278" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS7[0]" comment="Training sequece read register2"/>
+ <register addr="5003027c" rw_flags="RW" width="1" name="DFE_TX_CONFIG[1]" comment="Rx configuration bits"/>
+ <register addr="50030280" rw_flags="RW" width="2" name="DFE_TX_COMP_LP_SCALE_CONFIG[1]" comment="This register contains the Low Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030284" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_SCALE_CONFIG[1]" comment="This register contains the High Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030288" rw_flags="RW" width="4" name="DFE_TX_COMP_LP_OFFSET_CONFIG[1]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - low power mode"/>
+ <register addr="5003028c" rw_flags="RW" width="2" name="DFE_TX_COMP_PHASE_CONFIG[1]" comment="Additional Tx compensation value used for phase imbalance correction"/>
+ <register addr="50030290" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_OFFSET_CONFIG[1]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - high power mode"/>
+ <register addr="50030294" rw_flags="RW" width="1" name="DFE_TX_COMP_DELAY_CONFIG[1]" comment="This register controls the transmit delay compensation parameters"/>
+ <register addr="50030298" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][0]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003029c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][1]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][2]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][3]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][4]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302ac" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][5]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][6]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][7]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][8]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302bc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][9]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][10]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][11]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][12]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302cc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][13]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][14]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][15]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][16]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302dc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][17]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][18]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][19]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][20]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302ec" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][21]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][22]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][23]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500302fc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030300" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030304" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030308" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003030c" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030310" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030314" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030318" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003031c" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030320" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030324" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030328" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003032c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030330" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030334" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030338" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003033c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030340" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030344" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030348" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003034c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030350" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030354" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030358" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG1[1]" comment="Predist Mode and block enables, LutWr and LutRd Config Register"/>
+ <register addr="5003035c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG2[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030360" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG3[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030364" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG4[1]" comment="Predistortion OFDM0 Config"/>
+ <register addr="50030368" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG5[1]" comment="Predistortion OFDM1 Config"/>
+ <register addr="5003036c" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG6[1]" comment="Predistortion Mode CCK Config"/>
+ <register addr="50030370" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG7[1]" comment="Training Mode Config1"/>
+ <register addr="50030374" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG8[1]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030378" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG9[1]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="5003037c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG10[1]" comment="Predistortion - Feedback FIR Filter Config1"/>
+ <register addr="50030380" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG11[1]" comment="Predistortion - Feedback FIR Filter Config2"/>
+ <register addr="50030384" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG12[1]" comment="Predistortion - Feedback Notch Mode Config1"/>
+ <register addr="50030388" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG13[1]" comment="Predistortion - Feedback Notch Mode Config2"/>
+ <register addr="5003038c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG14[1]" comment="Predistortion - Feedback Signal Power Config"/>
+ <register addr="50030390" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG15[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030394" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG16[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030398" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG17[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003039c" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG18[1]" comment="DPD Interpolator gain,force enable control register"/>
+ <register addr="500303a0" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG19[1]" comment="DPD Training force enable control register"/>
+ <register addr="500303a4" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS1[1]" comment="Predistortion - Output DC Bias and FIR Register"/>
+ <register addr="500303a8" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS2[1]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="500303ac" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS3[1]" comment="Predistortion - Debug Register"/>
+ <register addr="500303b0" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_RE[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="500303b4" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_IM[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="500303b8" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS5[1]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="500303bc" rw_flags="R" width="2" name="DFE_TX_PREDIST_STATUS6[1]" comment="Training sequence read register 1"/>
+ <register addr="500303c0" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS7[1]" comment="Training sequece read register2"/>
+ <register addr="500303c4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF0_READ[0]" comment="READ COEFF0"/>
+ <register addr="500303c8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF1_READ[0]" comment="READ COEFF1"/>
+ <register addr="500303cc" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF2_READ[0]" comment="READ COEFF2"/>
+ <register addr="500303d0" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF3_READ[0]" comment="READ COEFF3"/>
+ <register addr="500303d4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF4_READ[0]" comment="READ COEFF4"/>
+ <register addr="500303d8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF0_READ[1]" comment="READ COEFF0"/>
+ <register addr="500303dc" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF1_READ[1]" comment="READ COEFF1"/>
+ <register addr="500303e0" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF2_READ[1]" comment="READ COEFF2"/>
+ <register addr="500303e4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF3_READ[1]" comment="READ COEFF3"/>
+ <register addr="500303e8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF4_READ[1]" comment="READ COEFF4"/>
+ </block>
+ <block name="pio_mux" comment="">
+ <register addr="53000000" rw_flags="RW" width="2" name="PIO_INVERT_ENABLES" comment="Set a bit to 1 to invert the driven output."/>
+ <register addr="53000004" rw_flags="R" width="2" name="PIO_INPUT_STATUS" comment="The PIO input status(after loopback)."/>
+ <register addr="53000008" rw_flags="R" width="2" name="PIO_OUTPUT_STATUS" comment="The PIO output status."/>
+ <register addr="5300000c" rw_flags="RW" width="2" name="PIO0_CFG" comment=""/>
+ <register addr="53000010" rw_flags="RW" width="2" name="PIO1_CFG" comment=""/>
+ <register addr="53000014" rw_flags="RW" width="2" name="PIO2_CFG" comment=""/>
+ <register addr="53000018" rw_flags="RW" width="2" name="PIO3_CFG" comment=""/>
+ <register addr="5300001c" rw_flags="RW" width="2" name="PIO4_CFG" comment=""/>
+ <register addr="53000020" rw_flags="RW" width="2" name="PIO5_CFG" comment=""/>
+ <register addr="53000024" rw_flags="RW" width="2" name="PIO6_CFG" comment=""/>
+ <register addr="53000028" rw_flags="RW" width="2" name="PIO7_CFG" comment=""/>
+ <register addr="5300002c" rw_flags="RW" width="2" name="PIO8_CFG" comment=""/>
+ <register addr="53000030" rw_flags="RW" width="2" name="PIO9_CFG" comment=""/>
+ <register addr="53000034" rw_flags="RW" width="2" name="PIO10_CFG" comment=""/>
+ <register addr="53000038" rw_flags="RW" width="2" name="PIO11_CFG" comment=""/>
+ <register addr="5300003c" rw_flags="RW" width="2" name="PIO12_CFG" comment=""/>
+ <register addr="53000040" rw_flags="RW" width="2" name="PIO13_CFG" comment=""/>
+ <register addr="53000044" rw_flags="RW" width="2" name="PIO14_CFG" comment=""/>
+ <register addr="53000048" rw_flags="RW" width="2" name="PIO15_CFG" comment=""/>
+ <register addr="5300004c" rw_flags="RW" width="4" name="DEBUG_SERIALISER_CFG" comment=""/>
+ <register addr="53000050" rw_flags="RW" width="4" name="PMU_SERIALISER_CFG" comment=""/>
+ <register addr="53000054" rw_flags="RW" width="4" name="WL_SERIALISER_CFG" comment=""/>
+ <register addr="53000058" rw_flags="RW" width="4" name="BT_SERIALISER_CFG" comment=""/>
+ <register addr="5300005c" rw_flags="RW" width="4" name="COEX_SERIALISER_CFG" comment=""/>
+ <register addr="53000060" rw_flags="RW" width="4" name="SH_PROC_SERIALISER_CFG" comment=""/>
+ <register addr="53000064" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL0_MUX_CTRL" comment=""/>
+ <register addr="53000068" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL1_MUX_CTRL" comment=""/>
+ <register addr="5300006c" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL2_MUX_CTRL" comment=""/>
+ <register addr="53000070" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL3_MUX_CTRL" comment=""/>
+ <register addr="53000074" rw_flags="RW" width="1" name="BBIC_CAPTURE_TRIG_MUX_CTRL" comment=""/>
+ <register addr="53000078" rw_flags="RW" width="4" name="DEBUG_DESERIALISER_CFG" comment="Configuration for the RFIC debug de-serialisers"/>
+ <register addr="5300007c" rw_flags="RW" width="4" name="DEBUG_DESERIALISER_CFG2" comment="Second configuration register for the RFIC debug de-serialisers"/>
+ <register addr="53000080" rw_flags="R" width="4" name="DEBUG_DESERIALISER_STATUS" comment="Status register for the RFIC debug de-serialisers"/>
+ <register addr="53000084" rw_flags="R" width="4" name="DEBUG_DESERIALISER_MONITOR" comment="Monitor register for the RFIC debug de-serialisers"/>
+ </block>
+ <block name="wl_bba_0" comment="">
+ <register addr="50040000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I0" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50040004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I0" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50040008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I0" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5004000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I0" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50040010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I0" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50040014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I0" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50040018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I0" comment="Packet transmit options."/>
+ <register addr="5004001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I0" comment="Signal field."/>
+ <register addr="50040020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I0" comment="Scan accelerator configuration."/>
+ <register addr="50040024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I0" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50040028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I0" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5004002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I0" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50040030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I0" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50040034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I0" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50040038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I0" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5004003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I0" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50040040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I0" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50040044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I0" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50040048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I0" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5004004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I0" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50040050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I0" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50040054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I0" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50040058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I0" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5004005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I0" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50040060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I0" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50040064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I0" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50040068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I0" comment="Receiver configuration"/>
+ <register addr="5004006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I0" comment="Receiver configuration"/>
+ <register addr="50040070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I0" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50040074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I0" comment="Receiver configuration"/>
+ <register addr="50040078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I0" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5004007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I0" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50040080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I0" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50040084" rw_flags="R" width="1" name="BB_STATUS_I0" comment=""/>
+ <register addr="50040088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I0" comment="Frequency offset for the last received burst"/>
+ <register addr="5004008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I0" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50040090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I0" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50040094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I0" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50040098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5004009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500400a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500400ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I0" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500400b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I0" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500400b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I0" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500400bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I0" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500400c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I0" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500400c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I0" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500400c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I0" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500400cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I0" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500400d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I0" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500400d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I0" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500400d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I0" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500400dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I0" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500400e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I0" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500400e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I0" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500400e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I0" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500400ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I0" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500400f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I0" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500400f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I0" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500400f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I0" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500400fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I0" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50040100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I0" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50040104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I0" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50040108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I0" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5004010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I0" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50040110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I0" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50040114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I0" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50040118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I0" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5004011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I0" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50040120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I0" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50040124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I0" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50040128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I0" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5004012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I0" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50040130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I0" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50040134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I0" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50040138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I0" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5004013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I0" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50040140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I0" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50040144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I0" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50040148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I0" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5004014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I0" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50040150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I0" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50040154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I0" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50040158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I0" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5004015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I0" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50040160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I0" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50040164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I0" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50040168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I0" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5004016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I0" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50040170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I0" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50040174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I0" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50040178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I0" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5004017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I0" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50040180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I0" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50040184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I0" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50040188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I0" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5004018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I0" comment="When set, apply Radio nudge again"/>
+ <register addr="50040190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I0" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50040194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I0" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50040198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I0" comment="Select the set of signals output at the debug port"/>
+ <register addr="5004019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I0" comment=""/>
+ <register addr="500401a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I0" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500401a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I0" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500401a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I0" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500401ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I0" comment="synchronizer configuration"/>
+ <register addr="500401b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I0" comment="synchronizer configuration"/>
+ <register addr="500401b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I0" comment="synchronizer configuration"/>
+ <register addr="500401b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I0" comment="synchronizer configuration"/>
+ <register addr="500401bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I0" comment="synchronizer configuration "/>
+ <register addr="500401c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I0" comment="synchronizer configuration "/>
+ <register addr="500401c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I0" comment="synchronizer configuration "/>
+ <register addr="500401c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I0" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500401cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I0" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500401d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I0" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500401d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I0" comment="synchronizer configuration "/>
+ <register addr="500401d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I0" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500401dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I0" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500401e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I0" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500401e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I0" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500401e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I0" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500401ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I0" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500401f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I0" comment=" 80MHz sync split filter"/>
+ <register addr="500401f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I0" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500401f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I0" comment="STF sync detector configuration"/>
+ <register addr="500401fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I0" comment="STF sync configuration with spare bits"/>
+ <register addr="50040200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I0" comment="Tone notch configuration"/>
+ <register addr="50040204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I0" comment="Tone notch configuration"/>
+ <register addr="50040208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I0" comment="Tone notch configuration"/>
+ <register addr="5004020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I0" comment="Tone notch configuration"/>
+ <register addr="50040210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I0" comment="STF group weight factor"/>
+ <register addr="50040214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I0" comment="STF group weight factor"/>
+ <register addr="50040218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I0" comment="CCA weighted combing sel"/>
+ <register addr="5004021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I0" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50040220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I0" comment="LTF Peak selection control"/>
+ <register addr="50040224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I0" comment="LTF peak threshold(for index7)"/>
+ <register addr="50040228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I0" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5004022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I0" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50040230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I0" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50040234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I0" comment="Beamformee CBR Length."/>
+ <register addr="50040238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I0" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5004023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I0" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50040240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I0" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50040244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I0" comment="Configuration for handling data for calibration"/>
+ <register addr="50040248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I0" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5004024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I0" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50040250" rw_flags="R" width="2" name="BB_CEST_MAX_I0" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50040254" rw_flags="R" width="1" name="BB_CEST_STATUS_I0" comment="Status information for calibration support"/>
+ <register addr="50040258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I0" comment="Channel estimate value requested"/>
+ <register addr="5004025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I0" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50040260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I0" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50040264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I0" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50040268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I0" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5004026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I0" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50040270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I0" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50040274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I0" comment="Unused register"/>
+ <register addr="50040278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I0" comment="Unused register"/>
+ <register addr="5004027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I0" comment="Unused register"/>
+ <register addr="50040280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I0" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50040284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I0" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50040288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I0" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5004028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I0" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50040290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I0" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50040294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I0" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50040298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I0" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5004029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I0" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500402a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I0" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500402a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I0" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500402a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I0" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500402ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I0" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500402b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I0" comment="QAM1024 Support Enable"/>
+ <register addr="500402b4" rw_flags="RW" width="2" name="BB_CHDET_I0" comment="Channel Type Detection"/>
+ <register addr="500402b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I0" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500402bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I0" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500402c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I0" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500402c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I0" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500402c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I0" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500402cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I0" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500402d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I0" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500402d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I0" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500402d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I0" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500402dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I0" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500402e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I0" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500402e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I0" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500402e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I0" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500402ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I0" comment="Payload Detector enables."/>
+ <register addr="500402f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I0" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I0" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I0" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I0" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I0" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I0" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I0" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5004030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I0" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I0" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50040314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I0" comment="MLD Configuration registers"/>
+ <register addr="50040318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I0" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5004031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I0" comment="TX beamforming configuration."/>
+ <register addr="50040320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I0" comment="TX beamforming configuration #2."/>
+ <register addr="50040324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I0" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50040328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I0" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5004032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I0" comment="This register is used to read the angle store data."/>
+ <register addr="50040330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I0" comment="This register is used to control smoothing"/>
+ <register addr="50040334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I0" comment="LDPC configuration"/>
+ <register addr="50040338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I0" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5004033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I0" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50040340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I0" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50040344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I0" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50040348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I0" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5004034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I0" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50040350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I0" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50040354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I0" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50040358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I0" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5004035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I0" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50040360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I0" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50040364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I0" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50040368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I0" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5004036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I0" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50040370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I0" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50040374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I0" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50040378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I0" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5004037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I0" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50040410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I0" comment="Linear phase estimation configuration"/>
+ <register addr="50040414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I0" comment="BB DD CPE configuration"/>
+ <register addr="50040418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I0" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5004041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I0" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50040420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50040424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50040428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5004042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5004043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50040440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50040444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I0" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50040448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I0" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5004044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I0" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50040450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I0" comment="Misc Internal signal status"/>
+ <register addr="50040454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I0" comment="Membership status array"/>
+ <register addr="50040458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I0" comment="Membership status array"/>
+ <register addr="5004045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I0" comment="User Position Array 2 bits"/>
+ <register addr="5004046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I0" comment="NDP Decision Method Control"/>
+ <register addr="50040470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I0" comment="Config for PAPR module"/>
+ <register addr="50040474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I0" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50040478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I0" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5004047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I0" comment="SWED PAPR Configuration"/>
+ <register addr="50040480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I0" comment="Configuration for direction finder"/>
+ <register addr="50040484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I0" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50040488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I0" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5004048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I0" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50040490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I0" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50040494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I0" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50040498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I0" comment="EVM Sig. EN"/>
+ <register addr="5004049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I0" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bba_1" comment="">
+ <register addr="50050000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I1" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50050004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I1" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50050008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I1" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5005000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I1" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50050010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I1" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50050014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I1" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50050018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I1" comment="Packet transmit options."/>
+ <register addr="5005001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I1" comment="Signal field."/>
+ <register addr="50050020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I1" comment="Scan accelerator configuration."/>
+ <register addr="50050024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I1" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50050028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I1" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5005002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I1" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50050030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I1" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50050034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I1" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50050038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I1" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5005003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I1" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50050040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I1" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50050044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I1" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50050048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I1" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5005004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I1" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50050050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I1" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50050054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I1" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50050058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I1" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5005005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I1" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50050060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I1" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50050064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I1" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50050068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I1" comment="Receiver configuration"/>
+ <register addr="5005006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I1" comment="Receiver configuration"/>
+ <register addr="50050070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I1" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50050074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I1" comment="Receiver configuration"/>
+ <register addr="50050078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I1" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5005007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I1" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50050080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I1" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50050084" rw_flags="R" width="1" name="BB_STATUS_I1" comment=""/>
+ <register addr="50050088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I1" comment="Frequency offset for the last received burst"/>
+ <register addr="5005008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I1" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50050090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I1" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50050094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I1" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50050098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5005009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500500a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500500ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I1" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500500b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I1" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500500b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I1" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500500bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I1" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500500c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I1" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500500c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I1" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500500c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I1" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500500cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I1" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500500d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I1" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500500d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I1" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500500d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I1" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500500dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I1" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500500e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I1" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500500e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I1" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500500e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I1" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500500ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I1" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500500f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I1" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500500f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I1" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500500f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I1" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500500fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I1" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50050100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I1" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50050104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I1" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50050108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I1" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5005010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I1" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50050110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I1" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50050114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I1" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50050118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I1" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5005011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I1" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50050120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I1" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50050124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I1" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50050128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I1" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5005012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I1" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50050130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I1" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50050134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I1" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50050138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I1" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5005013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I1" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50050140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I1" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50050144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I1" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50050148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I1" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5005014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I1" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50050150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I1" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50050154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I1" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50050158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I1" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5005015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I1" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50050160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I1" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50050164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I1" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50050168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I1" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5005016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I1" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50050170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I1" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50050174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I1" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50050178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I1" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5005017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I1" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50050180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I1" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50050184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I1" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50050188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I1" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5005018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I1" comment="When set, apply Radio nudge again"/>
+ <register addr="50050190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I1" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50050194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I1" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50050198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I1" comment="Select the set of signals output at the debug port"/>
+ <register addr="5005019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I1" comment=""/>
+ <register addr="500501a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I1" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500501a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I1" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500501a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I1" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500501ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I1" comment="synchronizer configuration"/>
+ <register addr="500501b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I1" comment="synchronizer configuration"/>
+ <register addr="500501b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I1" comment="synchronizer configuration"/>
+ <register addr="500501b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I1" comment="synchronizer configuration"/>
+ <register addr="500501bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I1" comment="synchronizer configuration "/>
+ <register addr="500501c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I1" comment="synchronizer configuration "/>
+ <register addr="500501c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I1" comment="synchronizer configuration "/>
+ <register addr="500501c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I1" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500501cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I1" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500501d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I1" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500501d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I1" comment="synchronizer configuration "/>
+ <register addr="500501d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I1" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500501dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I1" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500501e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I1" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500501e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I1" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500501e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I1" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500501ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I1" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500501f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I1" comment=" 80MHz sync split filter"/>
+ <register addr="500501f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I1" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500501f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I1" comment="STF sync detector configuration"/>
+ <register addr="500501fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I1" comment="STF sync configuration with spare bits"/>
+ <register addr="50050200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I1" comment="Tone notch configuration"/>
+ <register addr="50050204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I1" comment="Tone notch configuration"/>
+ <register addr="50050208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I1" comment="Tone notch configuration"/>
+ <register addr="5005020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I1" comment="Tone notch configuration"/>
+ <register addr="50050210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I1" comment="STF group weight factor"/>
+ <register addr="50050214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I1" comment="STF group weight factor"/>
+ <register addr="50050218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I1" comment="CCA weighted combing sel"/>
+ <register addr="5005021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I1" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50050220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I1" comment="LTF Peak selection control"/>
+ <register addr="50050224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I1" comment="LTF peak threshold(for index7)"/>
+ <register addr="50050228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I1" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5005022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I1" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50050230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I1" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50050234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I1" comment="Beamformee CBR Length."/>
+ <register addr="50050238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I1" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5005023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I1" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50050240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I1" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50050244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I1" comment="Configuration for handling data for calibration"/>
+ <register addr="50050248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I1" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5005024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I1" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50050250" rw_flags="R" width="2" name="BB_CEST_MAX_I1" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50050254" rw_flags="R" width="1" name="BB_CEST_STATUS_I1" comment="Status information for calibration support"/>
+ <register addr="50050258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I1" comment="Channel estimate value requested"/>
+ <register addr="5005025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I1" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50050260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I1" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50050264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I1" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50050268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I1" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5005026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I1" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50050270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I1" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50050274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I1" comment="Unused register"/>
+ <register addr="50050278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I1" comment="Unused register"/>
+ <register addr="5005027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I1" comment="Unused register"/>
+ <register addr="50050280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I1" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50050284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I1" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50050288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I1" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5005028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I1" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50050290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I1" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50050294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I1" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50050298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I1" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5005029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I1" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500502a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I1" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500502a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I1" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500502a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I1" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500502ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I1" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500502b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I1" comment="QAM1024 Support Enable"/>
+ <register addr="500502b4" rw_flags="RW" width="2" name="BB_CHDET_I1" comment="Channel Type Detection"/>
+ <register addr="500502b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I1" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500502bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I1" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500502c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I1" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500502c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I1" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500502c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I1" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500502cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I1" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500502d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I1" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500502d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I1" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500502d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I1" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500502dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I1" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500502e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I1" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500502e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I1" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500502e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I1" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500502ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I1" comment="Payload Detector enables."/>
+ <register addr="500502f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I1" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I1" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I1" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I1" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I1" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I1" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I1" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5005030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I1" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I1" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50050314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I1" comment="MLD Configuration registers"/>
+ <register addr="50050318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I1" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5005031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I1" comment="TX beamforming configuration."/>
+ <register addr="50050320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I1" comment="TX beamforming configuration #2."/>
+ <register addr="50050324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I1" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50050328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I1" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5005032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I1" comment="This register is used to read the angle store data."/>
+ <register addr="50050330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I1" comment="This register is used to control smoothing"/>
+ <register addr="50050334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I1" comment="LDPC configuration"/>
+ <register addr="50050338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I1" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5005033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I1" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50050340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I1" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50050344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I1" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50050348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I1" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5005034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I1" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50050350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I1" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50050354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I1" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50050358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I1" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5005035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I1" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50050360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I1" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50050364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I1" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50050368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I1" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5005036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I1" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50050370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I1" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50050374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I1" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50050378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I1" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5005037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I1" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50050410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I1" comment="Linear phase estimation configuration"/>
+ <register addr="50050414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I1" comment="BB DD CPE configuration"/>
+ <register addr="50050418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I1" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5005041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I1" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50050420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50050424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50050428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5005042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5005043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50050440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50050444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I1" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50050448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I1" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5005044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I1" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50050450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I1" comment="Misc Internal signal status"/>
+ <register addr="50050454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I1" comment="Membership status array"/>
+ <register addr="50050458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I1" comment="Membership status array"/>
+ <register addr="5005045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I1" comment="User Position Array 2 bits"/>
+ <register addr="5005046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I1" comment="NDP Decision Method Control"/>
+ <register addr="50050470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I1" comment="Config for PAPR module"/>
+ <register addr="50050474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I1" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50050478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I1" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5005047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I1" comment="SWED PAPR Configuration"/>
+ <register addr="50050480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I1" comment="Configuration for direction finder"/>
+ <register addr="50050484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I1" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50050488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I1" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5005048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I1" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50050490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I1" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50050494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I1" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50050498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I1" comment="EVM Sig. EN"/>
+ <register addr="5005049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I1" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bba_2" comment="">
+ <register addr="50060000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I2" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50060004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I2" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50060008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I2" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5006000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I2" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50060010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I2" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50060014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I2" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50060018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I2" comment="Packet transmit options."/>
+ <register addr="5006001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I2" comment="Signal field."/>
+ <register addr="50060020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I2" comment="Scan accelerator configuration."/>
+ <register addr="50060024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I2" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50060028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I2" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5006002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I2" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50060030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I2" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50060034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I2" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50060038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I2" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5006003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I2" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50060040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I2" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50060044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I2" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50060048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I2" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5006004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I2" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50060050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I2" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50060054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I2" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50060058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I2" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5006005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I2" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50060060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I2" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50060064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I2" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50060068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I2" comment="Receiver configuration"/>
+ <register addr="5006006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I2" comment="Receiver configuration"/>
+ <register addr="50060070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I2" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50060074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I2" comment="Receiver configuration"/>
+ <register addr="50060078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I2" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5006007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I2" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50060080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I2" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50060084" rw_flags="R" width="1" name="BB_STATUS_I2" comment=""/>
+ <register addr="50060088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I2" comment="Frequency offset for the last received burst"/>
+ <register addr="5006008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I2" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50060090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I2" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50060094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I2" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50060098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5006009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500600a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500600ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I2" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500600b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I2" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500600b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I2" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500600bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I2" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500600c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I2" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500600c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I2" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500600c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I2" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500600cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I2" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500600d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I2" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500600d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I2" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500600d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I2" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500600dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I2" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500600e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I2" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500600e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I2" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500600e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I2" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500600ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I2" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500600f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I2" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500600f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I2" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500600f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I2" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500600fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I2" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50060100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I2" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50060104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I2" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50060108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I2" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5006010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I2" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50060110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I2" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50060114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I2" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50060118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I2" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5006011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I2" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50060120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I2" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50060124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I2" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50060128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I2" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5006012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I2" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50060130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I2" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50060134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I2" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50060138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I2" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5006013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I2" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50060140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I2" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50060144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I2" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50060148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I2" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5006014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I2" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50060150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I2" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50060154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I2" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50060158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I2" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5006015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I2" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50060160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I2" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50060164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I2" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50060168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I2" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5006016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I2" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50060170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I2" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50060174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I2" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50060178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I2" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5006017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I2" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50060180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I2" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50060184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I2" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50060188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I2" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5006018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I2" comment="When set, apply Radio nudge again"/>
+ <register addr="50060190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I2" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50060194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I2" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50060198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I2" comment="Select the set of signals output at the debug port"/>
+ <register addr="5006019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I2" comment=""/>
+ <register addr="500601a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I2" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500601a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I2" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500601a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I2" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500601ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I2" comment="synchronizer configuration"/>
+ <register addr="500601b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I2" comment="synchronizer configuration"/>
+ <register addr="500601b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I2" comment="synchronizer configuration"/>
+ <register addr="500601b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I2" comment="synchronizer configuration"/>
+ <register addr="500601bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I2" comment="synchronizer configuration "/>
+ <register addr="500601c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I2" comment="synchronizer configuration "/>
+ <register addr="500601c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I2" comment="synchronizer configuration "/>
+ <register addr="500601c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I2" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500601cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I2" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500601d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I2" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500601d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I2" comment="synchronizer configuration "/>
+ <register addr="500601d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I2" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500601dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I2" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500601e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I2" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500601e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I2" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500601e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I2" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500601ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I2" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500601f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I2" comment=" 80MHz sync split filter"/>
+ <register addr="500601f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I2" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500601f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I2" comment="STF sync detector configuration"/>
+ <register addr="500601fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I2" comment="STF sync configuration with spare bits"/>
+ <register addr="50060200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I2" comment="Tone notch configuration"/>
+ <register addr="50060204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I2" comment="Tone notch configuration"/>
+ <register addr="50060208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I2" comment="Tone notch configuration"/>
+ <register addr="5006020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I2" comment="Tone notch configuration"/>
+ <register addr="50060210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I2" comment="STF group weight factor"/>
+ <register addr="50060214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I2" comment="STF group weight factor"/>
+ <register addr="50060218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I2" comment="CCA weighted combing sel"/>
+ <register addr="5006021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I2" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50060220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I2" comment="LTF Peak selection control"/>
+ <register addr="50060224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I2" comment="LTF peak threshold(for index7)"/>
+ <register addr="50060228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I2" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5006022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I2" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50060230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I2" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50060234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I2" comment="Beamformee CBR Length."/>
+ <register addr="50060238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I2" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5006023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I2" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50060240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I2" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50060244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I2" comment="Configuration for handling data for calibration"/>
+ <register addr="50060248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I2" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5006024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I2" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50060250" rw_flags="R" width="2" name="BB_CEST_MAX_I2" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50060254" rw_flags="R" width="1" name="BB_CEST_STATUS_I2" comment="Status information for calibration support"/>
+ <register addr="50060258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I2" comment="Channel estimate value requested"/>
+ <register addr="5006025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I2" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50060260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I2" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50060264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I2" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50060268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I2" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5006026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I2" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50060270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I2" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50060274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I2" comment="Unused register"/>
+ <register addr="50060278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I2" comment="Unused register"/>
+ <register addr="5006027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I2" comment="Unused register"/>
+ <register addr="50060280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I2" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50060284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I2" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50060288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I2" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5006028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I2" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50060290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I2" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50060294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I2" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50060298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I2" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5006029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I2" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500602a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I2" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500602a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I2" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500602a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I2" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500602ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I2" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500602b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I2" comment="QAM1024 Support Enable"/>
+ <register addr="500602b4" rw_flags="RW" width="2" name="BB_CHDET_I2" comment="Channel Type Detection"/>
+ <register addr="500602b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I2" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500602bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I2" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500602c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I2" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500602c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I2" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500602c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I2" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500602cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I2" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500602d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I2" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500602d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I2" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500602d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I2" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500602dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I2" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500602e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I2" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500602e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I2" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500602e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I2" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500602ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I2" comment="Payload Detector enables."/>
+ <register addr="500602f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I2" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I2" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I2" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I2" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I2" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I2" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I2" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5006030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I2" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I2" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50060314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I2" comment="MLD Configuration registers"/>
+ <register addr="50060318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I2" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5006031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I2" comment="TX beamforming configuration."/>
+ <register addr="50060320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I2" comment="TX beamforming configuration #2."/>
+ <register addr="50060324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I2" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50060328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I2" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5006032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I2" comment="This register is used to read the angle store data."/>
+ <register addr="50060330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I2" comment="This register is used to control smoothing"/>
+ <register addr="50060334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I2" comment="LDPC configuration"/>
+ <register addr="50060338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I2" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5006033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I2" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50060340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I2" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50060344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I2" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50060348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I2" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5006034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I2" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50060350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I2" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50060354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I2" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50060358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I2" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5006035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I2" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50060360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I2" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50060364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I2" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50060368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I2" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5006036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I2" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50060370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I2" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50060374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I2" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50060378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I2" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5006037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I2" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50060410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I2" comment="Linear phase estimation configuration"/>
+ <register addr="50060414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I2" comment="BB DD CPE configuration"/>
+ <register addr="50060418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I2" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5006041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I2" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50060420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50060424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50060428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5006042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5006043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50060440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50060444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I2" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50060448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I2" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5006044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I2" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50060450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I2" comment="Misc Internal signal status"/>
+ <register addr="50060454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I2" comment="Membership status array"/>
+ <register addr="50060458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I2" comment="Membership status array"/>
+ <register addr="5006045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I2" comment="User Position Array 2 bits"/>
+ <register addr="5006046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I2" comment="NDP Decision Method Control"/>
+ <register addr="50060470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I2" comment="Config for PAPR module"/>
+ <register addr="50060474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I2" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50060478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I2" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5006047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I2" comment="SWED PAPR Configuration"/>
+ <register addr="50060480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I2" comment="Configuration for direction finder"/>
+ <register addr="50060484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I2" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50060488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I2" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5006048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I2" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50060490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I2" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50060494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I2" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50060498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I2" comment="EVM Sig. EN"/>
+ <register addr="5006049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I2" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bbb" comment="">
+ <register addr="50070000" rw_flags="R" width="2" name="BBB_TX_BURST_START_STATUS" comment=""/>
+ <register addr="50070004" rw_flags="R" width="1" name="BBB_TX_PREAMB_TYPE_STATUS" comment=""/>
+ <register addr="50070008" rw_flags="R" width="1" name="BBB_TX_BURST_RATE_STATUS" comment="Transmit burst status information: rate and duplicate mode config for DSSS/CCK (a non-standard feature)"/>
+ <register addr="5007000c" rw_flags="R" width="2" name="BBB_TX_BURST_LEN_STATUS" comment=""/>
+ <register addr="50070010" rw_flags="R" width="2" name="BBB_TX_BURST_OPTIONS_STATUS" comment="Packet transmit options."/>
+ <register addr="50070014" rw_flags="R" width="2" name="BBB_TX_BURST_SCAN_CONFIG_STATUS" comment="Scan accelerator configuration."/>
+ <register addr="50070018" rw_flags="RW" width="1" name="BBB_TX_PKT_CONFIG" comment=""/>
+ <register addr="5007001c" rw_flags="RW" width="2" name="BBB_TX_MOD_CONFIG" comment=""/>
+ <register addr="50070020" rw_flags="RW" width="2" name="BBB_TX_FILTER_CONFIG" comment=""/>
+ <register addr="50070024" rw_flags="RW" width="4" name="BBB_TX_TIMER_CONFIG" comment=""/>
+ <register addr="50070028" rw_flags="RW" width="2" name="BBB_TX_INT_MASK" comment=""/>
+ <register addr="5007002c" rw_flags="RW" width="2" name="BBB_TX_INT_CLEAR" comment=""/>
+ <register addr="50070030" rw_flags="R" width="2" name="BBB_TX_INT_CAUSE" comment=""/>
+ <register addr="50070034" rw_flags="R" width="1" name="BBB_TX_EVENT_TYPE" comment=""/>
+ <register addr="50070038" rw_flags="R" width="1" name="BBB_TX_PKT_STATUS" comment="CCK transmitter state machine current state"/>
+ <register addr="5007003c" rw_flags="RW" width="1" name="BBB_RX_PKT_CONFIG" comment=""/>
+ <register addr="50070040" rw_flags="RW" width="1" name="BBB_RX_FILTER_CONFIG" comment="40 to 44MHz resampling filter settings. These settings are applied to the two instances of this filter module, for I and Q signals."/>
+ <register addr="50070044" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_CONFIG" comment=""/>
+ <register addr="50070048" rw_flags="RW" width="2" name="BBB_RX_SYNC_PKT_CONFIG" comment="Configures detection of SFD (Start Frame Delimiter), aka Packet Sync"/>
+ <register addr="5007004c" rw_flags="RW" width="1" name="BBB_RX_SLICER_CONFIG" comment=""/>
+ <register addr="50070050" rw_flags="RW" width="2" name="BBB_RX_FREQ_EST_CONFIG" comment=""/>
+ <register addr="50070054" rw_flags="RW" width="2" name="BBB_RX_CHAN_EST_CONFIG" comment=""/>
+ <register addr="50070058" rw_flags="RW" width="1" name="BBB_RX_CLKTRACK_CONFIG" comment=""/>
+ <register addr="5007005c" rw_flags="RW" width="2" name="BBB_RX_DESPREAD_CONFIG" comment=""/>
+ <register addr="50070060" rw_flags="RW" width="4" name="BBB_RX_DESPREAD_CONFIG2" comment=""/>
+ <register addr="50070064" rw_flags="RW" width="4" name="BBB_RX_TIMER_CONFIG" comment=""/>
+ <register addr="50070068" rw_flags="RW" width="1" name="BBB_RX_AGC_GAIN_INIT" comment=""/>
+ <register addr="5007006c" rw_flags="RW" width="2" name="BBB_RX_AGC_GAIN_LIMITS" comment=""/>
+ <register addr="50070070" rw_flags="RW" width="2" name="BBB_RX_AGC_TARGETS" comment=""/>
+ <register addr="50070074" rw_flags="RW" width="2" name="BBB_RX_AGC_CONFIG" comment=""/>
+ <register addr="50070078" rw_flags="RW" width="2" name="BBB_RX_INT_MASK" comment=""/>
+ <register addr="5007007c" rw_flags="RW" width="2" name="BBB_RX_INT_CLEAR" comment=""/>
+ <register addr="50070080" rw_flags="RW" width="2" name="BBB_RX_SYNC_SYM_CONFIG2" comment=""/>
+ <register addr="50070084" rw_flags="RW" width="2" name="BBB_RX_SYNC_SYM_CONFIG3" comment="Configuration of CCK symbol synchronizer with pattern matching criteria (See B-65913)"/>
+ <register addr="50070088" rw_flags="RW" width="1" name="BBB_RX_SYNC_SYM_CONFIG4" comment="More configuration related to CCK symbol synchronizer with pattern matching criteria (See B-65913 and B-77346)"/>
+ <register addr="5007008c" rw_flags="RW" width="1" name="BBB_RX_DIVERSITY_CFG" comment="Configuration for DSSS/CCK switched diversity reception"/>
+ <register addr="50070090" rw_flags="RW" width="4" name="BBB_RX_JUMP_DET_CONFIG" comment="B Modem signal jump detector configuration"/>
+ <register addr="50070094" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_PAT_L" comment="Pattern to match for Long preamble"/>
+ <register addr="50070098" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_PAT_S" comment="Pattern to match for Short preamble"/>
+ <register addr="5007009c" rw_flags="RW" width="2" name="BBB_RX_DEBUG_CONFIG" comment=""/>
+ <register addr="500700a0" rw_flags="R" width="2" name="BBB_RX_INT_CAUSE" comment=""/>
+ <register addr="500700a4" rw_flags="R" width="1" name="BBB_RX_PREAMB_TYPE" comment=""/>
+ <register addr="500700a8" rw_flags="R" width="1" name="BBB_RX_BURST_RATE" comment=""/>
+ <register addr="500700ac" rw_flags="R" width="2" name="BBB_RX_BURST_LEN" comment=""/>
+ <register addr="500700b0" rw_flags="R" width="1" name="BBB_RX_EVENT_TYPE" comment=""/>
+ <register addr="500700b4" rw_flags="R" width="2" name="BBB_RX_SIGNAL_QUALITY" comment=""/>
+ <register addr="500700b8" rw_flags="R" width="4" name="BBB_RX_FREQ_ERROR" comment="RxFreqErrorKHz = ((Reg Value in 2s complement) * 44000) / (11 * 65536 * 4)"/>
+ <register addr="500700bc" rw_flags="R" width="2" name="BBB_RX_DESPREAD_MARGIN" comment=""/>
+ <register addr="500700c0" rw_flags="R" width="1" name="BBB_RX_SLICE_MARGIN" comment=""/>
+ <register addr="500700c4" rw_flags="R" width="1" name="BBB_RX_SYNC_SCORE" comment=""/>
+ <register addr="500700c8" rw_flags="R" width="1" name="BBB_RX_PKT_STATUS" comment="CCK receiver state machine current state"/>
+ <register addr="500700cc" rw_flags="R" width="4" name="BBB_RX_CHAN_TAP_AMPLS_0" comment="least significant 32 bits"/>
+ <register addr="500700d0" rw_flags="R" width="4" name="BBB_RX_CHAN_TAP_AMPLS_1" comment="most significant 32 bits"/>
+ <register addr="500700d4" rw_flags="R" width="1" name="BBB_RX_AGC_GAIN" comment=""/>
+ <register addr="500700d8" rw_flags="R" width="2" name="BBB_RX_DEBUG" comment="Contents of this register are only available when BBB_RX_DEBUG_CONFIG_EN has been enabled"/>
+ <register addr="500700dc" rw_flags="RW" width="1" name="BBB_RX_CHAN_EQ_CONFIG" comment=""/>
+ <register addr="500700e0" rw_flags="RW" width="1" name="BBB_SPARE1" comment=""/>
+ <register addr="500700e4" rw_flags="RW" width="1" name="BBB_SPARE2" comment=""/>
+ <register addr="500700e8" rw_flags="RW" width="1" name="BBB_RX_SYNC_SYM_BLANK_TIME" comment="Interval at start of CCK symbol detection time to blank if needed to avoid transient effects after rx antenna switch in CCK switched diversity chop mode. Each unit of time is 1 microsec"/>
+ </block>
+ <block name="wl_enc_dma_0" comment="">
+ <register addr="50400000" rw_flags="RW" width="1" name="ENC_DMA_INT_CLEAR_I0" comment=""/>
+ <register addr="50400004" rw_flags="RW" width="1" name="ENC_DMA_INT_MASK_I0" comment=""/>
+ <register addr="50400008" rw_flags="RW" width="1" name="ENC_DMA_ENCR_TYPE_I0" comment="Encryption operation, one of:"/>
+ <register addr="5040000c" rw_flags="RW" width="1" name="ENC_DMA_KEY_LENGTH_I0" comment="Encryption key length 128 or 256"/>
+ <register addr="50400010" rw_flags="RW" width="2" name="ENC_DMA_FRAME_LENGTH_I0" comment="Frame body length in octets"/>
+ <register addr="50400014" rw_flags="RW" width="1" name="ENC_DMA_HDR_LENGTH_I0" comment="Frame header length in octets"/>
+ <register addr="50400018" rw_flags="RW" width="1" name="ENC_DMA_ENC_CONFIG_I0" comment="Contains the following configuration bits:"/>
+ <register addr="5040001c" rw_flags="RW" width="1" name="ENC_DMA_PRIORITY_OCTET_I0" comment="Priority octet used in TKIP MIC calculation. Set to zero in this case. For CCMP operation, bits set to 1 in this octet will be set to one in the Nonce Flags Octet. It should be set to 0x10 for Management frames but should be set to 0xFF for Cisco CCX S67 compatibility; it must be set to 0x0 otherwise. (Refer to 802.11w section 8.3.3.3.3)"/>
+ <register addr="50400020" rw_flags="RW" width="2" name="ENC_DMA_FC_MASK_I0" comment="Frame Control Mask. Determines which Frame Control bits are masked (i.e. included in the AAD calculation) in CCMP mode. Its default value is 0xC78F. (Refer to 802.11n section 8.3.3.3.2)"/>
+ <register addr="50400024" rw_flags="RW" width="1" name="ENC_DMA_AAD_QC_MASK_I0" comment="Additional Authentication Data QoS Control field mask value for CCMP encryption. Set to 0x0F unless both the STA and its peer have their SPP A-MSDU Capable fields set to 1. In that case, set to 0x8F. (Refer to 802.11n section 8.3.3.3.2 g)"/>
+ <register addr="50400028" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[0]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040002c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[0]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400030" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[0]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400034" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[0]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400038" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[1]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040003c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[1]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400040" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[1]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400044" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[1]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400048" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[2]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040004c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[2]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400050" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[2]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400054" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[2]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400058" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[3]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040005c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[3]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400060" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[3]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400064" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[3]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400068" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[4]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040006c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[4]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400070" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[4]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400074" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[4]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400078" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[5]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040007c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[5]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400080" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[5]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400084" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[5]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400088" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[6]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040008c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[6]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400090" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[6]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400094" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[6]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400098" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[7]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040009c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[7]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="504000a0" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[7]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="504000a4" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[7]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="504000a8" rw_flags="RW" width="1" name="ENC_DMA_DST_FIFO_READ_TIMEOUT_I0" comment="If the destination scatter-gather list is such that the wide output FIFO gets stuck with less data than a whole word width in it before the last AXI burst occurs then wait this many cycles before forcing the final read from the FIFO."/>
+ <register addr="504000ac" rw_flags="RW" width="1" name="ENC_DMA_STROBE_I0" comment="Contains the following bits:"/>
+ <register addr="504000b0" rw_flags="R" width="1" name="ENC_DMA_QUEUE_STATUS_I0" comment="Bits [2:1] contain the number of operations currently in progress or completed. The processor must read this number before programming any configuration registers, and may write configuration registers only when this number is less than 2. Bits [1:0] contain the number of sets of status registers in the status queue."/>
+ <register addr="504000b4" rw_flags="R" width="1" name="ENC_DMA_OPERATION_STATUS_I0" comment="Indicates the outcome of the corresponding encryption operation. One of: ENC_DONE, ENC_STATUS_MIC_FAIL (MIC failed), ENC_DMA_DONE (DMA operation has been finished), AXI_READ_SLAVE_ERROR, AXI_READ_DECODE_ERROR, AXI_WRITE_SLAVE_ERROR, AXI_WRITE_DECODE_ERROR"/>
+ <register addr="504000b8" rw_flags="R" width="2" name="ENC_DMA_STATE_I0" comment="DMA current state for debug purposes"/>
+ <register addr="504000bc" rw_flags="R" width="4" name="ENC_DMA_STATE_FIFOS_I0" comment="DMA current state for debug purposes"/>
+ <register addr="504000c0" rw_flags="R" width="1" name="ENC_CORE_STATUS_I0" comment="Encryption accelerator state for debug purposes"/>
+ <register addr="504000c4" rw_flags="RW" width="1" name="ENC_DMA_MAX_AXI_READ_BURST_NUM_I0" comment="Max mumber of outstanding read AXI bursts, for debug only. Upto 15 are theoretically supported in the logic but only if there is space for all of them in the SRC FIFO."/>
+ <register addr="504000c8" rw_flags="RW" width="2" name="ENC_DMA_AXI_CACHE_CONFIG_I0" comment="AXI cache control settings, for debug only"/>
+ <register addr="504000cc" rw_flags="RW" width="1" name="ENC_DMA_AXI_BURST_CONFIG_I0" comment="Generate AXI access depending on FIFO state configuration, for debug only"/>
+ </block>
+ <block name="wl_enc_dma_1" comment="">
+ <register addr="50500000" rw_flags="RW" width="1" name="ENC_DMA_INT_CLEAR_I1" comment=""/>
+ <register addr="50500004" rw_flags="RW" width="1" name="ENC_DMA_INT_MASK_I1" comment=""/>
+ <register addr="50500008" rw_flags="RW" width="1" name="ENC_DMA_ENCR_TYPE_I1" comment="Encryption operation, one of:"/>
+ <register addr="5050000c" rw_flags="RW" width="1" name="ENC_DMA_KEY_LENGTH_I1" comment="Encryption key length 128 or 256"/>
+ <register addr="50500010" rw_flags="RW" width="2" name="ENC_DMA_FRAME_LENGTH_I1" comment="Frame body length in octets"/>
+ <register addr="50500014" rw_flags="RW" width="1" name="ENC_DMA_HDR_LENGTH_I1" comment="Frame header length in octets"/>
+ <register addr="50500018" rw_flags="RW" width="1" name="ENC_DMA_ENC_CONFIG_I1" comment="Contains the following configuration bits:"/>
+ <register addr="5050001c" rw_flags="RW" width="1" name="ENC_DMA_PRIORITY_OCTET_I1" comment="Priority octet used in TKIP MIC calculation. Set to zero in this case. For CCMP operation, bits set to 1 in this octet will be set to one in the Nonce Flags Octet. It should be set to 0x10 for Management frames but should be set to 0xFF for Cisco CCX S67 compatibility; it must be set to 0x0 otherwise. (Refer to 802.11w section 8.3.3.3.3)"/>
+ <register addr="50500020" rw_flags="RW" width="2" name="ENC_DMA_FC_MASK_I1" comment="Frame Control Mask. Determines which Frame Control bits are masked (i.e. included in the AAD calculation) in CCMP mode. Its default value is 0xC78F. (Refer to 802.11n section 8.3.3.3.2)"/>
+ <register addr="50500024" rw_flags="RW" width="1" name="ENC_DMA_AAD_QC_MASK_I1" comment="Additional Authentication Data QoS Control field mask value for CCMP encryption. Set to 0x0F unless both the STA and its peer have their SPP A-MSDU Capable fields set to 1. In that case, set to 0x8F. (Refer to 802.11n section 8.3.3.3.2 g)"/>
+ <register addr="50500028" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[0]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050002c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[0]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500030" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[0]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500034" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[0]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500038" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[1]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050003c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[1]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500040" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[1]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500044" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[1]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500048" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[2]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050004c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[2]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500050" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[2]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500054" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[2]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500058" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[3]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050005c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[3]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500060" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[3]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500064" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[3]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500068" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[4]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050006c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[4]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500070" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[4]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500074" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[4]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500078" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[5]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050007c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[5]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500080" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[5]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500084" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[5]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500088" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[6]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050008c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[6]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500090" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[6]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500094" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[6]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500098" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[7]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050009c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[7]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="505000a0" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[7]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="505000a4" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[7]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="505000a8" rw_flags="RW" width="1" name="ENC_DMA_DST_FIFO_READ_TIMEOUT_I1" comment="If the destination scatter-gather list is such that the wide output FIFO gets stuck with less data than a whole word width in it before the last AXI burst occurs then wait this many cycles before forcing the final read from the FIFO."/>
+ <register addr="505000ac" rw_flags="RW" width="1" name="ENC_DMA_STROBE_I1" comment="Contains the following bits:"/>
+ <register addr="505000b0" rw_flags="R" width="1" name="ENC_DMA_QUEUE_STATUS_I1" comment="Bits [2:1] contain the number of operations currently in progress or completed. The processor must read this number before programming any configuration registers, and may write configuration registers only when this number is less than 2. Bits [1:0] contain the number of sets of status registers in the status queue."/>
+ <register addr="505000b4" rw_flags="R" width="1" name="ENC_DMA_OPERATION_STATUS_I1" comment="Indicates the outcome of the corresponding encryption operation. One of: ENC_DONE, ENC_STATUS_MIC_FAIL (MIC failed), ENC_DMA_DONE (DMA operation has been finished), AXI_READ_SLAVE_ERROR, AXI_READ_DECODE_ERROR, AXI_WRITE_SLAVE_ERROR, AXI_WRITE_DECODE_ERROR"/>
+ <register addr="505000b8" rw_flags="R" width="2" name="ENC_DMA_STATE_I1" comment="DMA current state for debug purposes"/>
+ <register addr="505000bc" rw_flags="R" width="4" name="ENC_DMA_STATE_FIFOS_I1" comment="DMA current state for debug purposes"/>
+ <register addr="505000c0" rw_flags="R" width="1" name="ENC_CORE_STATUS_I1" comment="Encryption accelerator state for debug purposes"/>
+ <register addr="505000c4" rw_flags="RW" width="1" name="ENC_DMA_MAX_AXI_READ_BURST_NUM_I1" comment="Max mumber of outstanding read AXI bursts, for debug only. Upto 15 are theoretically supported in the logic but only if there is space for all of them in the SRC FIFO."/>
+ <register addr="505000c8" rw_flags="RW" width="2" name="ENC_DMA_AXI_CACHE_CONFIG_I1" comment="AXI cache control settings, for debug only"/>
+ <register addr="505000cc" rw_flags="RW" width="1" name="ENC_DMA_AXI_BURST_CONFIG_I1" comment="Generate AXI access depending on FIFO state configuration, for debug only"/>
+ </block>
+ <block name="wl_mac_0" comment="">
+ <register addr="50200000" rw_flags="RW" width="2" name="CLKGEN_MAC_ENABLES_I0" comment="This register enables clocks for MAC_IF_ and MAC_ACC. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50200004" rw_flags="RW" width="1" name="MAC_DEBUG_SEL_I0" comment="Select MAC debug port output (this is in addition to MAC IF and MAC ACC ports)"/>
+ <register addr="50200008" rw_flags="R" width="4" name="MAC_DEBUG_STATUS_I0" comment="Read MAC debug {MAC_ACC, MAC_IF}"/>
+ </block>
+ <block name="wl_mac_1" comment="">
+ <register addr="50300000" rw_flags="RW" width="2" name="CLKGEN_MAC_ENABLES_I1" comment="This register enables clocks for MAC_IF_ and MAC_ACC. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50300004" rw_flags="RW" width="1" name="MAC_DEBUG_SEL_I1" comment="Select MAC debug port output (this is in addition to MAC IF and MAC ACC ports)"/>
+ <register addr="50300008" rw_flags="R" width="4" name="MAC_DEBUG_STATUS_I1" comment="Read MAC debug {MAC_ACC, MAC_IF}"/>
+ </block>
+ <block name="wl_mac_acc_0" comment="">
+ <register addr="50220000" rw_flags="RW" width="1" name="MAC_ACC_CONTROL_I0" comment="Resets and enables the MAC accelerator."/>
+ <register addr="50220004" rw_flags="R" width="1" name="MAC_BA_TX_ACTIVITY_I0" comment="MAC BA_TX activity status."/>
+ <register addr="50220008" rw_flags="RW" width="2" name="MAC_BA_ENABLE_I0" comment="Enables for the BA_RX/BA_TX instances."/>
+ <register addr="5022000c" rw_flags="RW" width="1" name="MAC_MODULE_RESET_I0" comment="This register can be used to reset MAC submodules individually [one at a time]."/>
+ <register addr="50220010" rw_flags="RW" width="2" name="MAC_CLOCK_DISABLE_I0" comment="Clock disable signals that control the local clock gating logic of MAC submodules."/>
+ <register addr="50220014" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS_BYTE3_0_I0" comment="Primary MAC address"/>
+ <register addr="50220018" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS_BYTE5_4_I0" comment="Primary MAC address"/>
+ <register addr="5022001c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS1_BYTE3_0_I0" comment="MAC address #1"/>
+ <register addr="50220020" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS1_BYTE5_4_I0" comment="MAC address #1"/>
+ <register addr="50220024" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS2_BYTE3_0_I0" comment="MAC address #2"/>
+ <register addr="50220028" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS2_BYTE5_4_I0" comment="MAC address #2"/>
+ <register addr="5022002c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_BYTE3_0_I0" comment="MAC address #3"/>
+ <register addr="50220030" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_BYTE5_4_I0" comment="MAC address #3"/>
+ <register addr="50220034" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE3_0_I0" comment="If a bit is set, then that bit"/>
+ <register addr="50220038" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE5_4_I0" comment="is ignored for receive Address1 matching."/>
+ <register addr="5022003c" rw_flags="RW" width="1" name="MAC_STATION_ADDRESS_CONFIG_I0" comment="Configures receive Address1 matching on our MAC addresses."/>
+ <register addr="50220040" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220044" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220048" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5022004c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220050" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220054" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220058" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5022005c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220060" rw_flags="RW" width="1" name="MAC_GRP_ACK_CONFIG_I0" comment="Configures immediate ACK behaviour for reception of Group Addressed frames"/>
+ <register addr="50220064" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_MANAGEMENT_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220068" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_CONTROL_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="5022006c" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_DATA_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220070" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_RESERVED_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220074" rw_flags="RW" width="4" name="MAC_BSSID_BYTE3_0_I0" comment="BSSID"/>
+ <register addr="50220078" rw_flags="RW" width="2" name="MAC_BSSID_BYTE5_4_I0" comment="BSSID"/>
+ <register addr="5022007c" rw_flags="RW" width="4" name="MAC_ALT_BSSID_BYTE3_0_I0" comment="Alternative BSSID"/>
+ <register addr="50220080" rw_flags="RW" width="2" name="MAC_ALT_BSSID_BYTE5_4_I0" comment="Alternative BSSID"/>
+ <register addr="50220084" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_01MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220088" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_02MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5022008c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_5M5BPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220090" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_11MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220094" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_06MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220098" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_09MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5022009c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_12MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_18MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a4" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_24MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a8" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_36MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200ac" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_48MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200b0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_54MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200b4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS0_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200b8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS1_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200bc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS2_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS3_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS4_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS5_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200cc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS6_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS7_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS8_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS9_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200dc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS10_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS11_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS12_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS13_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200ec" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS14_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS15_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS32_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f8" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200fc" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220100" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220104" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220108" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022010c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220110" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220114" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220118" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022011c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220120" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220124" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220128" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022012c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220130" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220134" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220138" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022013c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220140" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220144" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220148" rw_flags="RW" width="2" name="MAC_CTRL_MAC2_FLAGS_I0" comment="Flags [Configuration bits] register 2"/>
+ <register addr="5022014c" rw_flags="RW" width="2" name="MAC_CTRL_MAC3_FLAGS_I0" comment="Flags [Configuration bits] register 3"/>
+ <register addr="50220150" rw_flags="RW" width="2" name="MAC_CTRL_MAC4_FLAGS_I0" comment="Flags [Configuration bits] register 4"/>
+ <register addr="50220154" rw_flags="RW" width="2" name="MAC_CTRL_MAC5_FLAGS_I0" comment="Flags [Configuration bits] register 5"/>
+ <register addr="50220158" rw_flags="RW" width="2" name="MAC_CTRL_MAC6_FLAGS_I0" comment="Flags [Configuration bits] register 6"/>
+ <register addr="5022015c" rw_flags="RW" width="2" name="MAC_CTRL_MAC7_FLAGS_I0" comment="Flags [Configuration bits] register 7"/>
+ <register addr="50220160" rw_flags="RW" width="2" name="MAC_CTRL_MAC10_FLAGS_I0" comment="Flags [Configuration bits] register 10"/>
+ <register addr="50220164" rw_flags="RW" width="2" name="MAC_CTRL_MAC11_FLAGS_I0" comment="Flags [Configuration bits] register 11 (This replaces some ACTING_AS_AP functionality by splitting it into several programmable bits."/>
+ <register addr="50220168" rw_flags="RW" width="2" name="MAC_CTRL_MAC12_FLAGS_I0" comment="Flags [Configuration bits] register 12."/>
+ <register addr="5022016c" rw_flags="RW" width="2" name="MAC_RX_FILTER_CONFIG_I0" comment="RX filter configuration"/>
+ <register addr="50220170" rw_flags="RW" width="2" name="MAC_MIN_MPDU_LEN_I0" comment="Minimum RX MPDU length. Received MPDUs shorter than this are discarded."/>
+ <register addr="50220174" rw_flags="RW" width="2" name="MAC_MAX_MPDU_LEN_I0" comment="Maximum RX MPDU length. Received MPDUs longer than this are discarded."/>
+ <register addr="50220178" rw_flags="RW" width="2" name="MAC_CCA_CFG_I0" comment="Configures CCA utilisation."/>
+ <register addr="5022017c" rw_flags="RW" width="2" name="MAC_CTRL_RESPONSE_TX_LEVEL_I0" comment="Transmit level for control response frames."/>
+ <register addr="50220180" rw_flags="RW" width="1" name="MAC_CTRL_RESPONSE_TX_ANT_I0" comment="Transmit antenna configuration for control response frames."/>
+ <register addr="50220184" rw_flags="RW" width="2" name="MAC_AC_BK_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_BK EDCA queue."/>
+ <register addr="50220188" rw_flags="RW" width="2" name="MAC_AC_BE_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_BE EDCA queue."/>
+ <register addr="5022018c" rw_flags="RW" width="2" name="MAC_AC_VI_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_VI EDCA queue."/>
+ <register addr="50220190" rw_flags="RW" width="2" name="MAC_AC_VO_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_VO EDCA queue."/>
+ <register addr="50220194" rw_flags="R" width="2" name="MAC_TXOP_TIME_LEFT_I0" comment="The firmware can read from this register the time remaining in the current TXOP, in units of 1 us."/>
+ <register addr="50220198" rw_flags="RW" width="2" name="MAC_EIFS_I0" comment="Programmable EIFS"/>
+ <register addr="5022019c" rw_flags="RW" width="1" name="MAC_SLOT_TIME_US_I0" comment="Programmable slot time in us"/>
+ <register addr="502201a0" rw_flags="RW" width="2" name="MAC_NDP_MCS_I0" comment="Programs MCS used for HT NDP or VHT NDP transmission."/>
+ <register addr="502201a4" rw_flags="RW" width="2" name="MAC_BFER_CFG_I0" comment="Configures beamformer."/>
+ <register addr="502201a8" rw_flags="RW" width="2" name="MAC_BFEE_CFG_I0" comment="Configures beamformee."/>
+ <register addr="502201ac" rw_flags="RW" width="2" name="MAC_MCS_FEEDBACK_CONFIG_I0" comment="MCS feedback configuration"/>
+ <register addr="502201b0" rw_flags="RW" width="4" name="MAC_TID_QSIZE_MAP_I0" comment="Maps one of 16 TIDs to one of four queue sizes, for the purpose of setting the 'Queue Size' field in transmitted QoS frames."/>
+ <register addr="502201b4" rw_flags="RW" width="4" name="MAC_TID_QSIZE_I0" comment="Queue sizes numbers 0, 1, 2 and 3."/>
+ <register addr="502201b8" rw_flags="R" width="4" name="MAC_M_NAV_END_I0" comment="The firmware can read from this register the NAV end time."/>
+ <register addr="502201bc" rw_flags="R" width="4" name="MAC_NAV_BSSID_BYTE3_0_I0" comment="The firmware can read from this register the BSSID associated to the current NAV."/>
+ <register addr="502201c0" rw_flags="R" width="2" name="MAC_NAV_BSSID_BYTE5_4_I0" comment=""/>
+ <register addr="502201c4" rw_flags="R" width="4" name="MAC_TXOPHOLDER_BYTE3_0_I0" comment="The firmware can read from this register the TXOP holder associated to the current NAV."/>
+ <register addr="502201c8" rw_flags="R" width="2" name="MAC_TXOPHOLDER_BYTE5_4_I0" comment=""/>
+ <register addr="502201cc" rw_flags="R" width="1" name="MAC_NAV_SRC_I0" comment="NAV sources. See 802.11-1999 as amended in 802.11-2007."/>
+ <register addr="502201d0" rw_flags="RW" width="4" name="MAC_TX_SIFS_REF_I0" comment="Adjust the timing of Data frame following a CTS-to-self. This is nominally the time between the on-air end of frame to the point when MAC issues PHY RX End signal. This is measured in 25 ns units."/>
+ <register addr="502201d4" rw_flags="RW" width="4" name="MAC_TX_RIFS_REF_I0" comment="Adjust TX timing references to achieve RIFS transmission. This is 25 ns units."/>
+ <register addr="502201d8" rw_flags="RW" width="2" name="MAC_RESPONSE_DELAY_SIFS_I0" comment="Bits 7 down to 0 are programmable time in 25ns units to delay response frames such that SIFS is met. Bit 8 allows timing at the end of HT-MM short GI frames to be measured on 4us symbol boundaries. This affects SIFS timing of short GI frames."/>
+ <register addr="502201dc" rw_flags="RW" width="2" name="MAC_TXEND_LATENCY_I0" comment="The time between the modem sending a 'TX End' signal to the actual on-air end of frame. This is measured in 25 ns units. This is used as an 'off-air' indicator. "/>
+ <register addr="502201e0" rw_flags="RW" width="4" name="MAC_CSTATE_IFS_ADJUST_I0" comment="Adjust IFS timing for in channel state module"/>
+ <register addr="502201e4" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_11B_I0" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+) for 11b. This adjusts the position of the PHY preamble."/>
+ <register addr="502201e8" rw_flags="RW" width="2" name="MAC_PHYIF_SYMB_END_11B_I0" comment="Programmable time that adjust 11b RX latency to meet SIFS. The format is 4.6 unsigned. The integer part is in microseconds. The fractional part is in 25 ns."/>
+ <register addr="502201ec" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="502201f0" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_END_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="502201f4" rw_flags="RW" width="1" name="MAC_PHYIF_STBC_WITH_LDPC_SYMB_END_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE for a received frame containing both STBC and LDPC (+/-) for OFDM."/>
+ <register addr="502201f8" rw_flags="RW" width="2" name="MAC_PHYIF_STBC_LDPC_SYMB_END_ADJUST_I0" comment="Programmable time in 25us units that adjusts the symbol end time in MAC_PHY_INTERFACE for STBC or LDPC reception (+/-) for OFDM."/>
+ <register addr="502201fc" rw_flags="RW" width="1" name="MAC_PHYIF_RXSTART_ADJUST_I0" comment="Programmable time in 1us unit that adjusts the RX_START start time in MAC_PHY_INTERFACE."/>
+ <register addr="50220200" rw_flags="RW" width="1" name="MAC_TX_CTSRESPONSE_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the start of the TX of the frame sent at SIFS after a CTS TX or RX."/>
+ <register addr="50220204" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11A_I0" comment="Programmable time in us that the MAC waits for a response in 11a."/>
+ <register addr="50220208" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11B_I0" comment="Programmable time in us that the MAC waits for a response in 11b."/>
+ <register addr="5022020c" rw_flags="RW" width="2" name="MAC_RX_AMPDU_CFG_I0" comment="Receive A-MPDU configuration."/>
+ <register addr="50220210" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_I0" comment="Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop."/>
+ <register addr="50220214" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_CTS_I0" comment="The bottom 10 bits means secondary channel must be free for this amount of time (50ns unit) before it is declared non-busy for CTS response to a RTS signalling TA. Bits [13:10] is a signed number that adjusts the delay between the start of frame and the synchronisation start pulse from the modem."/>
+ <register addr="50220218" rw_flags="RW" width="2" name="MAC_TX_DELAY_FINE_TUNE_I0" comment="Transmit delay fine tune. Provides fine adjustment of inter-frame spacing."/>
+ <register addr="5022021c" rw_flags="RW" width="2" name="MAC_CS_LATENCY_I0" comment="CS latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to stretch CCA status from CS latency to nominal OFDM RX latency."/>
+ <register addr="50220220" rw_flags="RW" width="2" name="MAC_RADIO_SYNC_LATENCY_I0" comment="Radio sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between modem indicates CCA busy to the start of packet pulse."/>
+ <register addr="50220224" rw_flags="RW" width="2" name="MAC_MODEM_SYNC_LATENCY_I0" comment="Modem sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between OFDM STF sync to the start of packet pulse."/>
+ <register addr="50220228" rw_flags="RW" width="1" name="MAC_DEFAULT_AMPDU_DURATION_I0" comment="This is the duration of an A-MPDU frame exchange when it is the next frame from the frame at the head of a queue."/>
+ <register addr="5022022c" rw_flags="RW" width="4" name="MAC_MAX_ACK_DURATION_I0" comment="Maximum ACK duration for DSSS/CCK and OFDM."/>
+ <register addr="50220230" rw_flags="R" width="4" name="MAC_DOT11_FCS_ERROR_COUNT_I0" comment="Received frame FCS error counter."/>
+ <register addr="50220234" rw_flags="R" width="4" name="MAC_DOT11_FCS_GOOD_COUNT_I0" comment="Received frame FCS good counter."/>
+ <register addr="50220238" rw_flags="R" width="4" name="MAC_DOT11_ERROR_COUNT_I0" comment="Received frame error counter that is NOT a FCS error."/>
+ <register addr="5022023c" rw_flags="R" width="4" name="MAC_BAD_SIG_COUNT_I0" comment="Received frame bad signal counter."/>
+ <register addr="50220240" rw_flags="R" width="4" name="MAC_TX_UNDER_COUNT_I0" comment="TX frames which were corrupted by the accelerator due to TX underflow."/>
+ <register addr="50220244" rw_flags="R" width="4" name="MAC_RX_VHT_MU_UNMATCHED_GID_I0" comment="VHT MU frames where GID does not match."/>
+ <register addr="50220248" rw_flags="R" width="2" name="MAC_AC_BK_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_BK queue, in units of 16 us."/>
+ <register addr="5022024c" rw_flags="R" width="4" name="MAC_DOT11_RX_OCTETS_IN_AMPDUS_I0" comment="Counts of the number of octets received in AMPDUs."/>
+ <register addr="50220250" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDUS_COUNT_I0" comment="Counts of the number of received AMPDUs."/>
+ <register addr="50220254" rw_flags="R" width="2" name="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT_I0" comment="Counts of the number of MPDUs received in AMPDUs."/>
+ <register addr="50220258" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT_I0" comment="Counts the number of length errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="5022025c" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT_I0" comment="Counts the number of start spacing errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50220260" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT_I0" comment="Counts the number of VHT single errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50220264" rw_flags="R" width="2" name="MAC_AC_BE_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_BE queue, in units of 16 us."/>
+ <register addr="50220268" rw_flags="R" width="2" name="MAC_AC_VI_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_VI queue, in units of 16 us."/>
+ <register addr="5022026c" rw_flags="R" width="2" name="MAC_AC_VO_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_VO queue, in units of 16 us."/>
+ <register addr="50220270" rw_flags="R" width="2" name="MAC_AC_CBR_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_CBR queue, in units of 16 us."/>
+ <register addr="50220274" rw_flags="R" width="2" name="MAC_TXRX_TIME_SPENT_I0" comment="This register counts the time spent transmitting and receiving, in units of 16 us."/>
+ <register addr="50220278" rw_flags="R" width="2" name="MAC_CCA_BUSY_TIME_I0" comment="This register counts the time CCA indicates busy, in units of 16 us."/>
+ <register addr="5022027c" rw_flags="R" width="2" name="MAC_SEC_BUSY_TIME_I0" comment="This register counts the time secondary channel is busy, in units of 16 us."/>
+ <register addr="50220280" rw_flags="R" width="2" name="MAC_SEC40_BUSY_TIME_I0" comment="This register counts the time secondary40 channel is busy, in units of 16 us."/>
+ <register addr="50220284" rw_flags="R" width="2" name="MAC_SEC80_BUSY_TIME_I0" comment="This register counts the time secondary80 channel is busy, in units of 16 us."/>
+ <register addr="50220288" rw_flags="RW" width="2" name="MAC_DEBUG_MUX_SEL_I0" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="5022028c" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_CFG_I0" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="50220290" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_SOURCE_I0" comment="For edge trigger modes, a '1' selects the source. For logic trigger modes, a '1' defines input."/>
+ <register addr="50220294" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_LEVEL_I0" comment="For logic trigger modes, each bit defines level for logic."/>
+ <register addr="50220298" rw_flags="RW" width="1" name="MAC_DEBUG_SELECT_I0" comment="Select register for MAC debug multiplexer."/>
+ <register addr="5022029c" rw_flags="R" width="2" name="MAC_DEBUG_X00_I0" comment="Debug bus."/>
+ <register addr="502202a0" rw_flags="R" width="2" name="MAC_DEBUG_X01_I0" comment="Debug bus."/>
+ <register addr="502202a4" rw_flags="R" width="2" name="MAC_DEBUG_X02_I0" comment="Debug bus."/>
+ <register addr="502202a8" rw_flags="R" width="2" name="MAC_DEBUG_X03_I0" comment="Debug bus."/>
+ <register addr="502202ac" rw_flags="R" width="2" name="MAC_DEBUG_X04_I0" comment="Debug bus."/>
+ <register addr="502202b0" rw_flags="R" width="2" name="MAC_DEBUG_X05_I0" comment="Debug bus."/>
+ <register addr="502202b4" rw_flags="R" width="2" name="MAC_DEBUG_X06_I0" comment="Debug bus."/>
+ <register addr="502202b8" rw_flags="R" width="2" name="MAC_DEBUG_X07_I0" comment="Debug bus."/>
+ <register addr="502202bc" rw_flags="R" width="2" name="MAC_DEBUG_X08_I0" comment="Debug bus."/>
+ <register addr="502202c0" rw_flags="R" width="2" name="MAC_DEBUG_X09_I0" comment="Debug bus."/>
+ <register addr="502202c4" rw_flags="R" width="2" name="MAC_DEBUG_X0A_I0" comment="Debug bus."/>
+ <register addr="502202c8" rw_flags="R" width="2" name="MAC_DEBUG_X0B_I0" comment="Debug bus."/>
+ <register addr="502202cc" rw_flags="R" width="2" name="MAC_DEBUG_X0C_I0" comment="Debug bus."/>
+ <register addr="502202d0" rw_flags="R" width="2" name="MAC_DEBUG_X0D_I0" comment="Debug bus."/>
+ <register addr="502202d4" rw_flags="R" width="2" name="MAC_DEBUG_X0E_I0" comment="Debug bus."/>
+ <register addr="502202d8" rw_flags="R" width="2" name="MAC_DEBUG_X0F_I0" comment="Debug bus."/>
+ <register addr="502202dc" rw_flags="R" width="2" name="MAC_DEBUG_X10_I0" comment="Debug bus."/>
+ <register addr="502202e0" rw_flags="R" width="2" name="MAC_DEBUG_X11_I0" comment="Debug bus."/>
+ <register addr="502202e4" rw_flags="R" width="2" name="MAC_DEBUG_X12_I0" comment="Debug bus."/>
+ <register addr="502202e8" rw_flags="R" width="2" name="MAC_DEBUG_X13_I0" comment="Debug bus."/>
+ <register addr="502202ec" rw_flags="R" width="2" name="MAC_DEBUG_X14_I0" comment="Debug bus."/>
+ <register addr="502202f0" rw_flags="R" width="2" name="MAC_DEBUG_X15_I0" comment="Debug bus."/>
+ <register addr="502202f4" rw_flags="R" width="2" name="MAC_DEBUG_X16_I0" comment="Debug bus."/>
+ <register addr="502202f8" rw_flags="R" width="2" name="MAC_DEBUG_X17_I0" comment="Debug bus."/>
+ <register addr="502202fc" rw_flags="R" width="2" name="MAC_DEBUG_X18_I0" comment="Debug bus."/>
+ <register addr="50220300" rw_flags="R" width="2" name="MAC_DEBUG_X19_I0" comment="Debug bus."/>
+ <register addr="50220304" rw_flags="R" width="2" name="MAC_DEBUG_X1A_I0" comment="Debug bus."/>
+ <register addr="50220308" rw_flags="R" width="2" name="MAC_DEBUG_X1B_I0" comment="Debug bus."/>
+ <register addr="5022030c" rw_flags="R" width="2" name="MAC_DEBUG_X1C_I0" comment="Debug bus."/>
+ <register addr="50220310" rw_flags="R" width="2" name="MAC_DEBUG_X1D_I0" comment="Debug bus."/>
+ <register addr="50220314" rw_flags="R" width="2" name="MAC_DEBUG_X1E_I0" comment="Debug bus."/>
+ <register addr="50220318" rw_flags="R" width="2" name="MAC_DEBUG_X1F_I0" comment="Debug bus."/>
+ <register addr="5022031c" rw_flags="R" width="2" name="MAC_DEBUG_X20_I0" comment="Debug bus."/>
+ <register addr="50220320" rw_flags="R" width="2" name="MAC_DEBUG_X21_I0" comment="Debug bus."/>
+ <register addr="50220324" rw_flags="R" width="2" name="MAC_DEBUG_X22_I0" comment="Debug bus."/>
+ <register addr="50220328" rw_flags="R" width="2" name="MAC_DEBUG_X23_I0" comment="Debug bus."/>
+ <register addr="5022032c" rw_flags="R" width="2" name="MAC_DEBUG_X24_I0" comment="Debug bus."/>
+ <register addr="50220330" rw_flags="R" width="2" name="MAC_DEBUG_X25_I0" comment="Debug bus."/>
+ <register addr="50220334" rw_flags="R" width="2" name="MAC_DEBUG_X26_I0" comment="Debug bus."/>
+ <register addr="50220338" rw_flags="R" width="2" name="MAC_DEBUG_X27_I0" comment="Debug bus."/>
+ <register addr="5022033c" rw_flags="R" width="2" name="MAC_DEBUG_X28_I0" comment="Debug bus."/>
+ <register addr="50220340" rw_flags="R" width="2" name="MAC_DEBUG_X29_I0" comment="Debug bus."/>
+ <register addr="50220344" rw_flags="R" width="2" name="MAC_DEBUG_X2A_I0" comment="Debug bus."/>
+ <register addr="50220348" rw_flags="R" width="2" name="MAC_DEBUG_X2B_I0" comment="Debug bus."/>
+ <register addr="5022034c" rw_flags="R" width="2" name="MAC_DEBUG_X2C_I0" comment="Debug bus."/>
+ <register addr="50220350" rw_flags="R" width="2" name="MAC_DEBUG_X2D_I0" comment="Debug bus."/>
+ <register addr="50220354" rw_flags="R" width="2" name="MAC_DEBUG_X2E_I0" comment="Debug bus."/>
+ <register addr="50220358" rw_flags="R" width="2" name="MAC_DEBUG_X2F_I0" comment="Debug bus."/>
+ <register addr="5022035c" rw_flags="R" width="2" name="MAC_DEBUG_X30_I0" comment="Debug bus."/>
+ <register addr="50220360" rw_flags="R" width="2" name="MAC_DEBUG_X31_I0" comment="Debug bus."/>
+ <register addr="50220364" rw_flags="R" width="2" name="MAC_DEBUG_X32_I0" comment="Debug bus."/>
+ <register addr="50220368" rw_flags="R" width="2" name="MAC_DEBUG_X33_I0" comment="Debug bus."/>
+ <register addr="5022036c" rw_flags="R" width="2" name="MAC_DEBUG_X34_I0" comment="Debug bus."/>
+ <register addr="50220370" rw_flags="R" width="2" name="MAC_DEBUG_X35_I0" comment="Debug bus."/>
+ <register addr="50220374" rw_flags="R" width="2" name="MAC_DEBUG_X36_I0" comment="Debug bus."/>
+ <register addr="50220378" rw_flags="R" width="2" name="MAC_DEBUG_X37_I0" comment="Debug bus."/>
+ <register addr="5022037c" rw_flags="R" width="1" name="MAC_SM_STATE_PHY_INTERFACE_I0" comment="State of state machine."/>
+ <register addr="50220380" rw_flags="R" width="1" name="MAC_SM_STATE_VALIDATE_MPDU_I0" comment="State of state machine."/>
+ <register addr="50220384" rw_flags="R" width="1" name="MAC_SM_STATE_FILTER_MPDU_I0" comment="State of state machine."/>
+ <register addr="50220388" rw_flags="R" width="1" name="MAC_SM_STATE_DEFRAGMENT_I0" comment="State of state machine."/>
+ <register addr="5022038c" rw_flags="R" width="1" name="MAC_SM_STATE_RX_COORDINATION_I0" comment="State of state machine."/>
+ <register addr="50220390" rw_flags="R" width="1" name="MAC_SM_STATE_CHANNEL_STATE_I0" comment="State of state machine."/>
+ <register addr="50220394" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BE_I0" comment="State of state machine."/>
+ <register addr="50220398" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BK_I0" comment="State of state machine."/>
+ <register addr="5022039c" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VI_I0" comment="State of state machine."/>
+ <register addr="502203a0" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VO_I0" comment="State of state machine."/>
+ <register addr="502203a4" rw_flags="R" width="1" name="MAC_SM_STATE_DATA_PUMP_I0" comment="State of state machine."/>
+ <register addr="502203a8" rw_flags="R" width="1" name="MAC_SM_STATE_TX_COORDINATION_I0" comment="State of state machine."/>
+ <register addr="502203ac" rw_flags="R" width="1" name="MAC_SM_STATE_TX_AGGREGATION_I0" comment="State of state machine."/>
+ <register addr="502203b0" rw_flags="R" width="1" name="MAC_SM_STATE_RX_DEAGGREGATION_I0" comment="State of state machine."/>
+ <register addr="502203b4" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMA_I0" comment="Time of last A modem start of packet."/>
+ <register addr="502203b8" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMB_I0" comment="Time of last B modem start of packet."/>
+ <register addr="502203bc" rw_flags="R" width="4" name="PDU_LAST_CBR_REQ_I0" comment="Time of last TX request on the CBR queue."/>
+ <register addr="502203c0" rw_flags="RW" width="4" name="MAC_BA_RX_0_PEER_ADDRESS_LSB_I0" comment="BA RX 0 peer address [31:0]"/>
+ <register addr="502203c4" rw_flags="RW" width="2" name="MAC_BA_RX_0_PEER_ADDRESS_MSB_I0" comment="BA RX 0 peer address [47:32]"/>
+ <register addr="502203c8" rw_flags="RW" width="4" name="MAC_BA_RX_0_CONFIG_I0" comment="BA RX 0 configuration"/>
+ <register addr="502203cc" rw_flags="RW" width="4" name="MAC_BA_RX_1_PEER_ADDRESS_LSB_I0" comment="BA RX 1 peer address [31:0]"/>
+ <register addr="502203d0" rw_flags="RW" width="2" name="MAC_BA_RX_1_PEER_ADDRESS_MSB_I0" comment="BA RX 1 peer address [47:32]"/>
+ <register addr="502203d4" rw_flags="RW" width="4" name="MAC_BA_RX_1_CONFIG_I0" comment="BA RX 1 configuration"/>
+ <register addr="502203d8" rw_flags="RW" width="4" name="MAC_BA_RX_2_PEER_ADDRESS_LSB_I0" comment="BA RX 2 peer address [31:0]"/>
+ <register addr="502203dc" rw_flags="RW" width="2" name="MAC_BA_RX_2_PEER_ADDRESS_MSB_I0" comment="BA RX 2 peer address [47:32]"/>
+ <register addr="502203e0" rw_flags="RW" width="4" name="MAC_BA_RX_2_CONFIG_I0" comment="BA RX 2 configuration"/>
+ <register addr="502203e4" rw_flags="RW" width="4" name="MAC_BA_RX_3_PEER_ADDRESS_LSB_I0" comment="BA RX 3 peer address [31:0]"/>
+ <register addr="502203e8" rw_flags="RW" width="2" name="MAC_BA_RX_3_PEER_ADDRESS_MSB_I0" comment="BA RX 3 peer address [47:32]"/>
+ <register addr="502203ec" rw_flags="RW" width="4" name="MAC_BA_RX_3_CONFIG_I0" comment="BA RX 3 configuration"/>
+ <register addr="502203f0" rw_flags="RW" width="4" name="MAC_BA_RX_4_PEER_ADDRESS_LSB_I0" comment="BA RX 4 peer address [31:0]"/>
+ <register addr="502203f4" rw_flags="RW" width="2" name="MAC_BA_RX_4_PEER_ADDRESS_MSB_I0" comment="BA RX 4 peer address [47:32]"/>
+ <register addr="502203f8" rw_flags="RW" width="4" name="MAC_BA_RX_4_CONFIG_I0" comment="BA RX 4 configuration"/>
+ <register addr="502203fc" rw_flags="RW" width="4" name="MAC_BA_RX_5_PEER_ADDRESS_LSB_I0" comment="BA RX 5 peer address [31:0]"/>
+ <register addr="50220400" rw_flags="RW" width="2" name="MAC_BA_RX_5_PEER_ADDRESS_MSB_I0" comment="BA RX 5 peer address [47:32]"/>
+ <register addr="50220404" rw_flags="RW" width="4" name="MAC_BA_RX_5_CONFIG_I0" comment="BA RX 5 configuration"/>
+ <register addr="50220408" rw_flags="RW" width="4" name="MAC_BA_RX_6_PEER_ADDRESS_LSB_I0" comment="BA RX 6 peer address [31:0]"/>
+ <register addr="5022040c" rw_flags="RW" width="2" name="MAC_BA_RX_6_PEER_ADDRESS_MSB_I0" comment="BA RX 6 peer address [47:32]"/>
+ <register addr="50220410" rw_flags="RW" width="4" name="MAC_BA_RX_6_CONFIG_I0" comment="BA RX 6 configuration"/>
+ <register addr="50220414" rw_flags="RW" width="4" name="MAC_BA_RX_7_PEER_ADDRESS_LSB_I0" comment="BA RX 7 peer address [31:0]"/>
+ <register addr="50220418" rw_flags="RW" width="2" name="MAC_BA_RX_7_PEER_ADDRESS_MSB_I0" comment="BA RX 7 peer address [47:32]"/>
+ <register addr="5022041c" rw_flags="RW" width="4" name="MAC_BA_RX_7_CONFIG_I0" comment="BA RX 7 configuration"/>
+ <register addr="50220420" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_LSB_I0" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [31:0]"/>
+ <register addr="50220424" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_MSB_I0" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [63:32]"/>
+ <register addr="50220428" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_LSB_I0" comment="Current BA RX bitmap from the selected instance. [31:0]"/>
+ <register addr="5022042c" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_MSB_I0" comment="Current BA RX bitmap from the selected instance. [61:32]"/>
+ <register addr="50220430" rw_flags="RW" width="1" name="MAC_BA_RX_BITMAP_SELECT_I0" comment="Select which BA RX instance has its bitmap readable on MAC_BA_RX_BITMAP."/>
+ <register addr="50220434" rw_flags="RW" width="1" name="MAC_CHANGE_NAV_SOURCE_I0" comment="NAV Source"/>
+ <register addr="50220438" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_BSSID_LSB_I0" comment="BSSID [31:0]"/>
+ <register addr="5022043c" rw_flags="RW" width="2" name="MAC_CHANGE_NAV_BSSID_MSB_I0" comment="BSSID [47:32]"/>
+ <register addr="50220440" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_END_I0" comment="NAV End"/>
+ <register addr="50220444" rw_flags="RW" width="2" name="MAC_CHANGE_STATE_I0" comment="Change internal states"/>
+ </block>
+ <block name="wl_mac_acc_1" comment="">
+ <register addr="50320000" rw_flags="RW" width="1" name="MAC_ACC_CONTROL_I1" comment="Resets and enables the MAC accelerator."/>
+ <register addr="50320004" rw_flags="R" width="1" name="MAC_BA_TX_ACTIVITY_I1" comment="MAC BA_TX activity status."/>
+ <register addr="50320008" rw_flags="RW" width="2" name="MAC_BA_ENABLE_I1" comment="Enables for the BA_RX/BA_TX instances."/>
+ <register addr="5032000c" rw_flags="RW" width="1" name="MAC_MODULE_RESET_I1" comment="This register can be used to reset MAC submodules individually [one at a time]."/>
+ <register addr="50320010" rw_flags="RW" width="2" name="MAC_CLOCK_DISABLE_I1" comment="Clock disable signals that control the local clock gating logic of MAC submodules."/>
+ <register addr="50320014" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS_BYTE3_0_I1" comment="Primary MAC address"/>
+ <register addr="50320018" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS_BYTE5_4_I1" comment="Primary MAC address"/>
+ <register addr="5032001c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS1_BYTE3_0_I1" comment="MAC address #1"/>
+ <register addr="50320020" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS1_BYTE5_4_I1" comment="MAC address #1"/>
+ <register addr="50320024" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS2_BYTE3_0_I1" comment="MAC address #2"/>
+ <register addr="50320028" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS2_BYTE5_4_I1" comment="MAC address #2"/>
+ <register addr="5032002c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_BYTE3_0_I1" comment="MAC address #3"/>
+ <register addr="50320030" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_BYTE5_4_I1" comment="MAC address #3"/>
+ <register addr="50320034" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE3_0_I1" comment="If a bit is set, then that bit"/>
+ <register addr="50320038" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE5_4_I1" comment="is ignored for receive Address1 matching."/>
+ <register addr="5032003c" rw_flags="RW" width="1" name="MAC_STATION_ADDRESS_CONFIG_I1" comment="Configures receive Address1 matching on our MAC addresses."/>
+ <register addr="50320040" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320044" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320048" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5032004c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320050" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320054" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320058" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5032005c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320060" rw_flags="RW" width="1" name="MAC_GRP_ACK_CONFIG_I1" comment="Configures immediate ACK behaviour for reception of Group Addressed frames"/>
+ <register addr="50320064" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_MANAGEMENT_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320068" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_CONTROL_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="5032006c" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_DATA_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320070" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_RESERVED_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320074" rw_flags="RW" width="4" name="MAC_BSSID_BYTE3_0_I1" comment="BSSID"/>
+ <register addr="50320078" rw_flags="RW" width="2" name="MAC_BSSID_BYTE5_4_I1" comment="BSSID"/>
+ <register addr="5032007c" rw_flags="RW" width="4" name="MAC_ALT_BSSID_BYTE3_0_I1" comment="Alternative BSSID"/>
+ <register addr="50320080" rw_flags="RW" width="2" name="MAC_ALT_BSSID_BYTE5_4_I1" comment="Alternative BSSID"/>
+ <register addr="50320084" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_01MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320088" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_02MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5032008c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_5M5BPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320090" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_11MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320094" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_06MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320098" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_09MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5032009c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_12MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_18MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a4" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_24MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a8" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_36MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200ac" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_48MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200b0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_54MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200b4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS0_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200b8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS1_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200bc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS2_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS3_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS4_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS5_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200cc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS6_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS7_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS8_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS9_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200dc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS10_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS11_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS12_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS13_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200ec" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS14_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS15_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS32_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f8" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200fc" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320100" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320104" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320108" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032010c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320110" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320114" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320118" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032011c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320120" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320124" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320128" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032012c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320130" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320134" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320138" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032013c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320140" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320144" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320148" rw_flags="RW" width="2" name="MAC_CTRL_MAC2_FLAGS_I1" comment="Flags [Configuration bits] register 2"/>
+ <register addr="5032014c" rw_flags="RW" width="2" name="MAC_CTRL_MAC3_FLAGS_I1" comment="Flags [Configuration bits] register 3"/>
+ <register addr="50320150" rw_flags="RW" width="2" name="MAC_CTRL_MAC4_FLAGS_I1" comment="Flags [Configuration bits] register 4"/>
+ <register addr="50320154" rw_flags="RW" width="2" name="MAC_CTRL_MAC5_FLAGS_I1" comment="Flags [Configuration bits] register 5"/>
+ <register addr="50320158" rw_flags="RW" width="2" name="MAC_CTRL_MAC6_FLAGS_I1" comment="Flags [Configuration bits] register 6"/>
+ <register addr="5032015c" rw_flags="RW" width="2" name="MAC_CTRL_MAC7_FLAGS_I1" comment="Flags [Configuration bits] register 7"/>
+ <register addr="50320160" rw_flags="RW" width="2" name="MAC_CTRL_MAC10_FLAGS_I1" comment="Flags [Configuration bits] register 10"/>
+ <register addr="50320164" rw_flags="RW" width="2" name="MAC_CTRL_MAC11_FLAGS_I1" comment="Flags [Configuration bits] register 11 (This replaces some ACTING_AS_AP functionality by splitting it into several programmable bits."/>
+ <register addr="50320168" rw_flags="RW" width="2" name="MAC_CTRL_MAC12_FLAGS_I1" comment="Flags [Configuration bits] register 12."/>
+ <register addr="5032016c" rw_flags="RW" width="2" name="MAC_RX_FILTER_CONFIG_I1" comment="RX filter configuration"/>
+ <register addr="50320170" rw_flags="RW" width="2" name="MAC_MIN_MPDU_LEN_I1" comment="Minimum RX MPDU length. Received MPDUs shorter than this are discarded."/>
+ <register addr="50320174" rw_flags="RW" width="2" name="MAC_MAX_MPDU_LEN_I1" comment="Maximum RX MPDU length. Received MPDUs longer than this are discarded."/>
+ <register addr="50320178" rw_flags="RW" width="2" name="MAC_CCA_CFG_I1" comment="Configures CCA utilisation."/>
+ <register addr="5032017c" rw_flags="RW" width="2" name="MAC_CTRL_RESPONSE_TX_LEVEL_I1" comment="Transmit level for control response frames."/>
+ <register addr="50320180" rw_flags="RW" width="1" name="MAC_CTRL_RESPONSE_TX_ANT_I1" comment="Transmit antenna configuration for control response frames."/>
+ <register addr="50320184" rw_flags="RW" width="2" name="MAC_AC_BK_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_BK EDCA queue."/>
+ <register addr="50320188" rw_flags="RW" width="2" name="MAC_AC_BE_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_BE EDCA queue."/>
+ <register addr="5032018c" rw_flags="RW" width="2" name="MAC_AC_VI_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_VI EDCA queue."/>
+ <register addr="50320190" rw_flags="RW" width="2" name="MAC_AC_VO_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_VO EDCA queue."/>
+ <register addr="50320194" rw_flags="R" width="2" name="MAC_TXOP_TIME_LEFT_I1" comment="The firmware can read from this register the time remaining in the current TXOP, in units of 1 us."/>
+ <register addr="50320198" rw_flags="RW" width="2" name="MAC_EIFS_I1" comment="Programmable EIFS"/>
+ <register addr="5032019c" rw_flags="RW" width="1" name="MAC_SLOT_TIME_US_I1" comment="Programmable slot time in us"/>
+ <register addr="503201a0" rw_flags="RW" width="2" name="MAC_NDP_MCS_I1" comment="Programs MCS used for HT NDP or VHT NDP transmission."/>
+ <register addr="503201a4" rw_flags="RW" width="2" name="MAC_BFER_CFG_I1" comment="Configures beamformer."/>
+ <register addr="503201a8" rw_flags="RW" width="2" name="MAC_BFEE_CFG_I1" comment="Configures beamformee."/>
+ <register addr="503201ac" rw_flags="RW" width="2" name="MAC_MCS_FEEDBACK_CONFIG_I1" comment="MCS feedback configuration"/>
+ <register addr="503201b0" rw_flags="RW" width="4" name="MAC_TID_QSIZE_MAP_I1" comment="Maps one of 16 TIDs to one of four queue sizes, for the purpose of setting the 'Queue Size' field in transmitted QoS frames."/>
+ <register addr="503201b4" rw_flags="RW" width="4" name="MAC_TID_QSIZE_I1" comment="Queue sizes numbers 0, 1, 2 and 3."/>
+ <register addr="503201b8" rw_flags="R" width="4" name="MAC_M_NAV_END_I1" comment="The firmware can read from this register the NAV end time."/>
+ <register addr="503201bc" rw_flags="R" width="4" name="MAC_NAV_BSSID_BYTE3_0_I1" comment="The firmware can read from this register the BSSID associated to the current NAV."/>
+ <register addr="503201c0" rw_flags="R" width="2" name="MAC_NAV_BSSID_BYTE5_4_I1" comment=""/>
+ <register addr="503201c4" rw_flags="R" width="4" name="MAC_TXOPHOLDER_BYTE3_0_I1" comment="The firmware can read from this register the TXOP holder associated to the current NAV."/>
+ <register addr="503201c8" rw_flags="R" width="2" name="MAC_TXOPHOLDER_BYTE5_4_I1" comment=""/>
+ <register addr="503201cc" rw_flags="R" width="1" name="MAC_NAV_SRC_I1" comment="NAV sources. See 802.11-1999 as amended in 802.11-2007."/>
+ <register addr="503201d0" rw_flags="RW" width="4" name="MAC_TX_SIFS_REF_I1" comment="Adjust the timing of Data frame following a CTS-to-self. This is nominally the time between the on-air end of frame to the point when MAC issues PHY RX End signal. This is measured in 25 ns units."/>
+ <register addr="503201d4" rw_flags="RW" width="4" name="MAC_TX_RIFS_REF_I1" comment="Adjust TX timing references to achieve RIFS transmission. This is 25 ns units."/>
+ <register addr="503201d8" rw_flags="RW" width="2" name="MAC_RESPONSE_DELAY_SIFS_I1" comment="Bits 7 down to 0 are programmable time in 25ns units to delay response frames such that SIFS is met. Bit 8 allows timing at the end of HT-MM short GI frames to be measured on 4us symbol boundaries. This affects SIFS timing of short GI frames."/>
+ <register addr="503201dc" rw_flags="RW" width="2" name="MAC_TXEND_LATENCY_I1" comment="The time between the modem sending a 'TX End' signal to the actual on-air end of frame. This is measured in 25 ns units. This is used as an 'off-air' indicator. "/>
+ <register addr="503201e0" rw_flags="RW" width="4" name="MAC_CSTATE_IFS_ADJUST_I1" comment="Adjust IFS timing for in channel state module"/>
+ <register addr="503201e4" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_11B_I1" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+) for 11b. This adjusts the position of the PHY preamble."/>
+ <register addr="503201e8" rw_flags="RW" width="2" name="MAC_PHYIF_SYMB_END_11B_I1" comment="Programmable time that adjust 11b RX latency to meet SIFS. The format is 4.6 unsigned. The integer part is in microseconds. The fractional part is in 25 ns."/>
+ <register addr="503201ec" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="503201f0" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_END_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="503201f4" rw_flags="RW" width="1" name="MAC_PHYIF_STBC_WITH_LDPC_SYMB_END_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE for a received frame containing both STBC and LDPC (+/-) for OFDM."/>
+ <register addr="503201f8" rw_flags="RW" width="2" name="MAC_PHYIF_STBC_LDPC_SYMB_END_ADJUST_I1" comment="Programmable time in 25us units that adjusts the symbol end time in MAC_PHY_INTERFACE for STBC or LDPC reception (+/-) for OFDM."/>
+ <register addr="503201fc" rw_flags="RW" width="1" name="MAC_PHYIF_RXSTART_ADJUST_I1" comment="Programmable time in 1us unit that adjusts the RX_START start time in MAC_PHY_INTERFACE."/>
+ <register addr="50320200" rw_flags="RW" width="1" name="MAC_TX_CTSRESPONSE_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the start of the TX of the frame sent at SIFS after a CTS TX or RX."/>
+ <register addr="50320204" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11A_I1" comment="Programmable time in us that the MAC waits for a response in 11a."/>
+ <register addr="50320208" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11B_I1" comment="Programmable time in us that the MAC waits for a response in 11b."/>
+ <register addr="5032020c" rw_flags="RW" width="2" name="MAC_RX_AMPDU_CFG_I1" comment="Receive A-MPDU configuration."/>
+ <register addr="50320210" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_I1" comment="Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop."/>
+ <register addr="50320214" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_CTS_I1" comment="The bottom 10 bits means secondary channel must be free for this amount of time (50ns unit) before it is declared non-busy for CTS response to a RTS signalling TA. Bits [13:10] is a signed number that adjusts the delay between the start of frame and the synchronisation start pulse from the modem."/>
+ <register addr="50320218" rw_flags="RW" width="2" name="MAC_TX_DELAY_FINE_TUNE_I1" comment="Transmit delay fine tune. Provides fine adjustment of inter-frame spacing."/>
+ <register addr="5032021c" rw_flags="RW" width="2" name="MAC_CS_LATENCY_I1" comment="CS latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to stretch CCA status from CS latency to nominal OFDM RX latency."/>
+ <register addr="50320220" rw_flags="RW" width="2" name="MAC_RADIO_SYNC_LATENCY_I1" comment="Radio sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between modem indicates CCA busy to the start of packet pulse."/>
+ <register addr="50320224" rw_flags="RW" width="2" name="MAC_MODEM_SYNC_LATENCY_I1" comment="Modem sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between OFDM STF sync to the start of packet pulse."/>
+ <register addr="50320228" rw_flags="RW" width="1" name="MAC_DEFAULT_AMPDU_DURATION_I1" comment="This is the duration of an A-MPDU frame exchange when it is the next frame from the frame at the head of a queue."/>
+ <register addr="5032022c" rw_flags="RW" width="4" name="MAC_MAX_ACK_DURATION_I1" comment="Maximum ACK duration for DSSS/CCK and OFDM."/>
+ <register addr="50320230" rw_flags="R" width="4" name="MAC_DOT11_FCS_ERROR_COUNT_I1" comment="Received frame FCS error counter."/>
+ <register addr="50320234" rw_flags="R" width="4" name="MAC_DOT11_FCS_GOOD_COUNT_I1" comment="Received frame FCS good counter."/>
+ <register addr="50320238" rw_flags="R" width="4" name="MAC_DOT11_ERROR_COUNT_I1" comment="Received frame error counter that is NOT a FCS error."/>
+ <register addr="5032023c" rw_flags="R" width="4" name="MAC_BAD_SIG_COUNT_I1" comment="Received frame bad signal counter."/>
+ <register addr="50320240" rw_flags="R" width="4" name="MAC_TX_UNDER_COUNT_I1" comment="TX frames which were corrupted by the accelerator due to TX underflow."/>
+ <register addr="50320244" rw_flags="R" width="4" name="MAC_RX_VHT_MU_UNMATCHED_GID_I1" comment="VHT MU frames where GID does not match."/>
+ <register addr="50320248" rw_flags="R" width="2" name="MAC_AC_BK_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_BK queue, in units of 16 us."/>
+ <register addr="5032024c" rw_flags="R" width="4" name="MAC_DOT11_RX_OCTETS_IN_AMPDUS_I1" comment="Counts of the number of octets received in AMPDUs."/>
+ <register addr="50320250" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDUS_COUNT_I1" comment="Counts of the number of received AMPDUs."/>
+ <register addr="50320254" rw_flags="R" width="2" name="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT_I1" comment="Counts of the number of MPDUs received in AMPDUs."/>
+ <register addr="50320258" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT_I1" comment="Counts the number of length errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="5032025c" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT_I1" comment="Counts the number of start spacing errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50320260" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT_I1" comment="Counts the number of VHT single errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50320264" rw_flags="R" width="2" name="MAC_AC_BE_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_BE queue, in units of 16 us."/>
+ <register addr="50320268" rw_flags="R" width="2" name="MAC_AC_VI_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_VI queue, in units of 16 us."/>
+ <register addr="5032026c" rw_flags="R" width="2" name="MAC_AC_VO_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_VO queue, in units of 16 us."/>
+ <register addr="50320270" rw_flags="R" width="2" name="MAC_AC_CBR_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_CBR queue, in units of 16 us."/>
+ <register addr="50320274" rw_flags="R" width="2" name="MAC_TXRX_TIME_SPENT_I1" comment="This register counts the time spent transmitting and receiving, in units of 16 us."/>
+ <register addr="50320278" rw_flags="R" width="2" name="MAC_CCA_BUSY_TIME_I1" comment="This register counts the time CCA indicates busy, in units of 16 us."/>
+ <register addr="5032027c" rw_flags="R" width="2" name="MAC_SEC_BUSY_TIME_I1" comment="This register counts the time secondary channel is busy, in units of 16 us."/>
+ <register addr="50320280" rw_flags="R" width="2" name="MAC_SEC40_BUSY_TIME_I1" comment="This register counts the time secondary40 channel is busy, in units of 16 us."/>
+ <register addr="50320284" rw_flags="R" width="2" name="MAC_SEC80_BUSY_TIME_I1" comment="This register counts the time secondary80 channel is busy, in units of 16 us."/>
+ <register addr="50320288" rw_flags="RW" width="2" name="MAC_DEBUG_MUX_SEL_I1" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="5032028c" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_CFG_I1" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="50320290" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_SOURCE_I1" comment="For edge trigger modes, a '1' selects the source. For logic trigger modes, a '1' defines input."/>
+ <register addr="50320294" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_LEVEL_I1" comment="For logic trigger modes, each bit defines level for logic."/>
+ <register addr="50320298" rw_flags="RW" width="1" name="MAC_DEBUG_SELECT_I1" comment="Select register for MAC debug multiplexer."/>
+ <register addr="5032029c" rw_flags="R" width="2" name="MAC_DEBUG_X00_I1" comment="Debug bus."/>
+ <register addr="503202a0" rw_flags="R" width="2" name="MAC_DEBUG_X01_I1" comment="Debug bus."/>
+ <register addr="503202a4" rw_flags="R" width="2" name="MAC_DEBUG_X02_I1" comment="Debug bus."/>
+ <register addr="503202a8" rw_flags="R" width="2" name="MAC_DEBUG_X03_I1" comment="Debug bus."/>
+ <register addr="503202ac" rw_flags="R" width="2" name="MAC_DEBUG_X04_I1" comment="Debug bus."/>
+ <register addr="503202b0" rw_flags="R" width="2" name="MAC_DEBUG_X05_I1" comment="Debug bus."/>
+ <register addr="503202b4" rw_flags="R" width="2" name="MAC_DEBUG_X06_I1" comment="Debug bus."/>
+ <register addr="503202b8" rw_flags="R" width="2" name="MAC_DEBUG_X07_I1" comment="Debug bus."/>
+ <register addr="503202bc" rw_flags="R" width="2" name="MAC_DEBUG_X08_I1" comment="Debug bus."/>
+ <register addr="503202c0" rw_flags="R" width="2" name="MAC_DEBUG_X09_I1" comment="Debug bus."/>
+ <register addr="503202c4" rw_flags="R" width="2" name="MAC_DEBUG_X0A_I1" comment="Debug bus."/>
+ <register addr="503202c8" rw_flags="R" width="2" name="MAC_DEBUG_X0B_I1" comment="Debug bus."/>
+ <register addr="503202cc" rw_flags="R" width="2" name="MAC_DEBUG_X0C_I1" comment="Debug bus."/>
+ <register addr="503202d0" rw_flags="R" width="2" name="MAC_DEBUG_X0D_I1" comment="Debug bus."/>
+ <register addr="503202d4" rw_flags="R" width="2" name="MAC_DEBUG_X0E_I1" comment="Debug bus."/>
+ <register addr="503202d8" rw_flags="R" width="2" name="MAC_DEBUG_X0F_I1" comment="Debug bus."/>
+ <register addr="503202dc" rw_flags="R" width="2" name="MAC_DEBUG_X10_I1" comment="Debug bus."/>
+ <register addr="503202e0" rw_flags="R" width="2" name="MAC_DEBUG_X11_I1" comment="Debug bus."/>
+ <register addr="503202e4" rw_flags="R" width="2" name="MAC_DEBUG_X12_I1" comment="Debug bus."/>
+ <register addr="503202e8" rw_flags="R" width="2" name="MAC_DEBUG_X13_I1" comment="Debug bus."/>
+ <register addr="503202ec" rw_flags="R" width="2" name="MAC_DEBUG_X14_I1" comment="Debug bus."/>
+ <register addr="503202f0" rw_flags="R" width="2" name="MAC_DEBUG_X15_I1" comment="Debug bus."/>
+ <register addr="503202f4" rw_flags="R" width="2" name="MAC_DEBUG_X16_I1" comment="Debug bus."/>
+ <register addr="503202f8" rw_flags="R" width="2" name="MAC_DEBUG_X17_I1" comment="Debug bus."/>
+ <register addr="503202fc" rw_flags="R" width="2" name="MAC_DEBUG_X18_I1" comment="Debug bus."/>
+ <register addr="50320300" rw_flags="R" width="2" name="MAC_DEBUG_X19_I1" comment="Debug bus."/>
+ <register addr="50320304" rw_flags="R" width="2" name="MAC_DEBUG_X1A_I1" comment="Debug bus."/>
+ <register addr="50320308" rw_flags="R" width="2" name="MAC_DEBUG_X1B_I1" comment="Debug bus."/>
+ <register addr="5032030c" rw_flags="R" width="2" name="MAC_DEBUG_X1C_I1" comment="Debug bus."/>
+ <register addr="50320310" rw_flags="R" width="2" name="MAC_DEBUG_X1D_I1" comment="Debug bus."/>
+ <register addr="50320314" rw_flags="R" width="2" name="MAC_DEBUG_X1E_I1" comment="Debug bus."/>
+ <register addr="50320318" rw_flags="R" width="2" name="MAC_DEBUG_X1F_I1" comment="Debug bus."/>
+ <register addr="5032031c" rw_flags="R" width="2" name="MAC_DEBUG_X20_I1" comment="Debug bus."/>
+ <register addr="50320320" rw_flags="R" width="2" name="MAC_DEBUG_X21_I1" comment="Debug bus."/>
+ <register addr="50320324" rw_flags="R" width="2" name="MAC_DEBUG_X22_I1" comment="Debug bus."/>
+ <register addr="50320328" rw_flags="R" width="2" name="MAC_DEBUG_X23_I1" comment="Debug bus."/>
+ <register addr="5032032c" rw_flags="R" width="2" name="MAC_DEBUG_X24_I1" comment="Debug bus."/>
+ <register addr="50320330" rw_flags="R" width="2" name="MAC_DEBUG_X25_I1" comment="Debug bus."/>
+ <register addr="50320334" rw_flags="R" width="2" name="MAC_DEBUG_X26_I1" comment="Debug bus."/>
+ <register addr="50320338" rw_flags="R" width="2" name="MAC_DEBUG_X27_I1" comment="Debug bus."/>
+ <register addr="5032033c" rw_flags="R" width="2" name="MAC_DEBUG_X28_I1" comment="Debug bus."/>
+ <register addr="50320340" rw_flags="R" width="2" name="MAC_DEBUG_X29_I1" comment="Debug bus."/>
+ <register addr="50320344" rw_flags="R" width="2" name="MAC_DEBUG_X2A_I1" comment="Debug bus."/>
+ <register addr="50320348" rw_flags="R" width="2" name="MAC_DEBUG_X2B_I1" comment="Debug bus."/>
+ <register addr="5032034c" rw_flags="R" width="2" name="MAC_DEBUG_X2C_I1" comment="Debug bus."/>
+ <register addr="50320350" rw_flags="R" width="2" name="MAC_DEBUG_X2D_I1" comment="Debug bus."/>
+ <register addr="50320354" rw_flags="R" width="2" name="MAC_DEBUG_X2E_I1" comment="Debug bus."/>
+ <register addr="50320358" rw_flags="R" width="2" name="MAC_DEBUG_X2F_I1" comment="Debug bus."/>
+ <register addr="5032035c" rw_flags="R" width="2" name="MAC_DEBUG_X30_I1" comment="Debug bus."/>
+ <register addr="50320360" rw_flags="R" width="2" name="MAC_DEBUG_X31_I1" comment="Debug bus."/>
+ <register addr="50320364" rw_flags="R" width="2" name="MAC_DEBUG_X32_I1" comment="Debug bus."/>
+ <register addr="50320368" rw_flags="R" width="2" name="MAC_DEBUG_X33_I1" comment="Debug bus."/>
+ <register addr="5032036c" rw_flags="R" width="2" name="MAC_DEBUG_X34_I1" comment="Debug bus."/>
+ <register addr="50320370" rw_flags="R" width="2" name="MAC_DEBUG_X35_I1" comment="Debug bus."/>
+ <register addr="50320374" rw_flags="R" width="2" name="MAC_DEBUG_X36_I1" comment="Debug bus."/>
+ <register addr="50320378" rw_flags="R" width="2" name="MAC_DEBUG_X37_I1" comment="Debug bus."/>
+ <register addr="5032037c" rw_flags="R" width="1" name="MAC_SM_STATE_PHY_INTERFACE_I1" comment="State of state machine."/>
+ <register addr="50320380" rw_flags="R" width="1" name="MAC_SM_STATE_VALIDATE_MPDU_I1" comment="State of state machine."/>
+ <register addr="50320384" rw_flags="R" width="1" name="MAC_SM_STATE_FILTER_MPDU_I1" comment="State of state machine."/>
+ <register addr="50320388" rw_flags="R" width="1" name="MAC_SM_STATE_DEFRAGMENT_I1" comment="State of state machine."/>
+ <register addr="5032038c" rw_flags="R" width="1" name="MAC_SM_STATE_RX_COORDINATION_I1" comment="State of state machine."/>
+ <register addr="50320390" rw_flags="R" width="1" name="MAC_SM_STATE_CHANNEL_STATE_I1" comment="State of state machine."/>
+ <register addr="50320394" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BE_I1" comment="State of state machine."/>
+ <register addr="50320398" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BK_I1" comment="State of state machine."/>
+ <register addr="5032039c" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VI_I1" comment="State of state machine."/>
+ <register addr="503203a0" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VO_I1" comment="State of state machine."/>
+ <register addr="503203a4" rw_flags="R" width="1" name="MAC_SM_STATE_DATA_PUMP_I1" comment="State of state machine."/>
+ <register addr="503203a8" rw_flags="R" width="1" name="MAC_SM_STATE_TX_COORDINATION_I1" comment="State of state machine."/>
+ <register addr="503203ac" rw_flags="R" width="1" name="MAC_SM_STATE_TX_AGGREGATION_I1" comment="State of state machine."/>
+ <register addr="503203b0" rw_flags="R" width="1" name="MAC_SM_STATE_RX_DEAGGREGATION_I1" comment="State of state machine."/>
+ <register addr="503203b4" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMA_I1" comment="Time of last A modem start of packet."/>
+ <register addr="503203b8" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMB_I1" comment="Time of last B modem start of packet."/>
+ <register addr="503203bc" rw_flags="R" width="4" name="PDU_LAST_CBR_REQ_I1" comment="Time of last TX request on the CBR queue."/>
+ <register addr="503203c0" rw_flags="RW" width="4" name="MAC_BA_RX_0_PEER_ADDRESS_LSB_I1" comment="BA RX 0 peer address [31:0]"/>
+ <register addr="503203c4" rw_flags="RW" width="2" name="MAC_BA_RX_0_PEER_ADDRESS_MSB_I1" comment="BA RX 0 peer address [47:32]"/>
+ <register addr="503203c8" rw_flags="RW" width="4" name="MAC_BA_RX_0_CONFIG_I1" comment="BA RX 0 configuration"/>
+ <register addr="503203cc" rw_flags="RW" width="4" name="MAC_BA_RX_1_PEER_ADDRESS_LSB_I1" comment="BA RX 1 peer address [31:0]"/>
+ <register addr="503203d0" rw_flags="RW" width="2" name="MAC_BA_RX_1_PEER_ADDRESS_MSB_I1" comment="BA RX 1 peer address [47:32]"/>
+ <register addr="503203d4" rw_flags="RW" width="4" name="MAC_BA_RX_1_CONFIG_I1" comment="BA RX 1 configuration"/>
+ <register addr="503203d8" rw_flags="RW" width="4" name="MAC_BA_RX_2_PEER_ADDRESS_LSB_I1" comment="BA RX 2 peer address [31:0]"/>
+ <register addr="503203dc" rw_flags="RW" width="2" name="MAC_BA_RX_2_PEER_ADDRESS_MSB_I1" comment="BA RX 2 peer address [47:32]"/>
+ <register addr="503203e0" rw_flags="RW" width="4" name="MAC_BA_RX_2_CONFIG_I1" comment="BA RX 2 configuration"/>
+ <register addr="503203e4" rw_flags="RW" width="4" name="MAC_BA_RX_3_PEER_ADDRESS_LSB_I1" comment="BA RX 3 peer address [31:0]"/>
+ <register addr="503203e8" rw_flags="RW" width="2" name="MAC_BA_RX_3_PEER_ADDRESS_MSB_I1" comment="BA RX 3 peer address [47:32]"/>
+ <register addr="503203ec" rw_flags="RW" width="4" name="MAC_BA_RX_3_CONFIG_I1" comment="BA RX 3 configuration"/>
+ <register addr="503203f0" rw_flags="RW" width="4" name="MAC_BA_RX_4_PEER_ADDRESS_LSB_I1" comment="BA RX 4 peer address [31:0]"/>
+ <register addr="503203f4" rw_flags="RW" width="2" name="MAC_BA_RX_4_PEER_ADDRESS_MSB_I1" comment="BA RX 4 peer address [47:32]"/>
+ <register addr="503203f8" rw_flags="RW" width="4" name="MAC_BA_RX_4_CONFIG_I1" comment="BA RX 4 configuration"/>
+ <register addr="503203fc" rw_flags="RW" width="4" name="MAC_BA_RX_5_PEER_ADDRESS_LSB_I1" comment="BA RX 5 peer address [31:0]"/>
+ <register addr="50320400" rw_flags="RW" width="2" name="MAC_BA_RX_5_PEER_ADDRESS_MSB_I1" comment="BA RX 5 peer address [47:32]"/>
+ <register addr="50320404" rw_flags="RW" width="4" name="MAC_BA_RX_5_CONFIG_I1" comment="BA RX 5 configuration"/>
+ <register addr="50320408" rw_flags="RW" width="4" name="MAC_BA_RX_6_PEER_ADDRESS_LSB_I1" comment="BA RX 6 peer address [31:0]"/>
+ <register addr="5032040c" rw_flags="RW" width="2" name="MAC_BA_RX_6_PEER_ADDRESS_MSB_I1" comment="BA RX 6 peer address [47:32]"/>
+ <register addr="50320410" rw_flags="RW" width="4" name="MAC_BA_RX_6_CONFIG_I1" comment="BA RX 6 configuration"/>
+ <register addr="50320414" rw_flags="RW" width="4" name="MAC_BA_RX_7_PEER_ADDRESS_LSB_I1" comment="BA RX 7 peer address [31:0]"/>
+ <register addr="50320418" rw_flags="RW" width="2" name="MAC_BA_RX_7_PEER_ADDRESS_MSB_I1" comment="BA RX 7 peer address [47:32]"/>
+ <register addr="5032041c" rw_flags="RW" width="4" name="MAC_BA_RX_7_CONFIG_I1" comment="BA RX 7 configuration"/>
+ <register addr="50320420" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_LSB_I1" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [31:0]"/>
+ <register addr="50320424" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_MSB_I1" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [63:32]"/>
+ <register addr="50320428" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_LSB_I1" comment="Current BA RX bitmap from the selected instance. [31:0]"/>
+ <register addr="5032042c" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_MSB_I1" comment="Current BA RX bitmap from the selected instance. [61:32]"/>
+ <register addr="50320430" rw_flags="RW" width="1" name="MAC_BA_RX_BITMAP_SELECT_I1" comment="Select which BA RX instance has its bitmap readable on MAC_BA_RX_BITMAP."/>
+ <register addr="50320434" rw_flags="RW" width="1" name="MAC_CHANGE_NAV_SOURCE_I1" comment="NAV Source"/>
+ <register addr="50320438" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_BSSID_LSB_I1" comment="BSSID [31:0]"/>
+ <register addr="5032043c" rw_flags="RW" width="2" name="MAC_CHANGE_NAV_BSSID_MSB_I1" comment="BSSID [47:32]"/>
+ <register addr="50320440" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_END_I1" comment="NAV End"/>
+ <register addr="50320444" rw_flags="RW" width="2" name="MAC_CHANGE_STATE_I1" comment="Change internal states"/>
+ </block>
+ <block name="wl_mac_acc_fast_0" comment="">
+ <register addr="50230000" rw_flags="R" width="4" name="MAC_ACC_STATUS_I0" comment="MAC Accerator status"/>
+ <register addr="50230004" rw_flags="R" width="2" name="MAC_IND_MAC_FLAGS_I0" comment="MAC status register"/>
+ <register addr="50230008" rw_flags="R" width="4" name="MAC_NO_ACK_COUNT_I0" comment="Counts correctly received frames that are not acknowledged because the MAC_IF is short of available receive slots."/>
+ <register addr="5023000c" rw_flags="RW" width="1" name="MAC_PAUSE_TX_QUEUES_I0" comment="Pause Tx queues if they are paused."/>
+ <register addr="50230010" rw_flags="RW" width="1" name="MAC_UNPAUSE_TX_QUEUES_I0" comment="Unpause Tx queues if they are paused."/>
+ <register addr="50230014" rw_flags="R" width="4" name="MAC_TIME_I0" comment="Current time."/>
+ <register addr="50230018" rw_flags="RW" width="4" name="MAC_TIMER_I0" comment="MAC timer can be used by firmware to generate interrupts when the accelerator's time reaches programmable values. This is can be used to achieved timed transmission."/>
+ <register addr="5023001c" rw_flags="RW" width="2" name="MAC_CTRL_MAC_FLAGS_I0" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50230020" rw_flags="RW" width="1" name="MAC_BFEE_FLAGS_I0" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50230024" rw_flags="RW" width="4" name="BFER_MAC_ADDRESS_BYTE3_0_I0" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="50230028" rw_flags="RW" width="2" name="BFER_MAC_ADDRESS_BYTE5_4_I0" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="5023002c" rw_flags="RW" width="4" name="BFEE_MAC_ADDRESS_BYTE3_0_I0" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50230030" rw_flags="RW" width="2" name="BFEE_MAC_ADDRESS_BYTE5_4_I0" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50230034" rw_flags="R" width="1" name="MAC_INT_ERROR_CAUSE_I0" comment="Cause of error in MAC_INT_ERROR"/>
+ <register addr="50230038" rw_flags="R" width="1" name="MAC_INT_TX_DENIED_CAUSE_I0" comment="Cause of error in MAC_INT_TX_DENIED"/>
+ <register addr="5023003c" rw_flags="R" width="4" name="MAC_INT_CAUSE_I0" comment="Interrupt cause register."/>
+ <register addr="50230040" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_LSB_I0" comment="BA TX bitmap bits 31 down to 0"/>
+ <register addr="50230044" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_MSB_I0" comment="BA TX bitmap bits 63 down to 32"/>
+ <register addr="50230048" rw_flags="R" width="4" name="MAC_BA_TX_STATUS_I0" comment="BA TX status information"/>
+ <register addr="5023004c" rw_flags="RW" width="4" name="MAC_INT_MASK_I0" comment="Interrupt mask register."/>
+ <register addr="50230050" rw_flags="RW" width="4" name="MAC_INT_CLEAR_I0" comment="Interrupt clear register"/>
+ <register addr="50230054" rw_flags="RW" width="4" name="MAC_TX_DEADLINE_I0" comment="Sets the transmit deadline with respect to time."/>
+ <register addr="50230058" rw_flags="R" width="4" name="MAC_BE_BK_BKOFF_COUNTER_I0" comment="BE and BK backoff counter"/>
+ <register addr="5023005c" rw_flags="R" width="4" name="MAC_VO_VI_BKOFF_COUNTER_I0" comment="VO and VI backoff counter"/>
+ <register addr="50230060" rw_flags="RW" width="2" name="MAC_BA_TX_MMSS_I0" comment="Sets A-MPDU TX minimum MPDU start spacing in words."/>
+ <register addr="50230064" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[0]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230068" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[1]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023006c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[2]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230070" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[3]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230074" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[4]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230078" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[5]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023007c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[6]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230080" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[7]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230084" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[8]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230088" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[9]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023008c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[10]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230090" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[11]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230094" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[12]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230098" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[13]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023009c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[14]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[15]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[16]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[17]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300ac" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[18]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[19]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[20]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[21]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300bc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[22]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[23]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[24]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[25]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300cc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[26]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[27]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[28]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[29]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300dc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[30]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[31]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[32]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[33]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300ec" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[34]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[35]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[36]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[37]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300fc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[38]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230100" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[39]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230104" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[40]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230108" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[41]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023010c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[42]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230110" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[43]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230114" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[44]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230118" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[45]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023011c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[46]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230120" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[47]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230124" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[48]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230128" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[49]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023012c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[50]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230130" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[51]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230134" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[52]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230138" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[53]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023013c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[54]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230140" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[55]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230144" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[56]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230148" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[57]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023014c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[58]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230150" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[59]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230154" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[60]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230158" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[61]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023015c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[62]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230160" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[63]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230164" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[0]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230168" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[1]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023016c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[2]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230170" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[3]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230174" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[4]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230178" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[5]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023017c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[6]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230180" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[7]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230184" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[8]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230188" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[9]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023018c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[10]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230190" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[11]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230194" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[12]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230198" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[13]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023019c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[14]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[15]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[16]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[17]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301ac" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[18]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[19]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[20]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[21]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301bc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[22]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[23]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[24]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[25]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301cc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[26]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[27]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[28]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[29]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301dc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[30]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[31]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[32]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[33]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301ec" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[34]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[35]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[36]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[37]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301fc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[38]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230200" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[39]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230204" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[40]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230208" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[41]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023020c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[42]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230210" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[43]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230214" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[44]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230218" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[45]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023021c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[46]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230220" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[47]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230224" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[48]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230228" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[49]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023022c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[50]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230230" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[51]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230234" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[52]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230238" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[53]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023023c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[54]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230240" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[55]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230244" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[56]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230248" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[57]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023024c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[58]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230250" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[59]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230254" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[60]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230258" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[61]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023025c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[62]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230260" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[63]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230264" rw_flags="RW" width="2" name="MAC_PDU_CANCEL_I0" comment="PDU cancel bitmap"/>
+ <register addr="50230268" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ADDR_I0" comment="PDU on CBR queue: Start address"/>
+ <register addr="5023026c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ID_LEN_I0" comment="PDU on CBR queue: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230270" rw_flags="RW" width="2" name="MAC_PDU_REQUEST_CBR_TX_RATE_I0" comment="PDU on CBR queue: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230274" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_TX_LEVEL_COEX_I0" comment="PDU on CBR queue: TX level and Coex"/>
+ <register addr="50230278" rw_flags="R" width="1" name="MAC_PDU_CBR_STATUS_I0" comment="CBR status"/>
+ <register addr="5023027c" rw_flags="R" width="1" name="MAC_TX_CBR_STATUS_I0" comment="CBR TX status"/>
+ <register addr="50230280" rw_flags="R" width="1" name="MAC_TX_RESP_STATUS_I0" comment="Resp TX status"/>
+ <register addr="50230284" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[0]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50230288" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[1]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="5023028c" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[2]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50230290" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[0]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="50230294" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[0]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230298" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[0]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023029c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[0]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[0]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[1]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="502302ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[1]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[1]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[1]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[1]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[2]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="502302c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[2]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302c8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[2]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302cc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302d0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[2]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302d4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[2]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302d8" rw_flags="R" width="4" name="MAC_PDU_BK_STATUS_I0" comment="BK status"/>
+ <register addr="502302dc" rw_flags="R" width="4" name="MAC_TX_BK_STATUS_I0" comment="BK TX status from the PHY"/>
+ <register addr="502302e0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[0]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="502302e4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[0]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302e8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[0]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302ec" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="502302f0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[0]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="502302f4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[0]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="502302f8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[1]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="502302fc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[1]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230300" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[1]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230304" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50230308" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[1]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="5023030c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[1]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50230310" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[2]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="50230314" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[2]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230318" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[2]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023031c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50230320" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[2]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="50230324" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[2]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50230328" rw_flags="R" width="4" name="MAC_PDU_BE_STATUS_I0" comment="BE status"/>
+ <register addr="5023032c" rw_flags="R" width="4" name="MAC_TX_BE_STATUS_I0" comment="BE TX status"/>
+ <register addr="50230330" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[0]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50230334" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[0]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230338" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[0]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023033c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230340" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[0]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50230344" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[0]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230348" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[1]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="5023034c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[1]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230350" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[1]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230354" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230358" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[1]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="5023035c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[1]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230360" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[2]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50230364" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[2]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230368" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[2]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023036c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230370" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[2]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50230374" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[2]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230378" rw_flags="R" width="4" name="MAC_PDU_VI_STATUS_I0" comment="VI status"/>
+ <register addr="5023037c" rw_flags="R" width="4" name="MAC_TX_VI_STATUS_I0" comment="VI TX status"/>
+ <register addr="50230380" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[0]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="50230384" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[0]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230388" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[0]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023038c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="50230390" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[0]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="50230394" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[0]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="50230398" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[1]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="5023039c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[1]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502303a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[1]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502303a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="502303a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[1]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="502303ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[1]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="502303b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[2]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="502303b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[2]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502303b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[2]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502303bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="502303c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[2]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="502303c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[2]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="502303c8" rw_flags="R" width="4" name="MAC_PDU_VO_STATUS_I0" comment="VO status"/>
+ <register addr="502303cc" rw_flags="R" width="4" name="MAC_TX_VO_STATUS_I0" comment="VO TX status"/>
+ </block>
+ <block name="wl_mac_acc_fast_1" comment="">
+ <register addr="50330000" rw_flags="R" width="4" name="MAC_ACC_STATUS_I1" comment="MAC Accerator status"/>
+ <register addr="50330004" rw_flags="R" width="2" name="MAC_IND_MAC_FLAGS_I1" comment="MAC status register"/>
+ <register addr="50330008" rw_flags="R" width="4" name="MAC_NO_ACK_COUNT_I1" comment="Counts correctly received frames that are not acknowledged because the MAC_IF is short of available receive slots."/>
+ <register addr="5033000c" rw_flags="RW" width="1" name="MAC_PAUSE_TX_QUEUES_I1" comment="Pause Tx queues if they are paused."/>
+ <register addr="50330010" rw_flags="RW" width="1" name="MAC_UNPAUSE_TX_QUEUES_I1" comment="Unpause Tx queues if they are paused."/>
+ <register addr="50330014" rw_flags="R" width="4" name="MAC_TIME_I1" comment="Current time."/>
+ <register addr="50330018" rw_flags="RW" width="4" name="MAC_TIMER_I1" comment="MAC timer can be used by firmware to generate interrupts when the accelerator's time reaches programmable values. This is can be used to achieved timed transmission."/>
+ <register addr="5033001c" rw_flags="RW" width="2" name="MAC_CTRL_MAC_FLAGS_I1" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50330020" rw_flags="RW" width="1" name="MAC_BFEE_FLAGS_I1" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50330024" rw_flags="RW" width="4" name="BFER_MAC_ADDRESS_BYTE3_0_I1" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="50330028" rw_flags="RW" width="2" name="BFER_MAC_ADDRESS_BYTE5_4_I1" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="5033002c" rw_flags="RW" width="4" name="BFEE_MAC_ADDRESS_BYTE3_0_I1" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50330030" rw_flags="RW" width="2" name="BFEE_MAC_ADDRESS_BYTE5_4_I1" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50330034" rw_flags="R" width="1" name="MAC_INT_ERROR_CAUSE_I1" comment="Cause of error in MAC_INT_ERROR"/>
+ <register addr="50330038" rw_flags="R" width="1" name="MAC_INT_TX_DENIED_CAUSE_I1" comment="Cause of error in MAC_INT_TX_DENIED"/>
+ <register addr="5033003c" rw_flags="R" width="4" name="MAC_INT_CAUSE_I1" comment="Interrupt cause register."/>
+ <register addr="50330040" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_LSB_I1" comment="BA TX bitmap bits 31 down to 0"/>
+ <register addr="50330044" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_MSB_I1" comment="BA TX bitmap bits 63 down to 32"/>
+ <register addr="50330048" rw_flags="R" width="4" name="MAC_BA_TX_STATUS_I1" comment="BA TX status information"/>
+ <register addr="5033004c" rw_flags="RW" width="4" name="MAC_INT_MASK_I1" comment="Interrupt mask register."/>
+ <register addr="50330050" rw_flags="RW" width="4" name="MAC_INT_CLEAR_I1" comment="Interrupt clear register"/>
+ <register addr="50330054" rw_flags="RW" width="4" name="MAC_TX_DEADLINE_I1" comment="Sets the transmit deadline with respect to time."/>
+ <register addr="50330058" rw_flags="R" width="4" name="MAC_BE_BK_BKOFF_COUNTER_I1" comment="BE and BK backoff counter"/>
+ <register addr="5033005c" rw_flags="R" width="4" name="MAC_VO_VI_BKOFF_COUNTER_I1" comment="VO and VI backoff counter"/>
+ <register addr="50330060" rw_flags="RW" width="2" name="MAC_BA_TX_MMSS_I1" comment="Sets A-MPDU TX minimum MPDU start spacing in words."/>
+ <register addr="50330064" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[0]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330068" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[1]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033006c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[2]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330070" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[3]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330074" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[4]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330078" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[5]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033007c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[6]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330080" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[7]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330084" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[8]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330088" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[9]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033008c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[10]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330090" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[11]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330094" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[12]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330098" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[13]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033009c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[14]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[15]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[16]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[17]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300ac" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[18]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[19]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[20]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[21]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300bc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[22]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[23]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[24]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[25]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300cc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[26]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[27]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[28]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[29]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300dc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[30]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[31]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[32]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[33]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300ec" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[34]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[35]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[36]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[37]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300fc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[38]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330100" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[39]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330104" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[40]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330108" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[41]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033010c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[42]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330110" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[43]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330114" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[44]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330118" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[45]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033011c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[46]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330120" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[47]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330124" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[48]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330128" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[49]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033012c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[50]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330130" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[51]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330134" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[52]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330138" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[53]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033013c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[54]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330140" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[55]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330144" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[56]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330148" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[57]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033014c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[58]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330150" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[59]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330154" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[60]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330158" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[61]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033015c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[62]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330160" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[63]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330164" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[0]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330168" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[1]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033016c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[2]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330170" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[3]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330174" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[4]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330178" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[5]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033017c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[6]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330180" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[7]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330184" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[8]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330188" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[9]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033018c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[10]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330190" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[11]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330194" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[12]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330198" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[13]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033019c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[14]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[15]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[16]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[17]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301ac" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[18]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[19]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[20]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[21]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301bc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[22]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[23]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[24]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[25]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301cc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[26]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[27]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[28]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[29]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301dc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[30]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[31]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[32]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[33]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301ec" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[34]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[35]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[36]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[37]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301fc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[38]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330200" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[39]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330204" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[40]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330208" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[41]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033020c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[42]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330210" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[43]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330214" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[44]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330218" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[45]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033021c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[46]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330220" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[47]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330224" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[48]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330228" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[49]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033022c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[50]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330230" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[51]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330234" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[52]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330238" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[53]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033023c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[54]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330240" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[55]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330244" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[56]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330248" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[57]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033024c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[58]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330250" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[59]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330254" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[60]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330258" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[61]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033025c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[62]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330260" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[63]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330264" rw_flags="RW" width="2" name="MAC_PDU_CANCEL_I1" comment="PDU cancel bitmap"/>
+ <register addr="50330268" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ADDR_I1" comment="PDU on CBR queue: Start address"/>
+ <register addr="5033026c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ID_LEN_I1" comment="PDU on CBR queue: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330270" rw_flags="RW" width="2" name="MAC_PDU_REQUEST_CBR_TX_RATE_I1" comment="PDU on CBR queue: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330274" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_TX_LEVEL_COEX_I1" comment="PDU on CBR queue: TX level and Coex"/>
+ <register addr="50330278" rw_flags="R" width="1" name="MAC_PDU_CBR_STATUS_I1" comment="CBR status"/>
+ <register addr="5033027c" rw_flags="R" width="1" name="MAC_TX_CBR_STATUS_I1" comment="CBR TX status"/>
+ <register addr="50330280" rw_flags="R" width="1" name="MAC_TX_RESP_STATUS_I1" comment="Resp TX status"/>
+ <register addr="50330284" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[0]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50330288" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[1]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="5033028c" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[2]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50330290" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[0]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="50330294" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[0]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330298" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[0]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033029c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[0]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[0]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[1]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="503302ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[1]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[1]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[1]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[1]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[2]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="503302c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[2]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302c8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[2]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302cc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302d0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[2]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302d4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[2]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302d8" rw_flags="R" width="4" name="MAC_PDU_BK_STATUS_I1" comment="BK status"/>
+ <register addr="503302dc" rw_flags="R" width="4" name="MAC_TX_BK_STATUS_I1" comment="BK TX status from the PHY"/>
+ <register addr="503302e0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[0]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="503302e4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[0]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302e8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[0]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302ec" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="503302f0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[0]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="503302f4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[0]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="503302f8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[1]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="503302fc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[1]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330300" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[1]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330304" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50330308" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[1]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="5033030c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[1]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50330310" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[2]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="50330314" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[2]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330318" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[2]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033031c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50330320" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[2]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="50330324" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[2]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50330328" rw_flags="R" width="4" name="MAC_PDU_BE_STATUS_I1" comment="BE status"/>
+ <register addr="5033032c" rw_flags="R" width="4" name="MAC_TX_BE_STATUS_I1" comment="BE TX status"/>
+ <register addr="50330330" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[0]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50330334" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[0]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330338" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[0]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033033c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330340" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[0]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50330344" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[0]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330348" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[1]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="5033034c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[1]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330350" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[1]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330354" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330358" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[1]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="5033035c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[1]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330360" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[2]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50330364" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[2]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330368" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[2]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033036c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330370" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[2]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50330374" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[2]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330378" rw_flags="R" width="4" name="MAC_PDU_VI_STATUS_I1" comment="VI status"/>
+ <register addr="5033037c" rw_flags="R" width="4" name="MAC_TX_VI_STATUS_I1" comment="VI TX status"/>
+ <register addr="50330380" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[0]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="50330384" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[0]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330388" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[0]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033038c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="50330390" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[0]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="50330394" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[0]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="50330398" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[1]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="5033039c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[1]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503303a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[1]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503303a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="503303a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[1]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="503303ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[1]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="503303b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[2]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="503303b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[2]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503303b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[2]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503303bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="503303c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[2]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="503303c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[2]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="503303c8" rw_flags="R" width="4" name="MAC_PDU_VO_STATUS_I1" comment="VO status"/>
+ <register addr="503303cc" rw_flags="R" width="4" name="MAC_TX_VO_STATUS_I1" comment="VO TX status"/>
+ </block>
+ <block name="wl_mac_if_0" comment="">
+ <register addr="50210000" rw_flags="RW" width="1" name="MAC_IF_CONTROL_I0" comment="General control register (state is persistant)"/>
+ <register addr="50210004" rw_flags="RW" width="1" name="MAC_IF_CONTROL_AMNESIC_I0" comment="General control register (state is transitory)"/>
+ <register addr="50210008" rw_flags="R" width="1" name="MAC_IF_STATUS_I0" comment="General status register"/>
+ <register addr="5021000c" rw_flags="RW" width="4" name="MAC_IF_RX_BUFFER_START_I0" comment="Address of start of Receive Buffer. Multiple of 1k. Address = MAC_IF_RX_BUFFER_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210010" rw_flags="RW" width="1" name="MAC_IF_RX_BUFFER_SIZE_I0" comment="Size of Receive Buffer. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210014" rw_flags="R" width="2" name="MAC_IF_RX_BUFFER_GIVE_I0" comment="Receive Buffer Write Pointer (updated only at Receive Dollop boundaries)"/>
+ <register addr="50210018" rw_flags="RW" width="2" name="MAC_IF_RX_BUFFER_TAKE_I0" comment="Receive Buffer Read Pointer"/>
+ <register addr="5021001c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_START_I0" comment="Address of start of Transmit Buffer 0. Multiple of 1k. Address = MAC_IF_TX_BUFFER0_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210020" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER0_SIZE_I0" comment="Size of Transmit Buffer 0. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210024" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_GIVE_I0" comment="Transmit Buffer 0 Write Pointer "/>
+ <register addr="50210028" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER0_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 0. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5021002c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 0 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210030" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_START_I0" comment="Address of start of Transmit Buffer 1. Multiple of 1k. Address = MAC_IF_TX_BUFFER1_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210034" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER1_SIZE_I0" comment="Size of Transmit Buffer 1. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210038" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_GIVE_I0" comment="Transmit Buffer 1 Write Pointer "/>
+ <register addr="5021003c" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER1_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 1. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210040" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 1 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210044" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_START_I0" comment="Address of start of Transmit Buffer 2. Multiple of 1k. Address = MAC_IF_TX_BUFFER2_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210048" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER2_SIZE_I0" comment="Size of Transmit Buffer 2. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="5021004c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_GIVE_I0" comment="Transmit Buffer 2 Write Pointer "/>
+ <register addr="50210050" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER2_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 2. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210054" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 2 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210058" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_START_I0" comment="Address of start of Transmit Buffer 3. Multiple of 1k. Address = MAC_IF_TX_BUFFER3_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="5021005c" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER3_SIZE_I0" comment="Size of Transmit Buffer 3. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210060" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_GIVE_I0" comment="Transmit Buffer 3 Write Pointer "/>
+ <register addr="50210064" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER3_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 3. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210068" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 3 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="5021006c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_START_I0" comment="Address of start of Transmit Buffer 4. Multiple of 1k. Address = MAC_IF_TX_BUFFER4_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210070" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER4_SIZE_I0" comment="Size of Transmit Buffer 4. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210074" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_GIVE_I0" comment="Transmit Buffer 4 Write Pointer "/>
+ <register addr="50210078" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER4_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 4. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5021007c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 4 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210080" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_RAW_STATUS_I0" comment="Interrupt Raw Status register. This is a 'sticky' register. The (transient) interrupt sources can (only) set the bits to 1. Bits may be cleared to 0 by writing to MAC_IF_INTERRUPT_CLEAR. When the MAC IF is Disabled, the interrupt sources are prevented from updating INTERRUPT_RAW_STATUS"/>
+ <register addr="50210084" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_STATUS_I0" comment="Interrupt Status register. Value in this register is MAC_IF_INTERRUPT_RAW_STATUS ANDed with MAC_IF_INTERRUPT_ENABLE. If one or more of the bits in this register are 1, then the interrupt output signal from the MAC IF will be asserted"/>
+ <register addr="50210088" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_ENABLE_I0" comment="Interrupt Enable register. Allows the various interrupt sources to be enabled / masked. If masked (i.e. a bit is a 0), then the interrupt source will not cause an interrupt, but the source may still be polled via MAC_IF_INTERRUPT_RAW_STATUS"/>
+ <register addr="5021008c" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_CLEAR_I0" comment="Interrupt Clear register. Writing a 1 to a bit will clear (set to 0) the corresponding bit in MAC_IF_INTERRUPT_RAW_STATUS. Writing a 0 has no effect. The clear only lasts for one clock cycle; there is no need to write a 0 after writing a 1"/>
+ <register addr="50210090" rw_flags="RW" width="2" name="MAC_IF_DEBUG_SELECT_I0" comment="Debug Select"/>
+ <register addr="50210094" rw_flags="R" width="2" name="MAC_IF_DEBUG_STATUS_I0" comment="Debug Status"/>
+ </block>
+ <block name="wl_mac_if_1" comment="">
+ <register addr="50310000" rw_flags="RW" width="1" name="MAC_IF_CONTROL_I1" comment="General control register (state is persistant)"/>
+ <register addr="50310004" rw_flags="RW" width="1" name="MAC_IF_CONTROL_AMNESIC_I1" comment="General control register (state is transitory)"/>
+ <register addr="50310008" rw_flags="R" width="1" name="MAC_IF_STATUS_I1" comment="General status register"/>
+ <register addr="5031000c" rw_flags="RW" width="4" name="MAC_IF_RX_BUFFER_START_I1" comment="Address of start of Receive Buffer. Multiple of 1k. Address = MAC_IF_RX_BUFFER_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310010" rw_flags="RW" width="1" name="MAC_IF_RX_BUFFER_SIZE_I1" comment="Size of Receive Buffer. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310014" rw_flags="R" width="2" name="MAC_IF_RX_BUFFER_GIVE_I1" comment="Receive Buffer Write Pointer (updated only at Receive Dollop boundaries)"/>
+ <register addr="50310018" rw_flags="RW" width="2" name="MAC_IF_RX_BUFFER_TAKE_I1" comment="Receive Buffer Read Pointer"/>
+ <register addr="5031001c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_START_I1" comment="Address of start of Transmit Buffer 0. Multiple of 1k. Address = MAC_IF_TX_BUFFER0_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310020" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER0_SIZE_I1" comment="Size of Transmit Buffer 0. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310024" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_GIVE_I1" comment="Transmit Buffer 0 Write Pointer "/>
+ <register addr="50310028" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER0_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 0. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5031002c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 0 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310030" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_START_I1" comment="Address of start of Transmit Buffer 1. Multiple of 1k. Address = MAC_IF_TX_BUFFER1_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310034" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER1_SIZE_I1" comment="Size of Transmit Buffer 1. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310038" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_GIVE_I1" comment="Transmit Buffer 1 Write Pointer "/>
+ <register addr="5031003c" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER1_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 1. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310040" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 1 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310044" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_START_I1" comment="Address of start of Transmit Buffer 2. Multiple of 1k. Address = MAC_IF_TX_BUFFER2_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310048" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER2_SIZE_I1" comment="Size of Transmit Buffer 2. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="5031004c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_GIVE_I1" comment="Transmit Buffer 2 Write Pointer "/>
+ <register addr="50310050" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER2_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 2. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310054" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 2 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310058" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_START_I1" comment="Address of start of Transmit Buffer 3. Multiple of 1k. Address = MAC_IF_TX_BUFFER3_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="5031005c" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER3_SIZE_I1" comment="Size of Transmit Buffer 3. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310060" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_GIVE_I1" comment="Transmit Buffer 3 Write Pointer "/>
+ <register addr="50310064" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER3_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 3. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310068" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 3 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="5031006c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_START_I1" comment="Address of start of Transmit Buffer 4. Multiple of 1k. Address = MAC_IF_TX_BUFFER4_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310070" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER4_SIZE_I1" comment="Size of Transmit Buffer 4. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310074" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_GIVE_I1" comment="Transmit Buffer 4 Write Pointer "/>
+ <register addr="50310078" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER4_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 4. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5031007c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 4 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310080" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_RAW_STATUS_I1" comment="Interrupt Raw Status register. This is a 'sticky' register. The (transient) interrupt sources can (only) set the bits to 1. Bits may be cleared to 0 by writing to MAC_IF_INTERRUPT_CLEAR. When the MAC IF is Disabled, the interrupt sources are prevented from updating INTERRUPT_RAW_STATUS"/>
+ <register addr="50310084" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_STATUS_I1" comment="Interrupt Status register. Value in this register is MAC_IF_INTERRUPT_RAW_STATUS ANDed with MAC_IF_INTERRUPT_ENABLE. If one or more of the bits in this register are 1, then the interrupt output signal from the MAC IF will be asserted"/>
+ <register addr="50310088" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_ENABLE_I1" comment="Interrupt Enable register. Allows the various interrupt sources to be enabled / masked. If masked (i.e. a bit is a 0), then the interrupt source will not cause an interrupt, but the source may still be polled via MAC_IF_INTERRUPT_RAW_STATUS"/>
+ <register addr="5031008c" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_CLEAR_I1" comment="Interrupt Clear register. Writing a 1 to a bit will clear (set to 0) the corresponding bit in MAC_IF_INTERRUPT_RAW_STATUS. Writing a 0 has no effect. The clear only lasts for one clock cycle; there is no need to write a 0 after writing a 1"/>
+ <register addr="50310090" rw_flags="RW" width="2" name="MAC_IF_DEBUG_SELECT_I1" comment="Debug Select"/>
+ <register addr="50310094" rw_flags="R" width="2" name="MAC_IF_DEBUG_STATUS_I1" comment="Debug Status"/>
+ </block>
+ <block name="wl_radio" comment="">
+ <register addr="50100000" rw_flags="RW" width="2" name="WL_RADIO_DEBUG_CONTROL" comment="This register controls the selection of debug buses to be driven out of the module."/>
+ <register addr="50100004" rw_flags="RW" width="1" name="WL_RADIO_CONFIG" comment="Miscellaneous config bits"/>
+ <register addr="50100008" rw_flags="RW" width="2" name="WL_RADIO_TEMP_CTRL_CONFIG" comment="Control register for block interfacing to analogue temperature sensor"/>
+ <register addr="5010000c" rw_flags="RW" width="1" name="WL_RADIO_AGC_MIMO_CONFIG" comment="Select the AGC strategy for MIMO"/>
+ <register addr="50100010" rw_flags="RW" width="4" name="WL_RADIO_CLOCK_CONTROL" comment="Enable/disable Radio Clocks"/>
+ <register addr="50100014" rw_flags="RW" width="4" name="WL_RADIO_MISC" comment="This register reserved for miscellaneous tasks."/>
+ </block>
+ <block name="wl_radio_ss_0" comment="">
+ <register addr="50110000" rw_flags="R" width="2" name="WL_RADIO_RX_COMP_AUTO_COEFFS_I0" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the WL_RADIO_RX_COMP_LUT_READ_EN bit in the WL_RADIO_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50110004" rw_flags="R" width="1" name="WL_RADIO_RX_PHASE_COMP_LUT_STATUS_I0" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="50110008" rw_flags="R" width="1" name="WL_RADIO_RX_AMPL_COMP_LUT_STATUS_I0" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="5011000c" rw_flags="R" width="1" name="WL_RADIO_DIG_GAIN_STATUS_I0" comment="This register contains the current gain settings to all digital blocks in the receive chain"/>
+ <register addr="50110010" rw_flags="R" width="2" name="WL_RADIO_CHANNEL_STATUS_I0" comment="This register contains the instantaneous value of the RSSI, CCA and CS of this receive chain"/>
+ <register addr="50110014" rw_flags="RW" width="1" name="WL_RADIO_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50110018" rw_flags="RW" width="1" name="WL_RADIO_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5011001c" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110020" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_RAW_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110024" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50110028" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5011002c" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110030" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_RAW_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110034" rw_flags="R" width="1" name="WL_RADIO_RF_INTS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110038" rw_flags="R" width="2" name="WLRF_TEMP_STATUS_I0" comment="This register contains the temperature measurements from the RF chip via speedy"/>
+ <register addr="5011003c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="50110040" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="50110044" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="50110048" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="5011004c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="50110050" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="50110054" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="50110058" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="5011005c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT0_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="50110060" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT1_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110064" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT2_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110068" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT3_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5011006c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT4_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110070" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT5_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110074" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT6_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110078" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT7_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5011007c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="50110080" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="50110084" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="50110088" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="5011008c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="50110090" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="50110094" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="50110098" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="5011009c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="501100a0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT0_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="501100a4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT1_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100a8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT2_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100ac" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT3_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT4_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT5_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT6_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100bc" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT7_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100c0" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="501100c4" rw_flags="R" width="1" name="WL_RADIO_TIMER_TX_SLOT_I0" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="501100c8" rw_flags="R" width="1" name="WL_RADIO_TIMER_RX_SLOT_I0" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="501100cc" rw_flags="R" width="2" name="WL_RADIO_ENABLES_STATUS_I0" comment="This register contains the current values of the Radio Enables, after all masking and multiplexing"/>
+ <register addr="501100d0" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_I0" comment="Default values for radio enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="501100d4" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_MASK_I0" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output."/>
+ <register addr="501100d8" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_TX_TRAIN_MASK_I0" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output. Used only when predistort training is active to allow Rx blocks to be turned on"/>
+ <register addr="501100dc" rw_flags="R" width="2" name="WL_RADIO_DEBUG_STATUS_I0" comment="This read-only register returns the current state of the debug bus within radio control."/>
+ <register addr="501100e0" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG1_I0" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="501100e4" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG2_I0" comment="Configuration bits for the AGC: initial gain settings before first update comes from RF chip"/>
+ <register addr="501100e8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG3_I0" comment="Configuration bits for the AGC: digital gain range definition. Also initial baseband gain until first update arrives from RF chip"/>
+ <register addr="501100ec" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG4_I0" comment="Further configuration bits for the AGC: digital gain settings"/>
+ <register addr="501100f0" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG5_I0" comment="Further configuration bits for the AGC: clipping detection behaviour"/>
+ <register addr="501100f4" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG6_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501100f8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG7_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501100fc" rw_flags="RW" width="1" name="WL_RADIO_AGC_CONFIG8_I0" comment="Further configuration bits for the AGC. Debug select"/>
+ <register addr="50110100" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG9_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50110104" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG10_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50110108" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG11_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="5011010c" rw_flags="RW" width="4" name="WL_RADIO_AGC_TIMEOUT_I0" comment="This register specifies programmable timeouts for the AGC"/>
+ <register addr="50110110" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME_I0" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50110114" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME2_I0" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50110118" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_I0" comment="This register specifies the RSSI target for an OFDM receive burst after decimation."/>
+ <register addr="5011011c" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_I0" comment="This register specifies the RSSI target for a CCK receive burst after decimation."/>
+ <register addr="50110120" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_DELTA_I0" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a OFDM receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50110124" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_DELTA_I0" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a CCK receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50110128" rw_flags="RW" width="4" name="WL_RADIO_CS_CONFIG_I0" comment="This register configures the carrier sense. It is flagged when analogue gain is less than a threshold and digital RSSI is greater than a threshold. The thresholds are set in this register"/>
+ <register addr="5011012c" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG_I0" comment="Coadj general config register"/>
+ <register addr="50110130" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG2_I0" comment="Coadj general config register 2"/>
+ <register addr="50110134" rw_flags="R" width="4" name="WL_RADIO_COADJ_STATUS_I0" comment="Coadj general status register"/>
+ <register addr="50110138" rw_flags="RW" width="2" name="WL_RADIO_COADJ_TIMER_I0" comment="Timer initial value, downcount at core clk rate starts on write"/>
+ <register addr="5011013c" rw_flags="RW" width="1" name="WL_RADIO_COADJ_MEM_ADDR_I0" comment="Coadj Code/Data Mem Address. MSBs=2'b00: DataStore, 2'b10: Core internal regs, 2'b11: Local regs"/>
+ <register addr="50110140" rw_flags="RW" width="4" name="WL_RADIO_COADJ_MEM_WDATA_I0" comment="Coadj Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="50110144" rw_flags="R" width="4" name="WL_RADIO_COADJ_MEM_RDATA_I0" comment="Coadj Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="50110148" rw_flags="RW" width="2" name="WL_RADIO_ZIPPY_TO_RF_FLAGS_I0" comment="Zippy flag data (info and channel) to be sent to RFIC"/>
+ <register addr="5011014c" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_BB_FILTER_I0" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the BBIC"/>
+ <register addr="50110150" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_RF_RESV_I0" comment="Zippy reserved signal for SW data to the RFIC"/>
+ <register addr="50110154" rw_flags="R" width="2" name="WL_RADIO_ZIPPY_TO_BB_FLAGS_I0" comment="Zippy flag data to the BBIC, plus latched Valid and Ack"/>
+ </block>
+ <block name="wl_radio_ss_1" comment="">
+ <register addr="50120000" rw_flags="R" width="2" name="WL_RADIO_RX_COMP_AUTO_COEFFS_I1" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the WL_RADIO_RX_COMP_LUT_READ_EN bit in the WL_RADIO_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50120004" rw_flags="R" width="1" name="WL_RADIO_RX_PHASE_COMP_LUT_STATUS_I1" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="50120008" rw_flags="R" width="1" name="WL_RADIO_RX_AMPL_COMP_LUT_STATUS_I1" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="5012000c" rw_flags="R" width="1" name="WL_RADIO_DIG_GAIN_STATUS_I1" comment="This register contains the current gain settings to all digital blocks in the receive chain"/>
+ <register addr="50120010" rw_flags="R" width="2" name="WL_RADIO_CHANNEL_STATUS_I1" comment="This register contains the instantaneous value of the RSSI, CCA and CS of this receive chain"/>
+ <register addr="50120014" rw_flags="RW" width="1" name="WL_RADIO_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50120018" rw_flags="RW" width="1" name="WL_RADIO_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5012001c" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120020" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_RAW_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120024" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50120028" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5012002c" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120030" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_RAW_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120034" rw_flags="R" width="1" name="WL_RADIO_RF_INTS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120038" rw_flags="R" width="2" name="WLRF_TEMP_STATUS_I1" comment="This register contains the temperature measurements from the RF chip via speedy"/>
+ <register addr="5012003c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="50120040" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="50120044" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="50120048" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="5012004c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="50120050" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="50120054" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="50120058" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="5012005c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT0_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="50120060" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT1_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120064" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT2_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120068" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT3_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5012006c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT4_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120070" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT5_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120074" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT6_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120078" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT7_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5012007c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="50120080" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="50120084" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="50120088" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="5012008c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="50120090" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="50120094" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="50120098" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="5012009c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="501200a0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT0_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="501200a4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT1_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200a8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT2_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200ac" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT3_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT4_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT5_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT6_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200bc" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT7_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200c0" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="501200c4" rw_flags="R" width="1" name="WL_RADIO_TIMER_TX_SLOT_I1" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="501200c8" rw_flags="R" width="1" name="WL_RADIO_TIMER_RX_SLOT_I1" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="501200cc" rw_flags="R" width="2" name="WL_RADIO_ENABLES_STATUS_I1" comment="This register contains the current values of the Radio Enables, after all masking and multiplexing"/>
+ <register addr="501200d0" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_I1" comment="Default values for radio enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="501200d4" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_MASK_I1" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output."/>
+ <register addr="501200d8" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_TX_TRAIN_MASK_I1" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output. Used only when predistort training is active to allow Rx blocks to be turned on"/>
+ <register addr="501200dc" rw_flags="R" width="2" name="WL_RADIO_DEBUG_STATUS_I1" comment="This read-only register returns the current state of the debug bus within radio control."/>
+ <register addr="501200e0" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG1_I1" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="501200e4" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG2_I1" comment="Configuration bits for the AGC: initial gain settings before first update comes from RF chip"/>
+ <register addr="501200e8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG3_I1" comment="Configuration bits for the AGC: digital gain range definition. Also initial baseband gain until first update arrives from RF chip"/>
+ <register addr="501200ec" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG4_I1" comment="Further configuration bits for the AGC: digital gain settings"/>
+ <register addr="501200f0" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG5_I1" comment="Further configuration bits for the AGC: clipping detection behaviour"/>
+ <register addr="501200f4" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG6_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501200f8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG7_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501200fc" rw_flags="RW" width="1" name="WL_RADIO_AGC_CONFIG8_I1" comment="Further configuration bits for the AGC. Debug select"/>
+ <register addr="50120100" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG9_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50120104" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG10_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50120108" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG11_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="5012010c" rw_flags="RW" width="4" name="WL_RADIO_AGC_TIMEOUT_I1" comment="This register specifies programmable timeouts for the AGC"/>
+ <register addr="50120110" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME_I1" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50120114" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME2_I1" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50120118" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_I1" comment="This register specifies the RSSI target for an OFDM receive burst after decimation."/>
+ <register addr="5012011c" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_I1" comment="This register specifies the RSSI target for a CCK receive burst after decimation."/>
+ <register addr="50120120" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_DELTA_I1" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a OFDM receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50120124" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_DELTA_I1" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a CCK receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50120128" rw_flags="RW" width="4" name="WL_RADIO_CS_CONFIG_I1" comment="This register configures the carrier sense. It is flagged when analogue gain is less than a threshold and digital RSSI is greater than a threshold. The thresholds are set in this register"/>
+ <register addr="5012012c" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG_I1" comment="Coadj general config register"/>
+ <register addr="50120130" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG2_I1" comment="Coadj general config register 2"/>
+ <register addr="50120134" rw_flags="R" width="4" name="WL_RADIO_COADJ_STATUS_I1" comment="Coadj general status register"/>
+ <register addr="50120138" rw_flags="RW" width="2" name="WL_RADIO_COADJ_TIMER_I1" comment="Timer initial value, downcount at core clk rate starts on write"/>
+ <register addr="5012013c" rw_flags="RW" width="1" name="WL_RADIO_COADJ_MEM_ADDR_I1" comment="Coadj Code/Data Mem Address. MSBs=2'b00: DataStore, 2'b10: Core internal regs, 2'b11: Local regs"/>
+ <register addr="50120140" rw_flags="RW" width="4" name="WL_RADIO_COADJ_MEM_WDATA_I1" comment="Coadj Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="50120144" rw_flags="R" width="4" name="WL_RADIO_COADJ_MEM_RDATA_I1" comment="Coadj Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="50120148" rw_flags="RW" width="2" name="WL_RADIO_ZIPPY_TO_RF_FLAGS_I1" comment="Zippy flag data (info and channel) to be sent to RFIC"/>
+ <register addr="5012014c" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_BB_FILTER_I1" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the BBIC"/>
+ <register addr="50120150" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_RF_RESV_I1" comment="Zippy reserved signal for SW data to the RFIC"/>
+ <register addr="50120154" rw_flags="R" width="2" name="WL_RADIO_ZIPPY_TO_BB_FLAGS_I1" comment="Zippy flag data to the BBIC, plus latched Valid and Ack"/>
+ </block>
+ <block name="wl_shared" comment="">
+ <register addr="50600000" rw_flags="RW" width="1" name="WL_DEBUG_SEL" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600004" rw_flags="R" width="2" name="WL_DEBUG_STATUS" comment="Debug data at WLan_pd level"/>
+ <register addr="50600008" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_3_0" comment="Select for WLan_pd level debug mux"/>
+ <register addr="5060000c" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_7_4" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600010" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_11_8" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600014" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_15_12" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600018" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_0_SEL" comment="Source bus select for intermediate bus 0 (select one of up to 32 busses)"/>
+ <register addr="5060001c" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_1_SEL" comment="Source bus select for intermediate bus 1 (select one of up to 32 busses)"/>
+ <register addr="50600020" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_2_SEL" comment="Source bus select for intermediate bus 2 (select one of up to 32 busses)"/>
+ <register addr="50600024" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_3_SEL" comment="Source bus select for intermediate bus 3 (select one of up to 32 busses)"/>
+ </block>
+ <block name="wl_speedy_0" comment="">
+ <register addr="50130000" rw_flags="RW" width="4" name="WL_SPEEDY_ADDR_CTRL_I0" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="50130004" rw_flags="RW" width="4" name="WL_SPEEDY_WRITE_DATA_I0" comment="Data to write to APB over Speedy"/>
+ <register addr="50130008" rw_flags="R" width="4" name="WL_SPEEDY_READ_DATA_I0" comment="Data read back for APB over Speedy"/>
+ <register addr="5013000c" rw_flags="R" width="1" name="WL_SPEEDY_APB_STATUS_I0" comment="Status of the current APB cycle"/>
+ <register addr="50130010" rw_flags="RW" width="1" name="WL_SPEEDY_ERROR_RECOVERY_I0" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="wl_speedy_1" comment="">
+ <register addr="50140000" rw_flags="RW" width="4" name="WL_SPEEDY_ADDR_CTRL_I1" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="50140004" rw_flags="RW" width="4" name="WL_SPEEDY_WRITE_DATA_I1" comment="Data to write to APB over Speedy"/>
+ <register addr="50140008" rw_flags="R" width="4" name="WL_SPEEDY_READ_DATA_I1" comment="Data read back for APB over Speedy"/>
+ <register addr="5014000c" rw_flags="R" width="1" name="WL_SPEEDY_APB_STATUS_I1" comment="Status of the current APB cycle"/>
+ <register addr="50140010" rw_flags="RW" width="1" name="WL_SPEEDY_ERROR_RECOVERY_I1" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="xdmac" comment="">
+ <register addr="56300000" rw_flags="RW" width="1" name="XDMAC_RESERVED0" comment="Reserved register."/>
+ <register addr="56300004" rw_flags="RW" width="1" name="XDMAC_RESERVED4" comment="Reserved register."/>
+ <register addr="56300008" rw_flags="RW" width="1" name="XDMAC_RESERVED8" comment="Reserved register."/>
+ <register addr="5630000c" rw_flags="R" width="1" name="XDMAC_INT_TC_STATUS" comment="Transfer Complete Interrupt Status Register."/>
+ <register addr="56300010" rw_flags="W" width="1" name="XDMAC_INT_TC_CLR" comment="Transfer Complete Interrupt Clear Register (Value is not meaningful)"/>
+ <register addr="56300014" rw_flags="RW" width="1" name="XDMAC_INT_TC_MASK" comment="Transfer Complete Interrupt Mask Register (0: Interrupt disabled, 1 : Interrupt enabled)"/>
+ <register addr="56300018" rw_flags="R" width="1" name="XDMAC_ERR_STATUS" comment="Error Status Register"/>
+ <register addr="5630001c" rw_flags="RW" width="1" name="XDMAC_RESERVED1C" comment="Reserved register."/>
+ <register addr="56300020" rw_flags="RW" width="1" name="XDMAC_RESERVED20" comment="Reserved register."/>
+ <register addr="56300024" rw_flags="W" width="1" name="XDMAC_START" comment="DMA Transfer Start (Value is not meaningful). Do NOT start DMA again until the previously started DMA transfer is completed."/>
+ <register addr="56300028" rw_flags="RW" width="1" name="XDMAC_ICG_DISABLE" comment="Internal clock gating is disabled (0 : Clock gating enabled, 1 : Clock gatingdisabled)"/>
+ <register addr="5630002c" rw_flags="RW" width="4" name="XDMAC_CONFIG" comment="Configuration Register"/>
+ <register addr="56300030" rw_flags="RW" width="4" name="XDMAC_LLI_SRC_ADDR" comment="Source Address Register (Linked List Item)"/>
+ <register addr="56300034" rw_flags="RW" width="4" name="XDMAC_LLI_DST_ADDR" comment="Destination Address Register (Linked List Item)"/>
+ <register addr="56300038" rw_flags="RW" width="4" name="XDMAC_LLI_NXT_ADDR" comment="Next Address Register to indicate the next linked list item (Linked List Item)"/>
+ <register addr="5630003c" rw_flags="RW" width="4" name="XDMAC_LLI_CTRL" comment=""/>
+ </block>
+ <block name="zippy_bb" comment="">
+ <register addr="56100000" rw_flags="RW" width="4" name="ZIPPY_BB_ADDR_CTRL" comment="ZIPPY remote register access address and controls. The bottom 16 bits of this register (PSEL and ADDR) are actually the bottom 16 bits of the byte address of the RFIC register to be accessed (from HTML docs for example)"/>
+ <register addr="56100004" rw_flags="RW" width="4" name="ZIPPY_BB_WRITE_DATA" comment="Data to write to remote register over ZIPPY. Only the number of bytes specified in the ZIPPY_BB_WIDTH field are transferred. Unwritten bytes are unchanged, if the destination register is larger than the number of bytes written"/>
+ <register addr="56100008" rw_flags="R" width="4" name="ZIPPY_BB_READ_DATA" comment="Data returned from the remote register over ZIPPY. Only the number of bytes specified in the ZIPPY_BB_WIDTH field are transferred"/>
+ <register addr="5610000c" rw_flags="RW" width="4" name="ZIPPY_BB_TIMEOUTS" comment="Time out control for register read data and write acknowledges (if enabled) to be returned from the RF IC"/>
+ <register addr="56100010" rw_flags="RW" width="2" name="ZIPPY_BB_TRANSPORT" comment="ZIPPY baseband transport configuration. The matching configuration must also be set up in the RF chip"/>
+ <register addr="56100014" rw_flags="RW" width="1" name="ZIPPY_BB_PRIORITY_INC_RATE" comment="Configure the rate at which priority increases for unserviced channels. "/>
+ <register addr="56100018" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS0_CFG" comment="Type 0 (BT) flag frame configuration"/>
+ <register addr="5610001c" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS1_CFG" comment="Type 1 (BT) flag frame configuration"/>
+ <register addr="56100020" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS2_CFG" comment="Type 2 (BT) flag frame configuration"/>
+ <register addr="56100024" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS3_CFG" comment="Type 3 (WLAN) flag frame configuration"/>
+ <register addr="56100028" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS4_CFG" comment="Type 4 (WLAN) flag frame configuration"/>
+ <register addr="5610002c" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS5_CFG" comment="Type 5 (WLAN) flag frame configuration"/>
+ <register addr="56100030" rw_flags="RW" width="4" name="ZIPPY_BB_DATA_CFG" comment="Address/data frame configuration and write ack mask"/>
+ <register addr="56100034" rw_flags="RW" width="4" name="ZIPPY_BB_INT_EN" comment="Interrupt sources enable."/>
+ <register addr="56100038" rw_flags="R" width="4" name="ZIPPY_BB_INT_STATUS" comment="Status of Interrupt sources."/>
+ <register addr="5610003c" rw_flags="W" width="4" name="ZIPPY_BB_INT_CLEAR" comment="Clear Interrupt Sources by writing a 1 to the register bit."/>
+ <register addr="56100040" rw_flags="R" width="2" name="ZIPPY_BB_APB_STATUS" comment="Status of the RF IC register access"/>
+ <register addr="56100044" rw_flags="R" width="2" name="ZIPPY_BB_DATA_COUNTS" comment="Local BB counters for data from BB to RF and RF to BB. TO be compared with equivalent ones in the RFIC"/>
+ <register addr="56100048" rw_flags="RW" width="1" name="ZIPPY_BB_DEBUG_SEL" comment=""/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_gic subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_gic">
+ <block name="periph_gic" comment="">
+ <register addr="58001000" rw_flags="RW" width="4" name="ICDDCR" comment="Distributor Controller Register"/>
+ <register addr="58001004" rw_flags="R" width="4" name="ICDICTR" comment="Interrupt Controller Type Register"/>
+ <register addr="58001008" rw_flags="R" width="4" name="ICDIIDR" comment="Distributor Implementer Identification Register"/>
+ <register addr="58001100" rw_flags="RW" width="4" name="ICDISER[0]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001104" rw_flags="RW" width="4" name="ICDISER[1]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001108" rw_flags="RW" width="4" name="ICDISER[2]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800110c" rw_flags="RW" width="4" name="ICDISER[3]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001110" rw_flags="RW" width="4" name="ICDISER[4]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001114" rw_flags="RW" width="4" name="ICDISER[5]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001118" rw_flags="RW" width="4" name="ICDISER[6]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800111c" rw_flags="RW" width="4" name="ICDISER[7]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001120" rw_flags="RW" width="4" name="ICDISER[8]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001124" rw_flags="RW" width="4" name="ICDISER[9]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001128" rw_flags="RW" width="4" name="ICDISER[10]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800112c" rw_flags="RW" width="4" name="ICDISER[11]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001130" rw_flags="RW" width="4" name="ICDISER[12]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001134" rw_flags="RW" width="4" name="ICDISER[13]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001138" rw_flags="RW" width="4" name="ICDISER[14]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800113c" rw_flags="RW" width="4" name="ICDISER[15]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001180" rw_flags="RW" width="4" name="ICDICER[0]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001184" rw_flags="RW" width="4" name="ICDICER[1]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001188" rw_flags="RW" width="4" name="ICDICER[2]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="5800118c" rw_flags="RW" width="4" name="ICDICER[3]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001190" rw_flags="RW" width="4" name="ICDICER[4]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001194" rw_flags="RW" width="4" name="ICDICER[5]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001198" rw_flags="RW" width="4" name="ICDICER[6]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="5800119c" rw_flags="RW" width="4" name="ICDICER[7]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a0" rw_flags="RW" width="4" name="ICDICER[8]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a4" rw_flags="RW" width="4" name="ICDICER[9]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a8" rw_flags="RW" width="4" name="ICDICER[10]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011ac" rw_flags="RW" width="4" name="ICDICER[11]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b0" rw_flags="RW" width="4" name="ICDICER[12]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b4" rw_flags="RW" width="4" name="ICDICER[13]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b8" rw_flags="RW" width="4" name="ICDICER[14]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011bc" rw_flags="RW" width="4" name="ICDICER[15]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001200" rw_flags="RW" width="4" name="ICDISPR[0]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001204" rw_flags="RW" width="4" name="ICDISPR[1]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001208" rw_flags="RW" width="4" name="ICDISPR[2]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800120c" rw_flags="RW" width="4" name="ICDISPR[3]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001210" rw_flags="RW" width="4" name="ICDISPR[4]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001214" rw_flags="RW" width="4" name="ICDISPR[5]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001218" rw_flags="RW" width="4" name="ICDISPR[6]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800121c" rw_flags="RW" width="4" name="ICDISPR[7]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001220" rw_flags="RW" width="4" name="ICDISPR[8]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001224" rw_flags="RW" width="4" name="ICDISPR[9]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001228" rw_flags="RW" width="4" name="ICDISPR[10]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800122c" rw_flags="RW" width="4" name="ICDISPR[11]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001230" rw_flags="RW" width="4" name="ICDISPR[12]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001234" rw_flags="RW" width="4" name="ICDISPR[13]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001238" rw_flags="RW" width="4" name="ICDISPR[14]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800123c" rw_flags="RW" width="4" name="ICDISPR[15]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001280" rw_flags="RW" width="4" name="ICDICPR[0]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001284" rw_flags="RW" width="4" name="ICDICPR[1]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001288" rw_flags="RW" width="4" name="ICDICPR[2]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="5800128c" rw_flags="RW" width="4" name="ICDICPR[3]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001290" rw_flags="RW" width="4" name="ICDICPR[4]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001294" rw_flags="RW" width="4" name="ICDICPR[5]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001298" rw_flags="RW" width="4" name="ICDICPR[6]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="5800129c" rw_flags="RW" width="4" name="ICDICPR[7]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a0" rw_flags="RW" width="4" name="ICDICPR[8]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a4" rw_flags="RW" width="4" name="ICDICPR[9]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a8" rw_flags="RW" width="4" name="ICDICPR[10]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012ac" rw_flags="RW" width="4" name="ICDICPR[11]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b0" rw_flags="RW" width="4" name="ICDICPR[12]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b4" rw_flags="RW" width="4" name="ICDICPR[13]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b8" rw_flags="RW" width="4" name="ICDICPR[14]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012bc" rw_flags="RW" width="4" name="ICDICPR[15]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001300" rw_flags="R" width="4" name="ICDABR[0]" comment="Active Bit Registers"/>
+ <register addr="58001304" rw_flags="R" width="4" name="ICDABR[1]" comment="Active Bit Registers"/>
+ <register addr="58001308" rw_flags="R" width="4" name="ICDABR[2]" comment="Active Bit Registers"/>
+ <register addr="5800130c" rw_flags="R" width="4" name="ICDABR[3]" comment="Active Bit Registers"/>
+ <register addr="58001310" rw_flags="R" width="4" name="ICDABR[4]" comment="Active Bit Registers"/>
+ <register addr="58001314" rw_flags="R" width="4" name="ICDABR[5]" comment="Active Bit Registers"/>
+ <register addr="58001318" rw_flags="R" width="4" name="ICDABR[6]" comment="Active Bit Registers"/>
+ <register addr="5800131c" rw_flags="R" width="4" name="ICDABR[7]" comment="Active Bit Registers"/>
+ <register addr="58001320" rw_flags="R" width="4" name="ICDABR[8]" comment="Active Bit Registers"/>
+ <register addr="58001324" rw_flags="R" width="4" name="ICDABR[9]" comment="Active Bit Registers"/>
+ <register addr="58001328" rw_flags="R" width="4" name="ICDABR[10]" comment="Active Bit Registers"/>
+ <register addr="5800132c" rw_flags="R" width="4" name="ICDABR[11]" comment="Active Bit Registers"/>
+ <register addr="58001330" rw_flags="R" width="4" name="ICDABR[12]" comment="Active Bit Registers"/>
+ <register addr="58001334" rw_flags="R" width="4" name="ICDABR[13]" comment="Active Bit Registers"/>
+ <register addr="58001338" rw_flags="R" width="4" name="ICDABR[14]" comment="Active Bit Registers"/>
+ <register addr="5800133c" rw_flags="R" width="4" name="ICDABR[15]" comment="Active Bit Registers"/>
+ <register addr="58001400" rw_flags="RW" width="4" name="ICDIPR[0]" comment="Interrupt Priority Registers"/>
+ <register addr="58001404" rw_flags="RW" width="4" name="ICDIPR[1]" comment="Interrupt Priority Registers"/>
+ <register addr="58001408" rw_flags="RW" width="4" name="ICDIPR[2]" comment="Interrupt Priority Registers"/>
+ <register addr="5800140c" rw_flags="RW" width="4" name="ICDIPR[3]" comment="Interrupt Priority Registers"/>
+ <register addr="58001410" rw_flags="RW" width="4" name="ICDIPR[4]" comment="Interrupt Priority Registers"/>
+ <register addr="58001414" rw_flags="RW" width="4" name="ICDIPR[5]" comment="Interrupt Priority Registers"/>
+ <register addr="58001418" rw_flags="RW" width="4" name="ICDIPR[6]" comment="Interrupt Priority Registers"/>
+ <register addr="5800141c" rw_flags="RW" width="4" name="ICDIPR[7]" comment="Interrupt Priority Registers"/>
+ <register addr="58001420" rw_flags="RW" width="4" name="ICDIPR[8]" comment="Interrupt Priority Registers"/>
+ <register addr="58001424" rw_flags="RW" width="4" name="ICDIPR[9]" comment="Interrupt Priority Registers"/>
+ <register addr="58001428" rw_flags="RW" width="4" name="ICDIPR[10]" comment="Interrupt Priority Registers"/>
+ <register addr="5800142c" rw_flags="RW" width="4" name="ICDIPR[11]" comment="Interrupt Priority Registers"/>
+ <register addr="58001430" rw_flags="RW" width="4" name="ICDIPR[12]" comment="Interrupt Priority Registers"/>
+ <register addr="58001434" rw_flags="RW" width="4" name="ICDIPR[13]" comment="Interrupt Priority Registers"/>
+ <register addr="58001438" rw_flags="RW" width="4" name="ICDIPR[14]" comment="Interrupt Priority Registers"/>
+ <register addr="5800143c" rw_flags="RW" width="4" name="ICDIPR[15]" comment="Interrupt Priority Registers"/>
+ <register addr="58001440" rw_flags="RW" width="4" name="ICDIPR[16]" comment="Interrupt Priority Registers"/>
+ <register addr="58001444" rw_flags="RW" width="4" name="ICDIPR[17]" comment="Interrupt Priority Registers"/>
+ <register addr="58001448" rw_flags="RW" width="4" name="ICDIPR[18]" comment="Interrupt Priority Registers"/>
+ <register addr="5800144c" rw_flags="RW" width="4" name="ICDIPR[19]" comment="Interrupt Priority Registers"/>
+ <register addr="58001450" rw_flags="RW" width="4" name="ICDIPR[20]" comment="Interrupt Priority Registers"/>
+ <register addr="58001454" rw_flags="RW" width="4" name="ICDIPR[21]" comment="Interrupt Priority Registers"/>
+ <register addr="58001458" rw_flags="RW" width="4" name="ICDIPR[22]" comment="Interrupt Priority Registers"/>
+ <register addr="5800145c" rw_flags="RW" width="4" name="ICDIPR[23]" comment="Interrupt Priority Registers"/>
+ <register addr="58001460" rw_flags="RW" width="4" name="ICDIPR[24]" comment="Interrupt Priority Registers"/>
+ <register addr="58001464" rw_flags="RW" width="4" name="ICDIPR[25]" comment="Interrupt Priority Registers"/>
+ <register addr="58001468" rw_flags="RW" width="4" name="ICDIPR[26]" comment="Interrupt Priority Registers"/>
+ <register addr="5800146c" rw_flags="RW" width="4" name="ICDIPR[27]" comment="Interrupt Priority Registers"/>
+ <register addr="58001470" rw_flags="RW" width="4" name="ICDIPR[28]" comment="Interrupt Priority Registers"/>
+ <register addr="58001474" rw_flags="RW" width="4" name="ICDIPR[29]" comment="Interrupt Priority Registers"/>
+ <register addr="58001478" rw_flags="RW" width="4" name="ICDIPR[30]" comment="Interrupt Priority Registers"/>
+ <register addr="5800147c" rw_flags="RW" width="4" name="ICDIPR[31]" comment="Interrupt Priority Registers"/>
+ <register addr="58001480" rw_flags="RW" width="4" name="ICDIPR[32]" comment="Interrupt Priority Registers"/>
+ <register addr="58001484" rw_flags="RW" width="4" name="ICDIPR[33]" comment="Interrupt Priority Registers"/>
+ <register addr="58001488" rw_flags="RW" width="4" name="ICDIPR[34]" comment="Interrupt Priority Registers"/>
+ <register addr="5800148c" rw_flags="RW" width="4" name="ICDIPR[35]" comment="Interrupt Priority Registers"/>
+ <register addr="58001490" rw_flags="RW" width="4" name="ICDIPR[36]" comment="Interrupt Priority Registers"/>
+ <register addr="58001494" rw_flags="RW" width="4" name="ICDIPR[37]" comment="Interrupt Priority Registers"/>
+ <register addr="58001498" rw_flags="RW" width="4" name="ICDIPR[38]" comment="Interrupt Priority Registers"/>
+ <register addr="5800149c" rw_flags="RW" width="4" name="ICDIPR[39]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a0" rw_flags="RW" width="4" name="ICDIPR[40]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a4" rw_flags="RW" width="4" name="ICDIPR[41]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a8" rw_flags="RW" width="4" name="ICDIPR[42]" comment="Interrupt Priority Registers"/>
+ <register addr="580014ac" rw_flags="RW" width="4" name="ICDIPR[43]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b0" rw_flags="RW" width="4" name="ICDIPR[44]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b4" rw_flags="RW" width="4" name="ICDIPR[45]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b8" rw_flags="RW" width="4" name="ICDIPR[46]" comment="Interrupt Priority Registers"/>
+ <register addr="580014bc" rw_flags="RW" width="4" name="ICDIPR[47]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c0" rw_flags="RW" width="4" name="ICDIPR[48]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c4" rw_flags="RW" width="4" name="ICDIPR[49]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c8" rw_flags="RW" width="4" name="ICDIPR[50]" comment="Interrupt Priority Registers"/>
+ <register addr="580014cc" rw_flags="RW" width="4" name="ICDIPR[51]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d0" rw_flags="RW" width="4" name="ICDIPR[52]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d4" rw_flags="RW" width="4" name="ICDIPR[53]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d8" rw_flags="RW" width="4" name="ICDIPR[54]" comment="Interrupt Priority Registers"/>
+ <register addr="580014dc" rw_flags="RW" width="4" name="ICDIPR[55]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e0" rw_flags="RW" width="4" name="ICDIPR[56]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e4" rw_flags="RW" width="4" name="ICDIPR[57]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e8" rw_flags="RW" width="4" name="ICDIPR[58]" comment="Interrupt Priority Registers"/>
+ <register addr="580014ec" rw_flags="RW" width="4" name="ICDIPR[59]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f0" rw_flags="RW" width="4" name="ICDIPR[60]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f4" rw_flags="RW" width="4" name="ICDIPR[61]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f8" rw_flags="RW" width="4" name="ICDIPR[62]" comment="Interrupt Priority Registers"/>
+ <register addr="580014fc" rw_flags="RW" width="4" name="ICDIPR[63]" comment="Interrupt Priority Registers"/>
+ <register addr="58001800" rw_flags="RW" width="4" name="ICDIPTR[0]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001804" rw_flags="RW" width="4" name="ICDIPTR[1]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001808" rw_flags="RW" width="4" name="ICDIPTR[2]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800180c" rw_flags="RW" width="4" name="ICDIPTR[3]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001810" rw_flags="RW" width="4" name="ICDIPTR[4]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001814" rw_flags="RW" width="4" name="ICDIPTR[5]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001818" rw_flags="RW" width="4" name="ICDIPTR[6]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800181c" rw_flags="RW" width="4" name="ICDIPTR[7]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001820" rw_flags="RW" width="4" name="ICDIPTR[8]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001824" rw_flags="RW" width="4" name="ICDIPTR[9]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001828" rw_flags="RW" width="4" name="ICDIPTR[10]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800182c" rw_flags="RW" width="4" name="ICDIPTR[11]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001830" rw_flags="RW" width="4" name="ICDIPTR[12]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001834" rw_flags="RW" width="4" name="ICDIPTR[13]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001838" rw_flags="RW" width="4" name="ICDIPTR[14]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800183c" rw_flags="RW" width="4" name="ICDIPTR[15]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001840" rw_flags="RW" width="4" name="ICDIPTR[16]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001844" rw_flags="RW" width="4" name="ICDIPTR[17]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001848" rw_flags="RW" width="4" name="ICDIPTR[18]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800184c" rw_flags="RW" width="4" name="ICDIPTR[19]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001850" rw_flags="RW" width="4" name="ICDIPTR[20]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001854" rw_flags="RW" width="4" name="ICDIPTR[21]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001858" rw_flags="RW" width="4" name="ICDIPTR[22]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800185c" rw_flags="RW" width="4" name="ICDIPTR[23]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001860" rw_flags="RW" width="4" name="ICDIPTR[24]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001864" rw_flags="RW" width="4" name="ICDIPTR[25]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001868" rw_flags="RW" width="4" name="ICDIPTR[26]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800186c" rw_flags="RW" width="4" name="ICDIPTR[27]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001870" rw_flags="RW" width="4" name="ICDIPTR[28]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001874" rw_flags="RW" width="4" name="ICDIPTR[29]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001878" rw_flags="RW" width="4" name="ICDIPTR[30]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800187c" rw_flags="RW" width="4" name="ICDIPTR[31]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001880" rw_flags="RW" width="4" name="ICDIPTR[32]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001884" rw_flags="RW" width="4" name="ICDIPTR[33]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001888" rw_flags="RW" width="4" name="ICDIPTR[34]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800188c" rw_flags="RW" width="4" name="ICDIPTR[35]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001890" rw_flags="RW" width="4" name="ICDIPTR[36]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001894" rw_flags="RW" width="4" name="ICDIPTR[37]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001898" rw_flags="RW" width="4" name="ICDIPTR[38]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800189c" rw_flags="RW" width="4" name="ICDIPTR[39]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a0" rw_flags="RW" width="4" name="ICDIPTR[40]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a4" rw_flags="RW" width="4" name="ICDIPTR[41]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a8" rw_flags="RW" width="4" name="ICDIPTR[42]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018ac" rw_flags="RW" width="4" name="ICDIPTR[43]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b0" rw_flags="RW" width="4" name="ICDIPTR[44]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b4" rw_flags="RW" width="4" name="ICDIPTR[45]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b8" rw_flags="RW" width="4" name="ICDIPTR[46]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018bc" rw_flags="RW" width="4" name="ICDIPTR[47]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c0" rw_flags="RW" width="4" name="ICDIPTR[48]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c4" rw_flags="RW" width="4" name="ICDIPTR[49]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c8" rw_flags="RW" width="4" name="ICDIPTR[50]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018cc" rw_flags="RW" width="4" name="ICDIPTR[51]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d0" rw_flags="RW" width="4" name="ICDIPTR[52]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d4" rw_flags="RW" width="4" name="ICDIPTR[53]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d8" rw_flags="RW" width="4" name="ICDIPTR[54]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018dc" rw_flags="RW" width="4" name="ICDIPTR[55]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e0" rw_flags="RW" width="4" name="ICDIPTR[56]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e4" rw_flags="RW" width="4" name="ICDIPTR[57]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e8" rw_flags="RW" width="4" name="ICDIPTR[58]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018ec" rw_flags="RW" width="4" name="ICDIPTR[59]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f0" rw_flags="RW" width="4" name="ICDIPTR[60]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f4" rw_flags="RW" width="4" name="ICDIPTR[61]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f8" rw_flags="RW" width="4" name="ICDIPTR[62]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018fc" rw_flags="RW" width="4" name="ICDIPTR[63]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001900" rw_flags="RW" width="4" name="ICDIPTR[64]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001904" rw_flags="RW" width="4" name="ICDIPTR[65]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001908" rw_flags="RW" width="4" name="ICDIPTR[66]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800190c" rw_flags="RW" width="4" name="ICDIPTR[67]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001910" rw_flags="RW" width="4" name="ICDIPTR[68]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001914" rw_flags="RW" width="4" name="ICDIPTR[69]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001918" rw_flags="RW" width="4" name="ICDIPTR[70]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800191c" rw_flags="RW" width="4" name="ICDIPTR[71]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001920" rw_flags="RW" width="4" name="ICDIPTR[72]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001924" rw_flags="RW" width="4" name="ICDIPTR[73]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001928" rw_flags="RW" width="4" name="ICDIPTR[74]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800192c" rw_flags="RW" width="4" name="ICDIPTR[75]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001930" rw_flags="RW" width="4" name="ICDIPTR[76]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001934" rw_flags="RW" width="4" name="ICDIPTR[77]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001938" rw_flags="RW" width="4" name="ICDIPTR[78]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800193c" rw_flags="RW" width="4" name="ICDIPTR[79]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001940" rw_flags="RW" width="4" name="ICDIPTR[80]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001944" rw_flags="RW" width="4" name="ICDIPTR[81]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001948" rw_flags="RW" width="4" name="ICDIPTR[82]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800194c" rw_flags="RW" width="4" name="ICDIPTR[83]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001950" rw_flags="RW" width="4" name="ICDIPTR[84]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001954" rw_flags="RW" width="4" name="ICDIPTR[85]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001958" rw_flags="RW" width="4" name="ICDIPTR[86]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800195c" rw_flags="RW" width="4" name="ICDIPTR[87]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001960" rw_flags="RW" width="4" name="ICDIPTR[88]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001964" rw_flags="RW" width="4" name="ICDIPTR[89]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001968" rw_flags="RW" width="4" name="ICDIPTR[90]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800196c" rw_flags="RW" width="4" name="ICDIPTR[91]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001970" rw_flags="RW" width="4" name="ICDIPTR[92]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001974" rw_flags="RW" width="4" name="ICDIPTR[93]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001978" rw_flags="RW" width="4" name="ICDIPTR[94]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800197c" rw_flags="RW" width="4" name="ICDIPTR[95]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001980" rw_flags="RW" width="4" name="ICDIPTR[96]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001984" rw_flags="RW" width="4" name="ICDIPTR[97]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001988" rw_flags="RW" width="4" name="ICDIPTR[98]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800198c" rw_flags="RW" width="4" name="ICDIPTR[99]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001990" rw_flags="RW" width="4" name="ICDIPTR[100]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001994" rw_flags="RW" width="4" name="ICDIPTR[101]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001998" rw_flags="RW" width="4" name="ICDIPTR[102]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800199c" rw_flags="RW" width="4" name="ICDIPTR[103]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a0" rw_flags="RW" width="4" name="ICDIPTR[104]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a4" rw_flags="RW" width="4" name="ICDIPTR[105]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a8" rw_flags="RW" width="4" name="ICDIPTR[106]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019ac" rw_flags="RW" width="4" name="ICDIPTR[107]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b0" rw_flags="RW" width="4" name="ICDIPTR[108]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b4" rw_flags="RW" width="4" name="ICDIPTR[109]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b8" rw_flags="RW" width="4" name="ICDIPTR[110]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019bc" rw_flags="RW" width="4" name="ICDIPTR[111]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c0" rw_flags="RW" width="4" name="ICDIPTR[112]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c4" rw_flags="RW" width="4" name="ICDIPTR[113]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c8" rw_flags="RW" width="4" name="ICDIPTR[114]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019cc" rw_flags="RW" width="4" name="ICDIPTR[115]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d0" rw_flags="RW" width="4" name="ICDIPTR[116]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d4" rw_flags="RW" width="4" name="ICDIPTR[117]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d8" rw_flags="RW" width="4" name="ICDIPTR[118]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019dc" rw_flags="RW" width="4" name="ICDIPTR[119]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e0" rw_flags="RW" width="4" name="ICDIPTR[120]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e4" rw_flags="RW" width="4" name="ICDIPTR[121]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e8" rw_flags="RW" width="4" name="ICDIPTR[122]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019ec" rw_flags="RW" width="4" name="ICDIPTR[123]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f0" rw_flags="RW" width="4" name="ICDIPTR[124]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f4" rw_flags="RW" width="4" name="ICDIPTR[125]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f8" rw_flags="RW" width="4" name="ICDIPTR[126]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019fc" rw_flags="RW" width="4" name="ICDIPTR[127]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001c00" rw_flags="RW" width="4" name="ICDICFR[0]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c04" rw_flags="RW" width="4" name="ICDICFR[1]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c08" rw_flags="RW" width="4" name="ICDICFR[2]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c0c" rw_flags="RW" width="4" name="ICDICFR[3]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c10" rw_flags="RW" width="4" name="ICDICFR[4]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c14" rw_flags="RW" width="4" name="ICDICFR[5]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c18" rw_flags="RW" width="4" name="ICDICFR[6]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c1c" rw_flags="RW" width="4" name="ICDICFR[7]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c20" rw_flags="RW" width="4" name="ICDICFR[8]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c24" rw_flags="RW" width="4" name="ICDICFR[9]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c28" rw_flags="RW" width="4" name="ICDICFR[10]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c2c" rw_flags="RW" width="4" name="ICDICFR[11]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c30" rw_flags="RW" width="4" name="ICDICFR[12]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c34" rw_flags="RW" width="4" name="ICDICFR[13]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c38" rw_flags="RW" width="4" name="ICDICFR[14]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c3c" rw_flags="RW" width="4" name="ICDICFR[15]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c40" rw_flags="RW" width="4" name="ICDICFR[16]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c44" rw_flags="RW" width="4" name="ICDICFR[17]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c48" rw_flags="RW" width="4" name="ICDICFR[18]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c4c" rw_flags="RW" width="4" name="ICDICFR[19]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c50" rw_flags="RW" width="4" name="ICDICFR[20]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c54" rw_flags="RW" width="4" name="ICDICFR[21]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c58" rw_flags="RW" width="4" name="ICDICFR[22]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c5c" rw_flags="RW" width="4" name="ICDICFR[23]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c60" rw_flags="RW" width="4" name="ICDICFR[24]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c64" rw_flags="RW" width="4" name="ICDICFR[25]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c68" rw_flags="RW" width="4" name="ICDICFR[26]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c6c" rw_flags="RW" width="4" name="ICDICFR[27]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c70" rw_flags="RW" width="4" name="ICDICFR[28]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c74" rw_flags="RW" width="4" name="ICDICFR[29]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c78" rw_flags="RW" width="4" name="ICDICFR[30]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c7c" rw_flags="RW" width="4" name="ICDICFR[31]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001f00" rw_flags="W" width="4" name="ICDSGIR" comment="Software Generated Interrupt Register"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_int_ifc subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_int_ifc">
+ <block name="periph_int_ifc" comment="">
+ <register addr="58000100" rw_flags="RW" width="4" name="ICCICR" comment="CPU Interface Control Register"/>
+ <register addr="58000104" rw_flags="RW" width="4" name="ICCPMR" comment="Interrupt Priority Mask Register"/>
+ <register addr="58000108" rw_flags="RW" width="4" name="ICCBPR" comment="Binary Point Register"/>
+ <register addr="5800010c" rw_flags="R" width="4" name="ICCIAR" comment="Interrupt Acknowledge Register"/>
+ <register addr="58000110" rw_flags="W" width="4" name="ICCEOIR" comment="End Of Interrupt Register"/>
+ <register addr="58000114" rw_flags="R" width="4" name="ICCRPR" comment="Running Priority Register"/>
+ <register addr="58000118" rw_flags="R" width="4" name="ICCHPIR" comment="Highest Pending Interrupt Register"/>
+ <register addr="580001fc" rw_flags="R" width="4" name="ICCIIDR" comment="Highest Pending Interrupt Register"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_scu subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_scu">
+ <block name="periph_scu" comment="">
+ <register addr="58000000" rw_flags="RW" width="4" name="SCU_CONTROL" comment="SCU Control Register - bit 0 is SCU Enable"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for pmu_conf subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="pmu_conf">
+ <block name="pmu_boot" comment="">
+ <register addr="14c60000" rw_flags="RW" width="1" name="BOOT_SOURCE" comment="Boot source 0: rom, 1: CHOP"/>
+ <register addr="14c60004" rw_flags="RW" width="1" name="BOOT_CFG_ACK" comment="Configuration ACK"/>
+ </block>
+ <block name="pmu_remap" comment="">
+ <register addr="14c50000" rw_flags="RW" width="4" name="PROC_RMP_BOOT_ADDR" comment="20 MSbits of offset to be added to processor 32 bit boot address (the processor is typically booting from 0x0). This is the address where the processor starts booting from (from WLBT processor programmers view)"/>
+ <register addr="14c50004" rw_flags="RW" width="1" name="SWEEPER_DBUS_BYPASS" comment="Bypass DBUS Sweeper"/>
+ <register addr="14c50008" rw_flags="RW" width="1" name="SWEEPER_PBUS_BYPASS" comment="Bypass PBUS Sweeper"/>
+ <register addr="14c5000c" rw_flags="RW" width="1" name="MEMCLK_EN" comment="Memory Clock Enable"/>
+ <register addr="14c50010" rw_flags="RW" width="4" name="CHIP_VERSION_ID" comment="Chip version IDs"/>
+ </block>
+ <block name="pmu_tzpc" comment="">
+ <register addr="14c10000" rw_flags="R" width="1" name="TZPC_PROT0STAT" comment="TrustZone status for register banks, aliased to 0x200"/>
+ <register addr="14c10004" rw_flags="W" width="1" name="TZPC_PROT0SET" comment="TrustZone set for register banks, aliased to 0x204"/>
+ <register addr="14c10008" rw_flags="W" width="1" name="TZPC_PROT0CLR" comment="TrustZone clear for register banks, aliased to 0x208"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for chip subsystem moredump
+ Chip hash: f12a
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="chip">
+ <block name="alwayson_rf" comment="">
+ <register addr="00000000" rw_flags="R" width="2" name="CHIP_VERSION" comment="Chip Version and ID (S610 EVT0=0x00B0, S610 EVT1=0x10B0, S610 EVT1.1=0x11B0, S610 EVT2=0x20B0, S612 EVT0=0x00B1, S612 EVT1=0x10B1, S620 EVT0=0x00B2, S620 EVT0.1=0x01B2)"/>
+ <register addr="00000004" rw_flags="RW" width="2" name="RFIC_CONFIG" comment="Main BT/WL configuration register for RFIC."/>
+ <register addr="00000008" rw_flags="RW" width="1" name="RFIC_PD_CONTROL" comment="RFIC BTWL power domain control from S612 EVT0 onwards."/>
+ <register addr="0000000c" rw_flags="R" width="1" name="RFIC_PD_STATUS" comment="Indicates the status of the switches in the power domain from S612 EVT0 onwards."/>
+ <register addr="00000010" rw_flags="RW" width="2" name="RFIC_BTWL_TO_FM_COEX" comment="BTWL to FM signalling for Coexistence."/>
+ <register addr="00000014" rw_flags="R" width="2" name="RFIC_FM_TO_BTWL_COEX" comment="FM to BTWL signalling for Coexistence."/>
+ <register addr="00000018" rw_flags="R" width="1" name="RFIC_PLL_UNLOCK_STATUS" comment="Set on falling edge of Aux PLL lock indicator when RFIC_CONFIG_PLL_UNLOCK_EN=1."/>
+ <register addr="0000001c" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA0" comment="[ 31: 0] of 128-bit EFUSE write data word."/>
+ <register addr="00000020" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA1" comment="[ 63:32] of 128-bit EFUSE write data word."/>
+ <register addr="00000024" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA2" comment="[ 95:64] of 128-bit EFUSE write data word."/>
+ <register addr="00000028" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA3" comment="[127:96] of 128-bit EFUSE write data word."/>
+ <register addr="0000002c" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA0" comment="[ 31: 0] of 128-bit EFUSE read data word."/>
+ <register addr="00000030" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA1" comment="[ 63:32] of 128-bit EFUSE read data word."/>
+ <register addr="00000034" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA2" comment="[ 95:64] of 128-bit EFUSE read data word."/>
+ <register addr="00000038" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA3" comment="[127:96] of 128-bit EFUSE read data word."/>
+ <register addr="0000003c" rw_flags="RW" width="1" name="RFIC_EFUSE_START" comment="Writing to this register starts the specified operation setup in RFIC_EFUSE_CONFIG_MODE."/>
+ <register addr="00000040" rw_flags="RW" width="2" name="RFIC_EFUSE_CONFIG" comment="Config word for EFUSE operation."/>
+ <register addr="00000044" rw_flags="R" width="1" name="RFIC_EFUSE_STATUS" comment="Indicates the current EFUSE status."/>
+ <register addr="00000048" rw_flags="RW" width="2" name="RFIC_EFUSE_ORIDE_CTRL" comment="Override control for EFUSE hardware interface - control register. Use RFIC_EFUSE_CONFIG_FSOURCE_EN to enable the programming voltage."/>
+ <register addr="0000004c" rw_flags="RW" width="2" name="RFIC_CLKGEN_ENABLES" comment="Clock enables"/>
+ <register addr="00000050" rw_flags="RW" width="4" name="RFIC_CLKGEN_MISC" comment="Clock controls"/>
+ <register addr="00000054" rw_flags="RW" width="2" name="RFIC_CLKGEN_1632_SKIP_VALUE" comment="Number of 80MHz clks between each skip of 16MHz clock (set to desired_interval-1). 32MHz clock is skipped twice in this period, so this should be an even value or there will be sytematic error"/>
+ <register addr="00000058" rw_flags="RW" width="1" name="RFIC_CLKGEN_SYSTEM_TIME_DIV_RATIO" comment="Divide ratio for system timer (from 80MHz clock)"/>
+ <register addr="0000005c" rw_flags="RW" width="1" name="RFIC_CLKGEN_SYSTEM_TIME_EN" comment="Enable System Timer"/>
+ <register addr="00000060" rw_flags="RW" width="4" name="RFIC_CLKGEN_SYSTEM_TIME_INIT_VAL" comment="Set initial value for System Timer"/>
+ <register addr="00000064" rw_flags="R" width="4" name="RFIC_CLKGEN_SYSTEM_TIME" comment="Current value of System Timer"/>
+ <register addr="00000068" rw_flags="R" width="1" name="AUX_ANA_STATUS0" comment=""/>
+ <register addr="0000006c" rw_flags="RW" width="4" name="AUX_ANA_ENABLES" comment=""/>
+ <register addr="00000070" rw_flags="RW" width="4" name="AUX_ANA_SH_CFG0" comment=""/>
+ <register addr="00000074" rw_flags="RW" width="4" name="AUX_ANA_SH_CFG1" comment=""/>
+ <register addr="00000078" rw_flags="RW" width="2" name="AUX_ANA_SH_CFG2" comment=""/>
+ <register addr="0000007c" rw_flags="RW" width="4" name="AUX_ANA_CFG0" comment=""/>
+ <register addr="00000080" rw_flags="RW" width="4" name="AUX_ANA_SPARES" comment=""/>
+ <register addr="00000084" rw_flags="RW" width="4" name="RFIC_PAD_MUX_CTRL" comment="PIO mux controls for PIO0 to PIO3"/>
+ <register addr="00000088" rw_flags="RW" width="1" name="RFIC_SCAN_MODE_ENABLES" comment="DFT Scan mode configuration register. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="0000008c" rw_flags="RW" width="4" name="RFIC_SCAN_CONFIG" comment="DFT Scan mode configuration register. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000090" rw_flags="RW" width="1" name="RFIC_SCAN_RESERVE_REGS" comment="DFT Scan mode reserve registers. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000094" rw_flags="R" width="2" name="RFIC_SCAN_OBSERVE_REGS" comment="DFT Scan mode observable regsiters. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000098" rw_flags="RW" width="2" name="RFIC_SPARES0" comment="Spare bits."/>
+ <register addr="0000009c" rw_flags="RW" width="2" name="RFIC_SPARES1" comment="Spare bits."/>
+ <register addr="000000a0" rw_flags="R" width="4" name="RFIC_SCSC0" comment="Chris Hunter/Damien Smith"/>
+ <register addr="000000a4" rw_flags="R" width="4" name="RFIC_SCSC1" comment="Michael Cowell/Andy Barnish"/>
+ <register addr="000000a8" rw_flags="R" width="4" name="RFIC_SCSC2" comment="Stelios Staveris/Hayley Bird"/>
+ <register addr="000000ac" rw_flags="R" width="4" name="RFIC_SCSC3" comment="Dave Price/Riccardo Micci"/>
+ </block>
+ <block name="bt_rf" comment="">
+ <register addr="00002000" rw_flags="RW" width="1" name="BT_RF_CONFIG" comment=""/>
+ <register addr="00002004" rw_flags="RW" width="1" name="BT_RF_DEBUG_SEL" comment=""/>
+ <register addr="00002008" rw_flags="RW" width="1" name="BT_RF_ZIPPY_CONFIG" comment=""/>
+ <register addr="0000200c" rw_flags="RW" width="1" name="BT_TX_DEBUG_SEL" comment="Bluetooth Transmit debug mux select"/>
+ <register addr="00002010" rw_flags="RW" width="1" name="BT_TX_INTERFACE_CTRL" comment=""/>
+ <register addr="00002014" rw_flags="RW" width="4" name="BT_TX_MOD_TEST" comment=""/>
+ <register addr="00002018" rw_flags="RW" width="1" name="BT_TX_PATTERN_GEN_CFG" comment=""/>
+ <register addr="0000201c" rw_flags="RW" width="1" name="BT_TX_CTRL_DEBUG_SEL" comment="Bluetooth Transmit Control debug mux select."/>
+ <register addr="00002020" rw_flags="RW" width="4" name="BT_TX_CTRL_CFG" comment="Bluetooth Transmit Control configuration."/>
+ <register addr="00002024" rw_flags="R" width="1" name="BT_TX_CTRL_STATUS" comment="The current Bluetooth Tx radio mode"/>
+ <register addr="00002028" rw_flags="RW" width="1" name="BT_TX_TIMER_CFG" comment="Bluetooth Transmit Radio Timer configuration."/>
+ <register addr="0000202c" rw_flags="R" width="1" name="BT_TX_TIMER_STATUS" comment="Bluetooth Transmit Radio Timer status."/>
+ <register addr="00002030" rw_flags="RW" width="1" name="BT_TX_TIMER_SW_TRIGGERS" comment="Bluetooth Transmit Radio Timer software triggers."/>
+ <register addr="00002034" rw_flags="RW" width="4" name="BT_TX_TIMER_EVENT_TIME" comment="Set the required Tx event time. Used when timing to an event, not used when timing from an event."/>
+ <register addr="00002038" rw_flags="RW" width="1" name="BT_TX_TIMER_DIG_SW_ORIDE" comment="Bluetooth Transmit Radio Timer digital enable software overrides."/>
+ <register addr="0000203c" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_PLL_ABORT" comment="Bluetooth Tx Radio Timer - PLL Abort trigger configuration."/>
+ <register addr="00002040" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_START" comment="Bluetooth Tx Radio Timer - Start trigger configuration."/>
+ <register addr="00002044" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_SW_ABORT" comment="Bluetooth Tx Radio Timer - Software Abort trigger configuration."/>
+ <register addr="00002048" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_DONE" comment="Bluetooth Tx Radio Timer - Done trigger configuration."/>
+ <register addr="0000204c" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_COEX_ABORT" comment="Bluetooth Tx Radio Timer - Coex Abort trigger configuration."/>
+ <register addr="00002050" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT0_ANA_EN" comment="Transmit slot 0 Analogue Enables"/>
+ <register addr="00002054" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT1_ANA_EN" comment="Transmit slot 1 Analogue Enables"/>
+ <register addr="00002058" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT2_ANA_EN" comment="Transmit slot 2 Analogue Enables"/>
+ <register addr="0000205c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT3_ANA_EN" comment="Transmit slot 3 Analogue Enables"/>
+ <register addr="00002060" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT4_ANA_EN" comment="Transmit slot 4 Analogue Enables"/>
+ <register addr="00002064" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT5_ANA_EN" comment="Transmit slot 5 Analogue Enables"/>
+ <register addr="00002068" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT6_ANA_EN" comment="Transmit slot 6 Analogue Enables"/>
+ <register addr="0000206c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT7_ANA_EN" comment="Transmit slot 7 Analogue Enables"/>
+ <register addr="00002070" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT8_ANA_EN" comment="Transmit slot 8 Analogue Enables"/>
+ <register addr="00002074" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT9_ANA_EN" comment="Transmit slot 9 Analogue Enables"/>
+ <register addr="00002078" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT10_ANA_EN" comment="Transmit slot 10 Analogue Enables"/>
+ <register addr="0000207c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT11_ANA_EN" comment="Transmit slot 11 Analogue Enables"/>
+ <register addr="00002080" rw_flags="RW" width="4" name="BT_TX_TIMER_DIG0_EN" comment=""/>
+ <register addr="00002084" rw_flags="RW" width="2" name="BT_TX_TIMER_DIG1_EN" comment=""/>
+ <register addr="00002088" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY0" comment=""/>
+ <register addr="0000208c" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY1" comment=""/>
+ <register addr="00002090" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY2" comment=""/>
+ <register addr="00002094" rw_flags="RW" width="4" name="BT_TX_CONFIG" comment=""/>
+ <register addr="00002098" rw_flags="RW" width="1" name="BT_TX_BB_RAMP_CONFIG" comment=""/>
+ <register addr="0000209c" rw_flags="RW" width="4" name="BT_TX_SCALE_CONFIG" comment=""/>
+ <register addr="000020a0" rw_flags="RW" width="1" name="BT_TX_MAX_ATT_CONFIG" comment=""/>
+ <register addr="000020a4" rw_flags="RW" width="4" name="BT_TX_GAIN_CONFIG" comment=""/>
+ <register addr="000020a8" rw_flags="R" width="1" name="BT_TX_GAIN" comment=""/>
+ <register addr="000020ac" rw_flags="RW" width="4" name="BT_TX_MR_CONFIG" comment=""/>
+ <register addr="000020b0" rw_flags="RW" width="1" name="BT_TX_MR_MOD_DELAY" comment=""/>
+ <register addr="000020b4" rw_flags="RW" width="4" name="BT_POLAR_CTRL" comment="General control register"/>
+ <register addr="000020b8" rw_flags="RW" width="4" name="BT_POLAR_DATA" comment=""/>
+ <register addr="000020bc" rw_flags="RW" width="4" name="BT_POLAR_MUX" comment="Mux control register"/>
+ <register addr="000020c0" rw_flags="RW" width="4" name="BT_POLAR_QUAD_POLAR_DATA" comment=""/>
+ <register addr="000020c4" rw_flags="RW" width="2" name="BT_POLAR_AA_FIR_CONTROL" comment="FIR filter control for AntiAliasing"/>
+ <register addr="000020c8" rw_flags="RW" width="4" name="BT_POLAR_AA_FIR_TAPS" comment="Upper AntiAliasing FIR filter taps"/>
+ <register addr="000020cc" rw_flags="R" width="2" name="BT_POLAR_DEBUG_STATUS" comment="Connected to sig gen Tone."/>
+ <register addr="000020d0" rw_flags="RW" width="4" name="BT_POLAR_QUAD_POLAR_CONSTS" comment=""/>
+ <register addr="000020d4" rw_flags="RW" width="2" name="BT_POLAR_COMPENSATION_DATA_WRITE" comment="Compensation Y LUT write register"/>
+ <register addr="000020d8" rw_flags="R" width="2" name="BT_POLAR_COMPENSATION_DATA_READ" comment="Compensation Y LUT read register"/>
+ <register addr="000020dc" rw_flags="RW" width="1" name="BT_POLAR_COMPENSATION_ADDR" comment="Compensation Y LUT address register"/>
+ <register addr="000020e0" rw_flags="RW" width="4" name="BT_POLAR_TEST_STIM" comment="Polar Test stimulus"/>
+ <register addr="000020e4" rw_flags="RW" width="4" name="BT_POLAR_IIR_COEFF1_LSW" comment="TX POLAR IIR filter coefficients (Biquad 1)"/>
+ <register addr="000020e8" rw_flags="RW" width="1" name="BT_POLAR_IIR_COEFF1_MSB" comment="TX POLAR IIR filter coefficients (Biquad 1)"/>
+ <register addr="000020ec" rw_flags="RW" width="4" name="BT_POLAR_IIR_COEFF2_LSW" comment="TX POLAR IIR filter coefficients (Biquad 2)"/>
+ <register addr="000020f0" rw_flags="RW" width="1" name="BT_POLAR_IIR_COEFF2_MSB" comment="TX POLAR IIR filter coefficients (Biquad 2)"/>
+ <register addr="000020f4" rw_flags="RW" width="2" name="BT_POLAR_IIR_FILTER_CFG" comment="TX POLAR IIR filter configuration"/>
+ <register addr="000020f8" rw_flags="RW" width="4" name="BT_POLAR_POLAR_QUAD_CORR" comment=""/>
+ <register addr="000020fc" rw_flags="RW" width="2" name="BT_POLAR_POLAR_QUAD_OFFSET" comment="I and Q offset adjustments for Polar to IQ conversion"/>
+ <register addr="00002100" rw_flags="RW" width="4" name="BT_POLAR_POLAR_QUAD_CONSTS" comment=""/>
+ <register addr="00002104" rw_flags="RW" width="4" name="BT_POLAR_SIGGEN_CTRL" comment="Cal Siggen sine wave Ctrl"/>
+ <register addr="00002108" rw_flags="RW" width="1" name="BT_POLAR_INVERT_CTRL" comment="Fallback IQ Inversion control"/>
+ <register addr="0000210c" rw_flags="RW" width="1" name="BT_POLAR_SAMPLE_CTRL" comment="Controls for the BT Polar Sample block"/>
+ <register addr="00002110" rw_flags="RW" width="4" name="BT_TX_FREQ_RESAMPLE_CTRL" comment="Bluetooth Transmit Freq resampling control."/>
+ <register addr="00002114" rw_flags="RW" width="4" name="BT_TX_FREQ_RESAMPLE_TINC" comment="Bluetooth Transmit Freq resampling Tinc 16.16 format (xx.xxxxxxx) signed so 00.1000000 = 0.5, 00.0100000 = 0.25,."/>
+ <register addr="00002118" rw_flags="RW" width="1" name="BT_TX_ANTENNA_ID" comment="Control the default antenna ID selected for BT Tx"/>
+ <register addr="0000211c" rw_flags="RW" width="4" name="BT_TX_SUPP_CTRL" comment="Control BT Tx supplemental antenna switching"/>
+ <register addr="00002120" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[0]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002124" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[1]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002128" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[2]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000212c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[3]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002130" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[4]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002134" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[5]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002138" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[6]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000213c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[7]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002140" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[8]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002144" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[9]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002148" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[10]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000214c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[11]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002150" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[12]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002154" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[13]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002158" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[14]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000215c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[15]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002160" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[16]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002164" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[17]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002168" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[18]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000216c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[19]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002170" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[20]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002174" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[21]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002178" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[22]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000217c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[23]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002180" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[24]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002184" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[25]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002188" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[26]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000218c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[27]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002190" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[28]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002194" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[29]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002198" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[30]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000219c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[31]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[32]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[33]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[34]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021ac" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[35]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[36]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[37]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[38]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021bc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[39]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[40]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[41]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[42]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021cc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[43]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[44]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[45]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[46]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021dc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[47]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[48]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[49]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[50]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021ec" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[51]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[52]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[53]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[54]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021fc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[55]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002200" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[56]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002204" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[57]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002208" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[58]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000220c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[59]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002210" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[60]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002214" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[61]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002218" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[62]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000221c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[63]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002220" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[64]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002224" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[65]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002228" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[66]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000222c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[67]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002230" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[68]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002234" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[69]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002238" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[70]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000223c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[71]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002240" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[72]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002244" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[73]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002248" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[74]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000224c" rw_flags="RW" width="4" name="BT_RF_RX_CFG" comment="Bluetooth Rx configuration."/>
+ <register addr="00002250" rw_flags="RW" width="1" name="BT_RX_INTERFACE_CTRL" comment="Bluetooth Rx Interface control."/>
+ <register addr="00002254" rw_flags="RW" width="1" name="BT_RX_DEBUG_SEL" comment="Bluetooth Rx debug mux select."/>
+ <register addr="00002258" rw_flags="R" width="1" name="BT_RX_LR_CI" comment="Bluetooth Rx Long Range coding indicator."/>
+ <register addr="0000225c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[0]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002260" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[1]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002264" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[2]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002268" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[3]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000226c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[4]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002270" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[5]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002274" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[6]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002278" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[7]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000227c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[8]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002280" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[9]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002284" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[10]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002288" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[11]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000228c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[12]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002290" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[13]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002294" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[14]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002298" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[15]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000229c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[16]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[17]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[18]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[19]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022ac" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[20]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[21]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[22]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[23]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022bc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[24]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[25]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[26]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[27]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022cc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[28]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[29]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[30]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[31]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022dc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[32]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[33]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[34]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[35]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022ec" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[36]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[37]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[38]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[39]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022fc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[40]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002300" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[41]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002304" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[42]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002308" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[43]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000230c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[44]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002310" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[45]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002314" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[46]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002318" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[47]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000231c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[48]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002320" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[49]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002324" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[50]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002328" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[51]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000232c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[52]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002330" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[53]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002334" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[54]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002338" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[55]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000233c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[56]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002340" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[57]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002344" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[58]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002348" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[59]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000234c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[60]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002350" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[61]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002354" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[62]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002358" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[63]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000235c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[64]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002360" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[65]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002364" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[66]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002368" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[67]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000236c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[68]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002370" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[69]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002374" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[70]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002378" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[71]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000237c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[72]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002380" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[73]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002384" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[74]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002388" rw_flags="RW" width="1" name="BT_RX_CTRL_DEBUG_SEL" comment="Bluetooth Rx Control debug mux select."/>
+ <register addr="0000238c" rw_flags="R" width="4" name="BT_RX_BDR_SYNC_TIME" comment="The time we found BDR Sync (in relation to RFIC System Time)"/>
+ <register addr="00002390" rw_flags="RW" width="4" name="BT_RX_BDR_SYNC_TIMEOUT_OFFSET" comment="The number of microseconds before the BDR sync timeout is asserted from the point the Rx Digital enable is set (in reference to the RFIC system time)"/>
+ <register addr="00002394" rw_flags="RW" width="4" name="BT_RX_LR_SYNC_TIMEOUT_OFFSET" comment="The number of microseconds before the LR sync timeout is asserted from the point the Rx Digital enable is set (in reference to the RFIC system time)"/>
+ <register addr="00002398" rw_flags="RW" width="2" name="BT_RX_CTRL_CFG" comment="Bluetooth Rx Control configuration."/>
+ <register addr="0000239c" rw_flags="RW" width="4" name="BT_RX_MLE_ESCO_OFFSET" comment="Set to enable EDR3 symbol alignment workaround logic for Java EVT0."/>
+ <register addr="000023a0" rw_flags="RW" width="4" name="BT_RX_MLE_ACL_OFFSET" comment="Set to enable EDR3 symbol alignment workaround logic for Java EVT0."/>
+ <register addr="000023a4" rw_flags="RW" width="4" name="BT_RX_MR_SYNC_TIMING" comment="BT DPSK synchronization timing configuration"/>
+ <register addr="000023a8" rw_flags="RW" width="1" name="BT_RX_TIMER_CFG" comment="Bluetooth Rx Radio Timer configuration."/>
+ <register addr="000023ac" rw_flags="R" width="1" name="BT_RX_TIMER_STATUS" comment="Bluetooth Rx Radio Timer status."/>
+ <register addr="000023b0" rw_flags="RW" width="1" name="BT_RX_TIMER_SW_TRIGGERS" comment="Bluetooth Rx Radio Timer software triggers."/>
+ <register addr="000023b4" rw_flags="RW" width="4" name="BT_RX_TIMER_EVENT_TIME" comment="Set the required Tx event time. Used when timing to an event, not used when timing from an event."/>
+ <register addr="000023b8" rw_flags="RW" width="1" name="BT_RX_TIMER_DIG_SW_ORIDE" comment="Override timer digital outputs, when masked."/>
+ <register addr="000023bc" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_PLL_ABORT" comment="Bluetooth Rx Radio Timer - PLL Abort trigger configuration."/>
+ <register addr="000023c0" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_START" comment="Bluetooth Rx Radio Timer - Start trigger configuration."/>
+ <register addr="000023c4" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_SW_ABORT" comment="Bluetooth Rx Radio Timer - Softwre Abort trigger configuration."/>
+ <register addr="000023c8" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_DONE" comment="Bluetooth Rx Radio Timer - Done trigger configuration."/>
+ <register addr="000023cc" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_SYNC_TIMEOUT" comment="Bluetooth Rx Radio Timer - BDR Sync Timeout trigger configuration."/>
+ <register addr="000023d0" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_COEX_ABORT" comment="Bluetooth Rx Radio Timer - Coex Abort trigger configuration."/>
+ <register addr="000023d4" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_MLSE_EARLY" comment="Bluetooth Rx Radio Timer - MLSE Early trigger configuration."/>
+ <register addr="000023d8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT0_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023dc" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT1_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e0" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT2_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e4" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT3_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT4_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023ec" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT5_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f0" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT6_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f4" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT7_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT8_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023fc" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT9_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002400" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT10_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002404" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT11_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002408" rw_flags="RW" width="4" name="BT_RX_TIMER_DIG0_EN" comment=""/>
+ <register addr="0000240c" rw_flags="RW" width="2" name="BT_RX_TIMER_DIG1_EN" comment=""/>
+ <register addr="00002410" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY0" comment=""/>
+ <register addr="00002414" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY1" comment=""/>
+ <register addr="00002418" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY2" comment=""/>
+ <register addr="0000241c" rw_flags="RW" width="4" name="BT_RX_MR_FREQ_CONFIG" comment="BT DPSK demodulator frequency offset in bits [12:0] - Bit 15 when *** cleared *** enables spectrum inversion (change sign of Q channel *** after *** SDDCRS mixer)"/>
+ <register addr="00002420" rw_flags="RW" width="4" name="BT_CAL_ANALYSER_CFG" comment="This register configures the signal analyser"/>
+ <register addr="00002424" rw_flags="R" width="4" name="BT_CAL_ANALYSER_RESULT" comment="This register contains the values generated by the signal analyser, Real = [7:0], Imag = [15:8]"/>
+ <register addr="00002428" rw_flags="RW" width="4" name="BT_RX_DEMOD_CONFIG" comment="BT GFSK demodulator configuration"/>
+ <register addr="0000242c" rw_flags="RW" width="2" name="BT_BDR_FREQ_DISC_CONFIG" comment="Configures GFSK frequency discriminator"/>
+ <register addr="00002430" rw_flags="RW" width="4" name="BT_BDR_FREQ2_CONFIG" comment="Configures GFSK frequency discriminator"/>
+ <register addr="00002434" rw_flags="RW" width="2" name="BT_RX_DEMOD_BDR_DECISION_EQ_CONFIG" comment="Configures the decision-directed BDR equaliser"/>
+ <register addr="00002438" rw_flags="RW" width="1" name="BT_PHASESQUELCH_CONFIG" comment="'Squelch' functionality for frequency discriminator"/>
+ <register addr="0000243c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_CONFIG" comment="Config for and enable for the new RX BDR enhancements provided by MLSE block"/>
+ <register addr="00002440" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_LR_EXP_FREQ_CONFIG" comment="Config for MLSE LR, expected FREQ"/>
+ <register addr="00002444" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_SYNC_CONFIG" comment="MLSE config for the FFT sync block"/>
+ <register addr="00002448" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_SYNC_POWER" comment="New setting for the FFT sync block, false sync optimisations"/>
+ <register addr="0000244c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_LR_SYNC_MIN_POWER" comment="Replace LR synchroniser ECO, creat MIN_POWER reg "/>
+ <register addr="00002450" rw_flags="RW" width="1" name="BT_RX_DEMOD_MLSE_DEBUG" comment="Debug Sel"/>
+ <register addr="00002454" rw_flags="RW" width="2" name="BT_RX_SYNC_CONFIG" comment="Additional Synchroniser config"/>
+ <register addr="00002458" rw_flags="RW" width="4" name="BT_RF_ACCESS_CODE_LAP" comment="Lower address part of BT address to generate access code"/>
+ <register addr="0000245c" rw_flags="RW" width="4" name="BT_RX_WBREE_ACCESS_ADDR" comment="Wibree Access Address. Sync word to seacrhg for in received packets"/>
+ <register addr="00002460" rw_flags="RW" width="2" name="BT_RX_ANT_NET_ADDR" comment="ANT Network Address for Rx Synchroniser"/>
+ <register addr="00002464" rw_flags="RW" width="2" name="BT_RX_LLR_CONFIG" comment="LLR Configuration"/>
+ <register addr="00002468" rw_flags="RW" width="4" name="BT_RF_LLR_TRIGGER_LSW" comment="LLR Access Code to transmit or receive LSW"/>
+ <register addr="0000246c" rw_flags="RW" width="4" name="BT_RF_LLR_TRIGGER_MSW" comment="LLR Access Code to transmit or receive MSW"/>
+ <register addr="00002470" rw_flags="R" width="2" name="BT_RX_SYNC_NUM_ERRORS" comment="Number of bit errors in access code"/>
+ <register addr="00002474" rw_flags="R" width="2" name="BT_RX_FREQ_DISCRIM" comment="BT GFSK frequency discriminator output"/>
+ <register addr="00002478" rw_flags="R" width="2" name="BT_RX_FREQ_ERROR" comment="BT GFSK actual frequency offset output"/>
+ <register addr="0000247c" rw_flags="RW" width="2" name="BT_RX_DEMOD_MLE_CONFIG" comment="Config for and enable for the new RX EDR enhancements provided by MLE block"/>
+ <register addr="00002480" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM00" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002484" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM04" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002488" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM08" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="0000248c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM12" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002490" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE00" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002494" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE04" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002498" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE08" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="0000249c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE12" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="000024a0" rw_flags="RW" width="4" name="BT_RX_MR_SYNC_CONFIG" comment="BT DPSK demodulator synchronization configuration"/>
+ <register addr="000024a4" rw_flags="RW" width="2" name="BT_RX_MR_SAMP_CONFIG" comment="BT DPSK demodulator slicer configuration"/>
+ <register addr="000024a8" rw_flags="RW" width="4" name="BT_RX_MR_EQ_TAPS_LSW" comment="BT DPSK RRC-filter coefficients LSW"/>
+ <register addr="000024ac" rw_flags="RW" width="4" name="BT_RX_MR_EQ_TAPS_MSW" comment="BT DPSK RRC-filter coefficients MSW"/>
+ <register addr="000024b0" rw_flags="R" width="2" name="BT_RX_MR_FREQ" comment=""/>
+ <register addr="000024b4" rw_flags="R" width="1" name="BT_DCRS_ADC_MON_STATUS" comment="ADC power detect output register: Note: BT_DCRS_ADC_MON_SINGLE_SHOT_EN should be set if this register is being used for scanning purposes."/>
+ <register addr="000024b8" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CS_ENABLE" comment="Conditional scan enable (turns on just sincfir and adcproc)"/>
+ <register addr="000024bc" rw_flags="RW" width="1" name="BT_DCRS_CIC_CFG" comment="BT CIC decimator configuration"/>
+ <register addr="000024c0" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_ENABLE" comment="Enables optional ADC domain processing"/>
+ <register addr="000024c4" rw_flags="RW" width="2" name="BT_DCRS_ADC_MON_CONFIG" comment="Optional ADC domain processing configuration"/>
+ <register addr="000024c8" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CONFIG2" comment="Optional ADC domain processing configuration 2"/>
+ <register addr="000024cc" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CS_RESET" comment="Rising edge on this signal resets ADC RMS accumulator"/>
+ <register addr="000024d0" rw_flags="R" width="2" name="BT_DCRS_AGCGAIN_MON_AT_SYNC" comment="AGC gain parameters readback to determine gain settings at time of RxSync. Additional fields contain 4 bits recording whether saturation occurred after RxSync."/>
+ <register addr="000024d4" rw_flags="RW" width="4" name="BT_DCRS_AGC_CFG" comment="BT AGC configuration"/>
+ <register addr="000024d8" rw_flags="R" width="1" name="BT_DCRS_AGC_STATUS" comment="Capture some raw Ana sigs"/>
+ <register addr="000024dc" rw_flags="RW" width="1" name="BT_DCRS_AGC_EN_SRC" comment="Configures AGC enable criteria"/>
+ <register addr="000024e0" rw_flags="RW" width="2" name="BT_DCRS_AGC_SW_CTRL" comment="SW override enables"/>
+ <register addr="000024e4" rw_flags="RW" width="4" name="BT_DCRS_AGC_GAIN_STEPS" comment="AGC LNA step values for each saturation indicator"/>
+ <register addr="000024e8" rw_flags="RW" width="4" name="BT_DCRS_AGC_SATRST" comment="Configurable AGC Saturation Indicator resets"/>
+ <register addr="000024ec" rw_flags="RW" width="4" name="BT_DCRS_AGC_CONF1" comment="AGC configuration register 1"/>
+ <register addr="000024f0" rw_flags="RW" width="4" name="BT_DCRS_AGC_CONF2" comment="AGC configuration register 3"/>
+ <register addr="000024f4" rw_flags="RW" width="2" name="BT_DCRS_AGC_EQ_PWR_THR" comment="(Post digital gain) power threshold register for digital gain control"/>
+ <register addr="000024f8" rw_flags="RW" width="4" name="BT_DCRS_AGC_BB_PWR_THR" comment="(Pre and post digital gain) power threshold register for analog gain control"/>
+ <register addr="000024fc" rw_flags="RW" width="1" name="BT_DCRS_AGC_FAST_DIG_CTRL_CFG" comment="(Pre digital gain) power threshold register for fast digital control of the analogue gains"/>
+ <register addr="00002500" rw_flags="R" width="4" name="BT_DCRS_MON" comment="AGC gain parameters readback and Monitor raw saturation detectorors"/>
+ <register addr="00002504" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG0" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002508" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG1" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="0000250c" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG2" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002510" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG3" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002514" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG4" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002518" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG5" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="0000251c" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG6" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002520" rw_flags="RW" width="2" name="BT_DCRS_BB_EQ_CFG7" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002524" rw_flags="RW" width="1" name="BT_DCRS_EQ_CONFIG" comment="BT baseband equalizer configuration"/>
+ <register addr="00002528" rw_flags="RW" width="2" name="BT_DCRS_DBG_CFG" comment="BT debug mux configuration"/>
+ <register addr="0000252c" rw_flags="RW" width="2" name="BT_DCRS_IF_EQ_CFG" comment="BT IF equalizer filter coefficients"/>
+ <register addr="00002530" rw_flags="RW" width="1" name="BT_DCRS_IIR_CONFIG" comment="IIR decimation configuration"/>
+ <register addr="00002534" rw_flags="RW" width="2" name="BT_DCRS_NBIIR_FILTER_CFG" comment="SDDCRS NarrowBand IIR filter configuration"/>
+ <register addr="00002538" rw_flags="RW" width="4" name="BT_DCRS_NBIIR_COEFF1_LSW" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 1) LSW"/>
+ <register addr="0000253c" rw_flags="RW" width="1" name="BT_DCRS_NBIIR_COEFF1_MSB" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 1) MSB"/>
+ <register addr="00002540" rw_flags="RW" width="4" name="BT_DCRS_NBIIR_COEFF2_LSW" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 2) LSW"/>
+ <register addr="00002544" rw_flags="RW" width="1" name="BT_DCRS_NBIIR_COEFF2_MSB" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 2) MSB"/>
+ <register addr="00002548" rw_flags="RW" width="4" name="BT_DCRS_TINC_CFG" comment="BT resampling ratio configuration - Must be calculated as round((1 - 16*(BT_DCRS_CIC_DEC+1)/fAdc_MHz) * 2^26) - Use floor instead of round if BT_DCRS_PHASE_LOCK is set"/>
+ <register addr="0000254c" rw_flags="RW" width="1" name="BT_DCRS_LINT_CFG" comment="BT linear interpolator configuration"/>
+ <register addr="00002550" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_LNA0" comment=""/>
+ <register addr="00002554" rw_flags="RW" width="2" name="BT_DCRS_PHASECOMP_SHIFTS_LNA1" comment=""/>
+ <register addr="00002558" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_BUF" comment=""/>
+ <register addr="0000255c" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_MIX0" comment=""/>
+ <register addr="00002560" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_DELAYS" comment="Phase compensator delay values"/>
+ <register addr="00002564" rw_flags="RW" width="2" name="BT_DCRS_NOM_IF_BT_CFG" comment="BT nominal IF"/>
+ <register addr="00002568" rw_flags="R" width="2" name="BT_DCRS_FREQ_OFFSET_STATUS" comment=""/>
+ <register addr="0000256c" rw_flags="R" width="4" name="BT_DCRS_BB_PWR_STATUS" comment="Measured baseband power (pre-digital gain)"/>
+ <register addr="00002570" rw_flags="R" width="2" name="BT_DCRS_EQ_PWR_STATUS_AT_SYNC" comment="This is not exactly EqPwr registered at Sync. It is the post-digital gain signal power averaged over the longer period of time used for BbPwr. In order to measure this, we use BbPwr and compensate for the digital gain at Sync. This results in a stabilised RSSI value after digital gain. It also produces a 16-bit result which the XAP can more easily manage than the raw BBPwrAtSync (32 bit)Measured baseband power (post-digital gain) obtained at RxSync, averaged over the longer period of time used for pre-digital gain measurements."/>
+ <register addr="00002574" rw_flags="R" width="2" name="BT_DCRS_EQ_PWR_STATUS" comment="Raw EqPwr"/>
+ <register addr="00002578" rw_flags="RW" width="2" name="BT_DCRS_AGC_PWR_MEAS" comment="AGC power measure configuration"/>
+ <register addr="0000257c" rw_flags="RW" width="1" name="BT_DCRS_SYNCPHASE_CONFIG" comment="Configures phase of clock synchronization buffer"/>
+ <register addr="00002580" rw_flags="R" width="4" name="BT_ANA_STATUS" comment="Miscellaneous readable analogue bits"/>
+ <register addr="00002584" rw_flags="R" width="4" name="BT_ANA_LO_DPLL_TEST_STATUS" comment="This register contains test outputs from the LO"/>
+ <register addr="00002588" rw_flags="R" width="4" name="BT_ANA_LO_DPLL_PM_STATUS" comment="This register contains PM outputs from the LO"/>
+ <register addr="0000258c" rw_flags="RW" width="4" name="BT_ANA_MISC" comment=""/>
+ <register addr="00002590" rw_flags="RW" width="4" name="BT_ANA_STATIC_SPARE" comment="Static spare bits for analogue. Descriptions will be updated based on analogue usage."/>
+ <register addr="00002594" rw_flags="RW" width="4" name="BT_ANA_RXRF" comment=""/>
+ <register addr="00002598" rw_flags="RW" width="4" name="BT_ANA_RXADC" comment=""/>
+ <register addr="0000259c" rw_flags="RW" width="4" name="BT_ANA_TXBB_0" comment=""/>
+ <register addr="000025a0" rw_flags="RW" width="4" name="BT_ANA_TXRF_0" comment=""/>
+ <register addr="000025a4" rw_flags="RW" width="4" name="BT_ANA_TXRF_1" comment=""/>
+ <register addr="000025a8" rw_flags="RW" width="2" name="BT_ANA_TXRF_2" comment=""/>
+ <register addr="000025ac" rw_flags="RW" width="4" name="BT_ANA_LO_CLKREF_ADC" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b0" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_CONF1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b4" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_CONF2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b8" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_OPEN1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025bc" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_OPEN2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c0" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c4" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_CONF1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c8" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_CONF2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025cc" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d0" rw_flags="RW" width="4" name="BT_ANA_LO_D_FREQ1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d4" rw_flags="RW" width="4" name="BT_ANA_LO_D_FREQ2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d8" rw_flags="RW" width="4" name="BT_ANA_LO_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025dc" rw_flags="RW" width="4" name="BT_ANA_LO_PLL_RESV" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e0" rw_flags="RW" width="4" name="BT_ANA_LO_PU_DCO_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e4" rw_flags="RW" width="4" name="BT_ANA_LO_PU_TDC_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e8" rw_flags="RW" width="4" name="BT_ANA_LO_AREG_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025ec" rw_flags="RW" width="4" name="BT_ANA_LO_TDC_NLMEM" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f0" rw_flags="RW" width="4" name="BT_ANA_LO_TOP" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f4" rw_flags="RW" width="1" name="BT_ANA_LO_MISC" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f8" rw_flags="RW" width="2" name="BT_ANA_LO_PM_CONF" comment="This register is one of the LO configuration registers for phase modulation (i.e. Stable Modulation Index)."/>
+ <register addr="000025fc" rw_flags="RW" width="4" name="BT_ANA_LO_LOGEN1" comment="This register is one of the WLAN LO configuration registers"/>
+ <register addr="00002600" rw_flags="RW" width="4" name="BT_ANA_LO_LOGEN2" comment="This register is one of the WLAN LO configuration registers"/>
+ <register addr="00002604" rw_flags="R" width="4" name="BT_ANA_DED_STATUS" comment="Miscellaneous readable analogue bits"/>
+ <register addr="00002608" rw_flags="RW" width="1" name="BT_ANA_DED_MISC" comment=""/>
+ <register addr="0000260c" rw_flags="RW" width="4" name="BT_ANA_DED_RXRF_0" comment=""/>
+ <register addr="00002610" rw_flags="RW" width="4" name="BT_ANA_DED_RXRF_1" comment=""/>
+ <register addr="00002614" rw_flags="RW" width="4" name="BT_ANA_DED_TXRF_0" comment=""/>
+ <register addr="00002618" rw_flags="RW" width="1" name="BT_ANA_DEBUG_SEL" comment=""/>
+ <register addr="0000261c" rw_flags="RW" width="2" name="BT_ANAIF_CFG" comment="ADC Digital saturation filter control"/>
+ <register addr="00002620" rw_flags="RW" width="1" name="BT_ANA_LO_SW_STOP" comment="Write 1 to stop the LO"/>
+ <register addr="00002624" rw_flags="RW" width="4" name="BT_ANA_SW_ENABLES" comment="Override value for timer outputs when not controlled by timer"/>
+ <register addr="00002628" rw_flags="RW" width="4" name="BT_ANA_SW_ENABLES_MASK" comment="Selects whether timer outputs or override bits are used for analogue"/>
+ <register addr="0000262c" rw_flags="R" width="4" name="BT_ANA_ENABLES_STATUS" comment="Shows values being driven to analogue interface after timer and masking function is resolved"/>
+ <register addr="00002630" rw_flags="RW" width="4" name="BT_ANA_LNA_ZIN_TRIM_LUT" comment="First 4 locations of LUT used to generate the 2G5 LNA ZinTrim value."/>
+ <register addr="00002634" rw_flags="R" width="1" name="BT_ANT_ID" comment="Currently selected BT antenna ID, a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002638" rw_flags="RW" width="2" name="BT_ANT_SEL_CFG" comment="Antenna ID -&gt; FEM_CTRL0 mapping"/>
+ </block>
+ <block name="btwl_common" comment="">
+ <register addr="00001000" rw_flags="RW" width="2" name="AUX_BIST_ADC_CTRL" comment="Control register for auxiliary ADC"/>
+ <register addr="00001004" rw_flags="RW" width="2" name="AUX_BIST_ADC_LEVEL" comment="DAC value driven to auxiliary ADC"/>
+ <register addr="00001008" rw_flags="R" width="2" name="AUX_BIST_ADC_STATUS" comment="Returns the data from auxiliary ADC"/>
+ <register addr="0000100c" rw_flags="RW" width="2" name="BTWL_BIST_ADC_CTRL" comment="Control register for auxiliary ADC"/>
+ <register addr="00001010" rw_flags="RW" width="2" name="BTWL_BIST_ADC_LEVEL" comment="DAC value driven to auxiliary ADC"/>
+ <register addr="00001014" rw_flags="R" width="2" name="BTWL_BIST_ADC_STATUS" comment="Returns the data from auxiliary ADC"/>
+ <register addr="00001018" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_CFG" comment="BTWL Debug Mux Config"/>
+ <register addr="0000101c" rw_flags="RW" width="2" name="RFIC_DEBUG_CFG" comment="BTWL Debug Config"/>
+ <register addr="00001020" rw_flags="RW" width="4" name="RFIC_DEBUG_CFG2" comment="BTWL Debug Config register 2"/>
+ <register addr="00001024" rw_flags="RW" width="4" name="RFIC_DEBUG_CFG3" comment="BTWL Debug Config register 3"/>
+ <register addr="00001028" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG0" comment="Debug Mux for pin"/>
+ <register addr="0000102c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG1" comment="Debug Mux for pin"/>
+ <register addr="00001030" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG2" comment="Debug Mux for pin"/>
+ <register addr="00001034" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG3" comment="Debug Mux for pin"/>
+ <register addr="00001038" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG4" comment="Debug Mux for pin"/>
+ <register addr="0000103c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG5" comment="Debug Mux for pin"/>
+ <register addr="00001040" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG6" comment="Debug Mux for pin"/>
+ <register addr="00001044" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG7" comment="Debug Mux for pin"/>
+ <register addr="00001048" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_RFIC_CTRL1" comment="Debug Mux for pin"/>
+ <register addr="0000104c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_RFIC_CTRL2" comment="Debug Mux for pin"/>
+ <register addr="00001050" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FM_SPDY_S" comment="Debug Mux for pin"/>
+ <register addr="00001054" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM0" comment="Debug Mux for pin"/>
+ <register addr="00001058" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM1" comment="Debug Mux for pin"/>
+ <register addr="0000105c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM2" comment="Debug Mux for pin"/>
+ <register addr="00001060" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM3" comment="Debug Mux for pin"/>
+ <register addr="00001064" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM4" comment="Debug Mux for pin"/>
+ <register addr="00001068" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_SERIAL0" comment="Serialiser 0 control for Debug"/>
+ <register addr="0000106c" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_SERIAL1" comment="Serialiser 1 control for Debug"/>
+ <register addr="00001070" rw_flags="RW" width="2" name="RFIC_DEBUG_SERIAL_CFG" comment="Serialiser input config"/>
+ <register addr="00001074" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE0" comment="Serialiser input config"/>
+ <register addr="00001078" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE1" comment="Serialiser input config"/>
+ <register addr="0000107c" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE2" comment="Serialiser input config"/>
+ <register addr="00001080" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE3" comment="Serialiser input config"/>
+ <register addr="00001084" rw_flags="RW" width="4" name="RFIC_DEBUG_ZIPPY_CFG" comment="Zippy 18-bit Debug input config"/>
+ <register addr="00001088" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_SERIAL_DATA" comment="Not used"/>
+ <register addr="0000108c" rw_flags="R" width="2" name="RFIC_DEBUG_PAD_SDR_STATUS" comment="Debug Pad Inputs"/>
+ <register addr="00001090" rw_flags="R" width="2" name="RFIC_DEBUG_PAD_DDR_STATUS" comment="Debug Pad DDR Inputs"/>
+ <register addr="00001094" rw_flags="RW" width="1" name="RFIC_BRACKEN_MEM_ADDR" comment="Bracken Code/Data Mem Address"/>
+ <register addr="00001098" rw_flags="RW" width="4" name="RFIC_BRACKEN_MEM_WDATA" comment="Bracken Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="0000109c" rw_flags="R" width="4" name="RFIC_BRACKEN_MEM_RDATA" comment="Bracken Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="000010a0" rw_flags="RW" width="2" name="RFIC_BRACKEN_CFG" comment="BTWL Debug Config"/>
+ <register addr="000010a4" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP_MEM_ADDR" comment="Bracken DTCP Mem Address"/>
+ <register addr="000010a8" rw_flags="RW" width="4" name="RFIC_BRACKEN_DTCP_MEM_WDATA" comment="Bracken DTCP Mem Write Data"/>
+ <register addr="000010ac" rw_flags="R" width="4" name="RFIC_BRACKEN_DTCP_MEM_RDATA" comment="Bracken DTCP Mem Read Data"/>
+ <register addr="000010b0" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP0_REG_ADDR" comment="Bracken DTCP0 Regs Address"/>
+ <register addr="000010b4" rw_flags="RW" width="2" name="RFIC_BRACKEN_DTCP0_REG_WDATA" comment="Bracken DTCP0 Regs Write Data"/>
+ <register addr="000010b8" rw_flags="R" width="2" name="RFIC_BRACKEN_DTCP0_REG_RDATA" comment="Bracken DTCP0 Regs Read Data"/>
+ <register addr="000010bc" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP1_REG_ADDR" comment="Bracken DTCP1 Regs Address"/>
+ <register addr="000010c0" rw_flags="RW" width="2" name="RFIC_BRACKEN_DTCP1_REG_WDATA" comment="Bracken DTCP1 Regs Write Data"/>
+ <register addr="000010c4" rw_flags="R" width="2" name="RFIC_BRACKEN_DTCP1_REG_RDATA" comment="Bracken DTCP1 Regs Read Data"/>
+ <register addr="000010c8" rw_flags="R" width="2" name="RFIC_DEBUG_STATUS" comment="Main Debug Status register"/>
+ <register addr="000010cc" rw_flags="RW" width="2" name="RFIC_SW_ZIPPY_TO_BB_FLAGS" comment="Zippy flag data (info and channel) to be sent to BBIC"/>
+ <register addr="000010d0" rw_flags="RW" width="1" name="RFIC_SW_ZIPPY_TO_RF_FILTER" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the RFIC"/>
+ <register addr="000010d4" rw_flags="RW" width="1" name="RFIC_SW_ZIPPY_TO_BB_RESV" comment="Zippy reserved signal for SW data to the BBIC"/>
+ <register addr="000010d8" rw_flags="R" width="2" name="RFIC_SW_ZIPPY_TO_RF_FLAGS" comment="Zippy flag data to the RFIC, plus latched Valid and Ack"/>
+ <register addr="000010dc" rw_flags="RW" width="2" name="RFIC_ZIPPY_ORIDE_CFG" comment="Zippy override config"/>
+ <register addr="000010e0" rw_flags="RW" width="4" name="RFIC_ZIPPY_ORIDE_DATA" comment="Zippy override data for Zippy-to-BTWL Flags busses"/>
+ <register addr="000010e4" rw_flags="R" width="2" name="RFIC_ZIPPY_FLAGS_MON" comment="Zippy monitor for BTWL-to-Zippy Flags, bus selected from CFG register"/>
+ <register addr="000010e8" rw_flags="RW" width="2" name="RFIC_BRACKEN_TIMER" comment="Bracken Timer"/>
+ <register addr="000010ec" rw_flags="R" width="4" name="RFIC_PROC_STATUS" comment="Status information for rfic_proc"/>
+ <register addr="000010f0" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_INV0" comment="Optional invert for each BT DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010f4" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_INV1" comment="Optional invert for each BT DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010f8" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV0" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010fc" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV1" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001100" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV2" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001104" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV3" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001108" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV0" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="0000110c" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV1" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001110" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV2" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001114" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV3" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001118" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV0" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="0000111c" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV1" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001120" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV2" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001124" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV3" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001128" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_OFF0" comment="Set to turn off drive of each BT DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000112c" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_OFF1" comment="Set to turn off drive of each BT DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001130" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF0" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001134" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF1" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001138" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF2" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000113c" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF3" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001140" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF0" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001144" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF1" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001148" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF2" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000114c" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF3" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001150" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF0" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001154" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF1" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001158" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF2" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000115c" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF3" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001160" rw_flags="R" width="4" name="RFIC_MON_BT_AD0" comment="Monitor BT AD signals right at the AD interface"/>
+ <register addr="00001164" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD0" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="00001168" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD1" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="0000116c" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD2" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="00001170" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD0" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ <register addr="00001174" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD1" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ <register addr="00001178" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD2" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ </block>
+ <block name="coex_rf_btpath" comment="">
+ <register addr="00006000" rw_flags="RW" width="1" name="COEX_RF_BTP_CFG" comment="Coexistence RFIC configuration."/>
+ <register addr="00006004" rw_flags="RW" width="1" name="COEX_RF_BTP_SW_RESET" comment="Placeholder"/>
+ <register addr="00006008" rw_flags="RW" width="2" name="COEX_RF_BTP_TRAN_CTRL_CFG" comment="Coexistence Transition Control configuration."/>
+ <register addr="0000600c" rw_flags="RW" width="2" name="COEX_RF_BTP_FEC_CFG" comment="BT RF Switch Configurations"/>
+ <register addr="00006010" rw_flags="RW" width="4" name="COEX_RF_BTP_PROT_CHANGE_MODE" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00006014" rw_flags="RW" width="1" name="COEX_RF_BTP_PROT_CFG" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="coex_rf_common" comment="">
+ <register addr="00003000" rw_flags="RW" width="1" name="COEX_RF_CMN_CFG" comment="Coexistence RFIC configuration."/>
+ <register addr="00003004" rw_flags="RW" width="1" name="COEX_RF_CMN_FEM_COMBINE_CFG" comment="Coexistence RFIC configuration."/>
+ </block>
+ <block name="coex_rf_wlpath_0" comment="">
+ <register addr="00004000" rw_flags="RW" width="1" name="COEX_RF_WLP_CFG_I0" comment="Coexistence RFIC configuration."/>
+ <register addr="00004004" rw_flags="RW" width="1" name="COEX_RF_WLP_SW_RESET_I0" comment="Placeholder"/>
+ <register addr="00004008" rw_flags="RW" width="4" name="COEX_RF_WLP_ARB_CFG_I0" comment=""/>
+ <register addr="0000400c" rw_flags="RW" width="4" name="COEX_RF_WLP_TRAN_CTRL_CFG_I0" comment="Coexistence Transition Control configuration."/>
+ <register addr="00004010" rw_flags="RW" width="2" name="COEX_RF_WLP_SHRX_CFG_I0" comment=""/>
+ <register addr="00004014" rw_flags="RW" width="1" name="COEX_RF_WLP_SHTX_CFG_I0" comment="Coexistence Shared Tx Mux configuration."/>
+ <register addr="00004018" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG_I0" comment="2G RF Switch Configurations"/>
+ <register addr="0000401c" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG1_I0" comment="2G RF Switch Configurations"/>
+ <register addr="00004020" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG2_I0" comment="2G RF Switch Configurations"/>
+ <register addr="00004024" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_5G_CFG_I0" comment="5G RF Switch Configurations"/>
+ <register addr="00004028" rw_flags="RW" width="1" name="COEX_RF_WLP_FEC_5G_CFG1_I0" comment="5G RF Switch Configurations"/>
+ <register addr="0000402c" rw_flags="RW" width="4" name="COEX_RF_WLP_PROT_CHANGE_MODE_I0" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00004030" rw_flags="RW" width="1" name="COEX_RF_WLP_PROT_CFG_I0" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="coex_rf_wlpath_1" comment="">
+ <register addr="00005000" rw_flags="RW" width="1" name="COEX_RF_WLP_CFG_I1" comment="Coexistence RFIC configuration."/>
+ <register addr="00005004" rw_flags="RW" width="1" name="COEX_RF_WLP_SW_RESET_I1" comment="Placeholder"/>
+ <register addr="00005008" rw_flags="RW" width="4" name="COEX_RF_WLP_ARB_CFG_I1" comment=""/>
+ <register addr="0000500c" rw_flags="RW" width="4" name="COEX_RF_WLP_TRAN_CTRL_CFG_I1" comment="Coexistence Transition Control configuration."/>
+ <register addr="00005010" rw_flags="RW" width="2" name="COEX_RF_WLP_SHRX_CFG_I1" comment=""/>
+ <register addr="00005014" rw_flags="RW" width="1" name="COEX_RF_WLP_SHTX_CFG_I1" comment="Coexistence Shared Tx Mux configuration."/>
+ <register addr="00005018" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG_I1" comment="2G RF Switch Configurations"/>
+ <register addr="0000501c" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG1_I1" comment="2G RF Switch Configurations"/>
+ <register addr="00005020" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG2_I1" comment="2G RF Switch Configurations"/>
+ <register addr="00005024" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_5G_CFG_I1" comment="5G RF Switch Configurations"/>
+ <register addr="00005028" rw_flags="RW" width="1" name="COEX_RF_WLP_FEC_5G_CFG1_I1" comment="5G RF Switch Configurations"/>
+ <register addr="0000502c" rw_flags="RW" width="4" name="COEX_RF_WLP_PROT_CHANGE_MODE_I1" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00005030" rw_flags="RW" width="1" name="COEX_RF_WLP_PROT_CFG_I1" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="rfic_pad_control" comment="">
+ <register addr="00007000" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL2" comment="Control register for pad FEM_CTRL2"/>
+ <register addr="00007004" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL3" comment="Control register for pad FEM_CTRL3"/>
+ <register addr="00007008" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL4" comment="Control register for pad FEM_CTRL4"/>
+ <register addr="0000700c" rw_flags="RW" width="2" name="PAD_CONTROL_RFIC_CTRL0" comment="Control register for pad RFIC_CTRL0"/>
+ <register addr="00007010" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL0" comment="Control register for pad FEM_CTRL0"/>
+ <register addr="00007014" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL1" comment="Control register for pad FEM_CTRL1"/>
+ <register addr="00007018" rw_flags="RW" width="1" name="PAD_CONTROL_FM_SPDY" comment="Control register for pad FM_SPDY"/>
+ <register addr="0000701c" rw_flags="RW" width="1" name="PAD_CONTROL_RFIC_CTRL2" comment="Control register for pad RFIC_CTRL2"/>
+ <register addr="00007020" rw_flags="RW" width="1" name="PAD_CONTROL_RFIC_CTRL1" comment="Control register for pad RFIC_CTRL1"/>
+ </block>
+ <block name="wl_rf_common" comment="">
+ <register addr="00008000" rw_flags="RW" width="1" name="WLRF_DEBUG0_SEL" comment="WLAN RFIC debug select for output DEBUG1"/>
+ <register addr="00008004" rw_flags="RW" width="1" name="WLRF_DEBUG1_SEL" comment="WLAN RFIC debug select for output DEBUG1"/>
+ <register addr="00008008" rw_flags="RW" width="1" name="WLRF_AIQ_SWAP_CONFIG" comment="Optional AIQ swap controls"/>
+ <register addr="0000800c" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CONFIG" comment="Temperature sensor logic configuration."/>
+ <register addr="00008010" rw_flags="R" width="2" name="WLRF_RADIO_TEMP_INT_STATUS" comment="Status of generated interrupt events."/>
+ <register addr="00008014" rw_flags="W" width="2" name="WLRF_RADIO_TEMP_INT_CLEAR" comment="Clear the status of generated interrupt events."/>
+ <register addr="00008018" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_BITFIELD" comment="Set a bit to 1 to enable checking of that temperature sensor."/>
+ <register addr="0000801c" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[0]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008020" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[0]" comment="Status for the sensor."/>
+ <register addr="00008024" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[0]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008028" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[1]" comment="Mode in which to run the sensor checking."/>
+ <register addr="0000802c" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[1]" comment="Status for the sensor."/>
+ <register addr="00008030" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[1]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008034" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[2]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008038" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[2]" comment="Status for the sensor."/>
+ <register addr="0000803c" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[2]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008040" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[3]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008044" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[3]" comment="Status for the sensor."/>
+ <register addr="00008048" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[3]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="0000804c" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[4]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008050" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[4]" comment="Status for the sensor."/>
+ <register addr="00008054" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[4]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008058" rw_flags="RW" width="4" name="WL_ANA_PERIPH_CONFIG" comment="This register controls the peripheral block"/>
+ <register addr="0000805c" rw_flags="RW" width="4" name="WL_ANA_PERIPH_CONFIG2" comment=""/>
+ <register addr="00008060" rw_flags="RW" width="1" name="WL_ANA_ABB_RCCAL_CONFIG" comment=""/>
+ <register addr="00008064" rw_flags="RW" width="4" name="WLRF_RADIO_RCCAL_CTRL_CFG1" comment=""/>
+ <register addr="00008068" rw_flags="RW" width="4" name="WLRF_RADIO_RCCAL_CTRL_CFG2" comment=""/>
+ <register addr="0000806c" rw_flags="R" width="2" name="WLRF_RADIO_RCCAL_CTRL_STATUS" comment=""/>
+ </block>
+ <block name="wl_rf_path_0" comment="">
+ <register addr="00009000" rw_flags="RW" width="1" name="WLRF_DEBUG_SELECT_I0" comment="Selects which debug appears on the output of the WLAN block"/>
+ <register addr="00009004" rw_flags="R" width="2" name="WLRF_DEBUG_STATUS_I0" comment="Returns the current value on the debug bus"/>
+ <register addr="00009008" rw_flags="RW" width="1" name="WLRF_RADIO_CONFIG_I0" comment="Miscellaneous config bits"/>
+ <register addr="0000900c" rw_flags="RW" width="4" name="WLRF_ANA_TRIM_TX_I0" comment="This register sets the modulation dependent analogue trims in low power mode and when Ana Tx Test Mode is selected (in WLRF_RADIO_CONFIG register)"/>
+ <register addr="00009010" rw_flags="RW" width="4" name="WLRF_ANA_TX_CCK_TRIM_CONF_I0" comment="CCK modulation dependent analogue trims"/>
+ <register addr="00009014" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM0_TRIM_CONF_I0" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 0"/>
+ <register addr="00009018" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM1_TRIM_CONF_I0" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 1"/>
+ <register addr="0000901c" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG1_I0" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="00009020" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG2_I0" comment="Configuration bits for the AGC: gains ranges definition. valid when AGC is active, and gain not forced."/>
+ <register addr="00009024" rw_flags="RW" width="2" name="WLRF_RADIO_RX_LEVEL_I0" comment="This register contains the value to be sent to the analogue gain stages if the AGC is disabled."/>
+ <register addr="00009028" rw_flags="R" width="2" name="WLRF_RADIO_GAIN_STATUS_I0" comment="This register contains the current gain settings to all blocks in the analogue front end"/>
+ <register addr="0000902c" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_EXT_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, turning off external LNA indication"/>
+ <register addr="00009030" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_WEAK_I0" comment="This register specifies the threshold value for the FE RSSI module, too weak indication (+ 6dB gain change request)"/>
+ <register addr="00009034" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="00009038" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_V_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000903c" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_WEAK_I0" comment="This register specifies the threshold value for the ABB RSSI module, too weak indication (+ 2.0dB gain change request)"/>
+ <register addr="00009040" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_LOUD_I0" comment="This register specifies the threshold value for the ABB RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="00009044" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_V_LOUD_I0" comment="This register specifies the threshold value for the ABB RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="00009048" rw_flags="R" width="2" name="WLRF_RADIO_RX_RSSI_I0" comment="This register contains the RSSI of the receive chain. The lower byte is the 8 bit digital RSSI (fixed to 0 since this is a radio-only chip) and the upper byte is the final analogue gain in 3dB steps."/>
+ <register addr="0000904c" rw_flags="R" width="1" name="WLRF_RSSI_FILTERED_STATUS_I0" comment="This register contains the analogue RSSI values for the receive chain, after initial processing in the rssi blocks block."/>
+ <register addr="00009050" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT0_I0" comment="First 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="00009054" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT1_I0" comment="Last 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="00009058" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT0_I0" comment="First 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000905c" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT1_I0" comment="Last 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="00009060" rw_flags="R" width="1" name="WLRF_ANA_TIMER_TX_SLOT_I0" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="00009064" rw_flags="R" width="1" name="WLRF_ANA_TIMER_RX_SLOT_I0" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="00009068" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_I0" comment="Default values for analogue enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="0000906c" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_MASK_I0" comment="Selects use of ANA_ENABLES or timer outputs. A 1 in a given bit selects the timer output."/>
+ <register addr="00009070" rw_flags="RW" width="4" name="WLRF_ANA_TRAINING_ENABLES_MASK_I0" comment="This masks the output of the Tx timer when it is not a DPD training frame. The idea is to be able to remove the extra Rx enables that are required for making DPD training work to improve power consumption on frames that don't need them. It should typically have all the Tx bits set and none of the Rx bits."/>
+ <register addr="00009074" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="00009078" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="0000907c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="00009080" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="00009084" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="00009088" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="0000908c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="00009090" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="00009094" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT0_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="00009098" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT1_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000909c" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT2_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT3_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT4_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT5_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090ac" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT6_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090b0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT7_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090b4" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_TX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="000090b8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="000090bc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="000090c0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="000090c4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="000090c8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="000090cc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="000090d0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="000090d4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="000090d8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT0_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="000090dc" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT1_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT2_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT3_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT4_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090ec" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT5_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT6_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT7_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f8" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_RX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="000090fc" rw_flags="W" width="1" name="WLRF_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RF_INT_MASK"/>
+ <register addr="00009100" rw_flags="RW" width="1" name="WLRF_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="00009104" rw_flags="R" width="1" name="WLRF_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. In addition 'raw' bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="00009108" rw_flags="RW" width="1" name="WLRF_ANAIF_DEBUG_SEL_I0" comment="WLAN RFIC AnaIf debug select."/>
+ <register addr="0000910c" rw_flags="RW" width="4" name="WLRF_DCOC_CTRL_CONFIG_I0" comment="DCOC controller config"/>
+ <register addr="00009110" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_CONFIG2_I0" comment="DCOC controller config"/>
+ <register addr="00009114" rw_flags="R" width="1" name="WLRF_DCOC_CTRL_STATUS_I0" comment="DCOC controller status."/>
+ <register addr="00009118" rw_flags="RW" width="1" name="WLRF_DCOC_CTRL_LUT_SELECT_I0" comment="Choose the LUT to access, either read or write"/>
+ <register addr="0000911c" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_LUT_WRITE_I0" comment="Write the specified value to the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="00009120" rw_flags="R" width="2" name="WLRF_DCOC_CTRL_LUT_READ_I0" comment="Read the contents of the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="00009124" rw_flags="RW" width="2" name="WLRF_ANA_INT_CFG_I0" comment="Configure source for WL status interrupts"/>
+ <register addr="00009128" rw_flags="R" width="1" name="WLRF_ANA_INT_STATUS_I0" comment="WL Status Interrupt status"/>
+ <register addr="0000912c" rw_flags="R" width="4" name="WLRF_ANA_RAW_INT_STATUS_I0" comment="Raw status from the analogue module - intended for hardware debug"/>
+ <register addr="00009130" rw_flags="RW" width="4" name="WLRF_ANA_AIQ_CFG_I0" comment="Configure AIQ interface"/>
+ <register addr="00009134" rw_flags="R" width="1" name="WLRF_ANA_AIQ_STATUS_I0" comment="Status of AIQ interface."/>
+ <register addr="00009138" rw_flags="RW" width="1" name="WLRF_ANA_SH_LO_EN_I0" comment="Enable LO sharing (with BT). Only has an affect on WIFI0."/>
+ <register addr="0000913c" rw_flags="R" width="4" name="WLRF_ANA_STATUS_I0" comment="Returns the value on the ANA_STATUS bus"/>
+ <register addr="00009140" rw_flags="RW" width="4" name="WL_ANA_2G_LNA_TRIM_LUT_I0" comment="This register defines the LUT used to generate ZIN_TRIM values for 2G5 LNAs"/>
+ <register addr="00009144" rw_flags="RW" width="4" name="WL_ANA_FE_LUT0_I0" comment=""/>
+ <register addr="00009148" rw_flags="RW" width="4" name="WL_ANA_FE_LUT1_I0" comment=""/>
+ <register addr="0000914c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT2_I0" comment=""/>
+ <register addr="00009150" rw_flags="RW" width="4" name="WL_ANA_FE_LUT3_I0" comment=""/>
+ <register addr="00009154" rw_flags="RW" width="4" name="WL_ANA_FE_LUT4_I0" comment=""/>
+ <register addr="00009158" rw_flags="RW" width="4" name="WL_ANA_FE_LUT5_I0" comment=""/>
+ <register addr="0000915c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT6_I0" comment=""/>
+ <register addr="00009160" rw_flags="RW" width="4" name="WL_ANA_FE_LUT7_I0" comment=""/>
+ <register addr="00009164" rw_flags="RW" width="4" name="WL_ANA_FE_LUT8_I0" comment=""/>
+ <register addr="00009168" rw_flags="R" width="4" name="WLRF_ANA_ENABLES_STATUS_I0" comment="This register contains the current values of the Analogue Enables, after all masking and multiplexing."/>
+ <register addr="0000916c" rw_flags="R" width="2" name="WLRF_ANA_RAW_IB_RSSI_STATUS_I0" comment="Raw IB RSSI from analogue."/>
+ <register addr="00009170" rw_flags="R" width="2" name="WLRF_ANA_RAW_ABB_RSSI_STATUS_I0" comment="Raw ABB RSSI from analogue."/>
+ <register addr="00009174" rw_flags="RW" width="1" name="WL_ANA_MISC_I0" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="00009178" rw_flags="RW" width="1" name="WL_ANA_BIAS_EN_I0" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000917c" rw_flags="RW" width="4" name="WL_ANA_TEST_EN_I0" comment="This register controls enabling of test facilities"/>
+ <register addr="00009180" rw_flags="RW" width="1" name="WL_ANA_DCOC_CTRL_I0" comment="This register controls the DC offset compensation block"/>
+ <register addr="00009184" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009188" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG2_I0" comment="This register controls Rx baseband"/>
+ <register addr="0000918c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG3_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009190" rw_flags="RW" width="2" name="WL_ANA_ABB_RX_CONFIG4_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009194" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG5_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009198" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG6_I0" comment="This register controls Rx baseband"/>
+ <register addr="0000919c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_RSSI_CONFIG_I0" comment="This register controls Rx RSSI blocks"/>
+ <register addr="000091a0" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091a4" rw_flags="RW" width="2" name="WL_ANA_ABB_TX_CONFIG2_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091a8" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG3_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091ac" rw_flags="RW" width="4" name="WL_ANA_2G_RX_RF_CONFIG_I0" comment="This register controls the 2G Rx RF block"/>
+ <register addr="000091b0" rw_flags="RW" width="1" name="WL_ANA_2G_RX_LNA_CONFIG_I0" comment="This register controls the 2G Rx LNA block"/>
+ <register addr="000091b4" rw_flags="RW" width="1" name="WL_ANA_5G_RX_LNA_CONFIG_I0" comment="This register controls the 5G Rx LNA block"/>
+ <register addr="000091b8" rw_flags="RW" width="4" name="WL_ANA_5G_RX_MIX_CONFIG_I0" comment="This register controls the 5G Rx mixer block"/>
+ <register addr="000091bc" rw_flags="RW" width="2" name="WL_ANA_RX_RF_MISC_CONFIG_I0" comment="This register controls miscellaneous Rx RF features"/>
+ <register addr="000091c0" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MISC_CONFIG_I0" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="000091c4" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MISC_CONFIG_I0" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="000091c8" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MIX_DRV_CONFIG_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091cc" rw_flags="RW" width="1" name="WL_ANA_TX_2G_MIX_DRV_CONFIG2_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d0" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MIX_DRV_CONFIG_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d4" rw_flags="RW" width="1" name="WL_ANA_TX_5G_MIX_DRV_CONFIG2_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d8" rw_flags="RW" width="2" name="WL_ANA_TX_RF_PA_PROT_CONFIG_I0" comment="This register controls the Tx RF PA and protection blocks"/>
+ <register addr="000091dc" rw_flags="RW" width="4" name="WL_ANA_RESERVED0_I0" comment="Reserved"/>
+ <register addr="000091e0" rw_flags="RW" width="4" name="WL_ANA_RESERVED1_I0" comment="Reserved"/>
+ <register addr="000091e4" rw_flags="RW" width="4" name="WL_ANA_LO_TOP_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091e8" rw_flags="RW" width="4" name="WL_ANA_LO_CLKREF_ADC_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091ec" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091f0" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091f4" rw_flags="RW" width="1" name="WL_ANA_LO_PLL_STOP_I0" comment="This register written to stop the PLL from running"/>
+ <register addr="000091f8" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091fc" rw_flags="RW" width="4" name="WL_ANA_LO_PU_TDC_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009200" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009204" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009208" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000920c" rw_flags="RW" width="4" name="WL_ANA_LO_TDC_NLMEM_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009210" rw_flags="RW" width="4" name="WL_ANA_LO_PU_DCO_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009214" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009218" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000921c" rw_flags="RW" width="4" name="WL_ANA_LO_AREG_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009220" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009224" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009228" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000922c" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009230" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009234" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009238" rw_flags="RW" width="4" name="WL_ANA_LO_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000923c" rw_flags="RW" width="4" name="WL_ANA_LO_PLL_RESV_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009240" rw_flags="R" width="4" name="WL_ANA_LO_DPLL_TEST_STATUS_I0" comment="This register contains test outputs from the LO"/>
+ </block>
+ <block name="wl_rf_path_1" comment="">
+ <register addr="0000a000" rw_flags="RW" width="1" name="WLRF_DEBUG_SELECT_I1" comment="Selects which debug appears on the output of the WLAN block"/>
+ <register addr="0000a004" rw_flags="R" width="2" name="WLRF_DEBUG_STATUS_I1" comment="Returns the current value on the debug bus"/>
+ <register addr="0000a008" rw_flags="RW" width="1" name="WLRF_RADIO_CONFIG_I1" comment="Miscellaneous config bits"/>
+ <register addr="0000a00c" rw_flags="RW" width="4" name="WLRF_ANA_TRIM_TX_I1" comment="This register sets the modulation dependent analogue trims in low power mode and when Ana Tx Test Mode is selected (in WLRF_RADIO_CONFIG register)"/>
+ <register addr="0000a010" rw_flags="RW" width="4" name="WLRF_ANA_TX_CCK_TRIM_CONF_I1" comment="CCK modulation dependent analogue trims"/>
+ <register addr="0000a014" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM0_TRIM_CONF_I1" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 0"/>
+ <register addr="0000a018" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM1_TRIM_CONF_I1" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 1"/>
+ <register addr="0000a01c" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG1_I1" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="0000a020" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG2_I1" comment="Configuration bits for the AGC: gains ranges definition. valid when AGC is active, and gain not forced."/>
+ <register addr="0000a024" rw_flags="RW" width="2" name="WLRF_RADIO_RX_LEVEL_I1" comment="This register contains the value to be sent to the analogue gain stages if the AGC is disabled."/>
+ <register addr="0000a028" rw_flags="R" width="2" name="WLRF_RADIO_GAIN_STATUS_I1" comment="This register contains the current gain settings to all blocks in the analogue front end"/>
+ <register addr="0000a02c" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_EXT_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, turning off external LNA indication"/>
+ <register addr="0000a030" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_WEAK_I1" comment="This register specifies the threshold value for the FE RSSI module, too weak indication (+ 6dB gain change request)"/>
+ <register addr="0000a034" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="0000a038" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_V_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000a03c" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_WEAK_I1" comment="This register specifies the threshold value for the ABB RSSI module, too weak indication (+ 2.0dB gain change request)"/>
+ <register addr="0000a040" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_LOUD_I1" comment="This register specifies the threshold value for the ABB RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="0000a044" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_V_LOUD_I1" comment="This register specifies the threshold value for the ABB RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000a048" rw_flags="R" width="2" name="WLRF_RADIO_RX_RSSI_I1" comment="This register contains the RSSI of the receive chain. The lower byte is the 8 bit digital RSSI (fixed to 0 since this is a radio-only chip) and the upper byte is the final analogue gain in 3dB steps."/>
+ <register addr="0000a04c" rw_flags="R" width="1" name="WLRF_RSSI_FILTERED_STATUS_I1" comment="This register contains the analogue RSSI values for the receive chain, after initial processing in the rssi blocks block."/>
+ <register addr="0000a050" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT0_I1" comment="First 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="0000a054" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT1_I1" comment="Last 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="0000a058" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT0_I1" comment="First 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000a05c" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT1_I1" comment="Last 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000a060" rw_flags="R" width="1" name="WLRF_ANA_TIMER_TX_SLOT_I1" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="0000a064" rw_flags="R" width="1" name="WLRF_ANA_TIMER_RX_SLOT_I1" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="0000a068" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_I1" comment="Default values for analogue enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="0000a06c" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_MASK_I1" comment="Selects use of ANA_ENABLES or timer outputs. A 1 in a given bit selects the timer output."/>
+ <register addr="0000a070" rw_flags="RW" width="4" name="WLRF_ANA_TRAINING_ENABLES_MASK_I1" comment="This masks the output of the Tx timer when it is not a DPD training frame. The idea is to be able to remove the extra Rx enables that are required for making DPD training work to improve power consumption on frames that don't need them. It should typically have all the Tx bits set and none of the Rx bits."/>
+ <register addr="0000a074" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="0000a078" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="0000a07c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="0000a080" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="0000a084" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="0000a088" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="0000a08c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="0000a090" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="0000a094" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT0_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="0000a098" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT1_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a09c" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT2_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT3_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT4_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT5_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0ac" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT6_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0b0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT7_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0b4" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_TX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="0000a0b8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="0000a0bc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="0000a0c0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="0000a0c4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="0000a0c8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="0000a0cc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="0000a0d0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="0000a0d4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="0000a0d8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT0_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="0000a0dc" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT1_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT2_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT3_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT4_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0ec" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT5_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT6_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT7_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f8" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_RX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="0000a0fc" rw_flags="W" width="1" name="WLRF_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RF_INT_MASK"/>
+ <register addr="0000a100" rw_flags="RW" width="1" name="WLRF_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="0000a104" rw_flags="R" width="1" name="WLRF_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. In addition 'raw' bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="0000a108" rw_flags="RW" width="1" name="WLRF_ANAIF_DEBUG_SEL_I1" comment="WLAN RFIC AnaIf debug select."/>
+ <register addr="0000a10c" rw_flags="RW" width="4" name="WLRF_DCOC_CTRL_CONFIG_I1" comment="DCOC controller config"/>
+ <register addr="0000a110" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_CONFIG2_I1" comment="DCOC controller config"/>
+ <register addr="0000a114" rw_flags="R" width="1" name="WLRF_DCOC_CTRL_STATUS_I1" comment="DCOC controller status."/>
+ <register addr="0000a118" rw_flags="RW" width="1" name="WLRF_DCOC_CTRL_LUT_SELECT_I1" comment="Choose the LUT to access, either read or write"/>
+ <register addr="0000a11c" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_LUT_WRITE_I1" comment="Write the specified value to the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="0000a120" rw_flags="R" width="2" name="WLRF_DCOC_CTRL_LUT_READ_I1" comment="Read the contents of the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="0000a124" rw_flags="RW" width="2" name="WLRF_ANA_INT_CFG_I1" comment="Configure source for WL status interrupts"/>
+ <register addr="0000a128" rw_flags="R" width="1" name="WLRF_ANA_INT_STATUS_I1" comment="WL Status Interrupt status"/>
+ <register addr="0000a12c" rw_flags="R" width="4" name="WLRF_ANA_RAW_INT_STATUS_I1" comment="Raw status from the analogue module - intended for hardware debug"/>
+ <register addr="0000a130" rw_flags="RW" width="4" name="WLRF_ANA_AIQ_CFG_I1" comment="Configure AIQ interface"/>
+ <register addr="0000a134" rw_flags="R" width="1" name="WLRF_ANA_AIQ_STATUS_I1" comment="Status of AIQ interface."/>
+ <register addr="0000a138" rw_flags="RW" width="1" name="WLRF_ANA_SH_LO_EN_I1" comment="Enable LO sharing (with BT). Only has an affect on WIFI0."/>
+ <register addr="0000a13c" rw_flags="R" width="4" name="WLRF_ANA_STATUS_I1" comment="Returns the value on the ANA_STATUS bus"/>
+ <register addr="0000a140" rw_flags="RW" width="4" name="WL_ANA_2G_LNA_TRIM_LUT_I1" comment="This register defines the LUT used to generate ZIN_TRIM values for 2G5 LNAs"/>
+ <register addr="0000a144" rw_flags="RW" width="4" name="WL_ANA_FE_LUT0_I1" comment=""/>
+ <register addr="0000a148" rw_flags="RW" width="4" name="WL_ANA_FE_LUT1_I1" comment=""/>
+ <register addr="0000a14c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT2_I1" comment=""/>
+ <register addr="0000a150" rw_flags="RW" width="4" name="WL_ANA_FE_LUT3_I1" comment=""/>
+ <register addr="0000a154" rw_flags="RW" width="4" name="WL_ANA_FE_LUT4_I1" comment=""/>
+ <register addr="0000a158" rw_flags="RW" width="4" name="WL_ANA_FE_LUT5_I1" comment=""/>
+ <register addr="0000a15c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT6_I1" comment=""/>
+ <register addr="0000a160" rw_flags="RW" width="4" name="WL_ANA_FE_LUT7_I1" comment=""/>
+ <register addr="0000a164" rw_flags="RW" width="4" name="WL_ANA_FE_LUT8_I1" comment=""/>
+ <register addr="0000a168" rw_flags="R" width="4" name="WLRF_ANA_ENABLES_STATUS_I1" comment="This register contains the current values of the Analogue Enables, after all masking and multiplexing."/>
+ <register addr="0000a16c" rw_flags="R" width="2" name="WLRF_ANA_RAW_IB_RSSI_STATUS_I1" comment="Raw IB RSSI from analogue."/>
+ <register addr="0000a170" rw_flags="R" width="2" name="WLRF_ANA_RAW_ABB_RSSI_STATUS_I1" comment="Raw ABB RSSI from analogue."/>
+ <register addr="0000a174" rw_flags="RW" width="1" name="WL_ANA_MISC_I1" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000a178" rw_flags="RW" width="1" name="WL_ANA_BIAS_EN_I1" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000a17c" rw_flags="RW" width="4" name="WL_ANA_TEST_EN_I1" comment="This register controls enabling of test facilities"/>
+ <register addr="0000a180" rw_flags="RW" width="1" name="WL_ANA_DCOC_CTRL_I1" comment="This register controls the DC offset compensation block"/>
+ <register addr="0000a184" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a188" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG2_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a18c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG3_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a190" rw_flags="RW" width="2" name="WL_ANA_ABB_RX_CONFIG4_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a194" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG5_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a198" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG6_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a19c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_RSSI_CONFIG_I1" comment="This register controls Rx RSSI blocks"/>
+ <register addr="0000a1a0" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1a4" rw_flags="RW" width="2" name="WL_ANA_ABB_TX_CONFIG2_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1a8" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG3_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1ac" rw_flags="RW" width="4" name="WL_ANA_2G_RX_RF_CONFIG_I1" comment="This register controls the 2G Rx RF block"/>
+ <register addr="0000a1b0" rw_flags="RW" width="1" name="WL_ANA_2G_RX_LNA_CONFIG_I1" comment="This register controls the 2G Rx LNA block"/>
+ <register addr="0000a1b4" rw_flags="RW" width="1" name="WL_ANA_5G_RX_LNA_CONFIG_I1" comment="This register controls the 5G Rx LNA block"/>
+ <register addr="0000a1b8" rw_flags="RW" width="4" name="WL_ANA_5G_RX_MIX_CONFIG_I1" comment="This register controls the 5G Rx mixer block"/>
+ <register addr="0000a1bc" rw_flags="RW" width="2" name="WL_ANA_RX_RF_MISC_CONFIG_I1" comment="This register controls miscellaneous Rx RF features"/>
+ <register addr="0000a1c0" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MISC_CONFIG_I1" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="0000a1c4" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MISC_CONFIG_I1" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="0000a1c8" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MIX_DRV_CONFIG_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1cc" rw_flags="RW" width="1" name="WL_ANA_TX_2G_MIX_DRV_CONFIG2_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d0" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MIX_DRV_CONFIG_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d4" rw_flags="RW" width="1" name="WL_ANA_TX_5G_MIX_DRV_CONFIG2_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d8" rw_flags="RW" width="2" name="WL_ANA_TX_RF_PA_PROT_CONFIG_I1" comment="This register controls the Tx RF PA and protection blocks"/>
+ <register addr="0000a1dc" rw_flags="RW" width="4" name="WL_ANA_RESERVED0_I1" comment="Reserved"/>
+ <register addr="0000a1e0" rw_flags="RW" width="4" name="WL_ANA_RESERVED1_I1" comment="Reserved"/>
+ <register addr="0000a1e4" rw_flags="RW" width="4" name="WL_ANA_LO_TOP_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1e8" rw_flags="RW" width="4" name="WL_ANA_LO_CLKREF_ADC_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1ec" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1f0" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1f4" rw_flags="RW" width="1" name="WL_ANA_LO_PLL_STOP_I1" comment="This register written to stop the PLL from running"/>
+ <register addr="0000a1f8" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1fc" rw_flags="RW" width="4" name="WL_ANA_LO_PU_TDC_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a200" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a204" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a208" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a20c" rw_flags="RW" width="4" name="WL_ANA_LO_TDC_NLMEM_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a210" rw_flags="RW" width="4" name="WL_ANA_LO_PU_DCO_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a214" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a218" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a21c" rw_flags="RW" width="4" name="WL_ANA_LO_AREG_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a220" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a224" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a228" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a22c" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a230" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a234" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a238" rw_flags="RW" width="4" name="WL_ANA_LO_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a23c" rw_flags="RW" width="4" name="WL_ANA_LO_PLL_RESV_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a240" rw_flags="R" width="4" name="WL_ANA_LO_DPLL_TEST_STATUS_I1" comment="This register contains test outputs from the LO"/>
+ </block>
+ <block name="zippy_rf" comment="">
+ <register addr="0000b000" rw_flags="RW" width="2" name="ZIPPY_RF_TRANSPORT" comment="ZIPPY transport configuration."/>
+ <register addr="0000b004" rw_flags="RW" width="1" name="ZIPPY_RF_PRIORITY_INC_RATE" comment="Configure the rate at which priority increases for unserviced channels. "/>
+ <register addr="0000b008" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS0_CFG" comment="Configure flags0 interface"/>
+ <register addr="0000b00c" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS1_CFG" comment="Configure flags1 interface"/>
+ <register addr="0000b010" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS2_CFG" comment="Configure flags2 interface"/>
+ <register addr="0000b014" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS3_CFG" comment="Configure flags3 interface"/>
+ <register addr="0000b018" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS4_CFG" comment="Configure flags4 interface"/>
+ <register addr="0000b01c" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS5_CFG" comment="Configure flags5 interface"/>
+ <register addr="0000b020" rw_flags="RW" width="4" name="ZIPPY_RF_DATA_CFG" comment="Configure register access options"/>
+ <register addr="0000b024" rw_flags="RW" width="1" name="ZIPPY_RF_INT_EN" comment="Enable interrupt sources."/>
+ <register addr="0000b028" rw_flags="R" width="1" name="ZIPPY_RF_INT_STATUS" comment="Status of interrupt sources."/>
+ <register addr="0000b02c" rw_flags="W" width="1" name="ZIPPY_RF_INT_CLEAR" comment="Clear interrupt Sources by writing a 1 to the register bit."/>
+ <register addr="0000b030" rw_flags="R" width="2" name="ZIPPY_RF_DATA_COUNTS" comment="Local RF counters for data from BB to RF and RF to BB. TO be compared with equivalent ones in the RFIC"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0"?>
+<?xml-stylesheet type="text/xsl" href="SamsungWifiHip.xsl"?>
+<!-- Copyright Samsung Electronics Co. Limited 2019. All Rights Reserved. -->
+<!-- WARNING! Do not directly edit this file. -->
+<!-- This file was generated on 2019-11-29 11:48 by merge_saps.py version 1.6.1 -->
+<!-- Field name backward compatibility=True -->
+<!-- Data_References instead of firmware_references=False -->
+<!-- Add additional type definitions=False -->
+<!-- Add spare fields=False -->
+<!-- Add spare signals=False -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_control_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_data_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_debug_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_test_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_test_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_debug_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_data_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_control_sap.xml' -->
+<definitions xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="./hip.xsd">
+ <resource name="CONST"/>
+ <resource name="FILE"/>
+ <resource name="HEADER"/>
+ <resource name="INCLUDE"/>
+ <resource name="PRIMITIVE"/>
+ <resource data_ref="true" discriminant="Signal_Id" name="SIGNAL" spare="true"/>
+ <resource name="TYPE"/>
+ <type name="ACL_Policy" resource="TYPE" size="16">
+ <value name="BlackList" value="0x0000"/>
+ <value name="WhiteList" value="0x0001"/>
+ </type>
+ <type name="AC_Priority" resource="TYPE" size="16">
+ <field name="AC_VO_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_VI_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_BK_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_BE_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ </type>
+ <type name="APF_Filter_Mode" resource="TYPE" size="16">
+ <value name="Disabled" value="0x0000"/>
+ <value name="Suspend" value="0x0001"/>
+ <value name="Active" value="0x0002"/>
+ </type>
+ <type name="Action" resource="TYPE" size="16">
+ <value name="start" value="0x0001"/>
+ <value name="stop" value="0x0000"/>
+ </type>
+ <type name="Air_Power" resource="TYPE" size="16">
+ <!-- air power in the lower 8 bits -->
+ <field name="quarter_dBm">
+ <type>Air_Power_dBm</type>
+ </field>
+ <!-- power type in the upper 8 bits -->
+ <field name="type">
+ <type>Type_Of_Air_Power</type>
+ </field>
+ </type>
+ <type name="Air_Power_dBm" resource="TYPE" signed="true" size="8"/>
+ <type name="Association_Id" resource="TYPE" size="16"/>
+ <type name="Authentication_Type" resource="TYPE" size="16">
+ <value name="Open_System" value="0x0000"/>
+ <value name="Shared_Key" value="0x0001"/>
+ <value name="SAE" value="0x0003"/>
+ <value name="LEAP" value="0x0080"/>
+ </type>
+ <type name="Band" resource="TYPE" size="16">
+ <value name="Auto" value="0x0000"/>
+ <value name="5GHz" value="0x0001"/>
+ <value name="2_4GHz" value="0x0002"/>
+ </type>
+ <type name="Bandwidth" resource="TYPE" size="2" subsidiary="true">
+ <value name="20_MHz" value="0x0"/>
+ <value name="40_MHz" value="0x1"/>
+ <value name="80_MHz" value="0x2"/>
+ <value name="160_MHz" value="0x3"/>
+ </type>
+ <type name="Beacon_Periods" resource="TYPE" size="16"/>
+ <type name="BlockAck_Parameters" resource="TYPE" size="16">
+ <field name="Buffer_Size">
+ <type>Buffer_Size</type>
+ </field>
+ <field name="TID">
+ <type>TID</type>
+ </field>
+ <field name="BlockAck_Policy">
+ <type>BlockAck_Policy</type>
+ </field>
+ <field name="AMSDU_Supported">
+ <type>Usage</type>
+ </field>
+ </type>
+ <type name="BlockAck_Policy" resource="TYPE" size="1" subsidiary="true">
+ <value name="Immediate_BlockAck" value="0x1"/>
+ <value name="Delayed_BlockAck" value="0x0"/>
+ </type>
+ <type name="Boolean" resource="TYPE" size="16">
+ <value abbr="f" name="False" value="0x0000"/>
+ <value abbr="t" name="True" value="0x0001"/>
+ </type>
+ <type name="Buffer_Size" resource="TYPE" size="10" subsidiary="true"/>
+ <type name="Bulk_Data_Descriptor" resource="TYPE" size="16">
+ <value name="Inline" value="0x0000"/>
+ <value name="Smapper" value="0x0001"/>
+ </type>
+ <type flags="true" name="CW_Start_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="scan_channel" value="0x0001"/>
+ </type>
+ <type name="CW_Type" resource="TYPE" size="16">
+ <value name="sine" value="0x0000"/>
+ <value name="ramp" value="0x0001"/>
+ <value name="two_tone" value="0x0002"/>
+ <value name="dc" value="0x0003"/>
+ <value name="prn" value="0x0004"/>
+ </type>
+ <type name="Capability_Information" resource="TYPE" size="16"/>
+ <type name="Category_Mask" resource="TYPE" size="32"/>
+ <type name="Channel_Bandwidth" resource="TYPE" size="8" subsidiary="true">
+ <value name="bandwidth_20MHz" value="0x00"/>
+ <value name="bandwidth_40MHz" value="0x01"/>
+ <value name="bandwidth_80MHz" value="0x02"/>
+ <value name="bandwidth_160MHz" value="0x03"/>
+ </type>
+ <type name="Channel_Frequency" resource="TYPE" size="16"/>
+ <type name="Channel_Info" resource="TYPE" size="16">
+ <!-- channel bandwidth in the lower 8 bits -->
+ <field name="Channel_Width">
+ <type>Channel_Bandwidth</type>
+ </field>
+ <!-- primary channel position in the upper 8 bits -->
+ <field name="Primary_Channel_Position">
+ <type>Primary_Channel_Position</type>
+ </field>
+ </type>
+ <type name="Channel_Information" resource="TYPE" size="16">
+ <field name="Primary_Channel_Position">
+ <type>Primary_Channel_Position</type>
+ </field>
+ <field name="Channel_Width">
+ <type>Channel_Width</type>
+ </field>
+ </type>
+ <type name="Channel_Width" resource="TYPE" size="8" subsidiary="true"/>
+ <type name="Cipher_Suite_Selector" resource="TYPE" size="32">
+ <mask mask="ff-ff-ff-ff" name="group_cipher_suite" value="00-0f-ac-00"/>
+ <mask mask="ff-ff-ff-ff" name="wep_40" value="00-0f-ac-01"/>
+ <mask mask="ff-ff-ff-ff" name="tkip" value="00-0f-ac-02"/>
+ <mask mask="ff-ff-ff-ff" name="ccmp_128" value="00-0f-ac-04"/>
+ <mask mask="ff-ff-ff-ff" name="wep-104" value="00-0f-ac-05"/>
+ <mask mask="ff-ff-ff-ff" name="bip_cmac_128" value="00-0f-ac-06"/>
+ <mask mask="ff-ff-ff-ff" name="gcmp_128" value="00-0f-ac-08"/>
+ <mask mask="ff-ff-ff-ff" name="gcmp_256" value="00-0f-ac-09"/>
+ <mask mask="ff-ff-ff-ff" name="ccmp_256" value="00-0f-ac-10"/>
+ <mask mask="ff-ff-ff-ff" name="bip_gmac_128" value="00-0f-ac-11"/>
+ <mask mask="ff-ff-ff-ff" name="bip_gmac_256" value="00-0f-ac-12"/>
+ <mask mask="ff-ff-ff-ff" name="bip_cmac_256" value="00-0f-ac-13"/>
+ <mask mask="ff-ff-ff-ff" name="wpi-sms4" value="00-14-72-01"/>
+ </type>
+ <type name="Client_Tag" resource="TYPE" size="16"/>
+ <type name="Connection_type" resource="TYPE" size="16">
+ <value name="Wlan_Infrastructure" value="0x0000"/>
+ <value name="P2p_Operation" value="0x0001"/>
+ <value name="Nan_Further_Service_Slot" value="0x0004"/>
+ <value name="Wlan_Ranging" value="0x0005"/>
+ </type>
+ <type name="Counter32" resource="TYPE" size="32"/>
+ <type name="Counters_List" resource="TYPE">
+ <!-- "num_counts" 32 bit counters will be placed in the counts buffer in the same order
+ as requested in WLANLITE_RX_READ.request.
+ Only returns counters for rates recognised; will stop at first invalid rate. -->
+ <field name="num_counts">
+ <type>uint16</type>
+ </field>
+ <field blocklength="num_counts" name="counts">
+ <type>uint32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_FAULT.indication" name="DEBUG_FAULT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="FaultId">
+ <type>Natural16</type>
+ </field>
+ <field name="Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Arg">
+ <type>Natural32</type>
+ </field>
+ <field name="Cpu">
+ <type>Natural16</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.confirm" name="DEBUG_GENERIC.confirm" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.indication" name="DEBUG_GENERIC.indication" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.request" name="DEBUG_GENERIC.request" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_REPORT.indication" name="DEBUG_PKT_GEN_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Received_Packets">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Received_Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Kbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Free_Kbytes">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_REPORT.request" name="DEBUG_PKT_GEN_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_START.request" name="DEBUG_PKT_GEN_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Size">
+ <type>Natural16</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="IPv4_Destination_Address">
+ <type>IPv4_Address</type>
+ </field>
+ <field name="Packets_Per_Interrupt">
+ <type>Natural16</type>
+ </field>
+ <field name="Use_Streaming">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_STOP.request" name="DEBUG_PKT_GEN_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_REPORT.indication" name="DEBUG_PKT_SINK_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Received_Packets">
+ <type>Counter32</type>
+ </field>
+ <field name="Received_Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Kbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Free_Kbytes">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_REPORT.request" name="DEBUG_PKT_SINK_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_START.request" name="DEBUG_PKT_SINK_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_STOP.request" name="DEBUG_PKT_SINK_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.confirm" name="DEBUG_SPARE1.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.request" name="DEBUG_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.response" name="DEBUG_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.confirm" name="DEBUG_SPARE2.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.indication" name="DEBUG_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.request" name="DEBUG_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.response" name="DEBUG_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.confirm" name="DEBUG_SPARE3.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.indication" name="DEBUG_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.request" name="DEBUG_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.response" name="DEBUG_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE4.indication" name="DEBUG_SPARE4.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_WORD12.indication" name="DEBUG_WORD12.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Module_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Module_Sub_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field array="12" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_WORDS.indication" name="DEBUG_WORDS.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Module_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Module_Sub_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Sequence_number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="DFS_Regulatory" resource="TYPE" size="16">
+ <value name="Unknown" value="0x0000"/>
+ <value name="FCC" value="0x0001"/>
+ <value name="ETSI" value="0x0002"/>
+ <value name="JAPAN" value="0x0003"/>
+ <value name="GLOBAL" value="0x0004"/>
+ <value name="CHINA" value="0x0006"/>
+ </type>
+ <type name="Data_Block" resource="TYPE">
+ <!-- (Max Omnicli buffer size is 4K octets) -->
+ <field hidden="true" name="data_len">
+ <type>uint16</type>
+ </field>
+ <field blocklength="data_len" name="data">
+ <type>uint16</type>
+ </field>
+ </type>
+ <type name="Data_Length" resource="TYPE" size="16" subsidiary="true"/>
+ <type name="Data_Rate" resource="TYPE" size="16">
+ <!-- The format of the rate field for 11abgn/ac is:
+ Bit fields: 15..13 12..10 9..7 6 5..0
+ <mode> <bandwidth> <NSS> <SGI> <rate>
+ The format changes slightly for 11ax rates:
+ Bit fields: 15..13 12..10 9..7 6 5..4 3..0
+ <mode> <bandwidth> <NSS> <DCM> <GI> <rate>
+ Where:
+ - mode is one of:
+ 0 - 11b and <rate> is the 11b Mbps data rate rounded down
+ 1 - 11ag and <rate> is the 11a/11g Mbps data rate rounded down
+ 2 - 11n and <rate> is the HT MCS index (0..32)
+ 3 - 11ac and <rate> is the VHT MCS index (0..11)
+ 4 - 11ax and <rate> is the HE MCS index (0..11)
+ 7 - misc_count and <rate> selects non-rate counters (WLANLITE_RX_READ only)
+ - bandwidth is one of:
+ 0 - 20MHz
+ 1 - 40MHz
+ 2 - 80MHz
+ 3 - 160MHz/80+80MHz
+ - NSS is the number of spatial streams(1..8) - 1 and only applies to HT/VHT/HE rates.
+ - SGI(short guard interval) flag only applies to HT/VHT rates.
+ - DCM(dual carrier modulation) flag only applies to HE rates(MCSs 0, 1, 3 and 4 only)
+ - GI(guard interval) only applies to HE rates and is one of:
+ 0 - 0.8 us
+ 1 - 1.6 us
+ 2 - 3.2 us.
+ These values are also used to pick which rate counters we would like
+ to read in the WLANLITE_RX_READ request. -->
+ <value name="11b20_1mbps" value="0x0001"/>
+ <value name="11b20_2mbps" value="0x0002"/>
+ <value name="11b20_5m5bps" value="0x0005"/>
+ <value name="11b20_11mbps" value="0x000b"/>
+ <value name="11a20_6mbps" value="0x2006"/>
+ <value name="11a20_9mbps" value="0x2009"/>
+ <value name="11a20_12mbps" value="0x200c"/>
+ <value name="11a20_18mbps" value="0x2012"/>
+ <value name="11a20_24mbps" value="0x2018"/>
+ <value name="11a20_36mbps" value="0x2024"/>
+ <value name="11a20_48mbps" value="0x2030"/>
+ <value name="11a20_54mbps" value="0x2036"/>
+ <value name="11n20_6m5bps" value="0x4000"/>
+ <value name="11n20_13mbps" value="0x4001"/>
+ <value name="11n20_19m5bps" value="0x4002"/>
+ <value name="11n20_26mbps" value="0x4003"/>
+ <value name="11n20_39mbps" value="0x4004"/>
+ <value name="11n20_52mbps" value="0x4005"/>
+ <value name="11n20_58m5bps" value="0x4006"/>
+ <value name="11n20_65mbps" value="0x4007"/>
+ <value name="11n20_7m2bps_sgi" value="0x4040"/>
+ <value name="11n20_14m4bps_sgi" value="0x4041"/>
+ <value name="11n20_21m7bps_sgi" value="0x4042"/>
+ <value name="11n20_28m9bps_sgi" value="0x4043"/>
+ <value name="11n20_43m3bps_sgi" value="0x4044"/>
+ <value name="11n20_57m8bps_sgi" value="0x4045"/>
+ <value name="11n20_65mbps_sgi" value="0x4046"/>
+ <value name="11n20_72m2bps_sgi" value="0x4047"/>
+ <value name="11n20_13mbps_nss2" value="0x4088"/>
+ <value name="11n20_26mbps_nss2" value="0x4089"/>
+ <value name="11n20_39mbps_nss2" value="0x408a"/>
+ <value name="11n20_52mbps_nss2" value="0x408b"/>
+ <value name="11n20_78mbps_nss2" value="0x408c"/>
+ <value name="11n20_104mbps_nss2" value="0x408d"/>
+ <value name="11n20_117mbps_nss2" value="0x408e"/>
+ <value name="11n20_130mbps_nss2" value="0x408f"/>
+ <value name="11n20_14m4bps_sgi_nss2" value="0x40c8"/>
+ <value name="11n20_28m9bps_sgi_nss2" value="0x40c9"/>
+ <value name="11n20_43m3bps_sgi_nss2" value="0x40ca"/>
+ <value name="11n20_57m8bps_sgi_nss2" value="0x40cb"/>
+ <value name="11n20_86m7bps_sgi_nss2" value="0x40cc"/>
+ <value name="11n20_115m6bps_sgi_nss2" value="0x40cd"/>
+ <value name="11n20_130mbps_sgi_nss2" value="0x40ce"/>
+ <value name="11n20_144m4bps_sgi_nss2" value="0x40cf"/>
+ <value name="11n40_13m5bps" value="0x4400"/>
+ <value name="11n40_27mbps" value="0x4401"/>
+ <value name="11n40_40m5bps" value="0x4402"/>
+ <value name="11n40_54mbps" value="0x4403"/>
+ <value name="11n40_81mbps" value="0x4404"/>
+ <value name="11n40_108mbps" value="0x4405"/>
+ <value name="11n40_121m5bps" value="0x4406"/>
+ <value name="11n40_135mbps" value="0x4407"/>
+ <value name="11n40_6mbps" value="0x4420"/>
+ <value name="11n40_15mbps_sgi" value="0x4440"/>
+ <value name="11n40_30mbps_sgi" value="0x4441"/>
+ <value name="11n40_45mbps_sgi" value="0x4442"/>
+ <value name="11n40_60mbps_sgi" value="0x4443"/>
+ <value name="11n40_90mbps_sgi" value="0x4444"/>
+ <value name="11n40_120mbps_sgi" value="0x4445"/>
+ <value name="11n40_135mbps_sgi" value="0x4446"/>
+ <value name="11n40_150mbps_sgi" value="0x4447"/>
+ <value name="11n40_6m7bps_sgi" value="0x4460"/>
+ <value name="11n40_27mbps_nss2" value="0x4488"/>
+ <value name="11n40_54mbps_nss2" value="0x4489"/>
+ <value name="11n40_81mbps_nss2" value="0x448a"/>
+ <value name="11n40_108mbps_nss2" value="0x448b"/>
+ <value name="11n40_162mbps_nss2" value="0x448c"/>
+ <value name="11n40_216mbps_nss2" value="0x448d"/>
+ <value name="11n40_243mbps_nss2" value="0x448e"/>
+ <value name="11n40_270mbps_nss2" value="0x448f"/>
+ <value name="11n40_30mbps_sgi_nss2" value="0x44c8"/>
+ <value name="11n40_60mbps_sgi_nss2" value="0x44c9"/>
+ <value name="11n40_90mbps_sgi_nss2" value="0x44ca"/>
+ <value name="11n40_120mbps_sgi_nss2" value="0x44cb"/>
+ <value name="11n40_180mbps_sgi_nss2" value="0x44cc"/>
+ <value name="11n40_240mbps_sgi_nss2" value="0x44cd"/>
+ <value name="11n40_270mbps_sgi_nss2" value="0x44ce"/>
+ <value name="11n40_300mbps_sgi_nss2" value="0x44cf"/>
+ <value name="11ac20_6m5bps" value="0x6000"/>
+ <value name="11ac20_13mbps" value="0x6001"/>
+ <value name="11ac20_19m5bps" value="0x6002"/>
+ <value name="11ac20_26mbps" value="0x6003"/>
+ <value name="11ac20_39mbps" value="0x6004"/>
+ <value name="11ac20_52mbps" value="0x6005"/>
+ <value name="11ac20_58m5bps" value="0x6006"/>
+ <value name="11ac20_65mbps" value="0x6007"/>
+ <value name="11ac20_78mbps" value="0x6008"/>
+ <value name="11ac20_97m5bps" value="0x600a"/>
+ <value name="11ac20_7m2bps_sgi" value="0x6040"/>
+ <value name="11ac20_14m4bps_sgi" value="0x6041"/>
+ <value name="11ac20_21m7bps_sgi" value="0x6042"/>
+ <value name="11ac20_28m9bps_sgi" value="0x6043"/>
+ <value name="11ac20_43m3bps_sgi" value="0x6044"/>
+ <value name="11ac20_57m8bps_sgi" value="0x6045"/>
+ <value name="11ac20_65mbps_sgi" value="0x6046"/>
+ <value name="11ac20_72m2bps_sgi" value="0x6047"/>
+ <value name="11ac20_86m7bps_sgi" value="0x6048"/>
+ <value name="11ac20_108m3bps_sgi" value="0x604a"/>
+ <value name="11ac20_13mbps_nss2" value="0x6080"/>
+ <value name="11ac20_26mbps_nss2" value="0x6081"/>
+ <value name="11ac20_39mbps_nss2" value="0x6082"/>
+ <value name="11ac20_52mbps_nss2" value="0x6083"/>
+ <value name="11ac20_78mbps_nss2" value="0x6084"/>
+ <value name="11ac20_104mbps_nss2" value="0x6085"/>
+ <value name="11ac20_117mbps_nss2" value="0x6086"/>
+ <value name="11ac20_130mbps_nss2" value="0x6087"/>
+ <value name="11ac20_156mbps_nss2" value="0x6088"/>
+ <value name="11ac20_195mbps_nss2" value="0x608a"/>
+ <value name="11ac20_14m4bps_sgi_nss2" value="0x60c0"/>
+ <value name="11ac20_28m9bps_sgi_nss2" value="0x60c1"/>
+ <value name="11ac20_43m3bps_sgi_nss2" value="0x60c2"/>
+ <value name="11ac20_57m8bps_sgi_nss2" value="0x60c3"/>
+ <value name="11ac20_86m7bps_sgi_nss2" value="0x60c4"/>
+ <value name="11ac20_115m6bps_sgi_nss2" value="0x60c5"/>
+ <value name="11ac20_130mbps_sgi_nss2" value="0x60c6"/>
+ <value name="11ac20_144m4bps_sgi_nss2" value="0x60c7"/>
+ <value name="11ac20_173m3bps_sgi_nss2" value="0x60c8"/>
+ <value name="11ac20_216m7bps_sgi_nss2" value="0x60ca"/>
+ <value name="11ac40_13m5bps" value="0x6400"/>
+ <value name="11ac40_27mbps" value="0x6401"/>
+ <value name="11ac40_40m5bps" value="0x6402"/>
+ <value name="11ac40_54mbps" value="0x6403"/>
+ <value name="11ac40_81mbps" value="0x6404"/>
+ <value name="11ac40_108mbps" value="0x6405"/>
+ <value name="11ac40_121m5bps" value="0x6406"/>
+ <value name="11ac40_135mbps" value="0x6407"/>
+ <value name="11ac40_162mbps" value="0x6408"/>
+ <value name="11ac40_180mbps" value="0x6409"/>
+ <value name="11ac40_202m5bps" value="0x640a"/>
+ <value name="11ac40_225mbps" value="0x640b"/>
+ <value name="11ac40_15mbps_sgi" value="0x6440"/>
+ <value name="11ac40_30mbps_sgi" value="0x6441"/>
+ <value name="11ac40_45mbps_sgi" value="0x6442"/>
+ <value name="11ac40_60mbps_sgi" value="0x6443"/>
+ <value name="11ac40_90mbps_sgi" value="0x6444"/>
+ <value name="11ac40_120mbps_sgi" value="0x6445"/>
+ <value name="11ac40_135mbps_sgi" value="0x6446"/>
+ <value name="11ac40_150mbps_sgi" value="0x6447"/>
+ <value name="11ac40_180mbps_sgi" value="0x6448"/>
+ <value name="11ac40_200mbps_sgi" value="0x6449"/>
+ <value name="11ac40_225mbps_sgi" value="0x644a"/>
+ <value name="11ac40_250mbps_sgi" value="0x644b"/>
+ <value name="11ac40_27mbps_nss2" value="0x6480"/>
+ <value name="11ac40_54mbps_nss2" value="0x6481"/>
+ <value name="11ac40_81mbps_nss2" value="0x6482"/>
+ <value name="11ac40_108mbps_nss2" value="0x6483"/>
+ <value name="11ac40_162mbps_nss2" value="0x6484"/>
+ <value name="11ac40_216mbps_nss2" value="0x6485"/>
+ <value name="11ac40_243mbps_nss2" value="0x6486"/>
+ <value name="11ac40_270mbps_nss2" value="0x6487"/>
+ <value name="11ac40_324mbps_nss2" value="0x6488"/>
+ <value name="11ac40_360mbps_nss2" value="0x6489"/>
+ <value name="11ac40_405mbps_nss2" value="0x648a"/>
+ <value name="11ac40_450mbps_nss2" value="0x648b"/>
+ <value name="11ac40_30mbps_sgi_nss2" value="0x64c0"/>
+ <value name="11ac40_60mbps_sgi_nss2" value="0x64c1"/>
+ <value name="11ac40_90mbps_sgi_nss2" value="0x64c2"/>
+ <value name="11ac40_120mbps_sgi_nss2" value="0x64c3"/>
+ <value name="11ac40_180mbps_sgi_nss2" value="0x64c4"/>
+ <value name="11ac40_240mbps_sgi_nss2" value="0x64c5"/>
+ <value name="11ac40_270mbps_sgi_nss2" value="0x64c6"/>
+ <value name="11ac40_300mbps_sgi_nss2" value="0x64c7"/>
+ <value name="11ac40_360mbps_sgi_nss2" value="0x64c8"/>
+ <value name="11ac40_400mbps_sgi_nss2" value="0x64c9"/>
+ <value name="11ac40_450mbps_sgi_nss2" value="0x64ca"/>
+ <value name="11ac40_500mbps_sgi_nss2" value="0x64cb"/>
+ <value name="11ac80_29m3bps" value="0x6800"/>
+ <value name="11ac80_58m5bps" value="0x6801"/>
+ <value name="11ac80_87m8bps" value="0x6802"/>
+ <value name="11ac80_117mbps" value="0x6803"/>
+ <value name="11ac80_175m5bps" value="0x6804"/>
+ <value name="11ac80_234mbps" value="0x6805"/>
+ <value name="11ac80_263m3bps" value="0x6806"/>
+ <value name="11ac80_292m5bps" value="0x6807"/>
+ <value name="11ac80_351mbps" value="0x6808"/>
+ <value name="11ac80_390mbps" value="0x6809"/>
+ <value name="11ac80_438m8bps" value="0x680a"/>
+ <value name="11ac80_487m5bps" value="0x680b"/>
+ <value name="11ac80_32m5bps_sgi" value="0x6840"/>
+ <value name="11ac80_65mbps_sgi" value="0x6841"/>
+ <value name="11ac80_97m5bps_sgi" value="0x6842"/>
+ <value name="11ac80_130mbps_sgi" value="0x6843"/>
+ <value name="11ac80_195mbps_sgi" value="0x6844"/>
+ <value name="11ac80_260mbps_sgi" value="0x6845"/>
+ <value name="11ac80_292m5bps_sgi" value="0x6846"/>
+ <value name="11ac80_325mbps_sgi" value="0x6847"/>
+ <value name="11ac80_390mbps_sgi" value="0x6848"/>
+ <value name="11ac80_433m3bps_sgi" value="0x6849"/>
+ <value name="11ac80_487m5bps_sgi" value="0x684a"/>
+ <value name="11ac80_541m7bps_sgi" value="0x684b"/>
+ <value name="11ac80_58m5bps_nss2" value="0x6880"/>
+ <value name="11ac80_117mbps_nss2" value="0x6881"/>
+ <value name="11ac80_175m5bps_nss2" value="0x6882"/>
+ <value name="11ac80_234mbps_nss2" value="0x6883"/>
+ <value name="11ac80_351mbps_nss2" value="0x6884"/>
+ <value name="11ac80_468mbps_nss2" value="0x6885"/>
+ <value name="11ac80_526m5bps_nss2" value="0x6886"/>
+ <value name="11ac80_585mbps_nss2" value="0x6887"/>
+ <value name="11ac80_702mbps_nss2" value="0x6888"/>
+ <value name="11ac80_780mbps_nss2" value="0x6889"/>
+ <value name="11ac80_877m5bps_nss2" value="0x688a"/>
+ <value name="11ac80_975mbps_nss2" value="0x688b"/>
+ <value name="11ac80_65mbps_sgi_nss2" value="0x68c0"/>
+ <value name="11ac80_130mbps_sgi_nss2" value="0x68c1"/>
+ <value name="11ac80_195mbps_sgi_nss2" value="0x68c2"/>
+ <value name="11ac80_260mbps_sgi_nss2" value="0x68c3"/>
+ <value name="11ac80_390mbps_sgi_nss2" value="0x68c4"/>
+ <value name="11ac80_520mbps_sgi_nss2" value="0x68c5"/>
+ <value name="11ac80_585mbps_sgi_nss2" value="0x68c6"/>
+ <value name="11ac80_650mbps_sgi_nss2" value="0x68c7"/>
+ <value name="11ac80_780mbps_sgi_nss2" value="0x68c8"/>
+ <value name="11ac80_866m7bps_sgi_nss2" value="0x68c9"/>
+ <value name="11ac80_975mbps_sgi_nss2" value="0x68ca"/>
+ <value name="11ac80_1083m3bps_sgi_nss2" value="0x68cb"/>
+ <!-- 11ac 80+80 and 160MHz rates. -->
+ <value name="11ac160_58m5bps" value="0x6c00"/>
+ <value name="11ac160_117mbps" value="0x6c01"/>
+ <value name="11ac160_175m5bps" value="0x6c02"/>
+ <value name="11ac160_234mbps" value="0x6c03"/>
+ <value name="11ac160_351mbps" value="0x6c04"/>
+ <value name="11ac160_468mbps" value="0x6c05"/>
+ <value name="11ac160_526m5bps" value="0x6c06"/>
+ <value name="11ac160_585mbps" value="0x6c07"/>
+ <value name="11ac160_702mbps" value="0x6c08"/>
+ <value name="11ac160_780mbps" value="0x6c09"/>
+ <value name="11ac160_877m5bps" value="0x6c0a"/>
+ <value name="11ac160_975mbps" value="0x6c0b"/>
+ <value name="11ac160_65mbps_sgi" value="0x6c40"/>
+ <value name="11ac160_130mbps_sgi" value="0x6c41"/>
+ <value name="11ac160_195mbps_sgi" value="0x6c42"/>
+ <value name="11ac160_260mbps_sgi" value="0x6c43"/>
+ <value name="11ac160_390mbps_sgi" value="0x6c44"/>
+ <value name="11ac160_520mbps_sgi" value="0x6c45"/>
+ <value name="11ac160_585mbps_sgi" value="0x6c46"/>
+ <value name="11ac160_650mbps_sgi" value="0x6c47"/>
+ <value name="11ac160_780mbps_sgi" value="0x6c48"/>
+ <value name="11ac160_866m7bps_sgi" value="0x6c49"/>
+ <value name="11ac160_975mbps_sgi" value="0x6c4a"/>
+ <value name="11ac160_1083m3bps_sgi" value="0x6c4b"/>
+ <value name="11ac160_117mbps_nss2" value="0x6c80"/>
+ <value name="11ac160_234mbps_nss2" value="0x6c81"/>
+ <value name="11ac160_351mbps_nss2" value="0x6c82"/>
+ <value name="11ac160_468mbps_nss2" value="0x6c83"/>
+ <value name="11ac160_702mbps_nss2" value="0x6c84"/>
+ <value name="11ac160_936mbps_nss2" value="0x6c85"/>
+ <value name="11ac160_1053mbps_nss2" value="0x6c86"/>
+ <value name="11ac160_1170mbps_nss2" value="0x6c87"/>
+ <value name="11ac160_1404mbps_nss2" value="0x6c88"/>
+ <value name="11ac160_1560mbps_nss2" value="0x6c89"/>
+ <value name="11ac160_1755mbps_nss2" value="0x6c8a"/>
+ <value name="11ac160_1950mbps_nss2" value="0x6c8b"/>
+ <value name="11ac160_130mbps_sgi_nss2" value="0x6cc0"/>
+ <value name="11ac160_260mbps_sgi_nss2" value="0x6cc1"/>
+ <value name="11ac160_390mbps_sgi_nss2" value="0x6cc2"/>
+ <value name="11ac160_520mbps_sgi_nss2" value="0x6cc3"/>
+ <value name="11ac160_780mbps_sgi_nss2" value="0x6cc4"/>
+ <value name="11ac160_1040mbps_sgi_nss2" value="0x6cc5"/>
+ <value name="11ac160_1170mbps_sgi_nss2" value="0x6cc6"/>
+ <value name="11ac160_1300mbps_sgi_nss2" value="0x6cc7"/>
+ <value name="11ac160_1560mbps_sgi_nss2" value="0x6cc8"/>
+ <value name="11ac160_1733m3bps_sgi_nss2" value="0x6cc9"/>
+ <value name="11ac160_1950mbps_sgi_nss2" value="0x6cca"/>
+ <value name="11ac160_2166m7bps_sgi_nss2" value="0x6ccb"/>
+ <!-- 11ax 20MHz NSS=1, GI=0.8us -->
+ <value name="11ax20_4m3bps_1gi_dcm" value="0x8040"/>
+ <value name="11ax20_8m6bps_1gi" value="0x8000"/>
+ <value name="11ax20_8m6bps_1gi_dcm" value="0x8041"/>
+ <value name="11ax20_17m2bps_1gi" value="0x8001"/>
+ <value name="11ax20_25m8bps_1gi" value="0x8002"/>
+ <value name="11ax20_17m2bps_1gi_dcm" value="0x8043"/>
+ <value name="11ax20_34m4bps_1gi" value="0x8003"/>
+ <value name="11ax20_25m8bps_1gi_dcm" value="0x8044"/>
+ <value name="11ax20_51m6bps_1gi" value="0x8004"/>
+ <value name="11ax20_68m8bps_1gi" value="0x8005"/>
+ <value name="11ax20_77m4bps_1gi" value="0x8006"/>
+ <value name="11ax20_86mbps_1gi" value="0x8007"/>
+ <value name="11ax20_103m2bps_1gi" value="0x8008"/>
+ <value name="11ax20_114m7bps_1gi" value="0x8009"/>
+ <value name="11ax20_129mbps_1gi" value="0x800a"/>
+ <value name="11ax20_143m4bps_1gi" value="0x800b"/>
+ <!-- 11ax 20MHz NSS=1, GI=1.6us -->
+ <value name="11ax20_4mbps_2gi_dcm" value="0x8050"/>
+ <value name="11ax20_8m1bps_2gi" value="0x8010"/>
+ <value name="11ax20_8m1bps_2gi_dcm" value="0x8051"/>
+ <value name="11ax20_16m3bps_2gi" value="0x8011"/>
+ <value name="11ax20_24m4bps_2gi" value="0x8012"/>
+ <value name="11ax20_16m3bps_2gi_dcm" value="0x8053"/>
+ <value name="11ax20_32m5bps_2gi" value="0x8013"/>
+ <value name="11ax20_24m4bps_2gi_dcm" value="0x8054"/>
+ <value name="11ax20_48m8bps_2gi" value="0x8014"/>
+ <value name="11ax20_65mbps_2gi" value="0x8015"/>
+ <value name="11ax20_73m1bps_2gi" value="0x8016"/>
+ <value name="11ax20_81m3bps_2gi" value="0x8017"/>
+ <value name="11ax20_97m5bps_2gi" value="0x8018"/>
+ <value name="11ax20_108m3bps_2gi" value="0x8019"/>
+ <value name="11ax20_121m9bps_2gi" value="0x801a"/>
+ <value name="11ax20_135m4bps_2gi" value="0x801b"/>
+ <!-- 11ax 20MHz NSS=1, GI=3.2us -->
+ <value name="11ax20_3m6bps_4gi_dcm" value="0x8060"/>
+ <value name="11ax20_7m3bps_4gi" value="0x8020"/>
+ <value name="11ax20_7m3bps_4gi_dcm" value="0x8061"/>
+ <value name="11ax20_14m6bps_4gi" value="0x8021"/>
+ <value name="11ax20_21m9bps_4gi" value="0x8022"/>
+ <value name="11ax20_14m6bps_4gi_dcm" value="0x8063"/>
+ <value name="11ax20_29m3bps_4gi" value="0x8023"/>
+ <value name="11ax20_21m9bps_4gi_dcm" value="0x8064"/>
+ <value name="11ax20_43m9bps_4gi" value="0x8024"/>
+ <value name="11ax20_58m5bps_4gi" value="0x8025"/>
+ <value name="11ax20_65m8bps_4gi" value="0x8026"/>
+ <value name="11ax20_73m1bps_4gi" value="0x8027"/>
+ <value name="11ax20_87m8bps_4gi" value="0x8028"/>
+ <value name="11ax20_97m5bps_4gi" value="0x8029"/>
+ <value name="11ax20_109m7bps_4gi" value="0x802a"/>
+ <value name="11ax20_121m9bps_4gi" value="0x802b"/>
+ <!-- 11ax 20MHz NSS=2, GI=0.8us -->
+ <value name="11ax20_8m6bps_1gi_nss2_dcm" value="0x80c0"/>
+ <value name="11ax20_17m2bps_1gi_nss2" value="0x8080"/>
+ <value name="11ax20_17m2bps_1gi_nss2_dcm" value="0x80c1"/>
+ <value name="11ax20_34m4bps_1gi_nss2" value="0x8081"/>
+ <value name="11ax20_51m6bps_1gi_nss2" value="0x8082"/>
+ <value name="11ax20_34m4bps_1gi_nss2_dcm" value="0x80c3"/>
+ <value name="11ax20_68m8bps_1gi_nss2" value="0x8083"/>
+ <value name="11ax20_51m6bps_1gi_nss2_dcm" value="0x80c4"/>
+ <value name="11ax20_103m2bps_1gi_nss2" value="0x8084"/>
+ <value name="11ax20_137m6bps_1gi_nss2" value="0x8085"/>
+ <value name="11ax20_154m9bps_1gi_nss2" value="0x8086"/>
+ <value name="11ax20_172m1bps_1gi_nss2" value="0x8087"/>
+ <value name="11ax20_206m5bps_1gi_nss2" value="0x8088"/>
+ <value name="11ax20_229m4bps_1gi_nss2" value="0x8089"/>
+ <value name="11ax20_258m1bps_1gi_nss2" value="0x808a"/>
+ <value name="11ax20_286m8bps_1gi_nss2" value="0x808b"/>
+ <!-- 11ax 20MHz NSS=2, GI=1.6us -->
+ <value name="11ax20_8m1bps_2gi_nss2_dcm" value="0x80d0"/>
+ <value name="11ax20_16m3bps_2gi_nss2" value="0x8090"/>
+ <value name="11ax20_16m3bps_2gi_nss2_dcm" value="0x80d1"/>
+ <value name="11ax20_32m5bps_2gi_nss2" value="0x8091"/>
+ <value name="11ax20_48m8bps_2gi_nss2" value="0x8092"/>
+ <value name="11ax20_32m5bps_2gi_nss2_dcm" value="0x80d3"/>
+ <value name="11ax20_65mbps_2gi_nss2" value="0x8093"/>
+ <value name="11ax20_48m8bps_2gi_nss2_dcm" value="0x80d4"/>
+ <value name="11ax20_97m5bps_2gi_nss2" value="0x8094"/>
+ <value name="11ax20_130mbps_2gi_nss2" value="0x8095"/>
+ <value name="11ax20_146m3bps_2gi_nss2" value="0x8096"/>
+ <value name="11ax20_162m5bps_2gi_nss2" value="0x8097"/>
+ <value name="11ax20_195mbps_2gi_nss2" value="0x8098"/>
+ <value name="11ax20_216m7bps_2gi_nss2" value="0x8099"/>
+ <value name="11ax20_243m8bps_2gi_nss2" value="0x809a"/>
+ <value name="11ax20_270m8bps_2gi_nss2" value="0x809b"/>
+ <!-- 11ax 20MHz NSS=2, GI=3.2us -->
+ <value name="11ax20_7m3bps_4gi_nss2_dcm" value="0x80e0"/>
+ <value name="11ax20_14m6bps_4gi_nss2" value="0x80a0"/>
+ <value name="11ax20_14m6bps_4gi_nss2_dcm" value="0x80e1"/>
+ <value name="11ax20_29m3bps_4gi_nss2" value="0x80a1"/>
+ <value name="11ax20_43m9bps_4gi_nss2" value="0x80a2"/>
+ <value name="11ax20_29m3bps_4gi_nss2_dcm" value="0x80e3"/>
+ <value name="11ax20_58m5bps_4gi_nss2" value="0x80a3"/>
+ <value name="11ax20_43m9bps_4gi_nss2_dcm" value="0x80e4"/>
+ <value name="11ax20_87m8bps_4gi_nss2" value="0x80a4"/>
+ <value name="11ax20_117mbps_4gi_nss2" value="0x80a5"/>
+ <value name="11ax20_131m6bps_4gi_nss2" value="0x80a6"/>
+ <value name="11ax20_146m3bps_4gi_nss2" value="0x80a7"/>
+ <value name="11ax20_175m5bps_4gi_nss2" value="0x80a8"/>
+ <value name="11ax20_195mbps_4gi_nss2" value="0x80a9"/>
+ <value name="11ax20_219m4bps_4gi_nss2" value="0x80aa"/>
+ <value name="11ax20_243m8bps_4gi_nss2" value="0x80ab"/>
+ <!-- 11ax 40MHz NSS=1, GI=0.8us -->
+ <value name="11ax40_8m6bps_1gi_dcm" value="0x8440"/>
+ <value name="11ax40_17m2bps_1gi" value="0x8400"/>
+ <value name="11ax40_17m2bps_1gi_dcm" value="0x8441"/>
+ <value name="11ax40_34m4bps_1gi" value="0x8401"/>
+ <value name="11ax40_51m6bps_1gi" value="0x8402"/>
+ <value name="11ax40_34m4bps_1gi_dcm" value="0x8443"/>
+ <value name="11ax40_68m8bps_1gi" value="0x8403"/>
+ <value name="11ax40_51m6bps_1gi_dcm" value="0x8444"/>
+ <value name="11ax40_103m2bps_1gi" value="0x8404"/>
+ <value name="11ax40_137m6bps_1gi" value="0x8405"/>
+ <value name="11ax40_154m9bps_1gi" value="0x8406"/>
+ <value name="11ax40_172m1bps_1gi" value="0x8407"/>
+ <value name="11ax40_206m5bps_1gi" value="0x8408"/>
+ <value name="11ax40_229m4bps_1gi" value="0x8409"/>
+ <value name="11ax40_258m1bps_1gi" value="0x840a"/>
+ <value name="11ax40_286m8bps_1gi" value="0x840b"/>
+ <!-- 11ax 40MHz NSS=1, GI=1.6us -->
+ <value name="11ax40_8m1bps_2gi_dcm" value="0x8450"/>
+ <value name="11ax40_16m3bps_2gi" value="0x8410"/>
+ <value name="11ax40_16m3bps_2gi_dcm" value="0x8451"/>
+ <value name="11ax40_32m5bps_2gi" value="0x8411"/>
+ <value name="11ax40_48m8bps_2gi" value="0x8412"/>
+ <value name="11ax40_32m5bps_2gi_dcm" value="0x8453"/>
+ <value name="11ax40_65mbps_2gi" value="0x8413"/>
+ <value name="11ax40_48m8bps_2gi_dcm" value="0x8454"/>
+ <value name="11ax40_97m5bps_2gi" value="0x8414"/>
+ <value name="11ax40_130mbps_2gi" value="0x8415"/>
+ <value name="11ax40_146m3bps_2gi" value="0x8416"/>
+ <value name="11ax40_162m5bps_2gi" value="0x8417"/>
+ <value name="11ax40_195mbps_2gi" value="0x8418"/>
+ <value name="11ax40_216m7bps_2gi" value="0x8419"/>
+ <value name="11ax40_243m8bps_2gi" value="0x841a"/>
+ <value name="11ax40_270m8bps_2gi" value="0x841b"/>
+ <!-- 11ax 40MHz NSS=1, GI=3.2us -->
+ <value name="11ax40_7m3bps_4gi_dcm" value="0x8460"/>
+ <value name="11ax40_14m6bps_4gi" value="0x8420"/>
+ <value name="11ax40_14m6bps_4gi_dcm" value="0x8461"/>
+ <value name="11ax40_29m3bps_4gi" value="0x8421"/>
+ <value name="11ax40_43m9bps_4gi" value="0x8422"/>
+ <value name="11ax40_29m3bps_4gi_dcm" value="0x8463"/>
+ <value name="11ax40_58m5bps_4gi" value="0x8423"/>
+ <value name="11ax40_43m9bps_4gi_dcm" value="0x8464"/>
+ <value name="11ax40_87m8bps_4gi" value="0x8424"/>
+ <value name="11ax40_117mbps_4gi" value="0x8425"/>
+ <value name="11ax40_131m6bps_4gi" value="0x8426"/>
+ <value name="11ax40_146m3bps_4gi" value="0x8427"/>
+ <value name="11ax40_175m5bps_4gi" value="0x8428"/>
+ <value name="11ax40_195mbps_4gi" value="0x8429"/>
+ <value name="11ax40_219m4bps_4gi" value="0x842a"/>
+ <value name="11ax40_243m8bps_4gi" value="0x842b"/>
+ <!-- 11ax 40MHz NSS=2, GI=0.8us -->
+ <value name="11ax40_17m2bps_1gi_nss2_dcm" value="0x84c0"/>
+ <value name="11ax40_34m4bps_1gi_nss2" value="0x8480"/>
+ <value name="11ax40_34m4bps_1gi_nss2_dcm" value="0x84c1"/>
+ <value name="11ax40_68m8bps_1gi_nss2" value="0x8481"/>
+ <value name="11ax40_103m2bps_1gi_nss2" value="0x8482"/>
+ <value name="11ax40_68m8bps_1gi_nss2_dcm" value="0x84c3"/>
+ <value name="11ax40_137m6bps_1gi_nss2" value="0x8483"/>
+ <value name="11ax40_103m2bps_1gi_nss2_dcm" value="0x84c4"/>
+ <value name="11ax40_206m5bps_1gi_nss2" value="0x8484"/>
+ <value name="11ax40_275m3bps_1gi_nss2" value="0x8485"/>
+ <value name="11ax40_309m7bps_1gi_nss2" value="0x8486"/>
+ <value name="11ax40_344m1bps_1gi_nss2" value="0x8487"/>
+ <value name="11ax40_412m9bps_1gi_nss2" value="0x8488"/>
+ <value name="11ax40_458m8bps_1gi_nss2" value="0x8489"/>
+ <value name="11ax40_516m2bps_1gi_nss2" value="0x848a"/>
+ <value name="11ax40_573m5bps_1gi_nss2" value="0x848b"/>
+ <!-- 11ax 40MHz NSS=2, GI=1.6us -->
+ <value name="11ax40_16m3bps_2gi_nss2_dcm" value="0x84d0"/>
+ <value name="11ax40_32m5bps_2gi_nss2" value="0x8490"/>
+ <value name="11ax40_32m5bps_2gi_nss2_dcm" value="0x84d1"/>
+ <value name="11ax40_65mbps_2gi_nss2" value="0x8491"/>
+ <value name="11ax40_97m5bps_2gi_nss2" value="0x8492"/>
+ <value name="11ax40_65mbps_2gi_nss2_dcm" value="0x84d3"/>
+ <value name="11ax40_130mbps_2gi_nss2" value="0x8493"/>
+ <value name="11ax40_97m5bps_2gi_nss2_dcm" value="0x84d4"/>
+ <value name="11ax40_195mbps_2gi_nss2" value="0x8494"/>
+ <value name="11ax40_260mbps_2gi_nss2" value="0x8495"/>
+ <value name="11ax40_292m5bps_2gi_nss2" value="0x8496"/>
+ <value name="11ax40_325mbps_2gi_nss2" value="0x8497"/>
+ <value name="11ax40_390mbps_2gi_nss2" value="0x8498"/>
+ <value name="11ax40_433m3bps_2gi_nss2" value="0x8499"/>
+ <value name="11ax40_487m5bps_2gi_nss2" value="0x849a"/>
+ <value name="11ax40_541m7bps_2gi_nss2" value="0x849b"/>
+ <!-- 11ax 40MHz NSS=2, GI=3.2us -->
+ <value name="11ax40_14m6bps_4gi_nss2_dcm" value="0x84e0"/>
+ <value name="11ax40_29m3bps_4gi_nss2" value="0x84a0"/>
+ <value name="11ax40_29m3bps_4gi_nss2_dcm" value="0x84e1"/>
+ <value name="11ax40_58m5bps_4gi_nss2" value="0x84a1"/>
+ <value name="11ax40_87m8bps_4gi_nss2" value="0x84a2"/>
+ <value name="11ax40_58m5bps_4gi_nss2_dcm" value="0x84e3"/>
+ <value name="11ax40_117mbps_4gi_nss2" value="0x84a3"/>
+ <value name="11ax40_87m8bps_4gi_nss2_dcm" value="0x84e4"/>
+ <value name="11ax40_175m5bps_4gi_nss2" value="0x84a4"/>
+ <value name="11ax40_234mbps_4gi_nss2" value="0x84a5"/>
+ <value name="11ax40_263m3bps_4gi_nss2" value="0x84a6"/>
+ <value name="11ax40_292m5bps_4gi_nss2" value="0x84a7"/>
+ <value name="11ax40_351mbps_4gi_nss2" value="0x84a8"/>
+ <value name="11ax40_390mbps_4gi_nss2" value="0x84a9"/>
+ <value name="11ax40_438m8bps_4gi_nss2" value="0x84aa"/>
+ <value name="11ax40_487m5bps_4gi_nss2" value="0x84ab"/>
+ <!-- 11ax 80MHz NSS=1, GI=0.8us -->
+ <value name="11ax80_18mbps_1gi_dcm" value="0x8840"/>
+ <value name="11ax80_36mbps_1gi" value="0x8800"/>
+ <value name="11ax80_36mbps_1gi_dcm" value="0x8841"/>
+ <value name="11ax80_72m1bps_1gi" value="0x8801"/>
+ <value name="11ax80_108m1bps_1gi" value="0x8802"/>
+ <value name="11ax80_72m1bps_1gi_dcm" value="0x8843"/>
+ <value name="11ax80_144m1bps_1gi" value="0x8803"/>
+ <value name="11ax80_108m1bps_1gi_dcm" value="0x8844"/>
+ <value name="11ax80_216m2bps_1gi" value="0x8804"/>
+ <value name="11ax80_288m2bps_1gi" value="0x8805"/>
+ <value name="11ax80_324m3bps_1gi" value="0x8806"/>
+ <value name="11ax80_360m3bps_1gi" value="0x8807"/>
+ <value name="11ax80_432m4bps_1gi" value="0x8808"/>
+ <value name="11ax80_480m4bps_1gi" value="0x8809"/>
+ <value name="11ax80_540m4bps_1gi" value="0x880a"/>
+ <value name="11ax80_600m4bps_1gi" value="0x880b"/>
+ <!-- 11ax 80MHz NSS=1, GI=1.6us -->
+ <value name="11ax80_17mbps_2gi_dcm" value="0x8850"/>
+ <value name="11ax80_34mbps_2gi" value="0x8810"/>
+ <value name="11ax80_34mbps_2gi_dcm" value="0x8851"/>
+ <value name="11ax80_68m1bps_2gi" value="0x8811"/>
+ <value name="11ax80_102m1bps_2gi" value="0x8812"/>
+ <value name="11ax80_68m1bps_2gi_dcm" value="0x8853"/>
+ <value name="11ax80_136m1bps_2gi" value="0x8813"/>
+ <value name="11ax80_102m1bps_2gi_dcm" value="0x8854"/>
+ <value name="11ax80_204m2bps_2gi" value="0x8814"/>
+ <value name="11ax80_272m2bps_2gi" value="0x8815"/>
+ <value name="11ax80_306m3bps_2gi" value="0x8816"/>
+ <value name="11ax80_340m3bps_2gi" value="0x8817"/>
+ <value name="11ax80_408m3bps_2gi" value="0x8818"/>
+ <value name="11ax80_453m7bps_2gi" value="0x8819"/>
+ <value name="11ax80_510m4bps_2gi" value="0x881a"/>
+ <value name="11ax80_567m1bps_2gi" value="0x881b"/>
+ <!-- 11ax 80MHz NSS=1, GI=3.2us -->
+ <value name="11ax80_15m3bps_4gi_dcm" value="0x8860"/>
+ <value name="11ax80_30m6bps_4gi" value="0x8820"/>
+ <value name="11ax80_30m6bps_4gi_dcm" value="0x8861"/>
+ <value name="11ax80_61m3bps_4gi" value="0x8821"/>
+ <value name="11ax80_91m9bps_4gi" value="0x8822"/>
+ <value name="11ax80_61m3bps_4gi_dcm" value="0x8863"/>
+ <value name="11ax80_122m5bps_4gi" value="0x8823"/>
+ <value name="11ax80_91m9bps_4gi_dcm" value="0x8864"/>
+ <value name="11ax80_183m8bps_4gi" value="0x8824"/>
+ <value name="11ax80_245mbps_4gi" value="0x8825"/>
+ <value name="11ax80_275m6bps_4gi" value="0x8826"/>
+ <value name="11ax80_306m3bps_4gi" value="0x8827"/>
+ <value name="11ax80_367m5bps_4gi" value="0x8828"/>
+ <value name="11ax80_408m3bps_4gi" value="0x8829"/>
+ <value name="11ax80_459m4bps_4gi" value="0x882a"/>
+ <value name="11ax80_510m4bps_4gi" value="0x882b"/>
+ <!-- 11ax 80MHz NSS=2, GI=0.8us -->
+ <value name="11ax80_36mbps_1gi_nss2_dcm" value="0x88c0"/>
+ <value name="11ax80_72m1bps_1gi_nss2" value="0x8880"/>
+ <value name="11ax80_72m1bps_1gi_nss2_dcm" value="0x88c1"/>
+ <value name="11ax80_144m1bps_1gi_nss2" value="0x8881"/>
+ <value name="11ax80_216m2bps_1gi_nss2" value="0x8882"/>
+ <value name="11ax80_144m1bps_1gi_nss2_dcm" value="0x88c3"/>
+ <value name="11ax80_288m2bps_1gi_nss2" value="0x8883"/>
+ <value name="11ax80_216m2bps_1gi_nss2_dcm" value="0x88c4"/>
+ <value name="11ax80_432m4bps_1gi_nss2" value="0x8884"/>
+ <value name="11ax80_576m5bps_1gi_nss2" value="0x8885"/>
+ <value name="11ax80_648m5bps_1gi_nss2" value="0x8886"/>
+ <value name="11ax80_720m6bps_1gi_nss2" value="0x8887"/>
+ <value name="11ax80_864m7bps_1gi_nss2" value="0x8888"/>
+ <value name="11ax80_960m7bps_1gi_nss2" value="0x8889"/>
+ <value name="11ax80_1080m9bps_1gi_nss2" value="0x888a"/>
+ <value name="11ax80_1201mbps_1gi_nss2" value="0x888b"/>
+ <!-- 11ax 80MHz NSS=2, GI=1.6us -->
+ <value name="11ax80_34mbps_2gi_nss2_dcm" value="0x88d0"/>
+ <value name="11ax80_68m1bps_2gi_nss2" value="0x8890"/>
+ <value name="11ax80_68m1bps_2gi_nss2_dcm" value="0x88d1"/>
+ <value name="11ax80_136m1bps_2gi_nss2" value="0x8891"/>
+ <value name="11ax80_204m2bps_2gi_nss2" value="0x8892"/>
+ <value name="11ax80_136m1bps_2gi_nss2_dcm" value="0x88d3"/>
+ <value name="11ax80_272m2bps_2gi_nss2" value="0x8893"/>
+ <value name="11ax80_204m2bps_2gi_nss2_dcm" value="0x88d4"/>
+ <value name="11ax80_408m3bps_2gi_nss2" value="0x8894"/>
+ <value name="11ax80_544m4bps_2gi_nss2" value="0x8895"/>
+ <value name="11ax80_612m5bps_2gi_nss2" value="0x8896"/>
+ <value name="11ax80_680m6bps_2gi_nss2" value="0x8897"/>
+ <value name="11ax80_816m7bps_2gi_nss2" value="0x8898"/>
+ <value name="11ax80_907m4bps_2gi_nss2" value="0x8899"/>
+ <value name="11ax80_1020m8bps_2gi_nss2" value="0x889a"/>
+ <value name="11ax80_1134m3bps_2gi_nss2" value="0x889b"/>
+ <!-- 11ax 80MHz NSS=2, GI=3.2us -->
+ <value name="11ax80_30m6bps_4gi_nss2_dcm" value="0x88e0"/>
+ <value name="11ax80_61m3bps_4gi_nss2" value="0x88a0"/>
+ <value name="11ax80_61m3bps_4gi_nss2_dcm" value="0x88e1"/>
+ <value name="11ax80_122m5bps_4gi_nss2" value="0x88a1"/>
+ <value name="11ax80_183m8bps_4gi_nss2" value="0x88a2"/>
+ <value name="11ax80_122m5bps_4gi_nss2_dcm" value="0x88e3"/>
+ <value name="11ax80_245mbps_4gi_nss2" value="0x88a3"/>
+ <value name="11ax80_183m8bps_4gi_nss2_dcm" value="0x88e4"/>
+ <value name="11ax80_367m5bp_4gi_nss2" value="0x88a4"/>
+ <value name="11ax80_490mbps_4gi_nss2" value="0x88a5"/>
+ <value name="11ax80_551m3bps_4gi_nss2" value="0x88a6"/>
+ <value name="11ax80_612m5bps_4gi_nss2" value="0x88a7"/>
+ <value name="11ax80_735mbps_4gi_nss2" value="0x88a8"/>
+ <value name="11ax80_816m6bps_4gi_nss2" value="0x88a9"/>
+ <value name="11ax80_918m8bps_4gi_nss2" value="0x88aa"/>
+ <value name="11ax80_1020m8bps_4gi_nss2" value="0x88ab"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=0.8us -->
+ <value name="11ax160_36mbps_1gi_dcm" value="0x8c40"/>
+ <value name="11ax160_72m1bps_1gi" value="0x8c00"/>
+ <value name="11ax160_72m1bps_1gi_dcm" value="0x8c41"/>
+ <value name="11ax160_144m1bps_1gi" value="0x8c01"/>
+ <value name="11ax160_216m2bps_1gi" value="0x8c02"/>
+ <value name="11ax160_144m1bps_1gi_dcm" value="0x8c43"/>
+ <value name="11ax160_288m2bps_1gi" value="0x8c03"/>
+ <value name="11ax160_216m2bps_1gi_dcm" value="0x8c44"/>
+ <value name="11ax160_432m4bps_1gi" value="0x8c04"/>
+ <value name="11ax160_576m5bps_1gi" value="0x8c05"/>
+ <value name="11ax160_648m5bps_1gi" value="0x8c06"/>
+ <value name="11ax160_720m6bps_1gi" value="0x8c07"/>
+ <value name="11ax160_864m7bps_1gi" value="0x8c08"/>
+ <value name="11ax160_960m7bps_1gi" value="0x8c09"/>
+ <value name="11ax160_1080m9bps_1gi" value="0x8c0a"/>
+ <value name="11ax160_1201mbps_1gi" value="0x8c0b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=1.6us -->
+ <value name="11ax160_34mbps_2gi_dcm" value="0x8c50"/>
+ <value name="11ax160_68m1bps_2gi" value="0x8c10"/>
+ <value name="11ax160_68m1bps_2gi_dcm" value="0x8c51"/>
+ <value name="11ax160_136m1bps_2gi" value="0x8c11"/>
+ <value name="11ax160_204m2bps_2gi" value="0x8c12"/>
+ <value name="11ax160_136m1bps_2gi_dcm" value="0x8c53"/>
+ <value name="11ax160_272m2bps_2gi" value="0x8c13"/>
+ <value name="11ax160_204m2bps_2gi_dcm" value="0x8c54"/>
+ <value name="11ax160_408m3bps_2gi" value="0x8c14"/>
+ <value name="11ax160_544m4bps_2gi" value="0x8c15"/>
+ <value name="11ax160_612m5bps_2gi" value="0x8c16"/>
+ <value name="11ax160_680m6bps_2gi" value="0x8c17"/>
+ <value name="11ax160_816m7bps_2gi" value="0x8c18"/>
+ <value name="11ax160_907m4bps_2gi" value="0x8c19"/>
+ <value name="11ax160_1020m8bps_2gi" value="0x8c1a"/>
+ <value name="11ax160_1134m2bps_2gi" value="0x8c1b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=3.2us -->
+ <value name="11ax160_30m6bps_4gi_dcm" value="0x8c60"/>
+ <value name="11ax160_61m3bps_4gi" value="0x8c20"/>
+ <value name="11ax160_61m3bps_4gi_dcm" value="0x8c61"/>
+ <value name="11ax160_122m5bps_4gi" value="0x8c21"/>
+ <value name="11ax160_183m8bps_4gi" value="0x8c22"/>
+ <value name="11ax160_122m5bps_4gi_dcm" value="0x8c63"/>
+ <value name="11ax160_245mbps_4gi" value="0x8c23"/>
+ <value name="11ax160_183m8bps_4gi_dcm" value="0x8c64"/>
+ <value name="11ax160_367m5bps_4gi" value="0x8c24"/>
+ <value name="11ax160_490mbps_4gi" value="0x8c25"/>
+ <value name="11ax160_551m3bps_4gi" value="0x8c26"/>
+ <value name="11ax160_612m5bps_4gi" value="0x8c27"/>
+ <value name="11ax160_735mbps_4gi" value="0x8c28"/>
+ <value name="11ax160_816m6bps_4gi" value="0x8c29"/>
+ <value name="11ax160_918m8bps_4gi" value="0x8c2a"/>
+ <value name="11ax160_1020m8bps_4gi" value="0x8c2b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=0.8us -->
+ <value name="11ax160_72m1bps_1gi_nss2_dcm" value="0x8cc0"/>
+ <value name="11ax160_144m1bps_1gi_nss2" value="0x8c80"/>
+ <value name="11ax160_144m1bps_1gi_nss2_dcm" value="0x8cc1"/>
+ <value name="11ax160_288m2bps_1gi_nss2" value="0x8c81"/>
+ <value name="11ax160_432m4bps_1gi_nss2" value="0x8c82"/>
+ <value name="11ax160_288m2bps_1gi_nss2_dcm" value="0x8cc3"/>
+ <value name="11ax160_576m5bps_1gi_nss2" value="0x8c83"/>
+ <value name="11ax160_432m4bps_1gi_nss2_dcm" value="0x8cc4"/>
+ <value name="11ax160_864m7bps_1gi_nss2" value="0x8c84"/>
+ <value name="11ax160_1152m9bps_1gi_nss2" value="0x8c85"/>
+ <value name="11ax160_1297m1bps_1gi_nss2" value="0x8c86"/>
+ <value name="11ax160_1441m2bps_1gi_nss2" value="0x8c87"/>
+ <value name="11ax160_1729m4bps_1gi_nss2" value="0x8c88"/>
+ <value name="11ax160_1921m5bps_1gi_nss2" value="0x8c89"/>
+ <value name="11ax160_2161m8bps_1gi_nss2" value="0x8c8a"/>
+ <value name="11ax160_2401m9bps_1gi_nss2" value="0x8c8b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=1.6us -->
+ <value name="11ax160_68m1bps_2gi_nss2_dcm" value="0x8cd0"/>
+ <value name="11ax160_136m1bps_2gi_nss2" value="0x8c90"/>
+ <value name="11ax160_136m1bps_2gi_nss2_dcm" value="0x8cd1"/>
+ <value name="11ax160_272m2bps_2gi_nss2" value="0x8c91"/>
+ <value name="11ax160_408m3bps_2gi_nss2" value="0x8c92"/>
+ <value name="11ax160_272m2bps_2gi_nss2_dcm" value="0x8cd3"/>
+ <value name="11ax160_544m4bps_2gi_nss2" value="0x8c93"/>
+ <value name="11ax160_408m3bps_2gi_nss2_dcm" value="0x8cd4"/>
+ <value name="11ax160_816m7bps_2gi_nss2" value="0x8c94"/>
+ <value name="11ax160_1088m9bps_2gi_nss2" value="0x8c95"/>
+ <value name="11ax160_1225mbps_2gi_nss2" value="0x8c96"/>
+ <value name="11ax160_1361m1bps_2gi_nss2" value="0x8c97"/>
+ <value name="11ax160_1633m3bps_2gi_nss2" value="0x8c98"/>
+ <value name="11ax160_1814m8bps_2gi_nss2" value="0x8c99"/>
+ <value name="11ax160_2041m7bps_2gi_nss2" value="0x8c9a"/>
+ <value name="11ax160_2268m5bps_2gi_nss2" value="0x8c9b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=3.2us -->
+ <value name="11ax160_61m3bps_4gi_nss2_dcm" value="0x8ce0"/>
+ <value name="11ax160_122m5bps_4gi_nss2" value="0x8ca0"/>
+ <value name="11ax160_122m5bps_4gi_nss2_dcm" value="0x8ce1"/>
+ <value name="11ax160_245mbps_4gi_nss2" value="0x8ca1"/>
+ <value name="11ax160_367m5bps_4gi_nss2" value="0x8ca2"/>
+ <value name="11ax160_245mbps_4gi_nss2_dcm" value="0x8ce3"/>
+ <value name="11ax160_490mbps_4gi_nss2" value="0x8ca3"/>
+ <value name="11ax160_367m5bps_4gi_nss2_dcm" value="0x8ce4"/>
+ <value name="11ax160_735mbps_4gi_nss2" value="0x8ca4"/>
+ <value name="11ax160_980mbps_4gi_nss2" value="0x8ca5"/>
+ <value name="11ax160_1102m5bps_4gi_nss2" value="0x8ca6"/>
+ <value name="11ax160_1225mbps_4gi_nss2" value="0x8ca7"/>
+ <value name="11ax160_1470mbps_4gi_nss2" value="0x8ca8"/>
+ <value name="11ax160_1633m3bps_4gi_nss2" value="0x8ca9"/>
+ <value name="11ax160_1837m5bps_4gi_nss2" value="0x8caa"/>
+ <value name="11ax160_2041m6bps_4gi_nss2" value="0x8cab"/>
+ <!-- These values are not rates and are only applicable when
+ using WLANLITE_RX_READ to read miscellaneous counters. -->
+ <value name="ctr_total" value="0xe000"/>
+ <value name="ctr_no_error" value="0xe001"/>
+ <value name="ctr_crc_error" value="0xe002"/>
+ <value name="ctr_bad_signal" value="0xe003"/>
+ <value name="ctr_stbc" value="0xe004"/>
+ <value name="ctr_duplicate" value="0xe005"/>
+ <value name="ctr_error" value="0xe006"/>
+ <value name="ctr_ldpc" value="0xe007"/>
+ <value name="ctr_beamformed" value="0xe008"/>
+ </type>
+ <type name="Data_Reference" resource="TYPE" size="32">
+ <field name="Slot_Number">
+ <type>Slot_Number</type>
+ </field>
+ <field name="Data_Length">
+ <type>Data_Length</type>
+ </field>
+ </type>
+ <type name="Data_Unit_Descriptor" resource="TYPE" size="16">
+ <value name="IEEE802_11_Frame" value="0x0000"/>
+ <value name="IEEE802_3_Frame" value="0x0001"/>
+ <value name="AMSDU_subframe" value="0x0002"/>
+ <value name="AMSDU" value="0x0003"/>
+ <value name="TCP_ACK" value="0x0004"/>
+ </type>
+ <type name="Decibels" resource="TYPE" signed="true" size="16"/>
+ <type name="Device_Role" resource="TYPE" size="16">
+ <value name="Infrastructure_Station" value="0x0001"/>
+ <value name="P2p_GO" value="0x0002"/>
+ <value name="P2p_Device" value="0x0003"/>
+ <value name="P2p_Client" value="0x0004"/>
+ </type>
+ <type name="Device_State" resource="TYPE" size="16">
+ <value name="idle" value="0"/>
+ <value name="rx_running" value="1"/>
+ <value name="tx_running" value="2"/>
+ <value name="cw_running" value="3"/>
+ <value name="bist_running" value="4"/>
+ </type>
+ <type name="Direction" resource="TYPE" size="16">
+ <value name="Transmit" value="0x0000"/>
+ <value name="Receive" value="0x0001"/>
+ </type>
+ <type name="Edge_Of_Band" resource="TYPE" size="16"/>
+ <type name="End_Point" resource="TYPE" size="16">
+ <value name="Hostio" value="0x0001"/>
+ <value name="DPLP" value="0x0002"/>
+ </type>
+ <type name="Event" resource="TYPE" size="16">
+ <value name="WIFI_EVENT_ASSOCIATION_REQUESTED" value="0x0000"/>
+ <value name="WIFI_EVENT_AUTH_COMPLETE" value="0x0001"/>
+ <value name="WIFI_EVENT_ASSOC_COMPLETE" value="0x0002"/>
+ <value name="WIFI_EVENT_FW_AUTH_STARTED" value="0x0003"/>
+ <value name="WIFI_EVENT_FW_ASSOC_STARTED" value="0x0004"/>
+ <value name="WIFI_EVENT_FW_RE_ASSOC_STARTED" value="0x0005"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_REQUESTED" value="0x0006"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_RESULT_FOUND" value="0x0007"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_COMPLETE" value="0x0008"/>
+ <value name="WIFI_EVENT_G_SCAN_STARTED" value="0x0009"/>
+ <value name="WIFI_EVENT_G_SCAN_COMPLETE" value="0x000a"/>
+ <value name="WIFI_EVENT_DISASSOCIATION_REQUESTED" value="0x000b"/>
+ <value name="WIFI_EVENT_RE_ASSOCIATION_REQUESTED" value="0x000c"/>
+ <value name="WIFI_EVENT_ROAM_REQUESTED" value="0x000d"/>
+ <value name="WIFI_EVENT_BEACON_RECEIVED" value="0x000e"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_STARTED" value="0x000f"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_COMPLETE" value="0x0010"/>
+ <value name="WIFI_EVENT_ROAM_SEARCH_STARTED" value="0x0011"/>
+ <value name="WIFI_EVENT_ROAM_SEARCH_STOPPED" value="0x0012"/>
+ <value name="WIFI_EVENT_CHANNEL_SWITCH_ANOUNCEMENT" value="0x0014"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_START" value="0x0015"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_STOP" value="0x0016"/>
+ <value name="WIFI_EVENT_DRIVER_EAPOL_FRAME_TRANSMIT_REQUESTED" value="0x0017"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_RECEIVED" value="0x0018"/>
+ <value name="WIFI_EVENT_DRIVER_EAPOL_FRAME_RECEIVED" value="0x001a"/>
+ <value name="WIFI_EVENT_BLOCK_ACK_NEGOTIATION_COMPLETE" value="0x001b"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCO_START" value="0x001c"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCO_STOP" value="0x001d"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCAN_START" value="0x001e"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCAN_STOP" value="0x001f"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_HID_START" value="0x0020"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_HID_STOP" value="0x0021"/>
+ <value name="WIFI_EVENT_ROAM_AUTH_STARTED" value="0x0022"/>
+ <value name="WIFI_EVENT_ROAM_AUTH_COMPLETE" value="0x0023"/>
+ <value name="WIFI_EVENT_ROAM_ASSOC_STARTED" value="0x0024"/>
+ <value name="WIFI_EVENT_ROAM_ASSOC_COMPLETE" value="0x0025"/>
+ <value name="WIFI_EVENT_G_SCAN_STOP" value="0x0026"/>
+ <value name="WIFI_EVENT_G_SCAN_CYCLE_STARTED" value="0x0027"/>
+ <value name="WIFI_EVENT_G_SCAN_CYCLE_COMPLETED" value="0x0028"/>
+ <value name="WIFI_EVENT_G_SCAN_BUCKET_STARTED" value="0x0029"/>
+ <value name="WIFI_EVENT_G_SCAN_BUCKET_COMPLETED" value="0x002a"/>
+ <value name="WIFI_EVENT_G_SCAN_RESULTS_AVAILABLE" value="0x002b"/>
+ <value name="WIFI_EVENT_G_SCAN_CAPABILITIES" value="0x002c"/>
+ <value name="WIFI_EVENT_ROAM_CANDIDATE_FOUND" value="0x002d"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_CONFIG" value="0x002e"/>
+ <value name="WIFI_EVENT_AUTH_TIMEOUT" value="0x002f"/>
+ <value name="WIFI_EVENT_ASSOC_TIMEOUT" value="0x0030"/>
+ <value name="WIFI_EVENT_MEM_ALLOC_FAILURE" value="0x0031"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_ADD" value="0x0032"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_REMOVE" value="0x0033"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_NETWORK_FOUND" value="0x0034"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_REQUESTED" value="0x0035"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_RESULT_FOUND" value="0x0036"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_COMPLETE" value="0x0037"/>
+ <value name="WIFI_EVENT_BLACKOUT_START" value="0x0064"/>
+ <value name="WIFI_EVENT_BLACKOUT_STOP" value="0x0065"/>
+ <value name="WIFI_EVENT_NAN_PUBLISH_TERMINATED" value="0x0100"/>
+ <value name="WIFI_EVENT_NAN_SUBSCRIBE_TERMINATED" value="0x0101"/>
+ <value name="WIFI_EVENT_NAN_MATCH_EXPIRED" value="0x0102"/>
+ <value name="WIFI_EVENT_NAN_ADDRESS_CHANGED" value="0x0103"/>
+ <value name="WIFI_EVENT_NAN_CLUSTER_STARTED" value="0x0104"/>
+ <value name="WIFI_EVENT_NAN_CLUSTER_JOINED" value="0x0105"/>
+ <value name="WiFI_EVENT_NAN_TRANSMIT_FOLLOWUP" value="0x0106"/>
+ </type>
+ <type name="HT" resource="TYPE" size="2" subsidiary="true">
+ <value name="Non_HT_Rate" value="0x1"/>
+ <value name="HT_Rate" value="0x2"/>
+ <value name="VHT_Rate" value="0x3"/>
+ </type>
+ <type name="Hidden_Ssid" resource="TYPE" size="16">
+ <value name="Not_Hidden" value="0x0000"/>
+ <value name="Hidden_Zero_Length" value="0x0001"/>
+ <value name="Hidden_Zero_Data" value="0x0002"/>
+ </type>
+ <type name="Host_State" resource="TYPE" size="16"/>
+ <type name="IPv4_Address" resource="TYPE" size="32"/>
+ <type name="Key_Type" resource="TYPE" size="16">
+ <value name="Group" value="0x0000"/>
+ <value name="Pairwise" value="0x0001"/>
+ <value name="WEP" value="0x0002"/>
+ <value name="IGTK" value="0x0003"/>
+ <value name="PMK" value="0x0004"/>
+ <value name="First_Illegal" value="0x0005"/>
+ </type>
+ <type name="MAC_Address" resource="TYPE" size="48">
+ <mask mask="ff-ff-ff-ff-ff-ff" name="broadcast" value="ff-ff-ff-ff-ff-ff"/>
+ </type>
+ <type dvalue="MA_BLOCKACK.indication" name="MA_BLOCKACK.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_QSTA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="BlockAck_Parameter_Set">
+ <type>BlockAck_Parameters</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.confirm" name="MA_SPARE1.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.indication" name="MA_SPARE1.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.request" name="MA_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.response" name="MA_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.confirm" name="MA_SPARE2.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.indication" name="MA_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.request" name="MA_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.response" name="MA_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.confirm" name="MA_SPARE3.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.indication" name="MA_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.request" name="MA_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.response" name="MA_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.confirm" name="MA_UNITDATA.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Transmission_Status">
+ <type>Transmission_Status</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.indication" name="MA_UNITDATA.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Proprieraty_Information_Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Bulk_Data_Descriptor">
+ <type>Bulk_Data_Descriptor</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.request" name="MA_UNITDATA.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Bulk_Data_Descriptor">
+ <type>Bulk_Data_Descriptor</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_AC_PRIORITY_UPDATE.indication" name="MLME_AC_PRIORITY_UPDATE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="AC_Priority">
+ <type>AC_Priority</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_INFO_ELEMENTS.confirm" name="MLME_ADD_INFO_ELEMENTS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_INFO_ELEMENTS.request" name="MLME_ADD_INFO_ELEMENTS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Purpose">
+ <type>Purpose_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_RANGE.confirm" name="MLME_ADD_RANGE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_RANGE.request" name="MLME_ADD_RANGE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_SCAN.confirm" name="MLME_ADD_SCAN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_SCAN.request" name="MLME_ADD_SCAN.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Scan_Type">
+ <type>Scan_Type</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Report_Mode_Bitmap">
+ <type>Report_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_VIF.confirm" name="MLME_ADD_VIF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_VIF.request" name="MLME_ADD_VIF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Virtual_Interface_Type">
+ <type>VIF_Type</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ARP_DETECT.confirm" name="MLME_ARP_DETECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ARP_DETECT.request" name="MLME_ARP_DETECT.request" resource="SIGNAL">
+ <field name="IP_Address">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="ARP_Detect_Action">
+ <type>Action</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_BEACON_REPORTING_EVENT.indication" name="MLME_BEACON_REPORTING_EVENT.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Abort_Reason">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCH.confirm" name="MLME_CHANNEL_SWITCH.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCH.request" name="MLME_CHANNEL_SWITCH.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCHED.indication" name="MLME_CHANNEL_SWITCHED.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.confirm" name="MLME_CONNECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.indication" name="MLME_CONNECT.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.request" name="MLME_CONNECT.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Authentication_Type">
+ <type>Authentication_Type</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.response" name="MLME_CONNECT.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECTED.indication" name="MLME_CONNECTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECTED.response" name="MLME_CONNECTED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_RANGE.confirm" name="MLME_DEL_RANGE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_RANGE.request" name="MLME_DEL_RANGE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Entries">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_SCAN.confirm" name="MLME_DEL_SCAN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_SCAN.request" name="MLME_DEL_SCAN.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_TRAFFIC_PARAMETERS.confirm" name="MLME_DEL_TRAFFIC_PARAMETERS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_TRAFFIC_PARAMETERS.request" name="MLME_DEL_TRAFFIC_PARAMETERS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="User_Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_VIF.confirm" name="MLME_DEL_VIF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_VIF.request" name="MLME_DEL_VIF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.confirm" name="MLME_DISCONNECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.indication" name="MLME_DISCONNECT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.request" name="MLME_DISCONNECT.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECTED.indication" name="MLME_DISCONNECTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_EVENT_LOG.indication" name="MLME_EVENT_LOG.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Event">
+ <type>Event</type>
+ </field>
+ <field name="Timestamp">
+ <type>TSF_Time</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FORWARD_BEACON.confirm" name="MLME_FORWARD_BEACON.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FORWARD_BEACON.request" name="MLME_FORWARD_BEACON.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="WIPS_Action">
+ <type>Action</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FRAME_TRANSMISSION.indication" name="MLME_FRAME_TRANSMISSION.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Transmission_Status">
+ <type>Transmission_Status</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET.confirm" name="MLME_GET.confirm" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Element" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET.request" name="MLME_GET.request" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Identifier" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET_KEY_SEQUENCE.confirm" name="MLME_GET_KEY_SEQUENCE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET_KEY_SEQUENCE.request" name="MLME_GET_KEY_SEQUENCE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_HOST_STATE.confirm" name="MLME_HOST_STATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_HOST_STATE.request" name="MLME_HOST_STATE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_State">
+ <type>Host_State</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_INSTALL_APF.confirm" name="MLME_INSTALL_APF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_INSTALL_APF.request" name="MLME_INSTALL_APF.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Filter_Mode">
+ <type>APF_Filter_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_LISTEN_END.indication" name="MLME_LISTEN_END.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MIC_FAILURE.indication" name="MLME_MIC_FAILURE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field array="8" name="Key_Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MONITOR_RSSI.confirm" name="MLME_MONITOR_RSSI.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MONITOR_RSSI.request" name="MLME_MONITOR_RSSI.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Low_RSSI_Threshold">
+ <type>Decibels</type>
+ </field>
+ <field name="High_RSSI_Threshold">
+ <type>Decibels</type>
+ </field>
+ <field name="RSSI_monitoring_enabled">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_CONFIG.confirm" name="MLME_NAN_CONFIG.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_CONFIG.request" name="MLME_NAN_CONFIG.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NAN_Operation_Control_Flags">
+ <type>NANOperControl_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_EVENT.indication" name="MLME_NAN_EVENT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Event">
+ <type>Event</type>
+ </field>
+ <field name="Identifier">
+ <type>Natural16</type>
+ </field>
+ <field name="Address_or_Identifier">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.confirm" name="MLME_NAN_FOLLOWUP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.indication" name="MLME_NAN_FOLLOWUP.indication" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NAN_Management_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.request" name="MLME_NAN_FOLLOWUP.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_PUBLISH.confirm" name="MLME_NAN_PUBLISH.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_PUBLISH.request" name="MLME_NAN_PUBLISH.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SERVICE.indication" name="MLME_NAN_SERVICE.indication" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Ranging_Measurement">
+ <type>Natural32</type>
+ </field>
+ <field name="rangingIndicationType">
+ <type>Ranging_Ind_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_START.confirm" name="MLME_NAN_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_START.request" name="MLME_NAN_START.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NAN_Operation_Control_Flags">
+ <type>NANOperControl_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SUBSCRIBE.confirm" name="MLME_NAN_SUBSCRIBE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SUBSCRIBE.request" name="MLME_NAN_SUBSCRIBE.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.confirm" name="MLME_NDP_REQUEST.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.indication" name="MLME_NDP_REQUEST.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.request" name="MLME_NDP_REQUEST.request" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUESTED.indication" name="MLME_NDP_REQUESTED.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NAN_Management_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Security_Required">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.confirm" name="MLME_NDP_RESPONSE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.indication" name="MLME_NDP_RESPONSE.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.request" name="MLME_NDP_RESPONSE.request" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
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+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
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+ <field name="Reason_Code">
+ <type>Reason_Code</type>
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+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.confirm" name="MLME_NDP_TERMINATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="Result_Code">
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
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+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.indication" name="MLME_NDP_TERMINATE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
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+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.request" name="MLME_NDP_TERMINATE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
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+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATED.indication" name="MLME_NDP_TERMINATED.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_POWERMGT.confirm" name="MLME_POWERMGT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_POWERMGT.request" name="MLME_POWERMGT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Power_Management_Mode">
+ <type>Power_Management_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_PROCEDURE_STARTED.indication" name="MLME_PROCEDURE_STARTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Procedure_Type">
+ <type>Procedure_Type</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RANGE.indication" name="MLME_RANGE.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Entries">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RANGE_DONE.indication" name="MLME_RANGE_DONE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_READ_APF.confirm" name="MLME_READ_APF.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_READ_APF.request" name="MLME_READ_APF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.confirm" name="MLME_REASSOCIATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.indication" name="MLME_REASSOCIATE.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.request" name="MLME_REASSOCIATE.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.response" name="MLME_REASSOCIATE.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RECEIVED_FRAME.indication" name="MLME_RECEIVED_FRAME.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REGISTER_ACTION_FRAME.confirm" name="MLME_REGISTER_ACTION_FRAME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REGISTER_ACTION_FRAME.request" name="MLME_REGISTER_ACTION_FRAME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Action_Frame_Category_Bitmap_active">
+ <type>Category_Mask</type>
+ </field>
+ <field name="Action_Frame_Category_Bitmap_suspended">
+ <type>Category_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RESET_DWELL_TIME.confirm" name="MLME_RESET_DWELL_TIME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RESET_DWELL_TIME.request" name="MLME_RESET_DWELL_TIME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.confirm" name="MLME_ROAM.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.indication" name="MLME_ROAM.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.request" name="MLME_ROAM.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAMED.indication" name="MLME_ROAMED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Temporal_Keys_Required">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAMED.response" name="MLME_ROAMED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RSSI_REPORT.indication" name="MLME_RSSI_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SCAN.indication" name="MLME_SCAN.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="HotListed_AP">
+ <type>Boolean</type>
+ </field>
+ <field name="PreferredNetwork_AP">
+ <type>Boolean</type>
+ </field>
+ <field name="ANQP_Elements_Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Network_Block_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SCAN_DONE.indication" name="MLME_SCAN_DONE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SEND_FRAME.confirm" name="MLME_SEND_FRAME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SEND_FRAME.request" name="MLME_SEND_FRAME.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Message_Type">
+ <type>Message_Type</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Dwell_Time">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Period">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET.confirm" name="MLME_SET.confirm" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Status" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET.request" name="MLME_SET.request" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Element" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SETKEYS.confirm" name="MLME_SETKEYS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SETKEYS.request" name="MLME_SETKEYS.request" resource="SIGNAL">
+ <field name="Key">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Address">
+ <type>MAC_Address</type>
+ </field>
+ <field array="8" name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Cipher_Suite_Selector">
+ <type>Cipher_Suite_Selector</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ACL.confirm" name="MLME_SET_ACL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ACL.request" name="MLME_SET_ACL.request" resource="SIGNAL">
+ <field name="Access_Control_List">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Entries">
+ <type>Natural16</type>
+ </field>
+ <field name="ACL_Policy">
+ <type>ACL_Policy</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_BAND.confirm" name="MLME_SET_BAND.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_BAND.request" name="MLME_SET_BAND.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Band">
+ <type>Band</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CACHED_CHANNELS.confirm" name="MLME_SET_CACHED_CHANNELS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CACHED_CHANNELS.request" name="MLME_SET_CACHED_CHANNELS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CHANNEL.confirm" name="MLME_SET_CHANNEL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CHANNEL.request" name="MLME_SET_CHANNEL.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Availability_Duration">
+ <type>Time_Units</type>
+ </field>
+ <field name="Availability_Interval">
+ <type>Time_Units</type>
+ </field>
+ <field name="Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_COUNTRY.confirm" name="MLME_SET_COUNTRY.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_COUNTRY.request" name="MLME_SET_COUNTRY.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Country_Code">
+ <type>Natural16</type>
+ </field>
+ <field name="DFS_Regulatory_Domain">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CTWINDOW.confirm" name="MLME_SET_CTWINDOW.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CTWINDOW.request" name="MLME_SET_CTWINDOW.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="CTWindow">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_IP_ADDRESS.confirm" name="MLME_SET_IP_ADDRESS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_IP_ADDRESS.request" name="MLME_SET_IP_ADDRESS.request" resource="SIGNAL">
+ <field name="IP_Address">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="IP_Version">
+ <type>Natural16</type>
+ </field>
+ <field name="Multicast_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NOA.confirm" name="MLME_SET_NOA.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NOA.request" name="MLME_SET_NOA.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NoA_Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NUM_ANTENNAS.confirm" name="MLME_SET_NUM_ANTENNAS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NUM_ANTENNAS.request" name="MLME_SET_NUM_ANTENNAS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Number_of_Antennas">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PACKET_FILTER.confirm" name="MLME_SET_PACKET_FILTER.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PACKET_FILTER.request" name="MLME_SET_PACKET_FILTER.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PMK.confirm" name="MLME_SET_PMK.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PMK.request" name="MLME_SET_PMK.request" resource="SIGNAL">
+ <field name="PMK">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PNO_LIST.confirm" name="MLME_SET_PNO_LIST.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PNO_LIST.request" name="MLME_SET_PNO_LIST.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ROAMING_TYPE.confirm" name="MLME_SET_ROAMING_TYPE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ROAMING_TYPE.request" name="MLME_SET_ROAMING_TYPE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Roaming_Type">
+ <type>Roaming_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_TRAFFIC_PARAMETERS.confirm" name="MLME_SET_TRAFFIC_PARAMETERS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_TRAFFIC_PARAMETERS.request" name="MLME_SET_TRAFFIC_PARAMETERS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="User_Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Medium_Time">
+ <type>Natural16</type>
+ </field>
+ <field name="Minimum_Data_Rate">
+ <type>Rate</type>
+ </field>
+ <field name="Peer_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_WHITELIST_SSID.confirm" name="MLME_SET_WHITELIST_SSID.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_WHITELIST_SSID.request" name="MLME_SET_WHITELIST_SSID.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE2.response" name="MLME_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE3.indication" name="MLME_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE3.response" name="MLME_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.confirm" name="MLME_SPARE4.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.indication" name="MLME_SPARE4.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.request" name="MLME_SPARE4.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.response" name="MLME_SPARE4.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.confirm" name="MLME_SPARE5.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.indication" name="MLME_SPARE5.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.request" name="MLME_SPARE5.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE6.confirm" name="MLME_SPARE6.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE6.request" name="MLME_SPARE6.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START.confirm" name="MLME_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START.request" name="MLME_START.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Beacon_Period">
+ <type>Time_Units</type>
+ </field>
+ <field name="DTIM_Period">
+ <type>Beacon_Periods</type>
+ </field>
+ <field name="Capability_Information">
+ <type>Capability_Information</type>
+ </field>
+ <field name="Authentication_Type">
+ <type>Authentication_Type</type>
+ </field>
+ <field name="Hidden_SSID">
+ <type>Hidden_Ssid</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START_LINK_STATISTICS.confirm" name="MLME_START_LINK_STATISTICS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START_LINK_STATISTICS.request" name="MLME_START_LINK_STATISTICS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Mpdu_Size_Threshold">
+ <type>Natural16</type>
+ </field>
+ <field name="Aggressive_statistics_gathering_enabled">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_STOP_LINK_STATISTICS.confirm" name="MLME_STOP_LINK_STATISTICS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_STOP_LINK_STATISTICS.request" name="MLME_STOP_LINK_STATISTICS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Statistics_Stop_Bitmap">
+ <type>StatsStop_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SYNCHRONISED.indication" name="MLME_SYNCHRONISED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SYNCHRONISED.response" name="MLME_SYNCHRONISED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_ACTION.confirm" name="MLME_TDLS_ACTION.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_ACTION.request" name="MLME_TDLS_ACTION.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="TDLS_Action">
+ <type>TDLS_Action</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_PEER.indication" name="MLME_TDLS_PEER.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="TDLS_Event">
+ <type>TDLS_Event</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_PEER.response" name="MLME_TDLS_PEER.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="TDLS_Event">
+ <type>TDLS_Event</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_UNSET_CHANNEL.confirm" name="MLME_UNSET_CHANNEL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_UNSET_CHANNEL.request" name="MLME_UNSET_CHANNEL.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="Message_Type" resource="TYPE" size="16">
+ <value name="EAP_Message" value="0x0001"/>
+ <value name="EAPOL_Key_M123" value="0x0002"/>
+ <value name="EAPOL_Key_M4" value="0x0003"/>
+ <value name="ARP" value="0x0004"/>
+ <value name="DHCP" value="0x0005"/>
+ <value name="Neighbor_Discovery" value="0x0006"/>
+ <value name="WAI_Message" value="0x0007"/>
+ <value name="Any_Other" value="0x0008"/>
+ <value name="IEEE80211_Action" value="0x0010"/>
+ <value name="IEEE80211_Mgmt" value="0x0011"/>
+ </type>
+ <type name="Microseconds16" resource="TYPE" size="16"/>
+ <type name="Microseconds32" resource="TYPE" size="32"/>
+ <type name="Mode" resource="TYPE" size="16">
+ <value name="Source" value="0x0001"/>
+ <value name="Sink" value="0x0002"/>
+ <value name="Loopback" value="0x0003"/>
+ </type>
+ <type name="NANOperControl_Mask" resource="TYPE" size="16"/>
+ <type name="NANSDF_Mask" resource="TYPE" size="16"/>
+ <type name="NAN_Availability_Duration" resource="TYPE" size="8">
+ <value name="16ms" value="0x00"/>
+ <value name="32ms" value="0x01"/>
+ <value name="64ms" value="0x02"/>
+ </type>
+ <type name="NAN_Availability_Interval" resource="TYPE" size="32"/>
+ <type name="NAN_Operation_Control" resource="TYPE" size="16">
+ <value name="MAC_Address_Event" value="0x0002"/>
+ <value name="Start_Cluster_Event" value="0x0004"/>
+ <value name="Joined_Cluster_Event" value="0x0008"/>
+ </type>
+ <type name="NAN_SDF_Control" resource="TYPE" size="16">
+ <value name="Publish_End_Event" value="0x0001"/>
+ <value name="Subscribe_End_Event" value="0x0002"/>
+ <value name="Match_expired_Event" value="0x0004"/>
+ <value name="Received_FollowUp_Event" value="0x0008"/>
+ <value name="Followup_Transmit_Status" value="0x0010"/>
+ </type>
+ <type name="Natural16" resource="TYPE" size="16"/>
+ <type name="Natural32" resource="TYPE" size="32"/>
+ <type name="Natural8" resource="TYPE" size="8"/>
+ <type name="Packet_Filter_Mask" resource="TYPE" size="8"/>
+ <type abbr="PFM" name="Packet_Filter_Mode" resource="TYPE" size="8">
+ <value abbr="out" name="Opt_Out" value="0x01"/>
+ <value abbr="in" name="Opt_In" value="0x02"/>
+ <value abbr="outs" name="Opt_Out_Sleep" value="0x04"/>
+ <value abbr="ins" name="Opt_In_Sleep" value="0x08"/>
+ </type>
+ <type abbr="PID" name="Peer_Index" resource="TYPE" size="16"/>
+ <type name="Per_AC_Priority" resource="TYPE" size="4" subsidiary="true"/>
+ <type name="Picoseconds16" resource="TYPE" size="16"/>
+ <type name="Picoseconds32" resource="TYPE" size="32"/>
+ <type name="Pmalloc_Area" resource="TYPE" size="16">
+ <value name="Pmalloc_Stats" value="0x0000"/>
+ <value name="Pmalloc_Fsm_Stats" value="0x0001"/>
+ <value name="Hostio_Sig_Sizes" value="0x0002"/>
+ </type>
+ <type abbr="PMM" name="Power_Management_Mode" resource="TYPE" size="16">
+ <value name="Active_Mode" value="0x0000"/>
+ <value name="Power_Save" value="0x0001"/>
+ </type>
+ <type name="Primary_Channel_Position" resource="TYPE" size="8" subsidiary="true">
+ <!-- This definition must match the one in station_types.xml -->
+ <!-- For Primary channel in 40M we use: -->
+ <!-- p0 for: |***|___| -->
+ <!-- p1 for: |___|***| -->
+ <!-- For 20MHz channel in 80M we use: -->
+ <!-- p0 for: |***___|______| -->
+ <!-- p1 for: |___***|______| -->
+ <!-- p2 for: |______|***___| -->
+ <!-- p3 for: |______|___***| -->
+ <!-- For 20MHz channel in 160M we use: -->
+ <!-- p0 for: |***_________|____________| -->
+ <!-- p1 for: |___***______|____________| -->
+ <!-- p2 for: |______***___|____________| -->
+ <!-- p3 for: |_________***|____________| -->
+ <!-- p4 for: |____________|***_________| -->
+ <!-- p5 for: |____________|___***______| -->
+ <!-- p6 for: |____________|______***___| -->
+ <!-- p7 for: |____________|_________***| -->
+ <value name="p0" value="0x00"/>
+ <value name="p1" value="0x01"/>
+ <value name="p2" value="0x02"/>
+ <value name="p3" value="0x03"/>
+ <value name="p4" value="0x04"/>
+ <value name="p5" value="0x05"/>
+ <value name="p6" value="0x06"/>
+ <value name="p7" value="0x07"/>
+ <value name="Not_Applicable" value="0x08"/>
+ </type>
+ <type name="Priority" resource="TYPE" size="16">
+ <value abbr="u0" name="QoS_UP0" value="0x0000"/>
+ <value abbr="u1" name="QoS_UP1" value="0x0001"/>
+ <value abbr="u2" name="QoS_UP2" value="0x0002"/>
+ <value abbr="u3" name="QoS_UP3" value="0x0003"/>
+ <value abbr="u4" name="QoS_UP4" value="0x0004"/>
+ <value abbr="u5" name="QoS_UP5" value="0x0005"/>
+ <value abbr="u6" name="QoS_UP6" value="0x0006"/>
+ <value abbr="u7" name="QoS_UP7" value="0x0007"/>
+ <value abbr="co" name="Contention" value="0x8000"/>
+ </type>
+ <type name="Procedure_Type" resource="TYPE" size="16">
+ <value name="Unknown" value="0x0000"/>
+ <value name="Connection_Started" value="0x0001"/>
+ <value name="Device_Discovered" value="0x0002"/>
+ <value name="Roaming_Started" value="0x0003"/>
+ </type>
+ <type name="Process" resource="TYPE" size="12" subsidiary="true"/>
+ <type name="Process_Id" resource="TYPE" size="16">
+ <field name="Process">
+ <type>Process</type>
+ </field>
+ <field array="2" name="Sender_Bit">
+ <type>Sender_Bit</type>
+ </field>
+ <field name="Processor">
+ <type>Processor</type>
+ </field>
+ </type>
+ <type name="Processor" resource="TYPE" size="2" subsidiary="true">
+ <value name="Default" value="0x0"/>
+ <value name="ChipCPU" value="0x1"/>
+ <value name="HostCPU" value="0x3"/>
+ </type>
+ <type name="Protocol" resource="TYPE" size="16">
+ <value name="UDP" value="0x0001"/>
+ <value name="TCP" value="0x0002"/>
+ </type>
+ <type name="Purpose" resource="TYPE" size="16">
+ <value name="Beacon" value="0x0001"/>
+ <value name="Probe_Response" value="0x0002"/>
+ <value name="Association_Response" value="0x0004"/>
+ <value name="Local" value="0x0008"/>
+ <value name="Association_Request" value="0x0010"/>
+ <value name="Probe_Request" value="0x0020"/>
+ </type>
+ <type name="Purpose_Mask" resource="TYPE" size="16"/>
+ <type dvalue="RADIO_LOGGING.confirm" name="RADIO_LOGGING.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="RADIO_LOGGING.indication" name="RADIO_LOGGING.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Just to make sure we have received all data out of the chip -->
+ <field name="Sequence_Number">
+ <type>Natural32</type>
+ </field>
+ <!-- Whether more data will come -->
+ <field name="More_Data">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="RADIO_LOGGING.request" name="RADIO_LOGGING.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <!-- This field holds both the capture format and the capture source as follows:
+ <capture-format-31-to-16> <capture-source-15-to-0>
+ The radio Logging block can sample different parts of the transmit or receive
+ chain and the capture source will determine which part to sample.
+ The capture format defines the data format of captured data. -->
+ <field name="Logging_Source">
+ <type>Natural32</type>
+ </field>
+ <!-- This field selects the log frequency. Currently supported
+ 0 = 80 Mhz,
+ 1 = 40 MHz,
+ 2 = 20 MHz. -->
+ <field name="Logging_Frequency">
+ <type>Natural32</type>
+ </field>
+ <field name="Capture_stream">
+ <type>Natural32</type>
+ </field>
+ <!-- This field holds both the start and stop triggers as follows:
+ <start-trigger-31-to-16> <stop-trigger-15-to-0>
+ Triggers can be either hardware or software based.
+ Not all triggers are supported by all chips. -->
+ <field name="Trigger_Mode">
+ <type>Natural32</type>
+ </field>
+ <!-- Delay before or after trigger, depends on trigger mode.
+ Held in bottom 16 bits only. The units also depend on trigger mode -->
+ <field name="Delay">
+ <type>Natural32</type>
+ </field>
+ <!-- The size of the logging buffer to be allocated. -->
+ <field name="Buffer_Size">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="RTT_Bandwidth" resource="TYPE" size="16">
+ <value name="20MHz" value="0x0004"/>
+ <value name="40MHz" value="0x0008"/>
+ <value name="80MHz" value="0x0010"/>
+ <value name="160MHz" value="0x0020"/>
+ </type>
+ <type name="RTT_ID" resource="TYPE" size="16"/>
+ <type name="RTT_Preamble" resource="TYPE" size="16">
+ <value name="Legacy" value="0x0001"/>
+ <value name="HT" value="0x0002"/>
+ <value name="VHT" value="0x0004"/>
+ </type>
+ <type name="RTT_Status" resource="TYPE" size="16">
+ <value name="Success" value="0x0000"/>
+ <value name="Unspecified_failure" value="0x0001"/>
+ <value name="Fail_No_Response" value="0x0002"/>
+ <value name="Fail_Rejected" value="0x0003"/>
+ <value name="Fail_Not_Scheduled" value="0x0004"/>
+ <value name="Fail_Timeout" value="0x0005"/>
+ <value name="Fail_Incorrect_channel" value="0x0006"/>
+ <value name="Fail_FTM_Not_Supported" value="0x0007"/>
+ <value name="Fail_Measurement_Aborted" value="0x0008"/>
+ <value name="Fail_Invalid_Time_Stamp" value="0x0009"/>
+ <value name="Fail_No_FTM_Received" value="0x000a"/>
+ <value name="Fail_Burst_Not_Scheduled" value="0x000b"/>
+ <value name="Fail_Busy_try_later" value="0x000c"/>
+ <value name="Fail_Invalid_request" value="0x000d"/>
+ <value name="Fail_FTM_Parameter_Override" value="0x000f"/>
+ </type>
+ <type name="RTT_Type" resource="TYPE" size="16">
+ <value name="One_sided" value="0x0001"/>
+ <value name="Two_sided" value="0x0002"/>
+ </type>
+ <type flags="true" name="Radio_Bitmap" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="radio_0" value="0x0001"/>
+ <value name="radio_1" value="0x0002"/>
+ </type>
+ <type name="Ranging_Ind_Type" resource="TYPE" size="16">
+ <value name="Continuous_Indication" value="0x0001"/>
+ <value name="Ingress" value="0x0002"/>
+ <value name="Egress" value="0x0004"/>
+ </type>
+ <type name="Rate" resource="TYPE" size="16">
+ <field name="HT">
+ <type>HT</type>
+ </field>
+ <field name="Short_Preamble">
+ <type>Usage</type>
+ </field>
+ <field name="LDPC">
+ <type>Usage</type>
+ </field>
+ <field name="STBC">
+ <type>Usage</type>
+ </field>
+ <field name="Bandwidth">
+ <type>Bandwidth</type>
+ </field>
+ <field name="Short_GI">
+ <type>Usage</type>
+ </field>
+ <field name="Greenfield">
+ <type>Usage</type>
+ </field>
+ <field name="Rate_Value">
+ <type>Rate_Value</type>
+ </field>
+ </type>
+ <type name="Rate_Value" resource="TYPE" size="7" subsidiary="true"/>
+ <type name="Rates_List" resource="TYPE">
+ <!-- "num_rates" rates of interest in the rates array, encoded as in Data_Rate. -->
+ <field hidden="true" name="num_rates">
+ <type>uint16</type>
+ </field>
+ <field blocklength="num_rates" name="rates">
+ <type>Data_Rate</type>
+ </field>
+ </type>
+ <type name="Raw_Power" resource="TYPE" signed="true" size="16"/>
+ <type name="Reason_Code" resource="TYPE" size="16">
+ <value name="Reserved" value="0x0000"/>
+ <value name="Unspecified_Reason" value="0x0001"/>
+ <value name="Deauthenticated_Invalid_authentication" value="0x0002"/>
+ <value name="Deauthenticated_Leaving" value="0x0003"/>
+ <value name="Deauthenticated_no_more_stations" value="0x0005"/>
+ <value name="Deauthenticated_invalid_class_2_frame" value="0x0006"/>
+ <value name="Deauthenticated_invalid_class_3_frame" value="0x0007"/>
+ <value name="Deauthenticated_Reason_invalid_IE" value="0x000d"/>
+ <value name="Deauthenticated_4_Way_Handshake_Timeout" value="0x000f"/>
+ <value name="Deauthenticated_Group_ Handshake_Timeout" value="0x0010"/>
+ <value name="Deauthenticated_Handshake_Element_Mismatch" value="0x0011"/>
+ <value name="Deauthenticated_Reason_Invalid_RSNE" value="0x0014"/>
+ <value name="Deauthenticated_802_1_X_Auth_Failed" value="0x0017"/>
+ <value name="TDLS_Peer_Unreachable" value="0x0019"/>
+ <value name="TDLS_Teardown_Unspecified_Reason" value="0x001a"/>
+ <value name="QoS_Unspecified_Reason" value="0x0020"/>
+ <value name="QoS_Excessive_Not_Ack" value="0x0022"/>
+ <value name="QoS_TXOP_Limit_Exceeded" value="0x0023"/>
+ <value name="QSTA_Leaving" value="0x0024"/>
+ <value name="End" value="0x0025"/>
+ <value name="Unknown" value="0x0026"/>
+ <value name="Timeout" value="0x0027"/>
+ <value name="Keep_Alive_Failure" value="0x0028"/>
+ <value name="Start" value="0x0029"/>
+ <value name="Deauthenticated_Reason_invalid_PMKID" value="0x0031"/>
+ <value name="Invalid_Pmkid" value="0x0049"/>
+ <value name="Synchronisation_Loss" value="0x8003"/>
+ <value name="Security_Required" value="0x8004"/>
+ <value name="Roaming_failure_link_loss_no_candidate" value="0x8005"/>
+ <value name="Hotspot_max_client_reached" value="0x8006"/>
+ <value name="Channel_Switch_Failure" value="0x8007"/>
+ <value name="Reporting_Aborted_Scanning" value="0x8008"/>
+ <value name="Reporting_Aborted_Roaming" value="0x8009"/>
+ <value name="NAN_Service_Terminated_Timeout" value="0x9001"/>
+ <value name="NAN_Service_Terminated_User_Request" value="0x9002"/>
+ <value name="NAN_Service_Terminated_Count_Reached" value="0x9003"/>
+ <value name="NAN_Service_Terminated_Discovery_Shutdown" value="0x9004"/>
+ <value name="NAN_Transmit_Followup_Success" value="0x9006"/>
+ <value name="NAN_Transmit_Followup_Failure" value="0x9007"/>
+ <value name="NDP_Accepted" value="0x9008"/>
+ <value name="NDP_Rejected" value="0x9009"/>
+ </type>
+ <type name="Report_Mode" resource="TYPE" size="16">
+ <value name="Reserved" value="0x0001"/>
+ <!-- Buffer_full is deprecated-->
+ <value name="End_of_Scan_cycle" value="0x0002"/>
+ <value name="Real_Time" value="0x0004"/>
+ <value name="No_Batch" value="0x0008"/>
+ </type>
+ <type abbr="RC" name="Result_Code" resource="TYPE" size="16">
+ <value name="Success" value="0x0000"/>
+ <value name="Unspecified_Failure" value="0x0001"/>
+ <value name="Invalid_Parameters" value="0x0026"/>
+ <value name="Rejected_Invalid_IE" value="0x0028"/>
+ <value name="Not_Allowed" value="0x0030"/>
+ <value name="Not_Present" value="0x0031"/>
+ <value name="Transmission_Failure" value="0x004f"/>
+ <value name="Too_Many_Simultaneous_Requests" value="0x8001"/>
+ <value name="BSS_Already_Started_Or_Joined" value="0x8002"/>
+ <value name="Not_Supported" value="0x8003"/>
+ <value name="Invalid_State" value="0x8004"/>
+ <value name="Insufficient_Resource" value="0x8006"/>
+ <value name="Invalid_Virtual_Interface_Index" value="0x800a"/>
+ <value name="Host_Request_Success" value="0x800b"/>
+ <value name="Host_Request_Failed" value="0x800c"/>
+ <value name="Invalid_Frequency" value="0x800e"/>
+ <value name="Probe_Timeout" value="0x800f"/>
+ <value name="Auth_Timeout" value="0x8010"/>
+ <value name="Assoc_Timeout" value="0x8011"/>
+ <value name="Assoc_Abort" value="0x8012"/>
+ <value name="Auth_No_Ack" value="0x8013"/>
+ <value name="Assoc_No_Ack" value="0x8014"/>
+ <value name="Auth_Failed_Code" value="0x8100"/>
+ <value name="Assoc_Failed_Code" value="0x8200"/>
+ <value name="Invalid_TLV_Value" value="0x9000"/>
+ <value name="NAN_Protocol_Failure" value="0x9001"/>
+ <value name="NAN_Invalid_Session_ID" value="0x9002"/>
+ <value name="NAN_Invalid_Requestor_Instance_ID" value="0x9003"/>
+ <value name="Unsupported_Concurrency" value="0x9004"/>
+ <value name="NAN_Invalid_NDP_ID" value="0x9005"/>
+ <value name="NAN_Invalid_Match_ID" value="0x9006"/>
+ <value name="NAN_No_OTA_Ack" value="0x9007"/>
+ <value name="NAN_Invalid_Availability" value="0x9008"/>
+ <value name="NAN_Immutable_Unacceptable" value="0x9009"/>
+ <value name="NAN_Rejected_Security_Policy" value="0x900a"/>
+ <value name="NDP_Rejected" value="0x900b"/>
+ <value name="NDL_Unacceptable" value="0x900c"/>
+ <value name="NDL_Failed_Schedule" value="0x900d"/>
+ </type>
+ <type name="Roaming_Type" resource="TYPE" size="16">
+ <value name="Legacy" value="0x0000"/>
+ <value name="NCHO" value="0x0001"/>
+ </type>
+ <type name="Rule_Flag" resource="TYPE" size="16">
+ <value name="NO_IR" value="0x0001"/>
+ <value name="DFS" value="0x0002"/>
+ <value name="NO_OFDM" value="0x0004"/>
+ <value name="NO_INDOOR" value="0x0008"/>
+ <value name="NO_OUTDOOR" value="0x0010"/>
+ </type>
+ <type flags="true" name="Rx_Start_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="scan_channel" value="0x0001"/>
+ <value name="filtering" value="0x0002"/>
+ <!-- Setting the 'beamforming' flag will automaticaly set the 'ack' flag too,
+ as we need to use the transmitter. -->
+ <value name="beamforming" value="0x0004"/>
+ <!-- The radio is normally turned on for Rx only. However, if the 'ack' flag
+ is set it will be turned on for Tx as well. This allows unicast MPDUs
+ to be acked. -->
+ <value name="ack" value="0x0008"/>
+ <value name="lp_mode" value="0x0010"/>
+ <value name="chan_rssi" value="0x0020"/>
+ <value name="disable_external_lna" value="0x0040"/>
+ </type>
+ <type name="Scan_Id" resource="TYPE" size="16"/>
+ <type name="Scan_Policy" resource="TYPE" size="8">
+ <value name="Passive" value="0x01"/>
+ <value name="Test_Mode" value="0x02"/>
+ <value name="Any_RA" value="0x04"/>
+ <value name="2_4GHz" value="0x08"/>
+ <value name="5GHz" value="0x10"/>
+ <value name="Non_DFS" value="0x20"/>
+ <value name="DFS" value="0x40"/>
+ <value name="On_Channel" value="0x80"/>
+ </type>
+ <type name="Scan_Type" resource="TYPE" size="16">
+ <value name="Initial_Scan" value="0x0001"/>
+ <value name="Full_Scan" value="0x0002"/>
+ <value name="Scheduled_Scan" value="0x0003"/>
+ <value name="P2P_Scan_Full" value="0x0004"/>
+ <value name="P2P_Scan_Social" value="0x0005"/>
+ <value name="OBSS_Scan" value="0x0006"/>
+ <value name="AP_Auto_Channel_Selection" value="0x0007"/>
+ <value name="GScan" value="0x0009"/>
+ <!-- FW internal values -->
+ <value name="Measurement_Scan" value="0x000a"/>
+ <value name="Soft_Cached_Roaming_Scan" value="0x000b"/>
+ <value name="Soft_All_Roaming_Scan" value="0x000c"/>
+ <value name="Hard_Cached_Roaming_Scan" value="0x000d"/>
+ <value name="Hard_All_Roaming_Scan" value="0x000e"/>
+ <value name="OBSS_Scan_Internal" value="0x000f"/>
+ <value name="NAN_Scan" value="0x0010"/>
+ <value name="FTM_Neighbour_Scan" value="0x0011"/>
+ <value name="First_Illegal" value="0x0012"/>
+ </type>
+ <type name="Sender_Bit" resource="TYPE" size="1" subsidiary="true"/>
+ <type name="Sequence_Number" resource="TYPE" size="16">
+ <field name="TDLS">
+ <type>Usage</type>
+ </field>
+ <field array="3" name="Zero_Bit">
+ <type>Zero_Bit</type>
+ </field>
+ <field name="Sequence_Number_Value">
+ <type>Sequence_Number_Value</type>
+ </field>
+ </type>
+ <type name="Sequence_Number_Value" resource="TYPE" size="12" subsidiary="true"/>
+ <type abbr="Sig" name="Signal_Id" resource="TYPE" size="16">
+ <value name="MA_UNITDATA.request" value="0x1000"/>
+ <value name="MA_SPARE1.request" value="0x1002"/>
+ <value name="MA_SPARE2.request" value="0x1003"/>
+ <value name="MA_SPARE3.request" value="0x1004"/>
+ <value name="MA_UNITDATA.confirm" value="0x1100"/>
+ <value name="MA_SPARE1.confirm" value="0x1102"/>
+ <value name="MA_SPARE2.confirm" value="0x1103"/>
+ <value name="MA_SPARE3.confirm" value="0x1104"/>
+ <value name="MA_SPARE1.response" value="0x1200"/>
+ <value name="MA_SPARE2.response" value="0x1201"/>
+ <value name="MA_SPARE3.response" value="0x1202"/>
+ <value name="MA_UNITDATA.indication" value="0x1300"/>
+ <value name="MA_BLOCKACK.indication" value="0x1301"/>
+ <value name="MA_SPARE1.indication" value="0x1302"/>
+ <value name="MA_SPARE2.indication" value="0x1303"/>
+ <value name="MA_SPARE3.indication" value="0x1304"/>
+ <value name="MLME_GET.request" value="0x2001"/>
+ <value name="MLME_SET.request" value="0x2002"/>
+ <value name="MLME_POWERMGT.request" value="0x2003"/>
+ <value name="MLME_ADD_INFO_ELEMENTS.request" value="0x2004"/>
+ <value name="MLME_ADD_SCAN.request" value="0x2005"/>
+ <value name="MLME_DEL_SCAN.request" value="0x2006"/>
+ <value name="MLME_ADD_VIF.request" value="0x2007"/>
+ <value name="MLME_DEL_VIF.request" value="0x2008"/>
+ <value name="MLME_START.request" value="0x2009"/>
+ <value name="MLME_SET_CHANNEL.request" value="0x200a"/>
+ <value name="MLME_CONNECT.request" value="0x200b"/>
+ <value name="MLME_REASSOCIATE.request" value="0x200c"/>
+ <value name="MLME_ROAM.request" value="0x200d"/>
+ <value name="MLME_DISCONNECT.request" value="0x200e"/>
+ <value name="MLME_REGISTER_ACTION_FRAME.request" value="0x200f"/>
+ <value name="MLME_SEND_FRAME.request" value="0x2010"/>
+ <value name="MLME_RESET_DWELL_TIME.request" value="0x2011"/>
+ <value name="MLME_SET_TRAFFIC_PARAMETERS.request" value="0x2012"/>
+ <value name="MLME_DEL_TRAFFIC_PARAMETERS.request" value="0x2013"/>
+ <value name="MLME_SET_PACKET_FILTER.request" value="0x2014"/>
+ <value name="MLME_SET_IP_ADDRESS.request" value="0x2015"/>
+ <value name="MLME_SET_ACL.request" value="0x2016"/>
+ <value name="MLME_SETKEYS.request" value="0x2018"/>
+ <value name="MLME_GET_KEY_SEQUENCE.request" value="0x201a"/>
+ <value name="MLME_SET_PMK.request" value="0x201c"/>
+ <value name="MLME_SET_CACHED_CHANNELS.request" value="0x201f"/>
+ <value name="MLME_SET_WHITELIST_SSID.request" value="0x2020"/>
+ <value name="MLME_TDLS_ACTION.request" value="0x2021"/>
+ <value name="MLME_CHANNEL_SWITCH.request" value="0x2022"/>
+ <value name="MLME_MONITOR_RSSI.request" value="0x2023"/>
+ <value name="MLME_START_LINK_STATISTICS.request" value="0x2024"/>
+ <value name="MLME_STOP_LINK_STATISTICS.request" value="0x2025"/>
+ <value name="MLME_SET_PNO_LIST.request" value="0x2027"/>
+ <value name="MLME_HOST_STATE.request" value="0x2028"/>
+ <value name="MLME_ADD_RANGE.request" value="0x2029"/>
+ <value name="MLME_DEL_RANGE.request" value="0x202a"/>
+ <value name="MLME_SET_NOA.request" value="0x202b"/>
+ <value name="MLME_SET_CTWINDOW.request" value="0x202c"/>
+ <value name="MLME_NAN_START.request" value="0x202d"/>
+ <value name="MLME_NAN_CONFIG.request" value="0x202e"/>
+ <value name="MLME_NAN_PUBLISH.request" value="0x202f"/>
+ <value name="MLME_NAN_SUBSCRIBE.request" value="0x2030"/>
+ <value name="MLME_NAN_FOLLOWUP.request" value="0x2031"/>
+ <value name="MLME_UNSET_CHANNEL.request" value="0x2032"/>
+ <value name="MLME_SET_COUNTRY.request" value="0x2033"/>
+ <value name="MLME_FORWARD_BEACON.request" value="0x2034"/>
+ <value name="MLME_NDP_REQUEST.request" value="0x2035"/>
+ <value name="MLME_NDP_RESPONSE.request" value="0x2036"/>
+ <value name="MLME_NDP_TERMINATE.request" value="0x2037"/>
+ <value name="MLME_SPARE4.request" value="0x203a"/>
+ <value name="MLME_SPARE5.request" value="0x203b"/>
+ <value name="MLME_SPARE6.request" value="0x203c"/>
+ <value name="MLME_INSTALL_APF.request" value="0x203d"/>
+ <value name="MLME_READ_APF.request" value="0x203e"/>
+ <value name="MLME_SET_NUM_ANTENNAS.request" value="0x203f"/>
+ <value name="MLME_ARP_DETECT.request" value="0x2040"/>
+ <value name="MLME_SET_ROAMING_TYPE.request" value="0x2041"/>
+ <value name="MLME_SET_BAND.request" value="0x2042"/>
+ <value name="MLME_GET.confirm" value="0x2101"/>
+ <value name="MLME_SET.confirm" value="0x2102"/>
+ <value name="MLME_POWERMGT.confirm" value="0x2103"/>
+ <value name="MLME_ADD_INFO_ELEMENTS.confirm" value="0x2104"/>
+ <value name="MLME_ADD_SCAN.confirm" value="0x2105"/>
+ <value name="MLME_DEL_SCAN.confirm" value="0x2106"/>
+ <value name="MLME_ADD_VIF.confirm" value="0x2107"/>
+ <value name="MLME_DEL_VIF.confirm" value="0x2108"/>
+ <value name="MLME_START.confirm" value="0x2109"/>
+ <value name="MLME_SET_CHANNEL.confirm" value="0x210a"/>
+ <value name="MLME_CONNECT.confirm" value="0x210b"/>
+ <value name="MLME_REASSOCIATE.confirm" value="0x210c"/>
+ <value name="MLME_ROAM.confirm" value="0x210d"/>
+ <value name="MLME_DISCONNECT.confirm" value="0x210e"/>
+ <value name="MLME_REGISTER_ACTION_FRAME.confirm" value="0x210f"/>
+ <value name="MLME_SEND_FRAME.confirm" value="0x2110"/>
+ <value name="MLME_RESET_DWELL_TIME.confirm" value="0x2111"/>
+ <value name="MLME_SET_TRAFFIC_PARAMETERS.confirm" value="0x2112"/>
+ <value name="MLME_DEL_TRAFFIC_PARAMETERS.confirm" value="0x2113"/>
+ <value name="MLME_SET_PACKET_FILTER.confirm" value="0x2114"/>
+ <value name="MLME_SET_IP_ADDRESS.confirm" value="0x2115"/>
+ <value name="MLME_SET_ACL.confirm" value="0x2116"/>
+ <value name="MLME_SETKEYS.confirm" value="0x2118"/>
+ <value name="MLME_GET_KEY_SEQUENCE.confirm" value="0x211a"/>
+ <value name="MLME_SET_PMK.confirm" value="0x211c"/>
+ <value name="MLME_SET_CACHED_CHANNELS.confirm" value="0x211f"/>
+ <value name="MLME_SET_WHITELIST_SSID.confirm" value="0x2120"/>
+ <value name="MLME_TDLS_ACTION.confirm" value="0x2121"/>
+ <value name="MLME_CHANNEL_SWITCH.confirm" value="0x2122"/>
+ <value name="MLME_MONITOR_RSSI.confirm" value="0x2123"/>
+ <value name="MLME_START_LINK_STATISTICS.confirm" value="0x2124"/>
+ <value name="MLME_STOP_LINK_STATISTICS.confirm" value="0x2125"/>
+ <value name="MLME_SET_PNO_LIST.confirm" value="0x2127"/>
+ <value name="MLME_HOST_STATE.confirm" value="0x2128"/>
+ <value name="MLME_ADD_RANGE.confirm" value="0x2129"/>
+ <value name="MLME_DEL_RANGE.confirm" value="0x212a"/>
+ <value name="MLME_SET_NOA.confirm" value="0x212b"/>
+ <value name="MLME_SET_CTWINDOW.confirm" value="0x212c"/>
+ <value name="MLME_NAN_START.confirm" value="0x212d"/>
+ <value name="MLME_NAN_CONFIG.confirm" value="0x212e"/>
+ <value name="MLME_NAN_PUBLISH.confirm" value="0x212f"/>
+ <value name="MLME_NAN_SUBSCRIBE.confirm" value="0x2130"/>
+ <value name="MLME_NAN_FOLLOWUP.confirm" value="0x2131"/>
+ <value name="MLME_UNSET_CHANNEL.confirm" value="0x2132"/>
+ <value name="MLME_SET_COUNTRY.confirm" value="0x2133"/>
+ <value name="MLME_FORWARD_BEACON.confirm" value="0x2134"/>
+ <value name="MLME_NDP_REQUEST.confirm" value="0x2135"/>
+ <value name="MLME_NDP_RESPONSE.confirm" value="0x2136"/>
+ <value name="MLME_NDP_TERMINATE.confirm" value="0x2137"/>
+ <value name="MLME_SPARE4.confirm" value="0x213a"/>
+ <value name="MLME_SPARE5.confirm" value="0x213b"/>
+ <value name="MLME_SPARE6.confirm" value="0x213c"/>
+ <value name="MLME_INSTALL_APF.confirm" value="0x213d"/>
+ <value name="MLME_READ_APF.confirm" value="0x213e"/>
+ <value name="MLME_SET_NUM_ANTENNAS.confirm" value="0x213f"/>
+ <value name="MLME_ARP_DETECT.confirm" value="0x2140"/>
+ <value name="MLME_SET_ROAMING_TYPE.confirm" value="0x2141"/>
+ <value name="MLME_SET_BAND.confirm" value="0x2142"/>
+ <value name="MLME_CONNECT.response" value="0x2200"/>
+ <value name="MLME_CONNECTED.response" value="0x2201"/>
+ <value name="MLME_REASSOCIATE.response" value="0x2202"/>
+ <value name="MLME_ROAMED.response" value="0x2203"/>
+ <value name="MLME_TDLS_PEER.response" value="0x2204"/>
+ <value name="MLME_SYNCHRONISED.response" value="0x2205"/>
+ <value name="MLME_SPARE2.response" value="0x2206"/>
+ <value name="MLME_SPARE3.response" value="0x2207"/>
+ <value name="MLME_SPARE4.response" value="0x2208"/>
+ <value name="MLME_SCAN.indication" value="0x2300"/>
+ <value name="MLME_SCAN_DONE.indication" value="0x2301"/>
+ <value name="MLME_LISTEN_END.indication" value="0x2302"/>
+ <value name="MLME_CONNECT.indication" value="0x2303"/>
+ <value name="MLME_CONNECTED.indication" value="0x2304"/>
+ <value name="MLME_REASSOCIATE.indication" value="0x2305"/>
+ <value name="MLME_ROAM.indication" value="0x2306"/>
+ <value name="MLME_ROAMED.indication" value="0x2307"/>
+ <value name="MLME_DISCONNECT.indication" value="0x2308"/>
+ <value name="MLME_DISCONNECTED.indication" value="0x2309"/>
+ <value name="MLME_PROCEDURE_STARTED.indication" value="0x230a"/>
+ <value name="MLME_MIC_FAILURE.indication" value="0x230b"/>
+ <value name="MLME_FRAME_TRANSMISSION.indication" value="0x230c"/>
+ <value name="MLME_RECEIVED_FRAME.indication" value="0x230d"/>
+ <value name="MLME_TDLS_PEER.indication" value="0x230f"/>
+ <value name="MLME_RSSI_REPORT.indication" value="0x2312"/>
+ <value name="MLME_AC_PRIORITY_UPDATE.indication" value="0x2313"/>
+ <value name="MLME_RANGE.indication" value="0x2314"/>
+ <value name="MLME_RANGE_DONE.indication" value="0x2315"/>
+ <value name="MLME_EVENT_LOG.indication" value="0x2316"/>
+ <value name="MLME_NAN_EVENT.indication" value="0x2317"/>
+ <value name="MLME_NAN_SERVICE.indication" value="0x2318"/>
+ <value name="MLME_NAN_FOLLOWUP.indication" value="0x2319"/>
+ <value name="MLME_CHANNEL_SWITCHED.indication" value="0x231a"/>
+ <value name="MLME_SYNCHRONISED.indication" value="0x231b"/>
+ <value name="MLME_BEACON_REPORTING_EVENT.indication" value="0x231c"/>
+ <value name="MLME_SPARE3.indication" value="0x231d"/>
+ <value name="MLME_SPARE4.indication" value="0x231e"/>
+ <value name="MLME_NDP_REQUEST.indication" value="0x231f"/>
+ <value name="MLME_NDP_REQUESTED.indication" value="0x2320"/>
+ <value name="MLME_NDP_RESPONSE.indication" value="0x2321"/>
+ <value name="MLME_NDP_TERMINATE.indication" value="0x2322"/>
+ <value name="MLME_NDP_TERMINATED.indication" value="0x2323"/>
+ <value name="MLME_SPARE5.indication" value="0x2324"/>
+ <value name="DEBUG_SPARE1.request" value="0x8000"/>
+ <value name="DEBUG_SPARE2.request" value="0x8001"/>
+ <value name="DEBUG_SPARE3.request" value="0x8002"/>
+ <value name="DEBUG_SPARE1.confirm" value="0x8100"/>
+ <value name="DEBUG_SPARE2.confirm" value="0x8101"/>
+ <value name="DEBUG_SPARE3.confirm" value="0x8102"/>
+ <value name="DEBUG_SPARE1.response" value="0x8200"/>
+ <value name="DEBUG_SPARE2.response" value="0x8201"/>
+ <value name="DEBUG_SPARE3.response" value="0x8202"/>
+ <value name="DEBUG_WORD12.indication" value="0x8301"/>
+ <value name="DEBUG_FAULT.indication" value="0x8302"/>
+ <value name="DEBUG_WORDS.indication" value="0x8303"/>
+ <value name="DEBUG_SPARE2.indication" value="0x8304"/>
+ <value name="DEBUG_SPARE3.indication" value="0x8305"/>
+ <value name="DEBUG_SPARE4.indication" value="0x8306"/>
+ <value name="TEST_BLOCK_REQUESTS.request" value="0x9000"/>
+ <value name="TEST_PANIC.request" value="0x9001"/>
+ <value name="TEST_SUSPEND.request" value="0x9002"/>
+ <value name="TEST_RESUME.request" value="0x9003"/>
+ <value name="RADIO_LOGGING.request" value="0x9004"/>
+ <value abbr="cw" name="WLANLITE_CW_START.request" value="0x9005"/>
+ <value abbr="cws" name="WLANLITE_CW_STOP.request" value="0x9006"/>
+ <value abbr="txset" name="WLANLITE_TX_SET_PARAMS.request" value="0x9007"/>
+ <value abbr="tx" name="WLANLITE_TX_START.request" value="0x9008"/>
+ <value abbr="txr" name="WLANLITE_TX_READ.request" value="0x9009"/>
+ <value abbr="txs" name="WLANLITE_TX_STOP.request" value="0x900a"/>
+ <value abbr="rx" name="WLANLITE_RX_START.request" value="0x900b"/>
+ <value abbr="rxr" name="WLANLITE_RX_READ.request" value="0x900c"/>
+ <value abbr="rxs" name="WLANLITE_RX_STOP.request" value="0x900d"/>
+ <value abbr="status" name="WLANLITE_STATUS.request" value="0x900e"/>
+ <value name="TEST_PMALLOC.request" value="0x900f"/>
+ <value name="TEST_CONFIGURE_MONITOR_MODE.request" value="0x9010"/>
+ <value name="TEST_CHECK_FW_ALIVE.request" value="0x9012"/>
+ <value abbr="dg" name="DEBUG_GENERIC.request" value="0x9013"/>
+ <value name="DEBUG_PKT_SINK_START.request" value="0x9014"/>
+ <value name="DEBUG_PKT_SINK_STOP.request" value="0x9015"/>
+ <value name="DEBUG_PKT_SINK_REPORT.request" value="0x9016"/>
+ <value name="DEBUG_PKT_GEN_START.request" value="0x9017"/>
+ <value name="DEBUG_PKT_GEN_STOP.request" value="0x9018"/>
+ <value name="DEBUG_PKT_GEN_REPORT.request" value="0x9019"/>
+ <value abbr="rs" name="WLANLITE_RADIO_SELECT.request" value="0x901a"/>
+ <value name="TEST_HIP_TESTER_START.request" value="0x901b"/>
+ <value name="TEST_HIP_TESTER_STOP.request" value="0x901c"/>
+ <value name="TEST_HIP_TESTER_SET_PARAMS.request" value="0x901d"/>
+ <value name="TEST_HIP_TESTER_REPORT.request" value="0x901e"/>
+ <value abbr="bgtxg" name="TEST_BIST_GET_TX_GAIN.request" value="0x901f"/>
+ <value name="TEST_SPARE1.request" value="0x9020"/>
+ <value name="TEST_SPARE2.request" value="0x9021"/>
+ <value name="TEST_SPARE3.request" value="0x9022"/>
+ <value name="RADIO_LOGGING.confirm" value="0x9100"/>
+ <value name="WLANLITE_CW_START.confirm" value="0x9101"/>
+ <value name="WLANLITE_TX_SET_PARAMS.confirm" value="0x9102"/>
+ <value name="WLANLITE_CW_STOP.confirm" value="0x9103"/>
+ <value name="WLANLITE_TX_START.confirm" value="0x9104"/>
+ <value name="WLANLITE_TX_READ.confirm" value="0x9105"/>
+ <value name="WLANLITE_TX_STOP.confirm" value="0x9106"/>
+ <value name="WLANLITE_RX_START.confirm" value="0x9107"/>
+ <value name="WLANLITE_RX_READ.confirm" value="0x9108"/>
+ <value name="WLANLITE_RX_STOP.confirm" value="0x9109"/>
+ <value name="WLANLITE_STATUS.confirm" value="0x910a"/>
+ <value name="TEST_PMALLOC.confirm" value="0x910b"/>
+ <value name="TEST_CONFIGURE_MONITOR_MODE.confirm" value="0x910c"/>
+ <value name="TEST_CHECK_FW_ALIVE.confirm" value="0x910e"/>
+ <value name="TEST_SUSPEND.confirm" value="0x910f"/>
+ <value name="TEST_RESUME.confirm" value="0x9110"/>
+ <value name="DEBUG_GENERIC.confirm" value="0x9111"/>
+ <value name="WLANLITE_RADIO_SELECT.confirm" value="0x9112"/>
+ <value name="TEST_HIP_TESTER_START.confirm" value="0x9113"/>
+ <value name="TEST_HIP_TESTER_STOP.confirm" value="0x9114"/>
+ <value name="TEST_HIP_TESTER_SET_PARAMS.confirm" value="0x9115"/>
+ <value name="TEST_BIST_GET_TX_GAIN.confirm" value="0x9116"/>
+ <value name="TEST_SPARE1.confirm" value="0x9117"/>
+ <value name="TEST_SPARE2.confirm" value="0x9118"/>
+ <value name="TEST_SPARE3.confirm" value="0x9119"/>
+ <value name="TEST_SPARE1.response" value="0x9200"/>
+ <value name="TEST_SPARE2.response" value="0x9201"/>
+ <value name="TEST_SPARE3.response" value="0x9202"/>
+ <value name="RADIO_LOGGING.indication" value="0x9300"/>
+ <value name="DEBUG_GENERIC.indication" value="0x9301"/>
+ <value name="DEBUG_PKT_SINK_REPORT.indication" value="0x9302"/>
+ <value name="DEBUG_PKT_GEN_REPORT.indication" value="0x9303"/>
+ <value name="TEST_HIP_TESTER_REPORT.indication" value="0x9304"/>
+ <value name="TEST_SPARE1.indication" value="0x9305"/>
+ <value name="TEST_SPARE2.indication" value="0x9306"/>
+ <value name="TEST_SPARE3.indication" value="0x9307"/>
+ </type>
+ <type name="Signal_Primitive" resource="PRIMITIVE">
+ <field name="Signal_Primitive_Header">
+ <type>Signal_Primitive_Header</type>
+ </field>
+ <field discriminant="&Signal_Primitive_Header.Signal_Id" name="Signal">
+ <resource>SIGNAL</resource>
+ </field>
+ </type>
+ <type name="Signal_Primitive_Header" resource="HEADER">
+ <field name="Signal_Id">
+ <type>Signal_Id</type>
+ </field>
+ <field default="0" name="Receiver_Process_Id" suppress="true">
+ <type>Process_Id</type>
+ </field>
+ <field default="0xc001" name="Sender_Process_Id" suppress="true">
+ <type>Process_Id</type>
+ </field>
+ </type>
+ <type name="Slot_Number" resource="TYPE" size="16" subsidiary="true"/>
+ <type name="StatsStop_Bitmap" resource="TYPE" size="16">
+ <value name="Stats_Radio" value="0x0001"/>
+ <value name="Stats_Radio_CCA" value="0x0002"/>
+ <value name="Stats_Radio_Channels" value="0x0004"/>
+ <value name="Stats_Radio_Scan" value="0x0008"/>
+ <value name="Stats_Iface" value="0x0010"/>
+ <value name="Stats_Iface_Txrate" value="0x0020"/>
+ <value name="Stats_Iface_AC" value="0x0040"/>
+ <value name="Stats_Iface_Contension" value="0x0080"/>
+ </type>
+ <type name="StatsStop_Mask" resource="TYPE" size="16"/>
+ <type name="TDLS_Action" resource="TYPE" size="16">
+ <value name="Discovery" value="0x0000"/>
+ <value name="Setup" value="0x0001"/>
+ <value name="Teardown" value="0x0002"/>
+ </type>
+ <type name="TDLS_Event" resource="TYPE" size="16">
+ <value name="Connected" value="0x0001"/>
+ <value name="Disconnected" value="0x0002"/>
+ <value name="Discovered" value="0x0003"/>
+ </type>
+ <type dvalue="TEST_BIST_GET_TX_GAIN.confirm" name="TEST_BIST_GET_TX_GAIN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- Measured gain between TX, DPD Loopback and RX ABB using signal analyser -->
+ <field name="gain">
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_BIST_GET_TX_GAIN.request" name="TEST_BIST_GET_TX_GAIN.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="tx_gain">
+ <!-- How much gain to put in TX -->
+ <type>uint16</type>
+ </field>
+ <field name="rx_gain">
+ <!-- How much gain to put in RX -->
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_BLOCK_REQUESTS.request" name="TEST_BLOCK_REQUESTS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CHECK_FW_ALIVE.confirm" name="TEST_CHECK_FW_ALIVE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CHECK_FW_ALIVE.request" name="TEST_CHECK_FW_ALIVE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CONFIGURE_MONITOR_MODE.confirm" name="TEST_CONFIGURE_MONITOR_MODE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CONFIGURE_MONITOR_MODE.request" name="TEST_CONFIGURE_MONITOR_MODE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_REPORT.indication" name="TEST_HIP_TESTER_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Mbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Tester_Reserved_1">
+ <type>Natural32</type>
+ </field>
+ <field name="Tester_Reserved_2">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_REPORT.request" name="TEST_HIP_TESTER_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_SET_PARAMS.confirm" name="TEST_HIP_TESTER_SET_PARAMS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_SET_PARAMS.request" name="TEST_HIP_TESTER_SET_PARAMS.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_START.confirm" name="TEST_HIP_TESTER_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_START.request" name="TEST_HIP_TESTER_START.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Mode">
+ <type>Mode</type>
+ </field>
+ <field name="End_Point">
+ <type>End_Point</type>
+ </field>
+ <field name="Protocol">
+ <type>Protocol</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="Packets_Size">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_STOP.confirm" name="TEST_HIP_TESTER_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Mbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Tester_Reserved_1">
+ <type>Natural32</type>
+ </field>
+ <field name="Tester_Reserved_2">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_STOP.request" name="TEST_HIP_TESTER_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PANIC.request" name="TEST_PANIC.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PMALLOC.confirm" name="TEST_PMALLOC.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PMALLOC.request" name="TEST_PMALLOC.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Alloc_Area">
+ <type>Pmalloc_Area</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_RESUME.confirm" name="TEST_RESUME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_RESUME.request" name="TEST_RESUME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.confirm" name="TEST_SPARE1.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.indication" name="TEST_SPARE1.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.request" name="TEST_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.response" name="TEST_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.confirm" name="TEST_SPARE2.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.indication" name="TEST_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.request" name="TEST_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.response" name="TEST_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.confirm" name="TEST_SPARE3.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.indication" name="TEST_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.request" name="TEST_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.response" name="TEST_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SUSPEND.confirm" name="TEST_SUSPEND.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SUSPEND.request" name="TEST_SUSPEND.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="TID" resource="TYPE" size="4" subsidiary="true"/>
+ <type name="TSF_Time" resource="TYPE" size="64"/>
+ <type name="Time_Units" resource="TYPE" size="16"/>
+ <type abbr="TX" name="Transmission_Status" resource="TYPE" size="16">
+ <value name="Successful" value="0x0000"/>
+ <value name="Retry_Limit" value="0x0001"/>
+ <value name="Tx_Lifetime" value="0x0002"/>
+ <value name="Excessive_Data_Length" value="0x0004"/>
+ <value name="No_BSS" value="0x0003"/>
+ <value name="Unavailable_Key_Mapping" value="0x0005"/>
+ <value name="Unspecified_failure" value="0x0006"/>
+ </type>
+ <type name="Tx_Data_Type" resource="TYPE" size="16">
+ <!-- Specify payload or frame content -->
+ <value name="data_word" value="0x0000"/>
+ <value name="data_random" value="0x0001"/>
+ </type>
+ <type name="Tx_HE_Mode" resource="TYPE" size="16">
+ <!-- 11ax HE mode -->
+ <value name="he_su" value="0x0000"/>
+ <value name="he_er_su" value="0x0001"/>
+ <value name="he_er_su_10mhz" value="0x0002"/>
+ <value name="he_mu_tb_standalone" value="0x0003"/>
+ <value name="he_mu_tb" value="0x0004"/>
+ </type>
+ <type flags="true" name="Tx_Read_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="frame_counting" value="0x0001"/>
+ <value name="thermal_cutout" value="0x0002"/>
+ </type>
+ <type flags="true" name="Tx_Set_Params_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <!-- Set the 'ack' flag to wait for an ack after each frame(unicast MPDUs only) -->
+ <value name="ack" value="0x0001"/>
+ <value name="duplicate_80" value="0x0002"/>
+ <value name="duplicate_40" value="0x0004"/>
+ <value name="deafen_rx" value="0x0008"/>
+ <!-- Enable carrier sense -->
+ <value name="cs" value="0x0010"/>
+ <value name="scan_channel" value="0x0020"/>
+ <value name="short_preamble" value="0x0040"/>
+ <value name="disable_scrambler" value="0x0080"/>
+ <value name="ldpc" value="0x0100"/>
+ <value name="stbc" value="0x0200"/>
+ <value name="disable_spreader" value="0x0400"/>
+ <value name="greenfield_preamble" value="0x0800"/>
+ <value name="rx_low_power" value="0x1000"/>
+ <value name="ibss_frames" value="0x2000"/>
+ <!-- Setting the 'beamforming' flag will automaticaly set the 'ibss_frames' flag too,
+ as we need to specify MAC addresses. -->
+ <value name="beamforming" value="0x4000"/>
+ <value name="disable_external_lna" value="0x8000"/>
+ </type>
+ <type flags="true" name="Tx_Set_Params_Flags2" resource="TYPE" size="16">
+ <!-- enums are limited to 16 bits, so we use a 2nd flag field -->
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ </type>
+ <type name="Type_Of_Air_Power" resource="TYPE" size="8" subsidiary="true">
+ <!-- Form of air power. This definition must be the same as the Air_Power_Type in station_types.xml -->
+ <value name="eirp" value="0x00"/>
+ <value name="tpo" value="0x01"/>
+ <value name="raw" value="0x02"/>
+ </type>
+ <type name="Usage" resource="TYPE" size="1" subsidiary="true">
+ <value name="Use" value="0x1"/>
+ <value name="No_Use" value="0x0"/>
+ </type>
+ <type name="VIF_Index" resource="TYPE" size="16"/>
+ <type name="VIF_Range" resource="TYPE" size="16">
+ <value name="VIF_Index_Min" value="0x0001"/>
+ <value name="VIF_Index_Max" value="0x000f"/>
+ </type>
+ <type name="VIF_Type" resource="TYPE" size="16">
+ <value name="Unsynchronised" value="0x0000"/>
+ <value name="Station" value="0x0002"/>
+ <value name="AP" value="0x0003"/>
+ <value name="Wlanlite" value="0x0004"/>
+ <value name="NAN" value="0x0005"/>
+ <value name="Discovery" value="0x0006"/>
+ <value name="Preconnect" value="0x0007"/>
+ <value name="Monitor" value="0x0010"/>
+ <!-- FW internal values -->
+ <value name="Scan" value="0x0020"/>
+ <value name="Offchannel" value="0x0021"/>
+ <value name="Range" value="0x0022"/>
+ </type>
+ <type dvalue="WLANLITE_CW_START.confirm" name="WLANLITE_CW_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_START.request" name="WLANLITE_CW_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="power">
+ <!-- Type of power and also the power in quarter dBm -->
+ <type>Air_Power</type>
+ </field>
+ <field name="flags">
+ <type>CW_Start_Flags</type>
+ </field>
+ <field name="type">
+ <type>CW_Type</type>
+ </field>
+ <field name="amplitude">
+ <type>uint16</type>
+ </field>
+ <field name="freq1">
+ <!-- Frequency offset in kHz(range +/-80000)-->
+ <type>int32</type>
+ </field>
+ <field name="freq2">
+ <!-- Frequency offset in kHz(range +/-80000)-->
+ <type>int32</type>
+ </field>
+ <field name="phase">
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_STOP.confirm" name="WLANLITE_CW_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_STOP.request" name="WLANLITE_CW_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RADIO_SELECT.confirm" name="WLANLITE_RADIO_SELECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RADIO_SELECT.request" name="WLANLITE_RADIO_SELECT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Radio_Bitmap">
+ <type>Radio_Bitmap</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_READ.confirm" name="WLANLITE_RX_READ.confirm" resource="SIGNAL">
+ <field bulktype="Counters_List" name="Counters_Data_Ref">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- Misc values read. (The rate counters are put in the bulk data due to size) -->
+ <field name="freq_offset_cur">
+ <type>int32</type>
+ </field>
+ <field name="freq_offset_avg">
+ <type>int32</type>
+ </field>
+ <field name="rssi_cur">
+ <type>int16</type>
+ </field>
+ <field name="rssi_avg">
+ <type>int16</type>
+ </field>
+ <field name="rssi_min">
+ <type>int16</type>
+ </field>
+ <field name="rssi_max">
+ <type>int16</type>
+ </field>
+ <field name="snr_cur">
+ <type>int16</type>
+ </field>
+ <field name="snr_avg">
+ <type>int16</type>
+ </field>
+ <field name="snr_min">
+ <type>int16</type>
+ </field>
+ <field name="snr_max">
+ <type>int16</type>
+ </field>
+ <field name="interval">
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_READ.request" name="WLANLITE_RX_READ.request" resource="SIGNAL">
+ <field bulktype="Rates_List" name="Rates_Data_Ref">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Rates to request counts for are held in bulk data due to size -->
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_START.confirm" name="WLANLITE_RX_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_START.request" name="WLANLITE_RX_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="channel_information">
+ <type>Channel_Info</type>
+ </field>
+ <field name="flags">
+ <type>Rx_Start_Flags</type>
+ </field>
+ <field name="mac_addr">
+ <!-- Defines the station MAC address. If the filtering flag is set,
+ unicast frames will be discarded if they don't match this address -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="0xfebefebefebe" name="bssid" suppress="true">
+ <!-- Only used if 'beamforming' flag set -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="1" name="aid" suppress="true">
+ <!-- Association ID, only used if 'beamforming' flag set -->
+ <type>uint16</type>
+ </field>
+ <field default="0" name="num_mpdus_per_ampdu" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field default="2" name="regulatory_domain" suppress="true">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_STOP.confirm" name="WLANLITE_RX_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_STOP.request" name="WLANLITE_RX_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_STATUS.confirm" name="WLANLITE_STATUS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Device_State">
+ <type>Device_State</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_STATUS.request" name="WLANLITE_STATUS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_READ.confirm" name="WLANLITE_TX_READ.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- data read -->
+ <field name="flags">
+ <type>Tx_Read_Flags</type>
+ </field>
+ <field name="ctr_frames_left_to_send">
+ <!-- Valid only if 'frame_counting' flag set -->
+ <type>uint32</type>
+ </field>
+ <field name="transmission_back_off">
+ <!-- Accumulated backoff time in microseconds since last read -->
+ <type>uint32</type>
+ </field>
+ <field name="wanted_power_target">
+ <type>Raw_Power</type>
+ </field>
+ <field name="final_power_target">
+ <type>Raw_Power</type>
+ </field>
+ <field name="oob_constraint">
+ <type>Raw_Power</type>
+ </field>
+ <field name="last_trim_pa_temperature">
+ <type>int16</type>
+ </field>
+ <field name="current_pa_temperature">
+ <type>int16</type>
+ </field>
+ <field name="last_trim_ambient_temperature">
+ <type>int16</type>
+ </field>
+ <field name="current_ambient_temperature">
+ <type>int16</type>
+ </field>
+ <field name="temp_power_adjust">
+ <type>Raw_Power</type>
+ </field>
+ <field name="ctr_frames_success">
+ <!-- Indicates number of frames successfully transmitted.
+ For unicast MPDUs with ack, indicates number of
+ frames that have been acked. -->
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_READ.request" name="WLANLITE_TX_READ.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_SET_PARAMS.confirm" name="WLANLITE_TX_SET_PARAMS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_SET_PARAMS.request" name="WLANLITE_TX_SET_PARAMS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Separate from tx_start to allow key settings to be changed whilst the radio is switched on -->
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="rate">
+ <type>Data_Rate</type>
+ </field>
+ <field name="channel_information">
+ <type>Channel_Info</type>
+ </field>
+ <field name="power">
+ <!-- Type of power and also the power in quarter dBm -->
+ <type>Air_Power</type>
+ </field>
+ <field name="length">
+ <!-- If 'ibss_frames' or 'beamforming' flags are set, specifies the payload length
+ in bytes. If a flag is not set, specifies the frame length in bytes not counting FCS. -->
+ <type>uint16</type>
+ </field>
+ <field name="interval">
+ <!-- Interval between adding an entry to the transmit queue in microseconds -->
+ <type>uint32</type>
+ </field>
+ <field name="flags">
+ <type>Tx_Set_Params_Flags</type>
+ </field>
+ <field default="1" name="aid" suppress="true">
+ <!-- Association ID, only used if 'beamforming' flag set -->
+ <type>uint16</type>
+ </field>
+ <field default="0x00ff" name="distance_to_band_edge_half_mhz" suppress="true">
+ <!-- This parameter is no longer supported -->
+ <type>uint16</type>
+ </field>
+ <field default="2" name="regulatory_domain" suppress="true">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field default="0" name="flags2" suppress="true">
+ <type>Tx_Set_Params_Flags2</type>
+ </field>
+ <field default="0" name="he_mode" suppress="true">
+ <type>Tx_HE_Mode</type>
+ </field>
+ <field default="0" name="he_ru_allocation" suppress="true">
+ <!-- Applies to non-triggered multi-user(HE_MU) mode only.
+ Bits 0 to 6 specify the Resouce Unit(RU) allocation, as per a trigger frame.
+ Bit 7 specifies the 80 MHz channel(0 = primary, 1 = secondary) and applies
+ to 80+80/160 MHz channels only. -->
+ <type>uint8</type>
+ </field>
+ <field default="0" name="he_ltf" suppress="true">
+ <!-- Specifies the HE-LTF type(0 = auto select, 1 = x1, 2 = x2 and 4 = x4)
+ Note, only certain combinations of GI and HE-LTF are valid for a given HE mode. -->
+ <type>uint8</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_START.confirm" name="WLANLITE_TX_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_START.request" name="WLANLITE_TX_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="num_frames_to_send">
+ <type>uint32</type>
+ </field>
+ <field name="data_type">
+ <type>Tx_Data_Type</type>
+ </field>
+ <field name="data_param">
+ <type>uint16</type>
+ </field>
+ <field name="dest_addr">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field name="src_addr">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field name="bssid">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="0" name="num_mpdus_per_ampdu" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_STOP.confirm" name="WLANLITE_TX_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_STOP.request" name="WLANLITE_TX_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="Zero_Bit" resource="TYPE" size="1" subsidiary="true"/>
+ <type name="ePNO_Policy" resource="TYPE" size="16">
+ <value name="Hidden" value="0x0001"/>
+ <value name="A_Band" value="0x0002"/>
+ <value name="G_Band" value="0x0004"/>
+ <value name="Strict_Match" value="0x0008"/>
+ <value name="Same_Network" value="0x0010"/>
+ <value name="Auth_Open" value="0x0100"/>
+ <value name="Auth_PSK" value="0x0200"/>
+ <value name="Auth_EAPOL" value="0x0400"/>
+ </type>
+ <type name="hipVersions" resource="CONST" size="16">
+ <value name="TEST_SAP_VERSION" value="0x0e00"/>
+ <value name="TEST_SAP_ENG_VERSION" value="0x0013"/>
+ <value name="DATA_SAP_VERSION" value="0x0e01"/>
+ <value name="DATA_SAP_ENG_VERSION" value="0x0001"/>
+ <value name="DEBUG_SAP_VERSION" value="0x0d03"/>
+ <value name="DEBUG_SAP_ENG_VERSION" value="0x0001"/>
+ <value name="CONTROL_SAP_VERSION" value="0x0e03"/>
+ <value name="CONTROL_SAP_ENG_VERSION" value="0x000a"/>
+ </type>
+ <type name="int16" resource="TYPE" signed="true" size="16"/>
+ <type name="int32" resource="TYPE" signed="true" size="32"/>
+ <type name="uint16" resource="TYPE" size="16"/>
+ <type name="uint32" resource="TYPE" size="32"/>
+ <type name="uint8" resource="TYPE" size="8"/>
+</definitions>
--- /dev/null
+2019-11-29 11:50 lemandXXdXX_imm_hardmac_ram_gcc_integrated univ3 498054416 adm-swbld@camspugrd169@e89799f1c2@HEAD (no branch)
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>
+<metadata_list xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="HydraMeta.xsd">
+ <metadata version="498054416" subsystem_name="wlan" subsystem_layer="fw" subsystem_id="2">
+ <source_control id="$Id$" time="$DateTime$" change="$Change$" author="$Author$" />
+ <enum_def enum_name="unifiCSROnlyMIBShield">
+ <enum_entry enum_label="open" enum_value="1" />
+ <enum_entry enum_label="warn" enum_value="2" />
+ <enum_entry enum_label="guard" enum_value="3" />
+ <enum_entry enum_label="alarm" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiExternalFastClockRequest">
+ <enum_entry enum_label="no_clock_request" enum_value="0" />
+ <enum_entry enum_label="totem_pole" enum_value="1" />
+ <enum_entry enum_label="inverted_totem_pole" enum_value="2" />
+ <enum_entry enum_label="open_drain" enum_value="3" />
+ <enum_entry enum_label="open_source" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiMLMEFaultReportLevel">
+ <enum_entry enum_label="none" enum_value="0" />
+ <enum_entry enum_label="detailed" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakeMode">
+ <enum_entry enum_label="wake_none" enum_value="1" />
+ <enum_entry enum_label="wake_pulse" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakePolarity">
+ <enum_entry enum_label="positive" enum_value="0" />
+ <enum_entry enum_label="negative" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakeZeal">
+ <enum_entry enum_label="wake_normal" enum_value="0" />
+ <enum_entry enum_label="wake_always" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiUartPios">
+ <enum_entry enum_label="no_pios" enum_value="1" />
+ <enum_entry enum_label="tx_rx_only" enum_value="2" />
+ <enum_entry enum_label="tx_rx_rts_cts" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRateStatsIndex">
+ <enum_entry enum_label="rate_1m" enum_value="1" />
+ <enum_entry enum_label="rate_2m" enum_value="2" />
+ <enum_entry enum_label="rate_5m5" enum_value="3" />
+ <enum_entry enum_label="rate_6m" enum_value="4" />
+ <enum_entry enum_label="rate_9m" enum_value="5" />
+ <enum_entry enum_label="rate_11m" enum_value="6" />
+ <enum_entry enum_label="rate_12m" enum_value="7" />
+ <enum_entry enum_label="rate_18m" enum_value="8" />
+ <enum_entry enum_label="rate_24m" enum_value="9" />
+ <enum_entry enum_label="rate_36m" enum_value="10" />
+ <enum_entry enum_label="rate_48m" enum_value="11" />
+ <enum_entry enum_label="rate_54m" enum_value="12" />
+ </enum_def>
+ <enum_def enum_name="unifiThroughputDebugIndex">
+ <enum_entry enum_label="no_ack_count" enum_value="1" />
+ <enum_entry enum_label="good_fcs_count" enum_value="2" />
+ <enum_entry enum_label="bad_fcs_count" enum_value="3" />
+ <enum_entry enum_label="missed_ba_count" enum_value="4" />
+ <enum_entry enum_label="missed_ack_count" enum_value="5" />
+ <enum_entry enum_label="ba_agg_below_quarter" enum_value="6" />
+ <enum_entry enum_label="ba_agg_above_quarter" enum_value="7" />
+ <enum_entry enum_label="mpdus_total_transmitted_on_air" enum_value="8" />
+ <enum_entry enum_label="mpdus_successfully_transmitted" enum_value="9" />
+ <enum_entry enum_label="mpdus_failed_transmit" enum_value="10" />
+ <enum_entry enum_label="laa_rate_decrease_counter" enum_value="11" />
+ <enum_entry enum_label="laa_rate_increase_counter" enum_value="12" />
+ <enum_entry enum_label="dplane_paused_counter" enum_value="13" />
+ <enum_entry enum_label="dplane_resumed_counter" enum_value="14" />
+ <enum_entry enum_label="rf_on_counter" enum_value="15" />
+ <enum_entry enum_label="rf_off_counter" enum_value="16" />
+ <enum_entry enum_label="dplp_free_resources_cb_counter" enum_value="17" />
+ <enum_entry enum_label="lowest_fh_resources" enum_value="18" />
+ <enum_entry enum_label="highest_th_resources" enum_value="19" />
+ <enum_entry enum_label="scan_started_counter" enum_value="20" />
+ <enum_entry enum_label="outstanding_fh_mbulk" enum_value="21" />
+ <enum_entry enum_label="outstanding_th_mbulk" enum_value="22" />
+ <enum_entry enum_label="cpu_usage" enum_value="23" />
+ <enum_entry enum_label="coex_collisions" enum_value="24" />
+ <enum_entry enum_label="mac_bad_sig_count" enum_value="25" />
+ <enum_entry enum_label="tx_under_flow" enum_value="26" />
+ <enum_entry enum_label="change_power_req_count" enum_value="27" />
+ <enum_entry enum_label="rx_mpdus_in_ampdus" enum_value="28" />
+ <enum_entry enum_label="rx_mpdus" enum_value="29" />
+ <enum_entry enum_label="rx_error_count" enum_value="30" />
+ <enum_entry enum_label="rx_ampdus" enum_value="31" />
+ <enum_entry enum_label="protection_error_count" enum_value="32" />
+ <enum_entry enum_label="ba_missed_cts_count" enum_value="33" />
+ <enum_entry enum_label="ppdu_tx" enum_value="34" />
+ <enum_entry enum_label="ba_received" enum_value="35" />
+ <enum_entry enum_label="ba_timeout" enum_value="36" />
+ <enum_entry enum_label="ba_aggregation_below_bursting" enum_value="37" />
+ <enum_entry enum_label="ba_aggregation_above_bursting" enum_value="38" />
+ <enum_entry enum_label="ba_aggregation_cannot_burst" enum_value="39" />
+ <enum_entry enum_label="ba_aggregation_can_burst" enum_value="40" />
+ <enum_entry enum_label="nanny_retrim_request_count" enum_value="41" />
+ <enum_entry enum_label="rx_ppdus_mu" enum_value="42" />
+ <enum_entry enum_label="rx_ppdus_su" enum_value="43" />
+ <enum_entry enum_label="ba_received_prot" enum_value="44" />
+ <enum_entry enum_label="ba_received_noprot" enum_value="45" />
+ <enum_entry enum_label="ba_missing_prot" enum_value="46" />
+ <enum_entry enum_label="ba_missing_noprot" enum_value="47" />
+ <enum_entry enum_label="mpdu_succ_prot" enum_value="48" />
+ <enum_entry enum_label="mpdu_succ_noprot" enum_value="49" />
+ <enum_entry enum_label="mpdu_fail_prot" enum_value="50" />
+ <enum_entry enum_label="mpdu_fail_noprot" enum_value="51" />
+ <enum_entry enum_label="mpdus_in_ampdus" enum_value="52" />
+ <!-- throughput_debug_index_last SHOULD be the last, and have same value as the last one above. -->
+ <enum_entry enum_label="throughput_debug_index_last" enum_value="52" />
+ </enum_def>
+ <enum_def enum_name="unifiReadHardwareCounterIndex">
+ <enum_entry enum_label="MAC_DOT11_FCS_ERROR_COUNT" enum_value="1" />
+ <enum_entry enum_label="MAC_DOT11_FCS_GOOD_COUNT" enum_value="2" />
+ <enum_entry enum_label="MAC_BAD_SIG_COUNT" enum_value="3" />
+ <enum_entry enum_label="MAC_TX_UNDER_COUNT" enum_value="4" />
+ <enum_entry enum_label="MAC_NO_ACK_COUNT" enum_value="5" />
+ <enum_entry enum_label="MAC_DOT11_RX_OCTETS_IN_AMPDUS" enum_value="6" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDUS_COUNT" enum_value="7" />
+ <enum_entry enum_label="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT" enum_value="8" />
+ <!-- MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT exists only on Night and Sockeye. -->
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT" enum_value="9" />
+ <!-- MAC_DOT11_ERROR_COUNT exists only on Sockeye and Rock. -->
+ <enum_entry enum_label="MAC_DOT11_ERROR_COUNT" enum_value="10" />
+ <!-- MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT, MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT
+ and MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT exist only on Rock. -->
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT" enum_value="11" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT" enum_value="12" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT" enum_value="13" />
+ <enum_entry enum_label="dphp_mac_acc_off" enum_value="14" />
+ <enum_entry enum_label="dphp_dynamic_restart" enum_value="15" />
+ <!-- lower_mac_index_last SHOULD be the last, and have same value as the last one above. -->
+ <enum_entry enum_label="lower_mac_index_last" enum_value="15" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioTXSettingsIndex">
+ <enum_entry enum_label="OFDM0_PRE_GAIN" enum_value="1" />
+ <enum_entry enum_label="OFDM1_PRE_GAIN" enum_value="2" />
+ <enum_entry enum_label="CCK_PRE_GAIN" enum_value="3" />
+ <enum_entry enum_label="TR_PRE_GAIN" enum_value="4" />
+ <enum_entry enum_label="OFDM0_FIR_GAIN" enum_value="5" />
+ <enum_entry enum_label="OFDM1_FIR_GAIN" enum_value="6" />
+ <enum_entry enum_label="CCK_FIR_GAIN" enum_value="7" />
+ <enum_entry enum_label="OFDM0_FW_BK_DELAY" enum_value="8" />
+ <enum_entry enum_label="OFDM0_RX_BB1" enum_value="9" />
+ <enum_entry enum_label="OFDM0_RX_BB2" enum_value="10" />
+ <enum_entry enum_label="LOOPBACK_ATTEN" enum_value="11" />
+ <enum_entry enum_label="OFDM0_FIR_COEFF" enum_value="12" />
+ <enum_entry enum_label="DRV_BIAS" enum_value="13" />
+ <enum_entry enum_label="PA_BIAS" enum_value="14" />
+ <enum_entry enum_label="CCK_V2I_GAIN" enum_value="15" />
+ <enum_entry enum_label="CCK_DRV_GAIN" enum_value="16" />
+ <enum_entry enum_label="CCK_MIX_GAIN" enum_value="17" />
+ <enum_entry enum_label="CCK_PA_GAIN" enum_value="18" />
+ <enum_entry enum_label="OFDM0_V2I_GAIN" enum_value="19" />
+ <enum_entry enum_label="OFDM0_DRV_GAIN" enum_value="20" />
+ <enum_entry enum_label="OFDM0_MIX_GAIN" enum_value="21" />
+ <enum_entry enum_label="OFDM0_PA_GAIN" enum_value="22" />
+ <enum_entry enum_label="OFDM1_V2I_GAIN" enum_value="23" />
+ <enum_entry enum_label="OFDM1_DRV_GAIN" enum_value="24" />
+ <enum_entry enum_label="OFDM1_MIX_GAIN" enum_value="25" />
+ <enum_entry enum_label="OFDM1_PA_GAIN" enum_value="26" />
+ <enum_entry enum_label="PAPR_EN" enum_value="27" />
+ <enum_entry enum_label="PAPR_THRESHOLD" enum_value="28" />
+ <enum_entry enum_label="MIX_FTRIM" enum_value="29" />
+ <enum_entry enum_label="DRV_FTRIM" enum_value="30" />
+ <enum_entry enum_label="PA_FTRIM" enum_value="31" />
+ <enum_entry enum_label="CCK_V2I_DCTRIM_I" enum_value="32" />
+ <enum_entry enum_label="CCK_V2I_DCTRIM_Q" enum_value="33" />
+ <enum_entry enum_label="OFDM0_V2I_DCTRIM_I" enum_value="34" />
+ <enum_entry enum_label="OFDM0_V2I_DCTRIM_Q" enum_value="35" />
+ <enum_entry enum_label="OFDM1_V2I_DCTRIM_I" enum_value="36" />
+ <enum_entry enum_label="OFDM1_V2I_DCTRIM_Q" enum_value="37" />
+ <enum_entry enum_label="MIX_DCTRIM_I" enum_value="38" />
+ <enum_entry enum_label="MIX_DCTRIM_Q" enum_value="39" />
+ <enum_entry enum_label="IMAGE_SCALE_I" enum_value="40" />
+ <enum_entry enum_label="IMAGE_SCALE_Q" enum_value="41" />
+ <enum_entry enum_label="IMAGE_PHASE_COMP" enum_value="42" />
+ <enum_entry enum_label="FREQ" enum_value="43" />
+ <enum_entry enum_label="BW" enum_value="44" />
+ <enum_entry enum_label="MODE" enum_value="45" />
+ <enum_entry enum_label="IS_SCAN" enum_value="46" />
+ <enum_entry enum_label="OFDM1_V2I_CARRIER_LEAKAGE_SA" enum_value="47" />
+ <enum_entry enum_label="OFDM0_ADAPT_QUALITY" enum_value="48" />
+ <enum_entry enum_label="OFDM1_ADAPT_QUALITY" enum_value="49" />
+ <enum_entry enum_label="CCK_ADAPT_QUALITY" enum_value="50" />
+ <!--><enum_entry enum_label="TR_ADAPT_QUALITY" enum_value="51" /><-->
+ <enum_entry enum_label="IMAGE_SCALE_SA" enum_value="52" />
+ <enum_entry enum_label="OFDM1_RX_BB1" enum_value="53" />
+ <enum_entry enum_label="OFDM1_RX_BB2" enum_value="54" />
+ <enum_entry enum_label="CCK_RX_BB1" enum_value="55" />
+ <enum_entry enum_label="CCK_RX_BB2" enum_value="56" />
+ <enum_entry enum_label="OFDM1_FW_BK_DELAY" enum_value="57" />
+ <enum_entry enum_label="CCK_FW_BK_DELAY" enum_value="58" />
+ <enum_entry enum_label="OFDM1_FIR_COEFF" enum_value="59" />
+ <enum_entry enum_label="CCK_FIR_COEFF" enum_value="60" />
+ <enum_entry enum_label="OFDM0_LOOPBACK_PHASE" enum_value="61" />
+ <enum_entry enum_label="OFDM1_LOOPBACK_PHASE" enum_value="62" />
+ <enum_entry enum_label="CCK_LOOPBACK_PHASE" enum_value="63" />
+ <enum_entry enum_label="TX_IQ_DELAY" enum_value="64" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioRXSettingsIndex">
+ <enum_entry enum_label="WL_RADIO_CHANNEL_STATUS" enum_value="1" />
+ <enum_entry enum_label="RX_DC_ADJUST" enum_value="2" />
+ <enum_entry enum_label="FD_RX_COMP" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioCCADebugTableIndex">
+ <enum_entry enum_label="GAIN_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="1" />
+ <enum_entry enum_label="RSSI_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="2" />
+ <enum_entry enum_label="GAIN_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="3" />
+ <enum_entry enum_label="RSSI_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="4" />
+ <enum_entry enum_label="GAIN_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="5" />
+ <enum_entry enum_label="RSSI_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="6" />
+ <enum_entry enum_label="GAIN_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="7" />
+ <enum_entry enum_label="RSSI_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="8" />
+ </enum_def>
+ <enum_def enum_name="unifiNarrowbandCCADebugTableIndex">
+ <enum_entry enum_label="CS_MODE" enum_value="1" />
+ <enum_entry enum_label="PRI_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="2" />
+ <enum_entry enum_label="SEC_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="3" />
+ <enum_entry enum_label="PRI_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="4" />
+ <enum_entry enum_label="SEC_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="5" />
+ <enum_entry enum_label="PRI_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="6" />
+ <enum_entry enum_label="SEC_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="7" />
+ <enum_entry enum_label="PRI_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="8" />
+ <enum_entry enum_label="SEC_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="9" />
+ </enum_def>
+ <enum_def enum_name="unifiEnabledTrims">
+ <enum_entry enum_label="TRIM_RX_ABB" enum_value="0x000000001" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_TX_ABB" enum_value="0x000000002" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_WBRSSI" enum_value="0x000000004" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_RX_ABB_80" enum_value="0x000000008" /> <!-- not used -->
+ <enum_entry enum_label="TRIM_RX_DC_QUICK" enum_value="0x000000010" />
+ <enum_entry enum_label="TRIM_RX_DC" enum_value="0x000000020" />
+ <enum_entry enum_label="TRIM_TX_DCO_PCAL" enum_value="0x000000040" />
+ <enum_entry enum_label="TRIM_TX_POWER" enum_value="0x000000080" />
+ <enum_entry enum_label="TRIM_TX_CARRIER_IMG" enum_value="0x000000100" />
+ <!--enum_entry enum_label="" enum_value="0x000000200" /-->
+ <!--enum_entry enum_label="" enum_value="0x000000400" /-->
+ <enum_entry enum_label="TRIM_TX_DPD" enum_value="0x000000800" />
+ <enum_entry enum_label="TRIM_RX_IQ_COMP" enum_value="0x000001000" /> <!-- Leman + S620 D01 onwards -->
+ </enum_def>
+ <enum_def enum_name="unifiAccessClassIndex">
+ <enum_entry enum_label="AC_BK" enum_value="1" />
+ <enum_entry enum_label="AC_BE" enum_value="2" />
+ <enum_entry enum_label="AC_VI" enum_value="3" />
+ <enum_entry enum_label="AC_VO" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiHardwarePlatform">
+ <enum_entry enum_label="PLATFORM_NOT_SET" enum_value ="0" />
+ <enum_entry enum_label="T20" enum_value="2" />
+ <enum_entry enum_label="LASSEN_SMDK" enum_value="17" />
+ <enum_entry enum_label="LEMAN_S620_SMDK" enum_value="18" />
+ <enum_entry enum_label="LASSEN_UNIV" enum_value="19" />
+ <enum_entry enum_label="LEMAN_S612_SMDK" enum_value="21" />
+ <enum_entry enum_label="LASSEN_A5_REV02_2017_07" enum_value="23" />
+ <enum_entry enum_label="LASSEN_A7_REV01_2017_07" enum_value="24" />
+ <enum_entry enum_label="LASSEN_J3NEO_2017_08" enum_value="25" />
+ <enum_entry enum_label="LASSEN_J3TOP" enum_value="26" />
+ <enum_entry enum_label="LASSEN_J7TOP" enum_value="27" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO" enum_value="28" />
+ <enum_entry enum_label="LEMAN_S620_UNIV" enum_value="31" />
+ <enum_entry enum_label="LASSEN_A530D" enum_value="33" />
+ <enum_entry enum_label="LEMAN_S620_WING_DUALFEM" enum_value="35" />
+ <enum_entry enum_label="LASSEN_A6_SMA600_2018_04" enum_value="36" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO_SISO" enum_value="39" />
+ <enum_entry enum_label="LEMAN_S620_ROBUSTA2_DUALFEM" enum_value="40" />
+ <enum_entry enum_label="LEMAN_S620_ROBUSTA2_NOFEM" enum_value="41" />
+ <enum_entry enum_label="LEMAN_S620_A50" enum_value="43" />
+ <enum_entry enum_label="LEMAN_S620_A50_DUALFEM" enum_value="44" />
+ <enum_entry enum_label="LEMAN_S620_TROIKA_DUALFEM" enum_value="45" />
+ <enum_entry enum_label="LEMAN_S620_A50_MIMO" enum_value="46" />
+ <enum_entry enum_label="NACHO_S612_SMDK" enum_value="47" />
+ <enum_entry enum_label="NEUS_S620_SMDK" enum_value="48" />
+ <enum_entry enum_label="NEUS_S621_SMDK" enum_value="49" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO_VOLCANO" enum_value="50" />
+ <enum_entry enum_label="LEMAN_S620_A505Y" enum_value="51" />
+ <enum_entry enum_label="LEMAN_S620_A505N_DUALFEM" enum_value="52" />
+ <enum_entry enum_label="LEMAN_S620_FLEXI" enum_value="53" />
+ <enum_entry enum_label="LEMAN_S620_SHINE_F9T_DUALFEM" enum_value="54" />
+ <enum_entry enum_label="LEMAN_S620_M307F" enum_value="55" />
+ <enum_entry enum_label="LEMAN_S620_V_TD1904_DUALFEM" enum_value="56" />
+ <enum_entry enum_label="NEUS_S620_ERD" enum_value="57" />
+ <enum_entry enum_label="NEUS_S620_V_TD1905_DUALFEM" enum_value="58" />
+ <enum_entry enum_label="LEMAN_S620_A507FN_DUALFEM" enum_value="59" />
+ <enum_entry enum_label="NEUS_S620_L_RACER_DUALFEM" enum_value="61" />
+ <enum_entry enum_label="NEUS_S620_ERD_REV0" enum_value="62" />
+ <enum_entry enum_label="LEMAN_S620_A515FM" enum_value="63" />
+ <enum_entry enum_label="NACHO_S612_ERD" enum_value="64" />
+ <enum_entry enum_label="NEUS_S620_A71" enum_value="65" />
+ <enum_entry enum_label="NEUS_S620_ERD_VOLCANO" enum_value="66" />
+ <enum_entry enum_label="NEUS_S620_V_TD1905_DUALFEMSKY" enum_value="67" />
+ <enum_entry enum_label="NEUS_S620_A71_PRE" enum_value="68" />
+ <enum_entry enum_label="NACHO_S612_A31_UNIV" enum_value="69" />
+ <enum_entry enum_label="NACHO_S612_A31" enum_value="70" />
+ <enum_entry enum_label="LASSEN_A305FN_GLOBAL" enum_value="71" />
+ <enum_entry enum_label="NEUS_S620_ERD_VOLCANO_SISO" enum_value="72" />
+ <enum_entry enum_label="NEUS_S620_V_PD1938_DUALFEM" enum_value="73" />
+ <enum_entry enum_label="NEUS_S620_V_PD1949_DUALFEM" enum_value="74" />
+ <enum_entry enum_label="LASSEN_TAB_A4_S_2019_09" enum_value="75" />
+ <enum_entry enum_label="NEUS_S621_ERD_DUALFEM" enum_value="76" />
+ <enum_entry enum_label="NEUS_S621_ERD_DUALSWITCH" enum_value="77" />
+ <enum_entry enum_label="LEMAN_S620_G715FN_DUALFEM" enum_value="78" />
+ <enum_entry enum_label="LEMAN_S620_A515U_DUALFEM" enum_value="79" />
+ <enum_entry enum_label="LEMAN_S620_P615_MIMO" enum_value="80" />
+ <enum_entry enum_label="NEUS_S620_A716U_DUALFEM" enum_value="81" />
+ <enum_entry enum_label="LEMAN_S620_G715U_DUALFEM" enum_value="82" />
+ </enum_def>
+ <enum_def enum_name="unifiDebugModulesIndex">
+ <!-- MODULE_IDS_RESERVED is used to tell apart compressed debug words. -->
+ <enum_entry enum_label="MODULE_IDS_COMPRESSED_DEBUG" enum_value="0" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SCAN" enum_value="1" />
+ <enum_entry enum_label="MODULE_IDS_FAULTS" enum_value="2" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CME" enum_value="3" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CONMGR" enum_value="4" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MIB" enum_value="5" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MPDU_ROUTER" enum_value="6" />
+ <enum_entry enum_label="MODULE_IDS_MLME_REQUESTS" enum_value="7" />
+ <enum_entry enum_label="MODULE_IDS_MLME_VIFCTRL" enum_value="8" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CONNECT" enum_value="9" />
+ <enum_entry enum_label="MODULE_IDS_MLME_DEVICE" enum_value="10" />
+ <enum_entry enum_label="MODULE_IDS_RICE" enum_value="11" />
+ <enum_entry enum_label="MODULE_IDS_RICE_SAP" enum_value="12" />
+ <enum_entry enum_label="MODULE_IDS_WLANLITE" enum_value="13" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_SCHDL" enum_value="14" />
+ <enum_entry enum_label="MODULE_IDS_PMALLOC" enum_value="15" />
+ <enum_entry enum_label="MODULE_IDS_CME_MGMT" enum_value="16" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_DPLANE" enum_value="17" />
+ <enum_entry enum_label="MODULE_IDS_MLME_BA" enum_value="18" />
+ <enum_entry enum_label="MODULE_IDS_MLME_DEPRECATED" enum_value="19" />
+ <enum_entry enum_label="MODULE_IDS_MLME_AP" enum_value="20" />
+ <enum_entry enum_label="MODULE_IDS_MLME_REGULATORY" enum_value="21" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NAN" enum_value="22" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO" enum_value="23" />
+ <enum_entry enum_label="MODULE_IDS_MLME_ROAMING" enum_value="24" />
+ <enum_entry enum_label="MODULE_IDS_DATAPLANE" enum_value="25" />
+ <enum_entry enum_label="MODULE_IDS_VACANT1" enum_value="26" />
+ <enum_entry enum_label="MODULE_IDS_VACANT2" enum_value="27" />
+ <enum_entry enum_label="MODULE_IDS_CRYPTO" enum_value="28" />
+ <!-- COEX Note: DEBUG_COEX level should NOT exceed level 3 COEX task deinit has debugs defined at lvl4 which is aimed for Software testing (SWAT) only -->
+ <enum_entry enum_label="MODULE_IDS_COEX" enum_value="29" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_PS" enum_value="30" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_BLACKOUT" enum_value="31" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SA_QUERY" enum_value="32" />
+ <enum_entry enum_label="MODULE_IDS_MLME_OFFCHANNEL" enum_value="33" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MEASUREMENTS" enum_value="34" />
+ <enum_entry enum_label="MODULE_IDS_MLME_TDLS" enum_value="35" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_BEACON" enum_value="36" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_VIF" enum_value="37" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_OXYGEN" enum_value="38" /> <!-- DEPRECATED -->
+ <enum_entry enum_label="MODULE_IDS_MACRAME_CALIBRATION" enum_value="39" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME" enum_value="40" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_TX" enum_value="41" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_COEX" enum_value="42" />
+ <enum_entry enum_label="MODULE_IDS_MLME" enum_value="43" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_RADIO" enum_value="44" />
+ <enum_entry enum_label="MODULE_IDS_MIB" enum_value="45" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_FILTER" enum_value="46" />
+ <enum_entry enum_label="MODULE_IDS_HALMAC" enum_value="47" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_CORE" enum_value="48" />
+ <enum_entry enum_label="MODULE_IDS_RICE_RSSI" enum_value="49" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_MLME" enum_value="50" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_IDLE_AP" enum_value="51" />
+ <enum_entry enum_label="MODULE_IDS_MLME_API_MACRAME" enum_value="52" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SECURITY" enum_value="53" />
+ <enum_entry enum_label="MODULE_IDS_MLME_TXPOWER" enum_value="54" />
+ <enum_entry enum_label="MODULE_IDS_PACKET_FILTER" enum_value="55" />
+ <enum_entry enum_label="MODULE_IDS_MLME_WIFI_LOGGER" enum_value="56" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_STATION" enum_value="57" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_DPD" enum_value="58" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_POW" enum_value="59" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_IQ" enum_value="60" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_RX" enum_value="61" />
+ <enum_entry enum_label="MODULE_IDS_BIST" enum_value="62" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FRAME" enum_value="63" />
+ <enum_entry enum_label="MODULE_IDS_MLME_IE" enum_value="64" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_COEX_FEM" enum_value="65" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FTM" enum_value="66" />
+ <enum_entry enum_label="MODULE_IDS_SMAPPER" enum_value="67" />
+ <enum_entry enum_label="MODULE_IDS_MLME_API_DPLANE" enum_value="68" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FTM_RESP" enum_value="69" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SCAN_CHANNEL" enum_value="70" />
+ <enum_entry enum_label="MODULE_IDS_LMIF" enum_value="71" />
+ <enum_entry enum_label="MODULE_IDS_MLME_BASF" enum_value="72" />
+ <enum_entry enum_label="MODULE_IDS_APF" enum_value="73" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NDM" enum_value="74" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NAM" enum_value="75" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_IDLE_STA" enum_value="76" />
+ <enum_entry enum_label="MODULE_LAST_ID" enum_value="77" />
+ </enum_def>
+ <enum_def enum_name="unifiSubSystemsIndex">
+ <enum_entry enum_label="SUBSYSTEM_IDS_COEX" enum_value="1" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_COMMON" enum_value="2" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_DPLANE" enum_value="3" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_MACRAME" enum_value="4" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_MLME" enum_value="5" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_RADIO" enum_value="6" />
+ <enum_entry enum_label="SUBSYSTEM_LAST_ID" enum_value="7" />
+ </enum_def>
+ <enum_def enum_name="unifiBandTableIndex">
+ <enum_entry enum_label="BAND_2G" enum_value="1" />
+ <enum_entry enum_label="BAND_5G" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiBWTableIndex">
+ <enum_entry enum_label="BW20" enum_value="1" />
+ <enum_entry enum_label="BW40" enum_value="2" />
+ <enum_entry enum_label="BW80" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiSisoMimoTableIndex">
+ <enum_entry enum_label="SINGLE_RADIO" enum_value="1" />
+ <enum_entry enum_label="MIMO" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiDpdDebugTableIndex">
+ <enum_entry enum_label="LUT_QUALITY_THRESHOLD" enum_value="1" />
+ <enum_entry enum_label="LUT_RETRIM_LIMIT" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiMacBusyTimeTableIndex">
+ <enum_entry enum_label="PRI20" enum_value="1" />
+ <enum_entry enum_label="SEC20" enum_value="2" />
+ <enum_entry enum_label="SEC40" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamRssiFactorTableIndex">
+ <enum_entry enum_label="RSSI_NEG_55" enum_value="1" />
+ <enum_entry enum_label="RSSI_NEG_60" enum_value="2" />
+ <enum_entry enum_label="RSSI_NEG_70" enum_value="3" />
+ <enum_entry enum_label="RSSI_NEG_80" enum_value="4" />
+ <enum_entry enum_label="RSSI_NEG_90" enum_value="5" />
+ <enum_entry enum_label="RSSI_NEG_127" enum_value="6" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamCUFactorTableIndex">
+ <enum_entry enum_label="CU_LOW_2G" enum_value="1" />
+ <enum_entry enum_label="CU_MID_2G" enum_value="2" />
+ <enum_entry enum_label="CU_HIGH_2G" enum_value="3" />
+ <enum_entry enum_label="CU_LOW_5G" enum_value="4" />
+ <enum_entry enum_label="CU_MID_5G" enum_value="5" />
+ <enum_entry enum_label="CU_HIGH_5G" enum_value="6" />
+ </enum_def>
+ <enum_def enum_name="unifiWifiLogger">
+ <enum_entry enum_label="Disabled" enum_value="0" />
+ <enum_entry enum_label="Partial" enum_value="1" />
+ <enum_entry enum_label="Full" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiAntennaMode">
+ <enum_entry enum_label="SISO" enum_value="0" />
+ <enum_entry enum_label="MIMO_2x2" enum_value="1" />
+ <enum_entry enum_label="MIMO_3x3" enum_value="2" />
+ <enum_entry enum_label="MIMO_4x4" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamingAKM">
+ <enum_entry enum_label="AKM_None" enum_value="0" />
+ <enum_entry enum_label="AKM_OKC" enum_value="1" />
+ <enum_entry enum_label="AKM_FT_1X" enum_value="2" />
+ <enum_entry enum_label="AKM_PSK" enum_value="3" />
+ <enum_entry enum_label="AKM_FT_PSK" enum_value="4" />
+ <enum_entry enum_label="AKM_PMKSA_Caching" enum_value="5" />
+ <enum_entry enum_label="AKM_SAE" enum_value="6" />
+ <enum_entry enum_label="AKM_FT_SAE" enum_value="7" />
+ </enum_def>
+ <enum_def enum_name="unifiOperatingClassTableIndex">
+ <enum_entry enum_label="Operating_Class_Global" enum_value="1" />
+ <enum_entry enum_label="Operating_Class_Europe" enum_value="2" />
+ <enum_entry enum_label="Operating_Class_US" enum_value="3" />
+ <enum_entry enum_label="Operating_Class_Japan" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiTestTxPowerBitfield">
+ <enum_entry enum_label="TXPOWER_REGULATORY" enum_value="0x0001" />
+ <enum_entry enum_label="TXPOWER_USER" enum_value="0x0002" />
+ <enum_entry enum_label="TXPOWER_NETWORK" enum_value="0x0004" />
+ <enum_entry enum_label="TXPOWER_SAR" enum_value="0x0008" />
+ <enum_entry enum_label="TXPOWER_NOCELL" enum_value="0x0010" />
+ <enum_entry enum_label="TXPOWER_GRIP" enum_value="0x0020" />
+ <enum_entry enum_label="TXPOWER_TPC" enum_value="0x0040" />
+ <enum_entry enum_label="TXPOWER_LTE_COEX" enum_value="0x0080" />
+ <enum_entry enum_label="TXPOWER_RICE_MIN_POWER" enum_value="0x0100" />
+ <enum_entry enum_label="TXPOWER_RICE_MAX_POWER" enum_value="0x0200" />
+ </enum_def>
+ <enum_def enum_name="unifiLteSignalsBitField">
+ <enum_entry enum_label="MWS_STATUS" enum_value="0x00001" />
+ <enum_entry enum_label="MWS_FRAME_SYNC" enum_value="0x00002" />
+ <enum_entry enum_label="MWS_TX" enum_value="0x00004" />
+ <enum_entry enum_label="MWS_DRX" enum_value="0x00008" />
+ <enum_entry enum_label="MWS_TX_LEVEL" enum_value="0x00010" />
+ <enum_entry enum_label="MWS_RX_LEVEL" enum_value="0x00020" />
+ <enum_entry enum_label="MWS_MEASUREMENT_GAP" enum_value="0x00040" />
+ </enum_def>
+ <enum_def enum_name="unifiFrameTXCountersTableIndexEnum">
+ <!-- Index = 1 Tx Good Count - shall be incremented for each data and management packet successfully transmitted. -->
+ <!-- Index = 2 Tx Bad Count - shall be incremented for each data and management packet that fails due to either
+ Tx_lifetime, max_retry or unspecified failure -->
+ <!-- Index = 3 Tx Retry Count - shall be incremented for each data and management packet that is transmitted
+ successfully but retried at least once -->
+ <enum_entry enum_label="tx_good" enum_value="1" />
+ <enum_entry enum_label="tx_bad" enum_value="2" />
+ <enum_entry enum_label="tx_retry" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiFrameRXCountersTableIndexEnum">
+ <!-- Index = 1 Rx Good Count - shall be incremented for each data and management packet successfully received -->
+ <enum_entry enum_label="rx_good" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiModuleMemoryManagerFieldIndexEnum">
+ <enum_entry enum_label="priority" enum_value="1" />
+ <enum_entry enum_label="size" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiScanFlags">
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_EARLY_CHANNEL_EXIT" enum_value="0x0001" />
+ <enum_entry enum_label="SCAN_FLAG_DISABLE_SCAN" enum_value="0x0002" />
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_NCHO" enum_value="0x0004" />
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_MAC_RANDOMIZATION" enum_value="0x0008" />
+ </enum_def>
+ <config_element name="unifiConnectionTypeTableIndex" psid="0">
+ <description_user>Index by modulation, 11b, 11g, 11n, 11ac</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="unifiDefaultCountryIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index - To Be Removed when unifiDefaultCountry is split into two MIBs. </description_user>
+ </config_element>
+ <config_element name="unifiQueueStatsIndex" psid="0">
+ <type>integer</type>
+ <range_min>0</range_min><range_max>15</range_max>
+ <description_user>Index for unifiQueueStatsIdTable</description_user>
+ </config_element>
+ <config_element name="dot11RSNAConfigIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="dot11RSNAStatsIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>6</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBeamformingPhaseSTS" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiPrivateOnlyPatchIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRateStatsIndex" psid="0">
+ <type>unifiRateStatsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiThroughputDebugIndex" psid="0">
+ <type>unifiThroughputDebugIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiPeerIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>10</range_max>
+ <description_user>Index for unifiPeerIdTable</description_user>
+ </config_element>
+ <config_element name="unifiReadHardwareCounterIndex" psid="0">
+ <type>unifiReadHardwareCounterIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTXSettingsIndex" psid="0">
+ <type>unifiRadioTXSettingsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioRXSettingsIndex" psid="0">
+ <type>unifiRadioRXSettingsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioCCADebugTableIndex" psid="0">
+ <type>unifiRadioCCADebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiNarrowbandCCADebugTableIndex" psid="0">
+ <type>unifiNarrowbandCCADebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiReadRegIndex" psid="0">
+ <type>integer</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiMacInstanceIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>8</range_max>
+ <description_user>mac instance index. Note that there is an offset of 1 so that mac_instance == 0 matches unifiMacInstanceIndex == 1</description_user>
+ </config_element>
+ <config_element name="unifiRadioInstanceIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>8</range_max>
+ <description_user>Radio instance index. Note that there is an offset of 1 so that radio_instance == 0 matches unifiRadioInstanceIndex == 1</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutRadioIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>2</range_max>
+ <description_user>radio id</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutGroupIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>group index</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutTemperatureIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>temperature index</description_user>
+ </config_element>
+ <config_element name="unifiRadioCCAThresholdsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTxIqDelayTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiAgcThresholdsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxGainSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTXPowerOverrideTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>2</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerDetectorResponseTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxDetectorTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxDetectorFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOpenLoopTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOpenLoopFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxFtrimSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiStaticDpdGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxGainStepSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDpdPredistortGainsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerTrimConfigTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLossTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRxExternalGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDebugControlTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOOBConstraintTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>Index for unifiTxOOBConstraintTable</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerAdjustTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDPDTrainPacketConfigIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRegulatoryTableIndex" psid="0">
+ <description_user>Index for unifiRegulatoryTable</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiPeerid" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiOperatingClassIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiScanParametersIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiAccessClassIndex" psid="0">
+ <type>unifiAccessClassIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiSisoMimoTableIndex" psid="0">
+ <type>unifiSisoMimoTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDpdDebugTableIndex" psid="0">
+ <type>unifiDpdDebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioIndex" psid="0">
+ <type>integer</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBandTableIndex" psid="0">
+ <type>unifiBandTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBWTableIndex" psid="0">
+ <type>unifiBWTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiMacBusyTimeTableIndex" psid="0">
+ <type>unifiMacBusyTimeTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDebugModulesIndex" psid="0">
+ <type>unifiDebugModulesIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRoamRssiFactorTableIndex" psid="0">
+ <type>unifiRoamRssiFactorTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRoamCUFactorTableIndex" psid="0">
+ <type>unifiRoamCUFactorTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiSarModeTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>int16</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameTXCountersTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>unifiFrameTXCountersTableIndexEnum</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameRXCountersTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>unifiFrameRXCountersTableIndexEnum</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11ACKFailureCount" psid="148">
+ <description_user>This counter shall increment when an ACK is not received when expected.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11FCSErrorCount" psid="151">
+ <description_user>This counter shall increment when an FCS error is detected in a received MPDU.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11FragmentationThreshold" psid="124">
+ <description_user>Current maximum size, in octets, of the MPDU that may be delivered to the security encapsulation. This maximum size does not apply when an MSDU is transmitted using an HT-immediate or HTdelayed Block Ack agreement, or when an MSDU or MMPDU is carried in an AMPDU that does not contain a VHT single MPDU. Fields added to the frame by security encapsulation are not counted against the limit specified. Except as described above, an MSDU or MMPDU is fragmented when the resulting frame has an individual address in the Address1 field, and the length of the frame is larger than this threshold, excluding security encapsulation fields. The default value is the lesser of 11500 or the aMPDUMaxLength or the aPSDUMaxLength of the attached PHY and the value never exceeds the lesser of 11500 or the aMPDUMaxLength or the aPSDUMaxLength of the attached PHY.</description_user>
+ <type>uint16</type>
+ <range_min>256</range_min><range_max>11500</range_max><default>3000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11LongRetryLimit" psid="123">
+ <description_user>Maximum number of transmission attempts of a frame, the length of which is greater than dot11RTSThreshold, that shall be made before a failure condition is indicated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>4</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11MulticastReceivedFrameCount" psid="150">
+ <description_user>This counter shall increment when a MSDU is received with the multicast bit set in the destination MAC address.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsCCMPDecryptErrors" psid="437">
+ <description_user>The number of received MPDUs discarded by the CCMP decryption algorithm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsCCMPReplays" psid="436">
+ <description_user>The number of received CCMP MPDUs discarded by the replay mechanism.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsRobustMgmtCCMPReplays" psid="441">
+ <description_user>The number of received Robust Management frame MPDUs discarded due to CCMP replay errors</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsSTAAddress" psid="430">
+ <description_user>The MAC address of the STA to which the statistics in this conceptual row belong.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPICVErrors" psid="433">
+ <description_user>Counts the number of TKIP ICV errors encountered when decrypting packets for the STA.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPLocalMICFailures" psid="434">
+ <description_user>Counts the number of MIC failures encountered when checking the integrity of packets received from the STA at this entity.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPRemoteMICFailures" psid="435">
+ <description_user>Counts the number of MIC failures encountered by the STA identified by dot11RSNAStatsSTAAddress and reported back to this entity.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPReplays" psid="438">
+ <description_user>Counts the number of TKIP replay errors detected.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RTSSuccessCount" psid="146">
+ <description_user>This counter shall increment when a CTS is received in response to an RTS.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RTSThreshold" psid="121">
+ <description_user>Size of an MPDU, below which an RTS/CTS handshake shall not be performed, except as RTS/CTS is used as a cross modulation protection mechanism as defined in 9.10. An RTS/CTS handshake shall be performed at the beginning of any frame exchange sequence where the MPDU is of type Data or Management, the MPDU has an individual address in the Address1 field, and the length of the MPDU is greater than this threshold. (For additional details, refer to Table 21 in 9.7.) Setting larger than the maximum MSDU size shall have the effect of turning off the RTS/CTS handshake for frames of Data or Management type transmitted by this STA. Setting to zero shall have the effect of turning on the RTS/CTS handshake for all frames of Data or Management type transmitted by this STA.</description_user>
+ <type>uint32</type>
+ <units>octet</units>
+ <range_min>0</range_min><range_max>65536</range_max><default>65536</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11ShortRetryLimit" psid="122">
+ <description_user>Maximum number of transmission attempts of a frame, the length of which is less than or equal to dot11RTSThreshold, that shall be made before a failure condition is indicated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>32</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11WEPUndecryptableCount" psid="153">
+ <description_user>This counter shall increment when a frame is received with the WEP subfield of the Frame Control field set to one and the WEPOn value for the key mapped to the transmitter's MAC address indicates that the frame should not have been encrypted or that frame is discarded due to the receiving STA not implementing the privacy option.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11manufacturerProductVersion" psid="183">
+ <description_user>Printable string used to identify the manufacturer's product version of the resource.</description_user>
+ <description_internal>This string is generated automatically by the build process. It contains the time and date that the build was made, the release configuration used (which itself incorporates the target chip family and variant, whether it is a flash or RAM build, and the host interface), the unique build number, and details of the user account and machine used to produce the build.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>300</range_max>
+ <function type="get" function_name="mibgetfirmwareproductversion"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPSDServicePeriodTimeout" psid="2515">
+ <description_user>During Unscheduled Automated Power Save Delivery (U-APSD), UniFi may trigger a service period in order to fetch data from the access point. The service period is normally terminated by a frame from the access point with the EOSP (End Of Service Period) flag set, at which point UniFi returns to sleep. However, if the access point is temporarily inaccessible, UniFi would stay awake indefinitely. Specifies a timeout starting from the point where the trigger frame has been sent. If the timeout expires and no data has been received from the access point, UniFi will behave as if the service period had been ended normally and return to sleep. This timeout takes precedence over unifiPowerSaveExtraListenTime if both would otherwise be applicable.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>20000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLegacyPsPollTimeout" psid="2520">
+ <description_user>Time we try to stay awake after sending a PS-POLL to receive data.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>15000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiBasicCapabilities" psid="2030">
+ <description_user>The 16-bit field follows the coding of IEEE 802.11 Capability Information.</description_user>
+ <type>uint16</type>
+ <default>0x1730</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11AssociationSAQueryMaximumTimeout" psid="100">
+ <description_user>Timeout (in TUs) before giving up on a Peer that has not responded to a SA Query frame.</description_user>
+ <type>uint32</type>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>1000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRfTestModeActivated" psid="5054">
+ <description_user>Test only: Set to true when running in RF Test mode. Setting this MIB key to true prevents setting mandatory HT MCS Rates.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11AssociationSAQueryRetryTimeout" psid="101">
+ <description_user>Timeout (in TUs) before trying a Query Request frame.</description_user>
+ <type>uint32</type>
+ <range_max>4294967295</range_max><default>201</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- Tx Power Control -->
+ <config_element name="unifiTestTxPowerEnable" psid="6032">
+ <description_user>Test only: Bitfield to enable Control Plane Tx Power processing. </description_user>
+ <type>uint16</type>
+ <default>0x03DD</default>
+ <nature>hardware</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiUserSetTxpowerLevel" psid="6021">
+ <description_user>Test only: Maximum User Set Tx Power (quarter dBm). Enable it in unifiTestTxPowerEnable.</description_user>
+ <type>int16</type>
+ <default>127</default>
+ <function_list>
+ <function type="set" function_name="mlmeusersettxpowerlevel"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNoCellMaxPower" psid="8017">
+ <description_user>Max power values for included channels (quarter dBm).</description_user>
+ <type>int16</type>
+ <table_name>unifiNoCellTable</table_name>
+ <default_list>
+ <default index1="1"> 28 </default> <!-- 802.11b -->
+ <default index1="2"> 28 </default> <!-- 802.11g -->
+ <default index1="3"> 20 </default> <!-- 802.11n -->
+ <default index1="4"> 20 </default> <!-- 802.11ac -->
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNoCellIncludedChannels" psid="8018">
+ <description_user>Channels applicable. Defined in a uint64 represented by the octet string.
+ First byte of the octet string maps to LSB. Bit 0 maps to channel 1. Mapping defined in ChannelisationRules.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max><default>{ 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSarBackoff" psid="6026">
+ <description_user>Max power values per band per index(quarter dBm).</description_user>
+ <type>int16</type>
+ <table_name>unifiSarBackoffTable</table_name>
+ <default_list>
+ <default index1="1" index2="1">60</default>
+ <default index1="1" index2="2">52</default>
+ <default index1="2" index2="1">59</default>
+ <default index1="2" index2="2">51</default>
+ <default index1="3" index2="1">58</default>
+ <default index1="3" index2="2">50</default>
+ <default index1="4" index2="1">57</default>
+ <default index1="4" index2="2">49</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPowerIsGrip" psid="6016">
+ <description_user>Is using Grip power cap instead of SAR cap.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTPCMaxPowerRSSIThreshold" psid="6022">
+ <description_user>Below the (dBm) threshold, switch to the max power allowed by regulatory, if it has been previously reduced due to unifiTPCMinPowerRSSIThreshold.</description_user>
+ <type>int16</type>
+ <default>-55</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPowerRSSIThreshold" psid="6023">
+ <description_user>Above the (dBm) threshold, switch to the minimum hardware supported - capped by unifiTPCMinPower2G/unifiTPCMinPower5G. A Zero value reverts the power to a default state.</description_user>
+ <type>int16</type>
+ <default>-45</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower2G" psid="6024">
+ <description_user>Minimum power for 2.4GHz SISO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower2GMIMO" psid="6011">
+ <description_user>Minimum power for 2.4GHz MIMO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower5G" psid="6025">
+ <description_user>Minimum power for 5 GHz SISO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>40</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower5GMIMO" psid="6012">
+ <description_user>Minimum power for 5 GHz MIMO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCUseAfterConnectRsp" psid="6027">
+ <description_user>Use TPC only after MlmeConnect_Rsp has been received from the Host i.e. not during initial connection exchanges (EAPOL/DHCP operation) as RSSI readings might be inaccurate.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexMaxPowerRSSIThreshold" psid="6033">
+ <description_user>Below this (dBm) threshold, switch to max power allowed by regulatory, if it has been previously reduced due to unifiTPCMinPowerRSSIThreshold.</description_user>
+ <type>int16</type>
+ <default>-55</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexMinPowerRSSIThreshold" psid="6034">
+ <description_user>Above this(dBm) threshold, switch to minimum hardware supported - capped by unifiTPCMinPower2G/unifiTPCMinPower5G. Zero reverts the power to its default state.</description_user>
+ <type>int16</type>
+ <default>-45</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexPowerReduction" psid="6035">
+ <description_user>When LTE Coex Power Reduction provisions are met, impose a power cap of the regulatory domain less the amount specified by this MIB (quarter dB)</description_user>
+ <range_min>0</range_min><range_max>127</range_max><default>24</default>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateBbbTxFilterConfig" psid="4071">
+ <description_user>entry is written directly to the BBB_TX_FILTER_CONFIG register. Only the lower eight bits of this register are implemented . Bits 0-3 are the 'Tx Gain', bits 6-8 are the 'Tx Delay'. This register should only be changed by an expert.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <default>0x17</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRXTHROUGHPUTLOW" psid="4150">
+ <description_user> Lower threshold for number of bytes received in a second - default value based on 300Mbps </description_user>
+ <is_internal>true</is_internal>
+ <type>uint32</type>
+ <default>37500000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRXTHROUGHPUTHIGH" psid="4151">
+ <description_user> Upper threshold for number of bytes received in a second - default value based on 400Mbps </description_user>
+ <is_internal>true</is_internal>
+ <type>uint32</type>
+ <default>50000000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="deprecated_unifiWapiQosMask" psid="4130">
+ <description_user>Forces the WAPI encryption hardware use the QoS mask specified.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <default>15</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyMIBShield" psid="4001">
+ <description_user>Each element of the MIB has a set of read/write access constraints that may be applied when the element is accessed by the host. For most elements the constants are derived from their MAX-ACCESS clauses. unifiCSROnlyMIBShield controls the access mechanism. If this entry is set to 'warn', when the host makes an inappropriate access to a MIB variable (e.g., writing to a 'read-only' entry) then the firmware attempts to send a warning message to the host, but access is allowed to the MIB variable. If this entry is set to 'guard' then inappropriate accesses from the host are prevented. If this entry is set to 'alarm' then inappropriate accesses from the host are prevented and the firmware attempts to send warning messages to the host. If this entry is set to 'open' then no access constraints are applied and now warnings issued. Note that certain MIB entries have further protection schemes. In particular, the
+ MIB prevents the host from reading some security keys (WEP keys, etc.).</description_user>
+ <is_internal>true</is_internal>
+ <access_rights>not_accessible</access_rights>
+ <type>unifiCSROnlyMIBShield</type>
+ <default>2</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPsPollThreshold" psid="4179">
+ <type>uint16</type>
+ <description_user>PS Poll threshold. When Unifi chip is configured for normal power save mode and when access point does not respond to PS-Poll requests, then a fault will be generated on non-zero PS Poll threshold indicating mode has been switched from power save to fast power save. Ignored PS Poll count is given as the fault argument.</description_user>
+ <default>30</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPostEBRTWindow" psid="4173">
+ <description_user>Minimum time after the expected beacon reception time that UniFi will continue to listen for the beacon in an infrastructure BSS before timing out. Reducing this value can reduce UniFi power consumption when using low power modes, however a value which is too small may cause beacons to be missed, requiring the radio to remain on for longer periods to ensure reception of the subsequent beacon.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>2000</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyPowerCalDelay" psid="4078">
+ <description_user>Delay applied at each step of the power calibration routine used with an external PA.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPreEBRTWindow" psid="4171">
+ <description_user>Latest time before the expected beacon reception time that UniFi will turn on its radio in order to receive the beacon. Reducing this value can reduce UniFi power consumption when using low power modes, however a value which is too small may cause beacons to be missed, requiring the radio to remain on for longer periods to ensure reception of the subsequent beacon.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>100</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCExtThresh" psid="4077">
+ <description_user>Signal level at which external LNA will be used for AGC purposes.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-25</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCFrontEndGain" psid="4075">
+ <description_user>Gain of the path between chip and antenna when LNA is on.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCFrontEndLoss" psid="4076">
+ <description_user>Loss of the path between chip and antenna when LNA is off.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiChipVersion" psid="2022">
+ <description_user>Numeric identifier for the UniFi silicon revision (as returned by the GBL_CHIP_VERSION hardware register). Other than being different for each design variant (but not for alternative packaging options), the particular values returned do not have any significance.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCrystalFrequencyTrim" psid="2141">
+ <description_user>The IEEE 802.11 standard requires a frequency accuracy of either +/- 20 ppm or +/- 25 ppm depending on the physical layer being used. If UniFi's frequency reference is a crystal then this attribute should be used to tweak the oscillating frequency to compensate for design- or device-specific variations. Each step change trims the frequency by approximately 2 ppm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>63</range_max><default>31</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDTIMWaitTimeout" psid="2529">
+ <description_user>If UniFi is in power save and receives a Traffic Indication Map from its associated access point with a DTIM indication, it will wait a maximum time given by this attribute for succeeding broadcast or multicast traffic, or until it receives such traffic with the 'more data' flag clear. Any reception of broadcast or multicast traffic with the 'more data' flag set, or any reception of unicast data, resets the timeout. The timeout can be turned off by setting the value to zero; in that case UniFi will remain awake indefinitely waiting for broadcast or multicast data. Otherwise, the value should be larger than that of unifiPowerSaveExtraListenTime.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>50000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiOutputRadioInfoToKernelLog" psid="2239">
+ <description_user>Print messages about the radio status to the Android Kernel Log. See document SC-508266-TC.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugKeepRadioOn" psid="2545">
+ <description_user>Keep the radio on. For debug purposes only. Setting the value to FALSE means radio on/off functionality will behave normally. Note that setting this value to TRUE will automatically disable dorm. The intention is *not* for this value to be changed at runtime.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceFixedDurationSchedule" psid="2546">
+ <description_user>For schedules with fixed duration e.g. scan, unsync VIF, the schedule will be forced after this time to avoid VIF starving </description_user>
+ <units>TU</units>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAUsesOneAntennaWhenIdle" psid="2274">
+ <description_user>Allow the platform to downgrade antenna usage for STA VIFs to 1 if the VIF is idle. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAUsesMultiAntennasDuringConnect" psid="2275">
+ <description_user>Allow the platform to use multiple antennas for STA VIFs during the connect phase. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAPUsesOneAntennaWhenPeersIdle" psid="2276">
+ <description_user>Allow the platform to downgrade antenna usage for AP VIFs when all connected peers are idle. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="deprecated_unifiUpdateAntennaCapabilitiesWhenScanning" psid="2277">
+ <description_user>Specify whether antenna scan activities will be allowed to cause an update of VIF capability. Only valid for multi-radio platforms. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPreferredAntennaBitmap" psid="2278">
+ <description_user>Specify the preferred antenna(s) to use. A value of 0 means that the FW will decide on the antenna(s) to use. Only valid for multi-radio platforms.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMaxConcurrentMACs" psid="2279">
+ <description_user>Specify the maximum number of MACs that may be used for the platform. For multi-MAC platforms that value *could* be greater than 1. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMaxNumAntennaToUse" psid="2025">
+ <description_user>Specify the maximum number of antenna that will be used for each band. Lower 8 bits = 2GHz, Higher 8 bits = 5Ghz. Limited by maximum supported by underlying hardware. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>uint16</type>
+ <default>0x0202</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableTwoSimultaneousPassiveScansSameBand" psid="2047">
+ <description_user>Enable two passive scans to be simultaneously scheduled on two distinct channels at the same.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableFlexiMacWatchdog" psid="5200">
+ <description_user>Bitmap controlling watchdog configuration for fleximac. Setting bit to 1 will enable watchdog for MAC represented by bit position </description_user>
+ <type>uint16</type>
+ <default>0x0000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableDorm" psid="2142">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enable Dorm (deep sleep). When disabled, WLAN will not switch the radio power domain on/off *and* it will always veto deep sleep. Setting the value to TRUE means dorm functionality will behave normally. The intention is *not* for this value to be changed at runtime.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTogglePowerDomain" psid="2522">
+ <description_user>Toggle WLAN power domain when entering dorm mode (deep sleep). When entering deep sleep and this value it true, then the WLAN power domain is disabled for the deep sleep duration. When false, the power domain is left turned on. This is to work around issues with WLAN rx, and is considered temporary until the root cause is found and fixed.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDiscardedFrameCount" psid="2214">
+ <description_user>This is a counter that indicates the number of data and management frames that have been processed by the UniFi hardware but were discarded before being processed by the firmware. It does not include frames not processed by the hardware because they were not addressed to the local device, nor does it include frames discarded by the firmware in the course of normal MAC processing (which include, for example, frames in an appropriate encryption state and multicast frames not requested by the host). Typically this counter indicates lost data frames for which there was no buffer space; however, other cases may cause the counter to increment, such as receiving a retransmitted frame that was already successfully processed. Hence this counter should not be treated as a reliable guide to lost frames. The counter wraps to 0 after 65535.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCurrentTSFTime" psid="2218">
+ <description_user>Get TSF time (last 32 bits) for the specified VIF. VIF index can't be 0 as that is treated as global VIF For station VIF - Correct BSS TSF wil only be reported after MLME-CONNECT.indication(success) indication to host. Note that if MAC Hardware is switched off then TSF returned is estimated value</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <function_list>
+ <function type="get" function_name="mibtsftime" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOffchannelScheduleTimeout" psid="2079">
+ <description_user>Maximum timeout in ms the Offchannel FSM will wait until the complete dwell time is scheduled</description_user>
+ <type>uint16</type>
+ <default>1000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExtendedCapabilities" psid="2031">
+ <description_user>Extended capabilities. Bit field definition and coding follows IEEE 802.11 Extended Capability Information Element, with spare subfields for capabilities that are independent from chip/firmware implementation.</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>9</range_max><default>{ 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40, 0x80 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExtendedCapabilitiesDisabled" psid="2036">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Suppress extended capabilities IE being sent in the association request. Please note that this may fix IOP issues with Aruba APs in WMMAC. Singed Decimal</description_user>
+ <type>boolean</type><format>signed_decimal</format><default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExternalClockDetect" psid="2146">
+ <description_user>If UniFi is running with an external fast clock source, i.e. unifiExternalFastClockRequest is set, it is common for this clock to be shared with other devices. Setting to true causes UniFi to detect when the clock is present (presumably in response to a request from another device), and to perform any pending activities at that time rather than requesting the clock again some time later. This is likely to reduce overall system power consumption by reducing the total time that the clock needs to be active.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiExternalFastClockRequest" psid="2149">
+ <description_user>It is possible to supply UniFi with an external fast reference clock, as an alternative to using a crystal. If such a clock is used then it is only required when UniFi is active. A signal can be output on PIO[2] or if the version of UniFi in use is the UF602x or later, any PIO may be used (see unifiExternalFastClockRequestPIO) to indicate when UniFi requires a fast clock. Setting makes this signal become active and determines the type of signal output. 0 - No clock request. 1 - Non inverted, totem pole. 2 - Inverted, totem pole. 3 - Open drain. 4 - Open source.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiExternalFastClockRequest</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiExternalFastClockRequestPIO" psid="2158">
+ <description_user>If an external fast reference clock is being supplied to UniFi as an alternative to a crystal (see unifiExternalFastClockRequest) and the version of UniFi in use is the UF602x or later, any PIO may be used as the external fast clock request output from UniFi. key determines the PIO to use.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>15</range_max><default>9</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTXAmsduHWCapability" psid="2223">
+ <description_user>Returns 0 if A-MSDU size limited to 4K. Returns 1 is A-MSDU size is limited to 8K. This value is chip specific and limited by HW. </description_user>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTXAmsduSubframeCountMax" psid="2224">
+ <description_user>Defines the maximum number of A-MSDU sub-frames per A-MSDU. A value of 1 indicates A-MSDU aggregation has been disabled</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>3</default>
+ <range_min>1</range_min>
+ <range_max>4</range_max>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest1" psid="4154">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest2" psid="4155">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest3" psid="4156">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest4" psid="4157">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeout" psid="2500">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified.</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>400000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeOutSmall" psid="2501">
+ <description_user>UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified. The unifiFastPowerSaveTimeOutSmall aims to improve the power consumption by setting a lower bound for the Fast Power Save Timeout. If set with a value above unifiFastPowerSaveTimeOut it will default to unifiFastPowerSaveTimeOut.</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>50000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeOutAggressive" psid="2494">
+ <description_user>UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified. The unifiFastPowerSaveTimeOutAggressive aims to improve the power consumption by setting a aggressive time when channel is not busy for the Fast Power Save Timeout. If set with a value above unifiFastPowerSaveTimeOut it will default to unifiFastPowerSaveTimeOut. Setting it to zero disables the feature</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>20000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRameDplaneOperationTimeout" psid="2544">
+ <description_user>Timeout for requests sent from MACRAME to Data Plane. Any value below 1000ms will be capped at 1000ms.</description_user>
+ <units>milliseconds</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <default>1000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiVifIdleMonitorTime" psid="2509">
+ <description_user>In Fast Power Save mode, the STA will decide whether it is idle based on monitoring its traffic class. If the traffic class is continuously "occasional" for equal or longer than the specified value (in seconds), then the VIF is marked as idle. Traffic class monitoring is based on the interval specified in the "unifiExitPowerSavePeriod" MIB</description_user>
+ <units>second</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>1800</range_max><default>1</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFirmwareBuildID" psid="2021">
+ <description_user>Numeric build identifier for this firmware build. This should normally be displayed in decimal. The textual build identifier is available via the standard dot11manufacturerProductVersion MIB attribute.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function type="get" function_name="mibgetfirmwarebuildid"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFirmwarePatchBuildID" psid="2023">
+ <description_user>Numeric build identifier for the patch set that has been applied to this firmware image. This should normally be displayed in decimal. For a patched ROM build there will be two build identifiers, the first will correspond to the base ROM image, the second will correspond to the patch set that has been applied.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function type="get" function_name="mibgetfirmwarebuildid"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDisallowSchedRelinquish" psid="2543">
+ <description_user>When enabled the VIFs will not relinquish their assigned schedules when they have nothing left to do.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMLMESTAKeepAliveTimeout" psid="2502">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>30</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEAPKeepAliveTimeout" psid="2503">
+ <description_user>Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEGOKeepAliveTimeout" psid="2504">
+ <description_user>Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMESTAKeepAliveTimeoutCheck" psid="2485">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEAPKeepAliveTimeoutCheck" psid="2486">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEGOKeepAliveTimeoutCheck" psid="2487">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- End of Keep Alive MIBs -->
+ <config_element name="unifiSTARouterAdvertisementMinimumIntervalToForward" psid="2505">
+ <description_user>STA Mode: Minimum interval to forward Router Advertisement frames to Host. Minimum value = 60 secs.</description_user>
+ <type>uint32</type>
+ <range_min>60</range_min><range_max>4294967285</range_max><default>60</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- End of Router Advertisement Rate Reduction MIBs -->
+ <config_element name="unifiFragmentationDuration" psid="2524">
+ <description_user>A limit on transmission time for a data frame. If the data payload would take longer than unifiFragmentationDuration to transmit, UniFi will attempt to fragment the frame to ensure that the data portion of each fragment is within the limit. The limit imposed by the fragmentation threshold is also respected, and no more than 16 fragments may be generated. If the value is zero no limit is imposed. The value may be changed dynamically during connections. Note that the limit is a guideline and may not always be respected. In particular, the data rate is finalised after fragmentation in order to ensure responsiveness to conditions, the calculation is not performed to high accuracy, and octets added during encryption are not included in the duration calculation.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMLMEScanMaxAerials" psid="2607">
+ <description_user>Limit the number of Aerials that Scan will use.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelRule" psid="2003">
+ <description_user>Rules for channel scanners.</description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>4</range_max><default>{ 0x00, 0x01, 0x00, 0x01 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelMaxScanTime" psid="2001">
+ <description_user>Test only: overrides max_scan_time. 0 indicates not used.</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelProbeInterval" psid="2002">
+ <description_user>Test only: overrides probe interval. 0 indicates not used.</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanDeltaRSSIThreshold" psid="2010">
+ <description_user>Magnitude of the change in RSSI for which a scan result will be issued. In dB.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>20</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanHighRSSIThreshold" psid="2008">
+ <description_user>Minimum RSSI, in dB, for a scan indication to be kept.</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-90</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanMaximumResults" psid="2015">
+ <description_user>Max number of scan results, per sps, which will be stored before the oldest result is discarded, irrespective of its age. The value 0 specifies no maximum.</description_user>
+ <type>uint16</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanContinueIfMoreThanXAps" psid="5410">
+ <description_user>Part of Scan Algorithm: Keep scanning on a channel with lots of APs.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanStopIfLessThanXNewAps" psid="5411">
+ <description_user>Part of Scan Algorithm: Stop scanning on a channel if less than X NEW APs are seen.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiScanMultiVifActivated" psid="5412">
+ <description_user>Part of Scan Algorithm: Activate support for Multi Vif channel times.</description_user>
+ <type>boolean</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiScanNewAlgorithmActivated" psid="5413">
+ <description_user>Part of Scan Algorithm: Activate support for the new algorithm. </description_user>
+ <type>boolean</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanStopIfLessThanXFrames" psid="2088">
+ <description_user>Stop scanning on a channel if less than X Beacons or Probe Responses are received.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiAPAssociationTimeout" psid="2089">
+ <description_user>SoftAP: Permitted time for a station to complete associatation with FW acting as AP in milliseconds.</description_user>
+ <type>uint16</type>
+ <default>2000</default>
+ <nature>software</nature><module>mlme</module><!-- ap -->
+ </config_element>
+ <config_element name="unifiBSSMaxIdlePeriodActivated" psid="2508">
+ <description_user>If set STA will configure keep-alive with options specified in a received BSS max idle period IE</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBSSMaxIdlePeriod" psid="2488">
+ <description_user>BSS Idle MAX Period. Used to cap the value coming from BSS Max Idle Period IE, in seconds</description_user>
+ <type>uint16</type>
+ <units>second</units>
+ <range_max>300</range_max><default>300</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDmsActivated" psid="2513">
+ <description_user>Activate Directed Multicast Service (DMS)</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEStationInactivityTimeOut" psid="2098">
+ <description_user>Timeout, in seconds, for instigating ConnectonFailure procedures. Setting it to less than 3 seconds may result in frequent disconnection or roaming with the AP.
+ Disable with Zero. Values lower than INACTIVITY_MINIMUM_TIMEOUT becomes INACTIVITY_MINIMUM_TIMEOUT.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMECliInactivityTimeOut" psid="2099">
+ <description_user>Timeout, in seconds, for instigating ConnectonFailure procedures. Zero value disables the feature. Any value written lower than INACTIVITY_MINIMUM_TIMEOUT becomes INACTIVITY_MINIMUM_TIMEOUT.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEStationInitialKickTimeOut" psid="2100">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Timeout, in milliseconds, for sending the AP a NULL frame to kick off the EAPOL exchange.</description_user>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEDataReferenceTimeout" psid="2005">
+ <description_user>Maximum time, in TU, allowed for the data in data references corresponding to MLME primitives to be made available to the firmware. The special value 0 specifies an infinite timeout.</description_user>
+ <description_internal>Note that the default has to be sufficient to allow for any MLME-SET.request used to set a different value! The value 65535 is reserved for future internal expansion (infinite timeout).</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>65534</range_max><default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPowerManagementDelayTimeout" psid="2514">
+ <description_user>When UniFi enters power save mode it signals the new state by setting the power management bit in the frame control field of a NULL frame. It then remains active for the period since the previous unicast reception, or since the transmission of the NULL frame, whichever is later. This entry controls the maximum time during which UniFi will continue to listen for data. This allows any buffered data on a remote device to be cleared. Specifies an upper limit on the timeout. UniFi internally implements a proprietary algorithm to adapt the timeout depending upon the situation.This is used by firmware when current station VIF is only station VIF which can be scheduled</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>30000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiConcurrentPowerManagementDelayTimeout" psid="2516">
+ <description_user>When UniFi enters power save mode it signals the new state by setting the power management bit in the frame control field of a NULL frame. It then remains active for the period since the previous unicast reception, or since the transmission of the NULL frame, whichever is later. This entry controls the maximum time during which UniFi will continue to listen for data. This allows any buffered data on a remote device to be cleared. This is same as unifiPowerManagementDelayTimeout but this value is considered only when we are doing multivif operations and other VIFs are waiting to be scheduled.Note that firmware automatically chooses one of unifiPowerManagementDelayTimeout and unifiConcurrentPowerManagementDelayTimeout depending upon the current situation.It is sensible to set unifiPowerManagementDelayTimeout to be always more thanunifiConcurrentPowerManagementDelayTimeout.</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>10000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDisableLegacyPowerSave" psid="2510">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: This affects Station VIF power save behaviour.
+ Setting it to true will disable legacy power save (i.e. we wil use fast power save to retrieve data)
+ Note that actually disables full power save mode (i.e sending trigger to retrieve frames which will be PS-POLL for legacy and QOS-NULL for UAPSD)</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugForceActive" psid="2511">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Force station power save mode to be active (when scheduled).
+ VIF scheduling, coex and other non-VIF specific reasons could still force power save on the VIF.
+ Applies to all VIFs of type station (includes P2P client).
+ Changes to the mib will only get applied after next host/mlme power management request.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMIFOffAllowed" psid="2271">
+ <description_user> Allow MIF to be turned off. If set to TRUE, it will prevent MIF to be turned off while WLAN is running. Disabling the mib will prevent to enter idle mode lite or idle mode medium </description_user>
+ <type>boolean</type>
+ <default>true</default>
+ </config_element>
+ <config_element name="unifiAPIdleModeEnabled" psid="2497">
+ <description_user>Enables AP Idle mode which can transmit beacons in MIFLess mode, if softAP is active, and there has been no activity for a time.
+ This mib has priority over unifiIdleModeLiteEnabled. If unifiAPIdleEnabled is enabled, Idle Mode Lite won't be activated.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdleModeLiteEnabled" psid="2526">
+ <description_user>Enables Idle Mode Lite, if softAP is active, and there has been no activity for a time.
+ Idle mode lite should not be active if host has sent a command to change key.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdleModeEnabled" psid="2527">
+ <description_user>Enables Idle Mode, if single vif station is active or there is no vif, and there has been no activity for a time.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAIdleModeEnabled" psid="2493">
+ <description_user>Enables STA Idle mode, if single vif station is active and there has been no activity for a time.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMacrameDebugStats" psid="2215">
+ <description_user>MACRAME debug stats readout key. Use set to write a debug readout, then read the same key to get the actual readout.</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="false"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiARPDetectActivated" psid="2246">
+ <description_user>Activate feature support for Enhanced ARP Detect. This is required by Volcano.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRttCapabilities" psid="5300">
+ <description_user>RTT capabilities of the chip. see SC-506960-SW.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <default>{ 0x01, 0x01, 0x01, 0x01, 0x00, 0x07, 0x1c, 0x32 }</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFtmMinDeltaFrames" psid="5301">
+ <description_user>Default minimum time between consecutive FTM frames in units of 100 us. </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmPerBurst" psid="5302">
+ <description_user>Requested FTM frames per burst. </description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>31</range_max><default>4</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmBurstDuration" psid="5303">
+ <description_user>indicates the duration of a burst instance, values 0, 1, 12-14 are reserved,
+ [2..11], the burst duration is defined as (250 x 2)^(N-2), and 15 means "no preference". </description_user>
+ <type>uint16</type>
+ <range_min>2</range_min><range_max>11</range_max><default>6</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmNumOfBurstsExponent" psid="5304">
+ <description_user>The number of burst instances is 2^(Number of Bursts Exponent), value 15 means "no preference". </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>14</range_max><default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmASAPModeActivated" psid="5305">
+ <description_user>Activate support for ASAP mode in FTM</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmResponderActivated" psid="5306">
+ <description_user>Activate support for FTM Responder</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultSessionEstablishmentTimeout" psid="5307">
+ <description_user>Default timeout for session estabishmant in units of ms. </description_user>
+ <type>uint16</type><range_min>10</range_min><range_max>100</range_max>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultGapBetweenBursts" psid="5309">
+ <description_user>Interval between consecutive Bursts. In units of ms. </description_user>
+ <type>uint16</type><range_min>5</range_min><range_max>50</range_max>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultTriggerDelay" psid="5310">
+ <description_user>Delay to account for differences in time between Initiator and Responder at start of the Burst. In units of ms. </description_user>
+ <type>uint16</type><range_min>0</range_min><range_max>100</range_max>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultEndBurstDelay" psid="5311">
+ <description_user>Delay to account for differences in time between Initiator and Responder at the end of the Burst. In units of ms. </description_user>
+ <type>uint16</type><range_min>0</range_min><range_max>100</range_max>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmRequestValidationEnabled" psid="5312">
+ <description_user>Enable Validation for FTM Add Range request RTT_Configs</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmResponseValidationEnabled" psid="5313">
+ <description_user>Enable Validation for FTM Response</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmUseResponseParameters" psid="5314">
+ <description_user>Use Response burst parameters for burst</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmInitialResponseTimeout" psid="5315">
+ <description_user>Default timeout for FtmInitialResponse in units of ms. </description_user>
+ <type>uint16</type><range_min>10</range_min><range_max>100</range_max>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDSPInpBW" psid="5320">
+ <description_user>Input BW parameter to fed into DSP </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmOFDMCutOffset" psid="5321">
+ <description_user>Input OFDM cut offset to DSP </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmMeanAroundCluster" psid="5322">
+ <description_user>Whether to get simple mean or mean around cluster</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANActivated" psid="6080">
+ <description_user>Activate Neighbour Aware Networking (NAN)</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANBeaconCapabilities" psid="6081">
+ <description_user>The 16-bit field follows the coding of IEEE 802.11 Capability Information.</description_user>
+ <type>uint16</type>
+ <default>0x0620</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentClusters" psid="6082">
+ <description_user>Maximum number of concurrent NAN clusters supported.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentPublishes" psid="6083">
+ <description_user>Maximum number of concurrent NAN Publish instances supported.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentSubscribes" psid="6084">
+ <description_user>Maximum number of concurrent NAN Subscribe instances supported.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxServiceNameLength" psid="6085">
+ <description_user>Maximum Service Name Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxMatchFilterLength" psid="6086">
+ <description_user>Maximum Match Filter Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxTotalMatchFilterLength" psid="6087">
+ <description_user>Maximum Total Match Filter Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxServiceSpecificInfoLength" psid="6088">
+ <description_user>Maximum Service Specific Info Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxVSADataLength" psid="6089">
+ <description_user>Maximum Vendor Specific Attribute Data Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxMeshDataLength" psid="6090">
+ <description_user>Maximum Mesh Data Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxNDIInterfaces" psid="6091">
+ <description_user>Maximum NDI Interfaces. Note: This does not affect number of NDL Vifs supported by FW as they are hard coded.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxNDPSessions" psid="6092">
+ <description_user>Maximum NDP Sessions.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxAppInfoLength" psid="6093">
+ <description_user>Maximum App Info Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMatchExpirationTime" psid="6094">
+ <description_user>Time limit in which Mlme will expire a match for discovered service.</description_user>
+ <type>uint16</type>
+ <units>seconds</units>
+ <default>60</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANDefaultScanDwellTime" psid="6095">
+ <description_user>The default value of scan swell time in ms for each band.</description_user>
+ <units>milliseconds</units>
+ <type>uint16</type>
+ <table_name>unifiNANDefaultScanDwellTimeTable</table_name>
+ <default_list>
+ <default index1="1">200</default>
+ <default index1="2">200</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANDefaultScanPeriod" psid="6096">
+ <description_user>The default value of scan period in seconds for each band.</description_user>
+ <units>seconds</units>
+ <type>uint16</type>
+ <table_name>unifiNANDefaultScanPeriodTable</table_name>
+ <default_list>
+ <default index1="1">20</default>
+ <default index1="2">20</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxChannelSwitchTime" psid="6097">
+ <description_user>Maximum Channel Switch Time.</description_user>
+ <type>uint16</type>
+ <default>5000</default>
+ <units>microseconds</units>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMacRandomisationActivated" psid="6098">
+ <description_user>Enabling Mac Address Randomisation for NMI address.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- PSID Range 6080-6099 Reserved for NAN -->
+ <!-- <config_element name="ReservedForNAN" psid="6098"> -->
+ <!-- <config_element name="ReservedForNAN" psid="6099"> -->
+ <!-- PSID Range 6080-6099 Reserved for NAN -->
+
+ <config_element name="unifiLowPowerRxConfig" psid="6018">
+ <description_user>Enables low power radio RX for idle STA and AP VIFs respectively.
+ Setting/clearing bit 0 enables/disabled LP RX for (all) STA/Cli VIFs.
+ Setting/clearing bit 1 enables/disabled LP RX for AP/GO VIFs.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiStationActivityIdleTime" psid="2512">
+ <description_user>Time since last station activity when it can be considered to be idle. Only used in SoftAP mode when determining if all connected stations are idle (not active).</description_user>
+ <type>uint32</type>
+ <units>milliseconds</units>
+ <default>500</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiApBeaconMaxDrift" psid="2507">
+ <description_user>The maximum drift in microseconds we will allow for each beacon sent when we're trying to move it to get a 50% duty cycle between GO and STA in multiple VIF scenario. We'll delay our TX beacon by a maximum of this value until we reach our target TBTT. We have 3 possible cases for this value: a) ap_beacon_max_drift = 0x0000 - Feature disabled b) ap_beacon_max_drift between 0x0001 and 0xFFFE - Each time we transmit the beacon we'll move it a little bit forward but never more than this. (Not implemented yet) c) ap_beacon_max_drift = 0xFFFF - Move the beacon to the desired position in one shot.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0xFFFF</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMacBeaconTimeout" psid="2270">
+ <description_user>The maximum time in microseconds we want to stall TX data when expecting a beacon at EBRT time as a station.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>128</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSIMaxAveragingPeriod" psid="2210">
+ <description_user>Limits the period over which the value of unifiRSSI is averaged. If no more than unifiRSSIMinReceivedFrames frames have been received in the period, then the value of unifiRSSI is reset to the value of the next measurement and the rolling average is restarted. This ensures that the value is timely (although possibly poorly averaged) when little data is being received.</description_user>
+ <units>TU</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min>
+ <default>3000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSIMinReceivedFrames" psid="2211">
+ <description_user>See the description of unifiRSSIMaxAveragingPeriod for how the combination of attributes is used.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min>
+ <default>2</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyEIFSDuration" psid="2362">
+ <description_user>Specifies time that is used for EIFS. A value of 0 causes the build in value to be used.</description_user>
+ <access_rights>read_only</access_rights>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>12</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceChannelBW" psid="2370">
+ <description_user>Test only: Force channel bandwidth to specified value.
+ This can also be used to allow emulator/silicon back to back connection to communicate at bandwidth other than default (20 MHz)
+ Setting it to 0 uses the default bandwidth as selected by firmware. The change will be applied at next radio state change opportunity
+ channel_bw_20_mhz = 20,
+ channel_bw_40_mhz = 40,
+ channel_bw_80_mhz = 80
+ </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIqDebugEnabled" psid="2375">
+ <description_user>Send IQ capture data to host for IQ debug</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSwToHwQueueStats" psid="2250">
+ <description_user>The timing statistics of packets being queued between SW-HW</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiQueueStatsIdTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibqueuestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiHostToSwQueueStats" psid="2251">
+ <description_user>The timing statistics of packets being queued between HOST-SW</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiQueueStatsIdTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibqueuestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiQueueStatsEnable" psid="2252">
+ <description_user>Enables recording timing statistics of packets being queued between HOST-SW-HW</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRate" psid="2212">
+ <description_user>The rate corresponding to the current table entry. The value is rounded to the nearest number of units where necessary. Most rates do not require rounding, but when short guard interval is in effect the rates are no longer multiples of the base unit. Note that there may be two occurrences of the value 130: the first corresponds to MCS index 7, and the second, if present, to MCS index 6 with short guard interval.</description_user>
+ <description_internal>Get the rate for rate statistics table entry index.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <units>500 kbps</units>
+ <table_name>unifiRateStatsTable</table_name>
+ <function type="get" function_name="mibuint16get"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRxSuccessCount" psid="2206">
+ <description_user>The number of successful receptions of complete management and data frames at the rate indexed by unifiRateStatsIndex.This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsTxSuccessCount" psid="2207">
+ <description_user>The number of successful (acknowledged) unicast transmissions of complete data or management frames the rate indexed by unifiRateStatsIndex. This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRTSErrorCount" psid="2358">
+ <description_user>The number of successive RTS failures.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTxDataConfirm" psid="2253">
+ <description_user>Allows to request on a per access class basis that an MA_UNITDATA.confirm be generated after each packet transfer. The default value is applied for all ACs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <table_name>unifiAcTxConfirmTable</table_name>
+ <function_list>
+ <function type="set" function_name="mibtxdatacfmset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTxDataRate" psid="2208">
+ <description_user>The bit rate currently in use for transmissions of unicast data frames; On an infrastructure BSS, this is the data rate used in communicating with the associated access point, if there is none, an error is returned</description_user>
+ <description_internal>Request is made per-VIF. Rate is read from station records</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibtxdatarateget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLastBssTxDataRate" psid="2213">
+ <description_user>Last BSS Tx DataRate. See unifiTxDataRate description.</description_user>
+ <type>uint32</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRxDataRate" psid="2196">
+ <description_user>The bit rate of the last received frame on this VIF.</description_user>
+ <description_internal>Request is made per-VIF and only support for STA VIF type.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibrxdatarateget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNoAckActivationCount" psid="2240">
+ <description_user>The number of frames that are discarded due to HW No-ack activated during test.
+ This number will wrap to zero after the range is exceeded.</description_user>
+ <description_internal>Number of discarded frames when HW No-ack is activated during test.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRxFcsErrorCount" psid="2241">
+ <description_user>The number of received frames that are discarded due to bad FCS (CRC).
+ This number will wrap to zero after the range is exceeded.</description_user>
+ <description_internal>Number of discarded received frames due to bad FCS (CRC) as detected by the HW. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiReadReg" psid="8051">
+ <description_user>Read value from a register and return it.</description_user>
+ <description_internal> Register access function. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiReadRegTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibreadreg"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiReadHardwareCounter" psid="5087">
+ <description_user>Read a value from a hardware packet counter for a specific radio_id and return it. The firmware will convert the radio_id to the associated mac_instance.</description_user>
+ <description_internal> Hardware counter access function. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiReadHardwareCounterTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibreadhardwarecounter"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiHwTxTimeout" psid="2205">
+ <description_user>Maximum time in milliseconds for a frame to be queued in the hardware/DPIF.</description_user>
+ <type>uint16</type>
+ <units>milliseconds</units>
+ <default>512</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSwTxTimeout" psid="2204">
+ <description_user>Maximum time in seconds for a frame to be queued in firmware, ready to be sent, but not yet actually pumped to hardware.</description_user>
+ <type>uint16</type>
+ <units>second</units>
+ <default>5</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSNR" psid="2202">
+ <description_user>Provides a running average of the Signal to Noise Ratio (dB) for packets received by UniFi's radio.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <function type="get" function_name="mibgetsnr" is_for_vif="true"></function>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLastBssSNR" psid="2203">
+ <description_user>Last BSS SNR. See unifiSNR description.</description_user>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSNRExtraOffsetCCK" psid="2209">
+ <description_user>This offset is added to SNR values received at 802.11b data rates. This accounts for differences in the RF pathway between 802.11b and 802.11g demodulators. The offset applies to values of unifiSNR as well as SNR values in scan indications. Not used in 5GHz mode.</description_user>
+ <units>dB</units>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <default>8</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiScanMaxProbeTransmitLifetime" psid="2531">
+ <description_user>In TU. If non-zero, used during active scans as the maximum lifetime for probe requests. It is the elapsed time after the initial transmission at which further attempts to transmit the probe are terminated.</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>64</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiProbeResponseLifetime" psid="2533"><!-- ap -->
+ <description_user>Lifetime of proberesponse frame in unit of ms.</description_user>
+ <type>uint16</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiProbeResponseLifetimeP2P" psid="2600">
+ <description_user>Lifetime of proberesponse frame in unit of ms for P2P.</description_user>
+ <type>uint16</type>
+ <default>500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiProbeResponseMaxRetry" psid="2534">
+ <description_user>Number of retries of probe response frame.</description_user>
+ <type>uint16</type>
+ <default>5</default>
+ <range_max>255</range_max>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPowerSaveTransitionPacketThreshold" psid="2532">
+ <description_user>Golden Certification MIB don't delete, change PSID or name:If VIF has this many packets queued/transmitted/received in last unifiFastPowerSaveTransitionPeriod then firmware may decide to come out of aggressive power save mode. This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiTrafficAnalysisPeriod and unifiAggressivePowerSaveTransitionPeriod.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiTrafficAnalysisPeriod" psid="2535">
+ <description_user>Period in TUs over which firmware counts number of packet transmitted/queued/received to make decisions like coming out of aggressive power save mode or setting up BlockAck. This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiPowerSaveTransitionPacketThreshold, unifiAggressivePowerSaveTransitionPeriod and unifiTrafficThresholdToSetupBA.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>200</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAggressivePowerSaveTransitionPeriod" psid="2536">
+ <description_user>Defines how many unifiExitPowerSavePeriod firmware should wait in which VIF had received/transmitted/queued less than unifiPowerSaveTransitionPacketThreshold packets - before entering aggressive power save mode (when not in aggressive power save mode) This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiPowerSaveTransitionPacketThreshold and unifiTrafficAnalysisPeriod.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>5</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiActiveTimeAfterMoreBit" psid="2537">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: After seeing the "more" bit set in a message from the AP, the STA will goto active mode for this duration of time. After this time, traffic information is evaluated to determine whether the STA should stay active or go to powersave. Setting this value to 0 means that the described functionality is disabled.</description_user>
+ <type>uint32</type>
+ <units>TU</units>
+ <default>30</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMAXVifScheduleDuration" psid="2541">
+ <description_user>Default time for which a non-scan VIF can be scheduled. Applies to multiVIF scenario. Internal firmware logic or BSS state (e.g. NOA) may cut short the schedule.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>50</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiVifLongIntervalTime" psid="2542">
+ <description_user>When the scheduler expects a VIF to schedule for time longer than this parameter (specified in TUs), then the VIF may come out of powersave. Only valid for STA VIFs.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>60</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiUartConfigure" psid="2110">
+ <description_user>UART configuration using the values of the other unifiUart* attributes. The value supplied for this attribute is ignored.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiUartPios" psid="2111">
+ <description_user>Specification of which PIOs should be connected to the UART. Currently defined values are: 1 - UART not used; all PIOs are available for other uses. 2 - Data transmit and receive connected to PIO[12] and PIO[14] respectively. No hardware handshaking lines. 3 - Data and handshaking lines connected to PIO[12:15].</description_user>
+ <is_internal>true</is_internal>
+ <type>unifiUartPios</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiWatchdogTimeout" psid="2152">
+ <description_user>Maximum time the background may be busy or locked out for. If this time is exceeded, UniFi will reset. If this key is set to 65535 then the watchdog will be disabled.</description_user>
+ <units>ms</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min><default>1500</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLoggerEnabled" psid="2320">
+ <description_user>Enable reporting of the following events for Android logging:
+ - firmware connectivity events
+ - fate of management frames sent by the host through the MLME SAP
+ It can take the following values:
+ - 0: reporting for non mandetory triggers disabled. EAPOL, security, btm frames and roam triggers are reported.
+ - 1: partial reporting is enabled. Beacons frames will not be reported.
+ - 2: full reporting is enabled. Beacons frames are included.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiWifiLogger</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLoggerMaxDelayedEvents" psid="6124">
+ <description_user>Maximum number of events to keep when host is suspended.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMaPacketFateEnabled" psid="2321">
+ <description_user>Enable reporting of the fate of the TX packets sent by the host.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRameUpdateMibs" psid="2547">
+ <description_user>Deprecated</description_user>
+ <type>boolean</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceShortSlotTime" psid="5080">
+ <description_user>If set to true, forces FW to use short slot times for all VIFs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSI" psid="2200">
+ <description_user>Running average of the Received Signal Strength Indication (RSSI) for packets received by UniFi's radio. The value should only be treated as an indication of the signal strength; it is not an accurate measurement. The result is only meaningful if the unifiRxExternalGain attribute is set to the correct calibration value. If UniFi is part of a BSS, only frames originating from devices in the BSS are reported (so far as this can be determined). The average is reset when UniFi joins or starts a BSS or is reset.</description_user>
+ <description_internal>Use the lack of a (default) value to signal to rame that the RSSI hasn't been calibrated, and thus calls to mibgetrssi() will return FALSE. </description_internal>
+ <units>dBm</units>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <function type="get" function_name="mibgetrssi" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLastBssRSSI" psid="2201">
+ <description_user>Last BSS RSSI. See unifiRSSI description.</description_user>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerBandwidth" psid="2094">
+ <description_user>The bandwidth used with peer station prior it disconnects</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentPeerNss" psid="2095">
+ <description_user>The number of spatial streams used with peer station prior it disconnects: BIG DATA</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerTxDataRate" psid="2096">
+ <description_user>The tx rate that was used for transmissions prior disconnection</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRSSI" psid="2097">
+ <description_user>The recorded RSSI from peer station prior it disconnects</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRxRetryCount" psid="2198">
+ <description_user>The number of retry packets from peer station</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRxMulticastCount" psid="2199">
+ <description_user>The number of multicast and broadcast packets received from peer station</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiAgcThresholds" psid="5095">
+ <description_user>AGC Thresholds settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiAgcThresholdsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxSettings" psid="5031">
+ <description_user>Hardware specific transmitter settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxSettingsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxGainSettings" psid="5032">
+ <description_user>Hardware specific transmitter gain settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxGainSettingsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPowerDetectorResponse" psid="5055">
+ <description_user>Hardware specific transmitter detector response settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxPowerDetectorResponseTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDetectorTemperatureCompensation" psid="5056">
+ <description_user>Hardware specific transmitter detector temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxDetectorTemperatureCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDetectorFrequencyCompensation" psid="5057">
+ <description_user>Hardware specific transmitter detector frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxDetectorFrequencyCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOpenLoopTemperatureCompensation" psid="5058">
+ <description_user>Hardware specific transmitter open-loop temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOpenLoopTemperatureCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOpenLoopFrequencyCompensation" psid="5059">
+ <description_user>Hardware specific transmitter open-loop frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOpenLoopFrequencyCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdTemperatureCompensation" psid="5066">
+ <description_user>Hardware specific transmitter PA gain for DPD temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxPaGainDpdTemperatureCompensationTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdFrequencyCompensation" psid="5067">
+ <description_user>Hardware specific transmitter PA gain for DPD frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxPaGainDpdFrequencyCompensationTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxFtrimSettings" psid="2372">
+ <description_user>Hardware specific transmitter frequency compensation settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxFtrimSettingsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxGainStepSettings" psid="5081">
+ <description_user>Hardware specific transmitter gain step settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxGainStepSettingsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOfdmSelect" psid="5060">
+ <description_user>Hardware specific transmitter OFDM selection settings</description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>8</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDigGain" psid="5061">
+ <description_user>Specify gain specific modulation power optimisation.</description_user>
+ <type>octet_string</type>
+ <range_min>16</range_min><range_max>48</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiStaticDpdGain" psid="5097">
+ <description_user>Specify modulation specifc gains for static dpd optimisation.</description_user>
+ <type>octet_string</type>
+ <range_min>11</range_min><range_max>27</range_max>
+ <table_name>unifiStaticDpdGainTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiChipTemperature" psid="5062">
+ <description_user>Read the chip temperature as seen by WLAN radio firmware.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <units>celcius</units>
+ <function type="get" function_name="mibint16get"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="UnifiBatteryVoltage" psid="5063">
+ <description_user>Battery voltage</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <units>millivolt</units>
+ <function type="get" function_name="mibuint16get"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiLoadDpdLut" psid="2255">
+ <description_user>Write a static DPD LUT to the FW, read DPD LUT from hardware</description_user>
+ <description_internal>the set function writes static dpd lut values from hcf into firmware, the get function reads from hardware</description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiOverrideDpdLut" psid="2258">
+ <description_user>Write a DPD LUT directly to the HW</description_user>
+ <description_internal>Used for Matlab characterisation by writing a previously calculated and (possibly) smoothed LUT to the HW. The primary need for this is because writing the LUT directly in Matlab is very slow and hence impractical for any characterisation work. </description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiLoadDpdLutPerRadio" psid="2280">
+ <description_user>Write a static DPD LUT to the FW, read DPD LUT from hardware (for devices that support multiple radios)</description_user>
+ <description_internal>the set function writes static dpd lut values from hcf into firmware, the get function reads from hardware</description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTablePerRadio</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiOverrideDpdLutPerRadio" psid="2281">
+ <description_user>Write a DPD LUT directly to the HW (for devices that support multiple radios)</description_user>
+ <description_internal>Used for Matlab characterisation by writing a previously calculated and (possibly) smoothed LUT to the HW. The primary need for this is because writing the LUT directly in Matlab is very slow and hence impractical for any characterisation work. </description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTablePerRadio</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdPredistortGains" psid="2257">
+ <description_user>DPD pre-distort gains. Takes a range of frequencies, where
+ f_min <= f_channel < f_max.
+ The format is [freq_min_msb, freq_min_lsb, freq_max_msb, freq_max_lsb,
+ DPD policy bitmap, bandwidth_bitmap, power_trim_enable,
+ OFDM0_gain, OFDM1_gain, CCK_gain, TR_gain,
+ CCK PSAT gain, OFDM PSAT gain].</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max>
+ <table_name>unifiDpdPredistortGainsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdMasterSwitch" psid="2256">
+ <description_user>Enables Digital Pre-Distortion</description_user>
+ <description_internal>Bitmask of DPD features to enable for testing, requires d01_d01 or later. </description_internal>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCCAMasterSwitch" psid="5102">
+ <description_user>Enables CCA</description_user>
+ <description_internal>Bitmask of CCA features to enable. Note MIB is not live, value will get loaded to hardware after radio is switched on. The least significant word is for config of ETSI regulatory domain 80Mhz p0 and p4, the other word is for all other configurations.</description_internal>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmacconfiggenericset" is_for_vif="false"></function>
+ </function_list>
+ <default>0x00540050</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxSyncCCACfg" psid="5103">
+ <description_user>Configures CCA per 20 MHz sub-band.</description_user>
+ <description_internal>Configure to take into account the CCA of each 20M subband for the primary channel.</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiFleximacCcaEdEnable" psid="5116">
+ <description_user>Enable/disable CCA-ED in Fleximac.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiMacCCABusyTime" psid="5104">
+ <description_user>Counts the time CCA indicates busy</description_user>
+ <description_internal>This register counts the time CCA indicates busy (for pri20/sec20 and sec40), in units of 16 us.</description_internal>
+ <table_name>unifiMacBusyTimeTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiMacSecChanClearTime" psid="5105">
+ <description_user>Configures PIFS</description_user>
+ <description_internal>Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop. Related to PIFS.</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmacconfiggenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdDebug" psid="5106">
+ <description_user>Debug MIBs for DPD</description_user>
+ <table_name>unifiDpdDebugTable</table_name>
+ <default_list>
+ <default index1="1"> 170 </default> <!-- LUT_QUALITY_THRESHOLD = 0xaa = 170 -->
+ <default index1="2"> 3 </default> <!-- LUT_RETRIM_LIMIT = 3 -->
+ </default_list>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <type>uint32</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCCACSThresh" psid="5101">
+ <description_user>Configures CCA CS thresholds.</description_user>
+ <description_internal>Configures CCA CS (packet sync) thresholds. Indexed by siso/mimo.</description_internal>
+ <table_name>unifiCCACSThreshTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCoexDebugOverrideBt" psid="2425">
+ <description_user>Enables overriding of all BT activities by WLAN. </description_user>
+ <description_internal>When this MIB is set then no macrame blackouts are registered for any BT activities
+ and also WLAN trumps all BT activities at the HW CDL arbitration level. This MIB should be enabled only for debugging
+ purposes. This MIB will only have an effect when its either compiled into the FW image or is configured at WLAN boot via
+ an hcf file.
+ </description_internal>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiTxPowerTrimConfig" psid="5072">
+ <description_user>Hardware specific transmitter power trim settings</description_user>
+ <description_internal>Configuration settings for the TX power trim.
+ The format is [rf_chip_bitmap_lso, rf_chip_bitmap_mso
+ radio_id, band,
+ pcal_ofdm0_to_cck_mso, pcal_ofdm0_to_cck_lso,
+ pcal_ofdm0_to_ofdm1_mso, pcal_ofdm0_to_ofdm1_lso,
+ pcal_20_to_80_mso, pcal_20_to_80_lso,
+ pcal_20_to_40_mso, pcal_20_to_40_lso,
+ psat_dig_gain, psat_v2i_gain, psat_mix_gain, psat_drv_gain, psat_pa_gain,
+ psat_power_ref_mso, psat_power_ref_lso,
+ psat_drv_bias, psat_pa_bias,
+ max_adjust_up_mso, max_adjust_up_lso,
+ max_adjust_down_mso, max_adjust_down_lso].</description_internal>
+ <type>octet_string</type>
+ <range_min>25</range_min><range_max>25</range_max>
+ <table_name>unifiTxPowerTrimConfigTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPowerTrimCommonConfig" psid="2374">
+ <description_user>Common transmitter power trim settings</description_user>
+ <description_internal>Common configuration settings for the TX power trim</description_internal>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiClearRadioTrimCache" psid="5088">
+ <description_user>Clears the radio trim cache. The parameter is ignored.</description_user>
+ <description_internal>Invalidates all entries in the trim cache. </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNannyTemperatureReportDelta" psid="5109">
+ <description_user>A temperature difference, in degrees Celsius, above which the nanny process will generate a temperature update debug word </description_user>
+ <description_internal>This delta will be used in NANNY</description_internal>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ </config_element>
+ <config_element name="unifiNannyTemperatureReportInterval" psid="5110">
+ <description_user>A report interval in milliseconds where temperature is checked</description_user>
+ <description_internal>This interval will be used in NANNY</description_internal>
+ <type>uint16</type>
+ <default>200</default>
+ <nature>software</nature>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ </config_element>
+ <config_element name="unifiLteMailbox" psid="2430">
+ <description_user>Set modem status to simulate lte status updates. See SC-505775-SP for API description.
+ Defined as array of uint32 represented by the octet string
+ FOR TEST PURPOSES ONLY
+ </description_user>
+ <description_internal>This MIB simulates writing to mailbox for LTE signalling. Used for test purposes only.
+ First byte of the octet string maps to LSB of the first uint32 in the array.
+ First 4 octets maps to 32 bits in register-0 of SC-505775-SP section 3.
+ And so on.
+ The size of this MIB allows for the 9 32bit registers to be mimicked and, optionally, the 10th word (the checksum).
+ The checksum is not validated by wlan fw, so it is not necessary for WLAN cats/unit tests to populate this field.
+ And example for Band40 is
+ { 0x05, 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA8, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
+ </description_internal>
+ <type>octet_string</type>
+ <range_min>36</range_min><range_max>40</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteMwsSignal" psid="2431">
+ <description_user>Set modem status to simulate lte status updates. See SC-505775-SP for API description. See unifiLteSignalsBitField for enum bitmap.
+ FOR TEST PURPOSES ONLY
+ </description_user>
+ <description_internal> Bitmap of LTE signals.
+ </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltemwssignal" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableChannelAvoidance" psid="2432">
+ <description_user>Enables channel avoidance scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the channel avoidance scheme is enabled in softAP/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnablePowerBackoff" psid="2433">
+ <description_user>Enables power backoff scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the power backoff scheme is enabled in STA/AP/CLI/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableTimeDomain" psid="2434">
+ <description_user>Enables TDD scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the time domain scheme is enabled in STA/AP/CLI/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableLteCoex" psid="2435">
+ <description_user>Enables LTE Coex support </description_user>
+ <description_internal>When this MIB is enabled WLAN registers for LTE signals with common code.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffChannels" psid="2436">
+ <description_user>Defines channels to which power backoff shall be applied when LTE operating on Band40.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to which power backoff shall be applied when LTE operating
+ on Band40 when LTE Power Back feature is enabled. The first octet is the first channel in a range of channels. The second octet
+ is the upper channel of this range. EG { 0x01, 0x07 } describes the range from channel 1 to channel 7.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x01, 0x02 }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpLow" psid="2437">
+ <description_user>WLAN Power Reduction shall be applied when RSRP of LTE operating on band 40 falls below this level</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <default>-100</default>
+ <range_min>-140</range_min><range_max>-77</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpHigh" psid="2438">
+ <description_user>WLAN Power Reduction shall be restored when RSRP of LTE operating on band 40 climbs above this level</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <default>-95</default>
+ <range_min>-140</range_min><range_max>-77</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpAveragingAlpha" psid="2439">
+ <description_user>Weighting applied when calculaing the average RSRP when considering Power Back Off
+ Specifies the percentage weighting (alpha) to give to the most recent value when calculating the moving average.
+ ma_new = alpha * new_sample + (1-alpha) * ma_old.</description_user>
+ <units>percentage</units>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetChannel" psid="2440">
+ <description_user>Enables LTE Coex support </description_user>
+ <description_internal>When this MIB is enabled WLAN registers for LTE signals with common code.
+ </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetchannel" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetPowerBackoff" psid="2441">
+ <description_user>MIB to force WLAN Power Backoff for LTE COEX testing purposes</description_user>
+ <description_internal>Setting this MIB shall cause power backoff to be asserted in MLME.on the specified channel_mask
+ Note the power reduction applied is specified by unifiLteCoexPowerReduction as per normal operation</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetpowerbackoff" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetTddDebugMode" psid="2442">
+ <description_user>MIB to enable LTE TDD COEX simulation for testing purposes</description_user>
+ <description_internal>Setting this MIB shall cause coex module to simulate periodic MWS_FRAME_SYNC signalling in various modes,
+ for the purpose of testing LTE/WLAN Time Domain Coex functionality. The debug module shall also use CDL hardware to interfere
+ with WLAN Tx and Rx operation to approximate impact of LTE on WLAN.
+ Mode (0): disabled.
+ Mode (1): no drift in frame sync simulated </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetltetdddebugmode" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40AvoidChannels" psid="2443">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 40 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 40 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x01, 0x05 } describes the range from channel 1 to channel 5.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 40.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x01, 0x05 }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand41AvoidChannels" psid="2444">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 41 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 41 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x04, 0x0D } describes the range from channel 4 to channel 13.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 41.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x04, 0x0D }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand7AvoidChannels" psid="2445">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 7 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 41 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x09, 0x0D } describes the range from channel 9 to channel 13.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 41.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x09, 0x0D }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiRxAgcControl" psid="4079">
+ <description_user>Override the AGC by adjusting the Rx minimum and maximum gains of each stage.
+ Set requests write the values to a static structure in
+ mac/hal/halradio/halradio_agc.c. The saved values are written
+ to the Jar register WLRF_RADIO_AGC_CONFIG2 and to the Night registers
+ WL_RADIO_AGC_CONFIG2 and WL_RADIO_AGC_CONFIG3. The saved values are also
+ used to configure the AGC whenever halradio_agc_setup() is called.
+ Get requests read the values from the static structure in
+ mac/hal/halradio/halradio_agc.c.
+ AGC enables are not altered. Fixed gain may be tested by setting the
+ minimums and maximums to the same value.
+
+ Version.
+ octet 0 - Version number for this mib.
+ Gain values. Default in brackets.
+ octet 1 - 5G LNA minimum gain (0).
+ octet 2 - 5G LNA maximum gain (4).
+ octet 3 - 2G LNA minimum gain (0).
+ octet 4 - 2G LNA maximum gain (5).
+ octet 5 - Mixer minimum gain (0).
+ octet 6 - Mixer maximum gain (2).
+ octet 7 - ABB minimum gain (0).
+ octet 8 - ABB maximum gain (27).
+ octet 9 - Digital minimum gain (0).
+ octet 10 - Digital maximum gain (7).
+
+ For Rock / Hopper the saved values are written to the
+ Hopper register WLRF_RADIO_AGC_CONFIG2_I0, WLRF_RADIO_AGC_CONFIG2_I1
+ and Rock registers WL_RADIO_AGC_CONFIG3_I0, WL_RADIO_AGC_CONFIG3_I1
+
+ Version.
+ octet 0 - Version number for this mib.
+ Gain values. Default in brackets.
+ octet 1 - 5G FE minimum gain (1).
+ octet 2 - 5G FE maximum gain (8).
+ octet 3 - 2G FE minimum gain (0).
+ octet 4 - 2G FE maximum gain (8).
+ octet 5 - ABB minimum gain (0).
+ octet 6 - ABB maximum gain (8).
+ octet 7 - Digital minimum gain (0).
+ octet 8 - Digital maximum gain (17).</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>11</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLossFrequency" psid="5033">
+ <description_user>The corresponding set of frequency values for TxAntennaConnectionLossTable</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaConnectionLossTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLoss" psid="5034">
+ <description_user>The set of Antenna Connection Loss value (qdB), which is used for TPO/EIRP conversion</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaConnectionLossTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGainFrequency" psid="5035">
+ <description_user>The corresponding set of frequency values for TxAntennaMaxGain</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaMaxGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGain" psid="5036">
+ <description_user>The set of Antenna Max Gain value (qdB), which is used for TPO/EIRP conversion</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaMaxGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxExternalGainFrequency" psid="5037">
+ <description_user>The set of RSSI offset value</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxExternalGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxExternalGain" psid="5038">
+ <description_user>The table giving frequency-dependent RSSI offset value</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxExternalGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxRssiAdjustments" psid="5115">
+ <description_user>
+ Provides platform dependent rssi adjustments. Octet string (length 4), each octet
+ represents a signed 8 bit value in units of quarter dB.
+ octet[0] = always_adjust (applied unconditionally in all cases)
+ octet[1] = low_power_adjust (applied in low_power mode only)
+ octet[2] = ext_lna_on_adjust (applied only if we have a FEM and the external LNA is enabled)
+ octet[3] = ext_lna_off_adjust (applied only if we have a FEM and the external LNA is disabled)
+ </description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>4</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxRssiAdjustmentsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDisableLNABypass" psid="5118">
+ <description_user>
+ Prevents the use of the LNA bypass. Can be set at any time, but takes effect the next time the radio is
+ turned on from off.
+ Set a bit to 1 to disable the LNA bypass in that configuration.
+ B0 2.4G Radio 0
+ B1 2.4G Radio 1
+ B2 2.4G Radio 2
+ B3 2.4G Radio 3
+ B4 5G Radio 0
+ B5 5G Radio 1
+ B6 5G Radio 2
+ B7 5G Radio 3
+ </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiSableContainerSizeConfiguration" psid="5000">
+ <description_user>Sable Container Size Configuration
+ Sable WLAN reserved memory size is determined by the host. Sable TLV containers are allocated from this WLAN reserved area.
+ Each container has different requirement on its size. For example, frame logging or IQ capture would be very greedy, requesting
+ most of available memroy. But some just need fixed size, but not large. To cope with such requirements, each container size is
+ configured with the following rules:
+ 1. To allocate a certain percentage of the whole wlan reserved area, put the percentage in hex format. For example, 0x28(=40)
+ means 40% of reserved area will be assigned. The number 0x64(=100) is specially treated that all remaining space will be
+ assigned after all the other containers are first served.
+ 2. To request (n * 2048) bytes, put (100 + n) value in hex format. For example, 0x96 (= 150) means 50 * 2048 = 102400 bytes.
+ Here are the list of containers:
+ - octet 0 - WTLV_CONTAINER_ID_DPLANE_FRAME_LOG
+ </description_user>
+ <type>octet_string</type><range_min>3</range_min><range_max>3</range_max><default> {0x64} </default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogMode" psid="5001">
+ <description_user>Sable Frame Logging mode
+ - 0: disable frame logging
+ - 1: enable frame logging always, regardless of CPU resource state
+ - 2: dynamically enable frame logging base on CPU resource. If CPU too busy, frame logging is disabled.
+ Logging is enabled when CPU resource gets recovered.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max>
+ <default>2</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogmodeset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogCpuThresPercent" psid="5002">
+ <description_user>CPU target in percent. When CPU usage is higher than this target,
+ frame logging will be disabled by firmware. Firmware will check if CPU resource is recovered
+ every 1 second. If CPU resource recovered, then frame logging is re-enabled.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <default>95</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogcputhresset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogCpuOverheadPercent" psid="5003">
+ <description_user>Expected CPU overhead introduced by frame logging.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <default>3</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogcpuoverheadset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCurrentTxpowerLevel" psid="6020">
+ <description_user>Maximum air power for the VIF. Values are expressed in 0.25 dBm units.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <default>0</default>
+ <function type="get" function_name="mibint16get" is_for_vif="true"></function>
+ <units>qdBm</units>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugInstantDelivery" psid="6069">
+ <description_user>Instant delivery control of the debug messages when set to true. Note: will not allow the host to suspend when set to True.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibdebuginstantdeliveryset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugEnable" psid="6071">
+ <description_user>Debug to host state. Debug is either is sent to the host or it isn't.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mibdebugenableset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugModuleControl" psid="5029">
+ <description_user>Debug Module levels for all modules.
+ Module debug level is used to filter debug messages sent to the host.
+ Only 6 levels of debug per module are available:
+ a. -1 No debug created.
+ b. 0 Debug if compiled in. Should not cause Buffer Full in normal testing.
+ c. 1 - 3 Levels to allow sensible setting of the .hcf file while running specific tests or debugging
+ d. 4 Debug will harm normal execution due to excessive levels or processing time required. Only used in emergency debugging.
+ Additional control for FSM transition and FSM signals logging is provided.
+
+ Debug module level and 2 boolean flags are encoded within a uint16:
+ Function | Is sending FSM signals | Is sending FSM transitions | Is sending FSM Timers | Reserved | Module level (signed int)
+ ----------+--------------------------+------------------------------+--------------------------+------------+---------------------------
+ Bits | 15 | 14 | 13 | 12 - 8 | 7 - 0
+
+ Note: 0x00FF disables any debug for a module
+ 0xE004 enables all debug for a module</description_user>
+ <type>uint16</type>
+ <table_name>unifiDebugConfigTable</table_name>
+ <default_list>
+ <!-- To find the module see unifiDebugModulesIndex -->
+ <!-- Please don't add comments that hint what the index is. -->
+ <default index1="1"> 0xE003 </default>
+ <default index1="2"> 0xE000 </default>
+ <default index1="3"> 0x00FF </default>
+ <default index1="4"> 0xE004 </default>
+ <default index1="5"> 0x00FF </default>
+ <default index1="6"> 0xE000 </default>
+ <default index1="7"> 0xE004 </default>
+ <default index1="8"> 0xE004 </default>
+ <default index1="9"> 0x00FF </default>
+ <default index1="10"> 0x00FF </default>
+ <default index1="11"> 0x0001 </default>
+ <default index1="12"> 0x00FF </default>
+ <default index1="13"> 0x00FF </default>
+ <default index1="14"> 0xE000 </default>
+ <default index1="15"> 0x00FF </default>
+ <default index1="16"> 0x00FF </default>
+ <default index1="17"> 0x0001 </default>
+ <default index1="18"> 0xE004 </default>
+ <default index1="19"> 0xE004 </default>
+ <default index1="20"> 0xE000 </default>
+ <default index1="21"> 0xE004 </default>
+ <default index1="22"> 0xE004 </default>
+ <default index1="23"> 0x0000 </default>
+ <default index1="24"> 0xE004 </default>
+ <default index1="25"> 0x0001 </default>
+ <default index1="26"> 0x00FF </default>
+ <default index1="27"> 0x00FF </default>
+ <default index1="28"> 0xE004 </default>
+ <default index1="29"> 0x0001 </default>
+ <default index1="30"> 0x0001 </default>
+ <default index1="31"> 0xE000 </default>
+ <default index1="32"> 0x00FF </default>
+ <default index1="33"> 0x00FF </default>
+ <default index1="34"> 0x00FF </default>
+ <default index1="35"> 0xE001 </default>
+ <default index1="36"> 0x0000 </default>
+ <default index1="37"> 0xE004 </default>
+ <default index1="38"> 0x00FF </default>
+ <default index1="39"> 0x0004 </default>
+ <default index1="40"> 0x00FF </default>
+ <default index1="41"> 0x0000 </default>
+ <default index1="42"> 0x00FF </default>
+ <default index1="43"> 0xE004 </default>
+ <default index1="44"> 0xE004 </default>
+ <default index1="45"> 0xE000 </default>
+ <default index1="46"> 0x00FF </default>
+ <default index1="47"> 0x00FF </default>
+ <default index1="48"> 0x0000 </default>
+ <default index1="49"> 0x0000 </default>
+ <default index1="50"> 0x0001 </default>
+ <default index1="51"> 0xE001 </default>
+ <default index1="52"> 0x000F </default>
+ <default index1="53"> 0xE004 </default>
+ <default index1="54"> 0xE004 </default>
+ <default index1="55"> 0x0004 </default>
+ <default index1="56"> 0x0004 </default>
+ <default index1="57"> 0x00FF </default>
+ <default index1="58"> 0x0000 </default>
+ <default index1="59"> 0x0000 </default>
+ <default index1="60"> 0x0000 </default>
+ <default index1="61"> 0x0000 </default>
+ <default index1="62"> 0xE001 </default>
+ <default index1="63"> 0x00FF </default>
+ <default index1="64"> 0x0001 </default>
+ <default index1="65"> 0x00FF </default>
+ <default index1="66"> 0xE004 </default>
+ <default index1="67"> 0xE00F </default>
+ <default index1="68"> 0x000F </default>
+ <default index1="69"> 0xE004 </default>
+ <default index1="70"> 0xE004 </default>
+ <default index1="71"> 0x00FF </default>
+ <default index1="72"> 0xE004 </default>
+ <default index1="73"> 0x0004 </default>
+ <default index1="74"> 0xE004 </default>
+ <default index1="75"> 0xE004 </default>
+ <default index1="76"> 0x0000 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFaultEnable" psid="5027">
+ <description_user> Send Fault to host state. </description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mibfaultenableset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSubSystemsIndex" psid="0">
+ <type>integer</type>
+ <description_user>Subsystems index</description_user>
+ </config_element>
+ <config_element name="unifiModuleMemoryManagerFieldIndexEnum" psid="0">
+ <type>integer</type>
+ <description_user>Module memory manager configuration (priority and size)</description_user>
+ </config_element>
+ <config_element name="unifiFaultSubSystemControl" psid="5028">
+ <description_user>Fault levels for WLAN SubSystems.
+ Fault level is used to filter faults sent to the host.
+ 4 levels of faults per subsystem are available (FAILURE_LEVEL_T):
+ a. 0 ERROR
+ b. 1 WARNING
+ c. 2 INFO_1
+ d. 3 INFO_2
+
+ Modifying Fault Levels at run time:
+ 1. Set the fault level for the subsystems in unifiFaultConfigTable
+ 2. Set unifiFaultEnable
+
+ NOTE: If fault level of a subsystem is configured to ERROR, all the faults within that subsystem configured to ERROR will only be issued to host,
+ faults with WARNING, INFO_1 and INFO_2 level will be converted to debug message
+
+ If fault level of a subsystem is configured to WARNING, all the faults within that subsystem configured to ERROR and WARNING will be issued to host,
+ faults with INFO_1 and INFO_2 level will be converted to debug message
+ </description_user>
+ <type>uint16</type>
+ <table_name>unifiFaultConfigTable</table_name>
+ <default_list>
+ <!-- To find the SubSystems Index see unifiSubSystemsIndex -->
+ <default index1="1"> 0x0001 </default>
+ <default index1="2"> 0x0001 </default>
+ <default index1="3"> 0x0001 </default>
+ <default index1="4"> 0x0001 </default>
+ <default index1="5"> 0x0001 </default>
+ <default index1="6"> 0x0001 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPanicSubSystemControl" psid="5026">
+ <description_user>PANIC levels for WLAN SubSystems.
+ Panic level is used to filter Panic sent to the host.
+ 4 levels of Panic per subsystem are available (FAILURE_LEVEL_T):
+ a. 0 FATAL - Always reported to host
+ b. 1 ERROR
+ c. 2 WARNING
+ d. 3 DEBUG
+
+ NOTE: If Panic level of a subsystem is configured to FATAL, all the Panics within that subsystem configured to FATAL will be effective,
+ panics with ERROR, WARNING and Debug level will be converted to faults.
+
+ If Panic level of a subsystem is configured to WARNING, all the panics within that subsystem configured to FATAL, ERROR and WARNING will be issued to host,
+ panics with Debug level will be converted to faults.
+ </description_user>
+ <type>uint16</type>
+ <table_name>unifiPanicConfigTable</table_name>
+ <default_list>
+ <!-- To find the SubSystems Index see unifiSubSystemsIndex -->
+ <default index1="1"> 0x0001 </default>
+ <default index1="2"> 0x0001 </default>
+ <default index1="3"> 0x0001 </default>
+ <default index1="4"> 0x0000 </default>
+ <default index1="5"> 0x0001 </default>
+ <default index1="6"> 0x0001 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- unifiTxOOBConstraintTable Transmit out-of-band regulatory constraint table -->
+ <config_element name="unifiTxOOBConstraints" psid="5064">
+ <description_user>OOB constraints table.
+ | octects | description |
+ |---------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+ | 0 | DPD applicability bitmask: 0 = no DPD, 1 = dynamic DPD, 2 = static DPD, 3 = applies to both static and dynamic DPD |
+ | 1-2 | Bitmask indicating which regulatory domains this rule applies to FCC=bit0, ETSI=bit1, JAPAN=bit2 |
+ | 3-4 | Bitmask indicating which band edges this rule applies to RICE_BAND_EDGE_ISM_24G_LOWER = bit 0, RICE_BAND_EDGE_ISM_24G_UPPER = bit 1, RICE_BAND_EDGE_U_NII_1_LOWER = bit 2, RICE_BAND_EDGE_U_NII_1_UPPER = bit 3, RICE_BAND_EDGE_U_NII_2_LOWER = bit 4, RICE_BAND_EDGE_U_NII_2_UPPER = bit 5, RICE_BAND_EDGE_U_NII_2E_LOWER = bit 6, RICE_BAND_EDGE_U_NII_2E_UPPER = bit 7, RICE_BAND_EDGE_U_NII_3_LOWER = bit 8, RICE_BAND_EDGE_U_NII_3_UPPER = bit 9 |
+ | 5 | Bitmask indicating which modulation types this rule applies to (LSB/b0=DSSS/CCK, b1= OFDM0 modulation group, b2= OFDM1 modulation group) |
+ | 6 | Bitmask indicating which channel bandwidths this rule applies to (LSB/b0=20MHz, b1=40MHz, b2=80MHz) |
+ | 7 | Minimum distance to nearest band edge in 500 kHz units for which this constraint becomes is applicable. |
+ | 8 | Maximum power (EIRP) for this particular constraint - specified in units of quarter dBm. |
+ | 9-32 | Spectral shaping configuration to be used for this particular constraint. The value is specific to the radio hardware and should only be altered under advice from the IC supplier. |
+ | 33-56| Tx DPD Spectral shaping configuration to be used for this particular constraint. The value is specific to the radio hardware and should only be altered under advice from the IC supplier. |
+ |</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOOBConstraintTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <!-- end of unifiTxOOBConstraintTable -->
+ <!-- unifiRegDomVersion Regulatory domain version. -->
+ <config_element name="unifiRegDomVersion" psid="8019">
+ <description_user>Regulatory domain version encoded into 2 bytes, major version as MSB and minor version as LSB</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+
+ <default>0x0107</default>
+ </config_element>
+ <!-- unifiRegulatoryTable Regulatory information for all countries. -->
+ <!-- Columns -->
+ <config_element name="unifiRegulatoryParameters" psid="8011">
+ <description_user>Regulatory parameters.
+ Each row of the table contains the regulatory rules for one country:
+ octet 0 - first character of alpha2 code for country
+ octet 1 - second character of alpha2 code for country
+ octet 2 - regulatory domain for the country
+ Followed by the rules for the country, numbered 0..n in this description
+ octet 7n+3 - LSB start frequency octet
+ 7n+4 - MSB start frequency octet
+ 7n+5 - LSB end frequency octet
+ 7n+6 - MSB end frequency octet
+ 7n+7 - maximum bandwidth octet
+ 7n+8 - maximum power octet
+ 7n+9 - rule flags</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>73</range_max>
+ <table_name>unifiRegulatoryTable</table_name>
+ <default_list>
+
+ <default index1="1">{0x30,0x30,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x99,0x09,0xB2,0x09,0x28,0x14,0x01,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="2">{0x58,0x58,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="3">{0x41,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0x50,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="4">{0x41,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="5">{0x41,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="6">{0x41,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="7">{0x41,0x49,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="8">{0x41,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="9">{0x41,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x12,0x00}</default>
+ <default index1="10">{0x41,0x4E,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="11">{0x41,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="12">{0x41,0x51,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="13">{0x41,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="14">{0x41,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="15">{0x41,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="16">{0x41,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x12,
+ 0x5E,0x15,0xE0,0x15,0x50,0x1E,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x1E,0x02,
+ 0x5D,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="17">{0x41,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x5D,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="18">{0x41,0x58,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="19">{0x41,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x12,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x12,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="20">{0x42,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="21">{0x42,0x42,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="22">{0x42,0x44,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="23">{0x42,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="24">{0x42,0x46,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="25">{0x42,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x5D,0x16,0xF3,0x16,0x50,0x0E,0x00}</default>
+ <default index1="26">{0x42,0x48,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x14,0x14,0x12,
+ 0x67,0x16,0xCB,0x16,0x14,0x14,0x00}</default>
+ <default index1="27">{0x42,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="28">{0x42,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x14,0x00}</default>
+ <default index1="29">{0x42,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="30">{0x42,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="31">{0x42,0x4E,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="32">{0x42,0x4F,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x1E,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x10}</default>
+ <default index1="33">{0x42,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="34">{0x42,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="35">{0x42,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="36">{0x42,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="37">{0x42,0x57,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="38">{0x42,0x59,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x4E,0x16,0x28,0x1B,0x02}</default>
+ <default index1="39">{0x42,0x5A,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="40">{0x43,0x41,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xE0,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="41">{0x43,0x43,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="42">{0x43,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="43">{0x43,0x46,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0x28,0x18,0x02}</default>
+ <default index1="44">{0x43,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="45">{0x43,0x48,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="46">{0x43,0x49,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="47">{0x43,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="48">{0x43,0x4C,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="49">{0x43,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="50">{0x43,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="51">{0x43,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="52">{0x43,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="53">{0x43,0x55,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="54">{0x43,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="55">{0x43,0x58,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0xA0,0x1B,0x02,
+ 0x12,0x16,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="56">{0x43,0x59,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="57">{0x43,0x5A,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="58">{0x44,0x45,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="59">{0x44,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="60">{0x44,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="61">{0x44,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
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+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="62">{0x44,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="63">{0x44,0x5A,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x26,0x16,0xA0,0x1E,0x02}</default>
+ <default index1="64">{0x45,0x43,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
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+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="65">{0x45,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="66">{0x45,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02}</default>
+ <default index1="67">{0x45,0x48,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02}</default>
+ <default index1="68">{0x45,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="69">{0x45,0x53,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="70">{0x45,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="71">{0x46,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="72">{0x46,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="73">{0x46,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="74">{0x46,0x4C,0x02,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="75">{0x46,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
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+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="76">{0x46,0x4F,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="77">{0x46,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="78">{0x47,0x41,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="79">{0x47,0x42,0x02,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="80">{0x47,0x44,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
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+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="81">{0x47,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x12,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="82">{0x47,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="83">{0x47,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="84">{0x47,0x48,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="85">{0x47,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="86">{0x47,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="87">{0x47,0x4D,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="88">{0x47,0x4E,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="89">{0x47,0x50,0x02,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="90">{0x47,0x51,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="91">{0x47,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="92">{0x47,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
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+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="93">{0x47,0x54,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="94">{0x47,0x55,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="95">{0x47,0x57,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="96">{0x47,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="97">{0x48,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="98">{0x48,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="99">{0x48,0x4E,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="100">{0x48,0x52,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="101">{0x48,0x54,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="102">{0x48,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="103">{0x49,0x44,0x03,
+ 0x62,0x09,0xB2,0x09,0x14,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x14,0x17,0x00}</default>
+ <default index1="104">{0x49,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="105">{0x49,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x12,
+ 0x72,0x15,0x62,0x16,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x17,0x01}</default>
+ <default index1="106">{0x49,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="107">{0x49,0x4E,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="108">{0x49,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="109">{0x49,0x51,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="110">{0x49,0x52,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="111">{0x49,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="112">{0x49,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="113">{0x4A,0x45,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="114">{0x4A,0x4D,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="115">{0x4A,0x4F,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x17,0x00}</default>
+ <default index1="116">{0x4A,0x50,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0xAA,0x09,0xBE,0x09,0x14,0x14,0x04,
+ 0x2E,0x13,0x7E,0x13,0x28,0x17,0x00,
+ 0xA6,0x13,0xE2,0x13,0x28,0x17,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02}</default>
+ <default index1="117">{0x4B,0x45,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x28,0x17,0x00}</default>
+ <default index1="118">{0x4B,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="119">{0x4B,0x48,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1B,0x00}</default>
+ <default index1="120">{0x4B,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="121">{0x4B,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="122">{0x4B,0x4E,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="123">{0x4B,0x50,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="124">{0x4B,0x52,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x5D,0x16,0xDA,0x16,0x50,0x1E,0x00}</default>
+ <default index1="125">{0x4B,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="126">{0x4B,0x59,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="127">{0x4B,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x4E,0x16,0x50,0x14,0x02}</default>
+ <default index1="128">{0x4C,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="129">{0x4C,0x42,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="130">{0x4C,0x43,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="131">{0x4C,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="132">{0x4C,0x4B,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="133">{0x4C,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="134">{0x4C,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="135">{0x4C,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="136">{0x4C,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="137">{0x4C,0x56,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="138">{0x4C,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="139">{0x4D,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12}</default>
+ <default index1="140">{0x4D,0x43,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="141">{0x4D,0x44,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="142">{0x4D,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="143">{0x4D,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="144">{0x4D,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="145">{0x4D,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="146">{0x4D,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="147">{0x4D,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="148">{0x4D,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x4E,0x16,0x50,0x1E,0x02}</default>
+ <default index1="149">{0x4D,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="150">{0x4D,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x17,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="151">{0x4D,0x50,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="152">{0x4D,0x51,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="153">{0x4D,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="154">{0x4D,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="155">{0x4D,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="156">{0x4D,0x55,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="157">{0x4D,0x56,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5D,0x16,0xDA,0x16,0x50,0x14,0x00}</default>
+ <default index1="158">{0x4D,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="159">{0x4D,0x58,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="160">{0x4D,0x59,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x12,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x18,0x00}</default>
+ <default index1="161">{0x4D,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="162">{0x4E,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="163">{0x4E,0x43,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="164">{0x4E,0x45,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="165">{0x4E,0x46,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="166">{0x4E,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="167">{0x4E,0x49,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
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+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="168">{0x4E,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
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+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="169">{0x4E,0x4F,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="170">{0x4E,0x50,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x14,0x00}</default>
+ <default index1="171">{0x4E,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="172">{0x4E,0x55,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="173">{0x4E,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="174">{0x4F,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="175">{0x50,0x41,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="176">{0x50,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="177">{0x50,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="178">{0x50,0x47,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="179">{0x50,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="180">{0x50,0x4B,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="181">{0x50,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="182">{0x50,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="183">{0x50,0x4E,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="184">{0x50,0x52,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="185">{0x50,0x53,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="186">{0x50,0x54,0x02,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="187">{0x50,0x57,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="188">{0x50,0x59,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="189">{0x51,0x41,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1B,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x12}</default>
+ <default index1="190">{0x52,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="191">{0x52,0x4F,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="192">{0x52,0x53,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0xE6,0x14,0x28,0x17,0x10,
+ 0x5E,0x15,0x5D,0x16,0x14,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="193">{0x52,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="194">{0x52,0x57,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="195">{0x53,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x0E,0x00}</default>
+ <default index1="196">{0x53,0x42,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="197">{0x53,0x43,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="198">{0x53,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="199">{0x53,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="200">{0x53,0x47,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="201">{0x53,0x48,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="202">{0x53,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="203">{0x53,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="204">{0x53,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="205">{0x53,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="206">{0x53,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="207">{0x53,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02}</default>
+ <default index1="208">{0x53,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="209">{0x53,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="210">{0x53,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="211">{0x53,0x54,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="212">{0x53,0x56,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="213">{0x53,0x58,0x00,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="214">{0x53,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="215">{0x53,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="216">{0x54,0x43,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="217">{0x54,0x44,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="218">{0x54,0x46,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="219">{0x54,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0x28,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="220">{0x54,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="221">{0x54,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="222">{0x54,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="223">{0x54,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="224">{0x54,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="225">{0x54,0x4E,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02}</default>
+ <default index1="226">{0x54,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="227">{0x54,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="228">{0x54,0x54,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="229">{0x54,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="230">{0x54,0x57,0x01,
+ 0x60,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xDA,0x16,0x50,0x1E,0x00}</default>
+ <default index1="231">{0x54,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="232">{0x55,0x41,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x26,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="233">{0x55,0x47,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x1E,0x00}</default>
+ <default index1="234">{0x55,0x4D,0x00,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="235">{0x55,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="236">{0x55,0x59,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="237">{0x55,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02}</default>
+ <default index1="238">{0x56,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="239">{0x56,0x43,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="240">{0x56,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="241">{0x56,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="242">{0x56,0x49,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="243">{0x56,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="244">{0x56,0x55,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="245">{0x57,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1B,0x00}</default>
+ <default index1="246">{0x57,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0x28,0x1B,0x02,
+ 0x67,0x16,0xA3,0x16,0x28,0x1B,0x00}</default>
+ <default index1="247">{0x58,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="248">{0x59,0x45,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="249">{0x59,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="250">{0x5A,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="251">{0x5A,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="252">{0x5A,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- end of unifiRegulatoryTable -->
+ <!-- Operating Class information for all countries. -->
+ <config_element name="unifiOperatingClassTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>200</range_max>
+ <description_user>Index for unifiOperatingClassTable</description_user>
+ </config_element>
+ <config_element name="unifiOperatingClassParamters" psid="8015">
+ <description_user>Supported Operating Class parameters.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>1</range_min><range_max>73</range_max>
+ <table_name>unifiOperatingClassTable</table_name>
+ <default_list>
+ <default index1="1">{0x51,0x53,0x54,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7A,0x7B,0x7C,0x7D,0x7E,0x7F,0x80}</default> <!-- Global -->
+ <default index1="2">{0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x11,0x80}</default> <!-- Europe -->
+ <default index1="3">{0x01,0x02,0x03,0x04,0x05,0x0C,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F,0x20,0x21,0x80}</default> <!-- US -->
+ <default index1="4">{0x01,0x1E,0x20,0x21,0x22,0x24,0x25,0x27,0x29,0x2A,0x2C,0x38,0x39,0x3A,0x80}</default> <!-- Japan -->
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- end of unifiOperatingClassTable -->
+ <config_element name="unifiScanParametersTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>20</range_max>
+ <description_user>Index for unifiScanParametersTable. Index is a Scan_Type as defined in FAPI. </description_user>
+ </config_element>
+ <config_element name="unifiScanParameters" psid="2154">
+ <description_user>Scan parameters.
+ Each row of the table contains 2 entries for a scan: first entry when there is 0 registered VIFs, second - when there is 1 or more registered VIFs.
+ Entry has the following structure:
+ octet 0 - Scan priority (uint8)
+ octet 1 - Scan Flags (uint8) (see unifiScanFlags)
+ bit 0 - Enable Early Channel Exit (bool)
+ bit 1 - Disable Scan (bool)
+ bit 2 - Enable NCHO (bool)
+ bit 3 - Enable MAC Randomization (bool)
+ octet 2 ~ 3 - Probe Interval in Time Units (uint16)
+ octet 4 ~ 5 - Max Active Channel Time in Time Units (uint16)
+ octet 6 ~ 7 - Max Passive Channel Time in Time Units (uint16)
+ octet 8 - Scan Policy (uint8)
+ Size of each entry is 9 octets, row size is 18 octets. A Time Units value specifies a time interval as a multiple of TU (1024 us).</description_user>
+ <type>octet_string</type>
+ <range_min>18</range_min><range_max>18</range_max>
+ <table_name>unifiScanParametersTable</table_name>
+ <default_list>
+ <!-- Initial scan
+ 0 VIFS: 6 flags 24TU 58TU 102TU
+ >= 1 VIFS (no such thing as initial scan with >= 1 VIFS):
+ 6 flags 24TU 58TU 102TU -->
+ <default index1="1">{ 0x06, 0x09, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Full scan
+ 0 VIFS: 6 flags 68TU 146TU 117TU
+ >= 1 VIFS: 6 flags 24TU 58TU 102TU -->
+ <default index1="2">{ 0x06, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Scheduled scan
+ 0 VIFS: 2 flags 68TU 146TU 117TU
+ = 1 VIFS: 2 flags 24TU 58TU 102TU -->
+ <default index1="3">{ 0x02, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x02, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- P2P full scan
+ 0 VIFS: 6 flags 24TU 68TU 102TU
+ >= 1 VIFS: 6 flags 24TU 50TU 102TU -->
+ <default index1="4">{ 0x06, 0x09, 0x18,0x00, 0x44,0x00, 0x66,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x32,0x00, 0x66,0x00, 0x00}</default>
+ <!-- P2P social scan
+ 0 VIFS: 6 flags 24TU 68TU N/A
+ >= 1 VIFS: 6 flags 24TU 50TU N/A -->
+ <default index1="5">{ 0x06, 0x08, 0x18,0x00, 0x44,0x00, 0x00,0x00, 0x00,
+ 0x06, 0x00, 0x18,0x00, 0x32,0x00, 0x00,0x00, 0x00}</default>
+ <!-- OBSS scan
+ 0 VIFS: 4 flags 24TU 58TU N/A
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="6">{ 0x04, 0x09, 0x18,0x00, 0x3A,0x00, 0x00,0x00, 0x00,
+ 0x04, 0x01, 0x18,0x00, 0x3A,0x00, 0x00,0x00, 0x00}</default>
+ <!-- AP Auto Channel Selection scan
+ 0 VIFS: 4 flags 24TU 39TU N/A
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="7">{ 0x04, 0x09, 0x18,0x00, 0x27,0x00, 0x00,0x00, 0x00,
+ 0x04, 0x01, 0x18,0x00, 0x27,0x00, 0x00,0x00, 0x00}</default>
+ <!-- PNO scan
+ 0 VIFS: 0 flags 68TU 146TU 117TU
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="8">{ 0x00, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x00, 0x01, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00}</default>
+ <!-- GSCAN
+ 0 VIFS: 2 flags 68TU 146TU 117TU
+ >= 1 VIFS: 2 flags 24TU 58TU 102TU -->
+ <default index1="9">{ 0x02, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x02, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Measurement scan
+ 0 VIFS (no scan with 0 VIFS):
+ >= 1 VIFS: 3 flags 24TU 58TU 102TU -->
+ <default index1="10">{0x03, 0x09, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x80,
+ 0x03, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x80}</default>
+ <!-- Soft Cached Roaming scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU Any_RA -->
+ <default index1="11">{0x04, 0x0C, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04,
+ 0x04, 0x04, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Soft All Roaming scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU Any_RA -->
+ <default index1="12">{0x04, 0x09, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04,
+ 0x04, 0x01, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Hard Cached Roaming scan
+ 0 VIFS NA: 8 flags 39TU 98TU 117TU
+ >= 1 VIFS: 8 flags 39TU 98TU 117TU Any_RA -->
+ <default index1="13">{0x08, 0x08, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04,
+ 0x08, 0x00, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Hard All Roaming scan
+ 0 VIFS NA: 8 flags 39TU 98TU 117TU
+ >= 1 VIFS: 8 flags 39TU 98TU 117TU Any_RA -->
+ <default index1="14">{0x08, 0x08, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04,
+ 0x08, 0x00, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04}</default>
+ <!-- OBSS Internal scan
+ 0 VIFS NA: 3 flags 5TU 20TU 100TU
+ >= 1 VIFS 3 flags 5TU 20TU 100TU -->
+ <default index1="15">{0x03, 0x09, 0x05,0x00, 0x14,0x00, 0x64,0x00, 0x00,
+ 0x03, 0x01, 0x05,0x00, 0x14,0x00, 0x64,0x00, 0x00}</default>
+ <!-- NAN scan
+ 0 VIFS NA: 3 flags N/A N/A 200TU
+ >= 1 VIFS: 3 flags N/A N/A 200TU Passive -->
+ <default index1="16">{0x03, 0x08, 0x00,0x00, 0x00,0x00, 0xC8,0x00, 0x01,
+ 0x03, 0x00, 0x00,0x00, 0x00,0x00, 0xC8,0x00, 0x01}</default>
+ <!-- FTM Neighbour scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU -->
+ <default index1="17">{0x04, 0x08, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x00,
+ 0x04, 0x00, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x00}</default>
+ <!-- Dummy Entry -->
+ <default index1="18">{0x00, 0x09, 0x02,0x03, 0x04,0x05, 0x06,0x07, 0x08,
+ 0x09, 0x08, 0x07,0x06, 0x05,0x04, 0x03,0x02, 0x01}</default> </default_list>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="dot11TDLSPeerUAPSDBufferSTAActivated" psid="2587">
+ <description_user>Activate TDLS peer U-APSD.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11TDLSPeerUAPSDIndicationWindow" psid="53">
+ <description_user>The minimum time after the last TPU SP, before a RAME_TPU_SP indication can be issued.</description_user>
+ <type>uint16</type>
+ <units>beacon intervals</units>
+ <default>1</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11TDLSDiscoveryRequestWindow" psid="2565">
+ <description_user>Time to gate Discovery Request frame (in DTIM intervals) after transmitting a Discovery Request frame.</description_user>
+ <type>uint32</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11TDLSResponseTimeout" psid="2566">
+ <description_user>If a valid Setup Response frame is not received within (seconds),
+ the initiator STA shall terminate the setup procedure and discard any Setup Response frames.</description_user>
+ <type>uint32</type>
+ <default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsActivated" psid="2558">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Activate TDLS.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsInP2pActivated" psid="2556">
+ <description_user>Activate TDLS in P2P.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsWiderBandwidthProhibited" psid="2569">
+ <description_user>Wider bandwidth prohibited flag.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTPThresholdPktSecs" psid="2559">
+ <description_user>Used for "throughput_threshold_pktsecs" of RAME-MLME-ENABLE-PEER-TRAFFIC-REPORTING.request.</description_user>
+ <type>uint32</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsRssiThreshold" psid="2560">
+ <description_user>FW initiated TDLS Discovery/Setup procedure.
+ If the RSSI of a received TDLS Discovery Response frame is greater than this value, initiate the TDLS Setup procedure.</description_user>
+ <type>int16</type>
+ <default>-75</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTPMonitorSecs" psid="2562">
+ <description_user>Measurement period for recording the number of packets sent to a peer over a TDLS link.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsKeyLifeTimeInterval" psid="2577">
+ <description_user>Build the Key Lifetime Interval in the TDLS Setup Request frame.</description_user>
+ <type>uint32</type>
+ <default>0x000FFFFF</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTeardownFrameTxTimeout" psid="2578">
+ <description_user>Allowed time in milliseconds for a Teardown frame to be transmitted.</description_user>
+ <type>uint16</type>
+ <default>500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiWifiSharingActivated" psid="2580">
+ <description_user>Activate WiFi Sharing feature</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiWiFiSharing5GHzChannel" psid="2582">
+ <description_user>Applicable 5GHz Primary Channels mask. Defined in a uint64 represented by the octet string.
+ First byte of the octet string maps to LSB. Bits 0-13 representing 2.4G channels are always set to 0. Mapping defined in ChannelisationRules; i.e. Bit 14 maps to channel 36.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max><default>{ 0x00, 0xC0, 0xFF, 0xFF, 0x7F, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiWifiSharingChannelSwitchCount" psid="2583"><!-- ap --><!-- sta -->
+ <description_user>Channel switch announcement count which will be used in the Channel announcement IE when using wifi sharing</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <range_min>3</range_min><range_max>10</range_max>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiChannelAnnouncementCount" psid="2584"><!-- ap -->
+ <description_user>Channel switch announcement count which will be used in the Channel announcement IE</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiStaChannelSwitchSlowApActivated" psid="2601">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: ChanelSwitch: Activate waiting for a slow AP.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApMaxTime" psid="2604">
+ <description_user>ChannelSwitch delay for Slow APs. In Seconds.</description_user>
+ <type>uint32</type>
+ <default>70</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApPollInterval" psid="2605">
+ <description_user>ChannelSwitch polling interval for Slow APs. In Seconds.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApProcedureTimeoutIncrement" psid="2606">
+ <description_user>ChannelSwitch procedure timeout increment for Slow APs. In Seconds.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiRATestStoredSA" psid="2585">
+ <description_user>Test only: Source address of router contained in virtural router advertisement packet, specified in chapter '6.2 Forward Received RA frame to Host' in SC-506393-TE</description_user>
+ <type>octet_string</type>
+ <default>0x00000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRATestStoreFrame" psid="2586">
+ <description_user>Test only: Virtual router advertisement packet. Specified in chapter '6.2 Forward Received RA frame to Host' in SC-506393-TE</description_user>
+ <type>octet_string</type>
+ <default>0x00000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSupportedChannels" psid="8012">
+ <description_user>Supported 20MHz channel centre frequency grouped in sub-bands. For each sub-band: starting channel number, followed by number of channels</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>20</range_max><default> {0x01,0x0d,0x24,0x04,0x34,0x04,0x64,0x0c,0x95,0x05} </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDefaultCountry" psid="8013">
+ <description_user>Hosts sets the Default Code. </description_user>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>3</range_max>
+ <function_list>
+ <function type="set" function_name="mibdefaultcountryupdate" is_for_vif="false"></function>
+ </function_list>
+ <table_name>unifiDefaultCountryTable</table_name>
+ <!-- <default>{0x30, 0x30, 0x20}</default> World-->
+ <!-- <default>{0x55, 0x53, 0x20}</default> US-->
+ <!-- <default>{0x4B, 0x52, 0x20}</default> KR-->
+ <default_list>
+ <!-- Default country code. -->
+ <default index1="1">{ 0x30, 0x30, 0x20 } </default>
+ <!-- Only here because MIB Table with one row is not permitted. -->
+ <default index1="2">{ 0x00, 0x01, 0x02 } </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDefaultCountryWithoutCH12CH13" psid="8020">
+ <description_user>Update the default country code to ensure CH12 and CH13 are not used.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCountryList" psid="8014">
+ <description_user>Defines the ordered list of countries present in unifiRegulatoryTable. Each country is coded as 2 ASCII characters. If unifiRegulatoryTable is modified, such as a country is either added, deleted or its relative location is modified, has to be updated as well.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>270</range_max>
+ <default>
+
+{ 0x30, 0x30, 0x58, 0x58, 0x41, 0x44, 0x41, 0x45, 0x41, 0x46, 0x41, 0x47, 0x41, 0x49, 0x41, 0x4c, 0x41, 0x4d, 0x41, 0x4e, 0x41, 0x4f, 0x41, 0x51, 0x41, 0x52, 0x41, 0x53, 0x41, 0x54, 0x41, 0x55, 0x41, 0x57, 0x41, 0x58, 0x41, 0x5a, 0x42, 0x41, 0x42, 0x42, 0x42, 0x44, 0x42, 0x45, 0x42, 0x46, 0x42, 0x47, 0x42, 0x48, 0x42, 0x49, 0x42, 0x4a, 0x42, 0x4c, 0x42, 0x4d, 0x42, 0x4e, 0x42, 0x4f, 0x42, 0x52, 0x42, 0x53, 0x42, 0x54, 0x42, 0x56, 0x42, 0x57, 0x42, 0x59, 0x42, 0x5a, 0x43, 0x41, 0x43, 0x43, 0x43, 0x44, 0x43, 0x46, 0x43, 0x47, 0x43, 0x48, 0x43, 0x49, 0x43, 0x4b, 0x43, 0x4c, 0x43, 0x4d, 0x43, 0x4e, 0x43, 0x4f, 0x43, 0x52, 0x43, 0x55, 0x43, 0x56, 0x43, 0x58, 0x43, 0x59, 0x43, 0x5a, 0x44, 0x45, 0x44, 0x4a, 0x44, 0x4b, 0x44, 0x4d, 0x44, 0x4f, 0x44, 0x5a, 0x45, 0x43, 0x45, 0x45, 0x45, 0x47, 0x45, 0x48, 0x45, 0x52, 0x45, 0x53, 0x45, 0x54, 0x46, 0x49, 0x46, 0x4a, 0x46, 0x4b, 0x46, 0x4c, 0x46, 0x4d, 0x46, 0x4f, 0x46, 0x52, 0x47, 0x41, 0x47, 0x42, 0x47, 0x44, 0x47, 0x45, 0x47, 0x46, 0x47, 0x47, 0x47, 0x48, 0x47, 0x49, 0x47, 0x4c, 0x47, 0x4d, 0x47, 0x4e, 0x47, 0x50, 0x47, 0x51, 0x47, 0x52, 0x47, 0x53, 0x47, 0x54, 0x47, 0x55, 0x47, 0x57, 0x47, 0x59, 0x48, 0x4b, 0x48, 0x4d, 0x48, 0x4e, 0x48, 0x52, 0x48, 0x54, 0x48, 0x55, 0x49, 0x44, 0x49, 0x45, 0x49, 0x4c, 0x49, 0x4d, 0x49, 0x4e, 0x49, 0x4f, 0x49, 0x51, 0x49, 0x52, 0x49, 0x53, 0x49, 0x54, 0x4a, 0x45, 0x4a, 0x4d, 0x4a, 0x4f, 0x4a, 0x50, 0x4b, 0x45, 0x4b, 0x47, 0x4b, 0x48, 0x4b, 0x49, 0x4b, 0x4d, 0x4b, 0x4e, 0x4b, 0x50, 0x4b, 0x52, 0x4b, 0x57, 0x4b, 0x59, 0x4b, 0x5a, 0x4c, 0x41, 0x4c, 0x42, 0x4c, 0x43, 0x4c, 0x49, 0x4c, 0x4b, 0x4c, 0x52, 0x4c, 0x53, 0x4c, 0x54, 0x4c, 0x55, 0x4c, 0x56, 0x4c, 0x59, 0x4d, 0x41, 0x4d, 0x43, 0x4d, 0x44, 0x4d, 0x45, 0x4d, 0x46, 0x4d, 0x47, 0x4d, 0x48, 0x4d, 0x4b, 0x4d, 0x4c, 0x4d, 0x4d, 0x4d, 0x4e, 0x4d, 0x4f, 0x4d, 0x50, 0x4d, 0x51, 0x4d, 0x52, 0x4d, 0x53, 0x4d, 0x54, 0x4d, 0x55, 0x4d, 0x56, 0x4d, 0x57, 0x4d, 0x58, 0x4d, 0x59, 0x4d, 0x5a, 0x4e, 0x41, 0x4e, 0x43, 0x4e, 0x45, 0x4e, 0x46, 0x4e, 0x47, 0x4e, 0x49, 0x4e, 0x4c, 0x4e, 0x4f, 0x4e, 0x50, 0x4e, 0x52, 0x4e, 0x55, 0x4e, 0x5a, 0x4f, 0x4d, 0x50, 0x41, 0x50, 0x45, 0x50, 0x46, 0x50, 0x47, 0x50, 0x48, 0x50, 0x4b, 0x50, 0x4c, 0x50, 0x4d, 0x50, 0x4e, 0x50, 0x52, 0x50, 0x53, 0x50, 0x54, 0x50, 0x57, 0x50, 0x59, 0x51, 0x41, 0x52, 0x45, 0x52, 0x4f, 0x52, 0x53, 0x52, 0x55, 0x52, 0x57, 0x53, 0x41, 0x53, 0x42, 0x53, 0x43, 0x53, 0x44, 0x53, 0x45, 0x53, 0x47, 0x53, 0x48, 0x53, 0x49, 0x53, 0x4a, 0x53, 0x4b, 0x53, 0x4c, 0x53, 0x4d, 0x53, 0x4e, 0x53, 0x4f, 0x53, 0x52, 0x53, 0x53, 0x53, 0x54, 0x53, 0x56, 0x53, 0x58, 0x53, 0x59, 0x53, 0x5a, 0x54, 0x43, 0x54, 0x44, 0x54, 0x46, 0x54, 0x47, 0x54, 0x48, 0x54, 0x4a, 0x54, 0x4b, 0x54, 0x4c, 0x54, 0x4d, 0x54, 0x4e, 0x54, 0x4f, 0x54, 0x52, 0x54, 0x54, 0x54, 0x56, 0x54, 0x57, 0x54, 0x5a, 0x55, 0x41, 0x55, 0x47, 0x55, 0x4d, 0x55, 0x53, 0x55, 0x59, 0x55, 0x5a, 0x56, 0x41, 0x56, 0x43, 0x56, 0x45, 0x56, 0x47, 0x56, 0x49, 0x56, 0x4e, 0x56, 0x55, 0x57, 0x46, 0x57, 0x53, 0x58, 0x4b, 0x59, 0x45, 0x59, 0x54, 0x5a, 0x41, 0x5a, 0x4d, 0x5a, 0x57 }
+ </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVifCountry" psid="8016">
+ <description_user>Per VIf: Each VIF updates its Country Code for the Host to read</description_user>
+ <type>octet_string</type>
+ <function_list>
+ <function type="get" function_name="mibosget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiStationQosInfo" psid="2517">
+ <description_user>QoS capability for a non-AP Station, and is encoded as per IEEE 802.11 QoS Capability.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBeaconSkippingControl" psid="2521">
+ <description_user>Control beacon skipping behaviour within firmware with bit flags. 1 defines enabled,
+ with 0 showing the case disabled. If beacon skipping is enabled, further determine if DTIM beacons can
+ be skipped, or only non-DTIM beacons. The following applies:
+ bit 0: station skipping on host suspend
+ bit 1: station skipping on host awake
+ bit 2: station skipping on LCD on
+ bit 3: station skipping with multivif
+ bit 4: station skipping with BT active.
+ bit 8: station skip dtim on host suspend
+ bit 9: station skip dtim on host awake
+ bit 10: station skip dtim on LCD on
+ bit 11: station skip dtim on multivif
+ bit 12: station skip dtim with BT active
+ bit 16: p2p-gc skipping on host suspend
+ bit 17: p2p-gc skipping on host awake
+ bit 18: p2p-gc skipping on LCD on
+ bit 19: p2p-gc skipping with multivif
+ bit 20: p2p-gc skipping with BT active
+ bit 24: p2p-gc skip dtim on host suspend
+ bit 25: p2p-gc skip dtim on host awake
+ bit 26: p2p-gc skip dtim on LCD on
+ bit 27: p2p-gc skip dtim on multivif
+ bit 28: p2p-gc skip dtim with BT active
+ </description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00010103</default>
+ <type>uint32</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenIntervalSkippingDTIM" psid="2518">
+ <description_user>Listen interval of beacons when in single-vif power saving mode,receiving DTIMs is enabled and idle mode disabled.
+ No DTIMs are skipped during MVIF operation. A maximum of the listen interval beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for STA VIF, connected to an AP. For P2P group client intervals, refer to unifiP2PListenIntervalSkippingDTIM, PSID=2523.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x000A89AA</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiP2PListenIntervalSkippingDTIM" psid="2523">
+ <description_user>Listen interval of beacons when in single-vif, P2P client power saving mode,receiving DTIMs and idle mode disabled.
+ No DTIMs are skipped during MVIF operation. A maximum of (listen interval - 1) beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for P2P group client. For STA connected to an AP, refer to unifiListenIntervalSkippingDTIM, PSID=2518.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00000002</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdlemodeListenIntervalSkippingDTIM" psid="2495">
+ <description_user>Listen interval of beacons when in single-vif power saving mode, receiving DTIMs is enabled and idle mode enabled.
+ No DTIMs are skipped during MVIF operation. A maximum of the listen interval beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for STA VIF, connected to an AP. For P2P group client intervals, refer to unifiIdlemodeP2PListenIntervalSkippingDTIM, PSID=2496.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00054645</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdlemodeP2PListenIntervalSkippingDTIM" psid="2496">
+ <description_user>Listen interval of beacons when in single-vif, P2P client power saving mode,receiving DTIMs and idle mode enabled.
+ No DTIMs are skipped during MVIF operation. A maximum of (listen interval - 1) beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for P2P group client. For STA connected to an AP, refer to unifiIdlemodeListenIntervalSkippingDTIM, PSID=2495.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00000002</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenIntervalMaxTime" psid="2530">
+ <description_user>Maximum number length of time, in Time Units (1TU = 1024us), that can be used as a beacon listen interval. This will limit how many beacons maybe skipped, and affects
+ the DTIM beacon skipping count; DTIM skipping (if enabled) will be such that skipped count = (unifiListenIntervalMaxTime / DTIM_period).</description_user>
+ <range_min>0</range_min><range_max>65535</range_max><default>1000</default>
+ <units>TU</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenInterval" psid="2519">
+ <description_user>Association request listen interval parameter in beacon intervals. Not used for any other purpose.</description_user>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBeaconsReceivedPercentage" psid="2245">
+ <description_user>Percentage of beacons received, calculated as received / expected. The percentage is scaled to an integer value between 0 (0%) and 1000 (100%).</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiHtCapabilities" psid="2032">
+ <description_user>Only applies to 2G connections. HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0xef, 0x0a, 0x17, 0xff, 0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHtCapabilities5G" psid="2026">
+ <description_user>This should only be set to 0. It is only required if 5G and 2G require different capabilities. Has the same format as unifiHtCapabilities. Any non-zero values must be set in HTF files only. HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHtCapabilitiesSoftAp" psid="2028">
+ <description_user>HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0xef, 0x0a, 0x17, 0xff, 0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVhtCapabilities" psid="2540">
+ <description_user>Only applies to 2G connections. VHT capabilities of the chip. see SC-503520-SP.</description_user>
+ <type>octet_string</type>
+ <range_min>12</range_min><range_max>12</range_max><default>{ 0xb1, 0x7a, 0x11, 0x03, 0xfa, 0xff, 0x00, 0x00, 0xfa, 0xff, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVhtCapabilities5G" psid="2027">
+ <description_user>This should only be set to 0. It is only required if 5G and 2G require different capabilities. Has the same format as unifiVhtCapabilities. Any non-zero values must be set in HTF files only. VHT capabilities of the chip. see SC-503520-SP.</description_user>
+ <type>octet_string</type>
+ <range_min>12</range_min><range_max>12</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseTimeOut" psid="2080"><!-- ap --><!-- conmgr -->
+ <description_user>Timeout, in TU, to wait for a frame(Auth, Assoc, ReAssoc) after Rame replies to a send frame request</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>500</range_max><default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseCfmTxLifetimeTimeOut" psid="2084">
+ <description_user>Timeout, in TU, to wait to retry a frame (Auth, Assoc, ReAssoc) after TX Cfm trasnmission_status = TxLifetime.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseCfmFailureTimeOut" psid="2085">
+ <description_user>Timeout, in TU, to wait to retry a frame (Auth, Assoc, ReAssoc) after TX Cfm trasnmission_status != Successful | TxLifetime.</description_user>
+ <type>uint16</type>
+ <default>40</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiConnectionFailureTimeout" psid="2081">
+ <description_user>Timeout, in TU, for a frame retry before giving up.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>20000</range_max><default>10000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiConnectingProbeTimeout" psid="2082">
+ <description_user>How long, in TU, to wait for a ProbeRsp when syncronising before resending a ProbeReq</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDisconnectTimeout" psid="2083"><!-- ap --><!-- conmgr -->
+ <description_user>Timeout, in milliseconds, to perform a disconnect or disconnect all STAs (triggered by MLME_DISCONNECT-REQ or MLME_DISCONNECT-REQ 00:00:00:00:00:00) before responding with MLME-DISCONNECT-IND and aborting the disconnection attempt. This is particulary important when a SoftAP is attempting to disconnect associated stations which might have "silently" left the ESS.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>3000</range_max><default>1500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiForceActiveDuration" psid="2086">
+ <description_user>How long, in milliseconds, the firmware temporarily extends PowerSave for STA as a workaround for wonky APs such as D-link.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>1000</range_max><default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaTxEnableTid" psid="2221">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Configure Block Ack TX on a per-TID basis. Bit mask is two bits per TID (B1 = autosetup, B0 = enable).</description_user>
+ <type>uint32</type>
+ <!--
+ B1 = auto-setup BA TX
+ B0 = enable BA TX
+
+ P15 .. P7 P6 P5 P4 P3 P2 P1 P0
+ 00 00 00 01 01 01 01 01 11 = 0x557
+ -->
+ <default>0x0557</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaRxEnableTid" psid="2219">
+ <description_user>Configure Block Ack RX on a per-TID basis. Bit mask is two bits per TID (B1 = Not Used, B0 = enable).</description_user>
+ <type>uint32</type>
+ <!--
+ B0 = enable BA RX
+
+ P15 .. P7 P6 P5 P4 P3 P2 P1 P0
+ 00 00 01 01 01 01 01 01 01 = 0x1555
+ -->
+ <default>0x1555</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaConfig" psid="2225">
+ <description_user>Block Ack Configuration. It is composed of A-MSDU supported, TX MPDU per A-MPDU, RX Buffer size, TX Buffer size and Block Ack Timeout. </description_user>
+ <!--
+ a_msdu_supported = (bool) BA_MIB_A_MSDU_IN_A_MPDU_SUPPORTED_POS & BA_MIB_A_MSDU_IN_A_MPDU_SUPPORTED_MASK);
+ rx_buffer_size = (uint8) BA_MIB_RX_BUFFER_SIZE_POS & BA_MIB_RX_BUFFER_SIZE_MASK);
+ timeout = (uint16) BA_MIB_TIMEOUT_POS & BA_MIB_TIMEOUT_MASK << 8);
+ -->
+ <type>uint32</type>
+ <default>0x3fff01</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaTxMaxNumber" psid="2226">
+ <description_user>Block Ack Configuration. Maximum number of BAs. Limited by HW. </description_user>
+ <type>uint16</type>
+ <default>0x10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMoveBKtoBE" psid="2227">
+ <description_user> Deprecated. Golden Certification MIB don't delete, change PSID or name </description_user>
+ <access_rights>read_write</access_rights>
+ <type>boolean</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSupportedDataRates" psid="2041">
+ <description_user>Defines the supported non-HT data rates. It is encoded as N+1 octets where the first octet is N and the subsequent octets each describe a single supported rate.</description_user>
+ <access_rights>read_only</access_rights>
+ <units>500 kbps</units>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>16</range_max><default>{ 0x02, 0x04, 0x0b, 0x0c, 0x12, 0x16, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c }
+ </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDualBandConcurrency" psid="6123">
+ <description_user>Identify whether the chip supports dualband concurrency or not (RSDB vs. VSDB). Set in the respective platform htf file.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiApOlbcDuration" psid="2076">
+ <description_user>How long, in milliseconds, the AP enables reception of BEACON frames to perform Overlapping Legacy BSS Condition(OLBC). If set to 0 then OLBC is disabled.</description_user>
+ <type>uint16</type>
+ <default>300</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiApOlbcInterval" psid="2077">
+ <description_user>How long, in milliseconds, between periods of receiving BEACON frames to perform Overlapping Legacy BSS Condition(OLBC). This value MUST exceed the OBLC duration MIB unifiApOlbcDuration. If set to 0 then OLBC is disabled.</description_user>
+ <type>uint16</type>
+ <default>2000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDNSSupportActivated" psid="2078">
+ <description_user>This MIB activates support for transmitting DNS frame via MLME.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMaxClient" psid="2550">
+ <description_user>Restricts the maximum number of associated STAs for SoftAP.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>10</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPMFAssociationComebackTimeDelta" psid="6050">
+ <description_user>Timeout interval, in TU, for the TimeOut IE in the SA Query request frame. </description_user>
+ <type>uint32</type>
+ <default>1100</default>
+ <nature>software</nature><module>mlme</module><!-- ap -->
+ </config_element>
+ <config_element name="unifiDefaultDwellTime" psid="2538">
+ <description_user>Dwell time, in TU, for frames that need a response but have no dwell time associated</description_user>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <!-- GO protection during scan -->
+ <config_element name="unifiGOScanAbsenceDuration" psid="2548">
+ <description_user>Duration of the Absence time to use when protecting P2PGO VIFs from scan operations. A value of 0 disables the feature.</description_user>
+ <default>7</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiGOScanAbsencePeriod" psid="2549">
+ <description_user>Period of the Absence/Presence times cycles to use when protecting P2PGO VIFs from scan operations.</description_user>
+ <default>14</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <!-- AP protection during scan -->
+ <config_element name="unifiAPScanAbsenceDuration" psid="2480">
+ <description_user>Duration of the Absence time to use when protecting AP VIFs from scan operations. A value of 0 disables the feature.</description_user>
+ <default>7</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAPScanAbsencePeriod" psid="2481">
+ <description_user>Period of the Absence/Presence times cycles to use when protecting AP VIFs from scan operations.</description_user>
+ <default>14</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <!-- VHT Activation Control Elements -->
+ <config_element name="unifiVhtActivated" psid="2045">
+ <description_user>Activate VHT mode.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of VHT Activation Control Elements -->
+ <config_element name="unifiTqamActivated" psid="2235">
+ <description_user>Activate Vendor VHT IE for 256-QAM mode on 2.4GHz.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of TQAM / Vendor VHT IE -->
+ <!-- HT Activation Control Elements -->
+ <config_element name="unifiHtActivated" psid="2046">
+ <description_user>Activate HT mode.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of HT Activation Control Elements -->
+ <config_element name="unifiWipsActivated" psid="5050">
+ <description_user>Activate Wips.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSoftAp40MHzOn24G" psid="2029">
+ <description_user>Enables 40MHz operation on 2.4GHz band for SoftAP.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifi24G40MHZChannels" psid="2035">
+ <description_user>Enables 40Mz wide channels in the 2.4G band for STA.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxUsingLdpcActivated" psid="5030">
+ <description_user>LDPC will be used to code packets, for transmit only. If disabled, chip will not send LDPC coded packets even if peer supports it. To advertise reception of LDPC coded packets,enable bit 0 of unifiHtCapabilities, and bit 4 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI20Activated" psid="5040">
+ <description_user>SGI 20MHz will be used to code packets for transmit only. If disabled, chip will not send SGI 20MHz packets even if peer supports it. To advertise reception of SGI 20MHz packets, enable bit 5 of unifiHtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI40Activated" psid="5041">
+ <description_user>SGI 40MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 40MHz packets even if peer supports it. To advertise reception of SGI 40MHz packets, enable bit 6 of unifiHtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI80Activated" psid="5042">
+ <description_user>SGI 80MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 80MHz packets even if peer supports it. To advertise reception of SGI 80MHz packets, enable bit 5 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI160Activated" psid="5043">
+ <description_user>SGI 160/80+80MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 160/80+80MHz packets even if peer supports it. To advertise reception of SGI 160/80+80MHz packets, enable bit 6 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacAddressRandomisation" psid="5044">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enabling Mac Address Randomisation to be applied for Probe Requests when scanning.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacAddressRandomisationMask" psid="5047">
+ <description_user>FW randomises MAC Address bits that have a corresponding bit set to 0 in the MAC Mask for Probe Requests. This excludes U/L and I/G bits which will be set to Local and Individual respectively.</description_user>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>6</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacSequenceNumberRandomisationActivated" psid="2020">
+ <description_user>Enabling Sequence Number Randomisation to be applied for Probe Requests when scanning. Note: Randomisation only happens, if mac address gets randomised.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <!-- Start of roaming-relevant MIBs -->
+ <config_element name="unifiRoamingActivated" psid="2049">
+ <description_user>Activate Roaming functionality</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiScanTrigger" psid="2050">
+ <description_user>The RSSI value, in dBm, below which roaming scan shall start. </description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-75</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiScanNoCandidateDeltaTrigger" psid="2064">
+ <description_user>The value, in dBm, by which unifiRoamRssiScanTrigger is lowered when no roaming candidates are found. </description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <range_min>1</range_min><range_max>255</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamDeltaTrigger" psid="2051">
+ <description_user>Hysteresis value, in dBm, for UnifiRoamRssiScanTrigger and unifiRoamCUScanTrigger. i.e.: If the current AP RSSI is greater than UnifiRoamRssiScanTrigger + UnifiRoamRssiDeltaTrigger, soft roaming scan can be terminated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCachedChannelScanPeriod" psid="2052">
+ <description_user>The scan period for cached channels background roaming (microseconds)</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>20000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="UnifiRoamTrackingScanPeriod" psid="2299">
+ <description_user>The scan period for tracking not yet suitable candidate(s)(microseconds)</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>5000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamConnectionQualityCheckWaitAfterConnect" psid="2506">
+ <description_user>The amount of time a STA will wait after connection before starting to check the MLME-installed connection quality trigger thresholds</description_user>
+ <type>uint16</type>
+ <units>ms</units>
+ <default>200</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRoamScanBand" psid="2055">
+ <description_user>Indicates whether only intra-band or all-band should be used for roaming scan. 2 - Roaming across band 1 - Roaming within band</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>2</range_max><default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamFullChannelScanFrequency" psid="2058">
+ <description_user>Every how many cached channel scans run a full channel scan. </description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>9</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamMode" psid="2060">
+ <description_user>Enable/Disable host resume when roaming. 0: Wake up the host all the time. 1: Only wakeup the host if the AP is not white-listed. 2: Don't wake up the host.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max><default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamEAPTimeout" psid="2065">
+ <description_user>Timeout, in ms, for receiving the first EAP/EAPOL frame from the AP during roaming</description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRSSIBoost" psid="2298">
+ <description_user>The value in dBm of the RSSI boost for each band</description_user>
+ <type>int16</type>
+ <table_name>unifiRoamRSSIBoostTable</table_name>
+ <default_list>
+ <default index1="1">0</default>
+ <default index1="2">0</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCuLocal" psid="2300">
+ <description_user>Channel utilisation for the STA VIF, value 255=100% channel utilisation. - used for roaming</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max><default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRoamCUScanNoCandidateDeltaTrigger" psid="2301">
+ <description_user>The delta, in percentage points, to apply to unifiRoamCUScanTrigger when no candidate found during first cycle of cached channel soft scan, triggered by channel utilization.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>15</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamAPSelectDeltaFactor" psid="2302">
+ <description_user>How much higher, in percentage points, does a candidate's score needs to be in order be considered an eligible candidate? A "0" value renders all candidates eligible. Please note this applies only to soft roams.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>20</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUWeight" psid="2303">
+ <description_user>Weight of CUfactor, in percentage points, in AP selection algorithm.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>35</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUFactor" psid="2295">
+ <description_user>Bi dimensional octet string table for allocating CUfactor to CU values. First index is the radio band, and the second will be CU table entry.
+ The tables define the maximum CU value to which the values do apply(MAX CU), an OFFSET and an A value for the equation:
+ CUfactor = OFFSET - A*(CU)/10
+ </description_user>
+ <type>octet_string</type>
+ <table_name>unifiRoamCUFactorTable</table_name>
+ <default_list>
+ <default index1="1">{0x09, 0x64, 0x00}</default>
+ <default index1="2">{0x45, 0x6F, 0x0D}</default>
+ <default index1="3">{0x65, 0x14, 0x00}</default>
+ <default index1="4">{0x1D, 0x64, 0x00}</default>
+ <default index1="5">{0x4F, 0x94, 0x10}</default>
+ <default index1="6">{0x65, 0x14, 0x00}</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiweight" psid="2305">
+ <description_user>Weight of RSSI factor, in percentage points, in AP selection algorithm.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>65</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiFactor" psid="2306">
+ <description_user>Table allocating RSSIfactor to RSSI values range.</description_user>
+ <type>octet_string</type>
+ <table_name>unifiRoamRssiFactorTable</table_name>
+ <default_list>
+ <default index1="1">{0xC9, 0x64, 0x00, 0x00}</default>
+ <default index1="2">{0xC4, 0x5A, 0x02, 0x3C}</default>
+ <default index1="3">{0xBA, 0x3C, 0x03, 0x46}</default>
+ <default index1="4">{0xB0, 0x14, 0x04, 0x50}</default>
+ <default index1="5">{0xA6, 0x00, 0x02, 0x5A}</default>
+ <default index1="6">{0x81, 0x00, 0x00, 0x00}</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRSSICURoamScanTrigger" psid="2307">
+ <description_user>The current channel Averaged RSSI value below which a soft roaming scan shall initially start, providing high channel utilisation (see unifiRoamCUScanTrigger). This is a table indexed by frequency band.</description_user>
+ <type>int16</type>
+ <table_name>unifiRSSICURoamScanTriggerTable</table_name>
+ <default_list>
+ <default index1="1"> -60 </default>
+ <default index1="2"> -70 </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUScanTrigger" psid="2308">
+ <description_user>BSS Load / Channel Utilisation doesn't need to be monitored more than every 10th Beacons. This is a table indexed by frequency band.</description_user>
+ <type>uint16</type>
+ <table_name>unifiRoamCUScanTriggerTable</table_name>
+ <default_list>
+ <default index1="1"> 70 </default>
+ <default index1="2"> 70 </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamBSSLoadMonitoringFrequency" psid="2309">
+ <description_user>How often, in reveived beacons, should the BSS load be monitored? - used for roaming</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamEapolTimeout" psid="2314">
+ <description_user>Maximum time, in seconds, allowed for an offloaded Eapol (4 way handshake).</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamDeauthReason" psid="2294">
+ <description_user>A deauthentication reason for which the STA will trigger a roaming scan rather than disconnect directly.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamBlacklistSize" psid="2310">
+ <description_user>Do not remove! Read by the host! And then passed up to the framework.</description_user>
+ <type>uint16</type>
+ <units>entries</units>
+ <range_min>0</range_min><range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiRoamScanControl" psid="2067">
+ <description_user>NCHO: Enable MCD NCHO feature.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module><!-- scan --><!-- roam -->
+ </config_element>
+ <config_element name="unifiRoamDfsScanMode" psid="2068">
+ <description_user>NCHO: For certification and Host use only.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max><default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFullRoamScanPeriod" psid="2053">
+ <description_user>NCHO: For certification and Host use only.</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>30000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamScanMaxActiveChannelTime" psid="2057">
+ <description_user>NCHO: Name confusion for Host compatibility.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>120</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanNProbe" psid="2072">
+ <description_user>NCHO: The number of ProbeRequest frames per channel. </description_user>
+ <type>uint16</type><default>2</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanHomeTime" psid="2069">
+ <description_user>NCHO: The time, in TU, to spend NOT scanning during a HomeAway scan.</description_user>
+ <type>uint16</type>
+ <range_min>40</range_min><default>45</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanHomeAwayTime" psid="2070">
+ <description_user>NCHO: The time, in TU, to spend scanning during a HomeAway scan.</description_user>
+ <type>uint16</type>
+ <range_min>40</range_min><default>100</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <!-- End of roaming-relevant MIBs -->
+
+ <!-- Start of EDCA cw(min/max), aifs config param -->
+ <config_element name="unifiOverrideEDCAParamActivated" psid="2155">
+ <description_user>Activate override of STA edca config parameters with unifiOverrideEDCAParam.
+ default: True - for volcano, and False - for others
+ </description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParam" psid="2156">
+ <description_user>EDCA Parameters to be used if unifiOverrideEDCAParamActivated is true, indexed by unifiAccessClassIndex
+ octet 0 - AIFSN
+ octet 1 - [7:4] ECW MAX [3:0] ECW MIN
+ octet 2 ~ 3 - TXOP[7:0] TXOP[15:8] in 32 usec units for both non-HT and HT connections.
+ </description_user>
+ <access_rights>read_write</access_rights>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiOverrideEDCAParamTable</table_name>
+ <default_list>
+ <default index1="1">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="2">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="3">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="4">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- End of EDCA cw(min/max), aifs config param -->
+
+ <config_element name="unifiSetFixedAMPDUAggregationSize" psid="4152">
+ <description_user>A non 0 value defines the max number of mpdus that a ampdu can have. A 0 value tells FW to manage the aggregation size.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+
+ <!-- mibs for LAA -->
+ <config_element name="unifiRaaTxHostRate" psid="4148">
+ <description_user>Fixed TX rate set by Host. Ideally this should be done by the driver. 0 means "host did not specified any rate".</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <!-- <default>16385</default> 11b 1M long preamble -->
+ <!-- <default>32774</default> 11n MCS6 -->
+ <!-- <default>32775</default> 11n MCS7 -->
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiWMMStallEnable" psid="4139">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enable workaround stall WMM traffic if the admitted time has been used up, used for certtification.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="unifiLaaNssSpeculationIntervalSlotTime" psid="2330">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for spatial streams.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>300</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaNssSpeculationIntervalSlotMaxNum" psid="2331">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for spatial stream.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>5</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaBwSpeculationIntervalSlotTime" psid="2332">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for bandwidth.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>300</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaBwSpeculationIntervalSlotMaxNum" psid="2333">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for bandwidth.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>8</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaMcsSpeculationIntervalSlotTime" psid="2334">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for MCS or rate index.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaMcsSpeculationIntervalSlotMaxNum" psid="2335">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for MCS or rate index.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>10</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaGiSpeculationIntervalSlotTime" psid="2336">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for guard interval.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaGiSpeculationIntervalSlotMaxNum" psid="2337">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for guard interval.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>50</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="unifiLaaProtectionConfigOverride" psid="2356">
+ <description_user>Overrides the default Protection configuration.
+ Only valid flags are DPIF_PEER_INFO_PROTECTION_TXOP_AMPDU and DPIF_PEER_INFO_PROTECTION_ALLOWED.
+ Default allows protection code to work out the rules based on VIF configuration.
+ If DPIF_PEER_INFO_PROTECTION_ALLOWED is unset, all protection, for this vif, is disabled.
+ If DPIF_PEER_INFO_PROTECTION_TXOP_AMPDU is unset then, for the specified vif, the first A-MPDU in the TxOp is no longer protected.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="true" ></function>
+ </function_list>
+ <default>6</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="UnifiLaaTxDiversityBeamformEnabled" psid="2350">
+ <description_user>For Link Adaptation Algorithm. It is used to enable or disable TX beamformer
+ functionality.</description_user>
+ <type>boolean</type>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false" ></function>
+ <function type="get" function_name="mibboolget" is_for_vif="false" ></function>
+ </function_list>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="UnifiLaaTxDiversityBeamformMinMcs" psid="2351">
+ <description_user>For Link Adaptation Algorithm. TX Beamform is applied
+ when MCS is same or larger than this threshold value.
+ </description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>2</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="UnifiLaaTxDiversityFixMode" psid="2352">
+ <description_user>For Link Adaptation Algorithm. It is used to fix TX diversity mode.
+ With two antennas available and only one spatial stream used, then one of the
+ following modes can be selected:
+ - 0 : Not fixed. Tx diversity mode is automatically selected by LAA.
+ - 1 : CDD fixed mode
+ - 2 : Beamforming fixed mode
+ - 3 : STBC fixed mode
+ </description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- LAA end -->
+ <!-- mibs for Fallback -->
+ <config_element name="unifiFallbackShortFrameRetryDistribution" psid="4149">
+ <description_user>Configure the retry distribution for fallback for short frames
+ octet 0 - Number of retries for starting rate.
+ octet 1 - Number of retries for next rate.
+ octet 2 - Number of retries for next rate.
+ octet 3 - Number of retries for next rate.
+ octet 4 - Number of retries for next rate.
+ octet 5 - Number of retries for last rate.
+ If 0 is written to an entry then the retries for that rate will be the short retry limit minus the sum
+ of the retries for each rate above that entry (e.g. 15 - 5). Therefore, this should always be the value for octet 4.
+ Also, when the starting rate has short guard enabled, the number of retries in octet 1 will be used and
+ for the next rate in the fallback table (same MCS value, but with sgi disabled) octet 0 number of retries will
+ be used.</description_user>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>5</range_max><default>{0x3, 0x2, 0x2, 0x2, 0x1, 0x0}</default>
+ <function_list>
+ <function type="get" function_name="mibdplanefallbackget" is_for_vif="false" ></function>
+ <function type="set" function_name="mibdplanefallbackset" is_for_vif="false" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- mibs for Fallback end -->
+ <!-- mibs for Dplane debug -->
+ <config_element name="unifiDPlaneDebug" psid="6073">
+ <description_user>Bit mask for turning on individual debug entities in
+ the data_plane that if enabled effect throughput. See DPLP_DEBUG_ENTITIES_T in dplane_dplp_debug.h for bits.
+ Default of 0x203 means dplp, ampdu and metadata logs are enabled.</description_user>
+ <type>uint32</type>
+ <default>0x203</default>
+ <function_list>
+ <function type="get" function_name="mibdplanedebugmaskget" is_for_vif="true" ></function>
+ <function type="set" function_name="mibdplanedebugmaskset" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- mibs for Dplane debug -->
+ <config_element name="unifiThroughputDebug" psid="2254">
+ <description_user>is used to access throughput related counters that can help diagnose throughput problems.
+ The index of the MIB will access different counters, as described in SC-506328-DD.
+ Setting any index for a VIF to any value, clears all DPLP debug stats for the MAC instance used by the VIF.
+ This is useful mainly for debugging LAA or small scale throughput issues that require short term
+ collection of the statistics.</description_user>
+ <type>uint16</type>
+ <table_name>unifiThroughputDebugTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibthroughputdiagnosticsget" is_for_vif="true" ></function>
+ <function type="set" function_name="mibthroughputdiagnosticsset" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiThroughputDebugReportInterval" psid="4153">
+ <description_user>dataplane reports throughput diag report every this interval in msec.
+ 0 means to disable this report.
+ </description_user>
+ <type>uint16</type>
+ <default>1000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- MIBs for Host Frame Statistics -->
+ <config_element name="unifiFrameTXCounters" psid="2327">
+ <description_user>Frame TX Counters used by the host. These are required by MCD.</description_user>
+ <type>uint32</type>
+ <table_name>unifiFrameTXCountersTable</table_name>
+ <function_list>
+ <function type="get" function_name="mib_frameTXcounters_get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameRXCounters" psid="2326">
+ <description_user>Frame RX Counters used by the host. These are required by MCD. </description_user>
+ <type>uint32</type>
+ <table_name>unifiFrameRXCountersTable</table_name>
+ <function_list>
+ <function type="get" function_name="mib_frameRXcounters_get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiEnableMgmtTxPacketStats" psid="2249">
+ <description_user>Consider management packets for TX stats counters</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mib_mgmt_tx_packet_stats_set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiARPDetectResponseCounter" psid="2247">
+ <description_user>Counter used to track ARP Response frame for Enhanced ARP Detect. This is required by Volcano. </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <!-- MIBs for Link Layer Statistics -->
+ <config_element name="unifiBeaconReceived" psid="2228">
+ <description_user>Access point beacon received count from connected AP</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRadioLpRxRssiThresholdLower" psid="6028">
+ <description_user>The lower RSSI threshold for switching between low power rx and normal rx.
+ If the RSSI avg of received frames is lower than this value for a VIF, then that VIF will vote against using low-power radio RX.
+ Low power rx could negatively influence the receiver sensitivity.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-75</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRadioLpRxRssiThresholdUpper" psid="6029">
+ <description_user>The upper RSSI threshold for switching between low power rx and normal rx.
+ If the RSSI avg of received frames is higher than this value for a VIF, then that VIF will vote in favour of using low-power radio RX.
+ Low power RX could negatively influence the receiver sensitivity.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-65</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiUnsyncVifLnaEnabled" psid="6010">
+ <description_user>Enable or disable use of the LNA for unsynchronised VIFs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlEnabled" psid="6013">
+ <description_user>Enable dynamic switching of the LNA based on RSSI for synchronised VIFs.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlRssiThresholdLower" psid="6014">
+ <description_user>The lower RSSI threshold for dynamic switching of the LNA.
+ If the RSSI avg of received frames is lower than this value for all scheduled VIFs, then the external LNA will be enabled.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-40</default>
+ <nature>hardware</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlRssiThresholdUpper" psid="6015">
+ <description_user>The upper RSSI threshold for dynamic switching of the LNA.
+ If the RSSI avg of received frames is higher than this value for all scheduled VIFs, then the external LNA will be disabled.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-30</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiACRetries" psid="2229">
+ <description_user>It represents the number of retransmitted frames under each ac priority
+ (indexed by unifiAccessClassIndex). This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiAcTxConfirmTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioOnTime" psid="2230">
+ <description_user>msecs the radio is awake (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioTxTime" psid="2231">
+ <description_user>msecs the radio is transmitting (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioRxTime" psid="2232">
+ <description_user>msecs the radio is in active receive (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioScanTime" psid="2233">
+ <description_user>msecs the radio is awake due to all scan (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioOnTimeNan" psid="2236">
+ <description_user>msecs the radio is awake due to NAN operations (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPSLeakyAP" psid="2234">
+ <description_user>indicate that this AP typically leaks packets beyond the guard time (5msecs).</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- End of MIBs for Link Layer Statistics -->
+ <config_element name="unifiRadioMeasurementActivated" psid="2043">
+ <description_user>When TRUE Radio Measurements are supported.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRadioMeasurementCapabilities" psid="2044">
+ <description_user>RM Enabled capabilities of the chip. See SC-503520-SP for further details.</description_user>
+ <type>octet_string</type>
+ <range_min>5</range_min><range_max>5</range_max><default>{ 0x73, 0x00, 0x00, 0x00, 0x04 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOverrideDefaultBETXOP" psid="2365">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: When set to non-zero value then this will override the BE TXOP for 11g (in 32 usec units) to the value specified here.</description_user>
+ <type>uint16</type>
+ <default>78</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiOverrideDefaultBETXOPForHT" psid="2364">
+ <description_user>When set to non-zero value then this will override the BE TXOP for 11n and higher modulations (in 32 usec units) to the value specified here.</description_user>
+ <type>uint16</type>
+ <default>171</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRXABBTrimSettings" psid="2366">
+ <description_user>Various settings to change RX ABB filter trim behavior.</description_user>
+ <type>uint32</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTrimsEnable" psid="2367">
+ <description_user>A bitmap for enabling/disabling trims at runtime. Check unifiEnabledTrims enum for description of the possible values.</description_user>
+ <type>uint32</type>
+ <default>0x0ff5</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioCCAThresholds" psid="2368">
+ <description_user>The wideband CCA ED thresholds so that the CCA-ED triggers at the regulatory value of -62 dBm.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiRadioCCAThresholdsTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0x03, 0x07, 0x03, 0x03, 0x00, 0x16, 0x00, 0x30, 0x00, 0x16, 0x00, 0x30 }</default>
+ <default index1="2">{ 0x02, 0x03, 0x07, 0x03, 0x03, 0x00, 0x16, 0x00, 0x30, 0x00, 0x16, 0x00, 0x30 }</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTxIqDelay" psid="5117">
+ <description_user>The differential delay applied between I and Q paths in Tx.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiRadioTxIqDelayTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0xff, 0xff, 0xff, 0x00}</default>
+ <default index1="2">{ 0x02, 0xff, 0xff, 0xff, 0x00}</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNarrowbandCCAThresholds" psid="5099">
+ <description_user>The narrowband CCA ED thresholds so that the CCA-ED triggers at the regulatory value of -62 dBm.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibhalmacmodemchangeparams" is_for_vif="false"></function>
+ <table_name>unifiRadioCCAThresholdsTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0x03, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03 }</default>
+ <default index1="2">{ 0x02, 0x03, 0x06, 0x03, 0x01, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x03 }</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+
+ <config_element name="unifiHardwarePlatform" psid="2369">
+ <description_user>Hardware platform. This is necessary so we can apply tweaks to specific revisions, even though they might be running the same baseband and RF chip combination. Check unifiHardwarePlatform enum for description of the possible values.</description_user>
+ <type>unifiHardwarePlatform</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDPDTrainingDuration" psid="2371">
+ <description_user>Duration of DPD training (in ms).</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDPDTrainPacketConfig" psid="2373">
+ <description_user>
+This MIB allows the dummy packets training bandwidth and rates to be overriden. Tipically the bandwidth would be the same as the channel bandwidth (for example 80 MHz packets for an 80 Mhz channel) and rates MCS1 and MCS5. With this MIB you can set, for example, an 80 MHz channel to be trained using 20 MHz bandwidth (centered or not) with MCS2 and MCS7 packets. The MIB index dictates what channel bandwidth the configuration is for (1 for 20 MHz, 2 for 40 MHz and so on). The format is:
+ - octet 0: train bandwidth (this basically follows the rice_channel_bw_t enum).
+ - octet 1: train primary channel position
+ - octet 2-3: OFDM 0 rate
+ - octet 4-5: OFDM 1 rate
+ - octet 6-7: CCK rate (unused)
+The rates are encoded in host(FAPI) format, see SC-506179, section 4.41.
+ </description_user>
+ <access_rights>read_write</access_rights>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiDPDTrainPacketConfigTable</table_name>
+ <default_list>
+ <!-- 20 MHz: Train on 20 MHz bandwidth, using 11n20_13mbps (MCS1) and 11n20_52mbps (MCS5) -->
+ <default index1="1"> {0x00, 0x00, 0x80, 0x01, 0x80, 0x05, 0x00, 0x00} </default>
+ <!-- 40 MHz: Train on 40/20 MHz bandwidth, using 11n40_27mbps (MCS1) and 11n20_52mbps (MCS5) -->
+ <default index1="2"> {0x01, 0x00, 0x82, 0x01, 0x80, 0x05, 0x00, 0x00} </default>
+ <!-- 80 MHz: Train on 40 MHz bandwidth, using 11n40_27mbps (MCS1) and 11n40_108mbps (MCS5) -->
+ <default index1="3"> {0x01, 0x00, 0x82, 0x01, 0x82, 0x05, 0x00, 0x00} </default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCurrentBssChannelFrequency" psid="2318">
+ <description_user>Centre frequency for the connected channel</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentBssBandwidth" psid="2317">
+ <description_user>Current bandwidth the STA is operating on
+ channel_bw_20_mhz = 20,
+ channel_bw_40_mhz = 40,
+ channel_bw_80_mhz = 80,
+ channel_bw_160_mhz = 160</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentBssNss" psid="2312">
+ <description_user>Specifies current AP antenna mode: BIG DATA
+ 0 = SISO,
+ 1 = MIMO (2x2),
+ 2 = MIMO (3x3),
+ 3 = MIMO (4x4)</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiAntennaMode</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaVifLinkNss" psid="2324">
+ <description_user>STA Vif (Not P2P) while connected to an AP and does not apply to TDLS links. Specifies the max number of NSS that the link can use
+ 0 = SISO,
+ 1 = MIMO (2x2),
+ 2 = MIMO (3x3),
+ 3 = MIMO (4x4)</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiAntennaMode</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiAPMimoUsed" psid="2313">
+ <description_user>AP uses MU-MIMO</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHostNumAntennaControlActivated" psid="2091">
+ <description_user>Host has a control of number of antenna to use</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamingCount" psid="2315">
+ <description_user>Number of roams</description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamingAKM" psid="2316">
+ <description_user>specifies current AKM
+ 0 = None
+ 1 = OKC
+ 2 = FT (FT_1X)
+ 3 = PSK
+ 4 = FT_PSK
+ 5 = PMKSA Caching</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiRoamingAKM</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCEnabled" psid="6019">
+ <description_user> Deprecated. Golden Certification MIB don't delete, change PSID or name </description_user>
+ <type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTestTspecHack" psid="6060">
+ <description_user>Test only: Hack to allow in-house tspec testing</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTestTspecHackValue" psid="6061">
+ <description_user>Test only: Saved dialog number of tspec request action frame from the Host</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTestScanNoMedium" psid="6122">
+ <description_user>Test only: Stop Scan from using the Medium to allow thruput testing.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBlockScanAfterNumSchedVif" psid="2272">
+ <description_user>Block Scan requests from having medium time after a specified amount of sync VIFs are schedulable. A value of 0 disables the functionality.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+
+ <!-- ******************************************************************************************* -->
+ <config_element name="hutsReadWriteDataElementInt32" psid="6100">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int32 type.</description_user>
+ <type>uint32</type>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>1000</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteDataElementBoolean" psid="6101">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of boolean type.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteDataElementOctetString" psid="6102">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of octet string type.</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>9</range_max>
+ <default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteTableInt16Row" psid="6103">
+ <description_user>Reserved for HUTS tests - Data element read/write entry table of int16 type.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <range_min>-32768</range_min><range_max>32767</range_max>
+ <table_name>hutsReadWriteTableInt16IdTable</table_name>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteTableOctetStringRow" psid="6104">
+ <description_user>Reserved for HUTS tests - Data element read/write entry table of octet string type.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>73</range_max>
+ <table_name>hutsReadWriteTableOctetStringTable</table_name>
+ <default_list>
+ <!-- Row 1 -->
+ <default index1="1">{0x53,0x54,0x70,0x73,0x74,0x75,0x7A,0x7B,0x7C,
+ 0x7D,0x7E,0x7F,0x80,0x81,0x82}</default>
+ <!-- Row 2 -->
+ <default index1="2">{0x01,0x02,0x03,0x05,0x06,0x07,0x08,0x09,0x0A,0x10,
+ 0x11,0x80,0x81,0x82}</default>
+ <!-- Row 3 -->
+ <default index1="3">{0x01,0x03,0x05,0x16,0x17,0x19,0x1A,0x1B,0x1C,0x1E,
+ 0x1F,0x20,0x21,0x80,0x81,0x82}</default>
+ <!-- Tow 4 -->
+ <default index1="4">{0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x24,0x25,
+ 0x26,0x29,0x2A,0x2B,0x3A,0x80,0x81,0x82}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteRemoteProcedureCallInt32" psid="6105">
+ <description_user>Reserved for HUTS tests - Remote Procedure call read/write entry of int32 type.</description_user>
+ <type>uint32</type>
+ <default>0x000A0001</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteRemoteProcedureCallOctetString" psid="6107">
+ <description_user>Reserved for HUTS tests - Remote Procedure call read/write entry of octet string type.</description_user>
+ <type>octet_string</type>
+ <range_min>144</range_min><range_max>144</range_max>
+ <function_list>
+ <function type="get" function_name="miboctetstringget"></function>
+ <function type="set" function_name="miboctetstringset"></function>
+ </function_list>
+ <table_name>hutsReadWriteRPCTableOctetStringTable</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIInt16" psid="6108">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int16 type via internal API.</description_user>
+ <default>-55</default>
+ <type>int16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIUint16" psid="6109">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of unsigned int16 type via internal API.</description_user>
+ <type>uint16</type>
+ <default>0x0730</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIUint32" psid="6110">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of unsigned int32 type via internal API.</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>30000</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIInt64" psid="6111">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int64 type via internal API.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <function_list>
+ <function type="get" function_name="mibtsftime" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIBoolean" psid="6112">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of boolean type via internal API.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIOctetString" psid="6113">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of octet string type via internal API.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <default>{ 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- Index -->
+ <config_element name="hutsReadWriteTableInt16" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteTableOctetString" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteRPCTableOctetStringTableIndex0" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteRPCTableOctetStringTableIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixedSizeTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableindex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeysindex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKeysIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyIndex2" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>6</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>3</range_max>
+ <description_user>group index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyIndex2" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>3</range_max>
+ <description_user>temperature index</description_user>
+ </config_element>
+ <!-- Columns -->
+ <config_element name="hutsReadWriteInternalAPIFixedSizeTableRow" psid="6114">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <type>int16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <table_name>hutsReadWriteInternalAPIFixedSizeTable</table_name>
+ <default_list>
+ <default index1="1"> 80 </default>
+ <default index1="2"> 80 </default>
+ <default index1="3"> 80 </default>
+ <default index1="4"> 80 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableRow" psid="6115">
+ <description_user>Reserved for HUTS tests - Variable size table rows of octet string type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>73</range_max>
+ <table_name>hutsReadWriteInternalAPIVarSizeTable</table_name>
+ <default_list>
+ <!-- Row 1 -->
+ <default index1="1">{0x53,0x54,0x70,0x73,0x74,0x75,0x7A,0x7B,0x7C,
+ 0x7D,0x7E,0x7F,0x80,0x81,0x82}</default>
+ <!-- Row 2 -->
+ <default index1="2">{0x01,0x02,0x03,0x05,0x06,0x07,0x08,0x09,0x0A,0x10,
+ 0x11,0x80,0x81,0x82}</default>
+ <!-- Row 3 -->
+ <default index1="3">{0x01,0x03,0x05,0x16,0x17,0x19,0x1A,0x1B,0x1C,0x1E,
+ 0x1F,0x20,0x21,0x80,0x81,0x82}</default>
+ <!-- Row 4 -->
+ <default index1="4">{0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x24,0x25,
+ 0x26,0x29,0x2A,0x2B,0x3A,0x80,0x81,0x82}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKey1Row" psid="6116">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeys</table_name>
+ <function_list>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKey2Row" psid="6117">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeys</table_name>
+ <function_list>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKey1Row" psid="6118">
+ <description_user>The values stored in hutsReadWriteInternalAPIFixVarSizeTableKeys</description_user>
+ <type>uint32</type>
+ <table_name>hutsReadWriteInternalAPIFixVarSizeTableKeys</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKey2Row" psid="6119">
+ <description_user>The values stored in hutsReadWriteInternalAPIFixVarSizeTableKeys</description_user>
+ <type>octet_string</type>
+ <table_name>hutsReadWriteInternalAPIFixVarSizeTableKeys</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyRow" psid="6120">
+ <description_user>The number of received MPDUs discarded by the CCMP decryption algorithm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeyRowTable</table_name>
+ <function type="get" function_name="mibtsftime"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyRow" psid="6121">
+ <description_user>Write a DPD LUT entry</description_user>
+ <type>octet_string</type>
+ <range_min>144</range_min><range_max>144</range_max>
+ <function_list>
+ <function type="get" function_name="miboctetstringget"></function>
+ <function type="set" function_name="miboctetstringset"></function>
+ </function_list>
+ <table_name>hutsReadWriteInternalAPIVarSizeTableKeyTable</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCUMeasurementInterval" psid="2311">
+ <description_user>The interval in ms to perform the channel usage update</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><range_max>1000</range_max><default>500</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiChannelBusyThreshold" psid="2018">
+ <description_user>The threshold in percentage of CCA busy time when a channel would be considered busy</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>100</range_max><default>25</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugDisableRadioNannyActions" psid="5082">
+ <description_user>Bitmap to disable the radio nanny actions. B0==radio 0, B1==radio 1</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxCckModemSensitivity" psid="5083">
+ <description_user>Specify values of CCK modem sensitivity for scan, normal and low
+ sensitivity.</description_user>
+ <description_internal>Enables sensitivity thresholds to be updated. Default values are
+ written into modem_settings in halmac_modem_radio_config.c when
+ the structure is initialised.
+ The string of 6 octets is assigned as follows:
+ 0: cck_sync, scan sensitivity.
+ 1: cck_sync, normal sensitivity.
+ 2: cck_sync, low sensitivity.
+ 3: cck_cca, scan sensitivity.
+ 4: cck_cca, normal sensitivity.
+ 5: cck_cca, low sensitivity.
+ </description_internal>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>6</range_max>
+ <function type="set" function_name="mibhalmacmodemgenericset"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdPerBandwidth" psid="5084">
+ <description_user>Bitmask to enable Digital Pre-Distortion per bandwidth</description_user>
+ <description_internal>Enables DPD per bandwidth per band</description_internal>
+ <type>uint16</type>
+ <default>63</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiBBVersion" psid="5085">
+ <description_user>Baseband chip version number determined by reading BBIC version</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiIQBufferSize" psid="5098">
+ <description_user>Buffer Size for IQ capture to allow CATs to read it.</description_user>
+ <description_internal>Returns the buffer size in bytes for current device</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRFVersion" psid="5086">
+ <description_user>RF chip version number determined by reading RFIC version</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTXSettingsRead" psid="5089">
+ <description_user>Read value from Tx settings.</description_user>
+ <description_internal> Read TX debug settings. </description_internal>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioTXSettingsTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRXSettingsRead" psid="5096">
+ <description_user>Read value from Rx settings.</description_user>
+ <description_internal> Read RX debug settings. </description_internal>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioRXSettingsTable</table_name>
+ <type>octet_string</type>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioCCADebug" psid="5100">
+ <description_user>Read values from Radio CCA settings.</description_user>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioCCADebugTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNarrowbandCCADebug" psid="5107">
+ <description_user>Read values from Radio CCA settings.</description_user>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiNarrowbandCCADebugTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemnarrowbandcca"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRxDcocDebug" psid="5112">
+ <description_user>RX DCOC debug testing. Allows user to override LUT index IQ values in combination with unifiRadioRxDcocDebugIqValue. This MIB enables the feature.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false" ></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRxDcocDebugIqValue" psid="5111">
+ <description_user>RX DCOC debug testing. Allows user to override LUT index IQ values in combination with unifiRadioRxDcocDebug. This MIB sets IQ value that all LUT index Is and Qs get set to.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false" ></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNannyRetrimDpdMod" psid="5113">
+ <description_user>Bitmap to selectively enable nanny retrim of DPD per modulation. B0==OFDM0, B1==OFDM1, B2==CCK</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDisableDpdSubIteration" psid="5114">
+ <description_user>For Engineering debug use only.</description_user>
+ <description_internal>When set "true" this MIB disables the use of sub-iterations within the DPD trim. This "feature" is intended for debug purposes only, e.g. for stepping through code. In normal usage, sub-iterations should remain enabled. This is achieved by leaving this mib set to "false" (default state).</description_internal>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxPriEnergyDetThreshold" psid="5093">
+ <description_user>OBSOLETE. Energy detection threshold for primary 20MHz channel.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxSecEnergyDetThreshold" psid="5094">
+ <description_user>OBSOLETE. Energy detection threshold for secondary 20MHz channel.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTrafficThresholdToSetupBA" psid="2222">
+ <description_user>Sets the default Threshold (as packet count) to setup BA agreement per TID.</description_user>
+ <type>uint32</type>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiModemSgiOffset" psid="5090">
+ <description_user>Overwrite SGI sampling offset. Indexed by Band and Bandwidth. Defaults currently defined in fw.</description_user>
+ <table_name>unifiModemSgiOffsetTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxRadioCsMode" psid="5092">
+ <description_user>OBSOLETE. Configures RX Radio CS detection for 80MHz bandwidth.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTxPowerOverride" psid="5091">
+ <description_user>Option in radio code to override the power requested by the upper layer</description_user>
+ <access_rights>read_write</access_rights>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <table_name>unifiRadioTxPowerOverrideTable</table_name>
+ <function_list>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <function type="get" function_name="mibint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDebugSVCModeStackHighWaterMark" psid="5010">
+ <description_user>Read the SVC mode stack high water mark in bytes</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFActivated" psid="2650">
+ <description_user>It is used to enable or disable Android Packet Filter(APF).</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFVersion" psid="2651">
+ <description_user>APF version currently supported by the FW.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFMaxSize" psid="2652">
+ <description_user>Max size in bytes supported by FW per VIF. Includes both program len and data len.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <default>1024</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFActiveModeEnabled" psid="2653">
+ <description_user>Indicates if APF is supported in host active mode. Applicable to only group addressed frames.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- ******************************************************************************************* -->
+ <config_element name="unifiRoamSoftRoamingEnabled" psid="2054">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanMaxNumberOfProbeSets" psid="2087">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanMaximumAge" psid="2014">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEAutonomousScanNoisy" psid="2016">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanProbeInterval" psid="2007">
+ <description_user>Deprecated.</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsBasicHtMcsSet" psid="2563">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsBasicVhtMcsSet" psid="2564">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <config_element name="dot11TDLSChannelSwitchActivated" psid="2567">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsDesignForTestMode" psid="2568">
+ <description_user>Deprecated</description_user><type>uint32</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsMaximumRetry" psid="2561">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEConnectionTimeOut" psid="2000">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxNumberOfPeriodicScans" psid="2260">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxRSSISampleSize" psid="2261">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxHotlistAPs" psid="2262">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxSignificantWifiChangeAPs" psid="2263">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxBssidHistoryEntries" psid="2264">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiRsnCapabilities" psid="2034">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiFtmDefaultGapBeforeFirstBurstPerResponder" psid="5308">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParamBEEnable" psid="5024">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParamBE" psid="5023">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <!-- ******************************************************************************************* -->
+ <config_table table_name="dot11RSNAStatsTable" num_indices="2">
+ <description_user>This table maintains per-STA statistics in an RSN. The entry with dot11RSNAStatsSTAAddress set to FF-FF-FF-FF-FF-FF shall contain statistics for broadcast/multicast traffic.</description_user>
+ <index1 name="dot11RSNAConfigIndex" />
+ <index2 name="dot11RSNAStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiQueueStatsIdTable" num_indices="1">
+ <description_user>Conceptual table for timing of queue transfers HOST-SW-HW</description_user>
+ <index1 name="unifiQueueStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiRateStatsTable" num_indices="1">
+ <description_user>Conceptual table for transmit/receive rate statistics.</description_user>
+ <index1 name="unifiRateStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiThroughputDebugTable" num_indices="1">
+ <description_user>Conceptual table for throughput diagnostics counters.</description_user>
+ <index1 name="unifiThroughputDebugIndex" />
+ </config_table>
+ <config_table table_name="unifiReadRegTable" num_indices="1">
+ <description_user>Conceptual table for reading registers.</description_user>
+ <index1 name="unifiReadHardwareCounterIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTXSettingsTable" num_indices="2">
+ <description_user>Conceptual table for tx settings.</description_user>
+ <index1 name="unifiMacInstanceIndex" />
+ <index2 name="unifiRadioTXSettingsIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioRXSettingsTable" num_indices="2">
+ <description_user>Conceptual table for rx settings.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiRadioRXSettingsIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioCCADebugTable" num_indices="2">
+ <description_user>Conceptual table for radio CCA settings.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiRadioCCADebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNarrowbandCCADebugTable" num_indices="1">
+ <description_user>Conceptual table for narrowband CCA settings.</description_user>
+ <index2 name="unifiNarrowbandCCADebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiReadHardwareCounterTable" num_indices="2">
+ <description_user>Conceptual table for reading hardware packet counters. First index is the radio_id, second index is the counter to be read.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiReadHardwareCounterIndex" />
+ </config_table>
+ <config_table table_name="unifiLoadDpdLutTable" num_indices="2">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiLoadDpdLutGroupIndex" />
+ <index2 name="unifiLoadDpdLutTemperatureIndex" />
+ </config_table>
+ <config_table table_name="unifiLoadDpdLutTablePerRadio" num_indices="3">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiLoadDpdLutRadioIndex" />
+ <index2 name="unifiLoadDpdLutGroupIndex" />
+ <index3 name="unifiLoadDpdLutTemperatureIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioCCAThresholdsTable" num_indices="1">
+ <description_user>This table contains hardware specific CCA Thresholds settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiRadioCCAThresholdsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTxIqDelayTable" num_indices="1">
+ <description_user>This table contains information for TX IQ differential path delays.</description_user>
+ <index1 name="unifiRadioTxIqDelayTableIndex" />
+ </config_table>
+ <config_table table_name="unifiAgcThresholdsTable" num_indices="1">
+ <description_user>This table contains hardware specific AGC Thresholds settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiAgcThresholdsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiTxSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxGainSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter gain settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiTxGainSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTxPowerOverrideTable" num_indices="1">
+ <description_user>Table for the power override settings via RICE</description_user>
+ <index1 name="unifiRadioTXPowerOverrideTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerDetectorResponseTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table defines the response of the power detectors(2G5/5G) in the external FEM. The detectors are sampled via the BIST ADC. The reference temperature and frequencies for this table are implicitly defined by the related temperature and frequency compensation tables. </description_internal>
+ <index1 name="unifiTxPowerDetectorResponseTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxDetectorTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate detector measurements for temperature. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxDetectorTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxDetectorFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate detector measurements for frequency. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxDetectorTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOpenLoopTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path gains for self-heating between transmit power calibrations. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxOpenLoopTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOpenLoopFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path gains across frequency between transmit power calibrations. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxOpenLoopFrequencyCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPaGainDpdTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path PA gains when calculating DPD hot and cold LUTs for self-heating. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxPaGainDpdTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPaGainDpdFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate forward path PA gains when calculating DPD hot and cold LUTs across frequency. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxPaGainDpdFrequencyCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxFtrimSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to frequency compensate forward path.</description_internal>
+ <index1 name="unifiTxFtrimSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiStaticDpdGainTable" num_indices="1">
+ <description_user>This table contains hardware specific digital gain settings for use with static dpd. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table contains hardware specific digital gain settings for use with static dpd.</description_internal>
+ <index1 name="unifiStaticDpdGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxGainStepSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to set the gain steps (v2i, mix, drv, pa) of the forward path.</description_internal>
+ <index1 name="unifiTxGainStepSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDpdPredistortGainsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal>This table is used to set DPD digital pre-distort gains of the forward path.</description_internal>
+ <index1 name="unifiDpdPredistortGainsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerTrimConfigTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to set psat, biases and adjustment ranges of the forward path during power trim.</description_internal>
+ <index1 name="unifiTxPowerTrimConfigTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxAntennaConnectionLossTable" num_indices="1">
+ <description_user>The table giving the frequency-dependent connection loss value, which is used as conversion factors for raw tx power at connector</description_user>
+ <index1 name="unifiTxAntennaConnectionLossTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxAntennaMaxGainTable" num_indices="1">
+ <description_user>The table giving the frequency-dependent antenna max gain value, which is used as conversion factors for raw tx power at connector</description_user>
+ <index1 name="unifiTxAntennaMaxGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRxExternalGainTable" num_indices="1">
+ <description_user>The table giving frequency-dependent RSSI offset value</description_user>
+ <index1 name="unifiRxExternalGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOOBConstraintTable" num_indices="1">
+ <description_user>Table containing settings necessary to ensure the IC observes transmit out-of-band regulatory constraints when operating near band edges.</description_user>
+ <index1 name="unifiTxOOBConstraintTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerAdjustTable" num_indices="1">
+ <description_user>This table allows you to adjust absolute transmit power in a frequency and/or temperature dependant manner. The table allows you to specify datapoints in quarter dB based on frequency and temperature. The firmware will then perform a 2D interpolation to perform the right adjustment for the current frequency and temperature.</description_user>
+ <index1 name="unifiTxPowerAdjustTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDebugControlTable" num_indices="1">
+ <description_user>The table is used to control various debug settings on a per module basis</description_user>
+ <index1 name="unifiDebugControlTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRegulatoryTable" num_indices="1">
+ <description_user>This table holds the regulatory information for all countries.</description_user>
+ <index1 name="unifiRegulatoryTableIndex" />
+ </config_table>
+ <config_table table_name="unifiPeerIdTable" num_indices="1">
+ <description_user>Conceptual table for peer information at disconnect (Bandwith, Nss, RSSI, Tx data rate), index by Pid.</description_user>
+ <index1 name="unifiPeerid" />
+ </config_table>
+ <config_table table_name="unifiOperatingClassTable" num_indices="1">
+ <description_user>Operating Class table</description_user>
+ <index1 name="unifiOperatingClassTableIndex" />
+ </config_table>
+ <config_table table_name="unifiScanParametersTable" num_indices="1">
+ <description_user>Scan Parameters table</description_user>
+ <index1 name="unifiScanParametersTableIndex" />
+ </config_table>
+ <config_table table_name="unifiSarBackoffTable" num_indices="2">
+ <description_user>Sar Power Cap Parameters table</description_user>
+ <index1 name="unifiSarModeTableIndex" />
+ <index2 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiCCACSThreshTable" num_indices="1">
+ <description_user>CCA CS threshold parameters table</description_user>
+ <index1 name="unifiSisoMimoTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDpdDebugTable" num_indices="1">
+ <description_user>DPD Debug MIBS</description_user>
+ <index1 name="unifiDpdDebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiMacBusyTimeTable" num_indices="2">
+ <description_user>unifiMacBusyTime table</description_user>
+ <index1 name="unifiMacInstanceIndex" />
+ <index2 name="unifiMacBusyTimeTableIndex" />
+ </config_table>
+ <config_table table_name="unifiModemSgiOffsetTable" num_indices="2">
+ <description_user>SGI sample offset parameters table</description_user>
+ <index1 name="unifiBandTableIndex" />
+ <index2 name="unifiBWTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNoCellTable" num_indices="1">
+ <description_user>NoCell Power Cap Parameters table</description_user>
+ <index1 name="unifiConnectionTypeTableIndex" />
+ </config_table>
+ <config_table table_name="unifiAcTxConfirmTable" num_indices="1">
+ <description_user>Conceptual table for requesting Tx confirm, index by Access Class.</description_user>
+ <index1 name="unifiAccessClassIndex" />
+ </config_table>
+ <config_table table_name="unifiDefaultCountryTable" num_indices="1">
+ <description_user>Table of country codes.</description_user>
+ <index1 name="unifiDefaultCountryIndex" />
+ </config_table>
+ <config_table table_name="unifiDebugConfigTable" num_indices="1">
+ <description_user>Debug modules table</description_user>
+ <index1 name="unifiDebugModulesIndex" />
+ </config_table>
+ <config_table table_name="unifiFaultConfigTable" num_indices="1">
+ <description_user>Subsystems' Fault config table</description_user>
+ <index1 name="unifiSubSystemsIndex" />
+ </config_table>
+ <config_table table_name="unifiPanicConfigTable" num_indices="1">
+ <description_user>Subsystems' Panic config table</description_user>
+ <index1 name="unifiSubSystemsIndex" />
+ </config_table>
+ <config_table table_name="unifiRSSICURoamScanTriggerTable" num_indices="1">
+ <description_user>Table indexed by frequency band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamCUScanTriggerTable" num_indices="1">
+ <description_user>Table indexed by frequency band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamRssiFactorTable" num_indices="1">
+ <description_user>Table allocating RSSIfactor to RSSI values range</description_user>
+ <index1 name="unifiRoamRssiFactorTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamCUFactorTable" num_indices="1">
+ <description_user>Table allocating CUfactor to Channel Utilization values range.</description_user>
+ <index1 name="unifiRoamCUFactorTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamRSSIBoostTable" num_indices="1">
+ <description_user>Table allocating a RSSI boost to each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioIDTable" num_indices="1">
+ <description_user>Table indexed by radio ID</description_user>
+ <index1 name="unifiRadioIndex" />
+ </config_table>
+ <config_table table_name="unifiOverrideEDCAParamTable" num_indices="1">
+ <description_user>Conceptual table for overriding EDCA Parameters broadcast by the AP, index by Access Class.</description_user>
+ <index1 name="unifiAccessClassIndex"/>
+ </config_table>
+ <config_table table_name="unifiRxRssiAdjustmentsTable" num_indices="2">
+ <description_user>Table for rssi adjustments. First index is the radio_id, second index is band.</description_user>
+ <index1 name="unifiRadioIndex" />
+ <index2 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNANDefaultScanDwellTimeTable" num_indices="1">
+ <description_user>Table allocating a default scan dwell time for each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNANDefaultScanPeriodTable" num_indices="1">
+ <description_user>Table allocating a default scan period for each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+
+ <!-- ******************************************************************************************* -->
+ <config_table table_name="hutsReadWriteTableInt16IdTable" num_indices="1">
+ <description_user>Specific table for uint16</description_user>
+ <index1 name="hutsReadWriteTableInt16" />
+ </config_table>
+ <config_table table_name="hutsReadWriteTableOctetStringTable" num_indices="1">
+ <description_user>Specific table for octet string</description_user>
+ <index1 name="hutsReadWriteTableOctetString" />
+ </config_table>
+ <config_table table_name="hutsReadWriteRPCTableOctetStringTable" num_indices="2">
+ <description_user>Specific table for RPC of octet string</description_user>
+ <index1 name="hutsReadWriteRPCTableOctetStringTableIndex0" />
+ <index2 name="hutsReadWriteRPCTableOctetStringTableIndex1" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixedSizeTable" num_indices="1">
+ <description_user>Specific table of fixed size for internal API test</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixedSizeTableIndex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIVarSizeTable" num_indices="1">
+ <description_user>Specific table of variable size for internal API test</description_user>
+ <index1 name="hutsReadWriteInternalAPIVarSizeTableindex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixSizeTableKeys" num_indices="1">
+ <description_user>Conceptual table for timing of queue transfers HOST-SW-HW</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixSizeTableKeysindex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixVarSizeTableKeys" num_indices="1">
+ <description_user>Table of integers for use by patches.</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixVarSizeTableKeysIndex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixSizeTableKeyRowTable" num_indices="2">
+ <description_user>xxxxxxxx</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixSizeTableKeyIndex1" />
+ <index2 name="hutsReadWriteInternalAPIFixSizeTableKeyIndex2" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIVarSizeTableKeyTable" num_indices="2">
+ <description_user>xxxxxxxx</description_user>
+ <index1 name="hutsReadWriteInternalAPIVarSizeTableKeyIndex1" />
+ <index2 name="hutsReadWriteInternalAPIVarSizeTableKeyIndex2" />
+ </config_table>
+ <config_table table_name="unifiDPDTrainPacketConfigTable" num_indices="1">
+ <description_user> This table contains DPD train configuration.</description_user>
+ <index1 name="unifiDPDTrainPacketConfigIndex" />
+ </config_table>
+ <config_table table_name="unifiFrameTXCountersTable" num_indices="1">
+ <description_user> This table contains TX Counters.</description_user>
+ <index1 name="unifiFrameTXCountersTableIndex" />
+ </config_table>
+ <config_table table_name="unifiFrameRXCountersTable" num_indices="1">
+ <description_user> This table contains RX Counters.</description_user>
+ <index1 name="unifiFrameRXCountersTableIndex" />
+ </config_table>
+ <!-- ******************************************************************************************* -->
+ </metadata>
+</metadata_list>
--- /dev/null
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+a36a RameTpuSp_indication
+a36b RameRssiMonitor_indication
+a36c RameBlackoutEnd_indication
+a36d RameBeaconNextWindow_indication
+a36e RameNanDwFinished_indication
+a36f RameCurrentNssChanged_indication
+a402 RameMsgIdleLiteOff_indication
+a403 RameIdleApPrepEnter_indication
+a404 RameIdleApPrepDone_indication
+a405 RameChangeToActive_indication
+a406 RameChangeToWaitingForActive_indication
+a407 RameChangeToStaActive_indication
+a408 RameChangeToStaIdle_indication
+a409 RameChangeToStaIdleRadioOn_indication
+a40a RameStaIdleExit_indication
+a40b RameSchedBlocked_indication
+a40c RameDplaneOff_indication
+a40d RameBtLoAccessGranted_indication
+a422 RameMsgDelba_confirm
+a423 RameMsgRadioOffDplpOff_indication
+a424 RameMsgRadioOnDplpOn_indication
+a425 RameMsgRadioSwitchChannelDplpOff_indication
+a426 RameMsgRxActivityOccurred_indication
+a427 RameMsgDplpVifDelete_confirm
+a428 RameMsgVifCheckClear_indication
+a429 RameMsgVifAnnounceAvailability_indication
+a42a RameMsgPsUpdate_indication
+a42b RameMsgTdlsPeerSp_indication
+a42c RameMsgTdlsPsUpdate_indication
+a42d RameMsgNullAnnounceFrameProcessed_indication
+a42e RameMsgPersistentFrameProcessed_indication
+a42f RameMsgCtsAnnounceFrameProcessed_indication
+a430 RameMsgFrameRx_indication
+a431 RameMsgMm_confirm
+a432 RameMsgPsServTriggered_indication
+a433 RameMsgPsServEnd_indication
+a434 RameMsgSpuriousMorebit_indication
+a435 RameMsgMcastServiceEnd_indication
+a436 RameMsgBeaconTxFinished_indication
+a437 RameMsgNanSdfCallback_confirm
+a438 RameMsgPsPollTxFinished_indication
+a439 RameMsgPeerPsStateUpdate_indication
+a43a RameMsgSendNullFrame_request
+a43b RameMsgBaTxError_indication
+a43c RameMsgPauseResumeDplp_confirm
+a43d RameMsgDpdFrameProcessed_indication
+a43e RameMsgFrameTxFinished_indication
+a43f RameMsgStaKeepaliveTxFinished_indication
+a440 RameMsgRadioReady_indication
+a462 RameMsgDelba_request
+a463 RameMsgMonitorRssi_request
+a464 RameMsgAdjustTxPower_indication
+a465 RameMm_request
+a466 RameConnectStatus_request
+a467 RameSetPowermgt_request
+a468 RameAddBlackout_request
+a469 RameDelBlackout_request
+a46a RameCtwConfig_request
+a46b RameVifDeregister_request
+a46c RameVifFtmRespSetupHw_request
+a46d RameVifSetChannel_request
+a46e RameVifDeschedule_request
+a46f RameDwelltimeReset_request
+a470 RameTdlsEnableTrafficReport_request
+a471 RameHostSuspendResume_indication
+a472 RameStaConnectStart_indication
+a473 RameStaConnectDone_indication
+a474 RameEvent_indication
+a475 RameScreenUpdate_indication
+a476 RameStaCancelFrame_request
+a477 RameVifCancelFrame_request
+a478 RameSetVifPriority_request
+a479 RameVifProtectionConfig_request
+a47a RameVifDesiredAntennaChange_indication
+a47b RameHostUpdateAntennaPref_request
+a47c RameScheduleUpdate_request
+a4a2 RameBeaconTxTime_indication
+a4a3 RameStaIdleTimer_indication
+a4a4 RameTdlsIndWindowTime_indication
+a4a5 RamePsTime_indication
+a4a6 RameFastPsTimeoutCheck_indication
+a4a7 RameActiveAfterMoreBitTime_indication
+a4a8 RamePsDelayTimeoutPoll_indication
+a4a9 RameVifClearCheckTimeout_indication
+a4aa RameRetryPowerSaveCheckTime_indication
+a4ab RameMulticastTimeout_indication
+a4ac RameUsboStateChangeTime_indication
+a4ad RameRadioCalibDelayTimeout_indication
+a4ae RameRadioCalibLoGrantTimeout_indication
+a4af RameDplaneOperationTimeout_indication
+a4b0 RameImlEvalTimeout_indication
+a4b1 RameSssBlackoutTimerExpiry_indication
+a4b2 RameCoexLteBlackoutUpdate_indication
+a4b3 RameNanClearOutsideOfSlotInhibit_indication
+a4b4 RameNanSetOutsideOfSlotInhibit_indication
+a4c2 RameRiceRadioSetupDone_indication
+a4c3 RameRiceRadioCalib_request
+a4c4 RameRiceRadioCalibDone_indication
+a4c5 RameRiceRadioChangeStateDone_confirm
+a4c6 RameRiceRadioChangeStateOffDone_confirm
+a4d2 RameRadioChangeState_request
+a4d3 RameRadioOff_request
+a4d4 RameRadioPerformDpd_request
+a4e2 RameSchdlReschedule_indication
+a4e3 RameSchdlVifCleared_indication
+a4e4 RameSchdlRelinquish_indication
+a4e5 RameSchdlUnforceSchedule_indication
+a4e6 RameSchdlVifDeschedule_request
+a4e7 RameSchdlVifSchedule_request
+a4e8 RameSchdlReqLp_request
+a4e9 RameSchdlReqHp_request
+a4ea RameSchdlEvaluateSchedule_request
+a4eb RameSchdlChangeToActive_indication
+a4ec RameSchdlChangeToWaitingForActive_indication
+a4ed RameSchdlBlockScheduler_request
+a4ee RameSchdlUnblockScheduler_indication
+a4ef RameSchdlStopScheduler_request
+a4f0 RameSchdlStartScheduler_indication
+a4f1 RameSchdlRadiomacSwitchTimeout_indication
+a4f2 RameSchdlRadioSwitchResponse_indication
+a4f3 RameScanEndTimeout_indication
+a4f4 RameSchdlSchdlCanStop_indication
+pid 37
+4000 rice_radio_fsm[0] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4001 rice_radio_fsm[1] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4002 rice_mgr_fsm 0008 not_initialised initialising idle changing_state trimming retrimming dpd nanny
+4003 macrame_radio_ctl[0] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4004 macrame_radio_ctl[1] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4005 macrame_main 0006 Powerup Active ImmWaitingForActive IdleAPWaitingForPrep StaIdle StaIdleRadioOn
+4006 macrame_schdl[0] 0004 Active Blocked Stopped ImmWaitingForActive
+4007 macrame_schdl[1] 0004 Active Blocked Stopped ImmWaitingForActive
+4008 macrame_calibration 0006 Idle Calibrating WaitForSchedulers WaitForDPlanes WaitForDelayTimer WaitForCoex
+4009 mlme_mpdu_router 0001 Idle
+400a mlme_requests 0003 Idle Wait_MLME Host_Suspended
+400b mlme_scan 0003 Idle Scanning End
+400c mlme_scan_channel[0] 0004 Idle WaitForInterface Listening WaitForDeschedule
+400d mlme_scan_channel[1] 0004 Idle WaitForInterface Listening WaitForDeschedule
+400e mlme_ap 0004 Idle TxFrame ClearingSta DisconnectAll
+400f mlme_roaming 0003 Idle Scanning Roaming
+4010 mlme_measurements 0002 Idle PerformMeasurement
+4011 mlme_nan 0002 InitialScan Running
+4012 mlme_ndm 0001 Running
+4013 mlme_ftm 0004 Idle Scanning WaitForFtmInitialResponse PerformingBurst
+4014 mlme_ftm_resp 0004 Listening WaitForBurstTrigger Bursting DeletingVif
+4015 mlme_conmgr[0] 0008 Synchronising Deauthenticating Authenticating HostAuthenticating Associating Connected Detached TearingDown
+4016 mlme_conmgr[1] 0008 Synchronising Deauthenticating Authenticating HostAuthenticating Associating Connected Detached TearingDown
+4017 mlme_basf[0] 0003 WaitForConfirm WaitForFrame WaitForRameCancel
+4018 mlme_basf[1] 0003 WaitForConfirm WaitForFrame WaitForRameCancel
+4019 mlme_vifctrl[0] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401a mlme_vifctrl[1] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401b mlme_vifctrl[2] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401c mlme_ba[0] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401d mlme_ba[1] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401e mlme_ba[2] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401f mlme_sa_query[0] 0001 Idle
+4020 mlme_sa_query[1] 0001 Idle
+4021 mlme_tdls[0] 0003 Idle TxFrame TerminatingLink
+4022 mlme_tdls[1] 0003 Idle TxFrame TerminatingLink
+4023 mlme_security[0] 0002 Idle Eapol
+4024 mlme_security[1] 0002 Idle Eapol
+faultid 596
+2000 DPLANE_RX_PDU_LOST
+2001 DPLANE_RECEIVED_FRAME_FROM_OWN_MAC_ADDR
+2002 DPLANE_ENCPTION_NO_KEY_FOUND
+2003 DPLP_MPDU_LOST
+2004 DPLANE_PROTECTION
+2005 DPLANE_FALLBACK_CREATE_TBL
+2006 DPLANE_MIB
+2007 DPLANE_RX_RESOURCE_LOW
+2008 DPLANE_BLOCK_ACK_REQ_UNKNOWN_STA
+2009 DPLANE_BLOCK_ACK_REQ_NOT_COMPRESSED
+200a DPLANE_BLOCK_ACK_REQ_NO_STREAM
+200b DPLANE_BLOCK_ACK_REQ_STALE_BUNS
+200c DPLANE_BLOCK_ACK_REQ_WRONG_DEST
+200d DPLANE_BLOCK_ACK_RX_NO_MATCH
+200e DPLANE_BLOCK_ACK_MISSING
+200f DPLANE_NO_KEY_FOR_PMF
+2010 DPLANE_BFMEE_UNSUPPORTED_VIF_TYPE
+2011 DPLANE_BFMEE_TOO_MANY_INTERFACES
+2012 DPLANE_BFMEE_UNKNOWN_MODULATION
+2013 DPLANE_BFMEE_UNDERFLOW
+2014 DPLANE_FBMEE_UNKNOWN_MAC_STATUS
+2015 DPLANE_BFMEE_BAD_STATE_TRANSITION
+2016 DPLANE_MM_CONFIRM_ASOC_REQ
+2017 DPLANE_MM_CONFIRM_ASOC_RSP
+2018 DPLANE_MM_CONFIRM_REASOC_REQ
+2019 DPLANE_MM_CONFIRM_REASOC_RSP
+201a DPLANE_MM_CONFIRM_PROBE_REQ
+201b DPLANE_MM_CONFIRM_PROBE_RSP
+201c DPLANE_MM_CONFIRM_MGMT6
+201d DPLANE_MM_CONFIRM_MGMT7
+201e DPLANE_MM_CONFIRM_BEACON
+201f DPLANE_MM_CONFIRM_ATIM
+2020 DPLANE_MM_CONFIRM_DISASOC
+2021 DPLANE_MM_CONFIRM_AUTH
+2022 DPLANE_MM_CONFIRM_DEAUTH
+2023 DPLANE_MM_CONFIRM_ACTION
+2024 DPLANE_MM_CONFIRM_MGMT14
+2025 DPLANE_MM_CONFIRM_MGMT15
+2026 DPLANE_MM_CONFIRM_NOT_MGMT
+2027 DPLANE_UNKNOWN_DUD_REQUEST_TYPE
+2028 DPLANE_MA_PACKET_REQ_WARN
+2029 DPLANE_UNABLE_TO_MALLOC
+202a DPLANE_LINK_ADAPT_PDU_RETRIES_TOO_HIGH
+202b DPLANE_IQ_CAPTURE_TOO_MANY_REQUESTS
+202c DPLANE_FILTER_FWCALLBACK_NO_MEM
+202d DPLANE_PPDU_STATS_DROPPED
+202e DPLANE_REPLAY_NULL_KEY
+202f DPLANE_REPLAY_SUSPECTED_ATTACK
+2030 DPLANE_BEAMFORMER
+2031 DPLANE_BEAMFORMER_INVALID_PEER
+2032 DPLANE_FRAG_SEQ_FOR_PATCH_NOT_FOUND
+2033 DPLANE_FAILED_TO_ALLOCATE_AMSDU_TCM
+2034 DPLANE_BFEE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2035 DPLANE_RX_ACT_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2036 DPLANE_MSG_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2037 DPLANE_RATE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2038 DPLANE_CANCEL_NO_RESP
+2039 DPLANE_FRAME_TX_DPIF_DEST_Q_FULL
+203a DPLANE_FRAME_TX_PPDU_CREATE_FAILED
+203b DPLANE_FRAME_TX_MPDU_LIST_CREATE_FAILED
+203c DPLANE_FRAME_TX_UNSPECIFIED_FAILURE
+203d DPLANE_DEADLINE_STOP_REQUESTED_WITH_ONE_ACTIVE
+203e DPLANE_DEADLINE_CANNOT_CREATE
+203f DPLANE_DEADLINE_TX_TIMED_REQUESTED_WHILE_ONE_ACTIVE
+2040 DPLANE_PROTECTION_5g_11b
+2041 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2042 DPLP_PPDU_ALLOC_FAILED
+2043 DPLANE_LAA_LOWER_SPECULATED_RATE
+2044 DPLP_Q_SLOT_PPDU_STATUS_UNEXPECTED
+2045 FAILED_TO_FORWARD_TO_MACRAME
+2046 DPLANE_DEADLINE_STOP_REQUESTED_IN_PAST
+2047 DPLANE_UNABLE_TO_RESUME_MAC
+2049 DPLANE_BFEE_INVALID_PEER
+2050 DPLANE_BFER_INVALID_PEER
+2051 DPLANE_RX_FTM_FAILURE
+2200 DPHP_DMA_NONRECOVERABLE_TIMEOUT
+2201 DPHP_SLOT_STUCK_LOCKUP
+2202 DPHP_SLOT_CANCEL_LOCKUP
+2300 RAME_RATES
+2301 RAME_INVALID_BO_ID
+2302 RAME_ENCRYPTION_KEY
+2303 RAME_INCOMPATIBLE_REG_DOMAINS
+2304 RAME_INVALID_BA
+2305 RAME_INVALID_BAINFO
+2306 RAME_CHANGE_MODE_PS_TO_FPS
+2307 RAME_INVALID_GO_BEACON_DRIFT_VALUE
+2308 RAME_INVALID_SET_PEER_CHANNEL_REQUEST
+2309 RAME_INVALID_SCHED_REQUEST
+230a RAME_COEX_BLACKOUT_ATTACH_INVALID_VIF
+230b RAME_ENCRYPTION_KEYFIND_FAIL
+230c RAME_SET_QOS_INVALID_STA
+230d RAME_MLME_TX_FRAME_REQUEST_WITH_NULL_MBULK
+230e RAME_STA_DOUBLE_ADD
+230f RAME_SCHDL_UNEXPECTED_RESUME_REQUEST
+2310 RAME_SCHDL_UNEXPECTED_SIGNAL
+2311 RAME_COEX_BLACKOUT_ATTACH_FAILED
+2312 RAME_MLME_FRAME_DISCARDED
+2313 RAME_UNEXPECTED_SIGNAL
+2314 RAME_COEX_IDLE_EXIT_FORCED
+2315 RAME_RADIO_UNEXPECTED_SIGNAL
+2316 RAME_EARLIEST_TOO_LATE
+2317 RAME_USING_FORCED_CHANNEL_BW
+2318 RAME_NO_CCK_MODEM
+2319 RAME_BEACON_TX_SW_DEADLINE_MISSED
+231a RAME_RADIOMAC_SWITCH_FAILED
+231b RAME_RADIOMAC_SWITCH_OFF_FAILED
+231c RAME_IQ_RESOURCE_UNAVAILABLE
+231d RAME_IQ_INVALID_PARAM
+231e RAME_INVALID_ANTENNA_CONFIG
+231f SCHDL_UNEXPECTED_START_IND
+2320 RAME_FTM_INVALID_DFE_CONFIG
+2321 RAME_FTM_INVALID_BANDWIDTH_CONFIG
+2322 RAME_CALIB_UNEXPECTED_SIGNAL
+2323 RAME_SCAN_BLOCKED_BY_NUM_VIFS
+2500 MLME_WIFI_LOGGER_JAMMER_LIKELY_PRESENT
+2501 MLME_WIFI_LOGGER_NO_MEM
+2510 MLME_AP_CONNECTED_RSP_UNEXPECTED
+2511 MLME_AP_DISCARDED_DISCONNECTION_FRAME
+2512 MLME_AP_UNHANDLED_MM_FRAME_IND
+2513 MLME_AP_PMKID_COULD_NOT_BE_COMPUTED
+2514 MLME_AP_PROVIDED_PMKIDS_ARE_INVALID
+2515 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD
+2516 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD_WRONG_STATE
+2517 MLME_AP_SA_QUERY_IND_NO_PEER_RECORD
+2530 MLME_BA_EXTRA_DELETE_CONFIRM
+2531 MLME_BA_TX_RES_POLICY_INVALID
+2532 MLME_BA_NO_PEER_FOUND
+2533 MLME_BA_TX_ADD_NOT_ALLOWED_NAN_TOO_MANY
+2534 MLME_BA_RX_ADD_REJECTED_MIB
+2535 MLME_BA_RX_ADD_REJECTED_RAME
+2536 MLME_BA_RX_ADD_REJECTED_HT
+2537 MLME_BA_RX_SPAREA
+2538 MLME_BA_RX_ADD_INVALID_REQ
+2539 MLME_BA_TX_ADD_NOT_ALLOWED_MIB
+253a MLME_BA_TX_ADD_NOT_ALLOWED_TOO_MANY
+253b MLME_BA_TX_ADD_NOT_ALLOWED_HT
+253c MLME_BA_TX_ADD_INVALID_REQ
+253d MLME_BA_TX_ADD_WITHOUT_PEER
+253e MLME_BA_TX_RES_MACRAME_BLOCKED
+253f MLME_BA_TX_RES_PID_MISMATCH
+2550 MLME_CONMGR_AP_REJECTED_US
+2551 MLME_CONMGR_CONNECTION_ATTEMPT_ABORTED
+2553 MLME_CONMGR_ASSOC_VERIFICATION_FAILED
+2556 MLME_CONMGR_FAILED_TO_SEND_ASSOC
+2559 MLME_CONMGR_MBULK_ALLOC_FAILURE
+255a MLME_CONMGR_TIMEOUT
+255b MLME_CONMGR_TX_OR_TIMEOUT
+2570 MLME_FRAME_BSSID_NOT_INDIVIDUAL
+2571 MLME_FRAME_BUILD_INCR_MBULK_ALLOC_FAILED
+2572 MLME_FRAME_BUILD_INCR_NULL_FRAME
+2573 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_SUBTYPE
+2574 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_TYPE
+2575 MLME_FRAME_DATA_GET_PRI_INVALID_SUBTYPE
+2576 MLME_FRAME_DATA_GET_PRI_INVALID_TYPE
+2577 MLME_FRAME_DATA_PACKET_NULL_PTR
+2578 MLME_FRAME_FAILED_VALIDATION_CODE
+2579 MLME_FRAME_GET_BSSID_UNEXPECTED_DS
+257a MLME_FRAME_GET_DA_UNEXPECTED_DS
+257b MLME_FRAME_GET_SA_UNEXPECTED_DS
+257c MLME_FRAME_HEADER_INVALID_TYPE
+257d MLME_FRAME_ICMP6_CHECKSUM_MALLOC_ERR
+257e MLME_FRAME_MBULK_SIZE_NOT_ENOUGH
+257f MLME_FRAME_RM_RM_REPORT_INVALID_ELEMENTS
+2580 MLME_FRAME_RM_RM_REPORT_NO_MEASUREMENT_REPORT
+2581 MLME_FRAME_TDLS_GET_ACTION_OFFSET_INVALID_SUBTYPE
+2582 MLME_FRAME_TDLS_GET_ELEMENT_OFFSET_INVALID_ACTION
+2583 MLME_FRAME_UNEXPECTED_MGT_FRAME
+2584 MLME_FRAME_ALLOC_FAILED
+2585 MLME_FRAME_CRITICAL_PARAM_IE_LENGTH_ERROR
+2586 MLME_FRAME_NAN_SDF_WITH_NO_PAYLOAD
+25a0 MLME_IE_RSN_INVALID_LENGTH
+25a1 MLME_IE_COUNTRY_INVALID_LENGTH_OUT_OF_RANGE
+25a2 MLME_IE_COUNTRY_INVALID_LENGTH_PADDING
+25a3 MLME_IE_RATE_INVALID_RATE_1
+25a4 MLME_IE_RATE_INVALID_RATE_2
+25a5 MLME_IE_RATE_INVALID_RATE_3
+25a6 MLME_IE_RSN_INVALID_AKM_COUNT
+25a7 MLME_IE_RSN_INVALID_CAPS_LENGTH
+25a8 MLME_IE_RSN_INVALID_PAIRWISE_COUNT
+25a9 MLME_IE_RSN_NO_AKM_SUITE
+25aa MLME_IE_CRITICAL_PARAM_LENGTH_ERROR
+25ab MLME_IE_RSN_INVALID_PMKID_COUNT
+25ac MLME_IE_RSN_INVALID_VERSION
+25ad MLME_IE_RSN_INVALID_PMF_SETTINGS
+25ae MLME_IE_RSN_CORRUPT_AKM_SUITE
+25af MLME_IE_RSN_INVALID_PARWISE_CIPHER_COUNT
+25b1 MLME_IE_RSN_INVALID_GROUP_CIPHER_SIZE
+25b2 MLME_IE_RSN_NO_PAIRWISE_CIPHER_SUITE
+25c0 MLME_MEASUREMENTS_MBULK_ALLOC_FAILURE
+25c1 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_FAIL
+25c2 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_LEAK
+25c3 MLME_MEASUREMENTS_MBULK_RM_BEACON_REQUEST_LEAK
+25c4 MLME_MEASUREMENTS_MBULK_RM_LM_REPORT_FAIL
+25c5 MLME_MEASUREMENTS_MBULK_SCAN_IES_ALLOC_FAIL
+25d0 MLME_MPDU_ROUTER_INVALID_FRAME_DISCARDED
+25d1 MLME_MPDU_ROUTER_REGISTER_INVALID_NO_BUFFER_MEMORY
+25e0 MLME_NAN_CONFIG_TLV_DOES_NOT_EXIST
+25e1 MLME_NAN_INVALID_MAC_ADDR_RANDOMISATION_INTERVAL
+25e2 MLME_NAN_INVALID_MASTER_PREFERENCE_VALUE
+25e3 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_2
+25e4 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_1
+25e5 MLME_NAN_MBULK_SCAN_IES_ALLOC_FAIL
+25e6 MLME_NAN_PUBLISH_NODE_ALLOC_FAILURE
+25e7 MLME_NAN_INVALID_SERVICE_DESCRIPTOR
+25e8 MLME_NAN_MATCH_NODE_ALLOC_FAILURE
+25e9 MLME_NAN_INVALID_BAND_CONFIG
+25ea MLME_NAN_UNEXPECTED_AMR_UPDATE_FLAGS
+2600 MLME_REGULATORY_20_MHZ_CHANNEL_WIDTH_NOT_FOUND
+2601 MLME_REGULATORY_BAD_CHANNEL_CENTRE_FREQUENCY
+2602 MLME_REGULATORY_COUNTRY_NOT_FOUND_USE_WORLD
+2603 MLME_REGULATORY_DEFAULT_CASE_SHOULD_NOT_HAPPEN
+2604 MLME_REGULATORY_FAILED_TO_MATCH_COUNTRY_CODE_FOR_EVALUATED_IDX
+2605 MLME_REGULATORY_SET_COUNTRY_REQ_IS_INVALID_USE_WORLD
+2607 MLME_REGULATORY_OPERATING_CLASS_TABLE_READ_FAILURE
+2608 MLME_REGULATORY_NO_MEM
+2610 MLME_REQUESTS_VIF_INCOMPATIBLE_FOR_SINGAL
+2611 MLME_REQUESTS_MIB_MBULK_GET_CFM_ALLOC_FAIL
+2612 MLME_REQUESTS_MIB_MBULK_SET_CFM_ALLOC_FAIL
+2613 MLME_REQUESTS_MISSING_MANDATORY_MBULK
+2614 MLME_REQUESTS_NO_DESTINATION_FOR_VIF_IN_SIGNAL
+2615 MLME_REQUESTS_SPURIOUS_MBULK_IN_SIGNAL
+2620 MLME_ROAMING_MBULK_SCAN_IES_ALLOC_FAIL
+2621 MLME_ROAMING_MBULK_CANDIDATE_ALLOC_FAIL
+2630 MLME_SA_QUERY_NO_PEER_RECORD
+2631 MLME_SA_QUERY_NO_BUFFER_IN_FRAME_INDICATION
+2642 MLME_SCAN_DESC_LIST_AP_THRESHOLD_DIFFERS
+2643 MLME_SCAN_DESC_LIST_IE_INVALID_LENGTH
+2644 MLME_SCAN_DESC_LIST_RSSI_THRESHOLD_INVALID
+2648 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_SPS
+264e MLME_SCAN_ERROR_IN_GET_NEXT_CHANNEL
+264f MLME_SCAN_SPAREB
+2655 MLME_SCAN_IGNORING_SCHED_IND
+2656 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_LISTS
+2658 MLME_SCAN_MORE_THAN_ONE_PRIORITY_PAUSE
+2659 MLME_SCAN_NO_CHANNELS_SCANNED
+265a MLME_SCAN_NO_MEDIUM_ENABLED_TEST_USE_ONLY_1
+265b MLME_SCAN_NO_MEMORY_FOR_SCAN_FRAME_DETAILS
+265c MLME_SCAN_ADD_INVALID_NO_CHANNELS
+265d MLME_SCAN_NO_MEM_FOR_LOST_AP_DATA_REF
+265e MLME_SCAN_NO_MEM_FOR_SIGNIFICANT_CHANGE_DATA_REF
+265f MLME_SCAN_NO_MEDIUM_TEST_MODE
+2660 MLME_SCAN_SPAREC
+2661 MLME_SCAN_UNPAUSE_WHEN_NOT_PAUSED
+2662 MLME_SCAN_UNSUPPORTED_CHANNEL
+2664 MLME_SCAN_VERIFICATION_DEVICE_ADDRESS_INVALID
+2665 MLME_SCAN_VERIFICATION_DUPLICATED_WILDCARD_SSID
+2666 MLME_SCAN_VERIFICATION_SCAN_ID_INVALID
+2667 MLME_SCAN_VERIFICATION_IES_TOO_LONG
+2668 MLME_SCAN_VERIFICATION_IE_BUFFER_CORRUPT
+266a MLME_SCAN_VERIFICATION_IE_MISSING_BSSID_IE
+266b MLME_SCAN_VERIFICATION_IE_NOT_RECOGNISED
+266c MLME_SCAN_VERIFICATION_IE_NO_CHANNEL_OR_BSSID_LIST
+266d MLME_SCAN_VERIFICATION_IE_NO_SCAN_TIMING
+266e MLME_SCAN_VERIFICATION_IE_TO_SMALL
+2670 MLME_SCAN_VERIFICATION_INVALID_CHANNEL_COUNT
+2671 MLME_SCAN_VERIFICATION_INVALID_POLICY
+2672 MLME_SCAN_VERIFICATION_INVALID_POLICY_1
+2673 MLME_SCAN_VERIFICATION_INVALID_POLICY_2
+2674 MLME_SCAN_VERIFICATION_INVALID_REPORT_BITMAP
+2675 MLME_SCAN_VERIFICATION_INVALID_SCAN_TYPE
+2676 MLME_SCAN_VERIFICATION_MULTIPLE_CHANNEL_LISTS
+2677 MLME_SCAN_VERIFICATION_NEIGHBOUR_DL_IE_INVALID
+2678 MLME_SCAN_VERIFICATION_SSID_FILTER_IE_INVALID_LENGTH
+2679 MLME_SCAN_VERIFICATION_SSID_IE_INVALID_LENGTH
+267a MLME_SCAN_VERIFICATION_TIMING_IE_INVALID
+267b MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_1
+267c MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_2
+267d MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_3
+267e MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_4
+267f MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_5
+2680 MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_6
+2681 MLME_SCAN_VERIFICATION_NCHO_SCAN
+2682 MLME_SCAN_DISABLED_IN_SPS
+2683 MLME_SCAN_CALLBACK_INVALID
+2684 MLME_SCAN_VERIFICATION_SSID_DESCRIPTOR_INVALID_LENGTH
+26a0 MLME_SECURITY_EAPOL_NO_PEER_FOUND
+26a1 MLME_SECURITY_EAPOL_UNEXPECTED_SECURITY_SUITE
+26a2 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK
+26a3 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_LEN
+26a4 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_1
+26a5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_LEN
+26a6 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_UNWRAP_FAILURE
+26a7 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R0KHID
+26a8 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R1KH_ID
+26a9 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_1
+26aa MLME_SECURITY_FT_AUTH_VALIDATION_MDE_BAD_MDID
+26ab MLME_SECURITY_FT_AUTH_VALIDATION_MIC_CMP_FAILURE
+26ac MLME_SECURITY_FT_AUTH_VALIDATION_NO_FTE
+26ad MLME_SECURITY_FT_AUTH_VALIDATION_NO_MDE
+26ae MLME_SECURITY_FT_AUTH_VALIDATION_NO_RSN
+26b0 MLME_SECURITY_MBULK_ALLOC_FAILURE
+26b1 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_1
+26b2 MLME_SECURITY_NO_MEM_FOR_ANONCE
+26b3 MLME_SECURITY_WRONG_EAPOL_TYPE
+26b4 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_2
+26b5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_2
+26b6 MLME_SECURITY_FT_UNKNOWN_MIC_LEN
+26b7 MLME_SECURITY_M3_PROCESSING_FAILURE
+26bf MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_2
+26d0 MLME_TDLS_SPAREA
+26d1 MLME_TDLS_DISCOVERY_REQUEST_LINKID_INVALID
+26d2 MLME_TDLS_DISCOVERY_REQUEST_NOT_ALLOWED
+26d3 MLME_TDLS_DISCOVERY_RESPONSE_DIALOG_TOKEN_INVALID
+26d4 MLME_TDLS_DISCOVERY_RESPONSE_LINKID_INVALID
+26d5 MLME_TDLS_DISCOVERY_RESPONSE_UNEXPECTED
+26d6 MLME_TDLS_IS_NOT_ACTIVATED
+26d7 MLME_TDLS_LINK_IS_NOT_ESTABLISHED
+26d8 MLME_TDLS_LINK_IS_NULL
+26d9 MLME_TDLS_NO_FREE_SLOT
+26da MLME_TDLS_PEER_NOT_FOUND_1
+26db MLME_TDLS_PEER_NOT_FOUND_2
+26dc MLME_TDLS_RAME_CFM_PEER_NOT_FOUND
+26dd MLME_TDLS_SETUP_CONFIRM_DIALOG_INVALID
+26de MLME_TDLS_SETUP_CONFIRM_LINKID_INVALID
+26df MLME_TDLS_SETUP_CONFIRM_REJECTED
+26e0 MLME_TDLS_SETUP_CONFIRM_TPK_INVALID
+26e1 MLME_TDLS_SETUP_CONFIRM_WRONG_STATE
+26e2 MLME_TDLS_SETUP_REQUEST_DISCARDED_CONFIRM
+26e3 MLME_TDLS_SETUP_REQUEST_MAX_LINKS
+26e4 MLME_TDLS_SETUP_REQUEST_SETUP_IN_PROGRESS
+26e5 MLME_TDLS_SETUP_RESPONSE_INVALID
+26e6 MLME_TDLS_SETUP_RESPONSE_SECURITY_INVALID
+26e7 MLME_TDLS_SETUP_RESPONSE_WRONG_STATE
+26e8 MLME_TDLS_UNKNOWN_ACTION_TYPE
+26ea MLME_TDLS_TERMINATE_ADDRESS_UNKNOWN
+2700 RADIO_WL_RX_COMP
+2701 RADIO_RX_DCOC_TIMEOUT
+2702 RADIO_DPD_GAIN_ALIGN_PATH_ZERO
+2703 RADIO_BAD_BB_SAMPLE_OFFSET_SHORT_GI
+2704 RADIO_RECALIBRATE
+2705 RADIO_UNKNOWN_PLATFORM
+2707 RADIO_UNSUPPORTED_PLATFORM_FEATURE
+2708 RADIO_PAPR_CONFIG
+2709 RADIO_INVALID_MODULATION_TYPE
+270a RADIO_LOGGER_HW_FAIL
+270b RADIO_SIGNANAL_TOO_MANY_SAMPLES_READ
+270c RADIO_INVALID_RADIO_IDENTIFIER
+270d RADIO_VCO_LOCK_FAILED
+270e RADIO_ADC_CONVERT
+270f RADIO_DPD_LOOPBACK_SIGNAL_SUSPECT
+2710 RADIO_INVALID_FIR_COEFFICIENT
+2711 RADIO_INCOMPATIBLE_REG_DOMAINS
+2712 RADIO_RICE_FREQ_OUTSIDE_KNOWN_BANDS
+2713 RADIO_RICE_PACKET_WHEN_MODEM_DISCONNECTED
+2714 RADIO_RICE_FREQUENCY_OFFSET_TOO_BIG
+2715 RADIO_SETUP_FAILED
+2716 RADIO_ESTIMATES
+2717 RADIO_INVALID_RSSI
+2718 RADIO_POWER_OVERRIDDEN
+2719 RADIO_DPD_LOOPBACK_FIR_GAIN
+271a RADIO_SPIKE_REMOVED_FROM_DPD_LUT
+271b RADIO_SIGNAL_ANALYSER_16_BIT_OVERFLOW
+271c RADIO_IQ_CAPTURE_FREE_RAMSW_INFO
+271d RADIO_DPD_SUSPECT_LUT
+271e RADIO_SA_ZERO_AS_DIVISOR
+271f RADIO_DPD_BAD_LUT_QUALITY
+2720 RADIO_LOGGER_BAD_CAPTURE
+2721 RADIO_RUN_OUT_TRIM_TIME_DPD
+2722 RADIO_XDMAC_MEMCPY_FAIL
+2723 RADIO_RX_AAB_FTRIM
+2724 RADIO_WBRSSI_FAILED
+2725 RADIO_TX_POWER_DIGITAL_SERVO
+2726 RADIO_VALUE_BELOW_MIN_SETTING
+2727 RADIO_VALUE_ABOVE_MAX_SETTING
+2728 RADIO_NO_SUITABLE_SETTING
+2729 RADIO_TX_POWER_DIGITAL_LIMIT
+272a RADIO_BAD_POWER_TABLE_CONFIG
+272b RADIO_BAD_TX_SETTINGS
+272c RADIO_BAD_ANTENNA_GAIN_SETTINGS
+272d RADIO_BAD_IREF_TRIM
+272e RADIO_AGC_SETTING_OUT_OF_RANGE
+272f RADIO_DPD_LOOPBACK_ABB_GAIN
+2730 RADIO_DPD_CALC_LOOPBACK_BROKEN_RX
+2731 RADIO_CHIP_DOES_NOT_SUPPORT_RX_IQ_CONFIG
+2732 RADIO_RX_IQ_TRIM_RADIO_ISSUE
+2733 RADIO_RX_IQ_TRIM_NUMERIC_ISSUE
+2734 RADIO_DPD_LOOPBACK_RESTART_ALIGN
+2735 RADIO_INADEQUATE_TRIM_TIME
+2736 RADIO_CHAN_RSSI_MEASUREMENT_ERROR
+2737 RADIO_DPD_CALC_LOOPBACK_CORRELATION
+2738 RADIO_INADEQUATE_TRIM_RANGE
+2739 RADIO_BAD_RSSI_PDOLLOP_RSSI_LIN_IS_ZERO
+273a RADIO_LARGE_RX_DCOC_OFFSET_TRIM_VALUE
+273b RADIO_DPD_IQ_CAPTURE_FAILURE
+273c RADIO_INDICATE_FW_SIGANAL_USAGE
+273d RADIO_RX_DCOC_RF_AGC_MAX_GAINS_TIMEOUT
+273e RADIO_RX_DCOC_RF_MAXIMUM_RETRIES
+273f RADIO_TX_POWER_PRE_GAIN_TOO_LOW
+2740 RADIO_TX_POWER_TRIM_FAILED
+2741 RADIO_IQ_TRIM_NOT_CONVERGING
+2742 RADIO_BAD_CONFIG_FOR_FLEXIMAC_POWER_TRIM
+2743 RADIO_INVALID_RSSI_ADJUSTMENTS
+2744 RADIO_INVALID_FEC_CONFIG
+2745 RADIO_TRIM_PASS_EXCEEDED_SCO_LIMIT
+2746 RADIO_SIG_AN_LOCKED_UP
+2747 RADIO_PA_SAT_READING_LOW
+2748 RADIO_PHY_FLEXIMAC_ST_TOO_LONG
+2749 RADIO_INVALID_PER_CH_TRIM_ITERATION
+274a RADIO_BAD_TX_IQ_DIFFERENTIAL_DELAY
+274b RADIO_UNEXPECTED_FLEXIMAC_STATE
+274c RADIO_EXCESS_RX_IQ_COMP_MEAS_VARIATION
+274d RADIO_TX_PARAMETER_OUT_OF_RANGE
+2800 TEST_WLANLITE_AMPDU_TOO_LONG
+2801 TEST_WLANLITE_INVALID_RATE
+2802 TEST_WLANLITE_MAC_BAND_MAPPING_NOT_UNIQUE
+2803 TEST_WLANLITE_BEAMFORMER
+2804 TEST_WLANLITE_INVALID_BANDWIDTH
+2805 TEST_WLANLITE_CHANNEL_RSSI_MEASUREMENT_FAILED
+2806 BIST_LOW_LOOPBACK_GAIN
+2807 BIST_BROKEN_LOOPBACK
+2808 TEST_MICRAME_TX_BAD_PPDU_STATE
+2809 RADIO_RX_IQ_TRIM_FAILED_AFTER_RETRIES
+2900 COEX_DEBUG_OVERRIDE_BT_ENABLED
+2901 COEX_INIT_FAILED
+2902 COEX_WRONG_IMPOSED_MIN_RATE
+2903 COEX_MAC_CREATE_BLACKOUT_FAILED
+2904 COEX_VIF_UPDATE_TIMING
+2905 COEX_VIF_TIMING_BAD_NOA_OFFSET
+2906 COEX_MODEM_CC_BAND_UNKNOWN
+2907 COEX_MODEM_CDMA_BAND_UNKNOWN
+2a00 COMMON_FSM_LEAKY_SIGNAL_DISCARDED
+2a01 COMMON_FSM_ERROR_PROCESSING_SIGNAL
+2a02 COMMON_FSM_UNEXPECTED_TERMINATED_FSM
+2a10 COMMON_MIB_WRITE
+2a11 COMMON_MIB_READ
+2a12 COMMON_MIB_REQ_VAL_ABSENT
+2a13 COMMON_MIB_TYPE_CLASH
+2a14 COMMON_MIB_RAM_CORRUPT
+2a15 COMMON_MIB_DUFF_INDEX_COUNT
+2a16 COMMON_MIB_ROM_CORRUPT
+2a17 COMMON_MIB_INVALID_INDEX
+2a18 COMMON_MIB_LIMIT
+2a19 COMMON_MIB_RAM_REC_CORRUPT
+2a1a COMMON_MIB_ASSERT_FAIL
+2a1b COMMON_MIB_TAB_INDEX
+2a1c COMMON_MIB_READ_WARNING
+2a1d COMMON_MIB_WRITE_WARNING
+2a1e COMMON_MIB_NON_EXISTENT_VIF_INDEX
+2a30 COMMON_STA_DATA_CREATE_RECORD
+2a31 COMMON_STA_DATA_CREATE_RECORD_INIT_CALLS_DELAYED
+2a40 COMMON_RATE_BAD_RATE_TX
+2a50 COMMON_DORM_INVALID_ENTITY
+2a60 COMMON_DEBUG_INIT
+2a70 COMMON_HIP_BAD_SIGNAL_PROCESS_ID
+2a80 COMMON_HOSTIO_KICK_UNMASK_TO_HOST_INT
+2a81 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a90 COMMON_VLDATA_TOO_BIG
+2a91 COMMON_VLDATA_WRONG_FORMAT
+2a92 COMMON_VLDATA_NEGATIVE_UNSIGNED_VALUE
+2a93 COMMON_VLDATA_OVERFLOW
+2a94 COMMON_VIF_WRONG_TYPE
+2aa0 COMMON_FAULT_INIT
+2ab0 COMMON_PANIC_SUBSYSTEM_LEVEL
+2c00 MLME_VIFCTRL_ACTIVE_PROCESSING_TIME_NOT_RECEIVED
+2c01 MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_AUTH_TYPE
+2c02 MLME_VIFCTRL_ARP_EXTRACT_ARP_INFO_INVALID_ETH_TYPE
+2c03 MLME_VIFCTRL_ARP_EXTRACT_NDP_INFO_INVALID_ETH_TYPE
+2c04 MLME_VIFCTRL_ARP_OFFLOAD_INVALID_ARP_FRAME
+2c05 MLME_VIFCTRL_ARP_OFFLOAD_IP4_ADDR_UNSET
+2c06 MLME_VIFCTRL_BAD_BEACON_1
+2c07 MLME_VIFCTRL_CHANNEL_SWITCH_REQ_CHANNEL_VALIDATION_FAILED
+2c08 MLME_VIFCTRL_PEER_NOT_FOUND_2
+2c09 MLME_VIFCTRL_CONNECT_REQ_INFO_BSSID_IS_GROUP_ADDRESS
+2c0a MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_CHANNEL_CONFIG
+2c0b MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_RSN_IE
+2c0c MLME_VIFCTRL_CONNECT_REQ_INFO_NO_SSID_IE
+2c0d MLME_VIFCTRL_CONNECT_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c0e MLME_VIFCTRL_ECSA_IS_NOT_STARTED
+2c0f MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_HOST_PID
+2c10 MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_TAG
+2c11 MLME_VIFCTRL_FRAME_BAD_TAG_INDEX
+2c12 MLME_VIFCTRL_INVALID_PMF
+2c13 MLME_VIFCTRL_KEEPALIVE_IP4_ADDR_UNSET
+2c14 MLME_VIFCTRL_BAD_BEACON_2
+2c15 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED
+2c16 MLME_VIFCTRL_NAN_START_REQ_INFO_INVALID_TLV
+2c18 MLME_VIFCTRL_NAN_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c19 MLME_VIFCTRL_NDP_OFFLOAD_INVALID_ICMP6_FRAME
+2c1a MLME_VIFCTRL_NDP_OFFLOAD_INVALID_NDP_NS_FRAME
+2c1b MLME_VIFCTRL_NOA_SCHEDULE_INCOMPLETE
+2c1c MLME_VIFCTRL_NOA_SCHEDULE_INVALID
+2c1d MLME_VIFCTRL_NO_MEM_FOR_WMM
+2c1f MLME_VIFCTRL_NO_VALID_RATES_INTERSECTION
+2c20 MLME_VIFCTRL_OBSS_CANT_ALLOC_SCAN_IES
+2c21 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_INVALID
+2c22 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_DFS_OR_NOR_IR
+2c23 MLME_VIFCTRL_OFFCHANNEL_SPARE
+2c24 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_PARAMETERS
+2c25 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_VIF
+2c26 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_TOO_MANY_SIMULTANEOUS_REQUESTS
+2c27 MLME_VIFCTRL_OLBC_DURATION_TIMEOUT_INVALID
+2c28 MLME_VIFCTRL_UNKNOWN_AP
+2c29 MLME_VIFCTRL_PEER_NOT_FOUND_1
+2c2a MLME_VIFCTRL_PEER_NOT_FOUND_3
+2c2b MLME_VIFCTRL_PEER_NOT_FOUND_4
+2c2c MLME_VIFCTRL_PEER_NOT_FOUND_5
+2c2d MLME_VIFCTRL_PEER_NOT_FOUND_6
+2c2e MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_BLACKOUT_LIST_FULL
+2c2f MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_1
+2c30 MLME_VIFCTRL_RAME_DEL_NOA_IND_FAILED_TO_MATCH
+2c32 MLME_VIFCTRL_RA_PKT_VALIDATION_FAILED
+2c33 MLME_VIFCTRL_SECURITY
+2c34 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_CHANNEL
+2c35 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_COUNT
+2c36 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_DURATION
+2c37 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_INTERVAL
+2c38 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_P2P_IE
+2c39 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_WSC_IE
+2c3b MLME_VIFCTRL_SET_CHANNEL_FAILURE_REGULATORY
+2c3c MLME_VIFCTRL_SET_IP_ADDR_INVALID_VERSION
+2c3e MLME_VIFCTRL_START_REQ_INFO_COUNTRY_MISMATCH
+2c3f MLME_VIFCTRL_START_REQ_INFO_INVALID_AUTH_TYPE
+2c40 MLME_VIFCTRL_START_REQ_INFO_INVALID_BEACON_PERIOD
+2c41 MLME_VIFCTRL_START_REQ_INFO_INVALID_BSSID
+2c42 MLME_VIFCTRL_START_REQ_INFO_INVALID_CHANNEL
+2c43 MLME_VIFCTRL_START_REQ_NO_VALID_CHANNEL_IS_FOUND
+2c45 MLME_VIFCTRL_START_REQ_INFO_INVALID_DTIM_PERIOD
+2c46 MLME_VIFCTRL_START_REQ_INFO_INVALID_IE_LIST
+2c48 MLME_VIFCTRL_START_REQ_INFO_MULTIPLE_SECURITY_IES
+2c49 MLME_VIFCTRL_START_REQ_INFO_NO_RATES_IE
+2c4a MLME_VIFCTRL_START_REQ_INFO_NO_SSID_IE
+2c4b MLME_VIFCTRL_START_REQ_INFO_P2P_NO_PROBE_RSP_IES
+2c4c MLME_VIFCTRL_START_REQ_INFO_VENDOR_IE_PRESENT
+2c4d MLME_VIFCTRL_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c4e MLME_VIFCTRL_START_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c4f MLME_VIFCTRL_STATION_INACTIVITY_PEER_NOT_FOUND
+2c50 MLME_VIFCTRL_TOO_MANY_QUIET_ELEMENTS
+2c51 MLME_VIFCTRL_SPAREB
+2c52 MLME_VIFCTRL_UNABLE_TO_USE_CHAN_FROM_BEACON
+2c53 MLME_VIFCTRL_UNEXPECTED_IP_VER
+2c54 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_1
+2c55 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_2
+2c56 MLME_VIFCTRL_WIFISHARING_INVALID_CHANNEL
+2c57 MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_2
+2c58 MLME_VIFCTRL_CHANNEL_SWITCH_BAD_CHANNEL
+2c59 MLME_VIFCTRL_CHANNEL_SWITCH_WIFISHARING_NOT_ALLOWED
+2c5a MLME_VIFCTRL_UNEXPECTED_QE_DEL_REQ
+2c60 MLME_VIFCTRL_AP_NO_CHANNEL_FOUND
+2c61 MLME_VIFCTRL_STA_CHANNEL_NOT_FOUND
+2c62 MLME_VIFCTRL_EDCA_OVERRIDE_FAILED
+2c63 MLME_VIFCTRL_READ_APF_MBULK_ALLOC_FAIL
+2c70 MLME_CHANNELISATION_LTE_COEX_NO_CHANNEL_FOUND
+2c71 MLME_MBULK_NOT_ENOUGH_HEADROOM
+2c72 MLME_STATION_RECORD_DOES_NOT_EXIST
+2c73 MLME_UTILS_FORCE_ACTIVE_IDEMPOTENT_FALSE
+2c74 MLME_UTILS_FORCE_ACTIVE_OUT_OF_RANGE
+2c75 MLME_UTILS_NON_STATION_POWERMGT
+2c76 MLME_INVALID_SIGNAL_DISCARDED
+2c77 MLME_UTILS_MBULK_CLONE_OUT_OF_MEM
+2c90 MLME_TXPOWER
+2c91 MLME_TXPOWER_SAR_INIT
+2c92 MLME_TXPOWER_NO_CELL_INIT
+2c93 MLME_TXPOWER_NO_CELL_INIT_INCLUDED_CHANNELS
+2c94 MLME_TXPOWER_POWER_CAP_BELOW_MIN
+2c95 MLME_TXPOWER_11AC_TPC_NO_ENV_WITH_RM
+2ca0 MLME_FTM_CREATE_RESPONDER_ENTRY
+2ca1 MLME_FTM_INVALID_PARAMETERS
+2ca2 MLME_FTM_INVALID_RANGE_REQ
+2ca3 MLME_FTM_MBULK_SCAN_IES_ALLOC_FAIL
+2ca4 MLME_FTM_SCAN_UNKNOWN_RESPONDER
+2ca5 MLME_FTM_SCAN_NO_RESPONDER_FOUND
+2ca6 MLME_FTM_DEL_UNKNOWN_RESPONDER
+2ca7 MLME_FTM_CREATE_RTT_RECORD
+2ca8 MLME_FTM_RTT_CONF_NO_RESPONDERS
+2ca9 MLME_FTM_RTT_CONF_TOO_MANY_RESPONDERS
+2caa MLME_FTM_RTT_CONF_DUPLICATE_PEER
+2cab MLME_FTM_RTT_CONF_BURST_PERIODS_CONFLICT
+2cac MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_SHORT
+2cad MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_LONG
+2cae MLME_FTM_RTT_CONF_INVALID_RTT_TYPE
+2caf MLME_FTM_RTT_CONF_INVALID_CHANNEL_FREQ
+2cb0 MLME_FTM_RTT_CONF_INVALID_BURST_PERIOD
+2cb1 MLME_FTM_RTT_CONF_INVALID_BURSTS_EXPONENT
+2cb2 MLME_FTM_RTT_CONF_INVALID_FRAMES_PER_BURST
+2cb3 MLME_FTM_RTT_CONF_INVALID_BURST_DURATION
+2cb4 MLME_FTM_RTT_CONF_TOO_MANY_FRAMES_IN_BURST
+2cb5 MLME_FTM_PARAMETER_OVERRIDE_BURST_EXPONENT
+2cb6 MLME_FTM_PARAMETER_OVERRIDE_BURST_DURATION
+2cb7 MLME_FTM_PARAMETER_OVERRIDE_BURST_MIN_DELTA
+2cb8 MLME_FTM_PARAMETER_OVERRIDE_ASAP_MDOE
+2cb9 MLME_FTM_PARAMETER_OVERRIDE_FTM_PER_BURST
+2cba MLME_FTM_PARAMETER_OVERRIDE_BANDWIDTH
+2cbb MLME_FTM_PARAMETER_OVERRIDE_INTERVAL
+2cbc MLME_FTM_REQUEST_VALIDATION_DISABLED
+2cbd MLME_FTM_RESPONSE_VALIDATION_DISABLED
+2cbe MLME_FTM_CREATE_RTT_RECORD_DUPLICATED
+2cbf MLME_FTM_RTT_RECORD_NOT_FOUND
+2cc0 MLME_FTM_BURST_PARAMETERS_NOT_EXIST
+2cc1 MLME_FTM_PARAMETER_OVERRIDE_START_TIME
+2cc2 MLME_FTM_RTT_CONF_INVALID_BURST_INTERVAL
+2cc3 MLME_FTM_RTT_MEASUREMENT_UNSUCCESSFUL
+2cc4 MLME_FTM_RTT_T3_T2_INVALID
+2cc5 MLME_FTM_RTT_T4_T1_INVALID
+2cc6 MLME_FTM_RTT_T4_T1_IS_LESS_THAN_T3_T2
+2cd0 MLME_NDM_UNEXPECTED_FRAME
+2ce0 MLME_NAM_NDC_SCHEDULE_NOT_POSSIBLE
+panicid 722
+2000 DPLP_FRAG_GENERIC
+2001 DPLP_FRAG_WRONG_LEN
+2002 DPLP_FRAG_FREE_DU
+2003 DPLP_FRAG_IS_LAST_FRAME_FRAG
+2004 DPLP_FRAG_IS_INCONSISTENT
+2010 DPLP_FALLBACK_GENERIC
+2011 DPLP_FALLBACK_INVALID_MIB_SIZE
+2013 DPLP_FALLBACK_INVALID_MODULATION
+2014 DPLP_FALLBACK_MAX_ENTRIES_IS_ZERO
+2016 DPLP_FALLBACK_FAILED_TO_ALLOCATE_LINK_INFO
+2017 DPLP_FALLBACK_TBL_LENGTH_OUT_OF_BOUNDS
+2018 DPLP_FALLBACK_RATE_INDEX_OUT_OF_BOUNDS
+2020 DPLP_ENC_HNDL_GENERIC
+2021 DPLP_ENC_HNDL_WRONG_ENC_TYPE
+2022 DPLP_ENC_HNDL_MBULK_NULL
+2023 DPLP_ENC_HNDL_KEYC_NULL
+2024 DPLP_ENC_HNDL_NO_ROOM_LEFT
+2025 DPLP_ENC_HNDL_LIST_EMPTY
+2026 DPLP_ENC_HNDL_NO_KEY_FOUND
+2027 DPLP_ENC_HNDL_ENC_INFO_ALLOC_FAIL
+2028 DPLP_ENC_HNDL_NO_FRAMES_QUEUED_TO_DPHP
+2029 DPLP_ENC_HNDL_WAPI_CRYPTOSW_INVALID
+202a DPLP_ENC_HNDL_MBULK_IS_CHAINED
+2030 DPLP_CTRL_MGRL_GENERIC
+2031 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSING
+2032 DPLP_CTRL_MGR_DP_STATE_NOT_RESUMING
+2033 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSED
+2034 DPLP_CTRL_MGR_NEW_CMD_ALLOC_FAIL
+2035 DPLP_CTRL_MGR_CMD_TIMEOUT
+2040 DPLP_LINK_ADAPT_GENERIC
+2041 DPLP_LINK_ADAPT_RATE_UNSUPPORTED
+2042 DPLP_LINK_ADAPT_RATE_INDEX_OUT_OF_BOUNDS
+2043 DPLP_LINK_ADAPT_RATE_MIN_BA_RATE_WRONG
+2044 DPLP_LINK_ADAPT_SELECTED_RATE_INVALID
+2045 DPLP_LINK_ADAPT_FALLBACK_TABLE_IS_NULL
+2047 DPLP_LINK_ADAPT_NUM_RETRIES_IS_WRONG
+2050 DPLP_EXT_API_GENERIC
+2051 DPLP_EXT_API_DU_IS_NOT_RXENTRY
+2052 DPLP_EXT_API_DU_IS_NOT_TXENTRY
+2053 DPLP_EXT_API_RESOURCE_HANDLE_NOT_CALLED_FROM_CB
+2054 DPLP_EXT_API_WRONG_AMSDU_LEN
+2055 DPLP_EXT_API_WRONG_SIGNAL_BUFFER_SIZE
+2057 DPLP_EXT_API_MSG_CANNOT_QUEUE_BEACON
+2058 DPLP_EXT_API_DU_HAS_WRONG_STATE
+205a DPLP_EXT_API_INVALID_PID
+205b DPLP_EXT_API_INVALID_PAUSE_TYPE
+205c DPLP_EXT_API_STA_RECORD_DOES_NOT_EXIST
+205d DPLP_EXT_API_STA_RECORD_ALREADY_CLEARING
+205e DPLP_EXT_API_MLME_CALLBACK_ALREADY_SET
+205f DPLP_EXT_API_INVALID_MAC
+2060 DPLP_RX_GENERIC
+2061 DPLP_RX_VIF_IS_SCAN
+2062 DPLP_RX_FRAG_COUNT_WRONG_FOR_AMPDU
+2063 DPLP_RX_SEQ_DIFF_GREATER_THAN_WIN_SIZE
+2064 DPLP_RX_DPLP_INTERNAL_ERROR
+2065 DPLP_RX_CORRUPT_MBULK
+2066 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2067 DPLP_RX_FORWARD_CHAINED_TO_CTRLPLANE
+2068 DPLP_RX_MISSING_DRAM
+2070 DPLP_STATION_GENERIC
+2071 DPLP_STATION_TX_UP_IS_UNMAPPED
+2072 DPLP_STATION_FRAME_ALREADY_COUNTED
+2073 DPLP_STATION_TOO_MANY_QUEUED_FRAMES
+2074 DPLP_STATION_FRAME_IS_NOT_COUNTED
+2075 DPLP_STATION_NO_QUEUED_FRAME
+2076 DPLP_STATION_FRAME_HAS_NO_TXQUEUE
+2077 DPLP_STATION_FRAME_NOT_READY_TO_QUEUE
+2078 DPLP_STATION_RATE_INVALID
+207a DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_HIGH_IMPORTANCE
+207b DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_AMDPU
+207c DPLP_STATION_TXENTRY_HAS_NO_BAINFO
+207d DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_MULTICAST
+207e DPLP_STATION_DPLP_IN_WRONG_STATE
+207f DPLP_STATION_CLEAR_MUST_BE_TOTAL_PAUSED
+2080 DPLP_STATION_CLEAR_MUST_BE_NOTHING_QUEUED
+2081 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_SF_NOT_NULL
+2082 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_LF_NOT_NULL
+2083 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_COUNT_NOT_ZERO
+2090 DPLP_AMPDU_MGR_GENERIC
+2091 DPLP_AMPDU_MGR_MALLOC_FAIL
+2092 DPLP_AMPDU_MGR_TX_QUEUE_HEAD_OR_TAIL_NULL
+2093 DPLP_AMPDU_MGR_DU_NOT_READY_TO_SEND
+2094 DPLP_AMPDU_MGR_AMPDU_TXENTRY_LIST_NOT_FOUND
+2095 DPLP_AMPDU_MGR_TOO_MANY_FRAMES_WAITING_TO_TX
+2096 DPLP_AMPDU_MGR_TX_ENTRY_HAS_NO_BAINFO
+2097 DPLP_AMPDU_MGR_TX_ENTRY_HAS_INVALID_RATE
+2098 DPLP_AMPDU_LINK_INFO_IS_NULL
+2099 DPLP_AMPDU_AMSDU_OVERSIZE
+209a DPLP_AMPDU_AMSDU_NOT_SUPPORTED
+209b DPLP_AMPDU_MGR_RX_BA
+209c DPLP_AMPDU_MGR_FREE_PPDU_STILL_IN_DPHP
+209d DPLP_AMPDU_MGR_CFMS_COUNT
+209e DPLP_AMPDU_MGR_CANNOT_CANCEL_PPDU
+209f DPLP_AMPDU_MGR_CANCEL_COUNT
+20a0 DPLP_HW_GENERIC
+20a1 DPLP_HW_VIF_IS_NOT_SCHEDULED
+20a2 DPLP_HW_MBULK_HAS_NO_SIGNAL
+20a3 DPLP_HW_MBULK_HAS_REFCOUNT_OR_LEN
+20a4 DPLP_HW_UNEXPECTED_DU_STATE
+20a5 DPLP_HW_TXENTRY_IS_DATAFRAME
+20a9 DPLP_HW_UNEXPECTED_VIF_ID
+20aa DPLP_HW_TXENTRY_STILL_COUNTED
+20b0 DPLP_MPDU_LOAD_GENERIC
+20b1 DPLP_MPDU_LOAD_NODE_ELEMENT_NOT_NULL
+20b2 DPLP_MPDU_LOAD_PPDU_NOT_FOUND
+20b3 DPLP_MPDU_LOAD_NOT_A_TRIGGERED_QUEUE
+20b4 DPLP_MPDU_LOAD_CANCELLING_NULL_PPDU
+20b5 DPLP_MPDU_LOAD_UNICAST_IS_PAUSING
+20b6 DPLP_MPDU_LOAD_TXENTRY_NOT_FOUND
+20b7 DPLP_MPDU_LOAD_NO_MORE_TRIGGERED_Q_LEFT
+20b8 DPLP_MPDU_LOAD_FRAME_NOT_QUEUED
+20b9 DPLP_MPDU_LOAD_COUNT_NOT_ZERO
+20ba DPLP_MPDU_LOAD_DPLANE_NOT_RUNNING
+20c0 DPLP_QUEUE_GENERIC
+20c1 DPLP_QUEUE_WRONG_DU_STATE
+20c2 DPLP_QUEUE_TX_QUEUE_NOT_EMPTY
+20c3 DPLP_QUEUE_MAC_AC_IS_WRONG
+20c4 DPLP_QUEUE_FRAME_WITHOUT_TX_QUEUE
+20c5 DPLP_QUEUE_LIST_ELEMENT_IS_WRONG
+20c6 DPLP_QUEUE_MBULK_NOT_LARGE_ENOUGH
+20c7 DPLP_QUEUE_UNKNOWN_REQUEST_TYPE
+20c8 DPLP_QUEUE_DOUBLE_DEQUEUE
+20c9 DPLP_QUEUE_TX_QUEUE_EMPTY
+20ca DPLP_QUEUE_DEBUG_BEACON_SW_TIMEOUT
+20cb DPLP_QUEUE_DEBUG_AMSDU_ERROR
+20cc DPLP_QUEUE_INVALID_DU
+20d0 DPLP_FROM_HOST_HARD
+20e0 DPLP_TIMER_SCHEDULE_WHEN_PAUSED
+20f0 DPLP_ANTENNA_MODE_INVALID_BITMAP
+2100 DPLP_DPLP_IMM_UNIMPLEMENTED
+2110 DPLP_DPIF_GENERIC
+2111 DPLP_DPIF_BAD_OPERATION
+2112 DPLP_DPIF_RESOURCE_LOW
+2113 DPLP_DPIF_RESOURCE_INDEX_ERROR
+2114 DPLP_DPIF_BFEE
+2115 DPLP_DPIF_PEER_INFO
+2116 DPLP_DPIF_INTERRUPT_SANITY
+2117 DPLP_DPIF_INVALID_BSS_INDEX
+2120 DPLP_PEER_MGT_GENERIC
+2121 DPLP_PEER_MGT_FRAMES_NOT_CANCELLED
+2130 DPLP_BEAMFORMER_GENERIC
+2131 DPLP_BEAMFORMER_UNEXPECTED_NDPA
+2140 DPLP_DEADLINE_GENERIC
+2141 DPLP_DEADLINE_STOP_DEADLINE_NOT_FOUND
+2142 DPLP_DEADLINE_VIF_DEADLINE_NOT_FOUND
+2143 DPLP_DEADLINE_ACTIVE_DEADLINE_IS_NULL
+2144 DPLP_DEADLINE_DPIF_Q_NUM_NOT_FOUND
+2145 DPLP_DEADLINE_UNABLE_TO_CANCEL_DLINE
+2150 DPLP_PROTECTION_GENERIC
+2151 DPLP_PROTECTION_RATE_INDEX_OUT_OF_BOUNDS
+2160 DPLP_VIF_GENERIC
+2200 DPHP_BA_GENERIC
+2201 DPHP_BA_RESERVE_NON_AMPDU
+2202 DPHP_BA_LOAD_NON_AMPDU
+2203 DPHP_BA_LOAD_RESERVE_FAILED
+2210 DPHP_COORD_GENERIC
+2211 DPHP_COORD_BAD_RESET
+2212 DPHP_COORD_BAD_RESET_STAGE2
+2213 DPHP_COORD_INVALID_BK_CLEAR
+2214 DPHP_COORD_PPDU_LIST_DAMAGED
+2215 DPHP_COORD_NOT_MARKED_CANCEL
+2216 DPHP_COORD_INVALID_PPDU_STATE
+2217 DPHP_COORD_INVALID_DPHP_STATE
+2218 DPHP_COORD_Q_EMPTY
+2220 DPHP_DEADLINE_GENERIC
+2221 DPHP_DEADLINE_BK_NOT_EMPTY
+2222 DPHP_DEADLINE_BAD_DEADLINE
+2223 DPHP_DEADLINE_IS_NULL
+2224 DPHP_DEADLINE_BAD_Q_MASK
+2225 DPHP_DEADLINE_ILLEGAL_PPDU
+2226 DPHP_DEADLINE_ALREADY_ACTIVE
+2227 DPHP_DEADLINE_INVALID_TYPE
+2228 DPHP_DEADLINE_NO_INSTALLED_DEADLINE
+2230 DPHP_RX_GENERIC
+2231 DPHP_RX_NO_DRAM
+2232 DPHP_RX_TRUNCATED_DOLLOP
+2233 DPHP_RX_SANITY
+2234 DPHP_RX_NO_PRECEDING_MPDU
+2235 DPHP_RX_BAD_DOLLOP
+2236 DPHP_RX_GIVE_BEHIND_TAKE
+2240 DPHP_DMA_GENERIC
+2241 DPHP_DMA_RX_ORDER
+2242 DPHP_DMA_UNEVEN_ALIGN
+2243 DPHP_DMA_INVALID_ENC_TYPE
+2244 DPHP_DMA_NO_SPACE
+2245 DPHP_DMA_TX_FRAME_TOO_LONG
+2246 DPHP_DMA_PLINE_FULL
+2247 DPHP_DMA_PLINE_EMPTY
+2248 DPHP_DMA_PLINE_INVALID
+2249 DPHP_DMA_INVALID_TFER_ALERT
+224a DPHP_DMA_MBULK_CHAIN_ERROR
+224b DPHP_DMA_INVALID_PAUSE_STATE
+224c DPHP_DMA_SG_LIST_FULL
+224d DPHP_DMA_BAD_SAVED_RX_STATE
+2250 DPHP_RESET_GENERIC
+2251 DPHP_RESET_BAD_STATE_REQUEST
+2252 DPHP_RESET_RX_NOT_IDLE
+2253 DPHP_RESET_DMA_NOT_IDLE
+2254 DPHP_RESET_BAD_WDOG_STATE
+2255 DPHP_RESET_HW_IDLE_FAIL
+2256 DPHP_INIT_BAD_MAC_REGS_ADDR_START
+2257 DPHP_INIT_BAD_MAC_INSTANCE_NUM
+2258 DPHP_MAC_FAILED_TO_START
+2260 DPHP_INT_GENERIC
+2261 DPHP_INT_UNHANDLED
+2262 DPHP_INT_MAC_ERROR
+2263 DPHP_INT_DMA_ALERT_RECURSION
+2264 DPHP_INT_BAD_DMA_TFER_STATE
+2265 DPHP_INT_DMA_TFER_FAIL
+2266 MAC_ACC_BAD_TX_RATE
+2267 MAC_ACC_BAD_PROT_RATE
+2268 DPHP_INT_XDMA_TFER_FAIL
+2269 DPHP_XDMA_TFER_FAIL
+226a DPHP_XDMA_TFER_CHAINED_MBULK_FAIL
+226b DPHP_XDMA_TFER_CHUNK_MBULKS_FAIL
+226c DPHP_FLEXIMAC_PANIC
+226d DPHP_CAPTURE_IQ_SAMPLES_LOST
+226e DPHP_CAPTURE_DONE
+226f DPHP_PHYDMA_DOUBLE_REGISTER
+2270 DPHP_TX_GENERIC
+2271 DPHP_TX_UNDERFLOW
+2272 DPHP_TX_BUFFER_INCORRECT
+2280 DPHP_SLOT_GENERIC
+2281 DPHP_SLOT_EXPECTED_AMPDU
+2282 DPHP_SLOT_NULL_PPDU
+2283 DPHP_SLOT_DMA_INCOMPLETE
+2284 DPHP_SLOT_QUEUEING_FAIL
+2285 DPHP_SLOT_BAD_CANCEL_REQ
+2286 DPHP_SLOT_TIMED_TX_Q_PAUSED
+2287 DPHP_SLOT_DMA_DATA_INVALID
+2288 DPHP_SLOT_INVALID_STATE
+2289 DPHP_SLOT_INVALID_PDU_STATUS
+228a DPHP_SLOT_UNEXPECTED_CFM
+228b DPHP_SLOT_MPDU_INDEX_OUT_OF_BOUNDS
+228c DPHP_SLOT_UNEXPECTED_DYN_RESTART
+228d DPHP_SLOT_BAD_COMMAND
+2290 DPHP_CONFIG_GENERIC
+2291 DPHP_CONFIG_BAD_EDCA_Q
+2292 DPHP_CONFIG_BAD_EDCA_CONFIG
+2293 DPHP_CONFIG_MISSING_PROT_TABLE
+2294 DPHP_CONFIG_RAMSW_SIZE_INVALID
+22a0 DPHP_DPIF_GENERIC
+22a1 DPHP_DPIF_BAD_DEADLINE_CANCEL
+22a2 DPHP_DPIF_INVALID_ECW
+22a3 DPHP_DPIF_INVALID_BURST
+22a4 DPHP_DPIF_BAD_RX_CHAIN_CALC
+22a5 DPHP_DPIF_BAD_RX_TYPE
+22a6 DPHP_DPIF_PEER_INFO
+22a7 DPHP_DPIF_UNXPECTED_AMPDU
+22a8 DPIF_LINK_INFO_INC_REF_COUNT_WHEN_MAX
+22a9 DPIF_LINK_INFO_DEC_REF_COUNT_WHEN_ZERO
+22aa DPIF_LINK_INFO_ASSIGN_TO_TX_ENTRY_Q_NULL
+22ab DPIF_MBULK_DATA_WRONG_CACHELINE
+22ac DPIF_BAD_ENC_KEY
+22ad DPIF_UNEXPECTED_REQUEST_CANCEL
+22b0 DPHP_TCM_GENERIC
+22b1 DPHP_TCM_ALLOC_SIZE_MISMATCH
+22b2 DPHP_TCM_POOL_EMPTY
+22b3 DPHP_TCM_BAD_FREE
+22b4 DPHP_TCM_INIT_INSUFFICIENT_SPACE
+22b5 DPHP_TCM_POOL_SIZE
+22b6 DPHP_TCM_INIT_FAIL
+22b7 TCM_INIT_POOL_IN_USE
+22c0 DPHP_BAD_MIF_STATE
+22d0 DPHP_BA_TX_GENERIC
+22d1 DPHP_BA_TX_UNEXPECTED_CFM_STATE
+22d2 DPHP_BA_TX_PPDU_AT_Q_HEAD_DOES_NOT_MATCH
+22d3 DPHP_BA_TX_DEINT_OUTSTANDING_AMPDUS
+22d4 DPHP_BA_TX_DEINT_OUTSTANDING_BA_TX_AGRS
+22d5 DPHP_BA_TX_AMPDU_ALREADY_CONFIRMED
+22d6 DPHP_BA_TX_PPDU_COUNT_VALUE_INCORRECT
+22d7 DPHP_BA_TX_UNEXPECTED_PANIC_SIGNAL
+22d8 DPHP_BA_TX_BA_WINDOW_NOT_EMPTY
+22d9 DPHP_BA_TX_AMPDU_DEQUEUED_INCORRECTLY
+22da DPHP_BA_TX_AMPDU_NOT_FOUND
+22e0 DPHP_WATCHDOG_GENERIC
+22e1 DPHP_UNHANDLED_LOCKUP
+22f0 DPHP_BEAMFORMER_INVALID_NDPA
+22f1 DPHP_BEAMFORMEE_GENERIC
+2300 MACRAME_VIF_CREATE_NULL_SCANVIF
+2301 MACRAME_VIF_DEREGISTER_QUEUED_TX_FRAMES
+2302 MACRAME_VIF_DELETE_STATION_ASSOCIATED
+2303 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_STATE
+2304 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_PS_STATE
+2305 MACRAME_VIF_CLEAR_INVALID_SCHED_STATE
+2308 MACRAME_VIF_DESCHED_REG_REQ_INVALID_PS_STATE
+230a MACRAME_VIF_SW_DONE_VIF_NOT_SCHEDULED
+230c MACRAME_VIF_CTS_PROCESSED_NULL_DU
+230d MACRAME_VIF_DEREGISTER_NO_REG_VIF
+230e MACRAME_VIF_DEREGISTER_INVALID_SCHED_STATE
+230f MACRAME_VIF_SCHED_MISSED_INVALID_START_TIME
+2311 MACRAME_VIF_INDEX_OUT_OF_RANGE
+2313 MACRAME_VIF_CANCEL_NULL_ENTRY
+2315 MACRAME_VIF_IS_NULL
+2316 MACRAME_VIF_INVALID_TRAFFIC_STATISTICS
+2320 MACRAME_STATION_ADD_NULL_RECORD
+2323 MACRAME_STATION_SET_CONNECT_NULL_RECORD
+2326 MACRAME_STATION_RESET_STA_RECORD_WITH_ENC_KEY
+2340 MACRAME_SCHED_UPDATE_DURATION_HIST_VIF_NOT_SCHEDULED
+2342 MACRAME_SCHED_QUERY_BO_INVALID_BO_TIMES
+2343 MACRAME_SCHED_RESCHEDULE_ALREADY_ACTIVE
+2344 MACRAME_SCHED_SCHED_INVALID_VIF
+2345 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_VIF
+2346 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_STATE
+2347 MACRAME_SCHED_SCHED_IND_INVALID_VIF
+2348 MACRAME_SCHED_RADIO_DONE_INVALID_STATE
+2349 MACRAME_SCHED_BO_UPDATE_INVALID_VIX
+234a MACRAME_SCHED_DESCHED_NOW_NOT_SCEDULED
+234b MACRAME_SCHED_NEAREST_SCHED_TIME_INVALID_STATE
+234c MACRAME_SCHED_COULD_NOT_INSTANTIATE_FSM
+234d MACRAME_SCHED_INVALID_FSM_PID
+234e MACRAME_SCHED_INVALID_RADIO_BM
+234f MACRAME_SCHED_INVALID_PAUSE_REASON
+2350 MACRAME_SCHED_INVALID_INDEX
+2351 MACRAME_SCHED_INVALID_INTERFACE
+2352 MACRAME_SCHED_INVALID_SCHDL_FSM
+2361 MACRAME_TX_MM_REQUEST_INVALID_VIF
+2362 MACRAME_TX_ADDING_NULL_ENTRY_TO_BUFFER
+2363 MACRAME_TX_SENDING_NULL_ENTRY_FROM_BUFFER
+2364 MACRAME_TX_DISCARDING_NULL_ENTRY_FROM_BUFFER
+2366 MACRAME_TX_DISCARD_NULL_PTR_TO_ENTRY
+2367 MACRAME_TX_CANCEL_NULL_PTR_TO_ENTRY
+2368 MACRAME_TX_CANCEL_NULL_TXENTRY
+2369 MACRAME_TX_NO_PSPOLL
+2382 MACRAME_BEACON_MISSED_BEACON_NOT_SCHEDULED_VIF
+2384 MACRAME_BEACON_UPDATE_WAKEUP_VIF_NOT_STA
+2386 MACRAME_BEACON_TX_CLEAR_INVALID_VIF_TYPE
+2387 MACRAME_BEACON_TX_LOAD_HANDLER_INVALID_VIF_TYPE
+2388 MACRAME_BEACON_TX_LOAD_HANDLER_READONLY_FRAME
+2389 MACRAME_BEACON_TX_FINISHED_INVALID_VIF
+238a MACRAME_BEACON_RX_SCHEDULE_TOO_FAR_IN_THE_FUTURE
+238c MACRAME_BEACON_TX_SHEDULE_REQUEST_IN_THE_PAST
+238d MACRAME_BEACON_TX_GET_NEXT_TIME_INVALID_VIF_TYPE
+238e MACRAME_BEACON_TX_AP_WRITE_PVB_INPUT_CHECK
+238f MACRAME_BEACON_TX_AP_UPDATE_NEEDED_NON_AP_VIF
+2390 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_SCHEDULED_VIF
+2391 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_AP_VIF
+2392 MACRAME_BEACON_TX_AP_SEND_BEACON_NOT_FOUND
+2394 MACRAME_BEACON_TX_AP_CLEAR_BEACON_IN_DPLP
+2395 MACRAME_BEACON_TX_ECSA_COUNT_REACHED_ZERO
+239a MACRAME_BEACON_CALC_SLEEP_PERIODS
+239b MACRAME_BEACON_TBTT_EBRT_INVALID_VIF
+239c MACRAME_BEACON_TBTT_EBRT_INVALID_LISTEN_START
+239e MACRAME_BEACON_TX_TXENTRY_IS_NULL
+23a2 MACRAME_PS_COMMON_PS_CHECK_INVALID_VIF
+23a3 MACRAME_PS_COMMON_ANNOUNCE_PROCESSED_NULL_DU
+23a4 MACRAME_PS_COMMON_SEND_PSNULL_NULL_ERROR
+23a6 MACRAME_PS_COMMON_POPULATE_PSNULL_VIF_NOT_SCHEDULED
+23a7 MACRAME_PS_LEGACY_PSPOLL_CFM_NULL_DU
+23a8 MACRAME_PS_LEGACY_PSPOLL_CFM_NON_STA_VIF
+23a9 MACRAME_PS_UAPSD_ENQUEUE_TRIGGER_VIF_NOT_SCHEDULED
+23c0 MACRAME_BLACKOUT_CMM_INVALID_NUM_BO
+23c1 MACRAME_BLACKOUT_CHIP_INVALID_NUM_BO
+23c2 MACRAME_BLACKOUT_P2P_INVALID_VIF_TYPE_NOA
+23c3 MACRAME_BLACKOUT_P2P_SET_CTW_FAIL
+23c4 MACRAME_BLACKOUT_NOT_REGISTERED
+23c5 MACRAME_BLACKOUT_P2P_SCAN_NOA_NOT_UPDATED
+23c6 MACRAME_BLACKOUT_AP_SCAN_QUIET_COUNT_NOT_UPDATED
+23e2 MACRAME_FSM_ADD_BO_INVALID_TYPE
+23e3 MACRAME_FSM_ADD_BO_UNDEFINED_TYPE
+23e4 MACRAME_FSM_ADD_BO_QUIET_INVALID_ID
+23e5 MACRAME_FSM_ADD_BO_LOCAL_INVALID_ID
+23e6 MACRAME_FSM_DEL_BO_INVALID_TYPE
+23e7 MACRAME_FSM_DEL_BO_UNDEFINED_TYPE
+23e8 MACRAME_FSM_DEL_BO_QUIET_INVALID_ID
+23e9 MACRAME_FSM_DEL_BO_LOCAL_INVALID_ID
+2400 MACRAME_TIMER_UNSCHEDULABLE_VIF_MULTICAST
+2401 MACRAME_TIMER_UNSCHEDULABLE_VIF_FAST_PS
+2402 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_DELAY
+2403 MACRAME_TIMER_UNSCHEDULABLE_VIF_CHECK_CLEAR
+2404 MACRAME_TIMER_UNSCHEDULABLE_VIF_MOREBIT
+2405 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_CHECK
+2406 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_TIMER
+2407 MACRAME_TIMER_UNSCHEDULABLE_VIF_TDLS
+240a MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_TX
+240b MACRAME_TIMER_DPLANE_OPERATION_TIMEOUT
+240c MACRAME_TIMER_RADIOMAC_SWITCH_TIMEOUT
+240d MACRAME_TIMER_BT_LO_ACCESS_GRANT_TIMEOUT
+240e MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_RX
+2420 MACRAME_COEX_BLACKOUT_ATTACH_USPBO_FAILED
+2421 MACRAME_COEX_BLACKOUT_ATTACH_VIF_FAILED
+2422 MACRAME_COEX_BLACKOUT_ATTACH_INVALID_HANDLE
+2423 MACRAME_COEX_BLACKOUT_UPDATE_INVALID_HANDLE
+2424 MACRAME_COEX_BLACKOUT_DESTROY_INVALID_HANDLE
+2425 MACRAME_COEX_BLACKOUT_DETACH_INVALID_HANDLE
+2426 MACRAME_COEX_BLACKOUT_MASK_INVALID_HANDLE
+2427 MACRAME_COEX_BLACKOUT_UNMASK_INVALID_HANDLE
+2428 MACRAME_COEX_VIF_GET_NEXT_DTIM_TIME_INVALID_VIF
+2429 MACRAME_COEX_VIF_GET_CLEAR_TIME_INVALID_VIF
+242a MACRAME_COEX_NEGATIVE_MAX_CLEAR_TIMEOUT
+2431 MACRAME_MLME_API_ALLOW_BEACONS_NON_AP_VIF
+2434 MACRAME_MLME_API_SET_BSS_INVALID_VIF
+2435 MACRAME_MLME_API_SET_BSS_NO_AP
+2436 MACRAME_MLME_API_SET_INFO_SCAN_VIF
+2437 MACRAME_MLME_API_CONFIG_QUEUE_SCAN_VIF
+2438 MACRAME_MLME_API_SET_BSS_UNMATCHED_VIF_TYPES
+2439 MACRAME_MLME_API_INVALID_VIF
+243a MACRAME_MLME_API_NOT_STATION_OWNER
+243b MACRAME_MLME_API_STATION_CLEAR_RECORD_NOT_FOUND
+243c MACRAME_MLME_API_STATION_PAUSE_RECORD_NOT_FOUND
+243d MACRAME_MLME_API_STATION_UNPAUSE_RECORD_NOT_FOUND
+2441 MACRAME_BA_MGR_REMOVE_BA_NULL_INFO
+2442 MACRAME_BA_MGR_REMOVE_BA_HWINFO
+2443 MACRAME_BA_MGR_QUEUE_HEAD_NULL
+2444 MACRAME_BA_MGR_QUEUE_TAIL_NULL
+2445 MACRAME_BA_MGR_DELBA_RX_BAINSTANCE_NULL
+2446 MACRAME_BA_MGR_FIND_BA_INVALID_TPRI
+2447 MACRAME_BA_MGR_DELBA_INVALID_DIR
+2448 MACRAME_BA_MGR_ADDBA_ZERO_BUF_SIZE
+2449 MACRAME_BA_MGR_ADDBA_STA_RECORD_NULL
+244a MACRAME_BA_MGR_ADD_BA_RX_AGREEMENT
+2450 MACRAME_KEY_MALLOC_FAILED
+2451 MACRAME_RADIO_INIT_DONE_INVALID_STATE
+2452 MACRAME_RADIO_STATE_CHANGE_ON_NO_DESCRIPTORS
+2453 MACRAME_RADIO_OFF_INVALID_STATE
+2454 MACRAME_RADIO_DPD_NO_RATES
+2455 MACRAME_RADIO_INVALID_STATE
+2456 MACRAME_RADIO_COULD_NOT_INSTANTIATE_FSM
+2457 MACRAME_RADIO_INVALID_BITMAP
+2458 MACRAME_RADIO_ILLEGAL_SWITCH_REQUEST
+2459 MACRAME_MODEM_INVALID_DFE_CONFIG
+245a MACRAME_RADIOMAC_TOO_MANY_REQUESTS
+245b MACRAME_MODEM_CONFLICTING_DFE_CONFIG
+245c MACRAME_RADIOMAC_MAC0_UNAVAILABLE
+245d MACRAME_RADIO_DUMMY_FRAME_DPD_NOT_SUPPORTED
+2480 MACRAME_DPLANE_MACRAME_NULL_POINTER
+2490 MACRAME_VIF_PAUSE_RESUME_NOT_ENOUGH_MEMORY_FOR_REQUEST
+2491 MACRAME_VIF_NAN_ELAPSED_TIME_GREATER_THAN_DW0_PERIOD
+2492 MACRAME_VIF_NAN_INSUFFICINET_OCTETS
+2493 MACRAME_VIF_NAN_NO_SLOTS_FOUND
+24a0 MACRAME_IDLE_AP_INVALID_VIF
+24ff MACRAME_LAST_ID
+2500 MLME_RAME_GET_KA_INTERVAL_INVALID_DATA
+2501 MLME_FSM_PID_ALREADY_IN_USE_1
+2502 MLME_AP_NO_CURRENT_STA
+2503 MLME_FSM_PID_ALREADY_IN_USE_2
+2504 MLME_FSM_PID_ALREADY_IN_USE_3
+2505 MLME_FSM_PID_ALREADY_IN_USE_4
+2506 MLME_FSM_PID_ALREADY_IN_USE_5
+2507 MLME_FSM_PID_ALREADY_IN_USE_6
+2508 MLME_FSM_PID_ALREADY_IN_USE_7
+2509 MLME_FSM_PID_ALREADY_IN_USE_8
+250a MLME_FSM_PID_ALREADY_IN_USE_9
+250b MLME_FSM_PID_ALREADY_IN_USE_10
+250c MLME_AP_DISCONNECT_NO_STATION_RECORD
+250e MLME_AP_UNEXPECTED_FRAME_TYPE
+250f MLME_AP_UNEXPECTED_FRAME_SUBTYPE
+2510 MLME_REG_MIB_READ_FAIL
+2511 MLME_REG_MIB_READ_FAIL_2
+2512 MLME_REG_MIB_COUNTRY_CODE_FAIL
+2513 MLME_REG_MIB_WORLD_DOMAIN_COUNTRY_CODE_FAIL
+2514 MLME_REG_IS_NULL
+2520 MLME_CONMGR_MLME_SYNCHRONISED_RSP_INVALID
+2530 MLME_STA_RECORD_ADD_1
+2531 MLME_STA_RECORD_DELETE
+2532 MLME_DATA_SAVE_UNKNOWN_KEY_TYPE
+2533 MLME_STA_RECORD_ADD_2
+2534 MLME_STA_RECORD_PAUSE
+2535 MLME_STA_RECORD_RESUME
+2536 MLME_STA_RECORD_MOVE
+2537 MLME_DATA_NO_AVAILABLE_VIF
+2538 MLME_DATA_ADD_VIF_FAILED_1
+2539 MLME_DATA_ADD_VIF_FAILED_3
+253a MLME_DATA_ADD_VIF_FAILED_4
+253b MLME_STA_RECORD_CLEAR
+253c MLME_STA_RECORDS_EXIST
+253d MLME_STA_RECORD_DELETE_WRONG_OWNER
+2560 MLME_MEASUREMENTS_FRAME_SZ_WRONG
+2580 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_WITH_VIX
+2581 MLME_REQUESTS_TEST_PANIC
+2582 MLME_REQUESTS_INVALID_STATE_IN_ADD_VIF
+2583 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_NULL_VIX
+25a0 MLME_ROAMING_IES_SZ_WRONG
+25a1 MLME_ROAMING_LOGGING_IE_SZ_WRONG
+25c2 MLME_SCAN_INTERNAL_DATA_CORRUPTED
+25c3 MLME_SCAN_NO_SCANNERS
+25c4 MLME_SCAN_PID_TO_INSTANCE_FAILED
+25c5 MLME_SCAN_MIB_FAIL
+25c6 MLME_SCAN_CHANNEL_ZERO_FREQ
+25d0 MLME_TDLS_INVALID_DTIM_PERIOD
+25d1 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_1
+25d2 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_2
+25d3 MLME_TDLS_INVALID_TERMINATE_LINK
+25d4 MLME_TDLS_INVALID_TERMINATE_LINK_SETUP
+25d5 MLME_TDLS_INVALID_CONFIRM
+25d6 MLME_TDLS_MAX_SLOTS_EXCEEDED
+25e0 MLME_VIFCTRL_DMS_IES_SZ_WRONG_1
+25e1 MLME_VIFCTRL_DMS_IES_SZ_WRONG_2
+25e2 MLME_VIFCTRL_DMS_IES_SZ_WRONG_3
+25e3 MLME_VIFCTRL_DMS_IES_SZ_WRONG_4
+25e4 MLME_VIFCTRL_DMS_IES_SZ_WRONG_5
+25e5 MLME_VIFCTRL_DMS_IES_SZ_WRONG_6
+25e6 MLME_VIFCTRL_DMS_IES_SZ_WRONG_7
+25e7 MLME_VIFCTRL_CHANNEL_SWITCH_NO_STA_RECORD
+25e8 MLME_VIFCTRL_TEARDOWN_BITMAP_OVERFLOW
+25e9 MLME_VIFCTRL_SEND_FRAME_INVALID_CHANNEL_FREQ
+25ea MLME_VIFCTRL_OBSS_SCAN_IES_SIZE_WRONG
+25eb MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_1
+25ec MLME_VIFCTRL_PACKET_FILTER_IES_TOO_LONG
+25ed MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_MODE
+25f0 MLME_SECURITY_EAPOL_PEER_NOT_FOUND
+25f1 MLME_SECURITY_FILTER_OVERFLOW
+25f2 MLME_SECURITY_EAPOL_REPLY_TYPE_INVALID
+2600 MLME_VIFCTRL_FILTER_OVERFLOW_1
+2601 MLME_VIFCTRL_FILTER_OVERFLOW_2
+2602 MLME_VIFCTRL_FILTER_OVERFLOW_3
+2603 MLME_VIFCTRL_FILTER_OVERFLOW_4
+2604 MLME_VIFCTRL_FILTER_OVERFLOW_5
+2605 MLME_VIFCTRL_FILTER_OVERFLOW_6
+2606 MLME_VIFCTRL_FILTER_OVERFLOW_7
+2607 MLME_VIFCTRL_FILTER_OVERFLOW_8
+2608 MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_2
+2610 MLME_MBULK_IS_NULL
+2611 MLME_MBULK_ADDRESS_IS_NULL
+2620 MLME_MPDU_VIX_REGISTRATION_FAILED_1
+2621 MLME_MPDU_VIX_REGISTRATION_FAILED_2
+2630 MLME_FRAMES_FRAME_SZ_WRONG
+2631 MLME_FRAMES_INVALID_FRAME_TYPE_1
+2632 MLME_FRAMES_INVALID_FRAME_TYPE_2
+2633 MLME_FRAME_ADDR_DS_MODE_UNSUPPORTED
+2634 MLME_FRAME_APPEND_OOB
+2635 MLME_FRAME_EAPOL_INVALID_FRAME_TYPE
+2636 MLME_FRAME_BUILD_INC_SZ_MISMATCH
+2640 MLME_NAN_SCAN_IES_SIZE_WRONG
+2641 MLME_NAN_FRAME_SZ_WRONG_1
+2642 MLME_NAN_INVALID_NAN_FRAME
+2643 MLME_NAN_INITIAL_CHANNEL_CFG_FAILED
+2644 MLME_NAN_NUM_OF_SDA_OVERFLOW
+2645 MLME_NAN_SDF_WITH_NO_PAYLOAD
+2646 MLME_NAN_RAME_MM_CFM_NOT_RECEIVED
+2647 MLME_NAN_INVALID_CLUSTER_MERGE_STATE
+2649 MLME_NAN_FRAME_SZ_WRONG_3
+264a MLME_NAN_FRAME_SZ_WRONG_4
+264c MLME_NAN_FRAME_SZ_WRONG_6
+264e MLME_FSM_PID_ALREADY_IN_USE_11
+2650 MLME_API_STATION_RECORD_DOES_NOT_EXIST_1
+2651 MLME_API_STATION_RECORD_DOES_NOT_EXIST_2
+2652 MLME_API_STATION_RECORD_DOES_NOT_EXIST_3
+2653 MLME_API_INVALID_VIF
+2660 MLME_FTM_SCAN_IES_SIZE_WRONG
+2700 RADIO_RICE_RADIO_SETUP_FAILED
+2701 RADIO_RICE_ALREADY_SETUP
+2702 RADIO_RICE_BAD_CLOCK_FREQ
+2703 RADIO_RICE_IMM_ERROR
+2704 RADIO_RICE_RICE_ERROR
+2705 RADIO_RICE_MGR_FSM_ERROR
+2706 RADIO_RICE_RADIO_FSM_ERROR
+2707 RADIO_RICE_ILLEGAL_RECONFIGURE
+2708 RADIO_RICE_CONNECTION_CLASH
+2709 RADIO_RICE_FSM_CHANGE_PARAMS
+270a RADIO_RICE_FSM_INADEQUATE_TIME
+270b RADIO_RICE_BAD_ANTENNA_GAIN_SETTINGS
+2710 RADIO_HAL_BAD_FREQ_COMP_TABLE_TYPE
+2711 RADIO_HAL_BAD_TEMP_COMP_TABLE_TYPE
+2712 RADIO_HAL_BAD_SIG_GEN_WAVEFORM_TYPE
+2713 RADIO_HAL_BAD_SIG_GEN_LOCATION_TYPE
+2714 RADIO_HAL_UNKNOWN_TX_TRIM_TYPE
+2715 RADIO_HAL_UNKNOWN_TX_LOOPBACK_TYPE
+2716 RADIO_HAL_BAD_CONFIGURATION
+2717 RADIO_HAL_BAD_PATH_MUX_CONFIGURATION
+2718 RADIO_HAL_PATH_MUX_SETUP_FAILED
+2719 RADIO_HAL_PATH_MUX_MAP_INDETERMINATE
+271a RADIO_HAL_INTERNAL
+271b RADIO_HAL_INVALID_RADIO_ID
+271c RADIO_HAL_BAD_RAMSW_REC
+271d RADIO_NOT_ENOUGH_SRAM_FOR_PLAYBACK_SIGNAL
+271e RADIO_PLAYBACK_FAILED
+271f RADIO_TOO_MANY_DPD_TRIM_FAILURES
+2720 RADIO_MIB_ERROR
+2721 RADIO_HAL_BAD_RAMSW_PLAY
+2722 RADIO_PHASE_COMPUTATION
+2723 RADIO_DPD_CALC_LOOPBACK_FAILED
+2724 RADIO_ILLEGAL_COMPLEX_DIVISION
+2725 RADIO_DPD_ALIGN_CAPTURE_FAIL
+2726 RADIO_HAL_BAD_CAPTURE_POINT_TX_RX_DEF
+2727 RADIO_TRIM_SETUP_ERROR
+2728 RADIO_NULL_REG_CACHE_PTR
+2729 RADIO_NULL_PTR
+272a RADIO_ILLEGAL_DIVISION
+272b RADIO_DEINIT_ALREADY_IN_PROGRESS
+272c RADIO_BAD_RF_CB_STATE
+272d RADIO_DPD_UNDEFINED_TRIM_STEP
+272e RADIO_RF_RX_DCOC_NULL_POINTER
+272f RADIO_REGISTER_LOG_VERIFY_FAIL
+2730 RADIO_INVALID_CALL_IN_IMM
+2731 RADIO_INVALID_CALL_IN_DPD_TRAIN
+2732 RADIO_UNKNOWN_BAND
+2733 RADIO_HAL_TOO_MANY_TX_GAIN_STEPS
+2734 RADIO_VCO_LOCK_FAILED
+2735 RADIO_PHY_FLEXIMAC_ST_INCONSISTENT
+2736 PA_SAT_IS_NULL
+2737 LARK_D00_INVALID_5G_FREQ
+2780 RADIO_HALMAC_FAILED_TO_INSTALL_MIB
+2781 RADIO_HALMAC_FAILED_TO_FIND_ROW
+2800 TEST_UNUSED
+2801 TEST_DPHPADPT_RX_OUT_OF_MBULKS
+2802 TEST_DPHPADPT_RX_UNEXPECTED_MPDU
+2803 TEST_DPHPADPT_RX_TOO_MANY_MPDUS_IN_AMPDU
+2810 TEST_MICRAME_BAD_RADIO_REQUEST
+2811 TEST_MICRAME_TX_QUEUE_EMPTY
+2812 TEST_MICRAME_TX_QUEUE_FULL
+2813 TEST_MICRAME_TX_NO_MEM_FOR_CANCEL
+2814 TEST_MICRAME_TX_BAD_PPDU_STATE
+2815 TEST_MICRAME_TX_BAD_MPDU_COUNT
+2816 TEST_MICRAME_TX_BAD_SLOT_STATE
+2817 TEST_MICRAME_TX_BAD_SLOT_COUNT
+2818 TEST_MICRAME_TX_BAD_MPDU_LEN
+2820 TEST_WLANLITE_MGR_FSM_ERROR
+2821 TEST_WLANLITE_LOAD_FRAME_PPDU_ALLOC
+2822 TEST_WLANLITE_INVALID_RADIO_ID
+2823 TEST_WLANLITE_INVALID_MAC_ID
+2824 TEST_WLANLITE_INVALID_RADIO_BITMAP
+2825 TEST_WLANLITE_BEAMFORMER
+2826 TEST_WLANLITE_CONN_FSM_ERROR
+2827 TEST_WLANLITE_DPHP_HW_LOCKUP
+2900 COEX_API_PERIODIC_EVENT_INVALID_ENTRY
+2910 COEX_STRAT_INIT_FAILURE
+2940 COEX_MAC_KA_BO_FAILURE
+2950 COEX_RAME_BAD_VIX
+2960 COEX_FLEXIMAC_INT_UNHANDLED
+2970 COEX_FLEXIMAC_INVALID_SEQ_NUM
+29ff COEX_LAST
+2a00 LOWER_MAC
+2a01 COMMON_HOSTIO_GENERIC
+2a02 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a03 COMMON_HOSTIO_VIRT_GENERIC
+2a04 COMMON_HOSTIO_VIRT_WLANLITE
+2a10 COMMON_PMALLOC_OUT_OF_MEMORY
+2a11 COMMON_PMALLOC_INVALID_MEMORY_CONFIG
+2a12 COMMON_PMALLOC_INVALID_POINTER
+2a13 COMMON_PMALLOC_MEMORY_EXHAUSTION
+2a20 COMMON_DEBUG_DWORD12_INVALID_PTR
+2a21 COMMON_DEBUG_DWORD12_SANITY_FAIL
+2a22 COMMON_DEBUG_SAP_TOO_LARGE_ALLOC_SZ
+2a23 COMMON_DEBUG_NOT_ALLOWED
+2a30 COMMON_SERVICE_FOS_RES_NOT_CLEANED
+2a31 COMMON_SERVICE_START_FAILED
+2a32 COMMON_SERVICE_STOP_FAILED
+2a33 COMMON_SERVICE_FOS_TASK_NOT_SCHEDULED
+2a34 COMMON_SERVICE_TOO_MANY_NON_RTOS_IRQ
+2a40 COMMON_FAULT_NOT_ALLOWED
+2a50 COMMON_HW_ILLEGAL_RESPONSE_RATE
+2a51 COMMON_RSA_OUT_OF_RANGE
+2a52 COMMON_LMIF_MAC_CONFIG_GENERIC
+2a60 COMMON_FSM_ALLOCATION_FAILURE
+2a61 COMMON_FSM_INVALID_SIGNAL
+2a62 COMMON_FSM_INVALID_PRIORITY
+2a63 COMMON_FSM_FAILURE
+2a64 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESS
+2a65 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESSOR
+2a66 COMMON_FSM_SIGNAL_TO_ENV
+2a67 COMMON_FSM_EMPTY_TIMER_LIST
+2a68 COMMON_FSM_LAST_NEXT_NOT_NULL
+2a69 COMMON_FSM_LAST_IS_NULL
+2a6a COMMON_FSM_CHANGE_NOT_ALLOWED_IN_INTERRUPT_CONTEXT
+2a6b COMMON_FSM_INVALID_PID
+2a6c COMMON_FSM_DATA_NOT_READY
+2a6d COMMON_FSM_INVALID_RADIO_ID_TO_PID
+2a6e COMMON_FSM_INVALID_SCHDL_ID_TO_PID
+2a6f COMMON_FSM_TOO_MANY_SAVED_OR_FORWARD_EVENTS
+2a70 COMMON_UTILS_DATA_UNIT
+2a71 COMMON_UTILS_MAKE_FRAME
+2a72 COMMON_UTILS_LINKED_LIST
+2a80 COMMON_MIB_ROM_CORRUPT
+2a81 COMMON_MIB_OVERRIDE
+2a82 COMMON_MIB_GETACTOS
+2aa0 COMMON_SHARED_DATA_VIF_INVALID_ACCESS
+2aa1 COMMON_SHARED_DATA_VIF_STA_INVALID_ACCESS
+2aa2 COMMON_SHARED_DATA_VIF_AP_INVALID_ACCESS
+2aa3 COMMON_SHARED_DATA_VIF_NAN_INVALID_ACCESS
+2aa4 COMMON_SHARED_DATA_VIF_SCAN_INVALID_ACCESS
+2aa5 COMMON_SHARED_DATA_STA_INVALID_ACCESS
+2aa6 COMMON_SHARED_DATA_MISSING_CALLBACK
+2aa7 COMMON_SHARED_DATA_VIF_FTM_INVALID_ACCESS
+2aa8 COMMON_SHARED_DATA_DU_INVALID_ACCESS
+2aa9 COMMON_SHARED_DATA_CALLBACKS_ALREADY_TRIGGERED
+2aaa COMMON_SHARED_DATA_VIF_FTM_INVALID_BW
+2ab0 COMMON_PACKET_FILTER_GENERIC
+2ab1 COMMON_PACKET_FILTER_INVALID_PID
+2ab2 COMMON_PACKET_FILTER_LIST_HEAD_IS_NOT_NULL
+2ab3 COMMON_PACKET_FILTER_NOT_ALL_FILTERS_DELETED
+2ab4 COMMON_PACKET_FILTER_INVALID_PARAMETERS
+2ab5 COMMON_PACKET_FILTER_INSUFFICIENT_RESOURCE
+2ac0 COMMON_SMAPPER_GENERIC
+2ad0 COMMON_MBULK_GENERIC
+2ad1 COMMON_MBULK_CHAIN_ALREADY_HEAD_SET
+2ad2 COMMON_MBULK_CHAIN_CANNOT_RECLAIM_AS_USED
+2ad3 COMMON_MBULK_CHAIN_EXPECTED
+2ad4 COMMON_MBULK_CHAIN_WRITE_LEN_TOO_LARGE
+2ad5 COMMON_MBULK_DAT_AT_OFFSET_OUTSIDE_DATA
+2ad6 COMMON_MBULK_DAT_MOVE_OUTSIDE_DATA
+2ad7 COMMON_MBULK_DAT_MOVE_IS_READ_ONLY
+2ad8 COMMON_MBULK_DAT_ACCESS_NOT_ALLOWED
+2ad9 COMMON_MBULK_INVALID_POOL
+2ada COMMON_MBULK_MBULK_FREE_BUT_CHAINED
+2adb COMMON_MBULK_MSIGNAL_FREE_NO_SIGNAL
+2adc COMMON_MBULK_MSIGNAL_FREE_UNDER_DELIVERY
+2add COMMON_MBULK_POOL_CHECK_SANITY_FAILURE
+2ade COMMON_MBULK_INCORRECT_REFCNT
+2adf COMMON_MBULK_POOL_GET_FREE_OUTSIDE_POOL_MEMORY
+2ae0 COMMON_MBULK_POOL_GET_FREE_WRONG_OFFSET
+2ae1 COMMON_MBULK_POOL_NOT_4K_ALIGNED
+2ae2 COMMON_MBULK_POOL_PUT_AT_WRONG_OFFSET
+2ae3 COMMON_MBULK_POOL_PUT_NONE_IN_USE
+2ae4 COMMON_MBULK_POOL_PUT_OUTSIDE_POOL_MEMORY
+2ae5 COMMON_MBULK_RESIZE_EXCEEDS_DATA_BUFSIZ
+2ae6 COMMON_MBULK_SEG_DUPLICATE_RW
+2ae7 COMMON_MBULK_SEG_GENERIC_FREE_IN_OUTBOUND
+2ae8 COMMON_MBULK_SEG_GENERIC_FREE_NO_RETURN_TO_HOST
+2ae9 COMMON_MBULK_SEG_GENERIC_FREE_NOT_IN_USE
+2aea COMMON_MBULK_SEG_GENERIC_FREE_PTR_OUTSIDE_POOLS
+2aeb COMMON_MBULK_SEG_GENERIC_FREE_UNDER_DELIVERY
+2aec COMMON_MBULK_MULTIPLE_USERS
+2aed COMMON_MBULK_TOO_LARGE_SIZE_REQUESTED
+2aee COMMON_MBULK_TRIM_EXCEEDS_ACTUAL_DATA_LEN
+2aef COMMON_MBULK_SMAPPER_OP_NOT_SUPPORTED
+2af0 COMMON_GENERIC_EDP
+2af1 COMMON_GENERIC_RESET
+2af2 COMMON_CACHE_UNALIGNED_ADDR
+2af3 COMMON_MBULK_SMAPPER_FREE_NON_SMAPPER_MBULK
+2af4 COMMON_FSMLITE_GENERIC
+2aff COMMON_PLACEHOLDER_PLACEHOLDER_MAX
+mibkey 543
+0000 MIBKEY_NULL
+0001 DOT11RSNASTATSSTAADDRESS
+03ef UNIFIAPOLBCINTERVAL
+03f9 UNIFIDNSSUPPORTACTIVATED
+0401 UNIFIOFFCHANNELSCHEDULETIMEOUT
+040b UNIFIFRAMERESPONSETIMEOUT
+0069 DOT11RSNASTATSROBUSTMGMTCCMPREPLAYS
+041b UNIFICONNECTIONFAILURETIMEOUT
+042b UNIFICONNECTINGPROBETIMEOUT
+0439 UNIFIDISCONNECTTIMEOUT
+0449 UNIFIFRAMERESPONSECFMTXLIFETIMETIMEOUT
+0451 UNIFIFRAMERESPONSECFMFAILURETIMEOUT
+0459 UNIFIFORCEACTIVEDURATION
+0469 UNIFIMLMESCANMAXNUMBEROFPROBESETS
+046f UNIFIMLMESCANSTOPIFLESSTHANXFRAMES
+0477 UNIFIAPASSOCIATIONTIMEOUT
+0481 UNIFIHOSTNUMANTENNACONTROLACTIVATED
+0489 UNIFIMLMESTATIONINACTIVITYTIMEOUT
+0491 UNIFIMLMECLIINACTIVITYTIMEOUT
+0499 UNIFIMLMESTATIONINITIALKICKTIMEOUT
+04a1 UNIFIUARTCONFIGURE
+04a7 UNIFIUARTPIOS
+04ad UNIFICRYSTALFREQUENCYTRIM
+04b7 UNIFIENABLEDORM
+0079 DOT11TDLSPEERUAPSDINDICATIONWINDOW
+04bf UNIFIEXTERNALCLOCKDETECT
+04c7 UNIFIEXTERNALFASTCLOCKREQUEST
+04cf UNIFIWATCHDOGTIMEOUT
+04db UNIFIOVERRIDEEDCAPARAMACTIVATED
+04e3 UNIFIEXTERNALFASTCLOCKREQUESTPIO
+04ed UNIFIRXDATARATE
+04f5 UNIFIRSSI
+04fd UNIFILASTBSSRSSI
+0503 UNIFISNR
+0081 DOT11ASSOCIATIONSAQUERYMAXIMUMTIMEOUT
+050b UNIFILASTBSSSNR
+0511 UNIFISWTXTIMEOUT
+0519 UNIFIHWTXTIMEOUT
+0523 UNIFITXDATARATE
+052b UNIFISNREXTRAOFFSETCCK
+0533 UNIFIRSSIMAXAVERAGINGPERIOD
+053f UNIFIRSSIMINRECEIVEDFRAMES
+0549 UNIFILASTBSSTXDATARATE
+054f UNIFIDISCARDEDFRAMECOUNT
+0557 UNIFIMACRAMEDEBUGSTATS
+0561 UNIFICURRENTTSFTIME
+0569 UNIFIBARXENABLETID
+0573 UNIFIBATXENABLETID
+057d UNIFITRAFFICTHRESHOLDTOSETUPBA
+0587 UNIFIDPLANETXAMSDUHWCAPABILITY
+058f UNIFIDPLANETXAMSDUSUBFRAMECOUNTMAX
+059f UNIFIBACONFIG
+05ab UNIFIBATXMAXNUMBER
+05b3 UNIFIMOVEBKTOBE
+05b9 UNIFIBEACONRECEIVED
+0093 DOT11ASSOCIATIONSAQUERYRETRYTIMEOUT
+05c1 UNIFIPSLEAKYAP
+05cb UNIFITQAMACTIVATED
+05d3 UNIFIOUTPUTRADIOINFOTOKERNELLOG
+05db UNIFINOACKACTIVATIONCOUNT
+05e3 UNIFIRXFCSERRORCOUNT
+05eb UNIFIBEACONSRECEIVEDPERCENTAGE
+05f7 UNIFIARPDETECTACTIVATED
+05ff UNIFIARPDETECTRESPONSECOUNTER
+0609 UNIFIENABLEMGMTTXPACKETSTATS
+0613 UNIFIQUEUESTATSENABLE
+061d UNIFIDPDMASTERSWITCH
+0629 UNIFIGOOGLEMAXNUMBEROFPERIODICSCANS
+062f UNIFIGOOGLEMAXRSSISAMPLESIZE
+0635 UNIFIGOOGLEMAXHOTLISTAPS
+063b UNIFIGOOGLEMAXSIGNIFICANTWIFICHANGEAPS
+0641 UNIFIGOOGLEMAXBSSIDHISTORYENTRIES
+0647 UNIFIMACBEACONTIMEOUT
+0651 UNIFIMIFOFFALLOWED
+0659 UNIFIBLOCKSCANAFTERNUMSCHEDVIF
+00a3 DOT11RTSTHRESHOLD
+0663 UNIFISTAUSESONEANTENNAWHENIDLE
+066b UNIFISTAUSESMULTIANTENNASDURINGCONNECT
+0673 UNIFIAPUSESONEANTENNAWHENPEERSIDLE
+067d DEPRECATED_UNIFIUPDATEANTENNACAPABILITIESWHENSCANNING
+0685 UNIFIPREFERREDANTENNABITMAP
+068f UNIFIMAXCONCURRENTMACS
+0697 UNIFIROAMDEAUTHREASON
+069f UNIFIROAMTRACKINGSCANPERIOD
+426f UNIFIROAMCUFACTOR
+429f UNIFIROAMCUSCANTRIGGER
+42ad UNIFIROAMRSSIBOOST
+42b9 UNIFIROAMRSSIFACTOR
+06ad UNIFIROAMCULOCAL
+42ef UNIFIRXEXTERNALGAINFREQUENCY
+42ff UNIFIRXEXTERNALGAIN
+430d UNIFIRXRSSIADJUSTMENTS
+4319 UNIFISARBACKOFF
+433f UNIFISCANPARAMETERS
+06bb UNIFIROAMCUSCANNOCANDIDATEDELTATRIGGER
+06c9 UNIFIROAMAPSELECTDELTAFACTOR
+06d7 UNIFIROAMCUWEIGHT
+44d5 UNIFISTATICDPDGAIN
+44e1 UNIFITHROUGHPUTDEBUG
+44eb UNIFITXANTENNACONNECTIONLOSSFREQUENCY
+06e5 UNIFIROAMRSSIWEIGHT
+44fb UNIFITXANTENNACONNECTIONLOSS
+4509 UNIFITXANTENNAMAXGAINFREQUENCY
+4519 UNIFITXANTENNAMAXGAIN
+4527 UNIFITXDETECTORFREQUENCYCOMPENSATION
+4535 UNIFITXDETECTORTEMPERATURECOMPENSATION
+4543 UNIFITXFTRIMSETTINGS
+4551 UNIFITXGAINSETTINGS
+455f UNIFITXGAINSTEPSETTINGS
+456d UNIFITXOOBCONSTRAINTS
+457b UNIFITXOPENLOOPFREQUENCYCOMPENSATION
+06f3 UNIFIROAMBSSLOADMONITORINGFREQUENCY
+4589 UNIFITXOPENLOOPTEMPERATURECOMPENSATION
+4597 UNIFITXPAGAINDPDFREQUENCYCOMPENSATION
+45a5 UNIFITXPAGAINDPDTEMPERATURECOMPENSATION
+45b3 UNIFITXPOWERDETECTORRESPONSE
+45c1 UNIFITXPOWERTRIMCONFIG
+45cd UNIFITXSETTINGS
+0701 UNIFIROAMBLACKLISTSIZE
+070f UNIFICUMEASUREMENTINTERVAL
+071f UNIFICURRENTBSSNSS
+0727 UNIFIAPMIMOUSED
+072f UNIFIROAMEAPOLTIMEOUT
+00b9 DOT11SHORTRETRYLIMIT
+073d UNIFIROAMINGCOUNT
+0745 UNIFIROAMINGAKM
+074d UNIFICURRENTBSSBANDWIDTH
+0753 UNIFICURRENTBSSCHANNELFREQUENCY
+0759 UNIFILOGGERENABLED
+0761 UNIFIMAPACKETFATEENABLED
+076b UNIFISTAVIFLINKNSS
+0773 UNIFILAANSSSPECULATIONINTERVALSLOTTIME
+0781 UNIFILAANSSSPECULATIONINTERVALSLOTMAXNUM
+078d UNIFILAABWSPECULATIONINTERVALSLOTTIME
+079b UNIFILAABWSPECULATIONINTERVALSLOTMAXNUM
+07a7 UNIFILAAMCSSPECULATIONINTERVALSLOTTIME
+07b5 UNIFILAAMCSSPECULATIONINTERVALSLOTMAXNUM
+07c1 UNIFILAAGISPECULATIONINTERVALSLOTTIME
+07cf UNIFILAAGISPECULATIONINTERVALSLOTMAXNUM
+07db UNIFILAATXDIVERSITYBEAMFORMENABLED
+07e7 UNIFILAATXDIVERSITYBEAMFORMMINMCS
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+03e5 UNIFIAPOLBCDURATION
+oid 542
+100 dot11AssociationSAQueryMaximumTimeout
+101 dot11AssociationSAQueryRetryTimeout
+121 dot11RTSThreshold
+122 dot11ShortRetryLimit
+123 dot11LongRetryLimit
+124 dot11FragmentationThreshold
+146 dot11RTSSuccessCount
+148 dot11ACKFailureCount
+150 dot11MulticastReceivedFrameCount
+151 dot11FCSErrorCount
+153 dot11WEPUndecryptableCount
+183 dot11manufacturerProductVersion
+2000 unifiMLMEConnectionTimeOut
+2001 unifiMLMEScanChannelMaxScanTime
+2002 unifiMLMEScanChannelProbeInterval
+2003 unifiMLMEScanChannelRule
+2005 unifiMLMEDataReferenceTimeout
+2007 unifiMLMEScanProbeInterval
+2008 unifiMLMEScanHighRSSIThreshold
+2010 unifiMLMEScanDeltaRSSIThreshold
+2014 unifiMLMEScanMaximumAge
+2015 unifiMLMEScanMaximumResults
+2016 unifiMLMEAutonomousScanNoisy
+2018 unifiChannelBusyThreshold
+2020 unifiMacSequenceNumberRandomisationActivated
+2021 unifiFirmwareBuildID
+2022 unifiChipVersion
+2023 unifiFirmwarePatchBuildID
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+2026 unifiHtCapabilities5G
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+2029 unifiSoftAp40MHzOn24G
+2030 unifiBasicCapabilities
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+2047 unifiEnableTwoSimultaneousPassiveScansSameBand
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+2067 unifiRoamScanControl
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+2072 unifiRoamScanNProbe
+2076 unifiApOlbcDuration
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+2097 unifiPeerRSSI
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+2099 unifiMLMECliInactivityTimeOut
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+2111 unifiUartPios
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+2199 unifiPeerRxMulticastCount
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+2203 unifiLastBssSNR
+2204 unifiSwTxTimeout
+2205 unifiHwTxTimeout
+2206 unifiRateStatsRxSuccessCount
+2207 unifiRateStatsTxSuccessCount
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+2209 unifiSNRExtraOffsetCCK
+2210 unifiRSSIMaxAveragingPeriod
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+2215 unifiMacrameDebugStats
+2218 unifiCurrentTSFTime
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+2221 unifiBaTxEnableTid
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+2223 unifiDplaneTXAmsduHWCapability
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+2225 unifiBaConfig
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+2230 unifiRadioOnTime
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+2233 unifiRadioScanTime
+2234 unifiPSLeakyAP
+2235 unifiTqamActivated
+2236 unifiRadioOnTimeNan
+2239 unifiOutputRadioInfoToKernelLog
+2240 unifiNoAckActivationCount
+2241 unifiRxFcsErrorCount
+2245 unifiBeaconsReceivedPercentage
+2246 unifiARPDetectActivated
+2247 unifiARPDetectResponseCounter
+2249 unifiEnableMgmtTxPacketStats
+2250 unifiSwToHwQueueStats
+2251 unifiHostToSwQueueStats
+2252 unifiQueueStatsEnable
+2253 unifiTxDataConfirm
+2254 unifiThroughputDebug
+2255 unifiLoadDpdLut
+2256 unifiDpdMasterSwitch
+2257 unifiDpdPredistortGains
+2258 unifiOverrideDpdLut
+2260 unifiGoogleMaxNumberOfPeriodicScans
+2261 unifiGoogleMaxRSSISampleSize
+2262 unifiGoogleMaxHotlistAPs
+2263 unifiGoogleMaxSignificantWifiChangeAPs
+2264 unifiGoogleMaxBssidHistoryEntries
+2270 unifiMacBeaconTimeout
+2271 unifiMIFOffAllowed
+2272 unifiBlockScanAfterNumSchedVif
+2274 unifiSTAUsesOneAntennaWhenIdle
+2275 unifiSTAUsesMultiAntennasDuringConnect
+2276 unifiAPUsesOneAntennaWhenPeersIdle
+2277 deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+2278 unifiPreferredAntennaBitmap
+2279 unifiMaxConcurrentMACs
+2280 unifiLoadDpdLutPerRadio
+2281 unifiOverrideDpdLutPerRadio
+2294 unifiRoamDeauthReason
+2295 unifiRoamCUFactor
+2298 unifiRoamRSSIBoost
+2299 UnifiRoamTrackingScanPeriod
+2300 unifiRoamCuLocal
+2301 unifiRoamCUScanNoCandidateDeltaTrigger
+2302 unifiRoamAPSelectDeltaFactor
+2303 unifiRoamCUWeight
+2305 unifiRoamRssiweight
+2306 unifiRoamRssiFactor
+2307 unifiRSSICURoamScanTrigger
+2308 unifiRoamCUScanTrigger
+2309 unifiRoamBSSLoadMonitoringFrequency
+2310 unifiRoamBlacklistSize
+2311 unifiCUMeasurementInterval
+2312 unifiCurrentBssNss
+2313 unifiAPMimoUsed
+2314 unifiRoamEapolTimeout
+2315 unifiRoamingCount
+2316 unifiRoamingAKM
+2317 unifiCurrentBssBandwidth
+2318 unifiCurrentBssChannelFrequency
+2320 unifiLoggerEnabled
+2321 unifiMaPacketFateEnabled
+2324 unifiStaVifLinkNss
+2326 unifiFrameRXCounters
+2327 unifiFrameTXCounters
+2330 unifiLaaNssSpeculationIntervalSlotTime
+2331 unifiLaaNssSpeculationIntervalSlotMaxNum
+2332 unifiLaaBwSpeculationIntervalSlotTime
+2333 unifiLaaBwSpeculationIntervalSlotMaxNum
+2334 unifiLaaMcsSpeculationIntervalSlotTime
+2335 unifiLaaMcsSpeculationIntervalSlotMaxNum
+2336 unifiLaaGiSpeculationIntervalSlotTime
+2337 unifiLaaGiSpeculationIntervalSlotMaxNum
+2350 UnifiLaaTxDiversityBeamformEnabled
+2351 UnifiLaaTxDiversityBeamformMinMcs
+2352 UnifiLaaTxDiversityFixMode
+2356 unifiLaaProtectionConfigOverride
+2358 unifiRateStatsRTSErrorCount
+2362 unifiCSROnlyEIFSDuration
+2364 unifiOverrideDefaultBETXOPForHT
+2365 unifiOverrideDefaultBETXOP
+2366 unifiRXABBTrimSettings
+2367 unifiRadioTrimsEnable
+2368 unifiRadioCCAThresholds
+2369 unifiHardwarePlatform
+2370 unifiForceChannelBW
+2371 unifiDPDTrainingDuration
+2372 unifiTxFtrimSettings
+2373 unifiDPDTrainPacketConfig
+2374 unifiTxPowerTrimCommonConfig
+2375 unifiIqDebugEnabled
+2425 unifiCoexDebugOverrideBt
+2430 unifiLteMailbox
+2431 unifiLteMwsSignal
+2432 unifiLteEnableChannelAvoidance
+2433 unifiLteEnablePowerBackoff
+2434 unifiLteEnableTimeDomain
+2435 unifiLteEnableLteCoex
+2436 unifiLteBand40PowerBackoffChannels
+2437 unifiLteBand40PowerBackoffRsrpLow
+2438 unifiLteBand40PowerBackoffRsrpHigh
+2439 unifiLteBand40PowerBackoffRsrpAveragingAlpha
+2440 unifiLteSetChannel
+2441 unifiLteSetPowerBackoff
+2442 unifiLteSetTddDebugMode
+2443 unifiLteBand40AvoidChannels
+2444 unifiLteBand41AvoidChannels
+2445 unifiLteBand7AvoidChannels
+2480 unifiAPScanAbsenceDuration
+2481 unifiAPScanAbsencePeriod
+2485 unifiMLMESTAKeepAliveTimeoutCheck
+2486 unifiMLMEAPKeepAliveTimeoutCheck
+2487 unifiMLMEGOKeepAliveTimeoutCheck
+2488 unifiBSSMaxIdlePeriod
+2493 unifiSTAIdleModeEnabled
+2494 unifiFastPowerSaveTimeOutAggressive
+2495 unifiIdlemodeListenIntervalSkippingDTIM
+2496 unifiIdlemodeP2PListenIntervalSkippingDTIM
+2497 unifiAPIdleModeEnabled
+2500 unifiFastPowerSaveTimeout
+2501 unifiFastPowerSaveTimeOutSmall
+2502 unifiMLMESTAKeepAliveTimeout
+2503 unifiMLMEAPKeepAliveTimeout
+2504 unifiMLMEGOKeepAliveTimeout
+2505 unifiSTARouterAdvertisementMinimumIntervalToForward
+2506 unifiRoamConnectionQualityCheckWaitAfterConnect
+2507 unifiApBeaconMaxDrift
+2508 unifiBSSMaxIdlePeriodActivated
+2509 unifiVifIdleMonitorTime
+2510 unifiDisableLegacyPowerSave
+2511 unifiDebugForceActive
+2512 unifiStationActivityIdleTime
+2513 unifiDmsActivated
+2514 unifiPowerManagementDelayTimeout
+2515 unifiAPSDServicePeriodTimeout
+2516 unifiConcurrentPowerManagementDelayTimeout
+2517 unifiStationQosInfo
+2518 unifiListenIntervalSkippingDTIM
+2519 unifiListenInterval
+2520 unifiLegacyPsPollTimeout
+2521 unifiBeaconSkippingControl
+2522 unifiTogglePowerDomain
+2523 unifiP2PListenIntervalSkippingDTIM
+2524 unifiFragmentationDuration
+2526 unifiIdleModeLiteEnabled
+2527 unifiIdleModeEnabled
+2529 unifiDTIMWaitTimeout
+2530 unifiListenIntervalMaxTime
+2531 unifiScanMaxProbeTransmitLifetime
+2532 unifiPowerSaveTransitionPacketThreshold
+2533 unifiProbeResponseLifetime
+2534 unifiProbeResponseMaxRetry
+2535 unifiTrafficAnalysisPeriod
+2536 unifiAggressivePowerSaveTransitionPeriod
+2537 unifiActiveTimeAfterMoreBit
+2538 unifiDefaultDwellTime
+2540 unifiVhtCapabilities
+2541 unifiMAXVifScheduleDuration
+2542 unifiVifLongIntervalTime
+2543 unifiDisallowSchedRelinquish
+2544 unifiRameDplaneOperationTimeout
+2545 unifiDebugKeepRadioOn
+2546 unifiForceFixedDurationSchedule
+2547 unifiRameUpdateMibs
+2548 unifiGOScanAbsenceDuration
+2549 unifiGOScanAbsencePeriod
+2550 unifiMaxClient
+2556 unifiTdlsInP2pActivated
+2558 unifiTdlsActivated
+2559 unifiTdlsTPThresholdPktSecs
+2560 unifiTdlsRssiThreshold
+2561 unifiTdlsMaximumRetry
+2562 unifiTdlsTPMonitorSecs
+2563 unifiTdlsBasicHtMcsSet
+2564 unifiTdlsBasicVhtMcsSet
+2565 dot11TDLSDiscoveryRequestWindow
+2566 dot11TDLSResponseTimeout
+2567 dot11TDLSChannelSwitchActivated
+2568 unifiTdlsDesignForTestMode
+2569 unifiTdlsWiderBandwidthProhibited
+2577 unifiTdlsKeyLifeTimeInterval
+2578 unifiTdlsTeardownFrameTxTimeout
+2580 unifiWifiSharingActivated
+2582 unifiWiFiSharing5GHzChannel
+2583 unifiWifiSharingChannelSwitchCount
+2584 unifiChannelAnnouncementCount
+2585 unifiRATestStoredSA
+2586 unifiRATestStoreFrame
+2587 dot11TDLSPeerUAPSDBufferSTAActivated
+2600 unifiProbeResponseLifetimeP2P
+2601 unifiStaChannelSwitchSlowApActivated
+2604 unifiStaChannelSwitchSlowApMaxTime
+2605 unifiStaChannelSwitchSlowApPollInterval
+2606 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+2607 unifiMLMEScanMaxAerials
+2650 unifiAPFActivated
+2651 unifiAPFVersion
+2652 unifiAPFMaxSize
+2653 unifiAPFActiveModeEnabled
+4001 unifiCSROnlyMIBShield
+4071 unifiPrivateBbbTxFilterConfig
+4075 unifiPrivateSWAGCFrontEndGain
+4076 unifiPrivateSWAGCFrontEndLoss
+4077 unifiPrivateSWAGCExtThresh
+4078 unifiCSROnlyPowerCalDelay
+4079 unifiRxAgcControl
+4130 deprecated_unifiWapiQosMask
+4139 unifiWMMStallEnable
+4148 unifiRaaTxHostRate
+4149 unifiFallbackShortFrameRetryDistribution
+4150 unifiRXTHROUGHPUTLOW
+4151 unifiRXTHROUGHPUTHIGH
+4152 unifiSetFixedAMPDUAggregationSize
+4153 unifiThroughputDebugReportInterval
+4154 unifiDplaneTest1
+4155 unifiDplaneTest2
+4156 unifiDplaneTest3
+4157 unifiDplaneTest4
+4171 unifiPreEBRTWindow
+4173 unifiPostEBRTWindow
+4179 unifiPsPollThreshold
+430 dot11RSNAStatsSTAAddress
+433 dot11RSNAStatsTKIPICVErrors
+434 dot11RSNAStatsTKIPLocalMICFailures
+435 dot11RSNAStatsTKIPRemoteMICFailures
+436 dot11RSNAStatsCCMPReplays
+437 dot11RSNAStatsCCMPDecryptErrors
+438 dot11RSNAStatsTKIPReplays
+441 dot11RSNAStatsRobustMgmtCCMPReplays
+5000 unifiSableContainerSizeConfiguration
+5001 unifiSableFrameLogMode
+5002 unifiSableFrameLogCpuThresPercent
+5003 unifiSableFrameLogCpuOverheadPercent
+5010 unifiDebugSVCModeStackHighWaterMark
+5023 unifiOverrideEDCAParamBE
+5024 unifiOverrideEDCAParamBEEnable
+5026 unifiPanicSubSystemControl
+5027 unifiFaultEnable
+5028 unifiFaultSubSystemControl
+5029 unifiDebugModuleControl
+5030 unifiTxUsingLdpcActivated
+5031 unifiTxSettings
+5032 unifiTxGainSettings
+5033 unifiTxAntennaConnectionLossFrequency
+5034 unifiTxAntennaConnectionLoss
+5035 unifiTxAntennaMaxGainFrequency
+5036 unifiTxAntennaMaxGain
+5037 unifiRxExternalGainFrequency
+5038 unifiRxExternalGain
+5040 unifiTxSGI20Activated
+5041 unifiTxSGI40Activated
+5042 unifiTxSGI80Activated
+5043 unifiTxSGI160Activated
+5044 unifiMacAddressRandomisation
+5047 unifiMacAddressRandomisationMask
+5050 unifiWipsActivated
+5054 unifiRfTestModeActivated
+5055 unifiTxPowerDetectorResponse
+5056 unifiTxDetectorTemperatureCompensation
+5057 unifiTxDetectorFrequencyCompensation
+5058 unifiTxOpenLoopTemperatureCompensation
+5059 unifiTxOpenLoopFrequencyCompensation
+5060 unifiTxOfdmSelect
+5061 unifiTxDigGain
+5062 unifiChipTemperature
+5063 UnifiBatteryVoltage
+5064 unifiTxOOBConstraints
+5066 unifiTxPaGainDpdTemperatureCompensation
+5067 unifiTxPaGainDpdFrequencyCompensation
+5072 unifiTxPowerTrimConfig
+5080 unifiForceShortSlotTime
+5081 unifiTxGainStepSettings
+5082 unifiDebugDisableRadioNannyActions
+5083 unifiRxCckModemSensitivity
+5084 unifiDpdPerBandwidth
+5085 unifiBBVersion
+5086 unifiRFVersion
+5087 unifiReadHardwareCounter
+5088 unifiClearRadioTrimCache
+5089 unifiRadioTXSettingsRead
+5090 unifiModemSgiOffset
+5091 unifiRadioTxPowerOverride
+5092 unifiRxRadioCsMode
+5093 unifiRxPriEnergyDetThreshold
+5094 unifiRxSecEnergyDetThreshold
+5095 unifiAgcThresholds
+5096 unifiRadioRXSettingsRead
+5097 unifiStaticDpdGain
+5098 unifiIQBufferSize
+5099 unifiNarrowbandCCAThresholds
+5100 unifiRadioCCADebug
+5101 unifiCCACSThresh
+5102 unifiCCAMasterSwitch
+5103 unifiRxSyncCCACfg
+5104 unifiMacCCABusyTime
+5105 unifiMacSecChanClearTime
+5106 unifiDpdDebug
+5107 unifiNarrowbandCCADebug
+5109 unifiNannyTemperatureReportDelta
+5110 unifiNannyTemperatureReportInterval
+5111 unifiRadioRxDcocDebugIqValue
+5112 unifiRadioRxDcocDebug
+5113 unifiNannyRetrimDpdMod
+5114 unifiDisableDpdSubIteration
+5115 unifiRxRssiAdjustments
+5116 unifiFleximacCcaEdEnable
+5117 unifiRadioTxIqDelay
+5118 unifiDisableLNABypass
+5200 unifiEnableFlexiMacWatchdog
+53 dot11TDLSPeerUAPSDIndicationWindow
+5300 unifiRttCapabilities
+5301 unifiFtmMinDeltaFrames
+5302 unifiFtmPerBurst
+5303 unifiFtmBurstDuration
+5304 unifiFtmNumOfBurstsExponent
+5305 unifiFtmASAPModeActivated
+5306 unifiFtmResponderActivated
+5307 unifiFtmDefaultSessionEstablishmentTimeout
+5308 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+5309 unifiFtmDefaultGapBetweenBursts
+5310 unifiFtmDefaultTriggerDelay
+5311 unifiFtmDefaultEndBurstDelay
+5312 unifiFtmRequestValidationEnabled
+5313 unifiFtmResponseValidationEnabled
+5314 unifiFtmUseResponseParameters
+5315 unifiFtmInitialResponseTimeout
+5320 unifiFtmDSPInpBW
+5321 unifiFtmOFDMCutOffset
+5322 unifiFtmMeanAroundCluster
+5410 unifiMLMEScanContinueIfMoreThanXAps
+5411 unifiMLMEScanStopIfLessThanXNewAps
+5412 unifiScanMultiVifActivated
+5413 unifiScanNewAlgorithmActivated
+6010 unifiUnsyncVifLnaEnabled
+6011 unifiTPCMinPower2GMIMO
+6012 unifiTPCMinPower5GMIMO
+6013 unifiLnaControlEnabled
+6014 unifiLnaControlRssiThresholdLower
+6015 unifiLnaControlRssiThresholdUpper
+6016 unifiPowerIsGrip
+6018 unifiLowPowerRxConfig
+6019 unifiTPCEnabled
+6020 unifiCurrentTxpowerLevel
+6021 unifiUserSetTxpowerLevel
+6022 unifiTPCMaxPowerRSSIThreshold
+6023 unifiTPCMinPowerRSSIThreshold
+6024 unifiTPCMinPower2G
+6025 unifiTPCMinPower5G
+6026 unifiSarBackoff
+6027 unifiTPCUseAfterConnectRsp
+6028 unifiRadioLpRxRssiThresholdLower
+6029 unifiRadioLpRxRssiThresholdUpper
+6032 unifiTestTxPowerEnable
+6033 unifiLteCoexMaxPowerRSSIThreshold
+6034 unifiLteCoexMinPowerRSSIThreshold
+6035 unifiLteCoexPowerReduction
+6050 unifiPMFAssociationComebackTimeDelta
+6060 unifiTestTspecHack
+6061 unifiTestTspecHackValue
+6069 unifiDebugInstantDelivery
+6071 unifiDebugEnable
+6073 unifiDPlaneDebug
+6080 unifiNANActivated
+6081 unifiNANBeaconCapabilities
+6082 unifiNANMaxConcurrentClusters
+6083 unifiNANMaxConcurrentPublishes
+6084 unifiNANMaxConcurrentSubscribes
+6085 unifiNANMaxServiceNameLength
+6086 unifiNANMaxMatchFilterLength
+6087 unifiNANMaxTotalMatchFilterLength
+6088 unifiNANMaxServiceSpecificInfoLength
+6089 unifiNANMaxVSADataLength
+6090 unifiNANMaxMeshDataLength
+6091 unifiNANMaxNDIInterfaces
+6092 unifiNANMaxNDPSessions
+6093 unifiNANMaxAppInfoLength
+6094 unifiNANMatchExpirationTime
+6095 unifiNANDefaultScanDwellTime
+6096 unifiNANDefaultScanPeriod
+6097 unifiNANMaxChannelSwitchTime
+6098 unifiNANMacRandomisationActivated
+6100 hutsReadWriteDataElementInt32
+6101 hutsReadWriteDataElementBoolean
+6102 hutsReadWriteDataElementOctetString
+6103 hutsReadWriteTableInt16Row
+6104 hutsReadWriteTableOctetStringRow
+6105 hutsReadWriteRemoteProcedureCallInt32
+6107 hutsReadWriteRemoteProcedureCallOctetString
+6108 hutsReadWriteInternalAPIInt16
+6109 hutsReadWriteInternalAPIUint16
+6110 hutsReadWriteInternalAPIUint32
+6111 hutsReadWriteInternalAPIInt64
+6112 hutsReadWriteInternalAPIBoolean
+6113 hutsReadWriteInternalAPIOctetString
+6114 hutsReadWriteInternalAPIFixedSizeTableRow
+6115 hutsReadWriteInternalAPIVarSizeTableRow
+6116 hutsReadWriteInternalAPIFixSizeTableKey1Row
+6117 hutsReadWriteInternalAPIFixSizeTableKey2Row
+6118 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+6119 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+6120 hutsReadWriteInternalAPIFixSizeTableKeyRow
+6121 hutsReadWriteInternalAPIVarSizeTableKeyRow
+6122 unifiTestScanNoMedium
+6123 unifiDualBandConcurrency
+6124 unifiLoggerMaxDelayedEvents
+8011 unifiRegulatoryParameters
+8012 unifiSupportedChannels
+8013 unifiDefaultCountry
+8014 unifiCountryList
+8015 unifiOperatingClassParamters
+8016 unifiVifCountry
+8017 unifiNoCellMaxPower
+8018 unifiNoCellIncludedChannels
+8019 unifiRegDomVersion
+8020 unifiDefaultCountryWithoutCH12CH13
+8051 unifiReadReg
+# Generated From ../common/mib/mib.xml
+debug_ids 77
+0000 COMPRESSED_DEBUG
+0001 MLME_SCAN
+0002 FAULTS
+0003 MLME_CME
+0004 MLME_CONMGR
+0005 MLME_MIB
+0006 MLME_MPDU_ROUTER
+0007 MLME_REQUESTS
+0008 MLME_VIFCTRL
+0009 MLME_CONNECT
+000a MLME_DEVICE
+000b RICE
+000c RICE_SAP
+000d WLANLITE
+000e MACRAME_SCHDL
+000f PMALLOC
+0010 CME_MGMT
+0011 MACRAME_API_DPLANE
+0012 MLME_BA
+0013 MLME_DEPRECATED
+0014 MLME_AP
+0015 MLME_REGULATORY
+0016 MLME_NAN
+0017 HALRADIO
+0018 MLME_ROAMING
+0019 DATAPLANE
+001a VACANT1
+001b VACANT2
+001c CRYPTO
+001d COEX
+001e MACRAME_PS
+001f MACRAME_BLACKOUT
+0020 MLME_SA_QUERY
+0021 MLME_OFFCHANNEL
+0022 MLME_MEASUREMENTS
+0023 MLME_TDLS
+0024 MACRAME_BEACON
+0025 MACRAME_VIF
+0026 MACRAME_OXYGEN
+0027 MACRAME_CALIBRATION
+0028 MACRAME
+0029 MACRAME_TX
+002a MACRAME_API_COEX
+002b MLME
+002c MACRAME_RADIO
+002d MIB
+002e MACRAME_FILTER
+002f HALMAC
+0030 HALRADIO_CORE
+0031 RICE_RSSI
+0032 MACRAME_API_MLME
+0033 MACRAME_IDLE_AP
+0034 MLME_API_MACRAME
+0035 MLME_SECURITY
+0036 MLME_TXPOWER
+0037 PACKET_FILTER
+0038 MLME_WIFI_LOGGER
+0039 MACRAME_STATION
+003a HALRADIO_TX_DPD
+003b HALRADIO_TX_POW
+003c HALRADIO_TX_IQ
+003d HALRADIO_RX
+003e BIST
+003f MLME_FRAME
+0040 MLME_IE
+0041 HALRADIO_COEX_FEM
+0042 MLME_FTM
+0043 SMAPPER
+0044 MLME_API_DPLANE
+0045 MLME_FTM_RESP
+0046 MLME_SCAN_CHANNEL
+0047 LMIF
+0048 MLME_BASF
+0049 APF
+004a MLME_NDM
+004b MLME_NAM
+004c MACRAME_IDLE_STA
+# Generated From pmalloc/pmalloc_debug.xml
+trace_def 6
+000f 0000 PMALLOC_STATS 000a p1size p1blocks p1allocated p1max_allocated p1overflows p2size p2blocks p2allocated p2max_allocated p2overflows
+000f 0001 PMALLOC_MEM_SIZE 0003 pmalloc_begin pmalloc_end size
+000f 0002 PMALLOC_FSM_SIZE 0003 entry blocks size
+000f 0003 PMALLOC_FSM_CONTEXT_SIZE 0002 size count
+000f 0004 PMALLOC_HOSTIO_SIG_SIZE 000c s1id s1size s2id s2size s3id s3size s4id s4size s5id s5size s6id s6size
+000f 0005 PMALLOC_FSM_DATA_SIZE 0002 pid size
+# Generated From pmalloc/pmalloc_debug.xml
+trace_types 9
+PMALLOC_MEM_SIZE.pmalloc_begin Natural32
+PMALLOC_MEM_SIZE.pmalloc_end Natural32
+PMALLOC_MEM_SIZE.size Natural32
+PMALLOC_HOSTIO_SIG_SIZE.s1id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s2id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s3id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s4id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s5id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s6id SignalId
+# Generated From hal/halmac/halmac_debug.xml
+trace_def 3
+002f 0000 HALMAC_CCK_SENS_CONF 0006 sync_ratio_scan sync_ratio_normal sync_ratio_low cca_ratio_scan cca_ratio_normal cca_ratio_low
+002f 0001 HALMAC_CCK_SENS_WRITE 0007 sync_ratio_scan sync_ratio_normal sync_ratio_low cca_ratio_scan cca_ratio_normal cca_ratio_low mode_select
+002f 0002 HALMAC_MODEM_PATH_MAP_CONFIG 0003 frequency radio_bm modem_id
+# Generated From hal/halmac/halmac_debug.xml
+# Generated From hal/halradio/halradio_tx_dpd_debug.xml
+trace_def 30
+003a 0000 HALRADIO_TX_DPD_FIR_GAINS 0003 ofdm0_gain ofdm1_gain cck_gain
+003a 0001 HALRADIO_TX_DPD_ALIGN_SIGNAL 000b group temp index val1 val2 val3 sample triangle phase tr_sig_i tr_sig_q
+003a 0002 HALRADIO_TX_DPD_LUT_WRITE 0009 group temp index real real_8MSB real_LSB_array_32 imag imag_8MSB imag_LSB_array_32
+003a 0003 HALRADIO_TX_DPD_LUT_READ 0009 sub_iteration lut_type lut_grp lut_temp lut_lower_bound lut_upper_bound channel_bandwidth adapt_qual lut
+003a 0005 HALRADIO_TX_DPD_ALIGN 0007 sum_msw sum_lsw max_msw max_lsw d xcorr_octant spare
+003a 0006 HALRADIO_TX_DPD_TEMP 0003 pre_train_pa_temp post_train_pa_temp group
+003a 0007 HALRADIO_TX_DPD_LUT_BOUNDS 0006 OFDM0_low_bound OFDM0_high_bound OFDM1_low_bound OFDM1_high_bound CCK_low_bound CCK_high_bound
+003a 0008 HALRADIO_TX_DPD_FIXED_GAIN 0005 halradio_db halradio_gain dpd_gain msbs lsbs
+003a 0009 HALRADIO_TX_DPD_ADAPT_FIR 0005 coeff0 coeff1 coeff2 coeff3 group
+003a 000a HALRADIO_TX_DPD_ALIGN_2 0005 dpd_trim_step restart dpd_loopback_atten dpd_rx_bb1 dpd_rx_bb2
+003a 000b HALRADIO_TX_DPD_SPARE_1
+003a 000c HALRADIO_TX_DPD_CURVE_FIT 0007 sum_x sum_x2 sum_y sum_y2 sum_xy m_8_8 c
+003a 000d HALRADIO_TX_DPD_SPARE_2
+003a 000e HALRADIO_TX_DPD_UB 0004 mod_group pre_gain index_max_mag pregain_ub_index
+003a 000f HALRADIO_TX_DPD_LUT_CLEAN_CAUSE 0006 mod_group index i_full_path i_direct_path q_full_path q_direct_path
+003a 0010 HALRADIO_TX_DPD_LUT_CLEAN_COEFFS 000c i_index_m2 i_index_m1 i_index_old i_index_p1 i_index_p2 q_index_m2 q_index_m1 q_index_old q_index_p1 q_index_p2 i_index_new q_index_new
+003a 0011 HALRADIO_TX_DPD_LUT_REPAIR 0008 offset overflow min_real max_real ave_real min_mag max_mag ave_mag
+003a 0012 HALRADIO_TX_DPD_QUALITY 0005 dpd_trim_step quality quality_threshold failures max_attempts
+003a 0013 HALRADIO_TX_DPD_LOAD_ADAPT_FIR 0009 source_coeff0 source_coeff1 source_coeff2 source_coeff3 hw_coeff0 hw_coeff1 hw_coeff2 hw_coeff3 group
+003a 0014 HALRADIO_TX_DPD_RX_ABB_GAIN 0004 MAX_DPD_RX_BB rx_abb_gain rx_abb_MSBs rx_abb_2LSBs
+003a 0015 HALRADIO_TX_DPD_CALC_LOOPBACK_FAILED 0006 dpd_trim_step frequency_half_MHz bandwidth power_quarter_dBm attempt err_code
+003a 0016 HALRADIO_TX_DPD_TRAIN_TIME 0005 dpd_trim_step iteration sub_iteration time_to_train tag
+003a 0017 HALRADIO_TX_DPD_LOOPBACK_PHASE 0006 group sub_iteration phase_cache_OFDM0 phase_cache_OFDM1 phase_cache_CCK phase_calc_new
+003a 0018 HALRADIO_TX_DPD_DRV_PA_BIAS 0006 mod target_power align_drv_bias align_pa_bias train_drv_bias train_pa_bias
+003a 0019 HALRADIO_TX_DPD_ALIGN_3 0008 dpd_trim_step coarse_delay fine_delay sum_coeffs initial_gain fir_gain ratio xcorr_octant
+003a 001a HALRADIO_TX_DPD_ALIGN_SETTINGS 0008 dig_gain pre_gain v2i_gain mix_gain drv_gain pa_gain drv_bias pa_bias
+003a 001b HALRADIO_TX_DPD_ALIGN_SETTINGS2 0006 fir_gain delay lut_coeff0_mag phase rx_abb_gain dpd_loopback_atten
+003a 001c HALRADIO_TX_DPD_TRAIN_SETTINGS 0008 dig_gain pre_gain v2i_gain mix_gain drv_gain pa_gain drv_bias pa_bias
+003a 001d HALRADIO_TX_DPD_TRAIN_SETTINGS2 0006 fir_gain delay lut_coeff0_mag phase rx_abb_gain dpd_loopback_atten
+003a 001e HALRADIO_TX_DPD_BAD_LUT 0003 lut_sum_mag_sq lut_sum_mag_sq_thr good_lut_flag
+# Generated From hal/halradio/halradio_tx_dpd_debug.xml
+trace_types 74
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.fir_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.delay Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.phase Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.rx_abb_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.dpd_loopback_atten Natural8
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_m2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_m1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_old Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_p1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_p2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_m2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_m1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_old Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_p1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_p2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_new Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_new Natural16s
+HALRADIO_TX_DPD_BAD_LUT.lut_sum_mag_sq Natural32
+HALRADIO_TX_DPD_BAD_LUT.lut_sum_mag_sq_thr Natural32
+HALRADIO_TX_DPD_BAD_LUT.good_lut_flag Boolean
+HALRADIO_TX_DPD_ALIGN_SIGNAL.tr_sig_i Natural16s
+HALRADIO_TX_DPD_ALIGN_SIGNAL.tr_sig_q Natural16s
+HALRADIO_TX_DPD_FIXED_GAIN.halradio_gain Natural32
+HALRADIO_TX_DPD_ALIGN.sum_msw Natural32
+HALRADIO_TX_DPD_ALIGN.sum_lsw Natural32
+HALRADIO_TX_DPD_ALIGN.max_msw Natural32
+HALRADIO_TX_DPD_ALIGN.max_lsw Natural32
+HALRADIO_TX_DPD_LUT_READ.sub_iteration Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_type Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_grp Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_temp Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_lower_bound Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_upper_bound Natural8
+HALRADIO_TX_DPD_LUT_READ.channel_bandwidth Natural8
+HALRADIO_TX_DPD_LUT_READ.adapt_qual Natural32
+HALRADIO_TX_DPD_LUT_READ.lut MBULK
+HALRADIO_TX_DPD_ALIGN_SETTINGS.dig_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pre_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.v2i_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.mix_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.drv_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pa_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.drv_bias Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pa_bias Natural8
+HALRADIO_TX_DPD_CALC_LOOPBACK_FAILED.power_quarter_dBm Natural16s
+HALRADIO_TX_DPD_DRV_PA_BIAS.target_power Natural16s
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.fir_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.delay Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.phase Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.rx_abb_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.dpd_loopback_atten Natural8
+HALRADIO_TX_DPD_LUT_REPAIR.offset Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.min_real Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.max_real Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.ave_real Natural16s
+HALRADIO_TX_DPD_TRAIN_SETTINGS.dig_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pre_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.v2i_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.mix_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.drv_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pa_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.drv_bias Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pa_bias Natural8
+HALRADIO_TX_DPD_CURVE_FIT.sum_x Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_x2 Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_y Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_y2 Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_xy Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.m_8_8 Natural16s
+HALRADIO_TX_DPD_CURVE_FIT.c Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.real Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.real_LSB_array_32 Natural32
+HALRADIO_TX_DPD_LUT_WRITE.imag Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.imag_LSB_array_32 Natural32
+# Generated From hal/halradio/halradio_core_debug.xml
+trace_def 4
+0030 0000 HALRADIO_CORE_FAULT_HELPER 000b fault_id fault_arg helper_0 helper_1 helper_2 helper_3 helper_4 helper_5 helper_6 helper_7 helper_8
+0030 0001 HALRADIO_CORE_SPARE_1
+0030 0002 HALRADIO_CORE_DPD_MASTER 0002 dpd_master_switch dpd_master_switch_mask
+0030 0003 HALRADIO_CORE_ENABLED_TRIMS 0003 enabled_trims disallowed_per_chan_trims initial_pending
+# Generated From hal/halradio/halradio_core_debug.xml
+trace_types 5
+HALRADIO_CORE_ENABLED_TRIMS.enabled_trims Natural32
+HALRADIO_CORE_ENABLED_TRIMS.disallowed_per_chan_trims Natural32
+HALRADIO_CORE_ENABLED_TRIMS.initial_pending Natural32
+HALRADIO_CORE_DPD_MASTER.dpd_master_switch Natural32
+HALRADIO_CORE_DPD_MASTER.dpd_master_switch_mask Natural32
+# Generated From hal/halradio/halradio_rx_debug.xml
+trace_def 26
+003d 0000 HALRADIO_RX_WBRSSI_OFFSET 0001 settle
+003d 0001 HALRADIO_RX_WBRSSI_PLOT 000a y_0_1 y_2_3 y_4_5 y_6_7 y_8_9 y_10_11 y_12_13 y_14_15 restrim_best_index zero_best_offset
+003d 0002 HALRADIO_RX_DC_TIME 0001 time_us
+003d 0003 HALRADIO_RX_WBRSSI_DC 0003 best_index best_reading best_offset
+003d 0004 HALRADIO_RX_WBRSSI_IREF 0001 iref_trim
+003d 0005 HALRADIO_RX_DCOC_LUT 0009 index_gains rx_dc_adj_i rx_dc_adj_q sig_anal_l_iq sig_anal_h_iq adc_l_i_0 adc_l_q_0 adc_h_i_0 adc_h_q_0
+003d 0006 HALRADIO_RX_DCOC_BB_GAINS 000b index_gains abb1_gain abb2_0_i abb2_0_q abb2_1_i abb2_1_q abb2_2_i abb2_2_q abb2_3_i abb2_3_q shift
+003d 0007 HALRADIO_RX_GAINS_ENABLES 000a ana_enables_status_h ana_enables_status_l ana_enables_h ana_enables_l ana_enables_mask_h ana_enables_mask_l agc_config2_h agc_config2_l rx_level gain_status
+003d 0008 HALRADIO_RX_DCOC_LUT_ENT 000c lut_i_0__6_12 lut_q_0__6_12 lut_i_1__7_13 lut_q_1__7_13 lut_i_2__8_14 lut_q_2__8_14 lut_i_3__9_15 lut_q_3__9_15 lut_i_4_10_16 lut_q_4_10_16 lut_i_5_11_17 lut_q_5_11_17
+003d 0009 HALRADIO_RX_DCOC_LUT_32 0007 index rx_dc_adj_i rx_dc_adj_q sig_anal_l_i sig_anal_l_q sig_anal_h_i sig_anal_h_q
+003d 000a HALRADIO_RX_DCOC_BB_GAINS_32 0004 index abb sig_anal_i sig_anal_q
+003d 000b HALRADIO_RX_RCCAL 0001 rccal_value
+003d 000c HALRADIO_RX_IQ_COMP_RES0 000b tap0_real_mant tap0_imag_mant tap1_real_mant tap1_imag_mant tap2_real_mant tap2_imag_mant tap3_real_mant tap3_imag_mant tap4_real_mant tap4_imag_mant shift
+003d 000d HALRADIO_RX_IQ_COMP_RES1 000a mag_0_1_mant mag_2_3_mant mag_4_5_mant mag_6_7_mant mag_8_9_mant mag_10_11_mant mag_12_13_mant mag_14_15_mant shift bandwidth
+003d 000e HALRADIO_RX_IQ_COMP_INTERMEDIATE0 0003 iteration radio_id bw
+003d 000f HALRADIO_RX_IQ_COMP_INTERMEDIATE1 0006 fundamental_real fundamental_imag image_real image_imag rejection_real rejection_imag
+003d 0010 HALRADIO_RX_IQ_COMP_INTERMEDIATE2 0006 mat_element_real mat_element_imag product_real product_imag accum_real accum_imag
+003d 0011 HALRADIO_RX_IQ_COMP_LO_LOCK 0001 dummy
+003d 0012 HALRADIO_RX_IQ_COMP_DEBUG1 0004 fundamental_real fundamental_imag iteration fundamental_magn
+003d 0013 HALRADIO_RX_IQ_COMP_DEBUG2 0004 magn_val_np1 magn_val_n iteration step_size
+003d 0014 HALRADIO_RX_DCOC_RF_AGC_GAINS 0004 time deadline fe_gain bb_gain
+003d 0015 HALRADIO_RX_DCOC_LUT_SUMMARY 000c lut_i_low_0 lut_q_low_0 lut_i_low_1 lut_q_low_1 lut_i_mid_0 lut_q_mid_0 lut_i_mid_1 lut_q_mid_1 lut_i_high_0 lut_q_high_0 lut_i_high_1 lut_q_high_1
+003d 0016 HALRADIO_RX_DCOC_EXTRA_SWEEP_IQ 000b lut_index i_0 q_0 i_1 q_1 i_2_trim q_2_trim i_3 q_3 i_4 q_4
+003d 0017 HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I 0006 lut_index sa_i_0 sa_i_1 sa_i_2_trim sa_i_3 sa_i_4
+003d 0018 HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q 0006 lut_index sa_q_0 sa_q_1 sa_q_2_trim sa_q_3 sa_q_4
+003d 0019 HALRADIO_RX_WBRSSI_OFFSET_RES 0002 offset rtrim
+# Generated From hal/halradio/halradio_rx_debug.xml
+trace_types 52
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_real Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_imag Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG1.iteration Natural32
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_magn Natural32
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.fundamental_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.fundamental_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.image_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.image_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.rejection_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.rejection_imag Natural32s
+HALRADIO_RX_DCOC_RF_AGC_GAINS.fe_gain Natural32s
+HALRADIO_RX_DCOC_RF_AGC_GAINS.bb_gain Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_IQ.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_0 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_1 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_2_trim Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_3 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_4 Natural32s
+HALRADIO_RX_IQ_COMP_LO_LOCK.dummy Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG2.magn_val_np1 Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.magn_val_n Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.iteration Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.step_size Natural32
+HALRADIO_RX_IQ_COMP_RES0.tap0_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap0_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap1_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap1_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap2_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap2_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap3_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap3_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap4_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap4_imag_mant Natural16s
+HALRADIO_RX_DCOC_BB_GAINS_32.sig_anal_i Natural32s
+HALRADIO_RX_DCOC_BB_GAINS_32.sig_anal_q Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_0 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_1 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_2_trim Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_3 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_4 Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_l_i Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_l_q Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_h_i Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_h_q Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.mat_element_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.mat_element_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.product_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.product_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.accum_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.accum_imag Natural32s
+# Generated From hal/halradio/halradio_tx_iq_debug.xml
+trace_def 20
+003c 0000 HALRADIO_TX_IQ_DCOC_SEARCH_1 000a packiq_0 sa_0 packiq_1 sa_1 packiq_2 sa_2 packiq_3 sa_3 packiq_4 sa_4
+003c 0001 HALRADIO_TX_IQ_DCOC_SEARCH_2 000a packiq_5 sa_5 packiq_6 sa_6 packiq_7 sa_7 packiq_8 sa_8 mixer amplitude
+003c 0002 HALRADIO_TX_IQ_DCOC_SA_POWER_RES 0006 iteration start_time sa_low_power sa_high_pwr_cck sa_high_pwr_ofdm0 sa_high_pwr_ofdm1
+003c 0003 HALRADIO_TX_IQ_SEARCH 000a seq trim_0_i trim_0_q sa_0 trim_1_i trim_1_q sa_1 trim_2_i trim_2_q sa_2
+003c 0004 HALRADIO_TX_IQ_INADEQUATE_RANGE 0006 itrim max_iq_offset_i min_iq_offset_i qtrim max_iq_offset_q min_iq_offset_q
+003c 0005 HALRADIO_TX_IQ_IM_SEARCH_RES 0005 iteration start_time scale angle sa
+003c 0006 HALRADIO_TX_IQ_DCOC_INFO 0003 event avg_v2i_cck_i avg_v2i_cck_q
+003c 0007 HALRADIO_TX_IQ_DCOC_PCAL_SEARCH 0002 band gain
+003c 0008 HALRADIO_TX_IQ_DCOC_PCAL_RES 0005 time a_i a_q v2i_gain mix_gain
+003c 0009 HALRADIO_TX_IQ_DCOC_PCAL_SET 0004 band gain trim_conf0 trim_conf1
+003c 000a HALRADIO_TX_IQ_SWEEP 000b i_search q_search sa_minus_4 sa_minus_3 sa_minus_2 sa_minus_1 sa_zero sa_plus_1 sa_plus_2 sa_plus_3 sa_plus_4
+003c 000b HALRADIO_TX_IQ_DCOC_SEARCH_RES2 0008 iteration start_time mix_i mix_q mix_sa dig_i dig_q dig_sa
+003c 000c HALRADIO_TX_IQ_DCOC_FINAL_PASSES 000b current_i current_q last_i last_q count min_i min_q max_i max_q max_range max_min_ratio
+003c 000d HALRADIO_TX_IQ_DCOC_RESTART_MAX 0001 restart_count
+003c 000e HALRADIO_TX_IQ_RAMP 0002 new_amplitude maxval
+003c 000f HALRADIO_TX_IMG_PAIR 0003 freq scale angle
+003c 0010 HALRADIO_TX_IQ_GAINS 0005 index v2i_gain mix_gain drv_gain pa_gain
+003c 0011 HALRADIO_TX_V2I_OFFSET_RES 0004 index i q sa
+003c 0012 HALRADIO_TX_IQ_CL_NANNY_TRIG 0003 event trim_temperature current_temperature
+003c 0013 HALRADIO_TX_IQ_DCOC_V2I_OFF_RES 000a iteration start_time v2i_off_low_power_i v2i_off_low_power_q v2i_off_sa_high_pwr_cck_i v2i_off_sa_high_pwr_cck_q v2i_off_sa_high_pwr_ofdm0_i v2i_off_sa_high_pwr_ofdm0_q v2i_off_sa_high_pwr_ofdm1_i v2i_off_sa_high_pwr_ofdm1_q
+# Generated From hal/halradio/halradio_tx_iq_debug.xml
+trace_types 46
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.current_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.current_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.last_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.last_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.min_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.min_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_range Natural16s
+HALRADIO_TX_IQ_GAINS.index Natural8
+HALRADIO_TX_IMG_PAIR.freq Natural16s
+HALRADIO_TX_IMG_PAIR.scale Natural16s
+HALRADIO_TX_IMG_PAIR.angle Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_low_power_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_low_power_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_cck_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_cck_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm0_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm0_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm1_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm1_q Natural16s
+HALRADIO_TX_V2I_OFFSET_RES.index Natural8
+HALRADIO_TX_V2I_OFFSET_RES.i Natural16s
+HALRADIO_TX_V2I_OFFSET_RES.q Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.itrim Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.max_iq_offset_i Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.min_iq_offset_i Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.qtrim Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.max_iq_offset_q Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.min_iq_offset_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_0_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_0_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_1_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_1_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_2_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_2_q Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.mix_i Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.mix_q Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.dig_i Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.dig_q Natural16s
+HALRADIO_TX_IQ_DCOC_PCAL_RES.a_i Natural16s
+HALRADIO_TX_IQ_DCOC_PCAL_RES.a_q Natural16s
+HALRADIO_TX_IQ_IM_SEARCH_RES.scale Natural16s
+HALRADIO_TX_IQ_IM_SEARCH_RES.angle Natural16s
+HALRADIO_TX_IQ_SWEEP.i_search Natural16s
+HALRADIO_TX_IQ_SWEEP.q_search Natural16s
+# Generated From hal/halradio/halradio_tx_pow_debug.xml
+trace_def 24
+003b 0000 HALRADIO_TX_POW_GAIN_SEARCH 0007 adc_ref adc_reading dig_gain count sensor raw_temperature raw_average_temp
+003b 0001 HALRADIO_TX_POW_PSAT_RES 0007 sa_saturation sa_reduced_gain dig_gain pre_dist_gain measured_gain ratio ref_power
+003b 0002 HALRADIO_TX_POW_SDPD 000b lo_ref_meas lo_corrected ratio cck_reference cck_calculated ofdm0_reference ofdm0_calculated ofdm1_reference ofdm1_calculated temperature temp_comp_gain
+003b 0003 HALRADIO_TX_POW_TEMP 0004 sensor initial after_lo final
+003b 0004 HALRADIO_TX_POW_SCALE 0008 sa_low_ref siganal_power_step target_power requested_power corner_power_ref gain sa_target power_ref
+003b 0005 HALRADIO_TX_POW_GAIN_STEP 0006 target_adc adc_reading gain_index best_index best_error best_adc
+003b 0006 HALRADIO_TX_POW_TARGETS 0007 sa_saturation target_power_1 target_adc_1 target_power_2 target_adc_2 target_power_3 target_adc_3
+003b 0007 HALRADIO_TX_POW_GAIN_SWEEP_COMMON 0005 adc_ref dig_gain_ref mod sensor Frequency
+003b 0008 HALRADIO_TX_POW_CAL 0007 target_power_qdb max_power_at_connector_qdb_CCK target_power_CCK max_power_at_connector_qdb_OFDM_0 target_power_OFDM_0 max_power_at_connector_qdb_OFDM_1 target_power_OFDM_1
+003b 0009 HALRADIO_TX_POW_DIG_TRIM 0005 count DIG_SERVO_COUNT_THRESHOLD dig_gain adc_reading target_adc
+003b 000a HALRADIO_TX_POW_RESULT 0009 mod adc_reading target_adc dig_gain v2i_gain mix_gain drv_gain pa_gain count
+003b 000b HALRADIO_TX_POW_GAIN_SWEEP 000b dig_gain adc_0 adc_1 adc_2 adc_3 adc_4 adc_5 adc_6 adc_7 raw_temperature raw_average_temp
+003b 000c HALRADIO_TX_POW_FTRIM_SET 0006 channel_freq nearest_freq best_distance mixer driver pa
+003b 000d HALRADIO_TX_POW_MOD_GRP 0006 mac_acc_mod_opt mod_group rate mod_index mod_mask tx_ofdm_sel
+003b 000e HALRADIO_TX_POW_MIMO_BFER 0008 modulation power_limit target_power mimo_backoff_dB bfer_backoff_dB dig_gain dig_gain_mimo dig_gain_bfer
+003b 000f HALRADIO_TX_POW_DIG_RANGE 0004 band modulation pre_dist_gain_ref pre_dist_gain
+003b 0010 HALRADIO_TX_POW_NANNY_TRIG 0003 event trim_temperature current_temperature
+003b 0011 HALRADIO_TX_POW_SETTINGS 0009 gain_index v2i_gain drv_gain mix_gain pa_gain pre_gain sig_amp adc_reading power
+003b 0012 HALRADIO_TX_POW_DIG_CALC 0004 pre_dist_ref pre_dist_calc target_adc adc_reading
+003b 0013 HALRADIO_TX_POW_PICKED 000a mod adc_reading target_adc dig_gain v2i_gain mix_gain drv_gain pa_gain index dig_gain_ref
+003b 0014 HALRADIO_TX_POW_TARGET_CAL 0008 cl_freq_comp ol_freq_comp cl_temp_comp ol_temp_comp target_power_cap max_power_uplift temp_oob_limit target_power
+003b 0015 HALRADIO_TX_POW_TEMP2 0003 after_cck after_ofdm0 after_ofdm1
+003b 0016 HALRADIO_TX_POW_GAIN_STEP_ADC 0009 base_idx adc_idx_0 adc_idx_1 adc_idx_2 adc_idx_3 adc_idx_4 adc_idx_5 adc_idx_6 adc_idx_7
+003b 0017 HALRADIO_TX_POW_GAIN_STEP_POWER 0009 base_idx dbm_idx_0 dbm_idx_1 dbm_idx_2 dbm_idx_3 dbm_idx_4 dbm_idx_5 dbm_idx_6 dbm_idx_7
+# Generated From hal/halradio/halradio_tx_pow_debug.xml
+trace_types 27
+HALRADIO_TX_POW_SETTINGS.power Natural16s
+HALRADIO_TX_POW_PICKED.index Natural8
+HALRADIO_TX_POW_SDPD.temp_comp_gain Natural32
+HALRADIO_TX_POW_PSAT_RES.ref_power Natural16s
+HALRADIO_TX_POW_MIMO_BFER.power_limit Natural16s
+HALRADIO_TX_POW_MIMO_BFER.target_power Natural16s
+HALRADIO_TX_POW_MIMO_BFER.mimo_backoff_dB Natural16s
+HALRADIO_TX_POW_MIMO_BFER.bfer_backoff_dB Natural16s
+HALRADIO_TX_POW_SCALE.gain Natural32
+HALRADIO_TX_POW_MOD_GRP.mac_acc_mod_opt Natural32
+HALRADIO_TX_POW_MOD_GRP.mod_mask Natural32
+HALRADIO_TX_POW_MOD_GRP.tx_ofdm_sel Natural32
+HALRADIO_TX_POW_TARGET_CAL.cl_freq_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.ol_freq_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.cl_temp_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.ol_temp_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.target_power_cap Natural16s
+HALRADIO_TX_POW_TARGET_CAL.max_power_uplift Natural16s
+HALRADIO_TX_POW_TARGET_CAL.temp_oob_limit Natural16s
+HALRADIO_TX_POW_TARGET_CAL.target_power Natural16s
+HALRADIO_TX_POW_CAL.target_power_qdb Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_CCK Natural16s
+HALRADIO_TX_POW_CAL.target_power_CCK Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_OFDM_0 Natural16s
+HALRADIO_TX_POW_CAL.target_power_OFDM_0 Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_OFDM_1 Natural16s
+HALRADIO_TX_POW_CAL.target_power_OFDM_1 Natural16s
+# Generated From hal/halradio/halradio_coex_fem_debug.xml
+trace_def 2
+0041 0000 HALRADIO_COEX_FEM_COEX_REGS 0006 COEX_RF_CFG COEX_RF_FEC_2G_CFG COEX_RF_FEC_2G_CFG1 COEX_RF_FEC_5G_CFG RFIC_PAD_MUX_CTRL WL_ANA_TX_5G_MISC_CONFIG
+0041 0001 HALRADIO_COEX_FEM_MILDRED_REGS 0002 MILDRED_SBUF MILDRED_SCON
+# Generated From hal/halradio/halradio_coex_fem_debug.xml
+trace_types 5
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_2G_CFG Natural32
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_2G_CFG1 Natural32
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_5G_CFG Natural32
+HALRADIO_COEX_FEM_COEX_REGS.RFIC_PAD_MUX_CTRL Natural32
+HALRADIO_COEX_FEM_COEX_REGS.WL_ANA_TX_5G_MISC_CONFIG Natural32
+# Generated From hal/halradio/halradio_debug.xml
+trace_def 28
+0017 0000 HALRADIO_LOGEN_SEARCH 000c dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10 dbg_11
+0017 0001 HALRADIO_LOGEN_RESULT 0007 time temperature frequency trp_fcal trp_acal buf_fcal buf_acal
+0017 0002 HALRADIO_PLL_LOCK_INFO 0003 time_for_locking temperature_at_lock frequency
+0017 0004 HALRADIO_SIGANAL_OUT 0008 itone qtone isample qsample rc ic mag phase
+0017 0005 HALRADIO_GET_TEMP 0001 raw_temperature
+0017 0006 HALRADIO_ABB_FILTER_TRIM_SEARCH 000c freq dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10
+0017 0007 HALRADIO_ABB_FILTER_TRIM_RESULT 0008 time target10 target20 target40 ftrim_10 ftrim_20 ftrim_40 bw_ftrim_tx_30
+0017 0008 HALRADIO_TX_ABB_FILTER_TRIM_SET 0006 bandwidth wb_en small_r_80m small_c_80m dac_ftrim filt_ftrim
+0017 0009 HALRADIO_TX_ABB_FILTER_TRIM_RES 0007 time bw filter noise ref target ftrim
+0017 000a HALRADIO_SPEEDY_HDR 0002 n n_mod_NLOG
+0017 000b HALRADIO_SPEEDY_ROW 000c CTRL_MSW_0 CTRL_LSW_0 DATA_MSW_0 DATA_LSW_0 CTRL_MSW_1 CTRL_LSW_1 DATA_MSW_1 DATA_LSW_1 CTRL_MSW_2 CTRL_LSW_2 DATA_MSW_2 DATA_LSW_2
+0017 000c HALRADIO_TEMP_UPDATE 0005 sensor inst_temp_c avg_temp_c measure_timestamp temp_measurement_context
+0017 000d HALRADIO_GENERIC_12 000c dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10 dbg_11
+0017 000e HALRADIO_BIST_ADC_READ 000c bist_adc_01 bist_adc_02 bist_adc_03 bist_adc_04 bist_adc_05 bist_adc_06 bist_adc_07 bist_adc_08 bist_adc_09 bist_adc_10 bist_adc_11 bist_adc_12
+0017 000f HALRADIO_SIGANAL_MIN_MAX 0004 sa_max_positive sa_min_negative fault_count total_readings
+0017 0010 HALRADIO_PATH_MAP_CONFIG 0003 new_map modem_id is_mimo
+0017 0011 HALRADIO_PATH_MAP_ROUTING 0004 dfe_id wlr_id pcr_id radio_id
+0017 0012 HALRADIO_TDC 0002 derived_checksum expected_checksum
+0017 0013 HALRADIO_LOAD_PLAYBACK 0005 tag memcmp_result dest src size_bytes
+0017 0014 HALRADIO_RADIOLOG_RAMS 0004 tag buf_start buf_end buf_size
+0017 0015 HALRADIO_LOCK_DURATION 0002 duration locked
+0017 0016 HALRADIO_STAGE 0002 step duration
+0017 0017 HALRADIO_TRIM_TIMINGS 0008 trim_in_progress trim_step iteration sub_iteration time_marker spare0 spare1 spare2
+0017 0018 HALRADIO_CHAN_RSSI_PER_CAPTURE 0007 rx_fe_gain_index rx_bb_gain_index lna_gain_index mix_gain_index rssi_log gain_correction_dB chan_rssi_dBm
+0017 0019 HALRADIO_REG_LOG 0002 tag address
+0017 001a HALRADIO_TX_DPD_NANNY_TRIG 0004 temp_last temp_cur context nanny_bm
+0017 001b HALRADIO_FEM_CONTROL 0005 client band disable lna_client_disable_mask ext_lna_enabled
+0017 001c HALRADIO_FLEXIMAC_STATE_TIMES 0003 actual_delay_us max_delay_us new_state
+# Generated From hal/halradio/halradio_debug.xml
+trace_types 34
+HALRADIO_SIGANAL_OUT.itone Natural16s
+HALRADIO_SIGANAL_OUT.qtone Natural16s
+HALRADIO_SIGANAL_OUT.isample Natural16s
+HALRADIO_SIGANAL_OUT.qsample Natural16s
+HALRADIO_SIGANAL_OUT.rc Natural32s
+HALRADIO_SIGANAL_OUT.ic Natural32s
+HALRADIO_SIGANAL_OUT.mag Natural32
+HALRADIO_LOAD_PLAYBACK.memcmp_result Natural16s
+HALRADIO_LOAD_PLAYBACK.dest Natural32
+HALRADIO_LOAD_PLAYBACK.src Natural32
+HALRADIO_TEMP_UPDATE.inst_temp_c Natural16s
+HALRADIO_TEMP_UPDATE.avg_temp_c Natural16s
+HALRADIO_TEMP_UPDATE.measure_timestamp Natural32
+HALRADIO_TEMP_UPDATE.temp_measurement_context MEASUREMENT_CONTEXT_T
+HALRADIO_REG_LOG.address Natural32
+HALRADIO_LOCK_DURATION.duration Natural32s
+HALRADIO_LOCK_DURATION.locked Boolean
+HALRADIO_RADIOLOG_RAMS.buf_start Natural32
+HALRADIO_RADIOLOG_RAMS.buf_end Natural32
+HALRADIO_RADIOLOG_RAMS.buf_size Natural32
+HALRADIO_TX_DPD_NANNY_TRIG.temp_last Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.temp_cur Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.context Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.nanny_bm Natural16s
+HALRADIO_FEM_CONTROL.disable Boolean
+HALRADIO_FEM_CONTROL.ext_lna_enabled Boolean
+HALRADIO_SIGANAL_MIN_MAX.sa_max_positive Natural32s
+HALRADIO_SIGANAL_MIN_MAX.sa_min_negative Natural32s
+HALRADIO_SIGANAL_MIN_MAX.fault_count Natural32
+HALRADIO_SIGANAL_MIN_MAX.total_readings Natural32
+HALRADIO_CHAN_RSSI_PER_CAPTURE.gain_correction_dB Natural16s
+HALRADIO_CHAN_RSSI_PER_CAPTURE.chan_rssi_dBm Decibels
+HALRADIO_STAGE.step Natural32
+HALRADIO_STAGE.duration Natural32s
+MEASUREMENT_CONTEXT_T Enum 01 HALRADIO_TEMP_MEAS_CONTEXT_NANNY 02 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_DCO_PCAL 03 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_TX_POW_PSAT 04 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_TX_CARRIER_LEAKAGE_IMG 06 HALRADIO_TEMP_MEAS_CONTEXT_RADIO_ON 07 HALRADIO_TEMP_MEAS_CONTEXT_RADIO_OFF 08 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_DPD_TRIM
+# Generated From wlanlite/wlanlite_debug.xml
+trace_def 2
+000d 0000 WLANLITE_RX_MAC_FILT 0006 flag mac_add_hi mac_add_mid mac_add_lo current_count bad_crc
+000d 0001 WLANLITE_TX_INTERVAL_DUMP 0002 interval_type intervals
+# Generated From wlanlite/wlanlite_debug.xml
+trace_types 1
+WLANLITE_TX_INTERVAL_DUMP.intervals MBULK
+# Generated From macrame/macrame_station_debug.xml
+trace_def 1
+0039 0000 MACRAME_STATION_UPDATE_RSSI_SNR_AVG 0007 device_addr rssi_raw_sample rssi_adjusted_sample snr_raw_sample rssi_avg snr_avg freq_offset
+# Generated From macrame/macrame_station_debug.xml
+trace_types 7
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.device_addr MAC_Address
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_raw_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_adjusted_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.snr_raw_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_avg Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.snr_avg Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.freq_offset Natural32s
+# Generated From macrame/macrame_radio_debug.xml
+trace_def 18
+002c 0000 MACRAME_RADIOMAC_OFF_DP_OFF_DONE 0003 mac_instance radio_bm radio_state
+002c 0001 MACRAME_RADIOMAC_SWITCH_CHANNEL 0004 vix_bm current_state schdl_pid radiomac_handle
+002c 0002 MACRAME_RADIOMAC_SWITCH_COMPLETED 0003 mac_instance radio_bm new_state
+002c 0003 MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE 0003 mac_instance radio_bm radio_state
+002c 0004 MACRAME_RADIOMAC_SWITCH_OFF 0004 index current_state schdl_pid radiomac_handle
+002c 0005 MACRAME_RADIO_CHANNEL_DESCRIPTION 0005 channel_info primary_channel_freq channel_freq raw_max_air_power regulatory_domain
+002c 0006 MACRAME_RADIO_CONFIG_MODEMS 0003 idx mac_instance modem
+002c 0007 MACRAME_RADIO_CTL_OFF_REQ 0002 radio_bm current_state
+002c 0008 MACRAME_RADIO_CTL_ON_REQ 0003 radio_bm req_rice_state operational_mode
+002c 0009 MACRAME_RADIO_DISABLE_LNA 0002 radio_bm disable
+002c 000a MACRAME_RADIO_DPD_INFO 0005 radio_index dpd_frame_info_index acc num_frames phy_config
+002c 000b MACRAME_RADIO_DPD_REQ 0005 radio_index status rate1 rate2 rate3
+002c 000c MACRAME_RADIO_DPD_SENT_STATUS 0003 radio_bm acc1 Transmission_Status
+002c 000d MACRAME_RADIO_OFF_DONE 0003 mac_instance radio_bm state
+002c 000e MACRAME_RADIO_ON_DONE 0004 mac_instance radio_bm band new_rice_state
+002c 000f MACRAME_RADIO_PROCESSING_OVERHEAD 0001 proc_overhead
+002c 0010 MACRAME_RADIO_REGISTER_MAC_ADDRESS 0002 idx address
+002c 0011 MACRAME_RADIO_SCHED_INTERVAL 0001 interval
+# Generated From macrame/macrame_radio_debug.xml
+trace_types 37
+MACRAME_RADIO_CONFIG_MODEMS.idx Natural8
+MACRAME_RADIO_CONFIG_MODEMS.mac_instance Natural32
+MACRAME_RADIO_CONFIG_MODEMS.modem Natural32
+MACRAME_RADIO_SCHED_INTERVAL.interval Integer32
+MACRAME_RADIO_DPD_REQ.radio_index Natural8
+MACRAME_RADIOMAC_OFF_DP_OFF_DONE.mac_instance Natural32
+MACRAME_RADIOMAC_OFF_DP_OFF_DONE.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_DISABLE_LNA.disable Boolean
+MACRAME_RADIO_DPD_INFO.radio_index Natural8
+MACRAME_RADIO_DPD_INFO.dpd_frame_info_index Natural8
+MACRAME_RADIO_DPD_INFO.acc Natural32
+MACRAME_RADIO_DPD_INFO.phy_config Natural8
+MACRAME_RADIO_CTL_OFF_REQ.current_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_CHANNEL_DESCRIPTION.raw_max_air_power Integer8
+MACRAME_RADIO_CHANNEL_DESCRIPTION.regulatory_domain Natural8
+MACRAME_RADIO_REGISTER_MAC_ADDRESS.idx Natural8
+MACRAME_RADIO_REGISTER_MAC_ADDRESS.address MAC_Address
+MACRAME_RADIO_CTL_ON_REQ.req_rice_state Natural8
+MACRAME_RADIO_CTL_ON_REQ.operational_mode Natural8
+MACRAME_RADIO_ON_DONE.mac_instance Natural32
+MACRAME_RADIO_ON_DONE.band Interger32
+MACRAME_RADIO_ON_DONE.new_rice_state Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.index Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.current_state Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.radiomac_handle Natural8
+MACRAME_RADIO_OFF_DONE.mac_instance Natural32
+MACRAME_RADIO_OFF_DONE.state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_PROCESSING_OVERHEAD.proc_overhead Integer32
+MACRAME_RADIO_DPD_SENT_STATUS.acc1 Natural32
+MACRAME_RADIO_DPD_SENT_STATUS.Transmission_Status Transmission_Status
+MACRAME_RADIOMAC_SWITCH_CHANNEL.vix_bm VIX_BM_T
+MACRAME_RADIOMAC_SWITCH_CHANNEL.current_state Natural8
+MACRAME_RADIOMAC_SWITCH_CHANNEL.radiomac_handle Natural8
+MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE.mac_instance Natural32
+MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIOMAC_SWITCH_COMPLETED.mac_instance Natural32
+MACRAME_RADIOMAC_SWITCH_COMPLETED.new_state RAMERAD_RADIO_STATE_T
+RAMERAD_RADIO_STATE_T Enum 0000 RADIO_OFF 0001 RADIO_ON_CHANNEL_PENDING 0002 RADIO_ON_CHANNEL 0003 RADIO_ON_CHANNEL_RX_ONLY_PENDING 0004 RADIO_ON_CHANNEL_RX_ONLY 0005 RADIO_ON_CHANNEL_RX_ONLY_LP 0006 RADIO_OFF_PENDING 0007 RADIO_ON_CHANNEL_DPD_TRAINING
+# Generated From macrame/macrame_vif_debug.xml
+trace_def 42
+0025 0000 MACRAME_VIF_AP_CHECK_CLEAR 0002 cf_end_owner cts_to_self_owner
+0025 0001 MACRAME_VIF_AP_LPRX_UPDATE 0002 new_use_lp_rx num_frames_queued
+0025 0002 MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME 0003 timer_valid timer_id timer_duration
+0025 0003 MACRAME_VIF_CHECK_CLEAR 0003 queued inhibit pending
+0025 0004 MACRAME_VIF_CHECK_RX_THROUGHPUT 0005 num_bytes duration Tput rx_load_threshold_high rx_load_threshold_low
+0025 0005 MACRAME_VIF_CTS_DURATION 0006 earliest duration cts_self_end current_time desired_wake_time beacon_time
+0025 0006 MACRAME_VIF_CTS_FRAME_PROCESSED_TX_STATUS 0001 tx_status
+0025 0007 MACRAME_VIF_CU_UPDATE 0007 has_updated value bytes_Tx rate_Tx bytes_Rx rate_Rx measurement_time
+0025 0008 MACRAME_VIF_CU_UPDATE_CALL 0002 has_updated sched_vix_bitmap
+0025 0009 MACRAME_VIF_DESCHEDULED 0005 schdl_pid schedulable_vix_bm all_schedulable_vix_bm all_scheduled_vix_bm all_primary_vix_bm
+0025 000a MACRAME_VIF_FTM_TIME_STAMP_ENABLE 0002 ftm_hw_enable mac_instance
+0025 000b MACRAME_VIF_GET_CONCURRENT_NOA_DURATION 0002 concurrent_noa_duration coex_noa_duration
+0025 000c MACRAME_VIF_GET_TRAFFIC_CLASS 0003 num_txrx_packets threshold __LINE__
+0025 000d MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF 0003 host_requested_nss current_prefered_nss currnet_announced_nss
+0025 000e MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1 0004 search_from search_type dw0_start nr_of_entries
+0025 000f MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2 0005 earliest_type start stop nr_nss channel
+0025 0010 MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY 0006 dw0_start current_slot_idx strat_slot_idx stop_slot_idx slots_duration slots_period
+0025 0011 MACRAME_VIF_NAN_NEXT_DW 0004 tsf tsf_time until_next_dw next_dw_start
+0025 0012 MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS 0006 nan_scheduled_for_dw next_dw_start next_beacon_tbtt sched_time sched_end_time duration
+0025 0013 MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY 0007 type nr_nss channel slot_dur period start_offset nr_octets
+0025 0014 MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY_OCTETS 000c octet0 octet1 octet2 octet3 octet4 octet5 octet6 octet7 octet8 octet9 octet10 octet11
+0025 0015 MACRAME_VIF_PAUSE_DPLANE 0005 pause_bitmap queued inhibit pending LINE
+0025 0016 MACRAME_VIF_PAUSE_RESUME_QUEUE_POP 0001 time_of_request
+0025 0017 MACRAME_VIF_PAUSE_RESUME_Q_DISCARD 0004 current_action current_bitmap prev_action prev_bitmap
+0025 0018 MACRAME_VIF_RESUME_DPLANE 0005 resume_bitmap queued inhibit pending LINE
+0025 0019 MACRAME_VIF_RX_FTM_COARSE_FINE_TS 0007 rx_toa_coarse rx_toa_fine ack_tod_coarse ack_tod_fine rx_toc_coarse rx_toc_fine freq_offset
+0025 001a MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY 0006 sbf ebf qbf hbf abb dfe_delay
+0025 001b MACRAME_VIF_RX_FTM_DSP_CFO_CORRECT 0001 ftm_dsp_cfo_correc
+0025 001c MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME 0003 ftm_dsp_start_time ftm_dsp_end_time ftm_dsp_compute_time
+0025 001d MACRAME_VIF_RX_FTM_DSP_STF_SYNC 0001 ftm_dsp_stf_detect_index
+0025 001e MACRAME_VIF_RX_FTM_DSP_TOA_OFF 0001 ftm_dsp_toa_off
+0025 001f MACRAME_VIF_RX_FTM_IQ_INFO 0002 channel_bw num_of_wraps
+0025 0020 MACRAME_VIF_RX_FTM_TOA_AND_TOD 0002 rx_toa ack_tod
+0025 0021 MACRAME_VIF_SCHEDULED 0007 schdl_type schdl_pid schedulable_vix_bm all_scheduled_vix_bm all_primary_vix_bm radio_bm mac_instance
+0025 0022 MACRAME_VIF_SCHEDULE_MISSED 0005 inhibit all_primary_bm all_cur_sched_bm new_start new_end
+0025 0023 MACRAME_VIF_SET_CHANNEL 0008 Channel_Freq Channel_Info Max_Air_Power Max_Air_Power_Type Regulatory_Domain Sched_Flags Sched_Time Sched_Duration
+0025 0024 MACRAME_VIF_SMAPPER_OFF 0000
+0025 0025 MACRAME_VIF_SMAPPER_ON 0000
+0025 0026 MACRAME_VIF_STA_CHECK_CLEAR 0007 vif_is_schedulable sta_flags ps_state extra_listen_reason ps_trigger_timer_type ps_null_owner cts_to_self_owner
+0025 0027 MACRAME_VIF_SW_DONE 0002 schdl_pid sched_vix
+0025 0028 MACRAME_VIF_TRAFFIC_INFO 0003 trafficinfo_trigger_time traffic_class traffic_count
+0025 0029 MACRAME_VIF_UPDATE_NUM_ANTENNA_PREFERENCE 0001 num_antennas
+# Generated From macrame/macrame_vif_debug.xml
+trace_types 111
+MACRAME_VIF_CU_UPDATE.has_updated Boolean
+MACRAME_VIF_CU_UPDATE.value Natural32
+MACRAME_VIF_CU_UPDATE.bytes_Tx Natural32
+MACRAME_VIF_CU_UPDATE.bytes_Rx Natural32
+MACRAME_VIF_CU_UPDATE.measurement_time Natural32
+MACRAME_VIF_AP_LPRX_UPDATE.new_use_lp_rx Boolean
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.current_action SHAREDDATA_VIF_PAUSE_RESUME_ACTION_E
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.current_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.prev_action SHAREDDATA_VIF_PAUSE_RESUME_ACTION_E
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.prev_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_NAN_NEXT_DW.tsf Natural64
+MACRAME_VIF_NAN_NEXT_DW.tsf_time Natural32
+MACRAME_VIF_NAN_NEXT_DW.until_next_dw Natural32
+MACRAME_VIF_NAN_NEXT_DW.next_dw_start Natural32
+MACRAME_VIF_RESUME_DPLANE.resume_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_RESUME_DPLANE.LINE Natural16s
+MACRAME_VIF_RX_FTM_DSP_TOA_OFF.ftm_dsp_toa_off Integer32
+MACRAME_VIF_GET_TRAFFIC_CLASS.num_txrx_packets Natural32
+MACRAME_VIF_GET_TRAFFIC_CLASS.__LINE__ __LINE__
+MACRAME_VIF_RX_FTM_DSP_STF_SYNC.ftm_dsp_stf_detect_index Integer32
+MACRAME_VIF_RX_FTM_IQ_INFO.channel_bw Natural8
+MACRAME_VIF_RX_FTM_IQ_INFO.num_of_wraps Integer16
+MACRAME_VIF_FTM_TIME_STAMP_ENABLE.ftm_hw_enable Boolean
+MACRAME_VIF_FTM_TIME_STAMP_ENABLE.mac_instance Natural32
+MACRAME_VIF_UPDATE_NUM_ANTENNA_PREFERENCE.num_antennas Natural8
+MACRAME_VIF_SCHEDULED.schdl_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_SCHEDULED.schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULED.all_scheduled_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULED.all_primary_vix_bm VIX_BM_T
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.channel Integer16
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.slot_dur Natural32
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.period Natural32
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.start_offset Natural32
+MACRAME_VIF_GET_CONCURRENT_NOA_DURATION.concurrent_noa_duration Natural32
+MACRAME_VIF_GET_CONCURRENT_NOA_DURATION.coex_noa_duration Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.nan_scheduled_for_dw Boolean
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.next_dw_start Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.next_beacon_tbtt Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.sched_time Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.sched_end_time Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.duration Natural32
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_valid Boolean
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_id Natural32
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_duration Natural32
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.sbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.ebf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.qbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.hbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.abb Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.dfe_delay Natural64
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.rx_toa_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.ack_tod_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.rx_toc_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.freq_offset Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.dw0_start Natural32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.strat_slot_idx Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.stop_slot_idx Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.slots_duration Natural32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.slots_period Natural32
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.host_requested_nss Natural8
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.current_prefered_nss Natural8
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.currnet_announced_nss Natural8
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.search_from Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.search_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.dw0_start Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.nr_of_entries Natural8
+MACRAME_VIF_DESCHEDULED.schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_scheduled_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_primary_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.all_primary_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.all_cur_sched_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.new_start Natural32
+MACRAME_VIF_SCHEDULE_MISSED.new_end Natural32
+MACRAME_VIF_TRAFFIC_INFO.trafficinfo_trigger_time Natural32
+MACRAME_VIF_TRAFFIC_INFO.traffic_class Natural8
+MACRAME_VIF_TRAFFIC_INFO.traffic_count Natural32
+MACRAME_VIF_CU_UPDATE_CALL.has_updated Boolean
+MACRAME_VIF_CU_UPDATE_CALL.sched_vix_bitmap VIX_BM_T
+MACRAME_VIF_CHECK_RX_THROUGHPUT.num_bytes Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.duration Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.Tput Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.rx_load_threshold_high Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.rx_load_threshold_low Natural32
+MACRAME_VIF_SET_CHANNEL.Channel_Freq Channel_Frequency
+MACRAME_VIF_SET_CHANNEL.Channel_Info Channel_Information
+MACRAME_VIF_SET_CHANNEL.Max_Air_Power Integer8
+MACRAME_VIF_SET_CHANNEL.Max_Air_Power_Type Air_Power_Type
+MACRAME_VIF_SET_CHANNEL.Regulatory_Domain Regulatory_Domain
+MACRAME_VIF_SET_CHANNEL.Sched_Flags Natural8
+MACRAME_VIF_SET_CHANNEL.Sched_Time Natural32
+MACRAME_VIF_SET_CHANNEL.Sched_Duration Integer32
+MACRAME_VIF_RX_FTM_TOA_AND_TOD.rx_toa Natural64
+MACRAME_VIF_RX_FTM_TOA_AND_TOD.ack_tod Natural64
+MACRAME_VIF_CTS_DURATION.earliest Natural32
+MACRAME_VIF_CTS_DURATION.duration Natural32s
+MACRAME_VIF_CTS_DURATION.cts_self_end Natural32
+MACRAME_VIF_CTS_DURATION.current_time Natural32
+MACRAME_VIF_CTS_DURATION.desired_wake_time Natural32
+MACRAME_VIF_CTS_DURATION.beacon_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_start_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_end_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_compute_time Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.earliest_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.start Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.stop Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.channel Integer16
+MACRAME_VIF_PAUSE_RESUME_QUEUE_POP.time_of_request Natural32
+MACRAME_VIF_RX_FTM_DSP_CFO_CORRECT.ftm_dsp_cfo_correc Integer32
+MACRAME_VIF_PAUSE_DPLANE.pause_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_PAUSE_DPLANE.LINE Natural16s
+PAUSE_RESUME_BITMAP_T Enum 0001 DPLANE_NORMAL_FRAMES 0002 DPLANE_BBM_FRAMES 0003 DPLANE_ALL_FRAMES
+# Generated From macrame/macrame_calibration_debug.xml
+trace_def 12
+0027 0000 MACRAME_CALIB_ABORT 0000
+0027 0001 MACRAME_CALIB_ADJUST 0003 countdown grant_start grant_duration
+0027 0002 MACRAME_CALIB_BT_LO_ACCESS_GRANTED 0001 deadline
+0027 0003 MACRAME_CALIB_DONE 0000
+0027 0004 MACRAME_CALIB_PROCESS_REQ 0004 requested_duration minimum_usable_duration bt_impact wlan_impact
+0027 0005 MACRAME_CALIB_PROCESS_REQ_END 0002 grant_start grant_duration
+0027 0006 MACRAME_CALIB_QUERY 0006 blackout_impact bo_adjusted_start grant_start num_chip_blackouts num_vif_blackouts bt_is_active
+0027 0007 MACRAME_CALIB_REQ 0001 duration
+0027 0008 MACRAME_CALIB_REQ_BT_LO_REQUESTED 0001 cfm_deadline
+0027 0009 MACRAME_CALIB_REQ_DELAYED 0006 grant_start grant_duration minimum_usable_duration bt_impact wlan_impact coex_keep_alive
+0027 000a MACRAME_CALIB_REQ_GRANTED 0001 grant_duration
+0027 000b MACRAME_CALIB_REQ_NOT_GRANTED 0004 requested_duration minimum_usable_duration bt_impact wlan_impact
+# Generated From macrame/macrame_calibration_debug.xml
+trace_types 20
+MACRAME_CALIB_REQ.duration Integer32
+MACRAME_CALIB_ADJUST.countdown Natural32
+MACRAME_CALIB_ADJUST.grant_start Natural32
+MACRAME_CALIB_ADJUST.grant_duration Integer32
+MACRAME_CALIB_PROCESS_REQ_END.grant_start Natural32
+MACRAME_CALIB_PROCESS_REQ_END.grant_duration Integer32
+MACRAME_CALIB_PROCESS_REQ.requested_duration Integer32
+MACRAME_CALIB_PROCESS_REQ.minimum_usable_duration Integer32
+MACRAME_CALIB_REQ_GRANTED.grant_duration Integer32
+MACRAME_CALIB_REQ_BT_LO_REQUESTED.cfm_deadline Natural32
+MACRAME_CALIB_REQ_DELAYED.grant_start Natural32
+MACRAME_CALIB_REQ_DELAYED.grant_duration Integer32
+MACRAME_CALIB_REQ_DELAYED.minimum_usable_duration Integer32
+MACRAME_CALIB_REQ_DELAYED.coex_keep_alive Boolean
+MACRAME_CALIB_BT_LO_ACCESS_GRANTED.deadline Natural32
+MACRAME_CALIB_REQ_NOT_GRANTED.requested_duration Integer32
+MACRAME_CALIB_REQ_NOT_GRANTED.minimum_usable_duration Integer32
+MACRAME_CALIB_QUERY.bo_adjusted_start Natural32
+MACRAME_CALIB_QUERY.grant_start Natural32
+MACRAME_CALIB_QUERY.bt_is_active Boolean
+# Generated From macrame/macrame_tx_debug.xml
+trace_def 14
+0029 0000 MACRAME_SEND_FRAME_FROM_QUEUE 0001 frame
+0029 0001 MACRAME_SEND_FRAME_FROM_QUEUE_CTW 0002 frame ecw_max
+0029 0002 MACRAME_TX_ADD_FRAME_TO_QUEUE 0002 frame dwell_time
+0029 0003 MACRAME_TX_CANCEL_FRAME_IN_QUEUE 0002 control_tag_mask control_tag_include
+0029 0004 MACRAME_TX_DISCARD 0002 frame_type src_pid
+0029 0005 MACRAME_TX_DISCARD_ENTRY_FROM_QUEUE 0001 frame
+0029 0006 MACRAME_TX_FAIL 0004 frame src_pid reason tag
+0029 0007 MACRAME_TX_MM_REQUEST 0003 mm_frame_fcs queue_size queue_fcs
+0029 0008 MACRAME_TX_QUEUE_AND_SEND 0001 __LINE__
+0029 0009 MACRAME_TX_QUEUE_AND_SEND_FRAME 0002 frame dwell_time
+0029 000a MACRAME_TX_QUEUE_AND_SEND_NEW_FRAME 0002 frame flags
+0029 000b MACRAME_TX_SEND_CTS_TO_SELF 0000
+0029 000c MACRAME_TX_SEND_QUEUED_FRAMES 0000
+0029 000d MACRAME_TX_TEAR_DOWN_QUEUE 0000
+# Generated From macrame/macrame_tx_debug.xml
+trace_types 17
+MACRAME_TX_CANCEL_FRAME_IN_QUEUE.control_tag_mask Natural64
+MACRAME_TX_CANCEL_FRAME_IN_QUEUE.control_tag_include Natural64
+MACRAME_TX_MM_REQUEST.queue_size Natural32
+MACRAME_TX_MM_REQUEST.queue_fcs Natural32
+MACRAME_SEND_FRAME_FROM_QUEUE_CTW.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_NEW_FRAME.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_FRAME.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_FRAME.dwell_time Natural32s
+MACRAME_TX_FAIL.frame MBULK
+MACRAME_TX_FAIL.src_pid FsmProcessId
+MACRAME_TX_FAIL.reason RAME_TX_FAIL_REASONS_T
+MACRAME_TX_FAIL.tag Natural64
+MACRAME_TX_ADD_FRAME_TO_QUEUE.frame MBULK
+MACRAME_TX_ADD_FRAME_TO_QUEUE.dwell_time Natural32s
+MACRAME_SEND_FRAME_FROM_QUEUE.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND.__LINE__ __LINE__
+MACRAME_TX_DISCARD_ENTRY_FROM_QUEUE.frame MBULK
+RAME_TX_FAIL Enum 0 NULL_FRAME 1 CANT_OWN_FRAME 2 NULL_STA 3 NOT_CONNETED_UNICAST
+# Generated From macrame/macrame_beacon/macrame_beacon_debug.xml
+trace_def 31
+0024 0000 MACRAME_BEACON_DEREGISTER_TRACKING 0001 __LINE__
+0024 0001 MACRAME_BEACON_DRIFT 0004 go_drift tbtt_diff target_separation beacon_period
+0024 0002 MACRAME_BEACON_DRIFT_INPUT_GO 0004 go_tbtt go_tbtt_time go_tsf go_tsf_time
+0024 0003 MACRAME_BEACON_DRIFT_INPUT_STA 0004 sta_tbtt sta_tbtt_time sta_tsf sta_tsf_time
+0024 0004 MACRAME_BEACON_DTIM_COUNT 0005 tsf beacon_period dtim_period dtim_count time_till_next_dtim
+0024 0005 MACRAME_BEACON_INIT_TBTT 0003 period_us tbtt_time tbtt_tsf
+0024 0006 MACRAME_BEACON_LOAD 0002 frame __LINE__
+0024 0007 MACRAME_BEACON_MISSED1 0003 inhibit all_primary_bm all_curr_sched_bm
+0024 0008 MACRAME_BEACON_MISSED2 0005 listen_start listen_end sched_type received expected
+0024 0009 MACRAME_BEACON_REGISTER_TRACKING 0004 pid start_time end_time __LINE__
+0024 000a MACRAME_BEACON_RX 0006 tsf mac_rx_time tsf_rx_time received period seq_no
+0024 000b MACRAME_BEACON_RX_DISCARD 0001 beacon_period
+0024 000c MACRAME_BEACON_RX_EXTRA 0006 tbtt_bss tbtt_offset timestamp_offset acc_mod_opts fc processing_delay
+0024 000d MACRAME_BEACON_RX_HANDLER 0008 rssi rssi_valid inhibit all_primary_bm all_curr_sched_bm sched_type source_addr seq_no
+0024 000e MACRAME_BEACON_RX_HASH_CHANGED 0004 frame new_hash frame_length offset
+0024 000f MACRAME_BEACON_RX_NAN 0004 tsf mac_rx_time period seq_no
+0024 0010 MACRAME_BEACON_RX_NEXT_WINDOW 0004 pid start_time end_time __LINE__
+0024 0011 MACRAME_BEACON_RX_NOPHY 0003 tsf tsf_invalid_count period
+0024 0012 MACRAME_BEACON_RX_PROBE_RSP_A 0005 tsf mac_rx_time received period seq_no
+0024 0013 MACRAME_BEACON_RX_PROBE_RSP_B 0004 tbtt_bss tbtt_offset acc_mod_opts fc
+0024 0014 MACRAME_BEACON_RX_SCHED 0003 start end sched_duration
+0024 0015 MACRAME_BEACON_RX_SKIP 0003 skip dtim_count dtim_period
+0024 0016 MACRAME_BEACON_RX_TRACK 0005 offset min max holdoff total_duration
+0024 0017 MACRAME_BEACON_TSF_SYNC 0002 tsf tsf_systime
+0024 0018 MACRAME_BEACON_TX_AP 000a frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline tim_pvb mcast_frames_count pump_multicast ecsa_count quiet_count txflags_ex
+0024 0019 MACRAME_BEACON_TX_AP_HANDLER 0004 tsf_tbtt current_time sys_time_tbtt next_ap_handler_time
+0024 001a MACRAME_BEACON_TX_FINISHED 0007 tbtt_time last_success_systime tx_successful acc_mod_opts seq_no missed_since_last_tx missed_total
+0024 001b MACRAME_BEACON_TX_NAN_DISCOVERY 0004 frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline
+0024 001c MACRAME_BEACON_TX_NAN_SYNC 0004 frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline
+0024 001d MACRAME_PROBEREQ_RX_HANDLER 0004 inhibit all_primary_bm all_curr_sched_bm sched_type
+0024 001e MACRAME_PROBERESP_RX_HANDLER 0007 rssi rssi_valid inhibit all_primary_bm all_curr_sched_bm sched_type seq_no
+# Generated From macrame/macrame_beacon/macrame_beacon_debug.xml
+trace_types 100
+MACRAME_BEACON_TX_AP.frame MBULK
+MACRAME_BEACON_TX_AP.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_AP.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_AP.tx_sw_deadline Natural32
+MACRAME_BEACON_TX_AP.tim_pvb Natural8
+MACRAME_BEACON_TX_AP.pump_multicast Boolean
+MACRAME_BEACON_TX_AP.ecsa_count Natural8
+MACRAME_BEACON_TX_AP.quiet_count Natural8
+MACRAME_BEACON_RX_PROBE_RSP_A.tsf Natural64
+MACRAME_BEACON_RX_PROBE_RSP_A.mac_rx_time Natural32
+MACRAME_BEACON_RX_PROBE_RSP_A.received Natural32
+MACRAME_BEACON_MISSED2.listen_start Natural32
+MACRAME_BEACON_MISSED2.listen_end Natural32
+MACRAME_BEACON_MISSED2.received Natural32
+MACRAME_BEACON_MISSED2.expected Natural32
+MACRAME_BEACON_TX_NAN_SYNC.frame MBULK
+MACRAME_BEACON_TX_NAN_SYNC.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_NAN_SYNC.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_NAN_SYNC.tx_sw_deadline Natural32
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tbtt Natural64
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tbtt_time Natural32
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tsf_time Natural32
+MACRAME_BEACON_RX_HANDLER.rssi Decibels
+MACRAME_BEACON_RX_HANDLER.rssi_valid Boolean
+MACRAME_BEACON_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_BEACON_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_RX_HANDLER.source_addr MAC_Address
+MACRAME_BEACON_DEREGISTER_TRACKING.__LINE__ __LINE__
+MACRAME_BEACON_MISSED1.all_primary_bm VIX_BM_T
+MACRAME_BEACON_MISSED1.all_curr_sched_bm VIX_BM_T
+MACRAME_PROBERESP_RX_HANDLER.rssi Decibels
+MACRAME_PROBERESP_RX_HANDLER.rssi_valid Boolean
+MACRAME_PROBERESP_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_PROBERESP_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_RX_EXTRA.tbtt_bss Natural64
+MACRAME_BEACON_RX_EXTRA.tbtt_offset Natural32s
+MACRAME_BEACON_RX_EXTRA.acc_mod_opts Natural32
+MACRAME_BEACON_RX_EXTRA.processing_delay Natural32
+MACRAME_BEACON_RX_NAN.tsf Natural64
+MACRAME_BEACON_RX_NAN.mac_rx_time Natural32
+MACRAME_BEACON_TSF_SYNC.tsf Natural64
+MACRAME_BEACON_TSF_SYNC.tsf_systime Natural32
+MACRAME_BEACON_LOAD.frame MBULK
+MACRAME_BEACON_LOAD.__LINE__ __LINE__
+MACRAME_BEACON_DTIM_COUNT.tsf Natural64
+MACRAME_BEACON_DTIM_COUNT.beacon_period Natural32
+MACRAME_BEACON_DTIM_COUNT.dtim_count Natural32
+MACRAME_BEACON_DTIM_COUNT.time_till_next_dtim Natural32
+MACRAME_BEACON_RX_HASH_CHANGED.frame MBULK
+MACRAME_BEACON_RX_HASH_CHANGED.new_hash Natural32
+MACRAME_BEACON_RX_HASH_CHANGED.frame_length Integer16
+MACRAME_BEACON_RX_HASH_CHANGED.offset Natural8
+MACRAME_BEACON_RX_SCHED.start Natural32
+MACRAME_BEACON_RX_SCHED.end Natural32
+MACRAME_BEACON_RX_SCHED.sched_duration Natural32
+MACRAME_BEACON_RX_PROBE_RSP_B.tbtt_bss Natural64
+MACRAME_BEACON_RX_PROBE_RSP_B.tbtt_offset Natural32s
+MACRAME_BEACON_RX_PROBE_RSP_B.acc_mod_opts Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.frame MBULK
+MACRAME_BEACON_TX_NAN_DISCOVERY.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.tx_sw_deadline Natural32
+MACRAME_PROBEREQ_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_PROBEREQ_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_DRIFT.go_drift Natural32
+MACRAME_BEACON_DRIFT.tbtt_diff Natural32s
+MACRAME_BEACON_DRIFT.target_separation Natural32s
+MACRAME_BEACON_DRIFT.beacon_period Natural32
+MACRAME_BEACON_TX_AP_HANDLER.tsf_tbtt Natural64
+MACRAME_BEACON_TX_AP_HANDLER.current_time Natural32
+MACRAME_BEACON_TX_AP_HANDLER.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_AP_HANDLER.next_ap_handler_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.start_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.end_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.__LINE__ __LINE__
+MACRAME_BEACON_RX_TRACK.offset Natural32
+MACRAME_BEACON_RX_TRACK.min Natural32
+MACRAME_BEACON_RX_TRACK.max Natural32
+MACRAME_BEACON_RX.tsf Natural64
+MACRAME_BEACON_RX.mac_rx_time Natural32
+MACRAME_BEACON_RX.tsf_rx_time Natural32
+MACRAME_BEACON_RX.received Natural32
+MACRAME_BEACON_INIT_TBTT.period_us Natural32
+MACRAME_BEACON_INIT_TBTT.tbtt_time Natural32
+MACRAME_BEACON_INIT_TBTT.tbtt_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tbtt Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tbtt_time Natural32
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tsf_time Natural32
+MACRAME_BEACON_RX_NOPHY.tsf Natural64
+MACRAME_BEACON_RX_NOPHY.tsf_invalid_count Natural32
+MACRAME_BEACON_REGISTER_TRACKING.start_time Natural32
+MACRAME_BEACON_REGISTER_TRACKING.end_time Natural32
+MACRAME_BEACON_REGISTER_TRACKING.__LINE__ __LINE__
+MACRAME_BEACON_TX_FINISHED.tbtt_time Natural32
+MACRAME_BEACON_TX_FINISHED.last_success_systime Natural32
+MACRAME_BEACON_TX_FINISHED.tx_successful Boolean
+MACRAME_BEACON_TX_FINISHED.acc_mod_opts Natural32
+MACRAME_BEACON_TX_FINISHED.missed_total Natural32
+# Generated From macrame/macrame_idle/macrame_idle_ap/macrame_idle_ap_debug.xml
+trace_def 5
+0033 0000 MACRAME_IDLE_AP_CHECK_NOT_POSSIBLE 0001 id
+0033 0001 MACRAME_IDLE_AP_CHECK_POSSIBLE 0001 __LINE__
+0033 0002 MACRAME_IDLE_AP_LITE_EVALUATE 0001 permit
+0033 0003 MACRAME_IDLE_AP_MIFLESS_EVALUATE 0001 permit
+0033 0004 MACRAME_IDLE_AP_OFF_IND 0001 rame_idle_ap_state
+# Generated From macrame/macrame_idle/macrame_idle_ap/macrame_idle_ap_debug.xml
+trace_types 5
+MACRAME_IDLE_AP_CHECK_NOT_POSSIBLE.id Natural8
+MACRAME_IDLE_AP_LITE_EVALUATE.permit Natural8
+MACRAME_IDLE_AP_OFF_IND.rame_idle_ap_state Natural8
+MACRAME_IDLE_AP_CHECK_POSSIBLE.__LINE__ __LINE__
+MACRAME_IDLE_AP_MIFLESS_EVALUATE.permit Natural8
+# Generated From macrame/macrame_idle/macrame_idle_sta/macrame_idle_sta_debug.xml
+trace_def 2
+004c 0000 MACRAME_IDLE_STA_CHECK 0001 __LINE__
+004c 0001 MACRAME_IDLE_STA_EVALUATE 0001 permit
+# Generated From macrame/macrame_idle/macrame_idle_sta/macrame_idle_sta_debug.xml
+trace_types 2
+MACRAME_IDLE_STA_EVALUATE.permit Natural8
+MACRAME_IDLE_STA_CHECK.__LINE__ __LINE__
+# Generated From macrame/macrame_api/macrame_api_mlme_debug.xml
+trace_def 70
+0032 0000 MACRAME_API_MLME_ADJUST_TX_POWER 0001 tx_power
+0032 0001 MACRAME_API_MLME_ALLOW_ALL_BEACONS_REQUEST 0001 allow
+0032 0002 MACRAME_API_MLME_BA_ADD_REQUEST 0007 peer_qsta_address user_priority direction buf_size block_ack_timeout starting_sequence_number amsdu_permitted
+0032 0003 MACRAME_API_MLME_BA_DELETE_REQUEST 0004 sta_mac user_priority direction send_cfm
+0032 0004 MACRAME_API_MLME_BEACON_DEREGISTER_TRACKING_REQUEST 0000
+0032 0005 MACRAME_API_MLME_BEACON_REGISTER_TRACKING_REQUEST 0001 source_pid
+0032 0006 MACRAME_API_MLME_BLACKOUT_ADD_REQUEST 0008 blackout_id type source start_ref period duration count flags
+0032 0007 MACRAME_API_MLME_BLACKOUT_DELETE_REQUEST 0002 blackout_id type
+0032 0008 MACRAME_API_MLME_CHANNEL_BUSY 0004 time_ref mac_busy mac_busy_ref busy_percentage
+0032 0009 MACRAME_API_MLME_CONFIG_QUEUE_REQUEST 0006 queue_index acm aifs ecwmin ecwmax txop_limit
+0032 000a MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST 0005 rssi_low_threshold rssi_high_threshold rssi_cu_low_threshold rssi_cu_high_threshold result_code
+0032 000b MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_DEL_REQUEST 0001 result_code
+0032 000c MACRAME_API_MLME_CTW_CONFIG_REQUEST 0001 ctw
+0032 000d MACRAME_API_MLME_DELETE_KEY 0004 latest_key_only key_type sta_mac __LINE__
+0032 000e MACRAME_API_MLME_DWELLTIME_RESET_REQUEST 0000
+0032 000f MACRAME_API_MLME_EVENT_INDICATION 0001 event_id
+0032 0010 MACRAME_API_MLME_GET_KEY_REQUEST 0002 key_id key_type
+0032 0011 MACRAME_API_MLME_GET_RSSI 0002 rssi result
+0032 0012 MACRAME_API_MLME_HOST_SUSPEND_RESUME_INDICATION 0000
+0032 0013 MACRAME_API_MLME_KEY_FIND 0001 address
+0032 0014 MACRAME_API_MLME_MONITOR_RSSI 0003 low_threshold high_threshold enabled
+0032 0015 MACRAME_API_MLME_NAN_CLUSTER_CONFIG 0003 cluster_id beacon_timestamp_l beacon_receive_time
+0032 0016 MACRAME_API_MLME_NAN_SET_DISCOVERY_BEACON 0001 frame
+0032 0017 MACRAME_API_MLME_NAN_SET_SYNC_BEACON 0001 frame
+0032 0018 MACRAME_API_MLME_NOA_ADD_INDICATION 0006 blackout_id start_ref period duration count flags
+0032 0019 MACRAME_API_MLME_NOA_DELETE_INDICATION 0001 blackout_id
+0032 001a MACRAME_API_MLME_SCAN_DONE_INDICATION 0000
+0032 001b MACRAME_API_MLME_SCAN_START_INDICATION 0000
+0032 001c MACRAME_API_MLME_SCREEN_UPDATE 0000
+0032 001d MACRAME_API_MLME_SCREEN_UPDATE_FSM 0000
+0032 001e MACRAME_API_MLME_SET_AC_MEDIUM_TIME 0003 user_priority medium_time result_code
+0032 001f MACRAME_API_MLME_SET_BSS_REQUEST_AP 0004 vif_type bssid beacon_period dtim_period
+0032 0020 MACRAME_API_MLME_SET_BSS_REQUEST_STATION 0002 vif_type bssid
+0032 0021 MACRAME_API_MLME_SET_GROUP_MANAGEMENT_INFO 0000
+0032 0022 MACRAME_API_MLME_SET_KEY 0004 key_id key_type address cipher_suite_selector
+0032 0023 MACRAME_API_MLME_SET_PACKET_FILTER 0005 pid filter_id num_desc packet_filter_mode result_code
+0032 0024 MACRAME_API_MLME_SET_POWERMGT_REQUEST 0001 mode
+0032 0025 MACRAME_API_MLME_SET_RADIO_MULTIPLEXING 0001 mplex
+0032 0026 MACRAME_API_MLME_SET_SHORT_SLOT_TIME_REQUEST 0001 short_time
+0032 0027 MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST 0004 address frame_type frame_subtype scope
+0032 0028 MACRAME_API_MLME_STA_CLEAR 0001 address
+0032 0029 MACRAME_API_MLME_STA_CONNECT_DONE_INDICATION 0000
+0032 002a MACRAME_API_MLME_STA_CONNECT_START_INDICATION 0000
+0032 002b MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST 0002 sta_mac status
+0032 002c MACRAME_API_MLME_STA_DHCP_ACK_INDICATION 0000
+0032 002d MACRAME_API_MLME_STA_DHCP_DISCOVER_INDICATION 0000
+0032 002e MACRAME_API_MLME_STA_DHCP_DONE_INDICATION 0000
+0032 002f MACRAME_API_MLME_STA_DHCP_OFFER_INDICATION 0000
+0032 0030 MACRAME_API_MLME_STA_DHCP_REQUEST_INDICATION 0000
+0032 0031 MACRAME_API_MLME_STA_DHCP_START_INDICATION 0000
+0032 0032 MACRAME_API_MLME_STA_EAPOL_DONE_INDICATION 0000
+0032 0033 MACRAME_API_MLME_STA_EAPOL_START_INDICATION 0000
+0032 0034 MACRAME_API_MLME_STA_GET_LAST_ACTIVITY 0003 address last_activity_time result
+0032 0035 MACRAME_API_MLME_STA_GET_LAST_TRANSMIT 0003 address last_transmit_time result
+0032 0036 MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED 0003 address last_transmit_time result
+0032 0037 MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY 0003 address last_unicast_activity_time result
+0032 0038 MACRAME_API_MLME_STA_INIT 0002 station_addr tdls_peer
+0032 0039 MACRAME_API_MLME_STA_RESET_RATES 0001 peer_addr
+0032 003a MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM 0003 address direction result_code
+0032 003b MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST 0002 enable ttp
+0032 003c MACRAME_API_MLME_TX_FRAME_REQUEST 0007 frame flags pri control_tag dwell_time tx_lifetime fc
+0032 003d MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST 0003 frame_type frame_subtype scope
+0032 003e MACRAME_API_MLME_VIF_CREATE_INIT 0000
+0032 003f MACRAME_API_MLME_VIF_DEREGISTER_REQUEST 0000
+0032 0040 MACRAME_API_MLME_VIF_DESCHEDULE_REQUEST 0000
+0032 0041 MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE 0003 desired_nss current_num_antennas new_num_antennas
+0032 0042 MACRAME_API_MLME_VIF_PROTECTION_CONFIG_REQUEST 0000
+0032 0043 MACRAME_API_MLME_VIF_SCHEDULE_UPDATE_INDICATION 0000
+0032 0044 MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST 0009 channel_freq channel_info max_air_power air_pwr_type regulatory_domain flags sched_time duration num_antennas_expected
+0032 0045 MACRAME_MLME_ATTEMPT_DTIM_LISTEN 0001 enable
+# Generated From macrame/macrame_api/macrame_api_mlme_debug.xml
+trace_types 110
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.address MAC_Address
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.frame_type MLME_FRAME_TYPE
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.frame_subtype Natural8
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.scope Natural8
+MACRAME_API_MLME_BLACKOUT_DELETE_REQUEST.type BLACKOUT_TYPE
+MACRAME_API_MLME_MONITOR_RSSI.low_threshold Integer16
+MACRAME_API_MLME_MONITOR_RSSI.high_threshold Integer16
+MACRAME_API_MLME_MONITOR_RSSI.enabled Boolean
+MACRAME_API_MLME_TX_FRAME_REQUEST.frame MBULK
+MACRAME_API_MLME_TX_FRAME_REQUEST.pri PRIORITY
+MACRAME_API_MLME_TX_FRAME_REQUEST.control_tag Natural64
+MACRAME_API_MLME_TX_FRAME_REQUEST.dwell_time Natural32
+MACRAME_API_MLME_TX_FRAME_REQUEST.tx_lifetime Natural32
+MACRAME_API_MLME_SET_AC_MEDIUM_TIME.user_priority PRIORITY
+MACRAME_API_MLME_SET_AC_MEDIUM_TIME.result_code RESULT_CODE
+MACRAME_API_MLME_SET_BSS_REQUEST_AP.vif_type VIF_TYPE
+MACRAME_API_MLME_SET_BSS_REQUEST_AP.bssid MAC_Address
+MACRAME_API_MLME_BA_ADD_REQUEST.peer_qsta_address MAC_Address
+MACRAME_API_MLME_BA_ADD_REQUEST.user_priority PRIORITY
+MACRAME_API_MLME_BA_ADD_REQUEST.direction DIRECTION
+MACRAME_API_MLME_BA_ADD_REQUEST.block_ack_timeout TIME_UNITS
+MACRAME_API_MLME_BA_ADD_REQUEST.amsdu_permitted Boolean
+MACRAME_API_MLME_SET_BSS_REQUEST_STATION.vif_type VIF_TYPE
+MACRAME_API_MLME_SET_BSS_REQUEST_STATION.bssid MAC_Address
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.type BLACKOUT_TYPE
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.source BLACKOUT_SOURCE
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.start_ref Natural32
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.period Natural32
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.duration Natural32
+MACRAME_MLME_ATTEMPT_DTIM_LISTEN.enable Boolean
+MACRAME_API_MLME_GET_RSSI.rssi Integer16
+MACRAME_API_MLME_GET_RSSI.result Boolean
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.last_unicast_activity_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.result Boolean
+MACRAME_API_MLME_STA_INIT.station_addr MAC_Address
+MACRAME_API_MLME_STA_INIT.tdls_peer Boolean
+MACRAME_API_MLME_DELETE_KEY.latest_key_only Boolean
+MACRAME_API_MLME_DELETE_KEY.key_type KEY_TYPE
+MACRAME_API_MLME_DELETE_KEY.sta_mac MAC_Address
+MACRAME_API_MLME_DELETE_KEY.__LINE__ __LINE__
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.frame_type Natural8
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.frame_subtype Natural8
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.scope Natural8
+MACRAME_API_MLME_SET_SHORT_SLOT_TIME_REQUEST.short_time Boolean
+MACRAME_API_MLME_SET_KEY.key_type Key_Type
+MACRAME_API_MLME_SET_KEY.address MAC_Address
+MACRAME_API_MLME_SET_KEY.cipher_suite_selector Natural32
+MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST.sta_mac MAC_Address
+MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST.status CONNECTION_STATUS
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.desired_nss Natural8
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.current_num_antennas Natural8
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.new_num_antennas Natural8
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.last_activity_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.result Boolean
+MACRAME_API_MLME_BA_DELETE_REQUEST.sta_mac MAC_Address
+MACRAME_API_MLME_BA_DELETE_REQUEST.user_priority PRIORITY
+MACRAME_API_MLME_BA_DELETE_REQUEST.direction DIRECTION
+MACRAME_API_MLME_BA_DELETE_REQUEST.send_cfm Boolean
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_low_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_high_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_cu_low_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_cu_high_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.result_code RESULT_CODE
+MACRAME_API_MLME_NAN_SET_SYNC_BEACON.frame MBULK
+MACRAME_API_MLME_NAN_SET_DISCOVERY_BEACON.frame MBULK
+MACRAME_API_MLME_STA_CLEAR.address MAC_Address
+MACRAME_API_MLME_NOA_ADD_INDICATION.start_ref Natural32
+MACRAME_API_MLME_NOA_ADD_INDICATION.period Natural32
+MACRAME_API_MLME_NOA_ADD_INDICATION.duration Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.last_transmit_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.result Boolean
+MACRAME_API_MLME_GET_KEY_REQUEST.key_type KEY_TYPE
+MACRAME_API_MLME_SET_POWERMGT_REQUEST.mode POWER_MANAGEMENT_MODE
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.cluster_id MAC_Address
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.beacon_timestamp_l Natural32
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.beacon_receive_time Natural32
+MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST.enable Boolean
+MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST.ttp Natural32
+MACRAME_API_MLME_SET_RADIO_MULTIPLEXING.mplex Natural32
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_DEL_REQUEST.result_code RESULT_CODE
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.channel_freq CHANNEL_FREQUENCY
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.channel_info CHANNEL_INFORMATION
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.max_air_power Integer16
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.air_pwr_type CHANNEL_INFORMATION
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.regulatory_domain REGULATORY_DOMAIN
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.flags Natural8
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.sched_time Natural32
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.duration Integer32
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.num_antennas_expected Natural8
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.address MAC_Address
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.direction DIRECTION
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.result_code RESULT_CODE
+MACRAME_API_MLME_STA_RESET_RATES.peer_addr MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.last_transmit_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.result Boolean
+MACRAME_API_MLME_SET_PACKET_FILTER.pid FsmProcessId
+MACRAME_API_MLME_SET_PACKET_FILTER.packet_filter_mode PACKET_FILTER_MODE
+MACRAME_API_MLME_SET_PACKET_FILTER.result_code RESULT_CODE
+MACRAME_API_MLME_KEY_FIND.address MAC_Address
+MACRAME_API_MLME_CONFIG_QUEUE_REQUEST.acm Boolean
+MACRAME_API_MLME_BEACON_REGISTER_TRACKING_REQUEST.source_pid FsmProcessId
+MACRAME_API_MLME_ALLOW_ALL_BEACONS_REQUEST.allow Boolean
+MACRAME_API_MLME_CHANNEL_BUSY.time_ref Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.mac_busy Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.mac_busy_ref Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.busy_percentage Natural32
+# Generated From macrame/macrame_api/macrame_api_coex_debug.xml
+trace_def 22
+002a 0000 MACRAME_API_COEX_BLACKOUT_ATTACH 0002 handle vix_bitmap
+002a 0001 MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED 0002 handle vix_bitmap_applied
+002a 0002 MACRAME_API_COEX_BLACKOUT_CREATE 0004 period duration start_time req_flags
+002a 0003 MACRAME_API_COEX_BLACKOUT_DESTROY 0001 handle
+002a 0004 MACRAME_API_COEX_BLACKOUT_DETACH 0002 handle vix_bitmap
+002a 0005 MACRAME_API_COEX_BLACKOUT_MASK 0002 handle vix_bitmap
+002a 0006 MACRAME_API_COEX_BLACKOUT_UNMASK 0002 handle vix_bitmap
+002a 0007 MACRAME_API_COEX_BLACKOUT_UPDATE 0005 handle period duration start_time req_flags
+002a 0008 MACRAME_API_COEX_FORCE_MIN_TX_RATE 0002 vix_bitmap rate
+002a 0009 MACRAME_API_COEX_GET_SCHEULABLE_VIX_BITMAP 0000
+002a 000a MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT 0003 noa_duration prev_noa_duration __LINE__
+002a 000b MACRAME_API_COEX_PS_FORCE_ACTIVE 0001 vix_bitmap
+002a 000c MACRAME_API_COEX_PS_RESTORE 0001 vix_bitmap
+002a 000d MACRAME_API_COEX_RESTORE_MAX_CLEAR_TIMEOUT 0001 vix_bitmap
+002a 000e MACRAME_API_COEX_RESTORE_MIN_TX_RATE 0001 vix_bitmap
+002a 000f MACRAME_API_COEX_RESTRICT_WLAN 0004 restrict_start restrict_duration is_scheduled eol_extension
+002a 0010 MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT 0002 vix_bitmap timeout
+002a 0011 MACRAME_API_COEX_SET_TX_PRIORITY 0001 coex_priority
+002a 0012 MACRAME_API_COEX_VIF_GET_CLEAR_TIME 0000
+002a 0013 MACRAME_API_COEX_VIF_GET_NEXT_DTIM_TIME 0000
+002a 0014 MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS 0002 vix_bitmap wake_up
+002a 0015 MACRAME_API_USPBO_CONFIG 0006 flags cts_tx_lifetime cts_backoff_time cts_duration rx_period rx_duration
+# Generated From macrame/macrame_api/macrame_api_coex_debug.xml
+trace_types 40
+MACRAME_API_COEX_BLACKOUT_ATTACH.handle Natural32
+MACRAME_API_COEX_BLACKOUT_ATTACH.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_MASK.handle Natural32
+MACRAME_API_COEX_BLACKOUT_MASK.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_UPDATE.handle Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.period Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.duration Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.start_time Natural32
+MACRAME_API_COEX_PS_FORCE_ACTIVE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_DESTROY.handle Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.period Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.duration Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.start_time Natural32
+MACRAME_API_COEX_FORCE_MIN_TX_RATE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT.timeout Integer32
+MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED.handle Natural32
+MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED.vix_bitmap_applied VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_UNMASK.handle Natural32
+MACRAME_API_COEX_BLACKOUT_UNMASK.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_TX_PRIORITY.coex_priority Natural8
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.noa_duration Natural32
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.prev_noa_duration Natural32
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.__LINE__ __LINE__
+MACRAME_API_COEX_RESTORE_MAX_CLEAR_TIMEOUT.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_DETACH.handle Natural32
+MACRAME_API_COEX_BLACKOUT_DETACH.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_PS_RESTORE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_RESTRICT_WLAN.restrict_start Natural32
+MACRAME_API_COEX_RESTRICT_WLAN.restrict_duration Integer32
+MACRAME_API_COEX_RESTRICT_WLAN.is_scheduled Boolean
+MACRAME_API_COEX_RESTRICT_WLAN.eol_extension Integer32
+MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS.wake_up Boolean
+MACRAME_API_COEX_RESTORE_MIN_TX_RATE.vix_bitmap VIX_BM_T
+MACRAME_API_USPBO_CONFIG.cts_tx_lifetime Integer32
+MACRAME_API_USPBO_CONFIG.cts_backoff_time Integer32
+MACRAME_API_USPBO_CONFIG.cts_duration Integer32
+MACRAME_API_USPBO_CONFIG.rx_period Integer32
+MACRAME_API_USPBO_CONFIG.rx_duration Integer32
+# Generated From macrame/macrame_api/macrame_api_dplane_debug.xml
+trace_def 35
+0011 0000 MACRAME_API_DPLANE_BA_ERROR_IND 0004 sta_mac prio direction reason
+0011 0001 MACRAME_API_DPLANE_BA_TX_ERROR_IND 0002 start_seq_nr sta_mac
+0011 0002 MACRAME_API_DPLANE_BEACON_TX_FINISHED_IND 0002 seq_nr txstatus
+0011 0003 MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND 0002 frame txstatus
+0011 0004 MACRAME_API_DPLANE_DELBA_CFM 0000
+0011 0005 MACRAME_API_DPLANE_DPD_FRAME_SENT_IND 0002 frame txstatus
+0011 0006 MACRAME_API_DPLANE_FRAME_RX_IND 0001 frame
+0011 0007 MACRAME_API_DPLANE_GET_SHED_PRIMARY_VIX 0002 mac_instance vix_bm
+0011 0008 MACRAME_API_DPLANE_MATCHED_FILTER_IND 0005 frame dest_pid filter_id packet_filter_mode mac_hdr_len
+0011 0009 MACRAME_API_DPLANE_MCAST_SERVICE_END_IND 0000
+0011 000a MACRAME_API_DPLANE_MGMT_TX_CFM 0006 frame pid txstatus retrys host_tag control_tag
+0011 000b MACRAME_API_DPLANE_MIC_FAILURE_IND 0001 frame
+0011 000c MACRAME_API_DPLANE_MM_CFM 0004 source_pid txstatus control_tag receiver_address
+0011 000d MACRAME_API_DPLANE_NAN_SDF_CALLBACK 0001 txstatus
+0011 000e MACRAME_API_DPLANE_NULL_ANNOUNCE_FRAME_PROCESSED_IND 0002 seq_nr txstatus
+0011 000f MACRAME_API_DPLANE_PAUSE_RESUME_CFM 0000
+0011 0010 MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND 0002 sta_addr power_save
+0011 0011 MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND 0002 frame txstatus
+0011 0012 MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND 0002 frame txstatus
+0011 0013 MACRAME_API_DPLANE_PS_SERVICE_END_IND 0001 moredata
+0011 0014 MACRAME_API_DPLANE_PS_SERVICE_TRIGGERED_IND 0000
+0011 0015 MACRAME_API_DPLANE_PS_UPDATE_IND 0002 vif_is_sta sta_ps_state
+0011 0016 MACRAME_API_DPLANE_RX_ACTIVITY_OCCURED_IND 0002 mac_instance vix
+0011 0017 MACRAME_API_DPLANE_SEND_NULL_FRAME_IND 0000
+0011 0018 MACRAME_API_DPLANE_SPURIOUS_MOREBIT_IND 0000
+0011 0019 MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND 0002 frame txstatus
+0011 001a MACRAME_API_DPLANE_TDLS_PEER_PS_UPDATE_IND 0002 sta_mac tdls_ps_state
+0011 001b MACRAME_API_DPLANE_TDLS_PEER_SP_IND 0002 sta_mac du_bm
+0011 001c MACRAME_API_DPLANE_TX_CFM 0006 source_pid txstatus control_tag fc seq_num retry_count
+0011 001d MACRAME_API_DPLANE_UNKNOWN_PEER_IND 0001 peer_addr
+0011 001e MACRAME_API_DPLANE_UPDATE_RSSI_SNR_AVG 0000
+0011 001f MACRAME_API_DPLANE_VIF_ANNOUNCE_AVAILABILITY_IND 0000
+0011 0020 MACRAME_API_DPLANE_VIF_CHECK_CLEAR_IND 0000
+0011 0021 MACRAME_API_DPLANE_VIF_DELETE_CFM 0000
+0011 0022 MACRAME_FSM_DPLANE_PAUSE_RESUME_CFM 0000
+# Generated From macrame/macrame_api/macrame_api_dplane_debug.xml
+trace_types 47
+MACRAME_API_DPLANE_TDLS_PEER_SP_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_TDLS_PEER_SP_IND.du_bm Natural8
+MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND.frame MBULK
+MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_PS_UPDATE_IND.vif_is_sta Boolean
+MACRAME_API_DPLANE_DPD_FRAME_SENT_IND.frame MBULK
+MACRAME_API_DPLANE_DPD_FRAME_SENT_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_BA_ERROR_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_BA_ERROR_IND.prio PRIORITY
+MACRAME_API_DPLANE_BA_ERROR_IND.direction DIRECTION
+MACRAME_API_DPLANE_BA_ERROR_IND.reason REASON_CODE
+MACRAME_API_DPLANE_UNKNOWN_PEER_IND.peer_addr MAC_Address
+MACRAME_API_DPLANE_TX_CFM.source_pid FsmProcessId
+MACRAME_API_DPLANE_TX_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_TX_CFM.control_tag Natural64
+MACRAME_API_DPLANE_TX_CFM.retry_count Natural8
+MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND.frame MBULK
+MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_TDLS_PEER_PS_UPDATE_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_MIC_FAILURE_IND.frame MBULK
+MACRAME_API_DPLANE_NAN_SDF_CALLBACK.txstatus Transmission_Status
+MACRAME_API_DPLANE_RX_ACTIVITY_OCCURED_IND.mac_instance Natural32
+MACRAME_API_DPLANE_BEACON_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_MGMT_TX_CFM.frame MBULK
+MACRAME_API_DPLANE_MGMT_TX_CFM.pid FsmProcessId
+MACRAME_API_DPLANE_MGMT_TX_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_MGMT_TX_CFM.control_tag Natural64
+MACRAME_API_DPLANE_FRAME_RX_IND.frame MBULK
+MACRAME_API_DPLANE_NULL_ANNOUNCE_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_BA_TX_ERROR_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_GET_SHED_PRIMARY_VIX.mac_instance Natural32
+MACRAME_API_DPLANE_PS_SERVICE_END_IND.moredata Boolean
+MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND.frame MBULK
+MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND.frame MBULK
+MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_MM_CFM.source_pid FsmProcessId
+MACRAME_API_DPLANE_MM_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_MM_CFM.control_tag Natural64
+MACRAME_API_DPLANE_MM_CFM.receiver_address MAC_Address
+MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND.sta_addr MAC_Address
+MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND.power_save Boolean
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.frame MBULK
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.dest_pid FsmProcessId
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.filter_id Natural8
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.packet_filter_mode Packet_Filter_Mode
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.mac_hdr_len NAtural16
+# Generated From macrame/macrame_blackout/macrame_blackout_debug.xml
+trace_def 38
+001f 0000 MACRAME_ADD_CHIP_BLACKOUT 0008 dtim_time start_reference duration period count flags handle num_chip_blackouts
+001f 0001 MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS 0004 on host_conn sta_ps_state rx_only
+001f 0002 MACRAME_BLACKOUT_ACTIVATE_USPBO 0002 blackout_masked next_blackout_state_change_valid
+001f 0003 MACRAME_BLACKOUT_ACTIVITIES_ALLOWED 0007 idx bo_type period duration start bo_id allowed
+001f 0004 MACRAME_BLACKOUT_ADD_BLACKOUT 0009 bo_id bo_type bo_source bo_start period duration count flags result
+001f 0005 MACRAME_BLACKOUT_ADD_COEX_LTE_BO 0003 start_ref duration period
+001f 0006 MACRAME_BLACKOUT_CHECK_USPBO_0 0001 uspbo_active
+001f 0007 MACRAME_BLACKOUT_CHECK_USPBO_1 0003 uspbo_active num_blackouts flags
+001f 0008 MACRAME_BLACKOUT_COEX_ATTACH_USPBO 0002 handle vix_bitmap
+001f 0009 MACRAME_BLACKOUT_COEX_ATTACH_VIF 0001 handle
+001f 000a MACRAME_BLACKOUT_COEX_DETACH_USPBO 0002 handle vix_bitmap
+001f 000b MACRAME_BLACKOUT_COEX_DETACH_VIF 0001 handle
+001f 000c MACRAME_BLACKOUT_COEX_MASK_UNMASK 0003 handle vix_bitmap mask
+001f 000d MACRAME_BLACKOUT_DBG_MAC_OFF_DONE 0001 value
+001f 000e MACRAME_BLACKOUT_DEACTIVATE_USPBO 0003 all_primary_bm blackout_masked next_blackout_state_change_valid
+001f 000f MACRAME_BLACKOUT_DEL_BLACKOUT 0002 bo_id result
+001f 0010 MACRAME_BLACKOUT_GET_SSS_BO_START_END 0004 state start duration eol_extension
+001f 0011 MACRAME_BLACKOUT_GET_USPBO_INFO 0005 flags period duration reference end_time
+001f 0012 MACRAME_BLACKOUT_GET_USPBO_INFO_IN 0003 bostart bostop flags
+001f 0013 MACRAME_BLACKOUT_GET_USPBO_INFO_OUT 0003 bostart bostop flags
+001f 0014 MACRAME_BLACKOUT_INFO 0007 bo_id flags start_reference duration scheduler_flags period end_time
+001f 0015 MACRAME_BLACKOUT_LTE_ENTER_RX_ONLY 0001 vifs_in_ps
+001f 0016 MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY 0002 vifs_in_ps prev_in_tx_only
+001f 0017 MACRAME_BLACKOUT_LTE_RX_ONLY_MODE 0003 next_update vifs_in_ps vifs_paused
+001f 0018 MACRAME_BLACKOUT_LTE_TX_ONLY_MODE 0003 next_update vifs_in_ps vifs_paused
+001f 0019 MACRAME_BLACKOUT_MASK_COEX_USPBO 0003 in_mask uspbo_active blackout_masked
+001f 001a MACRAME_BLACKOUT_MSG 0003 word16 word32 __LINE__
+001f 001b MACRAME_BLACKOUT_QUERY_BACKOFF_1 0006 idx start start_ref duration period stop
+001f 001c MACRAME_BLACKOUT_QUERY_BACKOFF_2 0004 idx backoff_time flags priority
+001f 001d MACRAME_BLACKOUT_QUERY_BLACKOUT 0008 Scheduler_flag vif_in_blackout start_time stop_time reference t idx bo_cause
+001f 001e MACRAME_BLACKOUT_REGISTER_BLACKOUT 0008 bo_id bo_type bo_source bo_start period duration count flags
+001f 001f MACRAME_BLACKOUT_RESTART_USPBO 0003 uspbo_active blackout_masked next_blackout_state_change_valid
+001f 0020 MACRAME_BLACKOUT_UPDATE_USPBO 0007 all_primary_bm bo_info_vix_bitmap bo_info_state blackout_masked next_blackout_state_change_valid timer_st cts_to_self_mode
+001f 0021 MACRAME_BLACKOUT_UPDATE_USPBO_CTS 0004 lte_uspbo_mode in_rx_only in_tx_only lte_ul_skip_count
+001f 0022 MACRAME_BLACKOUT_UPDATE_USPBO_ENTER 0007 bo_info_state fully_scheduled_vix_bm usbpo_vix_bitmap next_blackout_state_change_valid blackout_masked lte_ul_skip_count usbpo_prev_in_tx_only
+001f 0023 MACRAME_DEL_CHIP_BLACKOUT 0005 handle result rame_blackout_sco_like_active num_chip_blackouts ps_forced
+001f 0024 MACRAME_QUIET_INFO 0003 count current_time blackout_start_time
+001f 0025 MACRAME_SSS_BLACKOUT_UPDATE 0008 start duration initial_state new_state initial_inhibit_flags new_inhibit_flags timer_id timer_set
+# Generated From macrame/macrame_blackout/macrame_blackout_debug.xml
+trace_types 117
+MACRAME_BLACKOUT_COEX_DETACH_VIF.handle Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.period Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.duration Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.reference Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.end_time Natural32
+MACRAME_BLACKOUT_DEL_BLACKOUT.result Result_Code
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.next_update Natural32
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.vifs_paused VIX_BM_T
+MACRAME_BLACKOUT_COEX_ATTACH_VIF.handle Natural32
+MACRAME_ADD_CHIP_BLACKOUT.dtim_time Natural32
+MACRAME_ADD_CHIP_BLACKOUT.start_reference Natural32
+MACRAME_ADD_CHIP_BLACKOUT.duration Natural32
+MACRAME_ADD_CHIP_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.bo_info_state RAMEDATA_USPBO_STATE_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.fully_scheduled_vix_bm VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.usbpo_vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.blackout_masked Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.lte_ul_skip_count Natural8
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.usbpo_prev_in_tx_only Boolean
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.start Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.start_ref Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.duration Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.period Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.stop Natural32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.start_ref Natural32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.duration Integer32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.period Integer32
+MACRAME_BLACKOUT_UPDATE_USPBO.all_primary_bm VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO.bo_info_vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO.bo_info_state RAMEDATA_USPBO_STATE_T
+MACRAME_BLACKOUT_UPDATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO.timer_st Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO.cts_to_self_mode Boolean
+MACRAME_BLACKOUT_QUERY_BLACKOUT.vif_in_blackout Boolean
+MACRAME_BLACKOUT_QUERY_BLACKOUT.start_time Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.stop_time Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.reference Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.t Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.bo_cause BLACKOUT_ELEMENT_FLAGS_T
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.all_primary_bm VIX_BM_T
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.state SHAREDDATA_VIF_SSS_STATE_T
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.start Natural32
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.duration Integer32
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.eol_extension Integer32
+MACRAME_BLACKOUT_CHECK_USPBO_1.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_RESTART_USPBO.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_RESTART_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_RESTART_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY.prev_in_tx_only Boolean
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_source BLACKOUT_SOURCE
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_start Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.duration Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.result Result_Code
+MACRAME_BLACKOUT_COEX_DETACH_USPBO.handle Natural32
+MACRAME_BLACKOUT_COEX_DETACH_USPBO.vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_source BLACKOUT_SOURCE
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_start Natural32
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.duration Natural32
+MACRAME_BLACKOUT_ACTIVATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_ACTIVATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_QUIET_INFO.current_time Natural32
+MACRAME_QUIET_INFO.blackout_start_time Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_2.backoff_time Integer32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.period Natural32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.duration Natural32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.start Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.lte_uspbo_mode Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.in_rx_only Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.in_tx_only Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.lte_ul_skip_count Natural8
+MACRAME_BLACKOUT_GET_USPBO_INFO_OUT.bostart Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_OUT.bostop Natural32
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.on Boolean
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.host_conn Boolean
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.sta_ps_state SHAREDDATA_802_PS_T
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.rx_only Boolean
+MACRAME_SSS_BLACKOUT_UPDATE.start Natural32
+MACRAME_SSS_BLACKOUT_UPDATE.duration Integer32
+MACRAME_SSS_BLACKOUT_UPDATE.timer_id Natural32
+MACRAME_SSS_BLACKOUT_UPDATE.timer_set Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_IN.bostart Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_IN.bostop Natural32
+MACRAME_BLACKOUT_INFO.bo_id BLACKOUT_ID
+MACRAME_BLACKOUT_INFO.start_reference Natural32
+MACRAME_BLACKOUT_INFO.duration Natural32
+MACRAME_BLACKOUT_INFO.period Natural32
+MACRAME_BLACKOUT_INFO.end_time Natural32
+MACRAME_BLACKOUT_MSG.word32 Natural32
+MACRAME_BLACKOUT_MSG.__LINE__ __LINE__
+MACRAME_DEL_CHIP_BLACKOUT.result Result_Code
+MACRAME_DEL_CHIP_BLACKOUT.rame_blackout_sco_like_active Boolean
+MACRAME_DEL_CHIP_BLACKOUT.ps_forced Boolean
+MACRAME_BLACKOUT_LTE_ENTER_RX_ONLY.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_DBG_MAC_OFF_DONE.value Natural32
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.handle Natural32
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.mask Boolean
+MACRAME_BLACKOUT_MASK_COEX_USPBO.in_mask Boolean
+MACRAME_BLACKOUT_MASK_COEX_USPBO.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_MASK_COEX_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_CHECK_USPBO_0.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.next_update Natural32
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.vifs_paused VIX_BM_T
+MACRAME_BLACKOUT_COEX_ATTACH_USPBO.handle Natural32
+MACRAME_BLACKOUT_COEX_ATTACH_USPBO.vix_bitmap VIX_BM_T
+RAMEDATA_USPBO_STATE_T Enum 0 RAMEDATA_USPBO_INACTIVE 1 RAMEDATA_USPBO_CTS_TO_SELF 2 RAMEDATA_USPBO_IN_BO 3 RAMEDATA_USPBO_OUTSIDE_BO
+BLACKOUT_ELEMENT_FLAGS_T Enum 0000 BLACKOUT_RESET 0001 BLACKOUT_INITIALISED 0002 BLACKOUT_ENABLED 0004 BLACKOUT_IN_BLACKOUT 0020 BLACKOUT_MASKED 0040 BLACKOUT_IS_COEX 0100 BLACKOUT_IS_ULTRA_SHORT_PERIODIC 0200 BLACKOUT_IS_FOR_CONCURRENT 0400 BLACKOUT_IS_ULTRA_SHORT
+# Generated From macrame/macrame_schdl/macrame_schdl_debug.xml
+trace_def 64
+000e 0000 MACRAME_SCHDL_CONCURRENT_SCAN 0004 vif_to_pause_bm bo_start bo_end __LINE__
+000e 0001 MACRAME_SCHDL_MGR_RESOURCES 0006 band_idx vifs_pending_resource vifs_using_antenna0 vifs_using_antenna1 vifs_releasing_antenna0 vifs_releasing_antenna1
+000e 0002 MACRAME_SCHDL_MGR_UPDATE_RESOURCES 0002 band_idx radio_bm
+000e 0003 MACRAME_SCHED_ADD_INSTANCE_TO_LIST 0003 pid count bitmap
+000e 0004 MACRAME_SCHED_APPLY_CHIP_BLACKOUT 0002 sched_next_vix next_reschedule_time
+000e 0005 MACRAME_SCHED_ASSIGN_RESOURCE 0007 available_antennas main_ant_idx num_preferred_ant is_releasing_resources vif_changed_scheduler mac_is_available vif_already_claimed_all_res
+000e 0006 MACRAME_SCHED_AVAILABLE_VIF 0005 force_duration max_schdl_interval available_end_time available_time_remain schdl_pid
+000e 0007 MACRAME_SCHED_BLACKOUT_START_TIME 0004 debug_location start_time deadline result
+000e 0008 MACRAME_SCHED_CHECK_CLEARING_RESOURCES 0006 schdl_instance instance_to_ignore vix_bm schdl_being_cleared radio_bm schdl_state
+000e 0009 MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ 0006 sched_type required_time_valid jetzt forced_end required_time_start required_time_end
+000e 000a MACRAME_SCHED_CHECK_FOR_PENDING_RES 0004 other_schdl_pid num_of_antenas_used schdl_fsm_num_of_antennas_pending other_scheduler_reched_req
+000e 000b MACRAME_SCHED_CLEAR_OLD_RES 0003 old_pid old_band_idx old_radio_bm
+000e 000c MACRAME_SCHED_COMMON_TIMING 0005 sleep wakeup mif_on_start mif_on_end c_start
+000e 000d MACRAME_SCHED_DELAY_DUE_TO_SINGLE_STA_SCAN 0000
+000e 000e MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE 0008 vifsc_schedulable sched_time duration sched_flags current_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 000f MACRAME_SCHED_DELAY_VIF_SCHEDULE 0007 sched_time duration sched_flags current_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 0010 MACRAME_SCHED_DESCHED 0003 sched_vix_bitmap sched_next_vix next_sched_type
+000e 0011 MACRAME_SCHED_DESCHED_NOW 0006 simultaneous_schedule_possible sched_vix_bitmap sched_next_vix vif_need_desched calculated_sched_vix_bitmap inhibit
+000e 0012 MACRAME_SCHED_DESCHED_REQUEST 0003 current_time sched_vix sched_vix_bitmap
+000e 0013 MACRAME_SCHED_DESCHED_RESPONSE 0000
+000e 0014 MACRAME_SCHED_EXTEND_SCHDL 0003 sched_vix_bitmap end_time prioritise_over_others
+000e 0015 MACRAME_SCHED_FSM_ALL_SCANS_DONE 0000
+000e 0016 MACRAME_SCHED_FSM_DEL_SCAN_BO 0000
+000e 0017 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_CORNER_CASE 0001 line
+000e 0018 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2 0003 time_now current_vif_req_time next_vif_req_time
+000e 0019 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3 0003 end duration situation
+000e 001a MACRAME_SCHED_GET_CORRECTED_SCHED_TIME 0003 avg_duration samples result
+000e 001b MACRAME_SCHED_INIT_VARIABLES 0001 pid
+000e 001c MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT 0004 vif_get_assigned_num_antennas other_schdl_is_waiting other_schdl_schd_vix_bm num_of_free_antennas
+000e 001d MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_MAC_AVAILABLE 0002 schdl_fsm_pending_reschedule schdl_pid
+000e 001e MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE 0003 schdl_pid num_of_antennas_pending num_of_assigned_antennas
+000e 001f MACRAME_SCHED_MGR_SET_PROTECT_ACTIVE 0001 mimo_protect_active
+000e 0020 MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE 0002 old_num_antennas new_num_antennas
+000e 0021 MACRAME_SCHED_MGR_UPDATE_SCHDL_RADIO_BM 0004 resume_after_scheduler schdl_instance radio_bm paused_schdl_bm
+000e 0022 MACRAME_SCHED_MGR_VIF_IMPACTS_OTHER_VIFS 0002 impacted_vif_bm schdl_to_pause
+000e 0023 MACRAME_SCHED_NOW 0008 schedule_type concurrent_vif_bm inhibit schedule_state radio_state schdl_pid is_schedulable sched_vix
+000e 0024 MACRAME_SCHED_QUERY_BLACKOUT 0006 start_time stop_time start_time_valid stop_time_valid duration blackout_flags
+000e 0025 MACRAME_SCHED_RADIO_OFF 0001 schdl_pid
+000e 0026 MACRAME_SCHED_RADIO_OFF_RESCHEDULE_AT 0002 next_schedule_time schdl_pid
+000e 0027 MACRAME_SCHED_RADIO_ON 0002 radio_state schdl_pid
+000e 0028 MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING 0003 schdl_pid sched_radio_switch_off_start sched_radio_switch_off_done
+000e 0029 MACRAME_SCHED_RADIO_SWITCH_RESPONSE 0003 comms_chain_index schdl_instance radio_bm
+000e 002a MACRAME_SCHED_REDISTRIBUTE_RESOURCES 0004 schdl_pid radio_bm vifs_pending_schedule upgraded_vifs
+000e 002b MACRAME_SCHED_RELEASE_RESOURCE 0003 antenna_index band_index_to_ignore vifs_using_antenna_bm
+000e 002c MACRAME_SCHED_REQ_HIGH_PRIORITY 0003 sched_start sched_end sched_pri
+000e 002d MACRAME_SCHED_REQ_LOW_PRIORITY 0003 sched_start duration forced
+000e 002e MACRAME_SCHED_RESCHEDULE 0007 schdl_instance sched_state sched_type radio_bm schedulable_vix_bm force_sched_duration force_sched_time
+000e 002f MACRAME_SCHED_RESCHEDULE_AT 0002 when pid
+000e 0030 MACRAME_SCHED_RESCHEDULE_NOW 0002 scheduler_pid when
+000e 0031 MACRAME_SCHED_SCAN_CAN_CONCURR 0000
+000e 0032 MACRAME_SCHED_SCAN_CAN_CONCURR_FAIL 0001 __LINE__
+000e 0033 MACRAME_SCHED_SET_SCHED_END 0002 hdr_vif_end new_end
+000e 0034 MACRAME_SCHED_SWITCH_CHANNEL_DONE 0004 sched_vix_bm sched_vix force_reschedule schdl_pid
+000e 0035 MACRAME_SCHED_SWITCH_ON_TIMING 0003 schdl_radio_change_requested rice_radio_change_requested vif_ready
+000e 0036 MACRAME_SCHED_SWITCH_RESPONSE 0007 sched_vix_bitmap schedule_type radio_ready_time proc_overhead primary_chan_freq chan_freq chan_info
+000e 0037 MACRAME_SCHED_SWITCH_VIF 0004 inhibit schedule_state radio_state schdl_type
+000e 0038 MACRAME_SCHED_UPDATE_SCHEDULING_VIF 0008 schedule_type force_sched_duration sched_is_forced next_reschedule_time_valid next_reschedule_time priority_changed inhibit schdl_pid
+000e 0039 MACRAME_SCHED_UPGRADE_RESOURCES 0002 ant_available_band0 ant_available_band1
+000e 003a MACRAME_SCHED_VIF_CLEARED 0002 current_time inhibit
+000e 003b MACRAME_SCHED_VIF_DESCHED 0001 to_mlme_sched_desched
+000e 003c MACRAME_SCHED_VIF_RELEASING_RESOURCE 0005 vif_is_releasing_resources utils_radio_is_off vif_is_scheduled vif_is_waiting_schedule radio_switch_in_progress
+000e 003d MACRAME_SCHED_VIF_RELINQUISHING 0001 inhibit
+000e 003e MACRAME_SCHED_VIF_SCHEDULE 0008 sched_time duration sched_flags current_fsm_pid required_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 003f MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER 0005 schdl_instance radiomac_handle sched_vix schedulable_vix_bitmap sched_vix_bitmap
+# Generated From macrame/macrame_schdl/macrame_schdl_debug.xml
+trace_types 153
+MACRAME_SCHED_CHECK_CLEARING_RESOURCES.schdl_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING.sched_radio_switch_off_start Natural32
+MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING.sched_radio_switch_off_done Natural32
+MACRAME_SCHED_SWITCH_VIF.schedule_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_SWITCH_VIF.schdl_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.vif_get_assigned_num_antennas Natural8
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.other_schdl_is_waiting Boolean
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.other_schdl_schd_vix_bm VIX_BM_T
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.num_of_free_antennas Natural8
+MACRAME_SCHED_RESCHEDULE_AT.when Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_CORNER_CASE.line __LINE__
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.force_sched_duration Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.sched_is_forced Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.next_reschedule_time_valid Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.next_reschedule_time Natural32
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.priority_changed Boolean
+MACRAME_SCHDL_MGR_UPDATE_RESOURCES.band_idx Natural8
+MACRAME_SCHED_REQ_LOW_PRIORITY.sched_start Natural32
+MACRAME_SCHED_REQ_LOW_PRIORITY.duration Integer32
+MACRAME_SCHED_REQ_LOW_PRIORITY.forced Boolean
+MACRAME_SCHED_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_NOW.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_NOW.concurrent_vif_bm VIX_BM_T
+MACRAME_SCHED_NOW.schedule_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_NOW.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_SCHED_NOW.is_schedulable Boolean
+MACRAME_SCHED_VIF_DESCHED.to_mlme_sched_desched VIF_Schedule_Type
+MACRAME_SCHED_RESCHEDULE_NOW.when Natural32
+MACRAME_SCHED_APPLY_CHIP_BLACKOUT.next_reschedule_time Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.start_time Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.deadline Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.result Natural32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_DESCHED.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_DESCHED.next_sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHDL_CONCURRENT_SCAN.vif_to_pause_bm VIX_BM_T
+MACRAME_SCHDL_CONCURRENT_SCAN.bo_start Natural32
+MACRAME_SCHDL_CONCURRENT_SCAN.bo_end Natural32
+MACRAME_SCHDL_CONCURRENT_SCAN.__LINE__ __LINE__
+MACRAME_SCHED_RADIO_ON.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_SCHED_EXTEND_SCHDL.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_EXTEND_SCHDL.end_time Natural32
+MACRAME_SCHED_EXTEND_SCHDL.prioritise_over_others Boolean
+MACRAME_SCHDL_MGR_RESOURCES.band_idx Natural8
+MACRAME_SCHDL_MGR_RESOURCES.vifs_pending_resource VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_using_antenna0 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_using_antenna1 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_releasing_antenna0 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_releasing_antenna1 VIX_BM_T
+MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE.old_num_antennas Natural8
+MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE.new_num_antennas Natural8
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.vifsc_schedulable Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3.end Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3.duration Integer32
+MACRAME_SCHED_VIF_CLEARED.current_time Natural32
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_releasing_resources Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.utils_radio_is_off Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_scheduled Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_waiting_schedule Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.radio_switch_in_progress Natural8
+MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER.radiomac_handle Natural8
+MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER.sched_vix VIF_INDEX
+MACRAME_SCHED_UPGRADE_RESOURCES.ant_available_band0 VIX_BM_T
+MACRAME_SCHED_UPGRADE_RESOURCES.ant_available_band1 VIX_BM_T
+MACRAME_SCHED_RESCHEDULE.sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_RESCHEDULE.schedulable_vix_bm VIX_BM_T
+MACRAME_SCHED_RESCHEDULE.force_sched_duration Boolean
+MACRAME_SCHED_RESCHEDULE.force_sched_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.start_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.stop_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.start_time_valid Natural8
+MACRAME_SCHED_QUERY_BLACKOUT.stop_time_valid Natural8
+MACRAME_SCHED_QUERY_BLACKOUT.duration Integer32
+MACRAME_SCHED_REDISTRIBUTE_RESOURCES.vifs_pending_schedule VIX_BM_T
+MACRAME_SCHED_REDISTRIBUTE_RESOURCES.upgraded_vifs VIX_BM_T
+MACRAME_SCHED_SCAN_CAN_CONCURR_FAIL.__LINE__ __LINE__
+MACRAME_SCHED_ASSIGN_RESOURCE.main_ant_idx Natural8
+MACRAME_SCHED_ASSIGN_RESOURCE.num_preferred_ant Natural8
+MACRAME_SCHED_ASSIGN_RESOURCE.is_releasing_resources Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.vif_changed_scheduler Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.mac_is_available Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.vif_already_claimed_all_res Boolean
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.time_now Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.current_vif_req_time Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.next_vif_req_time Natural32
+MACRAME_SCHED_SWITCH_CHANNEL_DONE.sched_vix_bm VIX_BM_T
+MACRAME_SCHED_SWITCH_CHANNEL_DONE.force_reschedule Boolean
+MACRAME_SCHED_RADIO_OFF_RESCHEDULE_AT.next_schedule_time Natural32
+MACRAME_SCHED_DESCHED_REQUEST.current_time Natural32
+MACRAME_SCHED_DESCHED_REQUEST.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_start Natural32
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_end Natural32
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_pri SHAREDDATA_REQUIRED_SCHEDULE_PRIORITY
+MACRAME_SCHED_COMMON_TIMING.sleep Natural32
+MACRAME_SCHED_COMMON_TIMING.wakeup Natural32
+MACRAME_SCHED_COMMON_TIMING.mif_on_start Natural32
+MACRAME_SCHED_COMMON_TIMING.mif_on_end Natural32
+MACRAME_SCHED_COMMON_TIMING.c_start Natural32
+MACRAME_SCHED_SET_SCHED_END.hdr_vif_end Natural32
+MACRAME_SCHED_SET_SCHED_END.new_end Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_SWITCH_RESPONSE.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_SWITCH_RESPONSE.radio_ready_time Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.proc_overhead Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.primary_chan_freq CHANNEL_FREQUENCY
+MACRAME_SCHED_SWITCH_RESPONSE.chan_freq CHANNEL_FREQUENCY
+MACRAME_SCHED_SWITCH_RESPONSE.chan_info CHANNEL_INFORMATION
+MACRAME_SCHED_SWITCH_ON_TIMING.schdl_radio_change_requested Natural32
+MACRAME_SCHED_SWITCH_ON_TIMING.rice_radio_change_requested Natural32
+MACRAME_SCHED_SWITCH_ON_TIMING.vif_ready Natural32
+MACRAME_SCHED_RADIO_SWITCH_RESPONSE.comms_chain_index Natural8
+MACRAME_SCHED_MGR_SET_PROTECT_ACTIVE.mimo_protect_active Boolean
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE.num_of_antennas_pending Natural8
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE.num_of_assigned_antennas Natural8
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_valid Boolean
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.jetzt Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.forced_end Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_start Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_end Natural32
+MACRAME_SCHED_ADD_INSTANCE_TO_LIST.bitmap VIX_BM_T
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_MAC_AVAILABLE.schdl_fsm_pending_reschedule VIX_BM_T
+MACRAME_SCHED_RELEASE_RESOURCE.antenna_index Natural8
+MACRAME_SCHED_RELEASE_RESOURCE.band_index_to_ignore Natural8
+MACRAME_SCHED_RELEASE_RESOURCE.vifs_using_antenna_bm VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.simultaneous_schedule_possible Boolean
+MACRAME_SCHED_DESCHED_NOW.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.vif_need_desched VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.calculated_sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.num_of_antenas_used Natural8
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.schdl_fsm_num_of_antennas_pending Natural8
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.other_scheduler_reched_req Boolean
+MACRAME_SCHED_AVAILABLE_VIF.force_duration Boolean
+MACRAME_SCHED_AVAILABLE_VIF.max_schdl_interval Integer32
+MACRAME_SCHED_AVAILABLE_VIF.available_end_time Natural32
+MACRAME_SCHED_AVAILABLE_VIF.available_time_remain Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.avg_duration Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.samples Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.result Integer32
+# Generated From macrame/macrame_powersave/macrame_ps_debug.xml
+trace_def 14
+001e 0000 MACRAME_ANNOUNCE_FRAME_PROCESSED 0009 ps_activity ps_bitmap pending_inds inhibit power_mgt_mode traffic_class tx_status seq_no ps_delay_timeout
+001e 0001 MACRAME_CAN_GO_ACTIVE 0009 ps_activity ps_bitmap pending_inds inhibit lp_sched_requested any_ps_activity power_mgt_mode traffic_class last_activity_time
+001e 0002 MACRAME_CAN_PS 0006 power_mgt_mode last_activity_time inhibit pending_inds sta_ps_bitmap tx_n_queued
+001e 0003 MACRAME_PS_CAN_SLEEP 0007 sta_ps_bitmap rame_tx_n_queued tx_n_queued tx_n_total_ready ps_state ps_activity __LINE__
+001e 0004 MACRAME_PS_CHANGE_STATE 0003 from to __LINE__
+001e 0005 MACRAME_PS_CHECK 0007 ps_state inhibit disallow_sched_relinquish require_rx_only use_lprx_only fast_timeout_us __LINE__
+001e 0006 MACRAME_PS_GET_LAST_ACTIVITY_TIME_1 0005 access_point last_activity_time ps_ind_last sta_tx_activity sta_rx_activity
+001e 0007 MACRAME_PS_GET_LAST_ACTIVITY_TIME_2 0003 last_sta_activity_time extra_listen_end power_mgt_mode
+001e 0008 MACRAME_PS_GOTO_PS 0001 __LINE__
+001e 0009 MACRAME_PS_LEAVE_PS 0001 __LINE__
+001e 000a MACRAME_PS_STAY_IN_ACTIVE 0001 __LINE__
+001e 000b MACRAME_PS_STAY_IN_PS 0001 __LINE__
+001e 000c MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME 0005 previous_poll_time next_poll_time extra_listen_end since_last_rx_activity power_mgt_mode
+001e 000d MACRAME_SEND_PS_NULL 0004 ps_state current_time tx_sw_deadline transmission_control
+# Generated From macrame/macrame_powersave/macrame_ps_debug.xml
+trace_types 43
+MACRAME_SEND_PS_NULL.ps_state SHAREDDATA_802_PS_T
+MACRAME_SEND_PS_NULL.current_time Natural32
+MACRAME_SEND_PS_NULL.tx_sw_deadline Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.last_sta_activity_time Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.extra_listen_end Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.power_mgt_mode SHAREDDATA_802_PS_T
+MACRAME_ANNOUNCE_FRAME_PROCESSED.ps_bitmap Natural8
+MACRAME_ANNOUNCE_FRAME_PROCESSED.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_ANNOUNCE_FRAME_PROCESSED.ps_delay_timeout Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.access_point MAC_Address
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.last_activity_time Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.ps_ind_last Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.sta_tx_activity Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.sta_rx_activity Natural32
+MACRAME_PS_STAY_IN_PS.__LINE__ __LINE__
+MACRAME_PS_CHECK.ps_state SHAREDDATA_802_PS_T
+MACRAME_PS_CHECK.disallow_sched_relinquish Natural8
+MACRAME_PS_CHECK.require_rx_only Boolean
+MACRAME_PS_CHECK.use_lprx_only Boolean
+MACRAME_PS_CHECK.fast_timeout_us Natural32s
+MACRAME_PS_CHECK.__LINE__ __LINE__
+MACRAME_PS_STAY_IN_ACTIVE.__LINE__ __LINE__
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.previous_poll_time Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.next_poll_time Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.extra_listen_end Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.since_last_rx_activity Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.power_mgt_mode SHAREDDATA_802_PS_T
+MACRAME_PS_CAN_SLEEP.sta_ps_bitmap Natural8
+MACRAME_PS_CAN_SLEEP.ps_state SHAREDDATA_802_PS_T
+MACRAME_PS_CAN_SLEEP.__LINE__ __LINE__
+MACRAME_PS_GOTO_PS.__LINE__ __LINE__
+MACRAME_CAN_GO_ACTIVE.ps_bitmap Natural8
+MACRAME_CAN_GO_ACTIVE.lp_sched_requested Boolean
+MACRAME_CAN_GO_ACTIVE.any_ps_activity Boolean
+MACRAME_CAN_GO_ACTIVE.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_CAN_GO_ACTIVE.last_activity_time Natural32
+MACRAME_PS_CHANGE_STATE.from SHAREDDATA_802_PS_T
+MACRAME_PS_CHANGE_STATE.to SHAREDDATA_802_PS_T
+MACRAME_PS_CHANGE_STATE.__LINE__ __LINE__
+MACRAME_CAN_PS.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_CAN_PS.last_activity_time Natural32
+MACRAME_CAN_PS.sta_ps_bitmap Natural8
+MACRAME_PS_LEAVE_PS.__LINE__ __LINE__
+# Generated From fault/faults_debug.xml
+trace_def 2
+0002 0000 FAULTS_FAULT_RECORDED 0004 SubSystemId FaultLevel faultid Arg
+0002 0001 FAULTS_FILTERED 0004 SubSystemId FaultLevel Confession Arg
+# Generated From fault/faults_debug.xml
+trace_types 6
+FAULTS_FAULT_RECORDED.SubSystemId SUBSYSTEM_ID_T
+FAULTS_FAULT_RECORDED.FaultLevel FAULT_LEVEL_T
+FAULTS_FAULT_RECORDED.Arg Natural32
+FAULTS_FILTERED.SubSystemId SUBSYSTEM_ID_T
+FAULTS_FILTERED.FaultLevel FAULT_LEVEL_T
+FAULTS_FILTERED.Arg Natural32
+SUBSYSTEM_ID_T Enum 0001 SUBSYSTEM_IDS_COEX 0002 SUBSYSTEM_IDS_COMMON 0003 SUBSYSTEM_IDS_DPLANE 0004 SUBSYSTEM_IDS_MACRAME 0005 SUBSYSTEM_IDS_MLME 0006 SUBSYSTEM_IDS_RADIO 0007 SUBSYSTEM_LAST_ID
+FAULT_LEVEL_T Enum 0000 FAULT_LVL_ERROR 0001 FAULT_LVL_WARNING 0002 FAULT_LVL_INFO_1 0003 FAULT_LVL_INFO_2
+# Generated From packet_filter/packet_filter_debug.xml
+trace_def 4
+0037 0000 PACKET_FILTER_ADD 0004 id num_desc desc_list_len filter_mode
+0037 0001 PACKET_FILTER_DELETE_ALL 0000
+0037 0002 PACKET_FILTER_DELETE_SINGLE 0001 id
+0037 0003 PACKET_FILTER_MODE_REVERSED 0003 id old_filter_mode new_filter_mode
+# Generated From packet_filter/packet_filter_debug.xml
+trace_types 3
+PACKET_FILTER_MODE_REVERSED.id Natural8
+PACKET_FILTER_MODE_REVERSED.old_filter_mode Natural8
+PACKET_FILTER_MODE_REVERSED.new_filter_mode Natural8
+# Generated From packet_filter/apf/apf_debug.xml
+trace_def 4
+0049 0000 APF_HANDLER 0003 grp_pkt eth_type_offset eth_l3_len
+0049 0001 APF_READ_PARAMS 0002 total_len apf_program_len
+0049 0002 APF_RESULT 0002 apf_result packet_len
+0049 0003 APF_SET_PARAMS 0003 flt_mode apf_program_len apf_ram_len
+# Generated From packet_filter/apf/apf_debug.xml
+trace_types 3
+APF_SET_PARAMS.flt_mode Natural32
+APF_RESULT.apf_result Natural32
+APF_HANDLER.grp_pkt Boolean
+# Generated From rice/rice_rssi_debug.xml
+trace_def 32
+0031 0000 RICE_RSSI_INFO_PER_PKT 000c rx_mixer_gain_index rx_lna_gain_index rssi_dBm steps rssi_lin rssi_gain_adjustment_qdB centre_freq_half_mhz snr rssi_valid rx_digital_gain_step rx_bb_gain_index rx_fe_gain_index
+0031 0001 RICE_RSSI_LNA_MIXER 0005 rx_mixer_gain_index rx_lna_gain_index rx_fe_gain_index rssi_valid center_frequency_half_mhz
+0031 0002 RICE_RSSI_PER_PKT_FROM_MAC 0007 gain_steps rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm packet_count
+0031 0003 RICE_RSSI_VALIDITY 0008 gain_steps misc_gain rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm rssi_valid
+0031 0004 RICE_RSSI_FREQ_OFFSET_FAULT 0009 centre_freq_half_mhz ch_bandwidth freq_offset bb_freq_offset_val ppdu_rate rssi_valid phy_gain phy_misc_gain phy_rssi
+0031 0005 RICE_RSSI_DIG_GAIN 0005 bypass_digital_agc rx_digital_gain_step digital_gain_correction phy_misc_gain digital_gain_mask
+0031 0006 RICE_RSSI_DBM_CONVERSION 0006 rssi exp_index mant_index mlog elog rssi_dBm
+0031 0007 RICE_RSSI_VALIDITY2 0007 misc_gain rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm rssi_valid
+0031 0008 RICE_RSSI_FREQ_OFFSET_FAULT2 0008 centre_freq_half_mhz ch_bandwidth freq_offset bb_freq_offset_val ppdu_rate rssi_valid phy_misc_gain phy_rssi
+0031 0009 RICE_RSSI_DIG_GAIN2 0005 bypass_digital_agc rx_digital_gain_step digital_gain_correction phy_misc_gain digital_gain_mask
+0031 000a RICE_RSSI_PER_PKT_FROM_MAC2 0006 rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm packet_count
+0031 000b RICE_RSSI_AT_DETECTOR_POINTS 0004 rssi_dBm rssi_lna_dBm rssi_mixer_dBm rssi_bb_dBm
+0031 000c RICE_RSSI_PKT_GAIN_HIST 000c gain_word_0 gain_count_0 gain_word_1 gain_count_1 gain_word_2 gain_count_2 gain_word_3 gain_count_3 gain_word_4 gain_count_4 gain_word_5 gain_count_5
+0031 000d RICE_RSSI_PKT_MIN_MAX 0005 min_snr max_snr min_rssi max_rssi invalid_count
+0031 000e RICE_RSSI_PKT_SNR_HIST 000c snr_count_0 snr_count_1 snr_count_2 snr_count_3 snr_count_4 snr_count_5 snr_count_6 snr_count_7 snr_count_8 snr_count_9 snr_count_10 snr_count_11
+0031 000f RICE_RSSI_RX_COMP_AMP_HIST 000c comp_amplitude_count_0 comp_amplitude_count_1 comp_amplitude_count_2 comp_amplitude_count_3 comp_amplitude_count_4 comp_amplitude_count_5 comp_amplitude_count_6 comp_amplitude_count_7 comp_amplitude_count_8 comp_amplitude_count_9 comp_amplitude_count_10 comp_amplitude_count_11
+0031 0010 RICE_RSSI_RX_COMP_PH_HIST 000c comp_phase_count_0 comp_phase_count_1 comp_phase_count_2 comp_phase_count_3 comp_phase_count_4 comp_phase_count_5 comp_phase_count_6 comp_phase_count_7 comp_phase_count_8 comp_phase_count_9 comp_phase_count_10 comp_phase_count_11
+0031 0011 RICE_RSSI_RX_COMP_COEFFS_PKT 0005 packet_count rx_iq_comp_amplitude rx_iq_comp_phase rx_iq_comp_amplitude_averaged rx_iq_comp_phase_averaged
+0031 0012 RICE_RSSI_IQ_COMP_MIN_MAX 000a min_rx_comp_amplitude max_rx_comp_amplitude min_rx_comp_phase max_rx_comp_phase min_rx_comp_amplitude_averaged max_rx_comp_amplitude_averaged min_rx_comp_phase_averaged max_rx_comp_phase_averaged average_comp_amplitude_cal_averaged average_comp_phase_cal_averaged
+0031 0013 RICE_RSSI_RX_COMP_PH_AVE_HIST 000c comp_phase_averaged_count_0 comp_phase_averaged_count_1 comp_phase_averaged_count_2 comp_phase_averaged_count_3 comp_phase_averaged_count_4 comp_phase_averaged_count_5 comp_phase_averaged_count_6 comp_phase_averaged_count_7 comp_phase_averaged_count_8 comp_phase_averaged_count_9 comp_phase_averaged_count_10 comp_phase_averaged_count_11
+0031 0014 RICE_RSSI_RX_COMP_AMP_AVE_HIST 000c comp_amplitude_averaged_count_0 comp_amplitude_averaged_count_1 comp_amplitude_averaged_count_2 comp_amplitude_averaged_count_3 comp_amplitude_averaged_count_4 comp_amplitude_averaged_count_5 comp_amplitude_averaged_count_6 comp_amplitude_averaged_count_7 comp_amplitude_averaged_count_8 comp_amplitude_averaged_count_9 comp_amplitude_averaged_count_10 comp_amplitude_averaged_count_11
+0031 0015 RICE_RSSI_PDOLLOP_PREROCK1 0009 ppdu_rate total_gain ht_vhta_signal_hi ht_vht_signal_lo rssi gain misc_gain reserved1 signal_quality_lo
+0031 0016 RICE_RSSI_PDOLLOP_PREROCK2 0004 signal_quality_hi sync_counter freq_offset reserved2
+0031 0017 RICE_RSSI_PDOLLOP_POSTROCK1 000a ppdu_rate antenna_11b vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter signal_quality_ant0 signal_quality_ss0 misc_gain_ant0_lo misc_gain_ant0_hi
+0031 0018 RICE_RSSI_PDOLLOP_POSTROCK2 000a freq_offs_ant0 rssi_ant0 reserved1 reserved2 signal_quality_ant1 signal_quality_ss1 misc_gain_ant1_lo misc_gain_ant1_hi freq_offs_ant1 rssi_ant1
+0031 0019 RICE_RSSI_AT_DETECTOR_POINTS2 0004 rssi_dBm rssi_lin rssi_mixer_dBm rssi_bb_dBm
+0031 001a RICE_CHANNEL_RSSI 0004 rssi_dBm gain_correction_qdBm dbg_rssi_dBm chan_rssi_dBm
+0031 001b RICE_FAULT_HELPER 0007 fault_id arg extra0 extra1 extra2 extra3 extra4
+0031 001c RICE_RSSI_PDOLLOP_CHILLI1 000a ppdu_rate antenna_11b vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter signal_quality_ant0 signal_quality_ss0 misc_gain_ant0_lo misc_gain_ant0_hi
+0031 001d RICE_RSSI_PDOLLOP_CHILLI2 0003 freq_offs_ant0 rssi_ant0 fe_gain
+0031 001e RICE_RSSI_PDOLLOP_NEUS1 000a ppdu_rate antenna_11b ppdu_flags vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter sig_qual_ss0 sig_qual_ant0 sig_qual_ss1
+0031 001f RICE_RSSI_PDOLLOP_NEUS2 0007 sig_qual_ant1 misc_gain_ant0 misc_gain_ant1 agc_avg_pwr_ant0 agc_avg_pwr_ant1 rssi_ant0 rssi_ant1
+# Generated From rice/rice_rssi_debug.xml
+trace_types 96
+RICE_RSSI_PKT_MIN_MAX.min_snr Natural16s
+RICE_RSSI_PKT_MIN_MAX.max_snr Natural16s
+RICE_RSSI_PKT_MIN_MAX.min_rssi Natural16s
+RICE_RSSI_PKT_MIN_MAX.max_rssi Natural16s
+RICE_RSSI_DBM_CONVERSION.mlog Natural16s
+RICE_RSSI_DBM_CONVERSION.elog Natural16s
+RICE_RSSI_DBM_CONVERSION.rssi_dBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.raw_rssi_dbm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.rssi_qdBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.rssi_dBm Natural16s
+RICE_RSSI_PDOLLOP_PREROCK1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_PREROCK1.rssi Natural8
+RICE_RSSI_PDOLLOP_PREROCK1.gain Natural8
+RICE_RSSI_PDOLLOP_CHILLI2.fe_gain Natural8
+RICE_RSSI_VALIDITY2.misc_gain Natural32
+RICE_RSSI_VALIDITY2.raw_rssi_dbm Natural16s
+RICE_RSSI_VALIDITY2.rssi_qdBm Natural16s
+RICE_RSSI_VALIDITY2.rssi_dBm Natural16s
+RICE_RSSI_VALIDITY2.rssi_valid Natural16s
+RICE_RSSI_DIG_GAIN.phy_misc_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.ch_bandwidth Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_misc_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_rssi Natural16s
+RICE_RSSI_VALIDITY.raw_rssi_dbm Natural16s
+RICE_RSSI_VALIDITY.rssi_qdBm Natural16s
+RICE_RSSI_VALIDITY.rssi_dBm Natural16s
+RICE_RSSI_VALIDITY.rssi_valid Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_amplitude Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_phase Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_amplitude_averaged Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_phase_averaged Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_lna_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_mixer_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_bb_dBm Natural16s
+RICE_RSSI_PDOLLOP_POSTROCK1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_POSTROCK1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.signal_quality_ant0 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.signal_quality_ss0 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.misc_gain_ant0_lo Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_CHILLI1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.signal_quality_ant0 Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.signal_quality_ss0 Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.misc_gain_ant0_lo Natural8
+RICE_RSSI_DIG_GAIN2.phy_misc_gain Natural32
+RICE_RSSI_INFO_PER_PKT.rssi_dBm Natural16s
+RICE_RSSI_INFO_PER_PKT.rssi_gain_adjustment_qdB Natural16s
+RICE_RSSI_INFO_PER_PKT.snr Natural16s
+RICE_RSSI_INFO_PER_PKT.rssi_valid Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_amplitude Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_amplitude Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_phase Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_phase Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_amplitude_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_amplitude_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_phase_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_phase_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.average_comp_amplitude_cal_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.average_comp_phase_cal_averaged Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT2.ch_bandwidth Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT2.ppdu_rate Natural32
+RICE_RSSI_FREQ_OFFSET_FAULT2.phy_misc_gain Natural32
+RICE_RSSI_FREQ_OFFSET_FAULT2.phy_rssi Natural16s
+RICE_RSSI_PDOLLOP_NEUS1.ppdu_rate Natural32
+RICE_RSSI_PDOLLOP_NEUS1.antenna_11b Natural8
+RICE_RSSI_PDOLLOP_NEUS1.vhtb_signal Natural8
+RICE_RSSI_PDOLLOP_NEUS1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_NEUS1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ss0 Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ant0 Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ss1 Natural8
+RICE_RSSI_PDOLLOP_PREROCK2.signal_quality_hi Natural8
+RICE_RSSI_PDOLLOP_PREROCK2.sync_counter Natural8
+RICE_RSSI_PDOLLOP_NEUS2.sig_qual_ant1 Natural8
+RICE_RSSI_PDOLLOP_NEUS2.misc_gain_ant0 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.misc_gain_ant1 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.rssi_ant0 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.rssi_ant1 Natural32
+RICE_CHANNEL_RSSI.rssi_dBm Decibels
+RICE_CHANNEL_RSSI.gain_correction_qdBm Natural16s
+RICE_CHANNEL_RSSI.dbg_rssi_dBm Decibels
+RICE_CHANNEL_RSSI.chan_rssi_dBm Decibels
+RICE_RSSI_PER_PKT_FROM_MAC2.raw_rssi_dbm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC2.rssi_qdBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC2.rssi_dBm Natural16s
+RICE_RSSI_PDOLLOP_POSTROCK2.reserved2 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.signal_quality_ant1 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.signal_quality_ss1 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.misc_gain_ant1_lo Natural8
+RICE_RSSI_LNA_MIXER.rssi_valid Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_lin Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_mixer_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_bb_dBm Natural16s
+# Generated From rice/rice_debug.xml
+trace_def 31
+000b 0000 RICE_CHANGE_RADIO_STATE_DONE 0006 radio_state shared_vif_mode rice_freq_half_mhz rice_bandwidth rice_primary_ch_pos rice_tx_pwr_limit_quarter_dbm
+000b 0001 RICE_TRIM_ON_RADIO_CALIBRATION_IND 0003 requested_duration min_usable_duration pending
+000b 0002 RICE_IDLE_ON_RADIO_CALIBRATION_DONE_IND 0000
+000b 0003 RICE_IDLE_OFF_CHANGE_RADIO_STATE 0006 radio_state vif_mode freq_half_mhz bandwith primary_ch_pos tx_pwr_limit_quarter_dbm
+000b 0004 RICE_IDLE_ON_CHANGE_RADIO_STATE 0006 radio_state vif_mode freq_half_mhz bandwith primary_ch_pos tx_pwr_limit_quarter_dbm
+000b 0005 RICE_TRIM_ON_RADIO_CALIBRATION_RESP 0001 schedule_deadline
+000b 0012 RICE_SWITCH_ON_DONE 0000
+000b 0013 RICE_CHANGE_STATE_ESTIMATES_1 0005 start switch_on_off switch_channel finish turned_rf_chip_on
+000b 0014 RICE_CHANGE_STATE_ESTIMATES_2 0005 off_estimate on_estimate switch_scan_estimate switch_cached_estimate switch_uncached_estimate
+000b 0015 RICE_DPD_TRAIN_BST_DONE_MGR 0001 state
+000b 0016 RICE_DPD_TRAIN_BST_DONE_RAD 0001 line_num
+000b 0017 RICE_TRIM_INITIATE 0005 pending trim_duration min_duration wlan_impact bt_impact
+000b 0018 RICE_TRIM_CHECK 0003 pending remaining deadline
+000b 0019 RICE_TRIM_RUN 0004 trim_num pending remaining deadline
+000b 001a RICE_TRIM_RAN_STEP 0003 trim_num step_duration complete
+000b 001b RICE_TRIM_MORE 0005 pending step_time remaining wlan_impact bt_impact
+000b 001c RICE_TRIM_CHANGED_IMPACT 0000
+000b 001d RICE_TRIM_DONE 0001 remaining
+000b 001e RICE_TRIM_REQ_MORE 0005 pending trim_duration min_duration wlan_impact bt_impact
+000b 001f RICE_UPDATE_RADIO_CHANGE_ESTIMATES 0002 ts stage
+000b 0020 RICE_TRIM_LOOKUP 0008 pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0021 RICE_TRIM_MATCH_EXACT 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0022 RICE_TRIM_MATCH_RXONLY_AS_RXTX 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0023 RICE_TRIM_MATCH_PROMOTE 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0024 RICE_TRIM_NEW 0009 idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0025 RICE_TRIM_NOT_FOUND 0009 allow_retrim pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0026 RICE_RADIO_ON 0007 mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0027 RICE_RADIO_OFF 0000
+000b 0028 RICE_RADIO_REQ_ON 0007 mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0029 RICE_RADIO_REQ_OFF 0000
+000b 002a RICE_RETRIM 0001 pending
+# Generated From rice/rice_debug.xml
+trace_types 94
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.allow_retrim Boolean
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.idx Natural16s
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.pcr_id Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.mode Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.channel_mode Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.bw Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.primary_channel_position Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.transmit_power_quarter_dBm Decibels
+RICE_IDLE_ON_CHANGE_RADIO_STATE.tx_pwr_limit_quarter_dbm Decibels
+RICE_CHANGE_STATE_ESTIMATES_1.start Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.switch_on_off Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.switch_channel Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.finish Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.turned_rf_chip_on Boolean
+RICE_CHANGE_STATE_ESTIMATES_2.off_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.on_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_scan_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_cached_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_uncached_estimate Natural32
+RICE_TRIM_LOOKUP.pcr_id Natural8
+RICE_TRIM_LOOKUP.mode Natural8
+RICE_TRIM_LOOKUP.channel_mode Natural8
+RICE_TRIM_LOOKUP.bw Natural8
+RICE_TRIM_LOOKUP.primary_channel_position Natural8
+RICE_TRIM_LOOKUP.transmit_power_quarter_dBm Decibels
+RICE_RADIO_ON.mode Natural8
+RICE_RADIO_ON.channel_mode Natural8
+RICE_RADIO_ON.bw Natural8
+RICE_RADIO_ON.primary_channel_position Natural8
+RICE_RADIO_ON.transmit_power_quarter_dBm Decibels
+RICE_TRIM_RAN_STEP.trim_num Integer8
+RICE_TRIM_RAN_STEP.step_duration Integer32
+RICE_TRIM_RAN_STEP.complete Boolean
+RICE_CHANGE_RADIO_STATE_DONE.rice_tx_pwr_limit_quarter_dbm Decibels
+RICE_TRIM_INITIATE.pending Natural32
+RICE_TRIM_INITIATE.wlan_impact Natural8
+RICE_TRIM_INITIATE.bt_impact Natural8
+RICE_TRIM_NOT_FOUND.allow_retrim Boolean
+RICE_TRIM_NOT_FOUND.pcr_id Natural8
+RICE_TRIM_NOT_FOUND.mode Natural8
+RICE_TRIM_NOT_FOUND.channel_mode Natural8
+RICE_TRIM_NOT_FOUND.bw Natural8
+RICE_TRIM_NOT_FOUND.primary_channel_position Natural8
+RICE_TRIM_NOT_FOUND.transmit_power_quarter_dBm Decibels
+RICE_TRIM_DONE.remaining Natural32
+RICE_RETRIM.pending Natural32
+RICE_RADIO_REQ_ON.mode Natural8
+RICE_RADIO_REQ_ON.channel_mode Natural8
+RICE_RADIO_REQ_ON.bw Natural8
+RICE_RADIO_REQ_ON.primary_channel_position Natural8
+RICE_RADIO_REQ_ON.transmit_power_quarter_dBm Decibels
+RICE_TRIM_MATCH_PROMOTE.allow_retrim Boolean
+RICE_TRIM_MATCH_PROMOTE.idx Natural16s
+RICE_TRIM_MATCH_PROMOTE.pcr_id Natural8
+RICE_TRIM_MATCH_PROMOTE.mode Natural8
+RICE_TRIM_MATCH_PROMOTE.channel_mode Natural8
+RICE_TRIM_MATCH_PROMOTE.bw Natural8
+RICE_TRIM_MATCH_PROMOTE.primary_channel_position Natural8
+RICE_TRIM_MATCH_PROMOTE.transmit_power_quarter_dBm Decibels
+RICE_TRIM_NEW.idx Natural16s
+RICE_TRIM_NEW.pcr_id Natural8
+RICE_TRIM_NEW.mode Natural8
+RICE_TRIM_NEW.channel_mode Natural8
+RICE_TRIM_NEW.bw Natural8
+RICE_TRIM_NEW.primary_channel_position Natural8
+RICE_TRIM_NEW.transmit_power_quarter_dBm Decibels
+RICE_TRIM_CHECK.pending Natural32
+RICE_TRIM_CHECK.remaining Natural32
+RICE_TRIM_CHECK.deadline Natural32
+RICE_DPD_TRAIN_BST_DONE_MGR.state Natural8
+RICE_TRIM_MATCH_EXACT.allow_retrim Boolean
+RICE_TRIM_MATCH_EXACT.idx Natural16s
+RICE_TRIM_MATCH_EXACT.pcr_id Natural8
+RICE_TRIM_MATCH_EXACT.mode Natural8
+RICE_TRIM_MATCH_EXACT.channel_mode Natural8
+RICE_TRIM_MATCH_EXACT.bw Natural8
+RICE_TRIM_MATCH_EXACT.primary_channel_position Natural8
+RICE_TRIM_MATCH_EXACT.transmit_power_quarter_dBm Decibels
+RICE_TRIM_REQ_MORE.pending Natural32
+RICE_TRIM_REQ_MORE.wlan_impact Natural8
+RICE_TRIM_REQ_MORE.bt_impact Natural8
+RICE_IDLE_OFF_CHANGE_RADIO_STATE.tx_pwr_limit_quarter_dbm Decibels
+RICE_TRIM_MORE.pending Natural32
+RICE_TRIM_MORE.step_time Integer32
+RICE_TRIM_MORE.remaining Integer32
+RICE_TRIM_MORE.wlan_impact Natural8
+RICE_TRIM_MORE.bt_impact Natural8
+RICE_TRIM_ON_RADIO_CALIBRATION_RESP.schedule_deadline Natural32
+RICE_TRIM_RUN.trim_num Integer8
+RICE_TRIM_RUN.pending Natural32
+RICE_TRIM_RUN.remaining Integer32
+RICE_TRIM_RUN.deadline Natural32
+RICE_UPDATE_RADIO_CHANGE_ESTIMATES.ts Natural32
+RICE_UPDATE_RADIO_CHANGE_ESTIMATES.stage Natural32
+# Generated From mib/mib_debug.xml
+trace_def 8
+002d 0000 MIB_BMSG_ELEM_ALLOC 0001 address
+002d 0001 MIB_BMSG_ELEM_DEALLOC 0001 address
+002d 0002 MIB_GET 0007 psid_hex psid_dec name value ix0 ix1 success
+002d 0003 MIB_GET_OCTETS 0008 psid_hex psid_dec name length value ix0 ix1 success
+002d 0004 MIB_HOSTOVERRIDE 0002 mib_loc mib_sz
+002d 0005 MIB_SET 0007 psid_hex psid_dec name value ix0 ix1 success
+002d 0006 MIB_SET_OCTETS 0008 psid_hex psid_dec name length value ix0 ix1 success
+002d 0007 Mibkey 0000
+# Generated From mib/mib_debug.xml
+trace_types 22
+MIB_SET.psid_dec Natural16s
+MIB_SET.name Mibkey
+MIB_SET.value Natural32s
+MIB_SET.success Boolean
+MIB_GET_OCTETS.psid_dec Natural16s
+MIB_GET_OCTETS.name Mibkey
+MIB_GET_OCTETS.length Natural8s
+MIB_GET_OCTETS.value Natural16[4]
+MIB_GET_OCTETS.success Boolean
+MIB_HOSTOVERRIDE.mib_loc Natural32
+MIB_HOSTOVERRIDE.mib_sz Natural32
+MIB_GET.psid_dec Natural16s
+MIB_GET.name Mibkey
+MIB_GET.value Natural32s
+MIB_GET.success Boolean
+MIB_BMSG_ELEM_DEALLOC.address Natural32
+MIB_SET_OCTETS.psid_dec Natural16s
+MIB_SET_OCTETS.name Mibkey
+MIB_SET_OCTETS.length Natural8s
+MIB_SET_OCTETS.value Natural16[4]
+MIB_SET_OCTETS.success Boolean
+MIB_BMSG_ELEM_ALLOC.address Natural32
+# Generated From data_plane/dataplane_debug.xml
+trace_def 117
+0019 0000 DATAPLANE_AMPDU_BURSTING 0008 bursting_is_on n_mpdus_to_tx prot_time ampdu_tx_time txop_time_us n_mpdus_queued n_ampdus_to_tx max_mpdus_per_ampdu
+0019 0001 DATAPLANE_ANTENNA_MODE_SWITCH 0002 mac_instance antenna_bitmap
+0019 0002 DATAPLANE_API_FTM_IQ_BUFF 0001 ftm_iq_buff
+0019 0003 DATAPLANE_API_MACRAME_ADDBA_TX 0007 tpri peer_id ba_flags win_size timeout start_seqno max_length
+0019 0004 DATAPLANE_API_MACRAME_CANCEL_DEADLINES 0000
+0019 0005 DATAPLANE_API_MACRAME_CANCEL_FRAME 0004 addr_lo addr_mid addr_hi fc
+0019 0006 DATAPLANE_API_MACRAME_CANCEL_FRAMES 0002 control_tag_mask control_tag_include
+0019 0007 DATAPLANE_API_MACRAME_CANCEL_MLME_DU 0005 addr_lo addr_mid addr_hi control_tag_mask control_tag_include
+0019 0008 DATAPLANE_API_MACRAME_CANCEL_PAUSE_MAC_AT_TIME_REQUEST 0001 mac_instance
+0019 0009 DATAPLANE_API_MACRAME_CLEAR_DPLP 0001 callback
+0019 000a DATAPLANE_API_MACRAME_CLEAR_VIF 0000
+0019 000b DATAPLANE_API_MACRAME_DELBA_TX 0007 tpri peer_id ba_flags win_size timeout start_seqno max_length
+0019 000c DATAPLANE_API_MACRAME_DELETE_VIF 0000
+0019 000d DATAPLANE_API_MACRAME_DE_REGISTER_KEY 0008 addr_lo addr_mid addr_hi key_type crypt_type key_id basic_enc_flags keyflags
+0019 000e DATAPLANE_API_MACRAME_EDCA_CONFIG 0000
+0019 000f DATAPLANE_API_MACRAME_FTM_BURST_ENABLE 0001 enable
+0019 0010 DATAPLANE_API_MACRAME_IML_OFF_IND 0000
+0019 0011 DATAPLANE_API_MACRAME_IML_OFF_REQ 0000
+0019 0012 DATAPLANE_API_MACRAME_IML_ON 0000
+0019 0013 DATAPLANE_API_MACRAME_INIT_QUEUES 0000
+0019 0014 DATAPLANE_API_MACRAME_LOAD_FRAME 0009 Frame_control du_state txrxflags txflags_ex tx_control tx_sw_deadline addr_lo addr_mid addr_hi
+0019 0015 DATAPLANE_API_MACRAME_MAX_AGGR_SIZE_CONFIG 0001 aggr_size
+0019 0016 DATAPLANE_API_MACRAME_OVERRIDE_PARAMS 0001 mask
+0019 0017 DATAPLANE_API_MACRAME_PAUSE_DPLP 0002 callback bitmap
+0019 0018 DATAPLANE_API_MACRAME_PAUSE_DPLP_MSG_QUEUE 0001 callback
+0019 0019 DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST 0003 mac_instance stop_time cb
+0019 001a DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ 0003 saved_rx_start saved_rx_end callback
+0019 001b DATAPLANE_API_MACRAME_PROTECTION_CONFIG 0000
+0019 001c DATAPLANE_API_MACRAME_QUEUE_BEACON 0002 mcast_en deadline
+0019 001d DATAPLANE_API_MACRAME_REGISTER_KEY 0008 addr_lo addr_mid addr_hi key_type crypt_type key_id basic_enc_flags keyflags
+0019 001e DATAPLANE_API_MACRAME_RESUME_DPLP 0002 callback bitmap
+0019 001f DATAPLANE_API_MACRAME_RESUME_DPLP_MSG_QUEUE 0000
+0019 0020 DATAPLANE_API_MACRAME_RESUME_MAC 0001 mac_instance
+0019 0021 DATAPLANE_API_MACRAME_RX_NOTIFY 0000
+0019 0022 DATAPLANE_API_MACRAME_SET_BSS_STA 0003 addr_lo addr_mid addr_hi
+0019 0023 DATAPLANE_API_MACRAME_SET_MIN_TX_RATE 0003 addr_lo addr_mid addr_hi
+0019 0024 DATAPLANE_API_MACRAME_STA_IMPOSED_MIN_TX_RATE 0004 addr_lo addr_mid addr_hi imposed_rate
+0019 0025 DATAPLANE_API_MACRAME_STA_RESET_RATES 0003 addr_lo addr_mid addr_hi
+0019 0026 DATAPLANE_API_MACRAME_TBTT_REQ 0003 deadline stall_time cback
+0019 0027 DATAPLANE_API_MACRAME_TURN_OFF_DPHP 0001 mac_instance
+0019 0028 DATAPLANE_API_MACRAME_TURN_ON_DPHP 0001 mac_instance
+0019 0029 DATAPLANE_API_MACRAME_UPDATE_PS 0000
+0019 002a DATAPLANE_API_MACRAME_VIF_IMPOSE_MIN_TX_RATE 0001 imposed_min_tx_rate
+0019 002b DATAPLANE_API_MLME_RANDOMISE_VIF_SEQ 0000
+0019 002c DATAPLANE_API_MLME_STA_CLEAR_REQUEST 0001 addr
+0019 002d DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST 0003 from_addr drop_enc to_addr
+0019 002e DATAPLANE_API_MLME_STA_PAUSE_REQUST 0002 addr sta_get_num_tx_dus_queued
+0019 002f DATAPLANE_API_MLME_STA_RESUME_REQUEST 0002 addr sta_get_num_tx_dus_queued
+0019 0030 DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ 0003 cmd_time callback instance
+0019 0031 DATAPLANE_CTL_MGR_HW_STATE_CHANGE 0009 instance vif_state_unicast vif_state_bbm tx_n_total_ready tx_n_queued dplp_state_dplane dplp_state_mpdu_hw dplp_state_ampdu_hw dplp_state_bbm
+0019 0032 DATAPLANE_CTL_MGR_PAUSED 0001 cmd_time
+0019 0033 DATAPLANE_CTL_MGR_PAUSE_BBM_REQ 0003 cmd_time callback instance
+0019 0034 DATAPLANE_CTL_MGR_PAUSE_REQ 0003 cmd_time callback instance
+0019 0035 DATAPLANE_CTL_MGR_RESUME_BBM_REQ 0003 cmd_time callback instance
+0019 0036 DATAPLANE_CTL_MGR_RESUME_REQ 0003 cmd_time callback instance
+0019 0037 DATAPLANE_CTL_MGR_RUNNING 0001 cmd_time
+0019 0038 DATAPLANE_DATA_PPDU_TX_FAILURE 0007 dphp_state coex_collision mac_sm_channel_state backoff cca_busy_time cca_busy_duration rx_sync_count
+0019 0039 DATAPLANE_DATA_TX_FAILURE 0008 frame line fc mac_instance tx_status flags ex_flags tx_count
+0019 003a DATAPLANE_DATA_TX_FAILURE_EXTRA 0004 src_pid mac_mod_opts pkt_tag timeout
+0019 003b DATAPLANE_DATA_TX_STATE_LOG 0009 index trans0 trans1 trans2 trans3 trans4 trans5 trans6 trans7
+0019 003c DATAPLANE_DEADLINE_CANCEL_STOP_REQ 0001 mac_instance
+0019 003d DATAPLANE_DEADLINE_RESUME_REQ 0001 mac_instance
+0019 003e DATAPLANE_DEADLINE_STOP_CFM 0003 mac_instance stop_time cb
+0019 003f DATAPLANE_DEADLINE_STOP_REQ 0003 mac_instance stop_time cb
+0019 0040 DATAPLANE_DPHP_MON_LOG 0007 log_start_l log_start_h start_index end_index entry_size num_entries_in_log failed_log_allocations
+0019 0041 DATAPLANE_DPHP_PEER_DEREGISTER 0004 addr_lo addr_mid addr_hi peer_index
+0019 0042 DATAPLANE_DPHP_PEER_REGISTER 0004 addr_lo addr_mid addr_hi peer_index
+0019 0043 DATAPLANE_DPLP_MSG 0002 loc info
+0019 0044 DATAPLANE_HW_PUMP_AMPDU_IGNORE_MAC 0001 mac_instance
+0019 0045 DATAPLANE_HW_PUMP_IGNORE_MAC 0001 mac_instance
+0019 0046 DATAPLANE_LAA_CUR_RATE_STAT 0004 result per throughput mpdus
+0019 0047 DATAPLANE_LAA_GOOD_AVG_PER 0004 pdu_num mpdu_succ_num mpdu_fail_num current_rate
+0019 0048 DATAPLANE_LAA_INSTALL_RATE 0003 cur_rate old_rate mtper
+0019 0049 DATAPLANE_LAA_INSTALL_RATE_EXTRA 0006 fallback_n_entries f0_rate f1_rate f2_rate f3_rate f4_rate
+0019 004a DATAPLANE_LAA_PRV_RATE_STAT 0003 per throughput mpdus
+0019 004b DATAPLANE_LAA_RATE_CHANGED 0005 action sgi nss bw_idx mcs
+0019 004c DATAPLANE_LAA_RATE_STAT 0006 action rate n_pdu n_no_ba n_mpdu_succ n_mpdu_fail
+0019 004d DATAPLANE_LAA_RESET_STA 0008 association_type cur_rate nss_bits bw_bits mcs_bits_11b mcs_bits_11a mcs_bits_ht mcs_bits_vht
+0019 004e DATAPLANE_LAA_SCBRD_STATS_1 000a fallback_n_entries cur_n_mpdu_succ cur_n_mpdu_fail cur_n_pdu cur_n_no_ba n_pdu_not_counted n_ba_missed n_prot_failed n_ppdu_req n_ba_received
+0019 004f DATAPLANE_LAA_SCBRD_STATS_2 000a f0_mpdu_succ f0_mpdu_fail f1_mpdu_succ f1_mpdu_fail f2_mpdu_succ f2_mpdu_fail f3_mpdu_succ f3_mpdu_fail f4_mpdu_succ f4_mpdu_fail
+0019 0050 DATAPLANE_LAA_STATE_CHANGE 0007 state old_state last_evt drop_rtsel n_drop_fail_in_row spec_rtsel spec_result
+0019 0051 DATAPLANE_LAA_TRACE_SM 0004 state expire_at_hi expire_at_lo evt
+0019 0052 DATAPLANE_LIVE_RESTART 0001 mac_instance
+0019 0053 DATAPLANE_MSG 0001 status
+0019 0054 DATAPLANE_PAUSED_STA 0005 addr_lo addr_mid addr_hi dp_sta_op_flags n_tx_dus_queued
+0019 0055 DATAPLANE_PEER_MGR_PEER_DISABLE 0005 addr_lo addr_mid addr_hi peer_index disablement_reason
+0019 0056 DATAPLANE_PEER_MGR_PEER_ENABLE 0005 addr_lo addr_mid addr_hi peer_index enablement_reason
+0019 0057 DATAPLANE_PEER_MGR_PEER_FRAMES_CANCELLED 0002 peer_index other_peer_n_frames
+0019 0058 DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES 0005 entry_0 entry_1 entry_2 entry_3 entry_4
+0019 0059 DATAPLANE_REG_BFEE 0003 addr_lo addr_mid addr_hi
+0019 005a DATAPLANE_REG_BFER 0003 addr_lo addr_mid addr_hi
+0019 005b DATAPLANE_RESUMED_STA 0006 addr_lo addr_mid addr_hi pause_type dp_sta_op_flags n_tx_dus_queued
+0019 005c DATAPLANE_RX_DISCARDED 0003 fc discard_reason seqno
+0019 005d DATAPLANE_RX_PHY_INFO 000a rate rssi snr is_ctrl payload_us fcs_good fcs_error bad_sig cca_busy rx_started_us
+0019 005e DATAPLANE_STA_CREATE_FALLBACK_TABLE 0005 addr_lo addr_mid addr_hi starting_hw_rate min_hw_rate
+0019 005f DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA 0007 frame_type long_frame fallback_tbl default_supported_rates supported_rates ht_mcs_rates vht_mcs_rates
+0019 0060 DATAPLANE_STA_DELETE_FALLBACK_TABLE 0004 addr_lo addr_mid addr_hi fallback_tbl
+0019 0061 DATAPLANE_STA_INSTALL_FALLBACK_TABLES 0007 addr_lo addr_mid addr_hi curr_sta_rate min_rate short_fallback_tbl long_fallback_tbl
+0019 0062 DATAPLANE_STA_RATE_IMPOSED_MIN_TX_RATE 0008 addr_lo addr_mid addr_hi imposed_rate coex_supported_rates_mask coex_ht_rates_mask supported_rates_mask ht_rates_mask
+0019 0063 DATAPLANE_STA_RATE_INSTALL_RATE 0005 addr_lo addr_mid addr_hi curr_sta_rate install_fallback_tbls
+0019 0064 DATAPLANE_STA_RESET_RATES 0009 addr_lo addr_mid addr_hi bandwidth channel_freq association_type supported_rates ht_mcs_rates vht_mcs_rates
+0019 0065 DATAPLANE_STA_RESET_RATES_STA_CAPS 0001 sta_caps
+0019 0066 DATAPLANE_STA_TIMEOUT_PARKED_FRAMES 0005 addr_lo addr_mid addr_hi dp_sta_op_flags count
+0019 0067 DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES 0004 addr_lo addr_mid addr_hi curr_sta_rate
+0019 0068 DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA 0004 short_tbl_ref_count short_fallback_tbl long_tbl_ref_count long_fallback_tbl
+0019 0069 DATAPLANE_TPUT_DIAG 0002 mib_count mac_instance
+0019 006a DATAPLANE_TX_CFM 000a frame_control seq_frag cfm_rate flags success failure tx_n_total_ready tx_n_queued tx_spent_32us tx_started_us
+0019 006b DATAPLANE_VIF_RESET_RATES 0000
+0019 006c DATAPLANE_WMMAC_DOWNGRADE 0006 downgraded_from_ac downgraded_to_ac txop_limit ecw_min ecw_max aifs
+0019 006d DATAPLANE_WMMAC_MEDIUM_TIME_SPENT 0002 mac_ac medium_time_spent
+0019 006e DATAPLANE_WMMAC_QUEUE_STALLED 0001 dpif_queue
+0019 006f DATAPLANE_WMMAC_RESTORE 0005 restored_ac txop_limit ecw_min ecw_max aifs
+0019 0070 DATAPLANE_WMMAC_SET_MEDIUM_TIME 0002 mac_ac medium_time
+0019 0071 DATAPLANE_WMMAC_TIMER_END 0004 mac_ac ac_admitted ac_remaining ac_monitor_time
+0019 0072 DATAPLANE_WMMAC_TIMER_START 0004 mac_ac ac_admitted ac_remaining ac_monitor_time
+0019 0073 DPLANE_API_MACRAME_SET_TX_BURST_TIME 0004 mac_instance mac_ac_category burst_time type
+0019 0074 LMIF_TPUT_DIAG 0002 ncounters mac_instance
+# Generated From data_plane/dataplane_debug.xml
+trace_types 134
+DATAPLANE_LAA_CUR_RATE_STAT.result Boolean
+DATAPLANE_API_MACRAME_QUEUE_BEACON.mcast_en Boolean
+DATAPLANE_API_MACRAME_QUEUE_BEACON.deadline Natural32
+DATAPLANE_API_MACRAME_CLEAR_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_PAUSE_DPLP_MSG_QUEUE.callback Natural32
+DATAPLANE_CTL_MGR_PAUSED.cmd_time Natural32
+DATAPLANE_TX_CFM.success Natural8
+DATAPLANE_TX_CFM.failure Natural8
+DATAPLANE_TX_CFM.tx_started_us Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.curr_sta_rate Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.min_rate Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.short_fallback_tbl Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.long_fallback_tbl Natural32
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.mac_ac_category mac_access_category
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.burst_time Natural8
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.type BURST_TYPE_T
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.callback Natural32
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.instance Natural32
+DATAPLANE_ANTENNA_MODE_SWITCH.mac_instance Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.saved_rx_start Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.saved_rx_end Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.callback Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.short_tbl_ref_count Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.short_fallback_tbl Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.long_tbl_ref_count Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.long_fallback_tbl Natural32
+DATAPLANE_DEADLINE_STOP_CFM.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_CFM.stop_time Natural32
+DATAPLANE_DEADLINE_STOP_CFM.cb Natural32
+DATAPLANE_LAA_RESET_STA.cur_rate Natural32
+DATAPLANE_AMPDU_BURSTING.n_mpdus_to_tx Natural32
+DATAPLANE_AMPDU_BURSTING.prot_time Natural32
+DATAPLANE_AMPDU_BURSTING.ampdu_tx_time Natural32
+DATAPLANE_AMPDU_BURSTING.txop_time_us Natural32
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.instance Natural32
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.vif_state_unicast Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.vif_state_bbm Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_dplane Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_mpdu_hw Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_ampdu_hw Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_bbm Natural8
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.mac_instance Natural32
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.stop_time Natural32
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.cb Natural32
+DATAPLANE_PEER_MGR_PEER_FRAMES_CANCELLED.other_peer_n_frames Natural32
+DATAPLANE_DATA_TX_FAILURE_EXTRA.mac_mod_opts Natural32
+DATAPLANE_DATA_TX_FAILURE_EXTRA.timeout Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f0_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f1_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f2_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f3_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f4_rate Natural32
+DATAPLANE_API_MACRAME_CANCEL_FRAMES.control_tag_mask Natural64
+DATAPLANE_API_MACRAME_CANCEL_FRAMES.control_tag_include Natural64
+DATAPLANE_DEADLINE_CANCEL_STOP_REQ.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_REQ.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_REQ.stop_time Natural32
+DATAPLANE_DEADLINE_STOP_REQ.cb Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA.long_frame Boolean
+DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA.fallback_tbl Boolean
+DATAPLANE_STA_RESET_RATES_STA_CAPS.sta_caps Natural64
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.callback Natural32
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.instance Natural32
+DATAPLANE_CTL_MGR_RUNNING.cmd_time Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES.curr_sta_rate Natural32
+DATAPLANE_HW_PUMP_AMPDU_IGNORE_MAC.mac_instance Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.deadline Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.stall_time Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.cback Natural32
+DATAPLANE_HW_PUMP_IGNORE_MAC.mac_instance Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE.starting_hw_rate Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE.min_hw_rate Natural32
+DATAPLANE_API_MACRAME_RESUME_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_RESUME_DPLP.bitmap Natural8
+DATAPLANE_API_MACRAME_DELBA_TX.max_length Natural32
+DATAPLANE_API_MACRAME_ADDBA_TX.max_length Natural32
+DATAPLANE_API_MACRAME_CANCEL_PAUSE_MAC_AT_TIME_REQUEST.mac_instance Natural32
+DATAPLANE_API_MLME_STA_RESUME_REQUEST.addr MAC_Address
+DATAPLANE_API_MACRAME_TURN_OFF_DPHP.mac_instance Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_0 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_1 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_2 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_3 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_4 Natural8
+DATAPLANE_API_MACRAME_CANCEL_MLME_DU.control_tag_mask Natural64
+DATAPLANE_API_MACRAME_CANCEL_MLME_DU.control_tag_include Natural64
+DATAPLANE_API_MACRAME_PAUSE_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_PAUSE_DPLP.bitmap Natural8
+DATAPLANE_API_MACRAME_TURN_ON_DPHP.mac_instance Natural8
+DATAPLANE_API_MACRAME_FTM_BURST_ENABLE.enable Boolean
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.from_addr MAC_Address
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.drop_enc Boolean
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.to_addr MAC_Address
+DATAPLANE_API_MLME_STA_CLEAR_REQUEST.addr MAC_Address
+DATAPLANE_LAA_RATE_STAT.rate Natural32
+DATAPLANE_API_MACRAME_RESUME_MAC.mac_instance Natural32
+DATAPLANE_STA_DELETE_FALLBACK_TABLE.fallback_tbl Natural32
+DATAPLANE_DEADLINE_RESUME_REQ.mac_instance Natural32
+DATAPLANE_RX_PHY_INFO.rate Natural32
+DATAPLANE_RX_PHY_INFO.rssi Natural8
+DATAPLANE_RX_PHY_INFO.snr Natural8
+DATAPLANE_RX_PHY_INFO.is_ctrl Natural8
+DATAPLANE_RX_PHY_INFO.rx_started_us Natural32
+DATAPLANE_DATA_TX_FAILURE.frame MBULK
+DATAPLANE_DATA_TX_FAILURE.mac_instance Natural8
+DATAPLANE_DATA_TX_FAILURE.tx_count Natural8
+DATAPLANE_API_MLME_STA_PAUSE_REQUST.addr MAC_Address
+DATAPLANE_DATA_PPDU_TX_FAILURE.dphp_state Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.coex_collision Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.mac_sm_channel_state Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.cca_busy_time Natural32
+DATAPLANE_DATA_PPDU_TX_FAILURE.cca_busy_duration Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.callback Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.instance Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.callback Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.instance Natural32
+DATAPLANE_API_FTM_IQ_BUFF.ftm_iq_buff Natural32
+DATAPLANE_DPLP_MSG.loc Natural32
+DATAPLANE_DPLP_MSG.info Natural32
+DATAPLANE_LAA_INSTALL_RATE.cur_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE.old_rate Natural32
+DATAPLANE_STA_RATE_INSTALL_RATE.curr_sta_rate Natural32
+DATAPLANE_STA_RATE_INSTALL_RATE.install_fallback_tbls Boolean
+DATAPLANE_API_MACRAME_OVERRIDE_PARAMS.mask Natural32
+DATAPLANE_LAA_GOOD_AVG_PER.current_rate Natural32
+DATAPLANE_API_MACRAME_LOAD_FRAME.tx_sw_deadline Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.callback Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.instance Natural32
+DATAPLANE_API_MACRAME_MAX_AGGR_SIZE_CONFIG.aggr_size Natural32
+# Generated From smapper/smapper_debug.xml
+trace_def 2
+0043 0000 SMAPPER_START 0000
+0043 0001 SMAPPER_STOP 0000
+# Generated From smapper/smapper_debug.xml
+# Generated From bist/bist_debug.xml
+trace_def 7
+003e 0000 BIST_GAIN 0001 sat_gain
+003e 0001 BIST_GET_TX_GAIN_REQ 0003 freq tx_gain rx_gain
+003e 0002 BIST_SHIFT_SWEEP 0003 i q shift
+003e 0003 BIST_RX_BUF_GAIN 0002 rx_bb1 rx_bb2
+003e 0004 BIST_SIG_ANAL 0002 sig_anal_cfg sig_anal_freq
+003e 0005 BIST_SIG_GEN 0005 sig_gen_cfg sig_gen_cfg2 sig_gen_freq1 sig_gen_freq2 sig_gen_phase
+003e 0006 BIST_MAGNITUDE_INCREASE 0007 i q mag_squared mag_squared_threshold attempt tx_gain rx_gain
+# Generated From bist/bist_debug.xml
+trace_types 17
+BIST_SIG_GEN.sig_gen_cfg Natural32
+BIST_SIG_GEN.sig_gen_cfg2 Natural32
+BIST_SIG_GEN.sig_gen_freq1 Natural32
+BIST_SIG_GEN.sig_gen_freq2 Natural32
+BIST_SIG_GEN.sig_gen_phase Natural32
+BIST_SHIFT_SWEEP.i Natural32s
+BIST_SHIFT_SWEEP.q Natural32s
+BIST_GAIN.sat_gain Natural32
+BIST_MAGNITUDE_INCREASE.i Natural16s
+BIST_MAGNITUDE_INCREASE.q Natural16s
+BIST_MAGNITUDE_INCREASE.mag_squared Natural32
+BIST_MAGNITUDE_INCREASE.mag_squared_threshold Natural32
+BIST_MAGNITUDE_INCREASE.attempt Natural8s
+BIST_MAGNITUDE_INCREASE.tx_gain Natural8s
+BIST_MAGNITUDE_INCREASE.rx_gain Natural8s
+BIST_SIG_ANAL.sig_anal_cfg Natural32
+BIST_SIG_ANAL.sig_anal_freq Natural32
+# Generated From lower_mac/lmif_debug.xml
+trace_def 2
+0047 0000 LMIF_COUNTERS_REPORT 0007 MAC_DOT11_FCS_GOOD_COUNT MAC_DOT11_FCS_ERROR_COUNT MAC_BAD_SIG_COUNT MAC_NO_ACK_COUNT MAC_DOT11_RX_AMPDUS_COUNT MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT
+0047 0001 LMIF_COUNTERS_REPORT_2 0001 MAC_DOT11_ERROR_COUNT
+# Generated From lower_mac/lmif_debug.xml
+trace_types 5
+LMIF_COUNTERS_REPORT_2.MAC_DOT11_ERROR_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_DOT11_FCS_GOOD_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_DOT11_FCS_ERROR_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_BAD_SIG_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_NO_ACK_COUNT Natural32
+# Generated From mlme_hard/mlme_tdls/mlme_tdls_debug.xml
+trace_def 23
+0023 0000 MLME_TDLS_CHANNEL_CONFIG 0002 primary_freq channel_info
+0023 0001 MLME_TDLS_DISCOVERY_EVENT_RETRIEVED 0000
+0023 0002 MLME_TDLS_DISCOVERY_EVENT_SAVED 0003 address found space
+0023 0003 MLME_TDLS_FILTER_MATCH 0003 action_type address link_state
+0023 0004 MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1 0002 tdls_allowed rssi
+0023 0005 MLME_TDLS_FRAME_DISCOVERY_RESPONSE_2 0001 address
+0023 0006 MLME_TDLS_HOST_ACTION_REQUEST 0002 action address
+0023 0007 MLME_TDLS_INIT 0003 tdls_activated coex_activated p2p_activated
+0023 0008 MLME_TDLS_PEER_DISCOVERY_REQUEST 0001 tdls_allowed
+0023 0009 MLME_TDLS_PEER_SETUP_CONFIRM 0002 address link_state
+0023 000a MLME_TDLS_PEER_SETUP_REQUEST 0001 secure_link
+0023 000b MLME_TDLS_PEER_SETUP_REQUEST_RETRIEVED 0001 address
+0023 000c MLME_TDLS_PEER_SETUP_REQUEST_SAVED 0001 address
+0023 000d MLME_TDLS_PEER_SETUP_RESPONSE 0002 address link_state
+0023 000e MLME_TDLS_PEER_TEARDOWN_REQUEST 0002 address link_state
+0023 000f MLME_TDLS_SENDING_ACTION_FRAME 0002 frame_type address
+0023 0010 MLME_TDLS_STATUS_CHANGED 0005 new_state_is_active is_in_teardown coex_activated mvif_activated channel_switch
+0023 0011 MLME_TDLS_TERMINATE_LINK 0001 index
+0023 0012 MLME_TDLS_TERMINATE_LINK_DURING_SETUP 0001 index
+0023 0013 MLME_TDLS_TERMINATE_ONE 0002 address tx_frame
+0023 0014 MLME_TDLS_TERMINATE_THREE 0001 address
+0023 0015 MLME_TDLS_TERMINATE_TWO 0003 address paused confirming
+0023 0016 MLME_TDLS_TRAFFIC_STATISTICS 0006 address tdls_link_established packet_cnt_tx packet_cnt_rx tx_above_threshold rx_above_threshold
+# Generated From mlme_hard/mlme_tdls/mlme_tdls_debug.xml
+trace_types 44
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_2.address MAC_Address
+MLME_TDLS_PEER_DISCOVERY_REQUEST.tdls_allowed Boolean
+MLME_TDLS_PEER_SETUP_REQUEST.secure_link Boolean
+MLME_TDLS_PEER_SETUP_CONFIRM.address MAC_Address
+MLME_TDLS_PEER_SETUP_CONFIRM.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_INIT.tdls_activated Boolean
+MLME_TDLS_INIT.coex_activated Boolean
+MLME_TDLS_INIT.p2p_activated Boolean
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1.tdls_allowed Boolean
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1.rssi Natural16s
+MLME_TDLS_PEER_SETUP_RESPONSE.address MAC_Address
+MLME_TDLS_PEER_SETUP_RESPONSE.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_PEER_SETUP_REQUEST_RETRIEVED.address MAC_Address
+MLME_TDLS_TRAFFIC_STATISTICS.address MAC_Address
+MLME_TDLS_TRAFFIC_STATISTICS.tdls_link_established Boolean
+MLME_TDLS_TRAFFIC_STATISTICS.packet_cnt_tx Natural32
+MLME_TDLS_TRAFFIC_STATISTICS.packet_cnt_rx Natural32
+MLME_TDLS_TRAFFIC_STATISTICS.tx_above_threshold Boolean
+MLME_TDLS_TRAFFIC_STATISTICS.rx_above_threshold Boolean
+MLME_TDLS_HOST_ACTION_REQUEST.address MAC_Address
+MLME_TDLS_FILTER_MATCH.action_type Natural8
+MLME_TDLS_FILTER_MATCH.address MAC_Address
+MLME_TDLS_FILTER_MATCH.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_DISCOVERY_EVENT_SAVED.address MAC_Address
+MLME_TDLS_DISCOVERY_EVENT_SAVED.found Natural32
+MLME_TDLS_DISCOVERY_EVENT_SAVED.space Natural32
+MLME_TDLS_TERMINATE_ONE.address MAC_Address
+MLME_TDLS_TERMINATE_ONE.tx_frame Boolean
+MLME_TDLS_PEER_TEARDOWN_REQUEST.address MAC_Address
+MLME_TDLS_PEER_TEARDOWN_REQUEST.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_TERMINATE_THREE.address MAC_Address
+MLME_TDLS_CHANNEL_CONFIG.primary_freq Channel_Frequency
+MLME_TDLS_CHANNEL_CONFIG.channel_info Channel_Information
+MLME_TDLS_SENDING_ACTION_FRAME.frame_type DEBUG_TYPE_TDLS_ACTION_FRAME
+MLME_TDLS_SENDING_ACTION_FRAME.address MAC_Address
+MLME_TDLS_PEER_SETUP_REQUEST_SAVED.address MAC_Address
+MLME_TDLS_STATUS_CHANGED.new_state_is_active Boolean
+MLME_TDLS_STATUS_CHANGED.is_in_teardown Boolean
+MLME_TDLS_STATUS_CHANGED.coex_activated Boolean
+MLME_TDLS_STATUS_CHANGED.mvif_activated Boolean
+MLME_TDLS_STATUS_CHANGED.channel_switch Boolean
+MLME_TDLS_TERMINATE_TWO.address MAC_Address
+MLME_TDLS_TERMINATE_TWO.paused Boolean
+MLME_TDLS_TERMINATE_TWO.confirming Boolean
+DEBUG_TYPE_TDLS_ACTION_FRAME Enum 00 Setup_Request 01 Setup_Response 02 Setup_Confirm 03 Teardown_Request 04 Peer_Traffic_Ind 07 Peer_Psm_Request 08 Peer_Psm_Response 09 Peer_Traffic_Rsp 0a Discovery_Request 0e Discovery_Response
+DEBUG_TYPE_TDLS_LINK_STATE Enum 00 Idle 01 Waiting_For_Setup_Response 02 Waiting_For_Setup_Confirm 03 Established 04 In_Teardown
+# Generated From mlme_hard/mlme_frame/mlme_frame_debug.xml
+trace_def 7
+003f 0000 MLME_FRAME_BUILD_ASSOC_FRAME_ACM 0004 old_aci_aifsn new_aci_aifsn old_acm new_acm
+003f 0001 MLME_FRAME_BUILD_ASSOC_FRAME_ACM_RIC_COPIED 0002 coped_bytes resource_descriptor_count
+003f 0002 MLME_FRAME_BUILD_FRAME 0003 build frametype line
+003f 0003 MLME_FRAME_ECSA_INCLUDE_IN_BEACON 0005 now new_primary_channel new_channel_info channel_switch_count channel_switch_mode
+003f 0004 MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED 0003 current_offset frame_max_length attribute_size
+003f 0005 MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE 0007 valid hop_lim checksum len tgt dst ll_opt
+003f 0006 MLME_FRAME_STA_RECORD_CAPS_UPDATED 0002 sta_caps_current sta_caps_new
+# Generated From mlme_hard/mlme_frame/mlme_frame_debug.xml
+trace_types 21
+MLME_FRAME_STA_RECORD_CAPS_UPDATED.sta_caps_current Natural32
+MLME_FRAME_STA_RECORD_CAPS_UPDATED.sta_caps_new Natural32
+MLME_FRAME_BUILD_FRAME.build Boolean
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.now Natural32
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.new_primary_channel Integer8
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.channel_switch_count Integer8
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.channel_switch_mode Integer8
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.valid Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.hop_lim Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.checksum Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.len Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.tgt Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.dst Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.ll_opt Boolean
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.current_offset Natural32
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.frame_max_length Natural32
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.attribute_size Natural32
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.old_aci_aifsn Natural8
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.new_aci_aifsn Natural8
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.old_acm Boolean
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.new_acm Boolean
+# Generated From mlme_hard/mlme_mpdu_router/mlme_mpdu_router_debug.xml
+trace_def 13
+0006 0000 MLME_MPDU_FILTER_ADD 0002 filter_id mode
+0006 0001 MLME_MPDU_FRAME_FILTER 0003 pid Channel_Frequency bssid
+0006 0002 MLME_MPDU_FRAME_FILTERED_ADDR 0002 filter_addr frame_addr
+0006 0003 MLME_MPDU_FRAME_FILTERED_FREQ 0002 filter_freq frame_freq
+0006 0004 MLME_MPDU_FRAME_FILTERED_SSID 0001 frame
+0006 0005 MLME_MPDU_FRAME_MATCH 0003 pid subscribe_flags frame_flags
+0006 0006 MLME_MPDU_HOST_FILTER_MATCH 0000
+0006 0007 MLME_MPDU_MANAGEMENT_FRAME_FILTERED 0000
+0006 0008 MLME_MPDU_ROUTER_DEREGISTER_EXTERNAL 0000
+0006 0009 MLME_MPDU_ROUTER_DEREGISTER_INTERNAL 0001 pid
+0006 000a MLME_MPDU_ROUTER_FRAME 0003 type subtype subscribe_flags
+0006 000b MLME_MPDU_ROUTER_REGISTER_EXTERNAL 0000
+0006 000c MLME_MPDU_ROUTER_REGISTER_INTERNAL 0002 pid subscribe_flags
+# Generated From mlme_hard/mlme_mpdu_router/mlme_mpdu_router_debug.xml
+trace_types 17
+MLME_MPDU_FRAME_FILTERED_SSID.frame MBULK
+MLME_MPDU_ROUTER_REGISTER_INTERNAL.pid FsmProcessId
+MLME_MPDU_ROUTER_REGISTER_INTERNAL.subscribe_flags Natural32
+MLME_MPDU_ROUTER_DEREGISTER_INTERNAL.pid FsmProcessId
+MLME_MPDU_FRAME_FILTERED_ADDR.filter_addr MAC_Address
+MLME_MPDU_FRAME_FILTERED_ADDR.frame_addr MAC_Address
+MLME_MPDU_ROUTER_FRAME.subscribe_flags Natural32
+MLME_MPDU_FRAME_MATCH.pid FsmProcessId
+MLME_MPDU_FRAME_MATCH.subscribe_flags Natural32
+MLME_MPDU_FRAME_MATCH.frame_flags Natural32
+MLME_MPDU_FRAME_FILTER.pid FsmProcessId
+MLME_MPDU_FRAME_FILTER.Channel_Frequency Channel_Frequency
+MLME_MPDU_FRAME_FILTER.bssid MAC_Address
+MLME_MPDU_FILTER_ADD.filter_id Natural8
+MLME_MPDU_FILTER_ADD.mode Natural8
+MLME_MPDU_FRAME_FILTERED_FREQ.filter_freq Channel_Frequency
+MLME_MPDU_FRAME_FILTERED_FREQ.frame_freq Channel_Frequency
+# Generated From mlme_hard/mlme_txpower/mlme_txpower_debug.xml
+trace_def 4
+0036 0000 MLME_TXPOWER_INFO 000b channel_freq channel_info maximum reg_dom network sar nocell user tpc lte_coex minimum
+0036 0001 MLME_TXPOWER_LTE_COEX_POWER_REDUCTION 0004 current_centre_freq current_channel_info current_occupied_mask power_reduction_channel_mask
+0036 0002 MLME_TXPOWER_NETWORK 0006 envelope envelope_limit_20Mhz envelope_limit_channel_bw constraint constraint_limit calculated_limit
+0036 0003 MLME_TXPOWER_NETWORK_UPDATE 0002 new_limit old_limit
+# Generated From mlme_hard/mlme_txpower/mlme_txpower_debug.xml
+trace_types 21
+MLME_TXPOWER_NETWORK_UPDATE.new_limit Integer8
+MLME_TXPOWER_NETWORK_UPDATE.old_limit Integer8
+MLME_TXPOWER_INFO.channel_freq Channel_Frequency
+MLME_TXPOWER_INFO.channel_info Channel_Information
+MLME_TXPOWER_INFO.maximum Integer8
+MLME_TXPOWER_INFO.reg_dom Integer8
+MLME_TXPOWER_INFO.network Integer8
+MLME_TXPOWER_INFO.sar Integer8
+MLME_TXPOWER_INFO.nocell Integer8
+MLME_TXPOWER_INFO.user Integer8
+MLME_TXPOWER_INFO.tpc Integer8
+MLME_TXPOWER_INFO.lte_coex Integer8
+MLME_TXPOWER_INFO.minimum Integer8
+MLME_TXPOWER_NETWORK.envelope Boolean
+MLME_TXPOWER_NETWORK.envelope_limit_20Mhz Integer8
+MLME_TXPOWER_NETWORK.envelope_limit_channel_bw Integer8
+MLME_TXPOWER_NETWORK.constraint Boolean
+MLME_TXPOWER_NETWORK.constraint_limit Integer8
+MLME_TXPOWER_NETWORK.calculated_limit Integer8
+MLME_TXPOWER_LTE_COEX_POWER_REDUCTION.current_occupied_mask Natural64
+MLME_TXPOWER_LTE_COEX_POWER_REDUCTION.power_reduction_channel_mask Natural64
+# Generated From mlme_hard/mlme_ap/mlme_ap_debug.xml
+trace_def 5
+0014 0000 MLME_AP_AID 0001 aid
+0014 0001 MLME_AP_CONNECT_STATUS 0002 address info
+0014 0002 MLME_AP_FRAMETX 0001 status
+0014 0003 MLME_AP_RECORD_FLAGS 0005 address state aid mlme_connected_ind mlme_started_ind
+0014 0004 MLME_AP_RSN 0003 version group_cipher pairwise_ciphers
+# Generated From mlme_hard/mlme_ap/mlme_ap_debug.xml
+trace_types 6
+MLME_AP_CONNECT_STATUS.address MAC_Address
+MLME_AP_CONNECT_STATUS.info DEBUG_TYPE_AP_CONNECT_STATUS_VALUE
+MLME_AP_RECORD_FLAGS.address MAC_Address
+MLME_AP_RECORD_FLAGS.state MLME_STATION_RECORD_STATES
+MLME_AP_RECORD_FLAGS.mlme_connected_ind Boolean
+MLME_AP_RECORD_FLAGS.mlme_started_ind Boolean
+DEBUG_TYPE_AP_CONNECT_STATUS Enum 1000 deauth_sta_unknown 1001 deauth_from_sta_not_associated 1002 deauth_from_sta 1003 auth_from_sta_unknown 1004 auth_from_sta_known 1005 auth_declined_acl 1006 auth_declined_shared_auth 1007 auth_declined_seq_num 1008 auth_success 1009 assoc_from_sta_unknown 100a assoc_from_sta_known 100b assoc_no_free_aid 100c assoc_rates_mismatch 100d assoc_sec_mismatch 100e assoc_failure 100f assoc_success 1010 tkip_assoc_no_ht_allowed 1011 auth_pmf_in_use 1011 sa_query_failed
+# Generated From mlme_hard/mlme_vifctrl/mlme_vifctrl_debug.xml
+trace_def 67
+0008 0000 MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION 0005 primary_freq channel_info is_environment_40mhz_intolerant allowed_to_increase_bandwidth bandwidth_updated
+0008 0001 MLME_VIFCTRL_AP_FAILURE 0002 bssid reason
+0008 0002 MLME_VIFCTRL_ARP_DETECT 0003 action target_ip_address is_tracking_arp
+0008 0003 MLME_VIFCTRL_ARP_DETECT_IP_CHECK 0002 target_ip_address dst_ip_address
+0008 0004 MLME_VIFCTRL_ARP_OFFLOAD 0004 opcode sha spa tpa
+0008 0005 MLME_VIFCTRL_ARP_OFFLOAD_REPLY 0004 opcode tha spa tpa
+0008 0006 MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED 0002 enabled vif_type
+0008 0007 MLME_VIFCTRL_ASSIST_ACTIVE 0002 flavour active
+0008 0008 MLME_VIFCTRL_ASSIST_DHCP_FRAME 0001 flavour
+0008 0009 MLME_VIFCTRL_ASSIST_RA_FRAME 0002 frame line
+0008 000a MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES 0004 elapsed_time router_lifetime valid_lifetime preferred_lifetime
+0008 000b MLME_VIFCTRL_ASSIST_TIMER 0001 timer_id
+0008 000c MLME_VIFCTRL_BEACON_FORWARD 0001 enabled
+0008 000d MLME_VIFCTRL_BEACON_UPDATE 0001 now
+0008 000e MLME_VIFCTRL_CHANGED_AP_CHANNEL 0003 is_sta_preparing_channel_switch sta_primary_freq ap_proposed_primary_freq
+0008 000f MLME_VIFCTRL_CHANGE_BSS_REQ 0004 from_bssid from_freq to_bssid to_freq
+0008 0010 MLME_VIFCTRL_CHANNEL_CONFIG 0005 primary_freq centre_freq channel_info max_air_power form_max_air_power
+0008 0011 MLME_VIFCTRL_CONNECTION_RESUMED 0001 same_channel
+0008 0012 MLME_VIFCTRL_DEAUTH_FRAME_DROPPED_PMF 0002 fsubtype reason_code
+0008 0013 MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS 0003 pid priority direction
+0008 0014 MLME_VIFCTRL_DESCHEDULED 0002 pid line
+0008 0015 MLME_VIFCTRL_ECSA_COUNT_FINISHED 0003 now channel_switch_count channel_switch_time
+0008 0016 MLME_VIFCTRL_ECSA_RECEIVED 0003 new_primary_channel_number channel_switch_count channel_switch_mode
+0008 0017 MLME_VIFCTRL_ECSA_SEND_ACTION 0005 now bssid new_primary_channel new_channel_info channel_switch_count
+0008 0018 MLME_VIFCTRL_ECSA_TIMEOUT 0004 now new_channel_number new_channel_info channel_switch_count
+0008 0019 MLME_VIFCTRL_EVAL_BEACON_FLAGS 0002 current evaluated
+0008 001a MLME_VIFCTRL_FRAMETX 0001 status
+0008 001b MLME_VIFCTRL_INACTIVITY 0002 interval now
+0008 001c MLME_VIFCTRL_INACTIVITY_KICK_DO 0000
+0008 001d MLME_VIFCTRL_INACTIVITY_KICK_INFO 0003 current_time unicast_rx_time time_since_last_rx
+0008 001e MLME_VIFCTRL_KEEPALIVE_AP 0002 timeout timeout_check
+0008 001f MLME_VIFCTRL_KEEPALIVE_PEER 0003 last_activity_delta timeout check
+0008 0020 MLME_VIFCTRL_KEEPALIVE_STA 0003 mode timeout timeout_check
+0008 0021 MLME_VIFCTRL_KEEPALIVE_TX 0001 protected
+0008 0022 MLME_VIFCTRL_LISTEN_OFFLOAD 0001 interval
+0008 0023 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED 0003 ht_activated vht_activated all_membership_selector
+0008 0024 MLME_VIFCTRL_MIC_FAILURE 0002 peer status
+0008 0025 MLME_VIFCTRL_NAN_FAILURE 0002 reason arg
+0008 0026 MLME_VIFCTRL_NDP_FRAME 0002 frame line
+0008 0027 MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD 0006 router solicited override target_ip6_0 target_ll_0 line
+0008 0028 MLME_VIFCTRL_NDP_OFFLOAD 0004 icmp_type src_0 dst_0 line
+0008 0029 MLME_VIFCTRL_NDP_OFFLOAD_SET_ENABLED 0001 enabled
+0008 002a MLME_VIFCTRL_OBSS_SCAN_DONE_IND 0005 intolerant_channels intolerant_40mhz_ap_found intolerant_obss_found_by_peer found_obss_on_another_channel cycle_to_send_report
+0008 002b MLME_VIFCTRL_OBSS_SCAN_IND 0003 intolerant_channels intolerant_40mhz_ap_found found_obss_on_another_channel
+0008 002c MLME_VIFCTRL_OFFCHANNEL_TIMEOUT 0001 pid
+0008 002d MLME_VIFCTRL_OLBC 0003 rx_beacons bss_ht_protection_flags bss_erp_protection_flags
+0008 002e MLME_VIFCTRL_P2P_NOA 0005 duration interval start_time blackout_id position
+0008 002f MLME_VIFCTRL_PROBE_REQ_FILTERED 0003 da sa reason
+0008 0030 MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR 0002 da sa
+0008 0031 MLME_VIFCTRL_QBSS_CU 0003 reported_load_percentage computed_load_percentage channel_usage_above_threshold
+0008 0032 MLME_VIFCTRL_ROAMING_CONNECTION_INITIALISATION 0005 roaming_ft mic_len kck_len kek_len ptk_len
+0008 0033 MLME_VIFCTRL_SAVE_WMM_FOR_ACM 0000
+0008 0034 MLME_VIFCTRL_SELECTED_SECURITY 0006 security_status type group_cipher pairwise_cipher akm_suite adaptive_11r_enabled
+0008 0035 MLME_VIFCTRL_SEND_OMN_ACTION_FRAME 0002 bandwidth rx_nss
+0008 0036 MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME 0002 sm_power_save_enabled sm_mode
+0008 0037 MLME_VIFCTRL_SET_IP 0005 vif_type version address is_zero success
+0008 0038 MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS 0006 pid priority direction medium_time minimun_data_rate address
+0008 0039 MLME_VIFCTRL_SLOW_AP 0001 max_time
+0008 003a MLME_VIFCTRL_STATION_OVERRIDE_EDCA 0004 ac_category aifs_n cw_min_max txop
+0008 003b MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE 0002 beacon_period drift_allowance
+0008 003c MLME_VIFCTRL_STATION_QE_IGNORED_IE 0005 beacon_period qe_count qe_period qe_duration qe_offset
+0008 003d MLME_VIFCTRL_STATION_ROAM_END_ROAM 0003 bssid result_code reason_code
+0008 003e MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND 0003 preparing_channel_switch wifisharing_in_use ap_channel_switch_required
+0008 003f MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED 0002 req_mask mask
+0008 0040 MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS 0004 is_required is_rsdb_supported sta_primary_channel_freq ap_primary_channel_freq
+0008 0041 MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL 0003 sta_primary_freq ap_proposed_primary_freq count
+0008 0042 MLME_VIFCTRL_WIFISHARING_PERMITTED_CHANNELS 0001 mask
+# Generated From mlme_hard/mlme_vifctrl/mlme_vifctrl_debug.xml
+trace_types 151
+MLME_VIFCTRL_KEEPALIVE_PEER.last_activity_delta Integer32
+MLME_VIFCTRL_KEEPALIVE_PEER.timeout Integer32
+MLME_VIFCTRL_KEEPALIVE_PEER.check Natural32
+MLME_VIFCTRL_DESCHEDULED.pid FsmProcessId
+MLME_VIFCTRL_SEND_OMN_ACTION_FRAME.bandwidth Natural8
+MLME_VIFCTRL_SEND_OMN_ACTION_FRAME.rx_nss DEBUG_TYPE_VIFCTRL_NSS
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.beacon_period Natural32
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.qe_count Natural8
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.qe_period Natural8
+MLME_VIFCTRL_KEEPALIVE_STA.mode MlmeKeepalive
+MLME_VIFCTRL_KEEPALIVE_STA.timeout Natural32
+MLME_VIFCTRL_KEEPALIVE_STA.timeout_check Natural32
+MLME_VIFCTRL_ARP_DETECT.target_ip_address Natural32
+MLME_VIFCTRL_ARP_DETECT.is_tracking_arp Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.ht_activated Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.vht_activated Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.all_membership_selector Natural8
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.current_time Natural32
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.unicast_rx_time Natural32
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.time_since_last_rx Natural32
+MLME_VIFCTRL_NDP_FRAME.frame MBULK
+MLME_VIFCTRL_ECSA_RECEIVED.new_primary_channel_number Natural8
+MLME_VIFCTRL_ECSA_RECEIVED.channel_switch_count Natural8
+MLME_VIFCTRL_ECSA_RECEIVED.channel_switch_mode Natural8
+MLME_VIFCTRL_ARP_DETECT_IP_CHECK.target_ip_address Natural32
+MLME_VIFCTRL_ARP_DETECT_IP_CHECK.dst_ip_address Natural32
+MLME_VIFCTRL_NAN_FAILURE.reason DEBUG_TYPE_VIFCTRL_NAN_FAILURE_REASON
+MLME_VIFCTRL_CHANNEL_CONFIG.primary_freq Channel_Frequency
+MLME_VIFCTRL_CHANNEL_CONFIG.centre_freq Channel_Frequency
+MLME_VIFCTRL_CHANNEL_CONFIG.max_air_power Integer8
+MLME_VIFCTRL_INACTIVITY.interval Natural32
+MLME_VIFCTRL_INACTIVITY.now Natural32
+MLME_VIFCTRL_BEACON_UPDATE.now Natural32
+MLME_VIFCTRL_NDP_OFFLOAD.icmp_type Natural8
+MLME_VIFCTRL_NDP_OFFLOAD.src_0 Natural32
+MLME_VIFCTRL_NDP_OFFLOAD.dst_0 Natural32
+MLME_VIFCTRL_ROAMING_CONNECTION_INITIALISATION.roaming_ft Boolean
+MLME_VIFCTRL_OBSS_SCAN_IND.intolerant_40mhz_ap_found Boolean
+MLME_VIFCTRL_OBSS_SCAN_IND.found_obss_on_another_channel Boolean
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.opcode DEBUG_ARP_OPCODE
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.tha MAC_Address
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.spa Natural32
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.tpa Natural32
+MLME_VIFCTRL_NDP_OFFLOAD_SET_ENABLED.enabled Boolean
+MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS.is_required Boolean
+MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS.is_rsdb_supported Boolean
+MLME_VIFCTRL_QBSS_CU.channel_usage_above_threshold Boolean
+MLME_VIFCTRL_ECSA_SEND_ACTION.now Natural32
+MLME_VIFCTRL_ECSA_SEND_ACTION.bssid MAC_Address
+MLME_VIFCTRL_ECSA_SEND_ACTION.new_primary_channel Integer8
+MLME_VIFCTRL_ECSA_SEND_ACTION.channel_switch_count Integer8
+MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED.enabled Boolean
+MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED.vif_type VIF_Type
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.preparing_channel_switch Boolean
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.wifisharing_in_use Boolean
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.ap_channel_switch_required Boolean
+MLME_VIFCTRL_ASSIST_RA_FRAME.frame MBULK
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.is_sta_preparing_channel_switch Boolean
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.sta_primary_freq Channel_Frequency
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.ap_proposed_primary_freq Channel_Frequency
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.pid FsmProcessId
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.priority Priority
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.direction Direction
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.bssid MAC_Address
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.result_code Result_Code
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.reason_code Reason_Code
+MLME_VIFCTRL_ASSIST_DHCP_FRAME.flavour MESSAGE_TYPE
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.pid FsmProcessId
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.priority Priority
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.direction Direction
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.minimun_data_rate Rate
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.address MAC_Address
+MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE.beacon_period Natural32
+MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE.drift_allowance Natural32
+MLME_VIFCTRL_LISTEN_OFFLOAD.interval Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.security_status Result_Code
+MLME_VIFCTRL_SELECTED_SECURITY.type DEBUG_TYPE_VIFCTRL_SELECTED_SECURITY
+MLME_VIFCTRL_SELECTED_SECURITY.group_cipher Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.pairwise_cipher Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.akm_suite Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.adaptive_11r_enabled Boolean
+MLME_VIFCTRL_SET_IP.vif_type VIF_Type
+MLME_VIFCTRL_SET_IP.version Integer8
+MLME_VIFCTRL_SET_IP.address Natural32
+MLME_VIFCTRL_SET_IP.is_zero Boolean
+MLME_VIFCTRL_SET_IP.success Boolean
+MLME_VIFCTRL_ARP_OFFLOAD.opcode DEBUG_ARP_OPCODE
+MLME_VIFCTRL_ARP_OFFLOAD.sha MAC_Address
+MLME_VIFCTRL_ARP_OFFLOAD.spa Natural32
+MLME_VIFCTRL_ARP_OFFLOAD.tpa Natural32
+MLME_VIFCTRL_ASSIST_ACTIVE.flavour MESSAGE_TYPE
+MLME_VIFCTRL_ASSIST_ACTIVE.active Boolean
+MLME_VIFCTRL_AP_FAILURE.bssid MAC_Address
+MLME_VIFCTRL_AP_FAILURE.reason DEBUG_TYPE_VIFCTRL_AP_FAILURE_REASON
+MLME_VIFCTRL_ASSIST_TIMER.timer_id SignalId
+MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME.sm_power_save_enabled Natural8
+MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME.sm_mode Natural8
+MLME_VIFCTRL_OFFCHANNEL_TIMEOUT.pid FsmProcessId
+MLME_VIFCTRL_PROBE_REQ_FILTERED.da MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED.sa MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED.reason DEBUG_TYPE_VIFCTRL_PROBE_REQ_FILTER_REASON
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.primary_freq Channel_Frequency
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.channel_info Channel_Information
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.is_environment_40mhz_intolerant Boolean
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.allowed_to_increase_bandwidth Boolean
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.bandwidth_updated Boolean
+MLME_VIFCTRL_KEEPALIVE_TX.protected Boolean
+MLME_VIFCTRL_ECSA_TIMEOUT.now Natural32
+MLME_VIFCTRL_ECSA_TIMEOUT.new_channel_number Integer8
+MLME_VIFCTRL_ECSA_TIMEOUT.channel_switch_count Integer8
+MLME_VIFCTRL_WIFISHARING_PERMITTED_CHANNELS.mask Natural48
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.sta_primary_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.ap_proposed_primary_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.count Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.ac_category Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.aifs_n Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.cw_min_max Natural8
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.now Natural32
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.channel_switch_count Integer8
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.channel_switch_time Natural32
+MLME_VIFCTRL_MIC_FAILURE.peer MAC_Address
+MLME_VIFCTRL_MIC_FAILURE.status DEBUG_TYPE_VIFCTRL_MIC_FAILURE_RESULT
+MLME_VIFCTRL_BEACON_FORWARD.enabled Boolean
+MLME_VIFCTRL_SLOW_AP.max_time Natural32
+MLME_VIFCTRL_CHANGE_BSS_REQ.from_bssid MAC_Address
+MLME_VIFCTRL_CHANGE_BSS_REQ.from_freq Channel_Frequency
+MLME_VIFCTRL_CHANGE_BSS_REQ.to_bssid MAC_Address
+MLME_VIFCTRL_CHANGE_BSS_REQ.to_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED.req_mask Natural48
+MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED.mask Natural48
+MLME_VIFCTRL_P2P_NOA.duration Natural32
+MLME_VIFCTRL_P2P_NOA.interval Natural32
+MLME_VIFCTRL_P2P_NOA.start_time Natural32
+MLME_VIFCTRL_P2P_NOA.position Natural32
+MLME_VIFCTRL_CONNECTION_RESUMED.same_channel Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.router Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.solicited Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.override Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.target_ip6_0 Natural32
+MLME_VIFCTRL_KEEPALIVE_AP.timeout Natural32
+MLME_VIFCTRL_KEEPALIVE_AP.timeout_check Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.elapsed_time Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.router_lifetime Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.valid_lifetime Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.preferred_lifetime Natural32
+MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR.da MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR.sa MAC_Address
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.intolerant_40mhz_ap_found Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.intolerant_obss_found_by_peer Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.found_obss_on_another_channel Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.cycle_to_send_report Boolean
+DEBUG_TYPE_VIFCTRL_NSS Enum 0000 nss_one_stream 0001 nss_two_streams 0002 nss_three_streams 0003 nss_four_streams 0004 nss_five_streams 0005 nss_six_streams 0006 nss_seven_streams 0007 nss_eight_streams
+DEBUG_TYPE_VIFCTRL_NAN_FAILURE_REASON Enum 0001 vif_index 0002 invalid_tlv
+DEBUG_TYPE_VIFCTRL_PROBE_REQ_FILTER_REASON Enum 0000 group_address 0001 dest_address 0002 ssid 0003 no_p2p_ie 0004 device_address 0005 no_wcs_ie 0006 device_type 0007 no_probe_rsp_ies 0008 no_probe_rsp_p2p_ie 0009 no_probe_rsp_wsc_ie 000a already_txing_probe_resp 000b no_supported_rates_ie 000c p2p_with_only_basic_rates
+DEBUG_TYPE_VIFCTRL_SELECTED_SECURITY Enum 0000 none 0001 rsn 0002 wpa 0003 wapi
+DEBUG_TYPE_VIFCTRL_MIC_FAILURE_RESULT Enum 0000 success 0001 no_peer_entry
+DEBUG_TYPE_VIFCTRL_AP_FAILURE_REASON Enum 0000 bssid 0001 vif_index 0002 beacon_period 0003 dtim_period 0004 authentication_type 0005 channel 0008 ie_list 0009 no_rates_ie 000a no_ssid_ie 000b no_ht_operation_ie 000c no_wmm_ie 000d no_vht_operation_or_ht_ie 000e missing_ht_ies 0011 probe_rsp_no_p2p_ie 0012 ht_op_ie_channel_mismatch 0013 multiple_security_ies 0014 group_key_mismatch 0015 vendor_ie_present 0018 country_mismatch 001a wifisharing_not_supported 001b no_valid_channel_is_found
+DEBUG_ARP_OPCODE Enum 0001 request 0002 reply
+# Generated From mlme_hard/mlme_ftm/mlme_ftm_debug.xml
+trace_def 21
+0042 0000 MLME_FTM_ADDED_RESPONDER 0006 address frequency bursts_interval bursts_duration number_of_bursts number_of_frames_per_burst
+0042 0001 MLME_FTM_ADD_SCAN_REQUEST 0000
+0042 0002 MLME_FTM_ADD_SCAN_RESULT 0001 result_code
+0042 0003 MLME_FTM_DIST_RESULT 0001 distance_mm
+0042 0004 MLME_FTM_NEW_BURST_INTERVAL 0001 bursts_interval
+0042 0005 MLME_FTM_PROPOSED_BURST_START_TIME 0001 time
+0042 0006 MLME_FTM_RANGE_INDICATION 0003 report rtt_id count
+0042 0007 MLME_FTM_RESPONDER_NOT_ASAP 0001 address
+0042 0008 MLME_FTM_RESPONDER_PARAMETERS_UPDATED 0006 address bursts_start bursts_interval bursts_duration number_of_bursts number_of_frames_per_burst
+0042 0009 MLME_FTM_RESPONDER_UNUSED 0002 preamble bandwidth
+0042 000a MLME_FTM_RTT_RESULT 0008 address status burst_number measurement_attempted measurement_performed rtt deviation spread
+0042 000b MLME_FTM_RTT_STATUS 0002 status line_num
+0042 000c MLME_FTM_SCAN_DONE_INDICATION 0002 scan_id responder_count
+0042 000d MLME_FTM_SCAN_INDICATION 0001 interface_address
+0042 000e MLME_FTM_START_BURST 0002 address asap_mode
+0042 000f MLME_FTM_START_SESSION 0001 address
+0042 0010 MLME_FTM_STATUS 0002 status line_num
+0042 0011 MLME_FTM_TIME_STAMPS_T1_T4 0004 t1 t4 dialog_token follow_up_dialog_token
+0042 0012 MLME_FTM_TIME_STAMPS_T2_T3 0004 t2 t3 dialog_token follow_up_dialog_token
+0042 0013 MLME_RX_FTM_FRAME_STATS 0002 Received_frames Valid_frames
+0042 0014 MLME_RX_FTM_TIME_DIFF 0003 T2_T3_diff_in_picosecs T1_T4_diff_in_picosecs RTT_in_picosecs
+# Generated From mlme_hard/mlme_ftm/mlme_ftm_debug.xml
+trace_types 37
+MLME_FTM_ADDED_RESPONDER.address MAC_Address
+MLME_FTM_ADDED_RESPONDER.frequency Channel_Frequency
+MLME_FTM_ADDED_RESPONDER.bursts_interval Natural32
+MLME_FTM_ADDED_RESPONDER.bursts_duration Natural32
+MLME_FTM_START_BURST.address MAC_Address
+MLME_FTM_START_BURST.asap_mode Boolean
+MLME_RX_FTM_FRAME_STATS.Received_frames Integer32
+MLME_RX_FTM_FRAME_STATS.Valid_frames Integer32
+MLME_FTM_RESPONDER_NOT_ASAP.address MAC_Address
+MLME_FTM_STATUS.status DEBUG_TYPE_FTM_STATUS
+MLME_FTM_STATUS.line_num __LINE__
+MLME_FTM_TIME_STAMPS_T2_T3.t2 Natural64
+MLME_FTM_TIME_STAMPS_T2_T3.t3 Natural64
+MLME_FTM_TIME_STAMPS_T2_T3.dialog_token Natural8
+MLME_FTM_TIME_STAMPS_T2_T3.follow_up_dialog_token Natural8
+MLME_FTM_NEW_BURST_INTERVAL.bursts_interval Natural32
+MLME_FTM_SCAN_INDICATION.interface_address MAC_Address
+MLME_FTM_RTT_RESULT.address MAC_Address
+MLME_FTM_RTT_RESULT.status DEBUG_TYPE_FTM_RTT_STATUS
+MLME_FTM_RTT_RESULT.rtt Natural32
+MLME_FTM_RANGE_INDICATION.report MBULK
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.address MAC_Address
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_start Natural32
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_interval Natural32
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_duration Natural32
+MLME_FTM_PROPOSED_BURST_START_TIME.time Natural32
+MLME_FTM_START_SESSION.address MAC_Address
+MLME_FTM_RTT_STATUS.status DEBUG_TYPE_FTM_RTT_STATUS
+MLME_FTM_RTT_STATUS.line_num __LINE__
+MLME_FTM_DIST_RESULT.distance_mm Natural32
+MLME_RX_FTM_TIME_DIFF.T2_T3_diff_in_picosecs Integer32
+MLME_RX_FTM_TIME_DIFF.T1_T4_diff_in_picosecs Integer32
+MLME_RX_FTM_TIME_DIFF.RTT_in_picosecs Integer32
+MLME_FTM_TIME_STAMPS_T1_T4.t1 Natural64
+MLME_FTM_TIME_STAMPS_T1_T4.t4 Natural64
+MLME_FTM_TIME_STAMPS_T1_T4.dialog_token Natural8
+MLME_FTM_TIME_STAMPS_T1_T4.follow_up_dialog_token Natural8
+DEBUG_TYPE_FTM_STATUS Enum 01 Created 02 Negotiateable 04 Burst 08 Stopabble 10 Terminated
+DEBUG_TYPE_FTM_RTT_STATUS Enum 00 Success 02 Fail_No_Response 03 Fail_Rejected 04 Fail_Not_Scheduled 08 Aborted 0a Fail_No_Frames 0b Fail_Burst_Not_scheduled 0f Fail_Override
+# Generated From mlme_hard/mlme_roaming/mlme_roaming_debug.xml
+trace_def 20
+0018 0000 MLME_ROAMING_ATTEMPT 0007 bssid rssi freq okc_state pmk_available ft_capability roaming_ft
+0018 0001 MLME_ROAMING_BSS_TRANS_MGMT_REQ 0003 link_loss_imminent disassociation_timer_us deauth_pending
+0018 0002 MLME_ROAMING_COMPLETE 0001 bssid
+0018 0003 MLME_ROAMING_CONNECTION_RESUMED 0001 bssid
+0018 0004 MLME_ROAMING_CU_TRIGGER 0001 channel_usage_above_threshold
+0018 0005 MLME_ROAMING_FAIL 0003 bssid result_code reason_code
+0018 0006 MLME_ROAMING_GIVEUP 0000
+0018 0007 MLME_ROAMING_INITIAL_CONFIG 000a background_scan_period roam_scan_band rssi_low_threshold rssi_delta_threshold rssi_no_candidate_delta_threshold cu_no_candidate_delta_threshold rssi_cu_low_threshold_2G rssi_cu_low_threshold_5G cu_high_threshold_2G cu_high_threshold_5G
+0018 0008 MLME_ROAMING_LINK_LOST 0001 deauth
+0018 0009 MLME_ROAMING_NEIGHBOR 0001 freq
+0018 000a MLME_ROAMING_NEW_SCAN 0005 scan_mode scan_type periodic fullscan scan_channels
+0018 000b MLME_ROAMING_NON_CURRENT_AP_IDENTIFIED 0000
+0018 000c MLME_ROAMING_NO_CANDIDATE_MODE_UPDATE 0001 ctrl_flag_in_no_candidate_mode
+0018 000d MLME_ROAMING_POTENTIAL_CANDIDATE 0008 is_eligible candidate_selection_factor candidate_eligibility_threshold local_AP_selection_factor candidate_rssi candidate_channel_utilisation local_AP_rssi local_AP_channel_utilisation
+0018 000e MLME_ROAMING_RSSI_BOOST_CANDIDATE 0004 is_candidate frequency original_rssi boost
+0018 000f MLME_ROAMING_RSSI_TRIGGER 0006 trigger_flags rssi rssi_low rssi_high rssi_cu_low rssi_cu_high
+0018 0010 MLME_ROAMING_SCAN_DONE 0001 roam_candidates
+0018 0011 MLME_ROAMING_SCAN_IND_FILTERED 0006 bssid other_bssid rssi freq current_rssi reason
+0018 0012 MLME_ROAMING_SET_CACHED_CHANNELS 0001 cached_channel_mask
+0018 0013 MLME_ROAMING_SET_SCAN_MODE 0006 new_scan_mode old_scan_mode rssi_trigger cu_trigger deauth_pending deauth_reason
+# Generated From mlme_hard/mlme_roaming/mlme_roaming_debug.xml
+trace_types 59
+MLME_ROAMING_NO_CANDIDATE_MODE_UPDATE.ctrl_flag_in_no_candidate_mode Boolean
+MLME_ROAMING_POTENTIAL_CANDIDATE.is_eligible Boolean
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_selection_factor Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_eligibility_threshold Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_selection_factor Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_rssi Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_channel_utilisation Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_rssi Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_channel_utilisation Decibels
+MLME_ROAMING_LINK_LOST.deauth Reason_Code
+MLME_ROAMING_SET_SCAN_MODE.new_scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_SET_SCAN_MODE.old_scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_SET_SCAN_MODE.rssi_trigger Boolean
+MLME_ROAMING_SET_SCAN_MODE.cu_trigger Boolean
+MLME_ROAMING_SET_SCAN_MODE.deauth_pending DEBUG_TYPE_ROAMING_DEAUTH_PENDING
+MLME_ROAMING_SET_SCAN_MODE.deauth_reason Reason_Code
+MLME_ROAMING_CONNECTION_RESUMED.bssid MAC_Address
+MLME_ROAMING_SET_CACHED_CHANNELS.cached_channel_mask Natural64
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.link_loss_imminent Boolean
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.disassociation_timer_us Natural32
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.deauth_pending DEBUG_TYPE_ROAMING_DEAUTH_PENDING
+MLME_ROAMING_INITIAL_CONFIG.background_scan_period Natural32
+MLME_ROAMING_INITIAL_CONFIG.rssi_low_threshold Decibels
+MLME_ROAMING_INITIAL_CONFIG.rssi_cu_low_threshold_2G Decibels
+MLME_ROAMING_INITIAL_CONFIG.rssi_cu_low_threshold_5G Decibels
+MLME_ROAMING_RSSI_TRIGGER.trigger_flags DEBUG_TYPE_ROAMING_TRIGGER_MODE
+MLME_ROAMING_RSSI_TRIGGER.rssi Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_low Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_high Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_cu_low Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_cu_high Decibels
+MLME_ROAMING_NEW_SCAN.scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_NEW_SCAN.scan_type DEBUG_TYPE_ROAMING_SCAN
+MLME_ROAMING_NEW_SCAN.periodic Boolean
+MLME_ROAMING_NEW_SCAN.fullscan Boolean
+MLME_ROAMING_NEW_SCAN.scan_channels Natural48
+MLME_ROAMING_COMPLETE.bssid MAC_Address
+MLME_ROAMING_NEIGHBOR.freq Channel_Frequency
+MLME_ROAMING_FAIL.bssid MAC_Address
+MLME_ROAMING_FAIL.result_code Result_Code
+MLME_ROAMING_FAIL.reason_code Reason_Code
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.is_candidate Boolean
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.frequency Channel_Frequency
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.original_rssi Decibels
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.boost Decibels
+MLME_ROAMING_ATTEMPT.bssid MAC_Address
+MLME_ROAMING_ATTEMPT.rssi Decibels
+MLME_ROAMING_ATTEMPT.freq Channel_Frequency
+MLME_ROAMING_ATTEMPT.okc_state DEBUG_TYPE_ROAMING_OKC_STATE
+MLME_ROAMING_ATTEMPT.pmk_available Boolean
+MLME_ROAMING_ATTEMPT.ft_capability Boolean
+MLME_ROAMING_ATTEMPT.roaming_ft Boolean
+MLME_ROAMING_CU_TRIGGER.channel_usage_above_threshold Boolean
+MLME_ROAMING_SCAN_IND_FILTERED.bssid MAC_Address
+MLME_ROAMING_SCAN_IND_FILTERED.other_bssid MAC_Address
+MLME_ROAMING_SCAN_IND_FILTERED.rssi Decibels
+MLME_ROAMING_SCAN_IND_FILTERED.freq Channel_Frequency
+MLME_ROAMING_SCAN_IND_FILTERED.current_rssi Decibels
+MLME_ROAMING_SCAN_IND_FILTERED.reason DEBUG_TYPE_ROAMING_SCAN_IND_FILTER_REASON
+DEBUG_TYPE_ROAMING_DEAUTH_PENDING Enum 0000 DEAUTH_NOT_PENDING 0001 IN_MORE_THAN_10_SECONDS 0002 IN_LESS_THAN_10_SECONDS
+DEBUG_TYPE_ROAMING_TRIGGER_MODE Enum 0001 no_trigger 0003 RSSI_only 0005 CU_RSSI_only 0007 RSSI_and_CU_RSSI
+DEBUG_TYPE_ROAMING_SCAN_MODE Enum 0000 ROAMING_SCAN_MODE_CASE_1_NCHO 0001 ROAMING_SCAN_MODE_CASE_1 0002 ROAMING_SCAN_MODE_CASE_2 0003 ROAMING_SCAN_MODE_CASE_3 0004 ScanMode_None
+DEBUG_TYPE_ROAMING_OKC_STATE Enum 0000 OKC_TRY 0001 OKC_ON 0002 OKC_OFF
+DEBUG_TYPE_ROAMING_SCAN Enum 000b SOFT_NEIGHBOUR_ROAMING_SCAN 000c SOFT_CACHED_ROAMING_SCAN 000d SOFT_ALL_ROAMING_SCAN 000e HARD_NEIGHBOUR_ROAMING_SCAN 000f HARD_CACHED_ROAMING_SCAN 0010 HARD_ALL_ROAMING_SCAN 0013 FIRST_ILLEGAL
+DEBUG_TYPE_ROAMING_SCAN_IND_FILTER_REASON Enum 0000 bssid_connected 0001 ssid 0002 rssi 0003 rss 0004 malloc_failed 0005 off_channel 0006 out_of_band 0007 bssid_not_target 0008 mobility_domain 000c selection_factor_low
+# Generated From mlme_hard/mlme_requests/mlme_requests_debug.xml
+trace_def 5
+0007 0000 MLME_REQUESTS_FORWARD 0003 id rules pid
+0007 0001 MLME_REQUESTS_FORWARD_ERROR 0004 id rules pid line
+0007 0002 MLME_REQUESTS_SEND_STAGE1_RESETS 0001 pid
+0007 0003 MLME_REQUESTS_SEND_STAGE2_RESETS 0001 pid
+0007 0004 MLME_REQUESTS_SEND_WAKE_HOSTS 0001 pid
+# Generated From mlme_hard/mlme_requests/mlme_requests_debug.xml
+trace_types 5
+MLME_REQUESTS_FORWARD_ERROR.pid FsmProcessId
+MLME_REQUESTS_SEND_STAGE1_RESETS.pid FsmProcessId
+MLME_REQUESTS_SEND_WAKE_HOSTS.pid FsmProcessId
+MLME_REQUESTS_FORWARD.pid FsmProcessId
+MLME_REQUESTS_SEND_STAGE2_RESETS.pid FsmProcessId
+# Generated From mlme_hard/mlme_security/mlme_security_debug.xml
+trace_def 32
+0035 0000 MLME_SECURITY_EAPOL 0001 line
+0035 0001 MLME_SECURITY_EAPOL_BUILD_SEND 0002 bssid type
+0035 0002 MLME_SECURITY_EAPOL_DECRYPT_ERROR 0001 line
+0035 0003 MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID 0002 descriptor_version line
+0035 0004 MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO 0004 m4_mbulk_available key_mbulk_available done_action security_tracker
+0035 0005 MLME_SECURITY_EAPOL_FRAME_RECEIVED 0003 okc_state pmk_available is_roaming
+0035 0006 MLME_SECURITY_EAPOL_GTK_UNAVAILABLE 0001 line
+0035 0007 MLME_SECURITY_EAPOL_IGTK_UNAVAILABLE 0001 line
+0035 0008 MLME_SECURITY_EAPOL_KEY_DATA_LENGTH_INVALID 0002 len line
+0035 0009 MLME_SECURITY_EAPOL_MIC_DISCARDED 0001 line
+0035 000a MLME_SECURITY_EAPOL_MIC_NOT_PRESENT 0001 line
+0035 000b MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED 0003 secure encrypted_key line
+0035 000c MLME_SECURITY_EAPOL_PROCESS_G 0000
+0035 000d MLME_SECURITY_EAPOL_PROCESS_G1 0000
+0035 000e MLME_SECURITY_EAPOL_PROCESS_M 0000
+0035 000f MLME_SECURITY_EAPOL_PROCESS_M1 0000
+0035 0010 MLME_SECURITY_EAPOL_PROCESS_M3 0000
+0035 0011 MLME_SECURITY_EAPOL_PTK_UNAVAILABLE 0001 line
+0035 0012 MLME_SECURITY_FRAMETX 0001 status
+0035 0013 MLME_SECURITY_FRAME_TOO_SHORT_FOR_KEY 0001 line
+0035 0014 MLME_SECURITY_FSM_DEINIT 0001 pid
+0035 0015 MLME_SECURITY_FSM_INIT 0001 pid
+0035 0016 MLME_SECURITY_GET_CIPHER_MATCH 0002 frame_akm_suite_number frame_akm_suite
+0035 0017 MLME_SECURITY_INSTALL_KEY 0001 key_type
+0035 0018 MLME_SECURITY_IS_EAPOL_FRAME 0001 line
+0035 0019 MLME_SECURITY_IS_EAP_FRAME 0001 line
+0035 001a MLME_SECURITY_KCK 0000
+0035 001b MLME_SECURITY_KEK 0000
+0035 001c MLME_SECURITY_PMK 0000
+0035 001d MLME_SECURITY_PTK 0000
+0035 001e MLME_SECURITY_REPLAY_COUNTER_INVALID 0001 line
+0035 001f MLME_SECURITY_TK 0000
+# Generated From mlme_hard/mlme_security/mlme_security_debug.xml
+trace_types 30
+MLME_SECURITY_EAPOL_GTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_GET_CIPHER_MATCH.frame_akm_suite Natural32
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.secure Boolean
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.encrypted_key Boolean
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.line __LINE__
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.m4_mbulk_available Boolean
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.key_mbulk_available Boolean
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.done_action Natural8
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.security_tracker Natural8
+MLME_SECURITY_EAPOL_BUILD_SEND.bssid MAC_Address
+MLME_SECURITY_EAPOL_BUILD_SEND.type DEBUG_TYPE_SECURITY_EAPOL_FRAME
+MLME_SECURITY_EAPOL_PTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_EAPOL.line __LINE__
+MLME_SECURITY_EAPOL_IGTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_EAPOL_DECRYPT_ERROR.line __LINE__
+MLME_SECURITY_EAPOL_MIC_NOT_PRESENT.line __LINE__
+MLME_SECURITY_REPLAY_COUNTER_INVALID.line __LINE__
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.okc_state DEBUG_TYPE_SECURITY_OKC_STATE
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.pmk_available Boolean
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.is_roaming Boolean
+MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID.descriptor_version Natural8
+MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID.line __LINE__
+MLME_SECURITY_FSM_INIT.pid FsmProcessId
+MLME_SECURITY_FRAME_TOO_SHORT_FOR_KEY.line __LINE__
+MLME_SECURITY_EAPOL_MIC_DISCARDED.line __LINE__
+MLME_SECURITY_IS_EAPOL_FRAME.line __LINE__
+MLME_SECURITY_IS_EAP_FRAME.line __LINE__
+MLME_SECURITY_FSM_DEINIT.pid FsmProcessId
+MLME_SECURITY_INSTALL_KEY.key_type Key_Type
+MLME_SECURITY_EAPOL_KEY_DATA_LENGTH_INVALID.line __LINE__
+DEBUG_TYPE_SECURITY_OKC_STATE Enum 0000 OKC_TRY 0001 OKC_ON 0002 OKC_OFF
+DEBUG_TYPE_SECURITY_EAPOL_FRAME Enum 00 M2 01 M4 02 G2
+# Generated From mlme_hard/mlme_nan/mlme_nam_debug.xml
+trace_def 32
+004b 0000 MLME_NAM_ADD_VIF_SCHEDULE 0001 pid
+004b 0001 MLME_NAM_ALLOCATE_AVAILABILITY_ENTRY 0001 pid
+004b 0002 MLME_NAM_AVAILABILITY_ENTRY 0006 status type schedule primary_freq channel_info desired_nss
+004b 0003 MLME_NAM_BUILD_AVAILABILITY 0001 pid
+004b 0004 MLME_NAM_BUILD_VIF_NDC_TIME_MAP 0001 pid
+004b 0005 MLME_NAM_CREATE_SCHEDULE 0001 pid
+004b 0006 MLME_NAM_DW_INFO 0002 band slot_period
+004b 0007 MLME_NAM_FREE_AVAILABILITY_ENTRY 0001 pid
+004b 0008 MLME_NAM_MAKE_EXCLUSIVE_NDC_SCHEDULE 0001 pid
+004b 0009 MLME_NAM_MARK_SCHEDULE_AS_COMMITTED 0001 pid
+004b 000a MLME_NAM_NDL_VIF_NDC_CREATED 0001 ndc_id
+004b 000b MLME_NAM_REMOVE_DWS_FROM_SCHEDULE 0001 pid
+004b 000c MLME_NAM_REMOVE_OVERLAPPING_SCHEDULES 0001 pid
+004b 000d MLME_NAM_SCHEDULE_AVAILABILITIES 0001 pid
+004b 000e MLME_NAM_SCHEDULE_ENTRY 0004 schedule_type primary_freq channel_info desired_nss
+004b 000f MLME_NAM_SLOT_MAP 0001 slot_map
+004b 0010 MLME_NAM_TIME_MAP_ENTRY 0003 slot_start_offset slot_duration slot_period
+004b 0011 MLME_NAM_UPDATE_DW 0002 band slot_period
+004b 0012 MLME_NAM_UPDATE_NMI_VIF_DW_SCHEDULE 0001 pid
+004b 0013 MLME_NAM_UPDATE_SCHEDULE 0001 pid
+004b 0014 MLME_NAM_VERIFY_NDC_SCHEDULE 0001 ndc_id
+004b 0015 MLME_NAM_VIF_DEINIT 0001 pid
+004b 0016 MLME_NAM_VIF_INIT 0001 pid
+004b 0017 MLME_NAM_VIF_SCHEDULE_NEGOTIATED 0001 pid
+004b 0018 MLME_NSF_BUILD_AVAILABILITY_DATA 0001 pid
+004b 0019 MLME_NSF_BUILD_AVAILABILITY_ENTRY 0001 control
+004b 001a MLME_NSF_BUILD_CHANNEL_ENTRY 0005 primary_freq channel_info operating_class channel_mask primary_channel_map
+004b 001b MLME_NSF_BUILD_REGULATORY_CONFIG 0005 primary_freq channel_info operating_class channel_mask primary_channel_map
+004b 001c MLME_NSF_BUILD_TIME_BIT_MAP 0002 control length
+004b 001d MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE 0005 seq_id map_id committed_changed potential_changed ndc_changed
+004b 001e MLME_NSF_EXTRACT_TIME_BIT_MAP 0002 control length
+004b 001f MLME_NSF_SLOT_MAP 0001 slot_map
+# Generated From mlme_hard/mlme_nan/mlme_nam_debug.xml
+trace_types 55
+MLME_NAM_AVAILABILITY_ENTRY.status DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.type DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.schedule DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NAM_AVAILABILITY_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NAM_AVAILABILITY_ENTRY.desired_nss NSS
+MLME_NAM_DW_INFO.band INTERFACE
+MLME_NAM_DW_INFO.slot_period Time
+MLME_NSF_BUILD_AVAILABILITY_DATA.pid FsmProcessId
+MLME_NSF_EXTRACT_TIME_BIT_MAP.length Natural8
+MLME_NAM_UPDATE_SCHEDULE.pid FsmProcessId
+MLME_NAM_SLOT_MAP.slot_map TOKEN
+MLME_NSF_BUILD_REGULATORY_CONFIG.primary_freq CHANNEL_FREQUENCY
+MLME_NSF_BUILD_REGULATORY_CONFIG.channel_info CHANNEL_INFORMATION
+MLME_NSF_BUILD_REGULATORY_CONFIG.operating_class Natural8
+MLME_NSF_BUILD_REGULATORY_CONFIG.channel_mask Natural64
+MLME_NSF_BUILD_REGULATORY_CONFIG.primary_channel_map Natural8
+MLME_NSF_SLOT_MAP.slot_map TOKEN
+MLME_NAM_VIF_SCHEDULE_NEGOTIATED.pid FsmProcessId
+MLME_NAM_FREE_AVAILABILITY_ENTRY.pid FsmProcessId
+MLME_NAM_SCHEDULE_AVAILABILITIES.pid FsmProcessId
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.seq_id Natural8
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.map_id Natural8
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.committed_changed Boolean
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.potential_changed Boolean
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.ndc_changed Boolean
+MLME_NSF_BUILD_CHANNEL_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NSF_BUILD_CHANNEL_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NSF_BUILD_CHANNEL_ENTRY.operating_class Natural8
+MLME_NSF_BUILD_CHANNEL_ENTRY.channel_mask Natural64
+MLME_NSF_BUILD_CHANNEL_ENTRY.primary_channel_map Natural8
+MLME_NSF_BUILD_TIME_BIT_MAP.length Natural8
+MLME_NAM_VIF_DEINIT.pid FsmProcessId
+MLME_NAM_TIME_MAP_ENTRY.slot_start_offset Time
+MLME_NAM_TIME_MAP_ENTRY.slot_duration Time
+MLME_NAM_TIME_MAP_ENTRY.slot_period Time
+MLME_NAM_NDL_VIF_NDC_CREATED.ndc_id MAC_Address
+MLME_NAM_BUILD_VIF_NDC_TIME_MAP.pid FsmProcessId
+MLME_NAM_REMOVE_DWS_FROM_SCHEDULE.pid FsmProcessId
+MLME_NAM_BUILD_AVAILABILITY.pid FsmProcessId
+MLME_NAM_VERIFY_NDC_SCHEDULE.ndc_id MAC_Address
+MLME_NAM_ADD_VIF_SCHEDULE.pid FsmProcessId
+MLME_NAM_MARK_SCHEDULE_AS_COMMITTED.pid FsmProcessId
+MLME_NAM_UPDATE_NMI_VIF_DW_SCHEDULE.pid FsmProcessId
+MLME_NAM_REMOVE_OVERLAPPING_SCHEDULES.pid FsmProcessId
+MLME_NAM_ALLOCATE_AVAILABILITY_ENTRY.pid FsmProcessId
+MLME_NAM_MAKE_EXCLUSIVE_NDC_SCHEDULE.pid FsmProcessId
+MLME_NAM_VIF_INIT.pid FsmProcessId
+MLME_NAM_SCHEDULE_ENTRY.schedule_type DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_SCHEDULE_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NAM_SCHEDULE_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NAM_SCHEDULE_ENTRY.desired_nss NSS
+MLME_NAM_UPDATE_DW.band INTERFACE
+MLME_NAM_UPDATE_DW.slot_period Time
+MLME_NAM_CREATE_SCHEDULE.pid FsmProcessId
+# Generated From mlme_hard/mlme_nan/mlme_ndm_debug.xml
+trace_def 19
+004a 0000 MLME_NDM_FRAME_RECEIVED 0003 oui_subtype sa da
+004a 0001 MLME_NDM_FSM_DEINIT 0001 pid
+004a 0002 MLME_NDM_FSM_INIT 0001 pid
+004a 0003 MLME_NDM_INITIATOR_BASF_NO_STATION_RECORD 0001 pid
+004a 0004 MLME_NDM_INITIATOR_BASF_SENDING_CONFIRM 0000
+004a 0005 MLME_NDM_INITIATOR_BASF_WRONG_STATE 0001 state
+004a 0006 MLME_NDM_INITIATOR_NDL_SETUP_ATTRIBUTE_MISSING 0000
+004a 0007 MLME_NDM_INITIATOR_NDP_REQUEST 0003 initiator_ndi ndp_id state
+004a 0008 MLME_NDM_INITIATOR_NDP_RESPONSE_FAIL_NO_VIF 0001 sa
+004a 0009 MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS 0003 remote_address local_address status
+004a 000a MLME_NDM_INITIATOR_REQUEST_NO_MATCHING_SERVICE 0001 match_id
+004a 000b MLME_NDM_INITIATOR_RESPONSE_NDL_FAIL 0002 token status
+004a 000c MLME_NDM_INITIATOR_RESPONSE_NDP_FAIL 0001 status
+004a 000d MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS 0002 remote_address local_address
+004a 000e MLME_NDM_NDL_VIF_CREATED 0003 remote_nmi local_nmi cluster_id
+004a 000f MLME_NDM_RESPONDER_NDP_CONFIRMED 0001 result_code
+004a 0010 MLME_NDM_RESPONDER_NDP_REQUESTED 0006 initiator_ndi ndp_id publish_id local_ndp_id retry_frame waiting_for_host
+004a 0011 MLME_NDM_RESPONDER_NDP_REQUEST_NO_MATCHING_SERVICE 0001 publish_id
+004a 0012 MLME_NDM_RESPONDER_NDP_RESPONSE 0004 initiator_ndi ndp_id status reason
+# Generated From mlme_hard/mlme_nan/mlme_ndm_debug.xml
+trace_types 30
+MLME_NDM_INITIATOR_NDP_REQUEST.initiator_ndi MAC_Address
+MLME_NDM_INITIATOR_NDP_REQUEST.ndp_id Natural8
+MLME_NDM_INITIATOR_NDP_REQUEST.state Natural8
+MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS.remote_address MAC_Address
+MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS.local_address MAC_Address
+MLME_NDM_RESPONDER_NDP_REQUEST_NO_MATCHING_SERVICE.publish_id Natural8
+MLME_NDM_INITIATOR_NDP_RESPONSE_FAIL_NO_VIF.sa MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.remote_address MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.local_address MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.status Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.initiator_ndi MAC_Address
+MLME_NDM_RESPONDER_NDP_REQUESTED.ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.publish_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.local_ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.retry_frame Boolean
+MLME_NDM_RESPONDER_NDP_REQUESTED.waiting_for_host Boolean
+MLME_NDM_RESPONDER_NDP_CONFIRMED.result_code RESULT_CODE
+MLME_NDM_FSM_DEINIT.pid FsmProcessId
+MLME_NDM_RESPONDER_NDP_RESPONSE.initiator_ndi MAC_Address
+MLME_NDM_RESPONDER_NDP_RESPONSE.ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_RESPONSE.status Natural8
+MLME_NDM_RESPONDER_NDP_RESPONSE.reason Natural8
+MLME_NDM_FSM_INIT.pid FsmProcessId
+MLME_NDM_FRAME_RECEIVED.oui_subtype Natural8
+MLME_NDM_FRAME_RECEIVED.sa MAC_Address
+MLME_NDM_FRAME_RECEIVED.da MAC_Address
+MLME_NDM_NDL_VIF_CREATED.remote_nmi MAC_Address
+MLME_NDM_NDL_VIF_CREATED.local_nmi MAC_Address
+MLME_NDM_NDL_VIF_CREATED.cluster_id MAC_Address
+MLME_NDM_INITIATOR_BASF_NO_STATION_RECORD.pid FsmProcessId
+# Generated From mlme_hard/mlme_nan/mlme_nan_debug.xml
+trace_def 69
+0016 0000 MLME_NAN_ADDRESS_CHANGED 0002 old_address new_address
+0016 0001 MLME_NAN_AVAILABILITY_ATTRIBUTE_PARAMS 0003 seq_id attribute_control availability_entry_list_len
+0016 0002 MLME_NAN_AVAILABILITY_ATTRIBUTE_SIZE 0002 size map_id
+0016 0003 MLME_NAN_AVAILABILITY_ENTRY_PARAMS 0002 entry_control num_of_channel_band_entries
+0016 0004 MLME_NAN_AVAILABILITY_ENTRY_SIZE 0002 size type
+0016 0005 MLME_NAN_CANDIDATE 0001 bssid
+0016 0006 MLME_NAN_CHANNEL_BAND_ENTRY_PARAMS 0001 list_control
+0016 0007 MLME_NAN_CHANNEL_BAND_ENTRY_SIZE 0002 size entry_count
+0016 0008 MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS 0002 capabilities cipher_entry_count
+0016 0009 MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_SIZE 0001 size
+0016 000a MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS 0004 attribute_id anchor_master_rank hop_count_to_anchor_master anchor_master_beacon_transmission_time
+0016 000b MLME_NAN_CLUSTER_ATTRIBUTE_SIZE 0001 size
+0016 000c MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS 0003 cluster_id cluster_time_offset anchor_master_rank
+0016 000d MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_SIZE 0001 size
+0016 000e MLME_NAN_CLUSTER_JOINING 0001 cluster_id
+0016 000f MLME_NAN_CLUSTER_MERGING 0003 cluster_id merge_state current_role
+0016 0010 MLME_NAN_CLUSTER_STARTING 0001 cluster_id
+0016 0011 MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED 0003 anchor_rank hop_count_to_anchor ambtt
+0016 0012 MLME_NAN_DATA_CLUSTER_ATTRIBUTE_PARAMS 0002 ndc_id attribute_control
+0016 0013 MLME_NAN_DATA_CLUSTER_ATTRIBUTE_SIZE 0001 size
+0016 0014 MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS 0007 map_id committed_dw_info supported_bands operating_mode number_of_antennas max_channel_switch_time capabilities
+0016 0015 MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_SIZE 0001 size
+0016 0016 MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS 0006 dialog_token type_and_status reason_code ndl_control max_idle_period immu_sched_entry_list_len
+0016 0017 MLME_NAN_DEVICE_LINK_ATTRIBUTE_SIZE 0001 size
+0016 0018 MLME_NAN_DW_END_POSTPONED 0001 index_in_sdf_mask
+0016 0019 MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS 0005 map_id basic_rates rates ht_activated vht_activated
+0016 001a MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_SIZE 0001 size
+0016 001b MLME_NAN_FSM_DEINIT 0001 pid
+0016 001c MLME_NAN_FSM_INIT 0001 pid
+0016 001d MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS 0003 attribute_id master_preference random_factor
+0016 001e MLME_NAN_MASTER_INDICATION_ATTRIBUTE_SIZE 0001 size
+0016 001f MLME_NAN_MASTER_RANK_CHANGED 0004 new_master_rank master_preference random_factor interface_address
+0016 0020 MLME_NAN_NDP_ATTRIBUTE_PARAMS 0008 dialog_token type_and_status reason_code ndp_control ndp_id own_ndi peer_ndi publish_id
+0016 0021 MLME_NAN_NDP_ATTRIBUTE_SIZE 0001 size
+0016 0022 MLME_NAN_NDP_REQ_RECEIVED 0002 rssi frame
+0016 0023 MLME_NAN_RECEIVED_FRAME_IGNORED 0002 reason frame
+0016 0024 MLME_NAN_RECEIVED_FRAME_VALID 0001 frame
+0016 0025 MLME_NAN_ROLE_CHANGED 0006 old_role new_role beacon_counter_to_sync_role_rssi_close beacon_counter_to_sync_role_rssi_middle beacon_counter_to_non_sync_role_rssi_close beacon_counter_to_non_sync_role_rssi_middle
+0016 0026 MLME_NAN_SCAN 0003 ies scan_channels periodic_scan
+0016 0027 MLME_NAN_SCAN_DONE 0002 periodic_scan found_candidate
+0016 0028 MLME_NAN_SCAN_IND_FILTERED 0003 bssid other_bssid reason
+0016 0029 MLME_NAN_SDF_DESCRIPTOR_IGNORED 0002 service_type instance_id
+0016 002a MLME_NAN_SDF_DESCRIPTOR_RECEIVED 0003 service_type instance_id service_id
+0016 002b MLME_NAN_SDF_HANDLE_CFM 0003 index_in_sdf_mask transmission_status delete_after_tx
+0016 002c MLME_NAN_SDF_RANGE_CHECK 0004 sda1_discovery_range sda2_discovery_range sdf_rssi close_enough
+0016 002d MLME_NAN_SDF_RECEIVED 0002 rssi frame
+0016 002e MLME_NAN_SDF_SEND 0002 address frame_type
+0016 002f MLME_NAN_SDF_SEND_MULTICAST 0000
+0016 0030 MLME_NAN_SDF_SERVICE_DELETED 0003 instance_id service_type reason_code
+0016 0031 MLME_NAN_SDF_SRF_MATCH_FAILED 0002 service_type instance_id
+0016 0032 MLME_NAN_SDF_SSI_MISSING 0001 instance_id
+0016 0033 MLME_NAN_SECURITY_CONTEXT_INFO_ATTRIBUTE_SIZE 0001 size
+0016 0034 MLME_NAN_SERVICE_DESCRIPTOR 0003 service_type instance_id service_id
+0016 0035 MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS 0005 attribute_id service_id instance_id requestor_instance_id service_control
+0016 0036 MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE 0003 size instance_id service_type
+0016 0037 MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS 0003 attribute_id instance_id service_control
+0016 0038 MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_SIZE 0001 size
+0016 0039 MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_PARAMS 0002 attribute_id attribute_len
+0016 003a MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_SIZE 0002 size service_type
+0016 003b MLME_NAN_SERVICE_MATCHED 0004 match_id peer_nmi peer_instance_id instance_id
+0016 003c MLME_NAN_SERVICE_MATCH_EXPIRED 0006 match_id peer_instance_id miss_match_count matched_time instance_id instance_exists
+0016 003d MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS 0002 publish_id eapol_key_len
+0016 003e MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_SIZE 0001 size
+0016 003f MLME_NAN_TIME_MAP_ENTRY_PARAMS 0002 entry_control entry_length
+0016 0040 MLME_NAN_TIME_MAP_ENTRY_SIZE 0001 size
+0016 0041 MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR 0002 tlv_tag tlv_length
+0016 0042 MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR_DATA 0001 tlv_value
+0016 0043 MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS 0008 attribute_control starting_time duration period count_down ulw_overwrite ulw_control channel_entry_list_len
+0016 0044 MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_SIZE 0001 size
+# Generated From mlme_hard/mlme_nan/mlme_nan_debug.xml
+trace_types 126
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.dialog_token Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.type_and_status Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.reason_code Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.ndp_control Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.ndp_id Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.own_ndi MAC_Address
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.peer_ndi MAC_Address
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.publish_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.service_id Natural8[6]
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.requestor_instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.service_control Natural8
+MLME_NAN_AVAILABILITY_ENTRY_PARAMS.num_of_channel_band_entries Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.peer_instance_id Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.miss_match_count Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.matched_time Time
+MLME_NAN_SERVICE_MATCH_EXPIRED.instance_id Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.instance_exists Boolean
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.anchor_master_rank Natural64
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.hop_count_to_anchor_master Natural8
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.anchor_master_beacon_transmission_time Natural32
+MLME_NAN_DATA_CLUSTER_ATTRIBUTE_PARAMS.ndc_id MAC_Address
+MLME_NAN_MASTER_RANK_CHANGED.new_master_rank Natural64
+MLME_NAN_MASTER_RANK_CHANGED.master_preference Natural8
+MLME_NAN_MASTER_RANK_CHANGED.random_factor Natural8
+MLME_NAN_MASTER_RANK_CHANGED.interface_address MAC_Address
+MLME_NAN_AVAILABILITY_ENTRY_SIZE.type DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE
+MLME_NAN_ROLE_CHANGED.old_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_ROLE_CHANGED.new_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_CANDIDATE.bssid MAC_Address
+MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS.capabilities Natural8
+MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS.cipher_entry_count Natural8
+MLME_NAN_TIME_MAP_ENTRY_PARAMS.entry_length Natural8
+MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SCAN_IND_FILTERED.bssid MAC_Address
+MLME_NAN_SCAN_IND_FILTERED.other_bssid MAC_Address
+MLME_NAN_SCAN_IND_FILTERED.reason DEBUG_TYPE_NAN_SCAN_IND_FILTER_REASON
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.service_control Natural8
+MLME_NAN_SDF_SSI_MISSING.instance_id Natural8
+MLME_NAN_SDF_SRF_MATCH_FAILED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_SRF_MATCH_FAILED.instance_id Natural8
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.instance_id Natural8
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.service_id Natural8[6]
+MLME_NAN_FSM_INIT.pid FsmProcessId
+MLME_NAN_SCAN_DONE.periodic_scan Boolean
+MLME_NAN_SCAN_DONE.found_candidate Boolean
+MLME_NAN_CLUSTER_MERGING.cluster_id MAC_Address
+MLME_NAN_CLUSTER_MERGING.merge_state Natural8
+MLME_NAN_CLUSTER_MERGING.current_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_SDF_RECEIVED.rssi Natural16s
+MLME_NAN_SDF_RECEIVED.frame MBULK
+MLME_NAN_RECEIVED_FRAME_IGNORED.reason DEBUG_TYPE_NAN_RECEIVED_FRAME_IGNORED_REASON
+MLME_NAN_RECEIVED_FRAME_IGNORED.frame MBULK
+MLME_NAN_SCAN.ies MBULK
+MLME_NAN_SCAN.scan_channels Natural48
+MLME_NAN_SCAN.periodic_scan Boolean
+MLME_NAN_RECEIVED_FRAME_VALID.frame MBULK
+MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_SIZE.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SERVICE_MATCHED.peer_nmi MAC_Address
+MLME_NAN_SERVICE_MATCHED.peer_instance_id Natural8
+MLME_NAN_SERVICE_MATCHED.instance_id Natural8
+MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS.publish_id Natural8
+MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS.eapol_key_len Natural8
+MLME_NAN_CLUSTER_STARTING.cluster_id MAC_Address
+MLME_NAN_AVAILABILITY_ATTRIBUTE_PARAMS.seq_id Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.starting_time Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.duration Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.period Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.count_down Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.ulw_overwrite Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.ulw_control Natural8
+MLME_NAN_ADDRESS_CHANGED.old_address MAC_Address
+MLME_NAN_ADDRESS_CHANGED.new_address MAC_Address
+MLME_NAN_SDF_HANDLE_CFM.delete_after_tx Boolean
+MLME_NAN_SERVICE_DESCRIPTOR.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SERVICE_DESCRIPTOR.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR.service_id Natural8[6]
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.anchor_rank Natural64
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.hop_count_to_anchor Natural8
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.ambtt Natural32
+MLME_NAN_FSM_DEINIT.pid FsmProcessId
+MLME_NAN_NDP_REQ_RECEIVED.rssi Natural16s
+MLME_NAN_NDP_REQ_RECEIVED.frame MBULK
+MLME_NAN_SDF_DESCRIPTOR_IGNORED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_DESCRIPTOR_IGNORED.instance_id Natural8
+MLME_NAN_CLUSTER_JOINING.cluster_id MAC_Address
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.map_id Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.supported_bands Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.operating_mode Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.number_of_antennas Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.capabilities Natural8
+MLME_NAN_SDF_RANGE_CHECK.sda1_discovery_range NanDiscoveryRange
+MLME_NAN_SDF_RANGE_CHECK.sda2_discovery_range NanDiscoveryRange
+MLME_NAN_SDF_RANGE_CHECK.sdf_rssi Natural16s
+MLME_NAN_SDF_RANGE_CHECK.close_enough Boolean
+MLME_NAN_CHANNEL_BAND_ENTRY_PARAMS.list_control Natural8
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.cluster_id MAC_Address
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.cluster_time_offset Natural64
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.anchor_master_rank Natural64
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.dialog_token Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.type_and_status Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.reason_code Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.ndl_control Natural8
+MLME_NAN_SDF_SERVICE_DELETED.instance_id Natural8
+MLME_NAN_SDF_SERVICE_DELETED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_SERVICE_DELETED.reason_code Reason_Code
+MLME_NAN_CHANNEL_BAND_ENTRY_SIZE.entry_count Natural8
+MLME_NAN_AVAILABILITY_ATTRIBUTE_SIZE.map_id Natural8
+MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR_DATA.tlv_value TOKEN
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.master_preference Natural8
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.random_factor Natural8
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.map_id Natural8
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.basic_rates Natural64
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.rates Natural64
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.ht_activated Boolean
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.vht_activated Boolean
+MLME_NAN_SDF_SEND.address MAC_Address
+MLME_NAN_SDF_SEND.frame_type DEBUG_TYPE_SDF_FRAME
+DEBUG_TYPE_NAN_SCAN_IND_FILTER_REASON Enum 0000 already_joined 0001 no_nan_ie 0002 lower_cluster_grade 0003 bssid_not_in_cluster_range 0004 malloc_failed
+DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE Enum 0000 Not_in_use 0001 FAW 0002 NDC 0003 DW
+DEBUG_TYPE_SDF_FRAME Enum 0000 Unicast 0001 Multicast
+DEBUG_TYPE_NAN_SERVICE_TYPE Enum 0000 Publish 0001 Subscribe 0002 FollowUp
+DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE Enum 0000 Invalid 0001 Committed 0002 Potential 0003 Committed_and_Potential 0004 Conditional 0005 Conditional_and_Potential
+DEBUG_TYPE_NAN_RECEIVED_FRAME_IGNORED_REASON Enum 0001 frame_is_null 0002 no_nan_ie 0003 no_master_indication_attr 0004 no_cluster_attr 0005 hop_count_threshold 0006 out_of_sync 0007 not_in_same_cluster
+DEBUG_TYPE_NAN_ROLE Enum 0000 Not_Set 0001 Anchor_Master 0002 Master 0003 Sync 0004 Non_Sync
+# Generated From mlme_hard/mlme_ftm_resp/mlme_ftm_resp_debug.xml
+trace_def 11
+0045 0000 MLME_FTM_RESP_BURST_COMPLETED 0001 peer_addr
+0045 0001 MLME_FTM_RESP_BURST_CYCLE_COMPLETED 0002 burst_count current_burst_count
+0045 0002 MLME_FTM_RESP_BURST_CYCLE_STARTED 0001 peer_addr
+0045 0003 MLME_FTM_RESP_BURST_FRAME_QUEUED 0004 follow_up_dialog_token dialog_token tod toa
+0045 0004 MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED 0002 ftm_per_burst current_ftm_count
+0045 0005 MLME_FTM_RESP_BURST_STARTED 0001 peer_addr
+0045 0006 MLME_FTM_RESP_IFTMR_DISCARDED 0001 peer_addr
+0045 0007 MLME_FTM_RESP_IFTMR_RECEIVED 0001 peer_addr
+0045 0008 MLME_FTM_RESP_STARTED 0001 interface_address
+0045 0009 MLME_FTM_RESP_STOP_FRAME_RECEIVED 0001 peer_addr
+0045 000a MLME_FTM_RESP_TRIGGER_FRAME_RECEIVED 0001 peer_addr
+# Generated From mlme_hard/mlme_ftm_resp/mlme_ftm_resp_debug.xml
+trace_types 16
+MLME_FTM_RESP_IFTMR_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_COMPLETED.peer_addr MAC_Address
+MLME_FTM_RESP_IFTMR_DISCARDED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_STARTED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_CYCLE_STARTED.peer_addr MAC_Address
+MLME_FTM_RESP_TRIGGER_FRAME_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_CYCLE_COMPLETED.burst_count Natural8
+MLME_FTM_RESP_BURST_CYCLE_COMPLETED.current_burst_count Natural8
+MLME_FTM_RESP_STOP_FRAME_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_FRAME_QUEUED.follow_up_dialog_token Natural8
+MLME_FTM_RESP_BURST_FRAME_QUEUED.dialog_token Natural8
+MLME_FTM_RESP_BURST_FRAME_QUEUED.tod Natural64
+MLME_FTM_RESP_BURST_FRAME_QUEUED.toa Natural64
+MLME_FTM_RESP_STARTED.interface_address MAC_Address
+MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED.ftm_per_burst Natural8
+MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED.current_ftm_count Natural8
+# Generated From mlme_hard/mlme_wifi_logger/mlme_wifi_logger_debug.xml
+trace_def 14
+0038 0000 MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED 0005 report_reason last_beacon_received_time start_time assoc_resp_result_code assoc_resp_result
+0038 0001 MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED 0005 report_reason last_beacon_received_time start_time auth_resp_result_code auth_resp_result
+0038 0002 MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER 0008 assoc_complete_time last_rssi deauth_rssi rssi_diff resp_seq_no deauth_seq_no seq_no_diff jammer_likelihood_percent
+0038 0003 MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED 0007 report_reason last_beacon_received_time assoc_complete_time assoc_resp_result_code assoc_resp_result deauth_reason_code deauth_reason
+0038 0004 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1 0009 eap_timestamp_1 eap_direction_1 eap_msg_type_1 eap_timestamp_2 eap_direction_2 eap_msg_type_2 eap_timestamp_3 eap_direction_3 eap_msg_type_3
+0038 0005 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2 0009 eap_timestamp_4 eap_direction_4 eap_msg_type_4 eap_timestamp_5 eap_direction_5 eap_msg_type_5 eap_timestamp_6 eap_direction_6 eap_msg_type_6
+0038 0006 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3 0009 eap_timestamp_7 eap_direction_7 eap_msg_type_7 eap_timestamp_8 eap_direction_8 eap_msg_type_8 eap_timestamp_9 eap_direction_9 eap_msg_type_9
+0038 0007 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4 0009 eap_timestamp_10 eap_direction_10 eap_msg_type_10 eap_timestamp_11 eap_direction_11 eap_msg_type_11 eap_timestamp_12 eap_direction_12 eap_msg_type_12
+0038 0008 MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED 0005 report_reason last_beacon_received_time start_time assoc_resp_result_code assoc_resp_result
+0038 0009 MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1 0009 roam_timestamp_1 roam_assoc_result_1 roam_deauth_reason_1 roam_timestamp_2 roam_result_code_2 roam_deauth_reason_2 roam_timestamp_3 roam_result_code_3 roam_deauth_reason_3
+0038 000a MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2 0009 roam_timestamp_4 roam_result_code_4 roam_deauth_reason_4 roam_timestamp_5 roam_result_code_5 roam_deauth_reason_5 roam_timestamp_6 roam_result_code_6 roam_deauth_reason_6
+0038 000b MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED 0005 report_reason last_beacon_received_time start_time auth_resp_result_code auth_resp_result
+0038 000c MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED 0002 last_roam_scan_mode last_roam_scan_mode_name
+0038 000d MLME_WIFI_LOGGER_DATA 0002 report line
+# Generated From mlme_hard/mlme_wifi_logger/mlme_wifi_logger_debug.xml
+trace_types 84
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_10 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_10 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_10 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_11 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_11 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_11 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_12 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_12 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_12 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.auth_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED.last_roam_scan_mode Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED.last_roam_scan_mode_name DEBUG_TYPE_WIFILOGGER_ROAMING_SCAN_MODE
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.auth_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.assoc_complete_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.last_rssi Natural16s
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.deauth_rssi Natural16s
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.rssi_diff Natural8
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.jammer_likelihood_percent Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_4 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_4 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_4 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_5 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_5 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_5 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_6 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_6 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_6 Reason_Code
+MLME_WIFI_LOGGER_DATA.report MBULK
+MLME_WIFI_LOGGER_DATA.line __LINE__
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_4 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_4 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_4 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_5 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_5 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_5 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_6 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_6 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_6 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.assoc_complete_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.deauth_reason Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_1 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_assoc_result_1 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_1 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_2 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_result_code_2 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_2 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_3 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_result_code_3 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_3 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_7 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_7 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_7 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_8 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_8 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_8 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_9 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_9 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_9 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_1 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_1 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_1 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_2 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_2 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_2 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_3 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_3 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_3 Natural8
+DEBUG_TYPE_WIFILOGGER_DIRECTION Enum 0000 Transmit 0001 Receive 0003 Any
+DEBUG_TYPE_WIFILOGGER_ROAMING_SCAN_MODE Enum 0001 ROAMING_SCAN_MODE_CASE_1 0002 ROAMING_SCAN_MODE_CASE_2 0003 ROAMING_SCAN_MODE_CASE_3 0004 ROAMING_SCAN_MODE_CASE_1_NCHO 0005 ROAMING_SCAN_MODE_NONE
+DEBUG_TYPE_WIFILOGGER_REPORT_REASON Enum 0000 Not_Specified 0001 See_Status 0002 Timeout 0003 Retries_Exhausted
+# Generated From mlme_hard/mlme_ba/mlme_ba_debug.xml
+trace_def 23
+0012 0000 MLME_BA_ADDTX_REQ 0007 address priority peer coex_allowed already_configured no_of_tx max_no_of_tx
+0012 0001 MLME_BA_ADD_RX_RAME_CFM 0001 Result_Code
+0012 0002 MLME_BA_ADD_RX_REQ 0005 address dialog_token parameter_set priority coex_allowed
+0012 0003 MLME_BA_ADD_TX_COMPLETION 0003 address priority success
+0012 0004 MLME_BA_ADD_TX_RAME_RESULT 0002 result_code seq_no
+0012 0005 MLME_BA_ADD_TX_RSP 0004 dialog_token status parameter_set priority
+0012 0006 MLME_BA_AGREEMENT_TIMEOUT 0003 peer_addr priority direction
+0012 0007 MLME_BA_AUTO_DELETE 0003 address tx_configured rx_configured
+0012 0008 MLME_BA_CONTROL 0004 set tx address configured
+0012 0009 MLME_BA_DELETE_DUPLICATE 0003 address priority direction
+0012 000a MLME_BA_DEL_REQ 0006 address priority direction reason_code tx_configured rx_configured
+0012 000b MLME_BA_DEL_TX_RAME_CFM 0004 address priority direction result_code
+0012 000c MLME_BA_FRAME_CANCEL 0001 address
+0012 000d MLME_BA_FRAME_DEL_REQ 0005 address priority direction tx_configured rx_configured
+0012 000e MLME_BA_HANDLE_DEL 0003 address priority direction
+0012 000f MLME_BA_INIT 0004 a_msdu_tx a_msdu_rx buffer_size timeout
+0012 0010 MLME_BA_RECEIVED_FRAME 0003 address associated tdls
+0012 0011 MLME_BA_RESET_PEER_REQ 0001 address
+0012 0012 MLME_BA_RESTORE_TX 0005 address priority desired configured coex_allowed
+0012 0013 MLME_BA_RETRY_ADD_TX 0005 address priority desired configured count
+0012 0014 MLME_BA_SEND_ADD_RSP_FRAME 0004 address dialog_token status_code parameter_set
+0012 0015 MLME_BA_SEND_ADD_TX_REQ_FRAME 0003 address dialog_token parameter_set
+0012 0016 MLME_BA_SEND_DEL_FRAME 0000
+# Generated From mlme_hard/mlme_ba/mlme_ba_debug.xml
+trace_types 54
+MLME_BA_AUTO_DELETE.address MAC_Address
+MLME_BA_ADD_TX_RAME_RESULT.result_code Result_Code
+MLME_BA_CONTROL.set Boolean
+MLME_BA_CONTROL.tx Boolean
+MLME_BA_CONTROL.address MAC_Address
+MLME_BA_DELETE_DUPLICATE.address MAC_Address
+MLME_BA_DELETE_DUPLICATE.priority Priority
+MLME_BA_DELETE_DUPLICATE.direction Direction
+MLME_BA_RESET_PEER_REQ.address MAC_Address
+MLME_BA_RETRY_ADD_TX.address MAC_Address
+MLME_BA_RETRY_ADD_TX.desired Boolean
+MLME_BA_RETRY_ADD_TX.configured Boolean
+MLME_BA_FRAME_DEL_REQ.address MAC_Address
+MLME_BA_FRAME_DEL_REQ.priority Priority
+MLME_BA_FRAME_DEL_REQ.direction Direction
+MLME_BA_DEL_REQ.address MAC_Address
+MLME_BA_DEL_REQ.priority Priority
+MLME_BA_DEL_REQ.direction Direction
+MLME_BA_DEL_REQ.reason_code Reason_Code
+MLME_BA_RECEIVED_FRAME.address MAC_Address
+MLME_BA_RECEIVED_FRAME.associated Boolean
+MLME_BA_RECEIVED_FRAME.tdls Boolean
+MLME_BA_ADDTX_REQ.address MAC_Address
+MLME_BA_ADDTX_REQ.priority Priority
+MLME_BA_ADDTX_REQ.peer Boolean
+MLME_BA_ADDTX_REQ.coex_allowed Boolean
+MLME_BA_ADDTX_REQ.already_configured Boolean
+MLME_BA_ADD_RX_REQ.address MAC_Address
+MLME_BA_ADD_RX_REQ.priority Priority
+MLME_BA_ADD_RX_REQ.coex_allowed Boolean
+MLME_BA_ADD_RX_RAME_CFM.Result_Code Result_Code
+MLME_BA_HANDLE_DEL.address MAC_Address
+MLME_BA_HANDLE_DEL.priority Priority
+MLME_BA_HANDLE_DEL.direction Direction
+MLME_BA_INIT.a_msdu_tx Boolean
+MLME_BA_INIT.a_msdu_rx Boolean
+MLME_BA_SEND_ADD_TX_REQ_FRAME.address MAC_Address
+MLME_BA_ADD_TX_RSP.priority Priority
+MLME_BA_SEND_ADD_RSP_FRAME.address MAC_Address
+MLME_BA_AGREEMENT_TIMEOUT.peer_addr MAC_Address
+MLME_BA_AGREEMENT_TIMEOUT.priority Priority
+MLME_BA_AGREEMENT_TIMEOUT.direction Direction
+MLME_BA_FRAME_CANCEL.address MAC_Address
+MLME_BA_RESTORE_TX.address MAC_Address
+MLME_BA_RESTORE_TX.desired Boolean
+MLME_BA_RESTORE_TX.configured Boolean
+MLME_BA_RESTORE_TX.coex_allowed Boolean
+MLME_BA_DEL_TX_RAME_CFM.address MAC_Address
+MLME_BA_DEL_TX_RAME_CFM.priority Priority
+MLME_BA_DEL_TX_RAME_CFM.direction Direction
+MLME_BA_DEL_TX_RAME_CFM.result_code Result_Code
+MLME_BA_ADD_TX_COMPLETION.address MAC_Address
+MLME_BA_ADD_TX_COMPLETION.priority Priority
+MLME_BA_ADD_TX_COMPLETION.success Boolean
+# Generated From mlme_hard/mlme/mlme_debug.xml
+trace_def 44
+002b 0000 MLME_CAPABILITIES_INIT_2G 0002 overwritten HT
+002b 0001 MLME_CAPABILITIES_INIT_5G 0001 HT
+002b 0002 MLME_CHANNEL_FREQ_NOT_SUITABLE_FOR_AP 0003 current_centre_freq current_channel_info reason
+002b 0003 MLME_DATA_ADD_VIF 0004 source_pid vif_type interface_addr device_addr
+002b 0004 MLME_DATA_PREAMBLE 0004 erp barker short_preamble short_slot_time
+002b 0005 MLME_DATA_REMOVE_VIF 0000
+002b 0006 MLME_DATA_SET_STA_OPERATION 0001 sta_operation
+002b 0007 MLME_FORCE_ACTIVE 0004 pid requester flags active
+002b 0008 MLME_INVALID_SIGNAL_DISCARDED 0002 pid signal
+002b 0009 MLME_LTE_COEX_INTERFERENCE_DETECTED 0005 current_centre_freq current_channel_info proposed_centre_freq proposed_channel_info channel_avoidance_mask
+002b 000a MLME_LTE_COEX_NO_INTERFERENCE 0004 current_centre_freq current_channel_info current_occupied_mask channel_avoidance_mask
+002b 000b MLME_MBULK_ADJUST_RANGE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000c MLME_MBULK_ALLOC 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000d MLME_MBULK_ALLOC_NULL 0002 pid line
+002b 000e MLME_MBULK_APPEND_TAIL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000f MLME_MBULK_CLONE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0010 MLME_MBULK_DAT_AT_R 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0011 MLME_MBULK_DAT_AT_RW 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0012 MLME_MBULK_DAT_R 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0013 MLME_MBULK_DAT_RW 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0014 MLME_MBULK_DEBUGGING_INFO_HAS_BEEN_OVERWRITTEN 0001 debug_pointer
+002b 0015 MLME_MBULK_DUPLICATE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0016 MLME_MBULK_DUPLICATE_NULL 0002 pid line
+002b 0017 MLME_MBULK_FREE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0018 MLME_MBULK_FREE_NULL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0019 MLME_MBULK_FREE_WITH_SIGNAL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001a MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001b MLME_MBULK_PREPEND_HEAD 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001c MLME_MBULK_PROCESS_FSM_EVENT 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001d MLME_MBULK_PROCESS_FSM_EVENT_NULL 0002 pid line
+002b 001e MLME_MBULK_SET_READONLY 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001f MLME_MBULK_SET_READWRITE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0020 MLME_MBULK_TRIM_HEAD 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0021 MLME_MBULK_WITH_SIGNAL_ALLOC 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0022 MLME_STA_RECORD_ADD 0002 pid address
+002b 0023 MLME_STA_RECORD_DEFAULT_SET_RATES 0003 basic_rates ht_mcs_set vht_mcs_set
+002b 0024 MLME_STA_RECORD_DELETE 0002 pid address
+002b 0025 MLME_STA_RECORD_INITIALISE_CAPS 0004 address sta_caps ht_rx_mcs vht_rx_mcs
+002b 0026 MLME_STA_RECORD_PMF 0001 pmf_in_use
+002b 0027 MLME_STA_RECORD_SET_CAPS 0002 address sta_caps
+002b 0028 MLME_STA_RECORD_SET_NSS 0007 address peer_current_nss peer_new_nss link_current_nss link_new_nss vif_current_nss mib_max_nss
+002b 0029 MLME_STA_SET_QOS_INFO 0002 address qos_info
+002b 002a MLME_VIF_CAPABILITIES_RESET_TQAM 0001 tqam_activated
+002b 002b MLME_VIF_CAPABILITIES_STATIC_UPDATE_TQAM 0002 point tqam_activated
+# Generated From mlme_hard/mlme/mlme_debug.xml
+trace_types 100
+MLME_MBULK_DEBUGGING_INFO_HAS_BEEN_OVERWRITTEN.debug_pointer Natural32
+MLME_CAPABILITIES_INIT_2G.overwritten Boolean
+MLME_CAPABILITIES_INIT_2G.HT Boolean
+MLME_MBULK_WITH_SIGNAL_ALLOC.pid FsmProcessId
+MLME_MBULK_WITH_SIGNAL_ALLOC.mbulk_address Natural32
+MLME_MBULK_WITH_SIGNAL_ALLOC.free_flag Boolean
+MLME_DATA_PREAMBLE.erp Boolean
+MLME_DATA_PREAMBLE.barker Boolean
+MLME_DATA_PREAMBLE.short_preamble Boolean
+MLME_DATA_PREAMBLE.short_slot_time Boolean
+MLME_STA_RECORD_DEFAULT_SET_RATES.basic_rates RATE
+MLME_STA_RECORD_PMF.pmf_in_use Boolean
+MLME_MBULK_PROCESS_FSM_EVENT.pid FsmProcessId
+MLME_MBULK_PROCESS_FSM_EVENT.mbulk_address Natural32
+MLME_MBULK_PROCESS_FSM_EVENT.free_flag Boolean
+MLME_MBULK_DAT_RW.pid FsmProcessId
+MLME_MBULK_DAT_RW.mbulk_address Natural32
+MLME_MBULK_DAT_RW.free_flag Boolean
+MLME_MBULK_TRIM_HEAD.pid FsmProcessId
+MLME_MBULK_TRIM_HEAD.mbulk_address Natural32
+MLME_MBULK_TRIM_HEAD.free_flag Boolean
+MLME_CHANNEL_FREQ_NOT_SUITABLE_FOR_AP.reason DEBUG_TYPE_AP_CHANNEL_CHECK_REASON
+MLME_MBULK_DUPLICATE.pid FsmProcessId
+MLME_MBULK_DUPLICATE.mbulk_address Natural32
+MLME_MBULK_DUPLICATE.free_flag Boolean
+MLME_MBULK_ADJUST_RANGE.pid FsmProcessId
+MLME_MBULK_ADJUST_RANGE.mbulk_address Natural32
+MLME_MBULK_ADJUST_RANGE.free_flag Boolean
+MLME_CAPABILITIES_INIT_5G.HT Boolean
+MLME_STA_RECORD_SET_NSS.address MAC_Address
+MLME_STA_RECORD_SET_NSS.peer_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.peer_new_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.link_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.link_new_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.vif_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.mib_max_nss DEBUG_TYPE_SS
+MLME_LTE_COEX_INTERFERENCE_DETECTED.channel_avoidance_mask Natural64
+MLME_MBULK_FREE_NULL.pid FsmProcessId
+MLME_MBULK_FREE_NULL.mbulk_address Natural32
+MLME_MBULK_FREE_NULL.free_flag Boolean
+MLME_STA_RECORD_DELETE.pid FsmProcessId
+MLME_STA_RECORD_DELETE.address MAC_Address
+MLME_STA_SET_QOS_INFO.address MAC_Address
+MLME_MBULK_APPEND_TAIL.pid FsmProcessId
+MLME_MBULK_APPEND_TAIL.mbulk_address Natural32
+MLME_MBULK_APPEND_TAIL.free_flag Boolean
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.pid FsmProcessId
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.mbulk_address Natural32
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.free_flag Boolean
+MLME_STA_RECORD_INITIALISE_CAPS.address MAC_Address
+MLME_STA_RECORD_INITIALISE_CAPS.sta_caps Natural64
+MLME_MBULK_DAT_R.pid FsmProcessId
+MLME_MBULK_DAT_R.mbulk_address Natural32
+MLME_MBULK_DAT_R.free_flag Boolean
+MLME_MBULK_SET_READWRITE.pid FsmProcessId
+MLME_MBULK_SET_READWRITE.mbulk_address Natural32
+MLME_MBULK_SET_READWRITE.free_flag Boolean
+MLME_MBULK_PROCESS_FSM_EVENT_NULL.pid FsmProcessId
+MLME_LTE_COEX_NO_INTERFERENCE.current_occupied_mask Natural64
+MLME_LTE_COEX_NO_INTERFERENCE.channel_avoidance_mask Natural64
+MLME_MBULK_PREPEND_HEAD.pid FsmProcessId
+MLME_MBULK_PREPEND_HEAD.mbulk_address Natural32
+MLME_MBULK_PREPEND_HEAD.free_flag Boolean
+MLME_MBULK_ALLOC_NULL.pid FsmProcessId
+MLME_DATA_ADD_VIF.source_pid FsmProcessId
+MLME_DATA_ADD_VIF.vif_type VIF_TYPE
+MLME_DATA_ADD_VIF.interface_addr MAC_Address
+MLME_DATA_ADD_VIF.device_addr MAC_Address
+MLME_MBULK_ALLOC.pid FsmProcessId
+MLME_MBULK_ALLOC.mbulk_address Natural32
+MLME_MBULK_ALLOC.free_flag Boolean
+MLME_STA_RECORD_ADD.pid FsmProcessId
+MLME_STA_RECORD_ADD.address MAC_Address
+MLME_STA_RECORD_SET_CAPS.address MAC_Address
+MLME_STA_RECORD_SET_CAPS.sta_caps Natural64
+MLME_VIF_CAPABILITIES_RESET_TQAM.tqam_activated Boolean
+MLME_MBULK_SET_READONLY.pid FsmProcessId
+MLME_MBULK_SET_READONLY.mbulk_address Natural32
+MLME_MBULK_SET_READONLY.free_flag Boolean
+MLME_MBULK_DAT_AT_R.pid FsmProcessId
+MLME_MBULK_DAT_AT_R.mbulk_address Natural32
+MLME_MBULK_DAT_AT_R.free_flag Boolean
+MLME_MBULK_CLONE.pid FsmProcessId
+MLME_MBULK_CLONE.mbulk_address Natural32
+MLME_MBULK_CLONE.free_flag Boolean
+MLME_MBULK_FREE_WITH_SIGNAL.pid FsmProcessId
+MLME_MBULK_FREE_WITH_SIGNAL.mbulk_address Natural32
+MLME_MBULK_FREE_WITH_SIGNAL.free_flag Boolean
+MLME_MBULK_FREE.pid FsmProcessId
+MLME_MBULK_FREE.mbulk_address Natural32
+MLME_MBULK_FREE.free_flag Boolean
+MLME_VIF_CAPABILITIES_STATIC_UPDATE_TQAM.tqam_activated Boolean
+MLME_MBULK_DAT_AT_RW.pid FsmProcessId
+MLME_MBULK_DAT_AT_RW.mbulk_address Natural32
+MLME_MBULK_DAT_AT_RW.free_flag Boolean
+MLME_INVALID_SIGNAL_DISCARDED.pid FsmProcessId
+MLME_INVALID_SIGNAL_DISCARDED.signal SignalId
+MLME_FORCE_ACTIVE.pid FsmProcessId
+MLME_FORCE_ACTIVE.active Boolean
+MLME_MBULK_DUPLICATE_NULL.pid FsmProcessId
+DEBUG_TYPE_AP_CHANNEL_CHECK_REASON Enum 0000 2g_channel_must_be_20mhz 0001 unsupported_bandwidth 0002 invalid_channel 0003 invalid_channel_no_outdoor_dfs 0004 invalid_channel_no_ir 0005 ht_on_no_ofdm_channel
+DEBUG_TYPE_SS Enum 00 unspecified_or_unchange 01 single 02 two
+# Generated From mlme_hard/mlme_ie/mlme_ie_debug.xml
+trace_def 118
+0040 0000 MLME_IE_20_40_BSS_COEX_PARAMS 0001 bss_coex_info
+0040 0001 MLME_IE_20_40_BSS_COEX_SIZE 0001 size
+0040 0002 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_CHANNEL 0001 channel_num
+0040 0003 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_PARAMS 0001 operating_class
+0040 0004 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_SIZE 0001 size
+0040 0005 MLME_IE_ADAPTIVE_11R_CISCO_CAPS 0001 capabilities
+0040 0006 MLME_IE_ADAPTIVE_11R_SAMSUNG_IE_SIZE 0001 size
+0040 0007 MLME_IE_AID_PARAMS 0001 aid
+0040 0008 MLME_IE_AID_SIZE 0001 size
+0040 0009 MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS 0003 channel_switch_mode new_channel_number channel_switch_count
+0040 000a MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_SIZE 0001 size
+0040 000b MLME_IE_CHANNEL_SWITCH_TIMING_ELEMENT_PARAMS 0002 switch_time switch_timeout
+0040 000c MLME_IE_CHANNEL_SWITCH_TIMING_ELEMENT_SIZE 0001 size
+0040 000d MLME_IE_CHANNEL_SWITCH_WRAPPER_PARAMS 0000
+0040 000e MLME_IE_CHANNEL_SWITCH_WRAPPER_SIZE 0001 size
+0040 000f MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS 0003 dms_id dms_length request_type
+0040 0010 MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_SIZE 0001 size
+0040 0011 MLME_IE_DS_PARAMETER_SET_PARAMS 0001 channel
+0040 0012 MLME_IE_DS_PARAMETER_SET_SIZE 0001 size
+0040 0013 MLME_IE_ERP_PARAMS 0001 erp
+0040 0014 MLME_IE_ERP_SIZE 0001 size
+0040 0015 MLME_IE_EXTENDED_CAPABILITIES_PARAMS 0001 extended_capabilities
+0040 0016 MLME_IE_EXTENDED_CAPABILITIES_SIZE 0001 size
+0040 0017 MLME_IE_FTM_BURST_PARAMETERS_PARAMS 0007 status_value burst_duration_count min_delta_ftm partial_tsf asap_ftm_per_burst format_bandwidth burst_interval
+0040 0018 MLME_IE_FTM_BURST_PARAMETERS_SIZE 0001 size
+0040 0019 MLME_IE_FTM_ERROR_CODE_PARAMS 0003 start_time bssid error_code
+0040 001a MLME_IE_FTM_ERROR_CODE_SIZE 0001 size
+0040 001b MLME_IE_FTM_LCI_REQUEST_PARAMS 0004 measurement_token measurement_request_mode measurement_type location_subject
+0040 001c MLME_IE_FTM_LCI_REQUEST_SIZE 0001 size
+0040 001d MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS 0006 measurement_token measurement_request_mode measurement_type location_subject location_civic_type location_service_interval
+0040 001e MLME_IE_FTM_LOCATION_CIVIC_REQUEST_SIZE 0001 size
+0040 001f MLME_IE_FTM_RANGE_ENTRY_PARAMS 0005 start_time bssid range max_error reserved
+0040 0020 MLME_IE_FTM_RANGE_ENTRY_SIZE 0001 size
+0040 0021 MLME_IE_FTM_SYNC_INFO_PARAMS 0002 id_extension tsf_sync_info
+0040 0022 MLME_IE_FTM_SYNC_INFO_SIZE 0001 size
+0040 0023 MLME_IE_GET_AKM_SUITES_NUMBER 0001 akm_suites_number
+0040 0024 MLME_IE_GET_PAIRWISE_CIPHERS_NUMBER 0001 pairwise_ciphers_number
+0040 0025 MLME_IE_HT_OPERATION_PARAMS 0005 primary_channel information_subset_1 information_subset_2 information_subset_3 basic_ht_mcs
+0040 0026 MLME_IE_HT_OPERATION_SIZE 0001 size
+0040 0027 MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS 0003 bssid initiator_address responder_address
+0040 0028 MLME_IE_LINK_IDENTIFIER_ELEMENT_SIZE 0001 size
+0040 0029 MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS 0004 channel_number measurement_start_time measurement_duration map
+0040 002a MLME_IE_MEASUREMENT_REPORT_BASIC_SIZE 0001 size
+0040 002b MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS 0009 operating_class channel_num measurement_duration reported_frame_info rcpi rsni bssid antenna_id parent_tsf
+0040 002c MLME_IE_MEASUREMENT_REPORT_BEACON_SIZE 0001 size
+0040 002d MLME_IE_MEASUREMENT_REPORT_PARAMS 0003 measurement_token measurement_report_mode measurement_type
+0040 002e MLME_IE_MEASUREMENT_REPORT_SIZE 0001 size
+0040 002f MLME_IE_MLME_WFA_P2P_IE_PARAMS 0002 oui oui_type
+0040 0030 MLME_IE_MLME_WFA_P2P_IE_SIZE 0001 size
+0040 0031 MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS 0004 hdr_id hdr_length index ctw_ops
+0040 0032 MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_SIZE 0001 size
+0040 0033 MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR 0004 count_type duration interval start_time
+0040 0034 MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS 0003 hdr_id hdr_length status
+0040 0035 MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_SIZE 0001 size
+0040 0036 MLME_IE_MOBILITY_DOMAIN_PARAMS 0002 identifier cap_and_policy
+0040 0037 MLME_IE_MOBILITY_DOMAIN_SIZE 0001 size
+0040 0038 MLME_IE_NAN_HEADER_PARAMS 0003 oui oui_type ie_size
+0040 0039 MLME_IE_NAN_HEADER_SIZE 0001 size
+0040 003a MLME_IE_OPERATING_MODE_NOTIFICATION_PARAMS 0001 operating_mode
+0040 003b MLME_IE_OPERATING_MODE_NOTIFICATION_SIZE 0001 size
+0040 003c MLME_IE_POWER_CAPABILITY_PARAMS 0002 min_power max_power
+0040 003d MLME_IE_POWER_CAPABILITY_SIZE 0001 size
+0040 003e MLME_IE_QUIET_ELEMENT_PARAMS 0003 period duration offset
+0040 003f MLME_IE_QUIET_ELEMENT_SIZE 0001 size
+0040 0040 MLME_IE_REPORTED_FRAME_BODY_PARAMS 0001 reported_frame_body
+0040 0041 MLME_IE_REPORTED_FRAME_BODY_SIZE 0001 size
+0040 0042 MLME_IE_RM_ENABLED_CAPABILITIES_PARAMS 0001 caps
+0040 0043 MLME_IE_RM_ENABLED_CAPABILITIES_SIZE 0001 size
+0040 0044 MLME_IE_RSN_CAPABILITIES 0001 capabilities
+0040 0045 MLME_IE_SCSC_CHANNEL_LIST_PARAMS 0003 oui oui_type oui_subtype
+0040 0046 MLME_IE_SCSC_CHANNEL_LIST_SCAN_CHANNEL 0002 freq scan_policy
+0040 0047 MLME_IE_SCSC_CHANNEL_LIST_SIZE 0001 size
+0040 0048 MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS 0003 peer_address priority dw_or_faw
+0040 0049 MLME_IE_SCSC_NAN_FOLLOWUP_SIZE 0001 size
+0040 004a MLME_IE_SCSC_SCAN_NEIGHBOUR_BSSID 0002 bssid freq
+0040 004b MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_PARAMS 0000
+0040 004c MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_SIZE 0001 size
+0040 004d MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS 0005 oui oui_type oui_subtype ssid_length ssid
+0040 004e MLME_IE_SCSC_SCAN_SSID_FILTER_SIZE 0001 size
+0040 004f MLME_IE_SCSC_SCAN_TIMING_PARAMS 0008 oui oui_type oui_subtype min_period max_period exponent step_count skip_first_period
+0040 0050 MLME_IE_SCSC_SCAN_TIMING_SIZE 0001 size
+0040 0051 MLME_IE_SCSC_SCAN_TIMING_V_2_PARAMS 0002 max_channel_time_active max_channel_time_passive
+0040 0052 MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_PARAMS 0001 secondary_channel_offset
+0040 0053 MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_SIZE 0001 size
+0040 0054 MLME_IE_SSID_PARAMS 0001 ssid
+0040 0055 MLME_IE_SSID_SIZE 0001 size
+0040 0056 MLME_IE_SUPPORTED_CHANNELS_PARAMS 0001 first_channels_mask
+0040 0057 MLME_IE_SUPPORTED_CHANNELS_SIZE 0001 size
+0040 0058 MLME_IE_SUPPORTED_OPERATING_CLASSES_PARAMS 0001 current_operating_class
+0040 0059 MLME_IE_SUPPORTED_OPERATING_CLASSES_SIZE 0001 size
+0040 005a MLME_IE_SUPPORTED_RATES_PARAMS 0001 rates
+0040 005b MLME_IE_SUPPORTED_RATES_SIZE 0001 size
+0040 005c MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS 0005 user_priority classifier_type classifier_mask dest_addr type
+0040 005d MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_SIZE 0001 size
+0040 005e MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS 0005 user_priority classifier_type classifier_mask ip_version ip_addr
+0040 005f MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_SIZE 0001 size
+0040 0060 MLME_IE_TIMEOUT_INTERVAL_PARAMS 0002 type value
+0040 0061 MLME_IE_TIMEOUT_INTERVAL_SIZE 0001 size
+0040 0062 MLME_IE_TPC_REPORT_PARAMS 0002 tx_power link_margin
+0040 0063 MLME_IE_TPC_REPORT_SIZE 0001 size
+0040 0064 MLME_IE_TPU_BUFFER_STATUS_ELEMENT_PARAMS 0001 tpu_buffer_status_info
+0040 0065 MLME_IE_TPU_BUFFER_STATUS_ELEMENT_SIZE 0001 size
+0040 0066 MLME_IE_TQAM_CAPABILITIES_MBULK_FIND 0001 result
+0040 0067 MLME_IE_TQAM_CAPS_AND_OPS_SIZE 0001 size
+0040 0068 MLME_IE_TQAM_CAPS_SIZE 0001 size
+0040 0069 MLME_IE_TQAM_OPERATION_MBULK_FIND 0001 result
+0040 006a MLME_IE_TQAM_SUBTYPE_MBULK_FIND 0001 result
+0040 006b MLME_IE_VALIDATE_RSN 0008 is_valid pairwise_count_in_ie pairwise_count_computed akm_count_declared akm_count_real pmkid_count capabilities ie_length
+0040 006c MLME_IE_VHT_OPERATION_PARAMS 0004 channel_width channel_center_frequency_segment_0 channel_center_frequency_segment_1 basic_vht_mcs_and_nss
+0040 006d MLME_IE_VHT_OPERATION_SIZE 0001 size
+0040 006e MLME_IE_WFA_TPC_REPORT_PARAMS 0005 oui oui_type oui_subtype tx_power link_margin
+0040 006f MLME_IE_WFA_TPC_REPORT_SIZE 0001 size
+0040 0070 MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS 0003 channel_width channel_center_freq_seg0 channel_center_freq_seg1
+0040 0071 MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_SIZE 0001 size
+0040 0072 MLME_IE_WMM_INFO_PARAMS 0005 oui oui_type oui_subtype version qos_info_field
+0040 0073 MLME_IE_WMM_INFO_SIZE 0001 size
+0040 0074 MLME_IE_WMM_PARAMETER_PARAMS 0007 oui version qos_info_field ac_be ac_bk ac_vi ac_vo
+0040 0075 MLME_IE_WMM_PARAMETER_SIZE 0001 size
+# Generated From mlme_hard/mlme_ie/mlme_ie_debug.xml
+trace_types 159
+MLME_IE_EXTENDED_CAPABILITIES_SIZE.size Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_token Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_report_mode Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_type Natural8
+MLME_IE_DS_PARAMETER_SET_PARAMS.channel Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_width Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_center_freq_seg0 Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_center_freq_seg1 Natural8
+MLME_IE_WMM_INFO_PARAMS.oui Natural8[3]
+MLME_IE_WMM_INFO_PARAMS.oui_type Natural8
+MLME_IE_WMM_INFO_PARAMS.oui_subtype Natural8
+MLME_IE_WMM_INFO_PARAMS.version Natural8
+MLME_IE_WMM_INFO_PARAMS.qos_info_field Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_SIZE.size Natural8
+MLME_IE_NAN_HEADER_PARAMS.oui Natural8[3]
+MLME_IE_NAN_HEADER_PARAMS.oui_type Natural8
+MLME_IE_NAN_HEADER_PARAMS.ie_size Natural8
+MLME_IE_SUPPORTED_CHANNELS_PARAMS.first_channels_mask Natural64
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui_type Natural8
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui_subtype Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.hdr_id Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.index Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.ctw_ops Natural8
+MLME_IE_SUPPORTED_OPERATING_CLASSES_PARAMS.current_operating_class Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.oui Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.version Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.qos_info_field Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.ac_be Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_bk Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_vi Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_vo Natural32
+MLME_IE_TQAM_OPERATION_MBULK_FIND.result Natural32
+MLME_IE_20_40_BSS_COEX_PARAMS.bss_coex_info Natural8
+MLME_IE_EXTENDED_CAPABILITIES_PARAMS.extended_capabilities Natural8[9]
+MLME_IE_VHT_OPERATION_PARAMS.channel_width Natural8
+MLME_IE_VHT_OPERATION_PARAMS.channel_center_frequency_segment_0 Natural8
+MLME_IE_VHT_OPERATION_PARAMS.channel_center_frequency_segment_1 Natural8
+MLME_IE_TPC_REPORT_PARAMS.tx_power Natural8
+MLME_IE_TPC_REPORT_PARAMS.link_margin Natural8
+MLME_IE_REPORTED_FRAME_BODY_PARAMS.reported_frame_body Natural64
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.dms_id Natural8
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.dms_length Natural8
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.request_type Natural8
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.channel_number Natural8
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.measurement_start_time Natural64
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.map Natural8
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_SIZE.size Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_token Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_request_mode Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_type Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.location_subject Natural8
+MLME_IE_FTM_SYNC_INFO_PARAMS.id_extension Natural8
+MLME_IE_FTM_SYNC_INFO_PARAMS.tsf_sync_info Natural32
+MLME_IE_TQAM_SUBTYPE_MBULK_FIND.result Natural32
+MLME_IE_MOBILITY_DOMAIN_SIZE.size Natural8
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.count_type Natural8
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.duration Natural32
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.interval Natural32
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.start_time Natural32
+MLME_IE_CHANNEL_SWITCH_WRAPPER_SIZE.size Natural8
+MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_CHANNEL.channel_num Natural8
+MLME_IE_OPERATING_MODE_NOTIFICATION_PARAMS.operating_mode Natural8
+MLME_IE_VALIDATE_RSN.is_valid Boolean
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui Natural8[3]
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui_type Natural8
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui_subtype Natural8
+MLME_IE_WFA_TPC_REPORT_PARAMS.tx_power Natural8s
+MLME_IE_WFA_TPC_REPORT_PARAMS.link_margin Natural8s
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui_subtype Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.ssid_length Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.ssid Char[6]
+MLME_IE_NAN_HEADER_SIZE.size Natural8
+MLME_IE_DS_PARAMETER_SET_SIZE.size Natural8
+MLME_IE_TQAM_CAPS_SIZE.size Natural8
+MLME_IE_SSID_SIZE.size Natural8
+MLME_IE_MLME_WFA_P2P_IE_PARAMS.oui Natural8[3]
+MLME_IE_MLME_WFA_P2P_IE_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui_subtype Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.min_period Natural32
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.max_period Natural32
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.exponent Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.step_count Natural8
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.peer_address MAC_Address
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.priority Natural8
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.dw_or_faw Natural8
+MLME_IE_SUPPORTED_RATES_SIZE.size Natural8
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.start_time Natural32
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.bssid MAC_Address
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.range Natural32
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.max_error Natural8
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.reserved Natural8
+MLME_IE_POWER_CAPABILITY_PARAMS.min_power Natural8s
+MLME_IE_POWER_CAPABILITY_PARAMS.max_power Natural8s
+MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_PARAMS.secondary_channel_offset Natural8
+MLME_IE_RM_ENABLED_CAPABILITIES_SIZE.size Natural8
+MLME_IE_SUPPORTED_RATES_PARAMS.rates Natural64
+MLME_IE_FTM_ERROR_CODE_PARAMS.start_time Natural32
+MLME_IE_FTM_ERROR_CODE_PARAMS.bssid MAC_Address
+MLME_IE_FTM_ERROR_CODE_PARAMS.error_code Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_SIZE.size Natural8
+MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_SIZE.size Natural8
+MLME_IE_SCSC_CHANNEL_LIST_SCAN_CHANNEL.scan_policy Natural8
+MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_PARAMS.operating_class Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.status_value Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.burst_duration_count Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.min_delta_ftm Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.asap_ftm_per_burst Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.format_bandwidth Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.operating_class Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.channel_num Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.reported_frame_info Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.rcpi Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.rsni Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.bssid MAC_Address
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.antenna_id Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.parent_tsf Natural32
+MLME_IE_QUIET_ELEMENT_PARAMS.period Natural8
+MLME_IE_SCSC_SCAN_NEIGHBOUR_BSSID.bssid MAC_Address
+MLME_IE_TIMEOUT_INTERVAL_PARAMS.type Natural8
+MLME_IE_TIMEOUT_INTERVAL_PARAMS.value Natural32
+MLME_IE_RM_ENABLED_CAPABILITIES_PARAMS.caps Natural8[5]
+MLME_IE_HT_OPERATION_PARAMS.primary_channel Natural8
+MLME_IE_HT_OPERATION_PARAMS.information_subset_1 Natural8
+MLME_IE_HT_OPERATION_PARAMS.basic_ht_mcs Natural8[8]
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.user_priority Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.classifier_type Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.classifier_mask Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.ip_version Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.ip_addr Natural64
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.bssid MAC_Address
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.initiator_address MAC_Address
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.responder_address MAC_Address
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS.hdr_id Natural8
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS.status Natural8
+MLME_IE_SSID_PARAMS.ssid TOKEN
+MLME_IE_TQAM_CAPABILITIES_MBULK_FIND.result Natural32
+MLME_IE_TPU_BUFFER_STATUS_ELEMENT_PARAMS.tpu_buffer_status_info Natural8
+MLME_IE_TQAM_CAPS_AND_OPS_SIZE.size Natural8
+MLME_IE_SCSC_CHANNEL_LIST_SIZE.size Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.user_priority Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.classifier_type Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.classifier_mask Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.dest_addr MAC_Address
+MLME_IE_WMM_PARAMETER_SIZE.size Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_token Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_request_mode Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_type Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_subject Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_civic_type Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_service_interval Natural8
+MLME_IE_ERP_PARAMS.erp Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.channel_switch_mode Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.new_channel_number Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.channel_switch_count Natural8
+# Generated From mlme_hard/mlme_conmgr/mlme_conmgr_debug.xml
+trace_def 7
+0004 0000 MLME_BSS_MAX_IDLE_PERIOD_CONFIGURE 0002 max_idle_period protected_keep_alive_required
+0004 0001 MLME_CONMGR_BSS_IDLE_PERIOD_CAP 0002 ie max
+0004 0002 MLME_CONMGR_SLOW_AP_DELAY 0001 poll
+0004 0003 MLME_CONMGR_SLOW_AP_SWITCH 0002 max_time increment
+0004 0004 MLME_CONMGR_STATUS_CODE 0001 status
+0004 0005 MLME_CONMGR_TEARDOWN 0002 deauth_requested deauth_reason
+0004 0006 MLME_CONMGR_VALUES 0002 parent size_of_host_ies
+# Generated From mlme_hard/mlme_conmgr/mlme_conmgr_debug.xml
+trace_types 3
+MLME_CONMGR_SLOW_AP_SWITCH.max_time Natural32
+MLME_CONMGR_TEARDOWN.deauth_requested Boolean
+MLME_BSS_MAX_IDLE_PERIOD_CONFIGURE.protected_keep_alive_required Boolean
+# Generated From mlme_hard/mlme_sa_query/mlme_sa_query_debug.xml
+trace_def 2
+0020 0000 MLME_SA_QUERY_RESULT 0002 address status
+0020 0001 MLME_SA_QUERY_STATUS 0002 address is_sa_query_waiting_for_response
+# Generated From mlme_hard/mlme_sa_query/mlme_sa_query_debug.xml
+trace_types 4
+MLME_SA_QUERY_STATUS.address MAC_Address
+MLME_SA_QUERY_STATUS.is_sa_query_waiting_for_response bool
+MLME_SA_QUERY_RESULT.address MAC_Address
+MLME_SA_QUERY_RESULT.status Boolean
+# Generated From mlme_hard/mlme_regulatory/mlme_regulatory_debug.xml
+trace_def 12
+0015 0000 MLME_COUNTRY_WORLD 0000
+0015 0001 MLME_REGULATORY_ADJUSTED_CHANNEL_CONFIG 0003 proposed_channel_info resolved_channel_info found
+0015 0002 MLME_REGULATORY_CHANNELS_SUPPORTED 0006 supported_channels length num_subbands step channel num_channels
+0015 0003 MLME_REGULATORY_CHANNEL_REQ 0005 freq_center freq_start freq_end bandwidth_mhz reject_indoor_outdoor_flag
+0015 0004 MLME_REGULATORY_CHANNEL_REQ_FAILURE 0004 freq_start freq_end bandwidth_mhz reason
+0015 0005 MLME_REGULATORY_DO_COUNTRY_CODES_MATCH 0002 mib_country_code country_code
+0015 0006 MLME_REGULATORY_MASK 0001 mask
+0015 0007 MLME_REGULATORY_MIB_IS_DISABLED 0000
+0015 0008 MLME_REGULATORY_NO_CELL 0001 channels_disabled
+0015 0009 MLME_REGULATORY_RULE 0005 freq_start freq_end max_bandwidth_mhz max_power flags
+0015 000a MLME_REGULATORY_RULE_ADD 0006 freq_start freq_end max_bandwidth_mhz max_power flags rule_is_valid
+0015 000b MLME_SET_COUNTRY 0003 alpha reg_rules channel_map
+# Generated From mlme_hard/mlme_regulatory/mlme_regulatory_debug.xml
+trace_types 25
+MLME_REGULATORY_CHANNEL_REQ.reject_indoor_outdoor_flag Natural8
+MLME_REGULATORY_RULE.max_bandwidth_mhz Natural8
+MLME_REGULATORY_RULE.max_power Natural16s
+MLME_REGULATORY_RULE.flags Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.supported_channels Boolean
+MLME_REGULATORY_CHANNELS_SUPPORTED.length Natural32
+MLME_REGULATORY_CHANNELS_SUPPORTED.num_subbands Natural32
+MLME_REGULATORY_CHANNELS_SUPPORTED.step Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.channel Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.num_channels Natural8
+MLME_REGULATORY_ADJUSTED_CHANNEL_CONFIG.found Boolean
+MLME_REGULATORY_DO_COUNTRY_CODES_MATCH.mib_country_code Char[2]
+MLME_REGULATORY_DO_COUNTRY_CODES_MATCH.country_code Char[2]
+MLME_REGULATORY_MASK.mask Natural48
+MLME_REGULATORY_NO_CELL.channels_disabled Boolean
+MLME_REGULATORY_CHANNEL_REQ_FAILURE.reason DEBUG_TYPE_REGULATORY_CHANNEL_REQ_FAILURE_REASON
+MLME_REGULATORY_RULE_ADD.freq_start EDGE_OF_BAND
+MLME_REGULATORY_RULE_ADD.freq_end EDGE_OF_BAND
+MLME_REGULATORY_RULE_ADD.max_bandwidth_mhz Natural8
+MLME_REGULATORY_RULE_ADD.max_power Decibels
+MLME_REGULATORY_RULE_ADD.flags Natural8
+MLME_REGULATORY_RULE_ADD.rule_is_valid Boolean
+MLME_SET_COUNTRY.alpha Char[2]
+MLME_SET_COUNTRY.reg_rules Natural8
+MLME_SET_COUNTRY.channel_map MBULK
+DEBUG_TYPE_REGULATORY_CHANNEL_REQ_FAILURE_REASON Enum 0000 invalid_bandwidth 0001 mib_read_failed 0002 header_read_failed 0003 no_rule 0004 bandwidth_40m_not_allowed_for_2g4 0005 not_allowed_in_no_cell
+# Generated From mlme_hard/mlme_measurements/mlme_measurements_debug.xml
+trace_def 27
+0022 0000 MLME_MEASUREMENTS_ADD_SCAN_RESULT 0001 result_code
+0022 0001 MLME_MEASUREMENTS_BUILD_RM_REPORT 0002 size result
+0022 0002 MLME_MEASUREMENTS_CLEARING_RESULTS 0000
+0022 0003 MLME_MEASUREMENTS_INIT 0001 interface_address
+0022 0004 MLME_MEASUREMENTS_LINK_REPORT 0004 interface_address bssid rcpi rsni
+0022 0005 MLME_MEASUREMENTS_LINK_REQUEST 0005 dialog_token used_power max_power rssi snr
+0022 0006 MLME_MEASUREMENTS_OPT_IE_SSID 0001 ssid
+0022 0007 MLME_MEASUREMENTS_REPORT_INFO 0002 bssid ie_len
+0022 0008 MLME_MEASUREMENTS_REQUEST 0005 token class channel mode duration
+0022 0009 MLME_MEASUREMENTS_REQUESTING_SCAN 0002 measurement_duration ies_len
+0022 000a MLME_MEASUREMENTS_REQUEST_IE 0002 token count
+0022 000b MLME_MEASUREMENTS_REQUEST_OPT_IE 0002 reporting_detail reason
+0022 000c MLME_MEASUREMENTS_REQ_REFUSED 0002 token mode
+0022 000d MLME_MEASUREMENTS_REQ_SCAN_MASK 0005 class channel mode channel_time freq_mask
+0022 000e MLME_MEASUREMENTS_RM_CAPS 0004 link beacon_passive beacon_active beacon_table
+0022 000f MLME_MEASUREMENTS_RM_REJECTED 0002 dummy reason
+0022 0010 MLME_MEASUREMENTS_RM_REQ 0001 result
+0022 0011 MLME_MEASUREMENTS_SCAN_COUNT 0002 performed required
+0022 0012 MLME_MEASUREMENTS_SCAN_DELAYED 0001 delay
+0022 0013 MLME_MEASUREMENTS_SCAN_IES 0002 frame frame_length
+0022 0014 MLME_MEASUREMENTS_SCAN_MASKS 0003 active passive mask
+0022 0015 MLME_MEASUREMENTS_SCAN_REQUEST 0001 data
+0022 0016 MLME_MEASUREMENTS_SCAN_RESULT 0001 address
+0022 0017 MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE 0003 ie len total
+0022 0018 MLME_MEASUREMENTS_SCAN_RESULT_NODE_TFS 0001 tfs
+0022 0019 MLME_MEASUREMENTS_TABLE_SIZE 0001 entries
+0022 001a MLME_MEASUREMENTS_TX_CFM 0001 transmission_status
+# Generated From mlme_hard/mlme_measurements/mlme_measurements_debug.xml
+trace_types 57
+MLME_MEASUREMENTS_SCAN_MASKS.active NATURAL48
+MLME_MEASUREMENTS_SCAN_MASKS.passive NATURAL48
+MLME_MEASUREMENTS_SCAN_MASKS.mask NATURAL48
+MLME_MEASUREMENTS_LINK_REQUEST.dialog_token NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.used_power NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.max_power NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.rssi Decibels
+MLME_MEASUREMENTS_LINK_REQUEST.snr Decibels
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_TFS.tfs NATURAL64
+MLME_MEASUREMENTS_REQ_REFUSED.token NATURAL8
+MLME_MEASUREMENTS_REQ_REFUSED.mode NATURAL8
+MLME_MEASUREMENTS_RM_REQ.result NATURAL8
+MLME_MEASUREMENTS_RM_CAPS.link Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_passive Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_active Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_table Boolean
+MLME_MEASUREMENTS_SCAN_IES.frame MBULK
+MLME_MEASUREMENTS_SCAN_IES.frame_length NATURAL32
+MLME_MEASUREMENTS_REQUEST_IE.token NATURAL8
+MLME_MEASUREMENTS_REQUEST_IE.count NATURAL8
+MLME_MEASUREMENTS_ADD_SCAN_RESULT.result_code NATURAL16
+MLME_MEASUREMENTS_INIT.interface_address MAC_Address
+MLME_MEASUREMENTS_SCAN_RESULT.address MAC_Address
+MLME_MEASUREMENTS_TABLE_SIZE.entries NATURAL16
+MLME_MEASUREMENTS_SCAN_COUNT.performed NATURAL8
+MLME_MEASUREMENTS_SCAN_COUNT.required NATURAL8
+MLME_MEASUREMENTS_TX_CFM.transmission_status NATURAL16
+MLME_MEASUREMENTS_REQUEST_OPT_IE.reporting_detail NATURAL8
+MLME_MEASUREMENTS_REQUEST_OPT_IE.reason DEBUG_TYPE_RM_REQ_OPTIONAL_IE
+MLME_MEASUREMENTS_LINK_REPORT.interface_address MAC_Address
+MLME_MEASUREMENTS_LINK_REPORT.bssid MAC_Address
+MLME_MEASUREMENTS_LINK_REPORT.rcpi NATURAL8
+MLME_MEASUREMENTS_LINK_REPORT.rsni NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.ie NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.len NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.total NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.class NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.channel NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.mode NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.channel_time NATURAL16
+MLME_MEASUREMENTS_REQ_SCAN_MASK.freq_mask NATURAL48
+MLME_MEASUREMENTS_OPT_IE_SSID.ssid NATURAL8
+MLME_MEASUREMENTS_REQUEST.token NATURAL8
+MLME_MEASUREMENTS_REQUEST.class NATURAL8
+MLME_MEASUREMENTS_REQUEST.channel NATURAL8
+MLME_MEASUREMENTS_REQUEST.mode NATURAL8
+MLME_MEASUREMENTS_REQUEST.duration NATURAL16
+MLME_MEASUREMENTS_REPORT_INFO.bssid MAC_Address
+MLME_MEASUREMENTS_REPORT_INFO.ie_len NATURAL8
+MLME_MEASUREMENTS_REQUESTING_SCAN.measurement_duration NATURAL16
+MLME_MEASUREMENTS_REQUESTING_SCAN.ies_len NATURAL16
+MLME_MEASUREMENTS_SCAN_DELAYED.delay NATURAL32
+MLME_MEASUREMENTS_BUILD_RM_REPORT.size NATURAL16
+MLME_MEASUREMENTS_BUILD_RM_REPORT.result NATURAL8
+MLME_MEASUREMENTS_SCAN_REQUEST.data TOKEN
+MLME_MEASUREMENTS_RM_REJECTED.dummy NATURAL8
+MLME_MEASUREMENTS_RM_REJECTED.reason DEBUG_TYPE_RM_REQ_FILTER_REASON
+DEBUG_TYPE_RM_REQ_OPTIONAL_IE Enum 0000 ssid 0001 beacon_reporting 0002 reporting_detail 0003 subelements 0004 ap_channel
+DEBUG_TYPE_RM_REQ_FILTER_REASON Enum 0000 req_success 0001 frame_too_small 0002 beacon_req_too_small 0003 mib_not_enabled 0004 no_channels_to_scan 0005 duration_too_large 0006 invalid_request 0007 not_supported 0008 add_scan_failed 0009 ftm_failed
+# Generated From mlme_hard/mlme_api/mlme_api_dplane_debug.xml
+trace_def 2
+0044 0000 MLME_API_DPLANE_STA_CLEAR_CONFIRM 0001 address
+0044 0001 MLME_API_DPLANE_STA_PAUSE_CONFIRM 0001 address
+# Generated From mlme_hard/mlme_api/mlme_api_dplane_debug.xml
+trace_types 2
+MLME_API_DPLANE_STA_PAUSE_CONFIRM.address MAC_Address
+MLME_API_DPLANE_STA_CLEAR_CONFIRM.address MAC_Address
+# Generated From mlme_hard/mlme_api/mlme_api_macrame_debug.xml
+trace_def 35
+0034 0000 MLME_API_MACRAME_ADD_BA_CONFIRM 0006 pid sta_mac priority direction result_code seq_no
+0034 0001 MLME_API_MACRAME_ADD_NOA_INDICATION 0006 blackout_id duration period start_time count flags
+0034 0002 MLME_API_MACRAME_BA_ADD_INDICATION 0002 sta_addr tid_bitmap
+0034 0003 MLME_API_MACRAME_BA_DELETE_CONFIRM 0004 sta_mac priority direction result_code
+0034 0004 MLME_API_MACRAME_BA_DELETE_INDICATION 0004 reason_code peer_addr priority direction
+0034 0005 MLME_API_MACRAME_BA_ERROR_INDICATION 0004 reason_code peer_addr priority direction
+0034 0006 MLME_API_MACRAME_BEACON_NEXT_WINDOW 0003 pid beacon_start_listen beacon_end_listen
+0034 0007 MLME_API_MACRAME_BLACKOUT_END_INIDCATION 0001 id
+0034 0008 MLME_API_MACRAME_CHANNEL_ACTIVITY 0000
+0034 0009 MLME_API_MACRAME_CHANNEL_AVOIDANCE_INDICATION 0001 channel_avoidance_mask
+0034 000a MLME_API_MACRAME_CHANNEL_SWITCH_COUNT_UPDATE 0001 channel_switch_count
+0034 000b MLME_API_MACRAME_CONNECTION_QUALITY_TRIGGER_INDICATION 0001 trigger_flags
+0034 000c MLME_API_MACRAME_DEL_NOA_INDICATION 0001 blackout_id
+0034 000d MLME_API_MACRAME_ECSA_COUNT_FINISHED_INDICATION 0001 sw_time
+0034 000e MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION 0005 frame rssi snr primary_chan_freq fralocal_timeme
+0034 000f MLME_API_MACRAME_MATCHED_FILTER_INIDCATION 0005 frame dest_pid filter_id packet_filter_mode mac_hdr_len
+0034 0010 MLME_API_MACRAME_MIC_FAILURE_INIDCATION 0003 sta_addr key_type key_id
+0034 0011 MLME_API_MACRAME_NAN_DW_FINISHED_INDICATION 0001 pid
+0034 0012 MLME_API_MACRAME_POWER_REDUCTION_INDICATION 0001 power_reduction_channel_mask
+0034 0013 MLME_API_MACRAME_QE_ADD_INDICATION 0006 blackout_id quiet_duration quiet_period start_time quiet_offset flags
+0034 0014 MLME_API_MACRAME_QE_DELETE_INDICATION 0000
+0034 0015 MLME_API_MACRAME_QE_UPDATE_COUNT 0001 quiet_count
+0034 0016 MLME_API_MACRAME_REQ_PROBE_REQ 0000
+0034 0017 MLME_API_MACRAME_RSSI_REPORT 0002 bssid rssi
+0034 0018 MLME_API_MACRAME_RX_BLOCKACK_CONTROL_INIDCATION 0001 rx_allowed
+0034 0019 MLME_API_MACRAME_SET_NUM_ANTENNAS 0001 num_antennas
+0034 001a MLME_API_MACRAME_STA_UNKNOWN_PEER_INDICATION 0001 peer_addr
+0034 001b MLME_API_MACRAME_TDLS_CTRL_INDICATION 0001 tdls_allowed
+0034 001c MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION 0003 address traffic_pkt_cnt_tx traffic_pkt_cnt_rx
+0034 001d MLME_API_MACRAME_TPU_SP_INIDCATION 0002 address ca_bitmap
+0034 001e MLME_API_MACRAME_TX_BLOCKACK_CONTROL_INIDCATION 0001 tx_allowed
+0034 001f MLME_API_MACRAME_TX_FRAME_CONFIRM 0004 pid status tag receiver_address
+0034 0020 MLME_API_MACRAME_VIF_DEREGISTER_CONFIRM 0000
+0034 0021 MLME_API_MACRAME_VIF_DESCHEDULE_INDICATION 0001 pid
+0034 0022 MLME_API_MACRAME_VIF_SCHEDULE_INDICATION 0001 pid
+# Generated From mlme_hard/mlme_api/mlme_api_macrame_debug.xml
+trace_types 65
+MLME_API_MACRAME_QE_ADD_INDICATION.quiet_duration Natural32
+MLME_API_MACRAME_QE_ADD_INDICATION.quiet_period Natural32
+MLME_API_MACRAME_QE_ADD_INDICATION.start_time Natural64
+MLME_API_MACRAME_ADD_BA_CONFIRM.pid FsmProcessId
+MLME_API_MACRAME_ADD_BA_CONFIRM.sta_mac MAC_Address
+MLME_API_MACRAME_ADD_BA_CONFIRM.priority Priority
+MLME_API_MACRAME_ADD_BA_CONFIRM.direction Direction
+MLME_API_MACRAME_ADD_BA_CONFIRM.result_code Result_Code
+MLME_API_MACRAME_BA_DELETE_CONFIRM.sta_mac MAC_Address
+MLME_API_MACRAME_BA_DELETE_CONFIRM.priority Priority
+MLME_API_MACRAME_BA_DELETE_CONFIRM.direction Direction
+MLME_API_MACRAME_BA_DELETE_CONFIRM.result_code Result_Code
+MLME_API_MACRAME_CHANNEL_SWITCH_COUNT_UPDATE.channel_switch_count Natural8
+MLME_API_MACRAME_STA_UNKNOWN_PEER_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_RSSI_REPORT.bssid MAC_Address
+MLME_API_MACRAME_RSSI_REPORT.rssi Integer16
+MLME_API_MACRAME_BA_DELETE_INDICATION.reason_code Reason_Code
+MLME_API_MACRAME_BA_DELETE_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_BA_DELETE_INDICATION.priority Priority
+MLME_API_MACRAME_BA_DELETE_INDICATION.direction Direction
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.frame MBULK
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.dest_pid FsmProcessId
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.filter_id Natural8
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.packet_filter_mode Packet_Filter_Mode
+MLME_API_MACRAME_ADD_NOA_INDICATION.duration Natural32
+MLME_API_MACRAME_ADD_NOA_INDICATION.period Natural32
+MLME_API_MACRAME_ADD_NOA_INDICATION.start_time Natural64
+MLME_API_MACRAME_ADD_NOA_INDICATION.count Natural8
+MLME_API_MACRAME_SET_NUM_ANTENNAS.num_antennas Natural8
+MLME_API_MACRAME_VIF_DESCHEDULE_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.frame MBULK
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.rssi Decibels
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.snr Decibels
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.fralocal_timeme Natural64
+MLME_API_MACRAME_POWER_REDUCTION_INDICATION.power_reduction_channel_mask Natural64
+MLME_API_MACRAME_MIC_FAILURE_INIDCATION.sta_addr MAC_Address
+MLME_API_MACRAME_MIC_FAILURE_INIDCATION.key_type Key_Type
+MLME_API_MACRAME_TPU_SP_INIDCATION.address MAC_Address
+MLME_API_MACRAME_TPU_SP_INIDCATION.ca_bitmap Natural8
+MLME_API_MACRAME_RX_BLOCKACK_CONTROL_INIDCATION.rx_allowed Boolean
+MLME_API_MACRAME_TX_FRAME_CONFIRM.pid FsmProcessId
+MLME_API_MACRAME_TX_FRAME_CONFIRM.status Transmission_Status
+MLME_API_MACRAME_TX_FRAME_CONFIRM.tag Client_Tag
+MLME_API_MACRAME_TX_FRAME_CONFIRM.receiver_address MAC_Address
+MLME_API_MACRAME_TX_BLOCKACK_CONTROL_INIDCATION.tx_allowed Boolean
+MLME_API_MACRAME_NAN_DW_FINISHED_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_CONNECTION_QUALITY_TRIGGER_INDICATION.trigger_flags Natural8
+MLME_API_MACRAME_ECSA_COUNT_FINISHED_INDICATION.sw_time Natural32
+MLME_API_MACRAME_CHANNEL_AVOIDANCE_INDICATION.channel_avoidance_mask Natural64
+MLME_API_MACRAME_BLACKOUT_END_INIDCATION.id BLACKOUT_ID
+MLME_API_MACRAME_TDLS_CTRL_INDICATION.tdls_allowed Boolean
+MLME_API_MACRAME_QE_UPDATE_COUNT.quiet_count Natural8
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.pid FsmProcessId
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.beacon_start_listen Natural32
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.beacon_end_listen Natural32
+MLME_API_MACRAME_BA_ADD_INDICATION.sta_addr MAC_Address
+MLME_API_MACRAME_BA_ADD_INDICATION.tid_bitmap Natural8
+MLME_API_MACRAME_BA_ERROR_INDICATION.reason_code Reason_Code
+MLME_API_MACRAME_BA_ERROR_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_BA_ERROR_INDICATION.priority Priority
+MLME_API_MACRAME_BA_ERROR_INDICATION.direction Direction
+MLME_API_MACRAME_VIF_SCHEDULE_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.address MAC_Address
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.traffic_pkt_cnt_tx Natural32
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.traffic_pkt_cnt_rx Natural32
+# Generated From mlme_hard/mlme_scan/mlme_scan_debug.xml
+trace_def 41
+0001 0000 MLME_NO_OF_REGISTERED_VIFS 0001 number
+0001 0001 MLME_PNO_SIGNAL_BELOW_THRESHOLD 0002 rssi_threshold frame_rssi
+0001 0002 MLME_SCAN_ADD_REQ 0005 requester new_scan_id scan_type device_address new_prority
+0001 0003 MLME_SCAN_BOOK_NEXT_SCAN 0002 pause_count sps_count
+0001 0004 MLME_SCAN_BOOK_NEXT_SCAN_TIME 0001 time
+0001 0005 MLME_SCAN_DEL_REQ 0002 requester scan_id
+0001 0006 MLME_SCAN_DEVICE_ADDRESS_RANDOMISED 0003 mask old_address new_address
+0001 0007 MLME_SCAN_DUE_TIME 0004 period scan_next_due_time is_scan_periodic periodic_scan_count
+0001 0008 MLME_SCAN_FRAME_REPORTED 0001 frequency
+0001 0009 MLME_SCAN_FREQUENCY_NOT_ALLOWED_CONFIG 0001 frequency
+0001 000a MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY 0003 frequency config policy
+0001 000b MLME_SCAN_FREQUENCY_NOT_ALLOWED_WIFISHARING 0001 frequency
+0001 000c MLME_SCAN_GET_NEXT_CHANNEL 0002 type mask
+0001 000d MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE 0005 rule posn mask frequency policy
+0001 000e MLME_SCAN_GET_NEXT_CHANNEL_RESULT 0002 channel_found frequency
+0001 000f MLME_SCAN_GET_NEXT_SCAN_CANDIDATE 0007 priority highest_priority pause_priority is_scan_in_home_time end_of_home_time scan_start_time next_next_start_time
+0001 0010 MLME_SCAN_GET_NEXT_SCAN_RESULT 0003 priority now next_scan_due_time
+0001 0011 MLME_SCAN_HOME_TIME 0000
+0001 0012 MLME_SCAN_IE_CHANNEL 0003 count mask scan_policy
+0001 0013 MLME_SCAN_IE_CHANNEL_ENTRY 0003 frequency count scan_mask
+0001 0014 MLME_SCAN_IE_NEIGHBOUR_DL 0001 neighbour_descriptor_count
+0001 0015 MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY 0003 bssid channel_freq mask
+0001 0016 MLME_SCAN_IE_SSID_FILTER 0000
+0001 0017 MLME_SCAN_IE_TIMING 0005 min_period max_period exponent step_count scan_skip_first_period
+0001 0018 MLME_SCAN_INIT 0003 usable_aerials hw_aerials mib_aerials
+0001 0019 MLME_SCAN_MASK 0001 mask
+0001 001a MLME_SCAN_MASK_UPDATE 0004 frequency set channel_mask channels_mask
+0001 001b MLME_SCAN_NCHO_VALUES 0004 channel_scan_time probe_interval home_time away_time
+0001 001c MLME_SCAN_PAUSE_REQ 0005 requester pause priority pause_count current_priority
+0001 001d MLME_SCAN_PROCESS_SCAN_END 0001 period
+0001 001e MLME_SCAN_RESULT 0003 frequency rssi hash
+0001 001f MLME_SCAN_RESULT_DELETED 0001 address
+0001 0020 MLME_SCAN_RESULT_FILTERED 0004 frequency bcn_bssid rssi reason
+0001 0021 MLME_SCAN_SEQUENCE_NUMBER_RANDOMISED 0000
+0001 0022 MLME_SCAN_SPS_DELETE 0002 id flag
+0001 0023 MLME_SCAN_SPS_NOT_FOUND 0001 id
+0001 0024 MLME_SCAN_START_CHANNEL_SCAN 0004 id frequency active rescan_count
+0001 0025 MLME_SCAN_TIMER_INDICATION 0004 next_scan_time is_scan_suspended pause_count pause_priority
+0001 0026 MLME_SCAN_VALIDATE_AP 0005 ds_chan ht_chan rice_freq ds_freq ht_freq
+0001 0027 MLME_SCAN_WHAT_NEXT 0004 start_time time_on_chl chl_duration rescan_count
+0001 0028 MLME_SET_ACL_REQ 0001 result_code
+# Generated From mlme_hard/mlme_scan/mlme_scan_debug.xml
+trace_types 87
+MLME_SCAN_ADD_REQ.requester FsmProcessId
+MLME_SCAN_ADD_REQ.new_scan_id SCAN_ID
+MLME_SCAN_ADD_REQ.scan_type SCAN_TYPE
+MLME_SCAN_ADD_REQ.device_address MAC_Address
+MLME_SCAN_ADD_REQ.new_prority Natural8
+MLME_SCAN_NCHO_VALUES.channel_scan_time Integer16
+MLME_SCAN_NCHO_VALUES.probe_interval Integer16
+MLME_SCAN_NCHO_VALUES.home_time Natural32
+MLME_SCAN_NCHO_VALUES.away_time Natural32
+MLME_SCAN_DUE_TIME.period Natural32
+MLME_SCAN_DUE_TIME.scan_next_due_time Natural32
+MLME_SCAN_DUE_TIME.is_scan_periodic Boolean
+MLME_SCAN_DUE_TIME.periodic_scan_count Natural8
+MLME_SCAN_WHAT_NEXT.start_time Natural32
+MLME_SCAN_WHAT_NEXT.time_on_chl Natural32
+MLME_SCAN_WHAT_NEXT.chl_duration Natural32
+MLME_SCAN_WHAT_NEXT.rescan_count Natural8
+MLME_SCAN_DEL_REQ.requester FsmProcessId
+MLME_SCAN_DEL_REQ.scan_id SCAN_ID
+MLME_SCAN_SPS_NOT_FOUND.id SCAN_ID
+MLME_SCAN_START_CHANNEL_SCAN.id SCAN_ID
+MLME_SCAN_START_CHANNEL_SCAN.frequency Channel_Frequency
+MLME_SCAN_START_CHANNEL_SCAN.active Boolean
+MLME_SCAN_START_CHANNEL_SCAN.rescan_count Natural8
+MLME_SET_ACL_REQ.result_code Integer16
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.mask Natural64
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.old_address MAC_Address
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.new_address MAC_Address
+MLME_SCAN_IE_CHANNEL.count Natural8
+MLME_SCAN_IE_CHANNEL.mask Natural64
+MLME_SCAN_IE_CHANNEL.scan_policy Natural8
+MLME_SCAN_BOOK_NEXT_SCAN_TIME.time Natural32
+MLME_SCAN_TIMER_INDICATION.next_scan_time Natural32
+MLME_SCAN_TIMER_INDICATION.is_scan_suspended Boolean
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.is_scan_in_home_time Boolean
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.end_of_home_time Natural32
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.scan_start_time Natural32
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.next_next_start_time Natural32
+MLME_NO_OF_REGISTERED_VIFS.number Integer16
+MLME_SCAN_PAUSE_REQ.requester FsmProcessId
+MLME_SCAN_PAUSE_REQ.pause Boolean
+MLME_SCAN_PAUSE_REQ.priority Natural8
+MLME_SCAN_PAUSE_REQ.current_priority Natural8
+MLME_SCAN_IE_CHANNEL_ENTRY.frequency Channel_Frequency
+MLME_SCAN_IE_CHANNEL_ENTRY.scan_mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.frequency Channel_Frequency
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.policy Natural8
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_WIFISHARING.frequency Channel_Frequency
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_CONFIG.frequency Channel_Frequency
+MLME_SCAN_SPS_DELETE.id SCAN_ID
+MLME_SCAN_SPS_DELETE.flag Boolean
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY.frequency Channel_Frequency
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY.policy Natural8
+MLME_SCAN_IE_TIMING.min_period Natural32
+MLME_SCAN_IE_TIMING.max_period Natural32
+MLME_SCAN_IE_TIMING.exponent Natural8
+MLME_SCAN_IE_TIMING.step_count Natural8
+MLME_SCAN_IE_TIMING.scan_skip_first_period Boolean
+MLME_SCAN_RESULT.frequency Channel_Frequency
+MLME_SCAN_RESULT.rssi Decibels
+MLME_SCAN_MASK_UPDATE.frequency Channel_Frequency
+MLME_SCAN_MASK_UPDATE.set Boolean
+MLME_SCAN_MASK_UPDATE.channel_mask Natural64
+MLME_SCAN_MASK_UPDATE.channels_mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL.type DEBUG_TYPE_SCAN_CHANNEL
+MLME_SCAN_GET_NEXT_CHANNEL.mask Natural64
+MLME_SCAN_RESULT_FILTERED.frequency Channel_Frequency
+MLME_SCAN_RESULT_FILTERED.bcn_bssid MAC_Address
+MLME_SCAN_RESULT_FILTERED.rssi Decibels
+MLME_SCAN_RESULT_FILTERED.reason DEBUG_TYPE_SCAN_FILTER_REASON_TYPE
+MLME_SCAN_GET_NEXT_CHANNEL_RESULT.channel_found Boolean
+MLME_SCAN_GET_NEXT_CHANNEL_RESULT.frequency Channel_Frequency
+MLME_SCAN_RESULT_DELETED.address MAC_Address
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.bssid MAC_Address
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.channel_freq Channel_Frequency
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.mask Natural64
+MLME_SCAN_MASK.mask Natural64
+MLME_PNO_SIGNAL_BELOW_THRESHOLD.rssi_threshold Decibels
+MLME_PNO_SIGNAL_BELOW_THRESHOLD.frame_rssi Decibels
+MLME_SCAN_PROCESS_SCAN_END.period Natural32
+MLME_SCAN_FRAME_REPORTED.frequency Channel_Frequency
+MLME_SCAN_GET_NEXT_SCAN_RESULT.now Natural32
+MLME_SCAN_GET_NEXT_SCAN_RESULT.next_scan_due_time Natural32
+MLME_SCAN_VALIDATE_AP.rice_freq Channel_Frequency
+MLME_SCAN_VALIDATE_AP.ds_freq Channel_Frequency
+MLME_SCAN_VALIDATE_AP.ht_freq Channel_Frequency
+DEBUG_TYPE_SCAN_FILTER_REASON_TYPE Enum 0000 ssid 0001 freq 0002 address 0003 invalid 0004 channel 0005 hash 0006 rssi 0007 not_basic 0008 bssid_filter 0009 policy 000a test_mode 000b ssid_list 000c not_p2p_ssid 000d hotlist 000e tracking_scan 000f blacklisted_sender 0010 pno 0011 duplicate_frame 0012 not_on_channel 0013 off_channel_invalid 0014 no_sps 0015 ncho
+DEBUG_TYPE_SCAN_CHANNEL Enum 0000 IE 0001 ALL 0002 NEIGHBOUR
+# Generated From mlme_hard/mlme_scan/mlme_scan_channel_debug.xml
+trace_def 13
+0046 0000 MLME_SCAN_CHANNEL_BUSY 0001 busy
+0046 0001 MLME_SCAN_CHANNEL_COMPLETED 0002 frames type
+0046 0002 MLME_SCAN_CHANNEL_DFS_ACTIVE 0003 frequency flags policy
+0046 0003 MLME_SCAN_CHANNEL_ENTRY_ALL 0003 channel_freq mask count
+0046 0004 MLME_SCAN_CHANNEL_INIT 0001 pid
+0046 0005 MLME_SCAN_CHANNEL_MIB 0003 frames ap_min ap_max
+0046 0006 MLME_SCAN_CHANNEL_REQUEST 0003 frequency flags policy
+0046 0007 MLME_SCAN_CHANNEL_SCHEDULE 0002 frequency schedule_time
+0046 0008 MLME_SCAN_CHANNEL_SEND_PROBES 0003 frequency num_probes_ies wildcard_scan
+0046 0009 MLME_SCAN_CHANNEL_SET_TIME_PROBE 0002 frequency duration
+0046 000a MLME_SCAN_CHANNEL_START_LISTENING 0005 passive rescan_count start total timeout
+0046 000b MLME_SCAN_CHANNEL_TIMES 0002 now max
+0046 000c MLME_SCAN_CHANNEL_WHAT_NEXT 0003 frequency total rescan_count
+# Generated From mlme_hard/mlme_scan/mlme_scan_channel_debug.xml
+trace_types 29
+MLME_SCAN_CHANNEL_DFS_ACTIVE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_DFS_ACTIVE.flags Natural8
+MLME_SCAN_CHANNEL_DFS_ACTIVE.policy Natural8
+MLME_SCAN_CHANNEL_COMPLETED.frames Natural8
+MLME_SCAN_CHANNEL_COMPLETED.type DEBUG_TYPE_SCAN_CHANNEL_END
+MLME_SCAN_CHANNEL_WHAT_NEXT.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_WHAT_NEXT.total Natural32
+MLME_SCAN_CHANNEL_WHAT_NEXT.rescan_count Natural8
+MLME_SCAN_CHANNEL_REQUEST.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_REQUEST.flags Natural8
+MLME_SCAN_CHANNEL_REQUEST.policy Natural8
+MLME_SCAN_CHANNEL_SET_TIME_PROBE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SET_TIME_PROBE.duration Natural32
+MLME_SCAN_CHANNEL_SCHEDULE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SCHEDULE.schedule_time Natural32
+MLME_SCAN_CHANNEL_TIMES.now Natural32
+MLME_SCAN_CHANNEL_TIMES.max Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.passive Boolean
+MLME_SCAN_CHANNEL_START_LISTENING.rescan_count Natural8
+MLME_SCAN_CHANNEL_START_LISTENING.start Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.total Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.timeout Natural32
+MLME_SCAN_CHANNEL_BUSY.busy Boolean
+MLME_SCAN_CHANNEL_ENTRY_ALL.channel_freq Channel_Frequency
+MLME_SCAN_CHANNEL_ENTRY_ALL.mask Natural64
+MLME_SCAN_CHANNEL_ENTRY_ALL.count Natural8
+MLME_SCAN_CHANNEL_SEND_PROBES.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SEND_PROBES.num_probes_ies Natural8
+MLME_SCAN_CHANNEL_SEND_PROBES.wildcard_scan Boolean
+DEBUG_TYPE_SCAN_CHANNEL_END Enum 0000 natural 0003 frame 0004 ap 0005 busy 0006 abort
+# Generated From coex/coex_debug.xml
+trace_def 280
+001d 0000 CME_BT_TRANSACTION_REQ 0009 seqNum valid is_tx pri start end chStart chEnd antMask
+001d 0001 CME_SIMRX_REQ 0001 enabled
+001d 0002 COEX_API_WLAN_PRIV_SET_STATE 0003 current_state new_state __LINE__
+001d 0003 COEX_BEACON 0003 our_pos aid __LINE__
+001d 0004 COEX_CTL_DEINIT 0002 cflags __LINE__
+001d 0005 COEX_CTL_INIT 0003 cflags freq __LINE__
+001d 0006 COEX_CTL_STROBE 0001 __LINE__
+001d 0007 COEX_CTL_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0008 COEX_FLEXIMAC_ARBITRATION_ALERT 0004 mac update_time arb_required __LINE__
+001d 0009 COEX_FLEXIMAC_ARBITRATION_LEVEL 0004 mac current required __LINE__
+001d 000a COEX_FLEXIMAC_BT_OFF 0001 __LINE__
+001d 000b COEX_FLEXIMAC_BT_ON 0001 __LINE__
+001d 000c COEX_FLEXIMAC_DEINIT 0001 __LINE__
+001d 000d COEX_FLEXIMAC_DPLP_OFF 0002 mac __LINE__
+001d 000e COEX_FLEXIMAC_FLUSH 0003 head missed __LINE__
+001d 000f COEX_FLEXIMAC_FLUSH_ELEMENT 0002 tail __LINE__
+001d 0010 COEX_FLEXIMAC_INIT 0001 __LINE__
+001d 0011 COEX_FLEXIMAC_INTERRUPT_DEREGISTER 0003 mac int_num __LINE__
+001d 0012 COEX_FLEXIMAC_INTERRUPT_REGISTER 0004 mac source int_num __LINE__
+001d 0013 COEX_FLEXIMAC_MACPP_ALLOWED_ALERT 0005 mac update_time update_allowed reason __LINE__
+001d 0014 COEX_FLEXIMAC_OVERRIDE_ALERT 0004 mac update_time override __LINE__
+001d 0015 COEX_FLEXIMAC_OVERRIDE_MACPP 0004 mac override_macpp override_femctrl_drive __LINE__
+001d 0016 COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED 0004 flags mac arb_required __LINE__
+001d 0017 COEX_FLEXIMAC_REQ_OVERRIDE 0004 flags mac override __LINE__
+001d 0018 COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING 0004 flags mac spectral_checking_enabled __LINE__
+001d 0019 COEX_FLEXIMAC_REQ_WLAN_LISTEN 0004 flags mac priority __LINE__
+001d 001a COEX_FLEXIMAC_RESULT 0002 result __LINE__
+001d 001b COEX_FLEXIMAC_RING_BG 0006 mac isr head tail missed __LINE__
+001d 001c COEX_FLEXIMAC_RING_DEINIT 0001 __LINE__
+001d 001d COEX_FLEXIMAC_RING_ENTRY 0008 mac time_us event data data1 data2 count __LINE__
+001d 001e COEX_FLEXIMAC_RING_INIT 0001 __LINE__
+001d 001f COEX_FLEXIMAC_RING_RING 0004 mac head tail __LINE__
+001d 0020 COEX_FLEXIMAC_SHUTDOWN_ALERT 0003 mac_instance time_us __LINE__
+001d 0021 COEX_FLEXIMAC_SIM_RX_ALERT 0004 mac update_time simrx_disabled __LINE__
+001d 0022 COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT 0004 mac update_time spectral_checking_enabled __LINE__
+001d 0023 COEX_FLEXIMAC_START_ALERT 0008 flags mac time_us channel_start channel_end band antenna_bitmask __LINE__
+001d 0024 COEX_FLEXIMAC_START_CONFIG_ALERT 0006 arb_req spectral simrx override listen __LINE__
+001d 0025 COEX_FLEXIMAC_TRANS_ALERT 0005 mac_instance time_us seq_num result __LINE__
+001d 0026 COEX_FLEXIMAC_WLAN_LISTEN_ALERT 0004 mac update_time priority __LINE__
+001d 0027 COEX_GENERIC 0008 data0 data1 data2 data3 data4 data5 data6 data7
+001d 0028 COEX_HWM_COEX_BB_ALLOWED_ORIDE 0002 COEX_BB_ALLOWED_ORIDE __LINE__
+001d 0029 COEX_HWM_COEX_BB_CFG 0002 COEX_BB_CFG_EN __LINE__
+001d 002a COEX_HWM_COEX_BB_DEBUG 0004 bb_debug_sel bb_debug_if_sel bb_debug_cdl_sel bb_debug_cdl_arb_sel
+001d 002b COEX_HWM_COEX_BB_DEFER 0006 wl_tx wl_rx bt_tx bt_rx lte_tx lte_rx
+001d 002c COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME 0003 mac_instance wl_sw_asrx_start_time __LINE__
+001d 002d COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE 0003 mac_instance wl_sw_asrx_update __LINE__
+001d 002e COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME 0003 mac_instance wl_sw_astx_start_time __LINE__
+001d 002f COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE 0003 mac_instance wl_sw_astx_update __LINE__
+001d 0030 COEX_HWM_COEX_BB_WL_SW_IF_EN 0003 mac_instance wl_sw_if_en __LINE__
+001d 0031 COEX_HWM_COEX_BT_ALLOWED_ORIDE 0002 COEX_BT_ALLOWED_ORIDE __LINE__
+001d 0032 COEX_HWM_COEX_BT_CFG 0002 COEX_BT_CFG __LINE__
+001d 0033 COEX_HWM_COEX_BT_DEBUG 0004 bt_debug_sel bt_cdl_debug_sel bt_sw_if_debug_sel __LINE__
+001d 0034 COEX_HWM_COEX_BT_DEFER 0003 bt_tx bt_rx __LINE__
+001d 0035 COEX_HWM_COEX_BT_WL_CDL_CFG 0006 mac_instance bt_tx_col bt_rx_col wl_tx_col wl_rx_col __LINE__
+001d 0036 COEX_HWM_COEX_BT_WL_DEBUG 0002 bt_wl_debug_sel __LINE__
+001d 0037 COEX_HWM_COEX_CDL_CFG 0004 wl_abort_cfg bt_abort_cfg bt_wl_tx_col bt_wl_rx_col
+001d 0038 COEX_HWM_COEX_CLKGEN_CFG 0002 COEX_BB_CLKGEN_CFG __LINE__
+001d 0039 COEX_HWM_COEX_WL_ALLOWED_ORIDE 0003 mac_instance COEX_WL_ALLOWED_ORIDE __LINE__
+001d 003a COEX_HWM_COEX_WL_CFG 0003 mac_instance COEX_WL_CFG __LINE__
+001d 003b COEX_HWM_COEX_WL_DEBUG 0006 mac_instance wl_debug_sel wl_mac_if_debug_sel wl_cdl_debug_sel wl_sw_if_debug_sel __LINE__
+001d 003c COEX_HWM_COEX_WL_DEFER 0004 mac_instance wl_tx wl_rx __LINE__
+001d 003d COEX_HWM_COEX_WL_SW_ASRX 0009 mac_instance wl_sw_asrx_duration wl_sw_asrx_priority wl_sw_asrx_ant_bitmap wl_sw_asrx_ant_min wl_sw_asrx_start_chan wl_sw_asrx_end_chan wl_sw_asrx_5g __LINE__
+001d 003e COEX_HWM_COEX_WL_SW_ASTX 0009 mac_instance wl_sw_astx_duration wl_sw_astx_priority wl_sw_astx_ant_bitmap wl_sw_astx_ant_min wl_sw_astx_start_chan wl_sw_astx_end_chan wl_sw_astx_5g __LINE__
+001d 003f COEX_HWM_DEINIT 0001 __LINE__
+001d 0040 COEX_HWM_GET_RX_PRI 0005 mac_instance wl_rx_listen_pri wl_rx_phyact_pri wl_rx_mac_phy __LINE__
+001d 0041 COEX_HWM_GET_RX_TX_ACK_PRI 0004 mac_instance wl_rx_ack_pri wl_tx_ack_pri __LINE__
+001d 0042 COEX_HWM_INIT 0001 __LINE__
+001d 0043 COEX_HWM_SET_RX_PRI 0004 mac_instance cdl_priority promote_mac __LINE__
+001d 0044 COEX_HWM_SET_RX_PRIORITY_ERROR 0003 res mac pri
+001d 0045 COEX_HWM_SET_RX_TX_ACK_PRI 0003 mac_instance wl_rx_tx_ack_priority __LINE__
+001d 0046 COEX_HWM_SET_SIMRX_ERROR 0003 res mac simrx_enabled
+001d 0047 COEX_HWM_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0048 COEX_HWM_WL_CALIB_PROTECT_DISABLE_ERROR 0002 res mac
+001d 0049 COEX_HWM_WL_CALIB_PROTECT_ENABLE_ERROR 0002 res mac
+001d 004a COEX_MAC_ACL_CONTROL 0003 mflags bt_active __LINE__
+001d 004b COEX_MAC_ADD_PERIODIC_BLACKOUT 0008 mflags pbo_index type start_time duration period puncturable vif_bm
+001d 004c COEX_MAC_ADD_PERIODIC_BLACKOUT_END 0004 pbo_index created handle __LINE__
+001d 004d COEX_MAC_ADD_SINGLESHOT_BLACKOUT 0008 mflags type start_time duration puncturable bo_handle vif_bm go_mvif
+001d 004e COEX_MAC_ADD_SINGLESHOT_RESTRICTION 0006 mflags vif_bm start_time duration eol __LINE__
+001d 004f COEX_MAC_CALIBRATION_SW_IF_DISABLED 0002 cflags __LINE__
+001d 0050 COEX_MAC_CALIBRATION_SW_IF_ENABLED 0007 cflags astx_duration astx_priority asrx_duration asrx_priority start_time __LINE__
+001d 0051 COEX_MAC_DEINIT 0001 __LINE__
+001d 0052 COEX_MAC_DELETE_ALL_BLACKOUTS 0002 mflags __LINE__
+001d 0053 COEX_MAC_DELETE_PERIODIC_BLACKOUT 0004 mflags pbo_index type __LINE__
+001d 0054 COEX_MAC_DELETE_SINGLESHOT_BLACKOUT 0003 mflags type __LINE__
+001d 0055 COEX_MAC_DELETE_SINGLESHOT_RESTRICTION 0003 mflags vif_bm __LINE__
+001d 0056 COEX_MAC_GET_CLEAR_TIMEOUT 0004 mflags active_2g4_vifs duration __LINE__
+001d 0057 COEX_MAC_INIT 0001 __LINE__
+001d 0058 COEX_MAC_INSTALL_KA_MPS_BLACKOUTS 0003 mflags mps_state __LINE__
+001d 0059 COEX_MAC_INSTALL_MAC_BLACKOUT 0007 start_time duration period puncturable KA_mode bo_handle vif_bm
+001d 005a COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS 0002 mflags __LINE__
+001d 005b COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS 0002 mflags __LINE__
+001d 005c COEX_MAC_KA_UPDATE_PUNCTURABILITY 0003 mflags enable_puncturing __LINE__
+001d 005d COEX_MAC_MASK_BLE_BLACKOUTS 0004 mflags mps_state vix_bitmap __LINE__
+001d 005e COEX_MAC_MASK_PERIODIC_BLACKOUTS 0002 mflags __LINE__
+001d 005f COEX_MAC_MPS_CHECK 0003 mflags mps_state __LINE__
+001d 0060 COEX_MAC_MPS_DISABLE 0003 mflags mps_state __LINE__
+001d 0061 COEX_MAC_MPS_ELEMENT 0005 index period duration total __LINE__
+001d 0062 COEX_MAC_MPS_ENABLE 0003 mflags mps_state __LINE__
+001d 0063 COEX_MAC_MPS_PROTECTION_END 0006 mflags mps_state in_mps mps_on_time mps_off_time __LINE__
+001d 0064 COEX_MAC_MPS_PROTECTION_START 0006 mflags mps_state in_mps mps_on_time mps_off_time __LINE__
+001d 0065 COEX_MAC_MPS_SUMMARY 0005 mflags connflags total_duration MPS_PERIODIC_DURATION_LIMIT __LINE__
+001d 0066 COEX_MAC_MPS_TIMER_EVENT 0003 mflags mps_state __LINE__
+001d 0067 COEX_MAC_PAUSE_PERIODIC_BLACKOUT 0005 mflags index type bo_handle __LINE__
+001d 0068 COEX_MAC_RESUME_PERIODIC_BLACKOUT 0005 mflags index type bo_handle __LINE__
+001d 0069 COEX_MAC_SET_CLEAR_TIMEOUT 0005 mflags active_2g4_vifs restore duration __LINE__
+001d 006a COEX_MAC_SET_MIN_TX_RATE 0003 mflags min_tx_rate __LINE__
+001d 006b COEX_MAC_STOP_KEEP_ALIVE 0002 mflags __LINE__
+001d 006c COEX_MAC_TDLS_IND 0006 ctx__flags sflags sstate vix_index vif__hdr_pid __LINE__
+001d 006d COEX_MAC_UNMASK_BLE_BLACKOUTS 0004 mflags mps_state vix_bitmap __LINE__
+001d 006e COEX_MAC_UNMASK_PERIODIC_BLACKOUTS 0002 mflags __LINE__
+001d 006f COEX_MAC_UPDATE_PS_DELAY_TIMEOUT 0002 use_coex_timeout __LINE__
+001d 0070 COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT 0006 mflags type start_time duration puncturable bo_handle
+001d 0071 COEX_MAC_VIX_CONTROL 0005 mflags sflags inhibit vix_bm __LINE__
+001d 0072 COEX_MAC_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0073 COEX_MODEM_CC_ADJACENT_BAND 0003 cc_band channel_mask __LINE__
+001d 0074 COEX_MODEM_CC_BAND 0006 ca_order cc_band cc_ul_active cc_offset cc_bandwidth __LINE__
+001d 0075 COEX_MODEM_CC_HARMONIC 0005 cc_band low_freq high_freq channel_mask __LINE__
+001d 0076 COEX_MODEM_CDMA_CC_BAND 0006 order cc_band cc_ul_active cc_offset cc_bandwidth __LINE__
+001d 0077 COEX_MODEM_CDMA_CC_HARMONIC 0005 cc_band low_freq high_freq channel_mask __LINE__
+001d 0078 COEX_MODEM_CHECK_DRIFT 0006 modflags d0 d1 d2 driftavg update
+001d 0079 COEX_MODEM_CON_PRIORITY 0006 last_pri_sfn current_sfn current_sfn_start inhibit_sfn_start inhibit_time mask
+001d 007a COEX_MODEM_DEINIT 0001 __LINE__
+001d 007b COEX_MODEM_DEINIT_TIMER 0002 modflags __LINE__
+001d 007c COEX_MODEM_DESTROY_TDD_BLACKOUT 0001 handle
+001d 007d COEX_MODEM_DRX 0006 modflags drx_start_sfn drx_wake_subf drx_start drx_inactivity_duration wlan_bo_time
+001d 007e COEX_MODEM_DRX_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 007f COEX_MODEM_FRAME_SYNC 0005 modflags irq_time time_us subframe sfn
+001d 0080 COEX_MODEM_FRAME_SYNC_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 0081 COEX_MODEM_IM_ENTER 0002 modflags __LINE__
+001d 0082 COEX_MODEM_IM_EXIT 0002 modflags __LINE__
+001d 0083 COEX_MODEM_INIT 0002 modflags __LINE__
+001d 0084 COEX_MODEM_INIT_TIMER 0002 modflags __LINE__
+001d 0085 COEX_MODEM_INSTALL_TDD_BLACKOUT 0008 frame_start_time bo_start_time period duration lte_config lte_special handle usbpo_flags
+001d 0086 COEX_MODEM_MIB_INIT 000b modflags pb_thresh_low pb_thresh_high rsrp_alpha pb_chan_mask b40c1 b40c2 b41c1 b41c2 b7c1 b7c2
+001d 0087 COEX_MODEM_RX_LEVEL 0009 modflags rx_cc mws_rsrp mws_max_rx_freq mws_rx_bw rsrp_avg pb_thresh_lo pb_thresh_hi __LINE__
+001d 0088 COEX_MODEM_RX_LEVEL_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 0089 COEX_MODEM_RX_SIGNAL 0007 modflags enable rx_cc freq_thresh rsrp_thresh pb_channel_mask __LINE__
+001d 008a COEX_MODEM_STATE 0003 state modflags __LINE__
+001d 008b COEX_MODEM_STATUS 0006 modflags channel_mask lte_active lte_ca_order cdma_ca_order __LINE__
+001d 008c COEX_MODEM_STATUS_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 008d COEX_MODEM_STATUS_TDD_INFO 0006 tdd_frame_type special_subframe_type dl_cyclic_prefix_ext ul_cyclic_prefix_ext timing_advance tdd_rx_active
+001d 008e COEX_MODEM_STATUS_TDD_RESET 0000
+001d 008f COEX_MODEM_TEST_INTERFERER_INSTALL 0003 start_time period duration
+001d 0090 COEX_MODEM_TEST_INTERFERER_STOP 0000
+001d 0091 COEX_MODEM_TEST_RX_START 0000
+001d 0092 COEX_MODEM_TEST_RX_STOP 0000
+001d 0093 COEX_MODEM_UPDATE_CHANNEL_MASK 0006 modflags channel_mask lte_active lte_ca_order cdma_ca_order __LINE__
+001d 0094 COEX_MODEM_WLAN_CONNECT 0002 modflags connecting
+001d 0095 COEX_PROT_DEINIT 0001 __LINE__
+001d 0096 COEX_PROT_INIT 0001 __LINE__
+001d 0097 COEX_PROT_PROTECT_START 0004 prot_act active_prot delay_ron __LINE__
+001d 0098 COEX_PROT_PROTECT_STOP 0004 prot_act elapsed active_prot prot_state
+001d 0099 COEX_PROT_PROTECT_STOP_UNEXPECTED 0002 prot_act __LINE__
+001d 009a COEX_PROT_PROTECT_SUMMARY 0006 prot_act act_pri rx_max_pri mflags current_acts timeout
+001d 009b COEX_PROT_PROTECT_TIMEOUT_FIRED 0003 prot_act start_act __LINE__
+001d 009c COEX_PROT_PROTECT_TIMEOUT_SET 0005 start_act prot_act time duration __LINE__
+001d 009d COEX_RAME_ABSENCE 0008 idx flags type period start duration max __LINE__
+001d 009e COEX_RAME_ASSOCIATE_MAC_INSTANCE 0008 vif_bm mac_instance mvif_bm v1_vix v1_mac v2_vix v2_mac __LINE__
+001d 009f COEX_RAME_BT_LO_ACCESS_REQ 0003 mflags duration deadline
+001d 00a0 COEX_RAME_CONNECTION_PROT_START 0006 vix prot_duration cflags mflags connflags __LINE__
+001d 00a1 COEX_RAME_CONNECTION_PROT_STOP 0004 cflags mflags connflags __LINE__
+001d 00a2 COEX_RAME_EVENT 0007 vix event cflags mflags connflags args __LINE__
+001d 00a3 COEX_RAME_IML_ENTER 0004 cflags mflags connflags __LINE__
+001d 00a4 COEX_RAME_IML_EXIT 0004 cflags mflags connflags __LINE__
+001d 00a5 COEX_RAME_IMM_ENTER 0004 cflags mflags connflags __LINE__
+001d 00a6 COEX_RAME_IMM_EXIT 0004 cflags mflags connflags __LINE__
+001d 00a7 COEX_RAME_PROTECT 0005 vix prot_act protect start_time __LINE__
+001d 00a8 COEX_RAME_RADIO_CHANGED 0009 mac_id freq radio_bm macs_2g macs_5g active_prot cflags mflags __LINE__
+001d 00a9 COEX_RAME_SCAN_VIF_CHANGED 0004 mflags schedulable interface __LINE__
+001d 00aa COEX_RAME_SET_VIF_TIMING 0008 mflags vix vtflags vif_attributes period_us high_start_time_us high_duration_us __LINE__
+001d 00ab COEX_RAME_SET_WLAN_PRIORIY_LEVEL 0003 mflags level __LINE__
+001d 00ac COEX_RAME_VIF_ABSENCE 0006 vix vtflags period start duration __LINE__
+001d 00ad COEX_RAME_VIF_ABSENCE_CHANGED 0004 mflags vix absence_added __LINE__
+001d 00ae COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO 0003 mflags vix __LINE__
+001d 00af COEX_RAME_VIF_CHANGED 0009 mflags vix schedulable vif_type p2p vif_5G vif_2g4_bm mvif_bitmap __LINE__
+001d 00b0 COEX_RAME_VIF_CHANGED_END 0008 mflags vix schedulable vif_type vif_5G vif_2g4_bm vif_2g4_go_bm __LINE__
+001d 00b1 COEX_RAME_VIF_CHANGED_MULTI_VIF 0005 mflags mvif_bitmap vif_2g4_bm vif_2g4_go_bm __LINE__
+001d 00b2 COEX_RAME_VIF_CHANNEL 0005 mflags vix chan_freq_mhz bandwidth_mhz __LINE__
+001d 00b3 COEX_RAME_VIF_PRESENCE 0007 vix vtflags start duration high_start_time_us presence __LINE__
+001d 00b4 COEX_RAME_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 00b5 COEX_REQ_FLEXIMAC_SIMRX 0004 flags mac simrx_disabled __LINE__
+001d 00b6 COEX_SET_POWER_BACKOFF 0003 channel_mask power_reduction __LINE__
+001d 00b7 COEX_SET_TIME_DOMAIN_DEBUG 0002 mode __LINE__
+001d 00b8 COEX_SMEM_A2DP_PRESENT 0002 a2dp_present __LINE__
+001d 00b9 COEX_SMEM_ASYNC_EVENT 0004 type start_time duration __LINE__
+001d 00ba COEX_SMEM_BT_ASYNC_EARLY_START 0001 __LINE__
+001d 00bb COEX_SMEM_BT_ASYNC_RELINQUISH 0001 __LINE__
+001d 00bc COEX_SMEM_BT_ASYNC_REVOKE 0001 __LINE__
+001d 00bd COEX_SMEM_BT_LO_ACCESS 0001 deadline
+001d 00be COEX_SMEM_BT_OFF 0001 __LINE__
+001d 00bf COEX_SMEM_BT_ON 0001 __LINE__
+001d 00c0 COEX_SMEM_CHANNEL_MAP 0005 bandwidth_Mhz chan_freq_MHz low high __LINE__
+001d 00c1 COEX_SMEM_CHANNEL_MAP_CLEAR 0002 bt_channel __LINE__
+001d 00c2 COEX_SMEM_CHANNEL_MAP_HI_SET 0002 bt_channel __LINE__
+001d 00c3 COEX_SMEM_CHANNEL_MAP_LO_SET 0002 bt_channel __LINE__
+001d 00c4 COEX_SMEM_DEINIT 0001 __LINE__
+001d 00c5 COEX_SMEM_INIT 0001 __LINE__
+001d 00c6 COEX_SMEM_INIT_BT_API 0001 __LINE__
+001d 00c7 COEX_SMEM_PERIODIC_EVENT 0006 idx type start_time period duration __LINE__
+001d 00c8 COEX_SMEM_STATE 0002 state __LINE__
+001d 00c9 COEX_SMEM_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 00ca COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE 0004 smemflags allowed last_val __LINE__
+001d 00cb COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME 0002 completion_time __LINE__
+001d 00cc COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS 0003 min_ms maxs_ms __LINE__
+001d 00cd COEX_SMEM_WRITE_CHANNEL_MAP 0006 map_0 map_1 map_2 map_3 map_4 __LINE__
+001d 00ce COEX_SMEM_WRITE_CHANNEL_MAP_LO_HI 0006 map_lo_hi_0 map_lo_hi_1 map_lo_hi_2 map_lo_hi_3 map_lo_hi_4 __LINE__
+001d 00cf COEX_SMEM_WRITE_VIF1_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d0 COEX_SMEM_WRITE_VIF2_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d1 COEX_SMEM_WRITE_VIF3_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d2 COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL 0003 smemflags priority __LINE__
+001d 00d3 COEX_STRAT_A2DP_PRESENT 0003 sflags a2dp_present __LINE__
+001d 00d4 COEX_STRAT_ADD_BLACKOUT_PERIODIC 0007 index type start duration periodic allow_p __LINE__
+001d 00d5 COEX_STRAT_ADD_BLACKOUT_SINGLESHOT 0007 index start duration est allow_p allow_ka __LINE__
+001d 00d6 COEX_STRAT_ADD_SINGLESHOT_RESTRICTION 0003 start duration __LINE__
+001d 00d7 COEX_STRAT_ALLOW_TDLS_CONTROL 0002 sflags __LINE__
+001d 00d8 COEX_STRAT_ASYNC 0006 sstate ss_time smemflags modflags eol __LINE__
+001d 00d9 COEX_STRAT_ASYNC_CONTINUOUS 0002 sstate __LINE__
+001d 00da COEX_STRAT_ASYNC_EVENT_NONE 0003 sflags sstate __LINE__
+001d 00db COEX_STRAT_ASYNC_EXTENDED 0002 orig_start extended_dur
+001d 00dc COEX_STRAT_ASYNC_HANDLER_END 0008 last_event_type sflags sstate mflags blackout_start blackout_duration next_alarm __LINE__
+001d 00dd COEX_STRAT_ASYNC_HANDLER_START 0008 event_type start_time duration est sflags sstate sstime __LINE__
+001d 00de COEX_STRAT_ASYNC_IMMEDIATE 0003 sstate next_wlan __LINE__
+001d 00df COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START 0002 sflags __LINE__
+001d 00e0 COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK 0003 sflags legal __LINE__
+001d 00e1 COEX_STRAT_ASYNC_REVOKE 0003 sflags legal __LINE__
+001d 00e2 COEX_STRAT_DEINIT 0001 __LINE__
+001d 00e3 COEX_STRAT_DEINIT_TIMER 0002 sflags __LINE__
+001d 00e4 COEX_STRAT_DELETE_BLACKOUT_PERIODIC 0002 index __LINE__
+001d 00e5 COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT 0003 index type __LINE__
+001d 00e6 COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION 0002 type __LINE__
+001d 00e7 COEX_STRAT_ILLEGAL_ASYNC_REQUEST 0003 now new_start old_start
+001d 00e8 COEX_STRAT_IM_ENTER 0003 sflags sstate __LINE__
+001d 00e9 COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL 0002 sflags __LINE__
+001d 00ea COEX_STRAT_INIT 0002 sflags __LINE__
+001d 00eb COEX_STRAT_INIT_TIMER 0002 sflags __LINE__
+001d 00ec COEX_STRAT_RADIO_OFF_HANDLER_END 0002 sstate __LINE__
+001d 00ed COEX_STRAT_RADIO_OFF_HANDLER_START 0005 cflags sflags sstate last_freq __LINE__
+001d 00ee COEX_STRAT_RADIO_ON_HANDLER_END 0001 __LINE__
+001d 00ef COEX_STRAT_RADIO_ON_HANDLER_START 0006 cflags freq sflags sstate est __LINE__
+001d 00f0 COEX_STRAT_SERVICE 0002 state __LINE__
+001d 00f1 COEX_STRAT_SS_HALDER_END 0004 sflags sstate itimer_ss_event __LINE__
+001d 00f2 COEX_STRAT_SS_HANDLER_BT_OPP_REACHED 0003 sstate itimer_ss_event __LINE__
+001d 00f3 COEX_STRAT_SS_HANDLER_EARLY 0005 cflags sflags sstate sstate_event __LINE__
+001d 00f4 COEX_STRAT_SS_HANDLER_EST_REACHED 0005 sstate ss_event event_start_time event_duration __LINE__
+001d 00f5 COEX_STRAT_SS_HANDLER_START 0005 cflags sflags sstate freq __LINE__
+001d 00f6 COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED 0003 sstate itimer_ss_event __LINE__
+001d 00f7 COEX_STRAT_TDLS_CONTROL_CAUSE 0002 idx __LINE__
+001d 00f8 COEX_STRAT_UPDATE_TDLS_CONTROL 0002 sflags __LINE__
+001d 00f9 COEX_STRAT_VIF_CLEAR_TIMEOUT_JUMP_AWAY 0001 __LINE__
+001d 00fa COEX_STRAT_VIF_CLEAR_TIMEOUT_OUTSIDE 0001 __LINE__
+001d 00fb COEX_STRAT_VIF_CLEAR_TIMEOUT_SET 0003 sflags mct __LINE__
+001d 00fc COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_AWAY 0001 __LINE__
+001d 00fd COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_IN 0001 __LINE__
+001d 00fe COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED 0002 mct __LINE__
+001d 00ff COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF 0006 r2s mct limit start stop __LINE__
+001d 0100 COEX_STRAT_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0101 COEX_TASK_DEINIT 0001 __LINE__
+001d 0102 COEX_TASK_EVENT 0003 pending raw __LINE__
+001d 0103 COEX_TASK_INIT 0001 __LINE__
+001d 0104 COEX_TIMER_DEINIT 0002 cflags __LINE__
+001d 0105 COEX_TIMER_EVENT 0002 alarm __LINE__
+001d 0106 COEX_TIMER_INIT 0002 cflags __LINE__
+001d 0107 COEX_VIF_TIMING_ABSENCE 0008 vix result vtflags vif_period noa_period start duration __LINE__
+001d 0108 COEX_VIF_TIMING_CHECK_DRIFT 0006 start_time start_time_last drift_us dur_change_us update __LINE__
+001d 0109 COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING 0002 mflags __LINE__
+001d 010a COEX_VIF_TIMING_CLEAR_VIF_TIMING 0004 mflags vix vif_timing_index __LINE__
+001d 010b COEX_VIF_TIMING_DEL_VIF_TYPE 0004 mflags coex_vif_type mvif_bitmap __LINE__
+001d 010c COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING 0007 vif_timing_index_curr vif_timing_index_next mvif_bitmap period_us high_start_time_us high_duration_100us __LINE__
+001d 010d COEX_VIF_TIMING_INIT 0001 __LINE__
+001d 010e COEX_VIF_TIMING_MAP_ADD 0004 mflags vix free_timing_idx __LINE__
+001d 010f COEX_VIF_TIMING_MAP_FREE 0003 mflags vix __LINE__
+001d 0110 COEX_VIF_TIMING_MAP_RESET 0004 mflags vix free_timing_idx __LINE__
+001d 0111 COEX_VIF_TIMING_PHASE_DIFF 0005 vif_start noa_end period offset __LINE__
+001d 0112 COEX_VIF_TIMING_SET_NOA_DURATION 0005 mflags sflags noa_duration noa_last __LINE__
+001d 0113 COEX_VIF_TIMING_SET_VIF_TYPE 0006 mflags vif_timing_idx vif_attributes coex_vif_type mvif_bitmap __LINE__
+001d 0114 COEX_VIF_TIMING_UPDATE 0005 mvif_bitmap multiband mac_vif0 mac_vif1 __LINE__
+001d 0115 COEX_VIF_TIMING_UPDATE_PRESENCE 0007 p2p_flags noa_start noa_period noa_duration presence_start presence_duration __LINE__
+001d 0116 COEX_VIF_TIMING_WRITE_VIF_TIMING 0005 vif_timing_index period start_time duration __LINE__
+001d 0117 TRANSACTION_ORIDE_T 0001 mac_instance
+# Generated From coex/coex_debug.xml
+trace_types 814
+COEX_MAC_MPS_ELEMENT.period Natural32
+COEX_MAC_MPS_ELEMENT.duration Natural32
+COEX_MAC_MPS_ELEMENT.total Natural32
+COEX_MAC_MPS_ELEMENT.__LINE__ __LINE__
+COEX_PROT_PROTECT_TIMEOUT_FIRED.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_FIRED.start_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_FIRED.__LINE__ __LINE__
+COEX_RAME_IML_ENTER.cflags COEX_FLAGS_T
+COEX_RAME_IML_ENTER.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IML_ENTER.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IML_ENTER.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP_LO_SET.__LINE__ __LINE__
+COEX_STRAT_ALLOW_TDLS_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ALLOW_TDLS_CONTROL.__LINE__ __LINE__
+COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START.__LINE__ __LINE__
+COEX_FLEXIMAC_FLUSH.head Natural32
+COEX_FLEXIMAC_FLUSH.missed Natural32
+COEX_FLEXIMAC_FLUSH.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_OVERRIDE.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_OVERRIDE.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_REQ_OVERRIDE.__LINE__ __LINE__
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.smemflags COEX_SMEM_FLAGS_T
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.priority CME_WLAN_PRIORITY_LEVEL_T
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.__LINE__ __LINE__
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.bo_handle Natural32
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.min_ms Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.maxs_ms Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.__LINE__ __LINE__
+COEX_VIF_TIMING_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_SIM_RX_ALERT.update_time Natural32
+COEX_FLEXIMAC_SIM_RX_ALERT.simrx_disabled Boolean
+COEX_FLEXIMAC_SIM_RX_ALERT.__LINE__ __LINE__
+COEX_SMEM_BT_ON.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_TRANS_ALERT.time_us Natural32
+COEX_FLEXIMAC_TRANS_ALERT.seq_num Natural32
+COEX_FLEXIMAC_TRANS_ALERT.result FMPD_COEX_RESULT_T
+COEX_FLEXIMAC_TRANS_ALERT.__LINE__ __LINE__
+COEX_STRAT_ASYNC_CONTINUOUS.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_CONTINUOUS.__LINE__ __LINE__
+COEX_RAME_IMM_ENTER.cflags COEX_FLAGS_T
+COEX_RAME_IMM_ENTER.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IMM_ENTER.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IMM_ENTER.__LINE__ __LINE__
+COEX_RAME_VIF_PRESENCE.vix vix
+COEX_RAME_VIF_PRESENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_RAME_VIF_PRESENCE.start Natural32
+COEX_RAME_VIF_PRESENCE.duration Natural32
+COEX_RAME_VIF_PRESENCE.high_start_time_us Natural32
+COEX_RAME_VIF_PRESENCE.presence Boolean
+COEX_RAME_VIF_PRESENCE.__LINE__ __LINE__
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.smemflags COEX_SMEM_FLAGS_T
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.allowed Boolean
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.last_val Boolean
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.__LINE__ __LINE__
+COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_FREE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_FREE.vix vix
+COEX_VIF_TIMING_MAP_FREE.__LINE__ __LINE__
+COEX_MAC_WARNING.reason WARNING_REASON
+COEX_MAC_WARNING.__LINE__ __LINE__
+COEX_HWM_COEX_BB_CFG.COEX_BB_CFG_EN COEX_BB_CFG_T
+COEX_HWM_COEX_BB_CFG.__LINE__ __LINE__
+COEX_FLEXIMAC_ARBITRATION_LEVEL.current Boolean
+COEX_FLEXIMAC_ARBITRATION_LEVEL.required Boolean
+COEX_FLEXIMAC_ARBITRATION_LEVEL.__LINE__ __LINE__
+COEX_SMEM_WRITE_CHANNEL_MAP_LO_HI.__LINE__ __LINE__
+COEX_MODEM_CC_ADJACENT_BAND.channel_mask Natural64
+COEX_MODEM_CC_ADJACENT_BAND.__LINE__ __LINE__
+COEX_CTL_STROBE.__LINE__ __LINE__
+COEX_MODEM_IM_ENTER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_IM_ENTER.__LINE__ __LINE__
+COEX_SMEM_BT_ASYNC_RELINQUISH.__LINE__ __LINE__
+COEX_HWM_DEINIT.__LINE__ __LINE__
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_FLEXIMAC_START_ALERT.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_START_ALERT.time_us Natural32
+COEX_FLEXIMAC_START_ALERT.band FMPD_COEX_BAND_T
+COEX_FLEXIMAC_START_ALERT.antenna_bitmask Natural8
+COEX_FLEXIMAC_START_ALERT.__LINE__ __LINE__
+COEX_MODEM_CC_HARMONIC.channel_mask Natural64
+COEX_MODEM_CC_HARMONIC.__LINE__ __LINE__
+COEX_MODEM_DESTROY_TDD_BLACKOUT.handle Natural32
+COEX_STRAT_ASYNC.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC.ss_time Natural32
+COEX_STRAT_ASYNC.smemflags COEX_SMEM_FLAGS_T
+COEX_STRAT_ASYNC.modflags COEX_MODEM_FLAGS
+COEX_STRAT_ASYNC.eol Natural32
+COEX_STRAT_ASYNC.__LINE__ __LINE__
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.update_time Natural32
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.spectral_checking_enabled Boolean
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_RING.head Natural32
+COEX_FLEXIMAC_RING_RING.tail Natural32
+COEX_FLEXIMAC_RING_RING.__LINE__ __LINE__
+COEX_SMEM_PERIODIC_EVENT.type CME_BT_PERIODIC_TYPE
+COEX_SMEM_PERIODIC_EVENT.start_time Natural32
+COEX_SMEM_PERIODIC_EVENT.period Natural32
+COEX_SMEM_PERIODIC_EVENT.duration Natural32
+COEX_SMEM_PERIODIC_EVENT.__LINE__ __LINE__
+COEX_HWM_SET_SIMRX_ERROR.res FMPD_COEX_RESULT_T
+COEX_HWM_SET_SIMRX_ERROR.simrx_enabled Boolean
+COEX_STRAT_RADIO_ON_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_RADIO_ON_HANDLER_START.freq COEX_INTERFACE
+COEX_STRAT_RADIO_ON_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_RADIO_ON_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_ON_HANDLER_START.est Natural32
+COEX_STRAT_RADIO_ON_HANDLER_START.__LINE__ __LINE__
+COEX_MAC_ADD_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_ADD_PERIODIC_BLACKOUT.start_time Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.duration Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.period Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.puncturable Boolean
+COEX_MAC_ADD_PERIODIC_BLACKOUT.vif_bm VIX_BM_T
+COEX_STRAT_ASYNC_EXTENDED.orig_start Natural32
+COEX_STRAT_ASYNC_EXTENDED.extended_dur Integer32
+COEX_SMEM_BT_ASYNC_REVOKE.__LINE__ __LINE__
+COEX_RAME_IMM_EXIT.cflags COEX_FLAGS_T
+COEX_RAME_IMM_EXIT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IMM_EXIT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IMM_EXIT.__LINE__ __LINE__
+COEX_MODEM_FRAME_SYNC.modflags COEX_MODEM_FLAGS
+COEX_MODEM_FRAME_SYNC.irq_time Natural32
+COEX_RAME_CONNECTION_PROT_STOP.cflags COEX_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.mflags COEX_MAC_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP_CLEAR.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.itimer_ss_event Natural32
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.__LINE__ __LINE__
+COEX_FLEXIMAC_OVERRIDE_ALERT.update_time Natural32
+COEX_FLEXIMAC_OVERRIDE_ALERT.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_OVERRIDE_ALERT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.wl_sw_astx_update Boolean
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.__LINE__ __LINE__
+COEX_MAC_UNMASK_PERIODIC_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UNMASK_PERIODIC_BLACKOUTS.__LINE__ __LINE__
+COEX_PROT_INIT.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.vix vix
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.__LINE__ __LINE__
+COEX_VIF_TIMING_SET_VIF_TYPE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_SET_VIF_TYPE.vif_attributes COEX_VIF_ATTRIBUTES_T
+COEX_VIF_TIMING_SET_VIF_TYPE.coex_vif_type COEX_VIF_TYPES_T
+COEX_VIF_TIMING_SET_VIF_TYPE.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_OUTSIDE.__LINE__ __LINE__
+COEX_MODEM_CDMA_CC_HARMONIC.channel_mask Natural64
+COEX_MODEM_CDMA_CC_HARMONIC.__LINE__ __LINE__
+COEX_RAME_RADIO_CHANGED.freq INTERFACE
+COEX_RAME_RADIO_CHANGED.cflags COEX_FLAGS_T
+COEX_RAME_RADIO_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_RADIO_CHANGED.__LINE__ __LINE__
+COEX_PROT_PROTECT_TIMEOUT_SET.start_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_SET.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_SET.time Natural32
+COEX_PROT_PROTECT_TIMEOUT_SET.duration Natural32
+COEX_PROT_PROTECT_TIMEOUT_SET.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_BG.isr Natural32
+COEX_FLEXIMAC_RING_BG.head Natural32
+COEX_FLEXIMAC_RING_BG.tail Natural32
+COEX_FLEXIMAC_RING_BG.missed Natural32
+COEX_FLEXIMAC_RING_BG.__LINE__ __LINE__
+COEX_HWM_COEX_WL_DEBUG.mac_instance Natural32
+COEX_HWM_COEX_WL_DEBUG.wl_debug_sel COEX_WL_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_mac_if_debug_sel COEX_WL_MAC_IF_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_cdl_debug_sel COEX_WL_CDL_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_sw_if_debug_sel COEX_WL_SW_IF_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.__LINE__ __LINE__
+COEX_MAC_INIT.__LINE__ __LINE__
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.created Boolean
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.handle Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.__LINE__ __LINE__
+COEX_STRAT_RADIO_OFF_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_RADIO_OFF_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_RADIO_OFF_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_OFF_HANDLER_START.last_freq COEX_INTERFACE
+COEX_STRAT_RADIO_OFF_HANDLER_START.__LINE__ __LINE__
+COEX_MAC_MPS_ENABLE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_ENABLE.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_ENABLE.__LINE__ __LINE__
+COEX_RAME_SCAN_VIF_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SCAN_VIF_CHANGED.schedulable Boolean
+COEX_RAME_SCAN_VIF_CHANGED.interface INTERFACE
+COEX_RAME_SCAN_VIF_CHANGED.__LINE__ __LINE__
+COEX_HWM_COEX_CLKGEN_CFG.COEX_BB_CLKGEN_CFG COEX_BB_CLKGEN_CFG_T
+COEX_HWM_COEX_CLKGEN_CFG.__LINE__ __LINE__
+COEX_MAC_SET_CLEAR_TIMEOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_SET_CLEAR_TIMEOUT.active_2g4_vifs VIX_BM_T
+COEX_MAC_SET_CLEAR_TIMEOUT.restore Boolean
+COEX_MAC_SET_CLEAR_TIMEOUT.duration Natural32
+COEX_MAC_SET_CLEAR_TIMEOUT.__LINE__ __LINE__
+COEX_HWM_COEX_WL_DEFER.mac_instance Natural32
+COEX_HWM_COEX_WL_DEFER.__LINE__ __LINE__
+COEX_RAME_WARNING.reason WARNING_REASON
+COEX_RAME_WARNING.__LINE__ __LINE__
+COEX_SMEM_BT_ASYNC_EARLY_START.__LINE__ __LINE__
+COEX_HWM_COEX_BB_ALLOWED_ORIDE.COEX_BB_ALLOWED_ORIDE COEX_BB_ALLOWED_ORIDE_T
+COEX_HWM_COEX_BB_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_FLEXIMAC_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_DPLP_OFF.__LINE__ __LINE__
+COEX_TIMER_EVENT.alarm COEX_TIMER_T
+COEX_TIMER_EVENT.__LINE__ __LINE__
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.period_us Natural32
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.high_start_time_us Natural32
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_BT_LO_ACCESS_REQ.mflags COEX_MAC_FLAGS_T
+COEX_RAME_BT_LO_ACCESS_REQ.duration Natural32
+COEX_RAME_BT_LO_ACCESS_REQ.deadline Natural32
+COEX_MODEM_CHECK_DRIFT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_CHECK_DRIFT.d0 Integer32
+COEX_MODEM_CHECK_DRIFT.d1 Integer32
+COEX_MODEM_CHECK_DRIFT.d2 Integer32
+COEX_MODEM_CHECK_DRIFT.driftavg Integer32
+COEX_MODEM_CHECK_DRIFT.update Boolean
+COEX_STRAT_A2DP_PRESENT.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_A2DP_PRESENT.a2dp_present Boolean
+COEX_STRAT_A2DP_PRESENT.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF2_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF2_TIMING.__LINE__ __LINE__
+COEX_MAC_SET_MIN_TX_RATE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_SET_MIN_TX_RATE.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_AWAY.__LINE__ __LINE__
+COEX_MODEM_UPDATE_CHANNEL_MASK.modflags COEX_MODEM_FLAGS
+COEX_MODEM_UPDATE_CHANNEL_MASK.channel_mask Natural64
+COEX_MODEM_UPDATE_CHANNEL_MASK.lte_active Boolean
+COEX_MODEM_UPDATE_CHANNEL_MASK.__LINE__ __LINE__
+COEX_RAME_SET_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SET_VIF_TIMING.vix vix
+COEX_RAME_SET_VIF_TIMING.vtflags COEX_MAC_VIF_TIMING_FLAGS_T
+COEX_RAME_SET_VIF_TIMING.vif_attributes COEX_VIF_ATTRIBUTES_T
+COEX_RAME_SET_VIF_TIMING.period_us Natural32
+COEX_RAME_SET_VIF_TIMING.high_start_time_us Natural32
+COEX_RAME_SET_VIF_TIMING.high_duration_us Natural32
+COEX_RAME_SET_VIF_TIMING.__LINE__ __LINE__
+COEX_HWM_COEX_CDL_CFG.wl_abort_cfg ABORT_CFG_T
+COEX_HWM_COEX_CDL_CFG.bt_abort_cfg ABORT_CFG_T
+COEX_VIF_TIMING_WRITE_VIF_TIMING.period Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.start_time Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.duration Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_PROTECT.vix vix
+COEX_RAME_PROTECT.prot_act COEX_PROTECT_ACT_T
+COEX_RAME_PROTECT.protect COEX_PROTECT_STATE
+COEX_RAME_PROTECT.start_time Natural32
+COEX_RAME_PROTECT.__LINE__ __LINE__
+COEX_MODEM_INSTALL_TDD_BLACKOUT.frame_start_time Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.bo_start_time Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.handle Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.usbpo_flags RAMEDATA_USPBO_CONFIG_FLAGS
+COEX_STRAT_VIF_CLEAR_TIMEOUT_JUMP_AWAY.__LINE__ __LINE__
+COEX_MAC_UPDATE_PS_DELAY_TIMEOUT.use_coex_timeout Boolean
+COEX_MAC_UPDATE_PS_DELAY_TIMEOUT.__LINE__ __LINE__
+COEX_SMEM_ASYNC_EVENT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_SMEM_ASYNC_EVENT.start_time Natural32
+COEX_SMEM_ASYNC_EVENT.duration Natural32
+COEX_SMEM_ASYNC_EVENT.__LINE__ __LINE__
+COEX_MODEM_CDMA_CC_BAND.__LINE__ __LINE__
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.update_time Natural32
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.update_allowed Natural32
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.reason CAR_REASON
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.__LINE__ __LINE__
+COEX_MODEM_STATE.state COEX_MACRAME_EVENT_T
+COEX_MODEM_STATE.modflags COEX_MODEM_FLAGS
+COEX_MODEM_STATE.__LINE__ __LINE__
+COEX_MODEM_RX_LEVEL.modflags COEX_MODEM_FLAGS
+COEX_MODEM_RX_LEVEL.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED_END.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED_END.vix vix
+COEX_RAME_VIF_CHANGED_END.schedulable Boolean
+COEX_RAME_VIF_CHANGED_END.vif_type VIF_TYPE
+COEX_RAME_VIF_CHANGED_END.vif_5G Boolean
+COEX_RAME_VIF_CHANGED_END.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_END.vif_2g4_go_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_END.__LINE__ __LINE__
+COEX_HWM_SET_RX_TX_ACK_PRI.mac_instance Natural32
+COEX_HWM_SET_RX_TX_ACK_PRI.__LINE__ __LINE__
+COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION.type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_INSTALL_MAC_BLACKOUT.start_time Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.duration Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.period Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.puncturable Boolean
+COEX_MAC_INSTALL_MAC_BLACKOUT.KA_mode BLACKOUT_KA_MODE_T
+COEX_MAC_INSTALL_MAC_BLACKOUT.bo_handle Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.vif_bm VIX_BM_T
+COEX_FLEXIMAC_FLUSH_ELEMENT.tail Natural32
+COEX_FLEXIMAC_FLUSH_ELEMENT.__LINE__ __LINE__
+COEX_HWM_COEX_BT_WL_CDL_CFG.mac_instance Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.bt_tx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.bt_rx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.wl_tx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.wl_rx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.__LINE__ __LINE__
+CME_BT_TRANSACTION_REQ.seqNum Natural32
+CME_BT_TRANSACTION_REQ.start Natural32
+CME_BT_TRANSACTION_REQ.end Natural32
+COEX_SMEM_DEINIT.__LINE__ __LINE__
+COEX_TASK_DEINIT.__LINE__ __LINE__
+COEX_TIMER_DEINIT.cflags COEX_FLAGS_T
+COEX_TIMER_DEINIT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.wl_sw_asrx_start_time Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.itimer_ss_event Natural32
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.__LINE__ __LINE__
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.type CME_BT_PERIODIC_TYPE
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.start Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.duration Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.periodic Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.allow_p Boolean
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.__LINE__ __LINE__
+COEX_FLEXIMAC_START_CONFIG_ALERT.arb_req Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.spectral Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.simrx Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_START_CONFIG_ALERT.__LINE__ __LINE__
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.bo_handle Natural32
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_MAC_MPS_SUMMARY.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_SUMMARY.connflags COEX_MAC_CONN_FLAGS_T
+COEX_MAC_MPS_SUMMARY.total_duration Natural32
+COEX_MAC_MPS_SUMMARY.MPS_PERIODIC_DURATION_LIMIT Natural32
+COEX_MAC_MPS_SUMMARY.__LINE__ __LINE__
+COEX_RAME_ASSOCIATE_MAC_INSTANCE.vif_bm VIX_BM_T
+COEX_RAME_ASSOCIATE_MAC_INSTANCE.__LINE__ __LINE__
+COEX_HWM_COEX_BB_DEBUG.bb_debug_sel COEX_BB_DEBUG_SEL_T
+COEX_HWM_COEX_BB_DEBUG.bb_debug_if_sel COEX_BB_DEBUG_IF_SEL_T
+COEX_HWM_COEX_BB_DEBUG.bb_debug_cdl_sel COEX_BB_DEBUG_CDL_SEL_T
+COEX_SMEM_CHANNEL_MAP_HI_SET.__LINE__ __LINE__
+COEX_MAC_TDLS_IND.sflags COEX_STRAT_FLAGS_T
+COEX_MAC_TDLS_IND.sstate DEBUG_COEX_STRAT_STATE
+COEX_MAC_TDLS_IND.__LINE__ __LINE__
+COEX_MAC_MPS_TIMER_EVENT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_TIMER_EVENT.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_TIMER_EVENT.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF3_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF3_TIMING.__LINE__ __LINE__
+COEX_STRAT_DELETE_BLACKOUT_PERIODIC.__LINE__ __LINE__
+COEX_PROT_PROTECT_STOP.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_STOP.elapsed Natural32
+COEX_CTL_DEINIT.cflags COEX_FLAGS_T
+COEX_CTL_DEINIT.__LINE__ __LINE__
+COEX_MODEM_DEINIT_TIMER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_DEINIT_TIMER.__LINE__ __LINE__
+COEX_HWM_GET_RX_PRI.mac_instance Natural32
+COEX_HWM_GET_RX_PRI.__LINE__ __LINE__
+COEX_PROT_PROTECT_STOP_UNEXPECTED.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_STOP_UNEXPECTED.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_SS_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_START.freq COEX_INTERFACE
+COEX_STRAT_SS_HANDLER_START.__LINE__ __LINE__
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.level CME_WLAN_PRIORITY_LEVEL_T
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED.vix vix
+COEX_RAME_VIF_CHANGED.schedulable Boolean
+COEX_RAME_VIF_CHANGED.vif_type VIF_TYPE
+COEX_RAME_VIF_CHANGED.p2p Boolean
+COEX_RAME_VIF_CHANGED.vif_5G Boolean
+COEX_RAME_VIF_CHANGED.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED.__LINE__ __LINE__
+COEX_FLEXIMAC_ARBITRATION_ALERT.update_time Natural32
+COEX_FLEXIMAC_ARBITRATION_ALERT.arb_required Boolean
+COEX_FLEXIMAC_ARBITRATION_ALERT.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_WLAN_LISTEN.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_WLAN_LISTEN.__LINE__ __LINE__
+COEX_VIF_TIMING_SET_NOA_DURATION.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_SET_NOA_DURATION.sflags COEX_STRAT_FLAGS_T
+COEX_VIF_TIMING_SET_NOA_DURATION.noa_duration Natural32
+COEX_VIF_TIMING_SET_NOA_DURATION.noa_last Natural32
+COEX_VIF_TIMING_SET_NOA_DURATION.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_IN.__LINE__ __LINE__
+COEX_STRAT_ASYNC_REVOKE.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_REVOKE.legal Boolean
+COEX_STRAT_ASYNC_REVOKE.__LINE__ __LINE__
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.__LINE__ __LINE__
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.start_time Natural32
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.duration Natural32
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.puncturable Boolean
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.bo_handle Natural32
+COEX_SMEM_INIT.__LINE__ __LINE__
+COEX_HWM_INIT.__LINE__ __LINE__
+COEX_MODEM_CC_BAND.__LINE__ __LINE__
+COEX_VIF_TIMING_DEL_VIF_TYPE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_DEL_VIF_TYPE.coex_vif_type COEX_VIF_TYPES_T
+COEX_VIF_TIMING_DEL_VIF_TYPE.__LINE__ __LINE__
+COEX_MODEM_CON_PRIORITY.current_sfn_start Natural32
+COEX_MODEM_CON_PRIORITY.inhibit_sfn_start Natural32
+COEX_MODEM_CON_PRIORITY.inhibit_time Natural32
+COEX_HWM_COEX_WL_SW_ASRX.mac_instance Natural32
+COEX_HWM_COEX_WL_SW_ASRX.wl_sw_asrx_duration Natural32
+COEX_HWM_COEX_WL_SW_ASRX.wl_sw_asrx_5g Boolean
+COEX_HWM_COEX_WL_SW_ASRX.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_DEINIT.__LINE__ __LINE__
+COEX_MAC_ACL_CONTROL.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ACL_CONTROL.bt_active Boolean
+COEX_MAC_ACL_CONTROL.__LINE__ __LINE__
+COEX_MODEM_STATUS_ENTRY.message_okay Boolean
+COEX_MODEM_STATUS_ENTRY.modem_active Boolean
+COEX_MODEM_STATUS_ENTRY.__LINE__ __LINE__
+COEX_MODEM_RX_LEVEL_ENTRY.message_okay Boolean
+COEX_MODEM_RX_LEVEL_ENTRY.modem_active Boolean
+COEX_MODEM_RX_LEVEL_ENTRY.__LINE__ __LINE__
+COEX_MODEM_INIT_TIMER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_INIT_TIMER.__LINE__ __LINE__
+COEX_SET_TIME_DOMAIN_DEBUG.__LINE__ __LINE__
+COEX_STRAT_SERVICE.state COEX_MACRAME_EVENT_T
+COEX_STRAT_SERVICE.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_ADD.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_ADD.vix vix
+COEX_VIF_TIMING_MAP_ADD.free_timing_idx Natural32
+COEX_VIF_TIMING_MAP_ADD.__LINE__ __LINE__
+COEX_MAC_MPS_PROTECTION_END.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_PROTECTION_END.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_PROTECTION_END.in_mps Boolean
+COEX_MAC_MPS_PROTECTION_END.mps_on_time Natural32
+COEX_MAC_MPS_PROTECTION_END.mps_off_time Natural32
+COEX_MAC_MPS_PROTECTION_END.__LINE__ __LINE__
+COEX_HWM_COEX_BT_WL_DEBUG.bt_wl_debug_sel COEX_BT_WL_DEBUG_SEL_T
+COEX_HWM_COEX_BT_WL_DEBUG.__LINE__ __LINE__
+COEX_RAME_VIF_CHANNEL.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANNEL.vix vix
+COEX_RAME_VIF_CHANNEL.chan_freq_mhz Natural32
+COEX_RAME_VIF_CHANNEL.bandwidth_mhz Natural32
+COEX_RAME_VIF_CHANNEL.__LINE__ __LINE__
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.start Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.duration Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.est Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.allow_p Boolean
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.allow_ka DEBUG_BLACKOUT_KA_MODE
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.__LINE__ __LINE__
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.now Natural32
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.new_start Natural32
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.old_start Natural32
+COEX_STRAT_INIT_TIMER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INIT_TIMER.__LINE__ __LINE__
+COEX_HWM_COEX_BT_CFG.COEX_BT_CFG COEX_BT_CFG_T
+COEX_HWM_COEX_BT_CFG.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP.__LINE__ __LINE__
+COEX_PROT_DEINIT.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_RESET.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_RESET.vix vix
+COEX_VIF_TIMING_MAP_RESET.free_timing_idx Natural32
+COEX_VIF_TIMING_MAP_RESET.__LINE__ __LINE__
+COEX_SET_POWER_BACKOFF.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED.__LINE__ __LINE__
+COEX_HWM_WL_CALIB_PROTECT_DISABLE_ERROR.res FMPD_COEX_RESULT_T
+COEX_API_WLAN_PRIV_SET_STATE.current_state DEBUG_CME_WLAN_STATE
+COEX_API_WLAN_PRIV_SET_STATE.new_state DEBUG_CME_WLAN_STATE
+COEX_API_WLAN_PRIV_SET_STATE.__LINE__ __LINE__
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.start Natural32
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.duration Natural32
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.start_time Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.duration Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.puncturable Boolean
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.bo_handle Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.vif_bm VIX_BM_T
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.go_mvif Boolean
+COEX_SMEM_A2DP_PRESENT.a2dp_present Boolean
+COEX_SMEM_A2DP_PRESENT.__LINE__ __LINE__
+COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS.__LINE__ __LINE__
+COEX_CTL_INIT.cflags COEX_FLAGS_T
+COEX_CTL_INIT.freq COEX_INTERFACE
+COEX_CTL_INIT.__LINE__ __LINE__
+COEX_HWM_SET_RX_PRIORITY_ERROR.res FMPD_COEX_RESULT_T
+COEX_MODEM_INIT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_INIT.__LINE__ __LINE__
+COEX_MAC_STOP_KEEP_ALIVE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_STOP_KEEP_ALIVE.__LINE__ __LINE__
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.update_time Natural32
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.priority Natural32
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.__LINE__ __LINE__
+COEX_BEACON.our_pos Natural32
+COEX_BEACON.aid Natural32
+COEX_BEACON.__LINE__ __LINE__
+COEX_MAC_MPS_DISABLE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_DISABLE.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_DISABLE.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.wl_sw_asrx_update Boolean
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.__LINE__ __LINE__
+COEX_SMEM_WARNING.reason WARNING_REASON
+COEX_SMEM_WARNING.__LINE__ __LINE__
+COEX_MODEM_FRAME_SYNC_ENTRY.message_okay Boolean
+COEX_MODEM_FRAME_SYNC_ENTRY.modem_active Boolean
+COEX_MODEM_FRAME_SYNC_ENTRY.__LINE__ __LINE__
+COEX_SMEM_WRITE_CHANNEL_MAP.__LINE__ __LINE__
+COEX_RAME_ABSENCE.period Natural32
+COEX_RAME_ABSENCE.start Natural32
+COEX_RAME_ABSENCE.duration Natural32
+COEX_RAME_ABSENCE.max Natural32
+COEX_RAME_ABSENCE.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.spectral_checking_enabled Boolean
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_ABSENCE_CHANGED.vix vix
+COEX_RAME_VIF_ABSENCE_CHANGED.absence_added Boolean
+COEX_RAME_VIF_ABSENCE_CHANGED.__LINE__ __LINE__
+COEX_TASK_INIT.__LINE__ __LINE__
+COEX_MODEM_DRX.modflags COEX_MODEM_FLAGS
+COEX_MODEM_DRX.drx_start Natural32
+COEX_MODEM_DRX.wlan_bo_time Natural32
+COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE.vix vix
+COEX_RAME_VIF_ABSENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_RAME_VIF_ABSENCE.period Natural32
+COEX_RAME_VIF_ABSENCE.start Natural32
+COEX_RAME_VIF_ABSENCE.duration Natural32
+COEX_RAME_VIF_ABSENCE.__LINE__ __LINE__
+COEX_FLEXIMAC_BT_OFF.__LINE__ __LINE__
+COEX_HWM_COEX_BT_DEFER.__LINE__ __LINE__
+COEX_HWM_WARNING.reason WARNING_REASON
+COEX_HWM_WARNING.__LINE__ __LINE__
+COEX_HWM_WL_CALIB_PROTECT_ENABLE_ERROR.res FMPD_COEX_RESULT_T
+COEX_MAC_DELETE_ALL_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_ALL_BLACKOUTS.__LINE__ __LINE__
+COEX_FLEXIMAC_RESULT.result FMPD_COEX_RESULT_T
+COEX_FLEXIMAC_RESULT.__LINE__ __LINE__
+COEX_MAC_MASK_PERIODIC_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MASK_PERIODIC_BLACKOUTS.__LINE__ __LINE__
+COEX_MODEM_DEINIT.__LINE__ __LINE__
+COEX_MODEM_IM_EXIT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_IM_EXIT.__LINE__ __LINE__
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.enable_puncturing Boolean
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.__LINE__ __LINE__
+COEX_PROT_PROTECT_START.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_START.delay_ron Natural32
+COEX_PROT_PROTECT_START.__LINE__ __LINE__
+COEX_MODEM_DRX_ENTRY.message_okay Boolean
+COEX_MODEM_DRX_ENTRY.modem_active Boolean
+COEX_MODEM_DRX_ENTRY.__LINE__ __LINE__
+COEX_STRAT_ASYNC_HANDLER_START.event_type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_ASYNC_HANDLER_START.start_time Natural32
+COEX_STRAT_ASYNC_HANDLER_START.duration Natural32
+COEX_STRAT_ASYNC_HANDLER_START.est Natural32
+COEX_STRAT_ASYNC_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_HANDLER_START.sstime Natural32
+COEX_STRAT_ASYNC_HANDLER_START.__LINE__ __LINE__
+COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME.completion_time Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME.__LINE__ __LINE__
+COEX_HWM_SET_RX_PRI.mac_instance Natural32
+COEX_HWM_SET_RX_PRI.promote_mac Boolean
+COEX_HWM_SET_RX_PRI.__LINE__ __LINE__
+COEX_HWM_COEX_BT_DEBUG.bt_debug_sel COEX_BT_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.bt_cdl_debug_sel COEX_BT_CDL_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.bt_sw_if_debug_sel COEX_BT_SW_IF_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.__LINE__ __LINE__
+COEX_MAC_UNMASK_BLE_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.vix_bitmap VIX_BM_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.__LINE__ __LINE__
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.mac_instance Natural32
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.COEX_WL_ALLOWED_ORIDE COEX_WL_ALLOWED_ORIDE_T
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_TASK_EVENT.pending FOS_EVENT_PENDING_EVENT
+COEX_TASK_EVENT.raw Natural32
+COEX_TASK_EVENT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_IF_EN.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_IF_EN.wl_sw_if_en Boolean
+COEX_HWM_COEX_BB_WL_SW_IF_EN.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.arb_required Boolean
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.__LINE__ __LINE__
+COEX_MODEM_WLAN_CONNECT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_WLAN_CONNECT.connecting Boolean
+COEX_STRAT_INIT.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INIT.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_EARLY.cflags COEX_FLAGS_T
+COEX_STRAT_SS_HANDLER_EARLY.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HANDLER_EARLY.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_EARLY.sstate_event Natural32
+COEX_STRAT_SS_HANDLER_EARLY.__LINE__ __LINE__
+COEX_MAC_MASK_BLE_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MASK_BLE_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_MASK_BLE_BLACKOUTS.vix_bitmap VIX_BM_T
+COEX_MAC_MASK_BLE_BLACKOUTS.__LINE__ __LINE__
+COEX_HWM_COEX_WL_CFG.mac_instance Natural32
+COEX_HWM_COEX_WL_CFG.COEX_WL_CFG COEX_WL_CFG_T
+COEX_HWM_COEX_WL_CFG.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_EST_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_EST_REACHED.ss_event Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.event_start_time Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.event_duration Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.r2s Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.limit Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.start Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.stop Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.__LINE__ __LINE__
+COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL.__LINE__ __LINE__
+COEX_RAME_IML_EXIT.cflags COEX_FLAGS_T
+COEX_RAME_IML_EXIT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IML_EXIT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IML_EXIT.__LINE__ __LINE__
+COEX_VIF_TIMING_UPDATE_PRESENCE.p2p_flags COEX_MAC_VIF_TIMING_FLAGS_T
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_start Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_period Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_duration Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.presence_start Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.presence_duration Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.__LINE__ __LINE__
+COEX_HWM_COEX_WL_SW_ASTX.mac_instance Natural32
+COEX_HWM_COEX_WL_SW_ASTX.wl_sw_astx_duration Natural32
+COEX_HWM_COEX_WL_SW_ASTX.__LINE__ __LINE__
+COEX_CTL_WARNING.reason WARNING_REASON
+COEX_CTL_WARNING.__LINE__ __LINE__
+COEX_STRAT_TDLS_CONTROL_CAUSE.__LINE__ __LINE__
+COEX_VIF_TIMING_ABSENCE.vix vix
+COEX_VIF_TIMING_ABSENCE.result Boolean
+COEX_VIF_TIMING_ABSENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_VIF_TIMING_ABSENCE.vif_period Natural32
+COEX_VIF_TIMING_ABSENCE.noa_period Natural32
+COEX_VIF_TIMING_ABSENCE.start Natural32
+COEX_VIF_TIMING_ABSENCE.duration Natural32
+COEX_VIF_TIMING_ABSENCE.__LINE__ __LINE__
+COEX_SMEM_BT_OFF.__LINE__ __LINE__
+COEX_STRAT_IM_ENTER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_IM_ENTER.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_IM_ENTER.__LINE__ __LINE__
+COEX_HWM_COEX_BT_ALLOWED_ORIDE.COEX_BT_ALLOWED_ORIDE COEX_BT_ALLOWED_ORIDE_T
+COEX_HWM_COEX_BT_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_VIF_TIMING_CHECK_DRIFT.start_time Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.start_time_last Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.drift_us Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.dur_change_us Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.update Boolean
+COEX_VIF_TIMING_CHECK_DRIFT.__LINE__ __LINE__
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.legal Boolean
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.__LINE__ __LINE__
+COEX_SMEM_STATE.state COEX_MACRAME_EVENT_T
+COEX_SMEM_STATE.__LINE__ __LINE__
+COEX_STRAT_ASYNC_HANDLER_END.last_event_type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_ASYNC_HANDLER_END.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_HANDLER_END.mflags COEX_MAC_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_END.blackout_start Natural32
+COEX_STRAT_ASYNC_HANDLER_END.blackout_duration Natural32
+COEX_STRAT_ASYNC_HANDLER_END.next_alarm Natural32
+COEX_STRAT_ASYNC_HANDLER_END.__LINE__ __LINE__
+CME_SIMRX_REQ.enabled Boolean
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.wl_sw_astx_start_time Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.__LINE__ __LINE__
+COEX_FLEXIMAC_INTERRUPT_REGISTER.source INT_SOURCE_T
+COEX_FLEXIMAC_INTERRUPT_REGISTER.__LINE__ __LINE__
+COEX_MAC_VIX_CONTROL.mflags COEX_MAC_FLAGS_T
+COEX_MAC_VIX_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_MAC_VIX_CONTROL.inhibit Boolean
+COEX_MAC_VIX_CONTROL.vix_bm VIX_BM_T
+COEX_MAC_VIX_CONTROL.__LINE__ __LINE__
+COEX_HWM_GET_RX_TX_ACK_PRI.mac_instance Natural32
+COEX_HWM_GET_RX_TX_ACK_PRI.__LINE__ __LINE__
+COEX_TIMER_INIT.cflags COEX_FLAGS_T
+COEX_TIMER_INIT.__LINE__ __LINE__
+COEX_MAC_DEINIT.__LINE__ __LINE__
+COEX_MAC_MPS_CHECK.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_CHECK.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_CHECK.__LINE__ __LINE__
+COEX_MODEM_RX_SIGNAL.modflags COEX_MODEM_FLAGS
+COEX_MODEM_RX_SIGNAL.enable Boolean
+COEX_MODEM_RX_SIGNAL.__LINE__ __LINE__
+COEX_MAC_CALIBRATION_SW_IF_DISABLED.cflags COEX_FLAGS_T
+COEX_MAC_CALIBRATION_SW_IF_DISABLED.__LINE__ __LINE__
+COEX_STRAT_RADIO_ON_HANDLER_END.__LINE__ __LINE__
+COEX_MAC_MPS_PROTECTION_START.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_PROTECTION_START.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_PROTECTION_START.in_mps Boolean
+COEX_MAC_MPS_PROTECTION_START.mps_on_time Natural32
+COEX_MAC_MPS_PROTECTION_START.mps_off_time Natural32
+COEX_MAC_MPS_PROTECTION_START.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_ENTRY.time_us Natural32
+COEX_FLEXIMAC_RING_ENTRY.event FMPD_COEX_RING_EVENT_T
+COEX_FLEXIMAC_RING_ENTRY.data Integer32
+COEX_FLEXIMAC_RING_ENTRY.data1 Integer16
+COEX_FLEXIMAC_RING_ENTRY.data2 Integer16
+COEX_FLEXIMAC_RING_ENTRY.count Natural32
+COEX_FLEXIMAC_RING_ENTRY.__LINE__ __LINE__
+COEX_MODEM_MIB_INIT.modflags COEX_MODEM_FLAGS
+COEX_STRAT_DEINIT_TIMER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_DEINIT_TIMER.__LINE__ __LINE__
+COEX_STRAT_ASYNC_IMMEDIATE.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_IMMEDIATE.next_wlan Natural32
+COEX_STRAT_ASYNC_IMMEDIATE.__LINE__ __LINE__
+COEX_STRAT_DEINIT.__LINE__ __LINE__
+COEX_VIF_TIMING_PHASE_DIFF.vif_start Natural32
+COEX_VIF_TIMING_PHASE_DIFF.noa_end Natural32
+COEX_VIF_TIMING_PHASE_DIFF.period Natural32
+COEX_VIF_TIMING_PHASE_DIFF.offset Natural32
+COEX_VIF_TIMING_PHASE_DIFF.__LINE__ __LINE__
+COEX_STRAT_UPDATE_TDLS_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_UPDATE_TDLS_CONTROL.__LINE__ __LINE__
+COEX_RAME_CONNECTION_PROT_START.vix vix
+COEX_RAME_CONNECTION_PROT_START.prot_duration Natural32
+COEX_RAME_CONNECTION_PROT_START.cflags COEX_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.mflags COEX_MAC_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF1_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF1_TIMING.__LINE__ __LINE__
+COEX_VIF_TIMING_UPDATE.multiband Boolean
+COEX_VIF_TIMING_UPDATE.__LINE__ __LINE__
+COEX_FLEXIMAC_BT_ON.__LINE__ __LINE__
+COEX_REQ_FLEXIMAC_SIMRX.flags COEX_FLEXIMAC_FLAGS_T
+COEX_REQ_FLEXIMAC_SIMRX.simrx_disabled Boolean
+COEX_REQ_FLEXIMAC_SIMRX.__LINE__ __LINE__
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.vif_bm VIX_BM_T
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.start_time Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.duration Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.eol Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.cflags COEX_FLAGS_T
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.astx_duration Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.asrx_duration Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.start_time Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.__LINE__ __LINE__
+COEX_FLEXIMAC_OVERRIDE_MACPP.override_macpp Natural32
+COEX_FLEXIMAC_OVERRIDE_MACPP.override_femctrl_drive Natural32
+COEX_FLEXIMAC_OVERRIDE_MACPP.__LINE__ __LINE__
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.vix vix
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.__LINE__ __LINE__
+COEX_FLEXIMAC_DEINIT.__LINE__ __LINE__
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.__LINE__ __LINE__
+COEX_FLEXIMAC_INTERRUPT_DEREGISTER.__LINE__ __LINE__
+COEX_SMEM_BT_LO_ACCESS.deadline Natural32
+COEX_PROT_PROTECT_SUMMARY.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_SUMMARY.mflags COEX_MAC_FLAGS_T
+COEX_PROT_PROTECT_SUMMARY.current_acts COEX_PROT_ACTS_T
+COEX_PROT_PROTECT_SUMMARY.timeout Natural32
+COEX_STRAT_ASYNC_EVENT_NONE.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_EVENT_NONE.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_EVENT_NONE.__LINE__ __LINE__
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.vif_bm VIX_BM_T
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MODEM_TEST_INTERFERER_INSTALL.start_time Natural32
+COEX_RAME_EVENT.vix vix
+COEX_RAME_EVENT.event COEX_MACRAME_EVENT_T
+COEX_RAME_EVENT.cflags COEX_FLAGS_T
+COEX_RAME_EVENT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_EVENT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_EVENT.__LINE__ __LINE__
+COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS.__LINE__ __LINE__
+COEX_STRAT_RADIO_OFF_HANDLER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_OFF_HANDLER_END.__LINE__ __LINE__
+COEX_FLEXIMAC_SHUTDOWN_ALERT.time_us Natural32
+COEX_FLEXIMAC_SHUTDOWN_ALERT.__LINE__ __LINE__
+COEX_STRAT_WARNING.reason WARNING_REASON
+COEX_STRAT_WARNING.__LINE__ __LINE__
+COEX_MAC_GET_CLEAR_TIMEOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_GET_CLEAR_TIMEOUT.active_2g4_vifs VIX_BM_T
+COEX_MAC_GET_CLEAR_TIMEOUT.duration Natural32
+COEX_MAC_GET_CLEAR_TIMEOUT.__LINE__ __LINE__
+COEX_SMEM_INIT_BT_API.__LINE__ __LINE__
+COEX_MODEM_STATUS.modflags COEX_MODEM_FLAGS
+COEX_MODEM_STATUS.channel_mask Natural64
+COEX_MODEM_STATUS.lte_active Boolean
+COEX_MODEM_STATUS.__LINE__ __LINE__
+COEX_STRAT_SS_HALDER_END.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HALDER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HALDER_END.itimer_ss_event Natural32
+COEX_STRAT_SS_HALDER_END.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED_MULTI_VIF.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.vif_2g4_go_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.__LINE__ __LINE__
+COEX_MAC_VIF_TIMING_T Enum 0001 NOA_VALID 0002 NOA_UPDATED 0004 NOA_PENDING 0008 AP 0010 P2P 0020 5G ffff BITMAP
+COEX_VIF_TYPES_T Enum 0001 COEX_MAC_VIF_5G_STA 0002 COEX_MAC_VIF_2G4_AP 0003 COEX_MAC_VIF_5G_AP 0004 COEX_MAC_VIF_2G4_GC 0005 COEX_MAC_VIF_5G_GC 0006 COEX_MAC_VIF_2G4_GO 0007 COEX_MAC_VIF_5G_GO x0000 COEX_MAC_VIF_2G4_STA
+DEBUG_COEX_ASYNC_EVENT_TYPE Enum 0000 ASYNC_NONE 0001 ASYNC_INQUIRY 0002 ASYNC_PAGE 0003 ASYNC_BT_CONNECT 0004 ASYNC_BLE_SCAN 0005 ASYNC_BLE_CONNECT 0006 ASYNC_BLE_ADVERT 0007 ASYNC_ACL_FOR_A2DP 0008 ASYNC_ACL_WITHOUT_A2DP
+COEX_TIMER_T Enum 01 COEX_SS_ALARM 02 COEX_PROTECT_ALARM ffff BITMAP
+CME_WLAN_VIF_ATTRIBUTE Enum 0001 5G 0002 AP 0004 P2P ffff BITMAP
+DEBUG_BLACKOUT_KA_MODE Enum 0000 BLACKOUT_KA_NONE 0001 BLACKOUT_KA_CONTINUOUS_BT 0002 BLACKOUT_KA_MULTI_PROFILE_SURVIVAL
+WARNING_REASON Enum 0000 UNSPECIFIED 0001 FAULT 0002 LAST
+DEBUG_COEX_PARAMS Enum ffff IGNORED
+FMPD_COEX_RESULT_T Enum 0000 SUCCESS 0010 PENDING 0021 ARB_DRAW 0022 ARB_BT_WINS 0023 ORIDE_BT_WINS 0024 ARB_NO_OVERLAP 0025 ARB_AS_NOT_VALID 0026 ARB_NO_COLLISION 0040 ARB_WLAN_WINS 0041 ORIDE_WLAN_WINS 0042 BUSY 0080 INVALID_SEQUENCE_NUM 0081 ERROR 0082 TIMEOUT 0083 DELAYED_FM_NOT_RUNNING 0084 DELAYED_PENDING
+COEX_MACRAME_EVENT_T Enum 0000 MAC_START 0001 MAC_STOP 0002 RADIO_ON_DEPRICATED 0003 SCAN_START 0004 SCAN_STOP 0005 CONNECTION_START 0006 CONNECTION_STOP 0007 CALIBRATION_START 0008 CALIBRATION_STOP 0009 DHCP_START 000a DHCP_STOP 000b DHCP_DISCOVER 000c DHCP_OFFER 000d DHCP_REQUEST 000e DHCP_ACK 000f PM_ACTIVE_TRUE 0010 PM_ACTIVE_FALSE 0011 EAPOL_START 0012 EAPOL_STOP 0013 DWELL_START 0014 DWELL_STOP
+COEX_WL_CFG_T Enum 0001 WL_EN 0002 FORCE_REGS_CLK_EN 0004 USE_SW_IF 0008 WL_FEM_EN ffff BITMAP
+CME_WLAN_PRIORITY_LEVEL_T Enum 0000 LOW 0001 MEDIUM 0002 HIGH
+COEX_FLEXIMAC_ARB_BM_T Enum 0001 ARB_REQUIRED 0002 SIM_RX 0003 SPECTRAL_CHECKING 0004 OVERRIDE
+INTERFACE Enum 0001 2G4 0002 5G
+BLACKOUT_KEEP_ALIVE_MODE_T Enum 0000 BLACKOUT_KEEP_ALIVE_NOT_ALLOWED 0001 BLACKOUT_KEEP_ALIVE_MINIMAL 0002 BLACKOUT_KEEP_ALIVE_5_50 0003 BLACKOUT_KEEP_ALIVE_10_100
+COEX_SMEM_FLAGS_T Enum 0001 HIGH 0002 NORMAL 0004 LOW 0008 A2DP_PUNC 0010 P_INIT ffff BITMAP
+COEX_BT_SW_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+COEX_BB_DEBUG_SEL_T Enum 0001 SEL_CDL 0002 SEL_BT_IF 0004 SEL_WL_IF ffff BITMAP
+DEBUG_COEX_CTL_SERVICE_T Enum 0001 COEX_CTL_SERVICE_LOCAL 0002 COEX_CTL_SERVICE_REMOTE 0003 COEX_CTL_SERVICE_ALL
+COEX_SCHEME_T Enum 0005 COEX_SCHEME_COMBO
+COEX_MAC_CONN_FLAGS_T Enum 0001 CONN_CONNECTION 0002 CONN_EAPOL 0004 CONN_DHCP 0008 CONN_DWELL ffff BITMAP
+BLACKOUT_KA_MODE_T Enum 0000 BO_KA_NONE 0001 BA_KA_CONT_BT 0002 BO_KA_MPS
+COEX_BB_ALLOWED_ORIDE_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX 0010 BTTX_EN 0020 BTTX 0040 BTRX_EN 0080 BTRX ffff BITMAP
+COEX_WL_ALLOWED_ORIDE_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX ffff BITMAP
+COEX_WL_MAC_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+COEX_BT_ALLOWED_ORIDE_T Enum 0001 BTTX_EN 0002 BTTX 0004 BTRX_EN 0008 BTRX ffff BITMAP
+FMPD_COEX_OVERRIDE_ARBITRATION_T Enum 0000 NONE 0001 BT 0002 WLAN
+COEX_WL_CDL_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX 0002 SEL_MISC
+COEX_MAC_VIF_TIMING_FLAGS_T Enum 0001 COEX_MAC_VIF_ABSENCE_VALID 0002 COEX_MAC_VIF_ABSENCE_UPDATE 0004 COEX_MAC_VIF_ABSENCE_PENDING
+FMPD_COEX_BAND_T Enum 0000 UNKNOWN 0002 2G4 0005 5G 0006 6G
+COEX_TDLS_CONTROL Enum 0000 TDLS_ALLOWED 0001 TDLS_INHIBITED
+COEX_PROT_ACTS_T Enum 0000 NONE 0001 TX_BEACON 0002 RX_BEACON 0004 TX_NULL 0008 CTS2SELF 0010 CF_END 0020 KEEP_ALIVE 0040 CONNECTION 0080 MIN_VIF_DUR 0100 MULTICAST 0200 WLAN_OPP ffff BITMAP
+CME_BT_PERIODIC_TYPE Enum 0000 EVENT_TYPE_NONE 0001 EVENT_TYPE_SCO 0002 EVENT_TYPE_ESCO 0003 EVENT_TYPE_ACL_SNIFF 0004 EVENT_TYPE_PAGE_SCAN 0005 EVENT_TYPE_INQUIRY_SCAN 0006 EVENT_TYPE_BLE_SCAN 0007 EVENT_TYPE_BLE_CONNECT 0008 EVENT_TYPE_BLE_CONNECTION 0009 EVENT_TYPE_BLE_ADVERT 000a EVENT_TYPE_ANT_SCAN_NORMAL 000b EVENT_TYPE_ANT_SCAN_CRITICAL 000c EVENT_TYPE_ANT_CHANNEL_RX 000d EVENT_TYPE_ANT_BURST_RX 000e EVENT_TYPE_ANT_BURST_TX
+FOS_EVENT_PENDING_EVENT Enum 01 COEX_EVT_ALARM_SIGNAL 02 COEX_EVT_BT_SIGNAL 04 COEX_EVT_MODEM_SIGNAL ffff BITMAP
+DEBUG_COEX_STRAT_STATE Enum 0000 WL_HAS_RADIO 0001 WAITING_BT_OPP 0002 WAITING_WL_OPP 0003 WAITING_EST 0004 ASYNC_CONTINUOUS
+COEX_BT_DEBUG_SEL_T Enum 0000 SEL_SW_IF 0001 SEL_CDL_WL0 0002 SEL_CDL_WL1 0003 SEL_MISC
+CME_SIGNAL_ID Enum 0000 CME_SIGNAL_ID_COEX_SERVICE_ACTIVE_IND 0024 CME_SIGNAL_ID_WLAN_CHANNEL_MAP_IND 0025 CME_SIGNAL_ID_PROFILE_A2DP_START_IND 0026 CME_SIGNAL_ID_PROFILE_A2DP_STOP_IND 0029 CME_SIGNAL_ID_BT_CAL_START_REQ 002a CME_SIGNAL_ID_BT_CAL_START_CFM 002b CME_SIGNAL_ID_BT_CAL_END_IND 002c CME_SIGNAL_ID_WLAN_CHANNEL_MAP_LO_HI_IND 002d CME_SIGNAL_ID_COEX_STOP_IND 002f CME_SIGNAL_ID_COEX_START_IND 0030 CME_SIGNAL_ID_WLAN_VIF_TIMING_IND
+COEX_PROTECT_STATE Enum 0000 FALSE 0001 TRUE 0002 DELAYED
+COEX_MODEM_FLAGS Enum 0001 INIT 0002 TIMERS 0004 MODEM_ENABLED 0008 CA_ENABLED 0010 PB_ENABLED 0020 TDD_ENABLED 0040 MWX_RX_ON 0080 RSRP_LOW 0100 PB_ACTIVE 0200 TD_REQUIRED 0400 TD_ACTIVE 0800 DRX_ACTIVE 1000 TD_SUSPEND ffff BITMAP
+COEX_BT_WL_DEBUG_SEL_T Enum 0000 SEL_WL0 0001 SEL_WL1 0002 SEL_BT
+CME_BT_ASYNC_EVENT_TYPE Enum 0000 NONE 0001 DISCOVERY_CONNECTION 0002 ACL_FOR_A2DP 0003 ACL_WITHOUT_A2DP 0004 BLE_DATA 0005 CALIBRATION 0006 ANNOUNCED_PUNCTURE
+COEX_BT_CDL_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX 0002 SEL_MISC
+COEX_WL_DEBUG_SEL_T Enum 0000 SEL_MAC_IF 0001 SEL_SW_IF 0002 SEL_CDL 0003 SEL_MISC
+COEX_WL_SW_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+DEBUG_COEX_PERIODIC_EVENT_TYPE Enum 0000 PERIODIC_NONE 0001 PERIODIC_SCO 0002 PERIODIC_ESCO 0003 PERIODIC_ACL_SNIFF 0004 PERIODIC_PAGE_SCAN 0005 PERIODIC_INQUIRY_SCAN 0006 PERIODIC_BLE_SCAN 0007 PERIODIC_BLE_CONNECT 0008 PERIODIC_BLE_CONNECTION 0009 PERIODIC_BLE_ADVERT 000a PERIODIC_ANT_SCAN_NORMAL 000b PERIODIC_ANT_SCAN_CRITICAL 000c PERIODIC_ANT_CHANNEL_RX 000d PERIODIC_ANT_BURST_RX 000e PERIODIC_ANT_BURST_TX
+CAR_REASON Enum 0011 ALLOWED_OVERRIDE_REQ 0012 ARB_REQ 0013 SIM_RX_REQ 0014 SPECTRAL__REQ 0015 OVERRIDE_REQ 0016 WLAN_LISTEN_PRI_REQ 0017 ARB_REQUIRED_REQ 0021 RECONFIG 0022 BT_TRANS 0041 RX_START 0042 RX_START_ACK 0043 RX_LSIG 0044 RX_HTSIG 0045 TX_START 0046 RX_CANCEL 0047 RX_END 0048 TX_CANCEL_EDCA 0049 TX_END 004a TX_RSP_ACK 004b TX_RSP_CTS 004c SLOT_TIMER
+VIF_TYPE Enum 0000 UNSYNC 0001 ADHOC 0002 STA 0003 AP
+COEX_BB_DEBUG_CDL_SEL_T Enum 0001 CDL_SEL_BT 0002 CDL_SEL_WL ffff BITMAP
+COEX_BB_CLKGEN_CFG_T Enum 0001 CLK_COEX_EN 0002 CLK_COEX_REGS_EN ffff BITMAP
+COEX_MPS_STATE_T Enum 0000 COEX_MPS_OFF 0001 COEX_MPS_ON_BT_PHASE 0002 COEX_MPS_ON_WL_PHASE 0003 LAST
+DEBUG_COEX_IRQ_TYPE Enum 0000 CME_IRQ_TYPE_VPIO 0001 CME_IRQ_TYPE_TBUS
+COEX_INTERFACE Enum 0000 RADIO_off 0001 5G 0002 2G4
+CME_BT_PERIODIC_EVENT_TYPE Enum 0000 NONE 0001 SCO 0002 ESCO 0003 ACL_SNIFF 0004 PAGE_SCAN 0005 INQUIRY_SCAN 0006 BLE_SCAN 0007 BLE_CONNECT 0008 BLE_CONNECTION 0009 BLE_ADVERT 000a ANT_SCAN_NORMAL 000b ANT_SCAN_CRITICAL 000c ANT_CHANNEL_RX 000d ANT_BURST_RX 000e ANT_BURST_TX
+COEX_CDL_INSTANCE_T Enum 0000 COEX_CDL_INSTANCE_WL 0000 COEX_CDL_INSTANCE_AUTO 0001 COEX_CDL_INSTANCE_BT
+COEX_STRAT_FLAGS_T Enum 0001 INIT 0002 TIMERS 0004 ASYNC_V 0008 WL_RESTRICT 0020 INHIBIT_REVOKE 0040 A2DP 0080 PERIODIC_INHIBIT 0100 ASYNC_INHIBIT 0200 EARLY_START 0400 SCO 0800 ESCO ffff BITMAP
+COEX_FLEXIMAC_REQUESTS_T Enum 0010 ALLOWED_OVERRIDE 0020 ARB_REQUIRED 0040 SIM_RX 0080 SPECTRAL_CHECKING 0100 OVERRIDE 0200 LISTEN_PRIORITY 0400 BT_TRANSACTION ffff BITMAP
+FMPD_COEX_RING_EVENT_T Enum 0010 COEX_START 0011 COEX_SHUTDOWN 0020 PPDU_RX_START 0021 PPDU_RX_LSIG_RX 0022 PPDU_RX_HTSIG_GF_RX 0023 PPDU_RX_END 0024 PPDU_TX_START 0025 PPDU_TX_END 0026 PPDU_TX_RSP 0027 PPDU_TX_CANCEL 0028 PPDU_RX_CANCEL 0040 BT_TRANS_REQ 0041 BT_TRANS_ALERT 0080 EDCA_TX_REQ 0081 EDCA_TX_SCHED 0082 EDCA_TX_DEADLINE 0083 SLOT_TIMER_FINISHED 0100 PPDU_LISTEN 0200 UPDATE_MACPP 0400 ARB_EVENT 0401 ARB_WLAN_WINS 0402 ARB_BT_WINS 0403 ARB_DRAW 0800 BT_ORIDE 0801 WLAN_ORIDE 1000 REQUEST
+COEX_BB_DEBUG_IF_SEL_T Enum 0001 IF_SEL_TX 0002 IF_SEL_RX 0004 IF_SEL_TXRX ffff BITMAP
+INT_SOURCE_T Enum 0061 FXMAC0_0 0062 FXMAC0_1 0063 FXMAC0_2 0064 FXMAC0_3 0065 FXMAC1_0 0066 FXMAC1_1 0067 FXMAC1_2 0068 FXMAC1_3
+COEX_VIF_ATTRIBUTES_T Enum 0000 COEX_MAC_VIF_ATTRIBUTE_NONE 0001 COEX_MAC_VIF_ATTRIBUTE_5G 0002 COEX_MAC_VIF_ATTRIBUTE_AP 0004 COEX_MAC_VIF_ATTRIBUTE_P2P ffff BITMAP
+COEX_BT_CFG_T Enum 0001 BT_EN 0002 FORCE_REGS_CLK_EN ffff BITMAP
+COEX_FLEXIMAC_FLAGS_T Enum 0001 FM0 0002 FM1 0004 INIT 0008 TRANS_TIMEOUT_FIRED 0010 TRANS_WAITING ffff BITMAP
+COEX_CDL_OVERRIDE_OPTION_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX 0010 BTTX_EN 0020 BTTX 0040 BTRX_EN 0080 BTRX ffff BITMAP
+COEX_FLAGS_T Enum 0001 COEX_MAC_READY 0002 COEX_BT_ON 0004 COEX_CDL_WL_SW_IF ffff BITMAP
+COEX_PROTECT_ACT_T Enum 0000 TX_BEACON 0001 RX_BEACON 0002 TX_NULL 0003 TX_CTS_TO_SELF 0004 TX_CF_END 0005 TX_RX_KEEP_ALIVE 0006 TX_RX_CONNECTION 0007 RX_MIN_VIF_DURATION 0008 RX_MULTICAST 0009 RX_DURING_WLAN_OPP 000a LAST
+DEBUG_CME_WLAN_STATE Enum 0 CME_WLAN_STATE_OFF 1 CME_WLAN_STATE_ON
+COEX_BB_DEBUG_CDL_ARB_SEL_T Enum 0001 ARB_SEL_REM_TX 0002 ARB_SEL_REM_RX 0004 ARB_SEL_MISC ffff BITMAP
+FMPD_COEX_BT_TRANSACTION_SOURCE_T Enum 0000 TIMEOUT 0001 IMMEDIATE 0002 NORMAL
+ABORT_CFG_T Enum 0001 TX_CDL_EN 0002 TX_RF_EN 0004 RX_CDL_EN 0008 RX_RF_EN ffff BITMAP
+COEX_FLEXIMAC_ALERTS_T Enum 0001 COEX_START 0002 COEX_SHUTDOWN 0004 RING_FILLING 0008 ARB_REQUIRED 0010 SIM_RX 0020 SPECTRAL_CHECKING 0040 OVERRIDE 0080 LISTEN_PRIORITY 0100 BT_TRANSACTION 0200 MACPP_ALLOWED ffff BITMAP
+RAMEDATA_USPBO_CONFIG_FLAGS Enum 0001 USPBO_ENABLE_CTS_TO_SELF 0002 USPBO_ENABLE_CTS_TO_SELF_LIFETIME_OVERRIDE 0004 USPBO_ENABLE_CTS_TO_SELF_BACKOFF_OVERRIDE 0008 USPBO_ENABLE_CTS_TO_SELF_DURATION_OVERRIDE 0010 USPBO_ENABLE_RX_ONLY_PHASE 0020 USPBO_ENABLE_AP_MODE
+COEX_BB_CFG_T Enum 0001 CFG_EN 0002 CFG_FORCE_CDL_EN 0004 WL_SW_IF_EN ffff BITMAP
+COEX_MAC_FLAGS_T Enum 0001 READY 0002 SCAN_ACTIVE 0004 CALIBRATION_ACTIVE 0008 ACL 0010 KEEP_ALIVE 0020 MPS_ENABLED 0040 PS_ACTIVE 0080 HIGH_PRIORITY 0100 DHCP_PROTECT 0200 TESCO6 0400 AP 0800 GO_NOA 1000 IM_IDLE 2000 P2P_FULL_SCAN 4000 P2P_SOCIAL_SCAN ffff BITMAP
+WLAN_CDL_PRIORITY Enum 0000 WLAN_CDL_PRI_RX_DEFAULT 0004 WLAN_CDL_PRI_RX_MIN_VIF_DURATION 0006 WLAN_CDL_PRI_TX_CTRL 0006 WLAN_CDL_PRI_TX_MULTICAST 0006 WLAN_CDL_PRI_RX_WLAN_OPP 0006 WLAN_CDL_PRI_TX_DATA_MGMT 000a WLAN_CDL_PRI_TX_RX_BEACON 000a WLAN_CDL_PRI_TX_RX_KEEP_ALIVE 000a WLAN_CDL_PRI_RX_MULTICAST 000a WLAN_CDL_PRI_TX_RX_HI_PRI_CTRL 000b WLAN_CDL_PRI_TX_RX_ACK
+# Generated From crypto/crypto_debug.xml
+trace_def 3
+001c 0000 CRYPTO_START
+001c 0001 CRYPTO_STOP 0002 type version
+001c 0002 CRYPTO_RESULT 0002 data type
+# Generated From crypto/crypto_debug.xml
+trace_types 9
+CRYPTO_STOP.type DEBUG_CRYPTO_ALGO
+CRYPTO_STOP.version DEBUG_SHA_VERSION
+CRYPTO_START_AES.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_AES.version DEBUG_AES_KEY_LENGTH_TYPE
+CRYPTO_RESULT.data TOKEN
+CRYPTO_RESULT.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_SHA.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_SHA.version DEBUG_SHA_VERSION
+CRYPTO_ERROR.type DEBUG_CRYPTO_ALGO
+DEBUG_CRYPTO_ALGO_TYPE Enum 0000 FT_R0_KDF 0001 FT_R0NAME 0002 FT_R1_KDF 0003 FT_R1NAME 0004 FT_PTK_KDF 0005 FT_MIC_AES128_CMAC 0006 FT_MIC_SHA384_HMAC 0007 FT_GTK_AES_UNWRAP 0008 FT_IGTK_AES_UNWRAP
+DEBUG_SHA_VERSION_TYPE Enum 0000 SHA_VERSION_256 0001 SHA_VERSION_384 0002 SHA_VERSION_512
+DEBUG_AES_KEY_LENGTH_TYPE Enum 0000 AES_KEY_LENGTH_128 0001 AES_KEY_LENGTH_256
+# Generated From hip_signals.xml
+trace_types 88
+Radio_Bitmap Enum 0002 radio_1 0001 radio_0
+Cipher_Suite_Selector Natural32
+Peer_Index Natural16
+Tx_Data_Type Enum 0000 data_word 0001 data_random
+Channel_Frequency Natural16
+Client_Tag Natural16
+Edge_Of_Band Natural16
+TDLS_Event Enum 0003 Discovered 0001 Connected 0002 Disconnected
+Scan_Id Natural16
+Data_Unit_Descriptor Enum 0002 AMSDU_subframe 0000 IEEE802_11_Frame 0003 AMSDU 0004 TCP_ACK 0001 IEEE802_3_Frame
+Pmalloc_Area Enum 0001 Pmalloc_Fsm_Stats 0000 Pmalloc_Stats 0002 Hostio_Sig_Sizes
+NAN_Availability_Interval Natural32
+NANSDF_Mask Natural16
+Connection_type Enum 0001 P2p_Operation 0005 Wlan_Ranging 0004 Nan_Further_Service_Slot 0000 Wlan_Infrastructure
+uint16 Natural16
+Microseconds16 Natural16
+Band Enum 0001 5GHz 0002 2_4GHz 0000 Auto
+VIF_Range Enum 000f VIF_Index_Max 0001 VIF_Index_Min
+uint32 Natural32
+Hidden_Ssid Enum 0002 Hidden_Zero_Data 0000 Not_Hidden 0001 Hidden_Zero_Length
+int32 Natural32s
+VIF_Index Natural16
+CW_Start_Flags Enum 0000 none 0001 scan_channel
+NAN_SDF_Control Enum 0008 Received_FollowUp_Event 0002 Subscribe_End_Event 0004 Match_expired_Event 0010 Followup_Transmit_Status 0001 Publish_End_Event
+Microseconds32 Natural32
+RTT_Type Enum 0001 One_sided 0002 Two_sided
+ePNO_Policy Enum 0100 Auth_Open 0010 Same_Network 0004 G_Band 0008 Strict_Match 0001 Hidden 0400 Auth_EAPOL 0002 A_Band 0200 Auth_PSK
+End_Point Enum 0002 DPLP 0001 Hostio
+Message_Type Enum 0005 DHCP 0001 EAP_Message 0003 EAPOL_Key_M4 0011 IEEE80211_Mgmt 0007 WAI_Message 0006 Neighbor_Discovery 0008 Any_Other 0002 EAPOL_Key_M123 0004 ARP 0010 IEEE80211_Action
+Mode Enum 0003 Loopback 0002 Sink 0001 Source
+Tx_Set_Params_Flags Enum 0000 none 1000 rx_low_power 0080 disable_scrambler 0008 deafen_rx 0100 ldpc 0200 stbc 0001 ack 0002 duplicate_80 0020 scan_channel 0040 short_preamble 2000 ibss_frames 8000 disable_external_lna 4000 beamforming 0004 duplicate_40 0400 disable_spreader 0800 greenfield_preamble 0010 cs
+NAN_Operation_Control Enum 0004 Start_Cluster_Event 0002 MAC_Address_Event 0008 Joined_Cluster_Event
+Beacon_Periods Natural16
+Time_Units Natural16
+Bulk_Data_Descriptor Enum 0001 Smapper 0000 Inline
+Tx_Set_Params_Flags2 Enum 0000 none
+Data_Length Natural16
+Rule_Flag Enum 0010 NO_OUTDOOR 0002 DFS 0008 NO_INDOOR 0001 NO_IR 0004 NO_OFDM
+Tx_HE_Mode Enum 0004 he_mu_tb 0003 he_mu_tb_standalone 0002 he_er_su_10mhz 0001 he_er_su 0000 he_su
+NANOperControl_Mask Natural16
+Purpose_Mask Natural16
+VIF_Type Enum 0021 Offchannel 0005 NAN 0003 AP 0007 Preconnect 0002 Station 0022 Range 0010 Monitor 0006 Discovery 0000 Unsynchronised 0004 Wlanlite 0020 Scan
+Device_Role Enum 0002 P2p_GO 0004 P2p_Client 0001 Infrastructure_Station 0003 P2p_Device
+CW_Type Enum 0003 dc 0001 ramp 0002 two_tone 0004 prn 0000 sine
+Action Enum 0000 stop 0001 start
+Power_Management_Mode Enum 0001 Power_Save 0000 Active_Mode
+TDLS_Action Enum 0002 Teardown 0000 Discovery 0001 Setup
+Boolean Enum 0001 True 0000 False
+Data_Rate Enum 8c97 11ax160_1361m1bps_2gi_nss2 8828 11ax80_367m5bps_4gi 6848 11ac80_390mbps_sgi 8851 11ax80_34mbps_2gi_dcm 8492 11ax40_97m5bps_2gi_nss2 8ca4 11ax160_735mbps_4gi_nss2 68cb 11ac80_1083m3bps_sgi_nss2 6843 11ac80_130mbps_sgi 8051 11ax20_8m1bps_2gi_dcm 6084 11ac20_78mbps_nss2 8897 11ax80_680m6bps_2gi_nss2 8495 11ax40_260mbps_2gi_nss2 6c87 11ac160_1170mbps_nss2 8899 11ax80_907m4bps_2gi_nss2 6847 11ac80_325mbps_sgi e008 ctr_beamformed 8095 11ax20_130mbps_2gi_nss2 6807 11ac80_292m5bps 8063 11ax20_14m6bps_4gi_dcm 4405 11n40_108mbps e002 ctr_crc_error 6082 11ac20_39mbps_nss2 4042 11n20_21m7bps_sgi 8caa 11ax160_1837m5bps_4gi_nss2 84aa 11ax40_438m8bps_4gi_nss2 8883 11ax80_288m2bps_1gi_nss2 8423 11ax40_58m5bps_4gi 8c21 11ax160_122m5bps_4gi 8483 11ax40_137m6bps_1gi_nss2 8498 11ax40_390mbps_2gi_nss2 8480 11ax40_34m4bps_1gi_nss2 8c54 11ax160_204m2bps_2gi_dcm 8822 11ax80_91m9bps_4gi 8013 11ax20_32m5bps_2gi 8c0b 11ax160_1201mbps_1gi 6404 11ac40_81mbps 4444 11n40_90mbps_sgi 6c84 11ac160_702mbps_nss2 44c8 11n40_30mbps_sgi_nss2 8488 11ax40_412m9bps_1gi_nss2 4407 11n40_135mbps 8489 11ax40_458m8bps_1gi_nss2 4005 11n20_52mbps 8061 11ax20_7m3bps_4gi_dcm 8cc0 11ax160_72m1bps_1gi_nss2_dcm 8861 11ax80_30m6bps_4gi_dcm 8461 11ax40_14m6bps_4gi_dcm 8ca0 11ax160_122m5bps_4gi_nss2 6440 11ac40_15mbps_sgi 8802 11ax80_108m1bps_1gi 4443 11n40_60mbps_sgi 84a9 11ax40_390mbps_4gi_nss2 8c27 11ax160_612m5bps_4gi 4000 11n20_6m5bps 8823 11ax80_122m5bps_4gi 8086 11ax20_154m9bps_1gi_nss2 8c44 11ax160_216m2bps_1gi_dcm 8403 11ax40_68m8bps_1gi 84e4 11ax40_87m8bps_4gi_nss2_dcm 840b 11ax40_286m8bps_1gi 8407 11ax40_172m1bps_1gi 88d4 11ax80_204m2bps_2gi_nss2_dcm 8406 11ax40_154m9bps_1gi 8022 11ax20_21m9bps_4gi 8c0a 11ax160_1080m9bps_1gi 8007 11ax20_86mbps_1gi 84ab 11ax40_487m5bps_4gi_nss2 8083 11ax20_68m8bps_1gi_nss2 8c95 11ax160_1088m9bps_2gi_nss2 84e1 11ax40_29m3bps_4gi_nss2_dcm 4089 11n20_26mbps_nss2 40cc 11n20_86m7bps_sgi_nss2 889a 11ax80_1020m8bps_2gi_nss2 8041 11ax20_8m6bps_1gi_dcm 6048 11ac20_86m7bps_sgi 4460 11n40_6m7bps_sgi 8819 11ax80_453m7bps_2gi 8816 11ax80_306m3bps_2gi 800a 11ax20_129mbps_1gi 8c85 11ax160_1152m9bps_1gi_nss2 6c42 11ac160_195mbps_sgi 6809 11ac80_390mbps 408a 11n20_39mbps_nss2 6c48 11ac160_780mbps_sgi 8ce3 11ax160_245mbps_4gi_nss2_dcm 8c96 11ax160_1225mbps_2gi_nss2 4001 11n20_13mbps 80a8 11ax20_175m5bps_4gi_nss2 888b 11ax80_1201mbps_1gi_nss2 4043 11n20_28m9bps_sgi 8416 11ax40_146m3bps_2gi 6840 11ac80_32m5bps_sgi 8c90 11ax160_136m1bps_2gi_nss2 68c6 11ac80_585mbps_sgi_nss2 64c3 11ac40_120mbps_sgi_nss2 88ab 11ax80_1020m8bps_4gi_nss2 6445 11ac40_120mbps_sgi 880a 11ax80_540m4bps_1gi 8894 11ax80_408m3bps_2gi_nss2 84d1 11ax40_32m5bps_2gi_nss2_dcm 8021 11ax20_14m6bps_4gi 8020 11ax20_7m3bps_4gi 8428 11ax40_175m5bps_4gi 6ccb 11ac160_2166m7bps_sgi_nss2 6cc7 11ac160_1300mbps_sgi_nss2 8000 11ax20_8m6bps_1gi 8414 11ax40_97m5bps_2gi 8014 11ax20_48m8bps_2gi 4401 11n40_27mbps 808b 11ax20_286m8bps_1gi_nss2 64c6 11ac40_270mbps_sgi_nss2 88c4 11ax80_216m2bps_1gi_nss2_dcm 882b 11ax80_510m4bps_4gi 802a 11ax20_109m7bps_4gi 8895 11ax80_544m4bps_2gi_nss2 8429 11ax40_195mbps_4gi 84d0 11ax40_16m3bps_2gi_nss2_dcm 8044 11ax20_25m8bps_1gi_dcm 8820 11ax80_30m6bps_4gi 44ce 11n40_270mbps_sgi_nss2 8441 11ax40_17m2bps_1gi_dcm 8024 11ax20_43m9bps_4gi 8419 11ax40_216m7bps_2gi 6409 11ac40_180mbps 4488 11n40_27mbps_nss2 8011 11ax20_16m3bps_2gi 8464 11ax40_43m9bps_4gi_dcm 4442 11n40_45mbps_sgi 6801 11ac80_58m5bps 8ca9 11ax160_1633m3bps_4gi_nss2 84a2 11ax40_87m8bps_4gi_nss2 8c63 11ax160_122m5bps_4gi_dcm 448f 11n40_270mbps_nss2 8c60 11ax160_30m6bps_4gi_dcm 80d4 11ax20_48m8bps_2gi_nss2_dcm 88a2 11ax80_183m8bps_4gi_nss2 8c91 11ax160_272m2bps_2gi_nss2 2009 11a20_9mbps 68c8 11ac80_780mbps_sgi_nss2 8c88 11ax160_1729m4bps_1gi_nss2 8817 11ax80_340m3bps_2gi 6088 11ac20_156mbps_nss2 6443 11ac40_60mbps_sgi 6441 11ac40_30mbps_sgi 8808 11ax80_432m4bps_1gi 8c14 11ax160_408m3bps_2gi 6c49 11ac160_866m7bps_sgi 6046 11ac20_65mbps_sgi 6400 11ac40_13m5bps 8821 11ax80_61m3bps_4gi 6442 11ac40_45mbps_sgi 8898 11ax80_816m7bps_2gi_nss2 8089 11ax20_229m4bps_1gi_nss2 68c7 11ac80_650mbps_sgi_nss2 8c24 11ax160_367m5bps_4gi 8422 11ax40_43m9bps_4gi 448d 11n40_216mbps_nss2 8002 11ax20_25m8bps_1gi 6846 11ac80_292m5bps_sgi 8424 11ax40_87m8bps_4gi 68c9 11ac80_866m7bps_sgi_nss2 8c12 11ax160_204m2bps_2gi 8096 11ax20_146m3bps_2gi_nss2 64c0 11ac40_30mbps_sgi_nss2 8c61 11ax160_61m3bps_4gi_dcm 80ab 11ax20_243m8bps_4gi_nss2 68c4 11ac80_390mbps_sgi_nss2 4441 11n40_30mbps_sgi 6c83 11ac160_468mbps_nss2 6845 11ac80_260mbps_sgi 64c5 11ac40_240mbps_sgi_nss2 6080 11ac20_13mbps_nss2 8440 11ax40_8m6bps_1gi_dcm 6446 11ac40_135mbps_sgi 84d3 11ax40_65mbps_2gi_nss2_dcm 6806 11ac80_263m3bps 8026 11ax20_65m8bps_4gi 6cc8 11ac160_1560mbps_sgi_nss2 68ca 11ac80_975mbps_sgi_nss2 64c7 11ac40_300mbps_sgi_nss2 8ca6 11ax160_1102m5bps_4gi_nss2 8888 11ax80_864m7bps_1gi_nss2 8850 11ax80_17mbps_2gi_dcm 8881 11ax80_144m1bps_1gi_nss2 888a 11ax80_1080m9bps_1gi_nss2 68c2 11ac80_195mbps_sgi_nss2 8408 11ax40_206m5bps_1gi 800b 11ax20_143m4bps_1gi 8454 11ax40_48m8bps_2gi_dcm 6885 11ac80_468mbps_nss2 809b 11ax20_270m8bps_2gi_nss2 8c04 11ax160_432m4bps_1gi 6008 11ac20_78mbps e001 ctr_no_error 8c98 11ax160_1633m3bps_2gi_nss2 8c99 11ax160_1814m8bps_2gi_nss2 8860 11ax80_15m3bps_4gi_dcm 60c1 11ac20_28m9bps_sgi_nss2 80a6 11ax20_131m6bps_4gi_nss2 80a1 11ax20_29m3bps_4gi_nss2 6488 11ac40_324mbps_nss2 8801 11ax80_72m1bps_1gi 8885 11ax80_576m5bps_1gi_nss2 6002 11ac20_19m5bps 88e0 11ax80_30m6bps_4gi_nss2_dcm 6883 11ac80_234mbps_nss2 8c20 11ax160_61m3bps_4gi 8887 11ax80_720m6bps_1gi_nss2 88d0 11ax80_34mbps_2gi_nss2_dcm 8853 11ax80_68m1bps_2gi_dcm 8884 11ax80_432m4bps_1gi_nss2 8844 11ax80_108m1bps_1gi_dcm 60c3 11ac20_57m8bps_sgi_nss2 68c0 11ac80_65mbps_sgi_nss2 881a 11ax80_510m4bps_2gi 84c4 11ax40_103m2bps_1gi_nss2_dcm 40cd 11n20_115m6bps_sgi_nss2 6480 11ac40_27mbps_nss2 8893 11ax80_272m2bps_2gi_nss2 8443 11ax40_34m4bps_1gi_dcm 8863 11ax80_61m3bps_4gi_dcm 648b 11ac40_450mbps_nss2 8451 11ax40_16m3bps_2gi_dcm 8016 11ax20_73m1bps_2gi 6c8b 11ac160_1950mbps_nss2 8c80 11ax160_144m1bps_1gi_nss2 88c0 11ax80_36mbps_1gi_nss2_dcm 8025 11ax20_58m5bps_4gi 4088 11n20_13mbps_nss2 8088 11ax20_206m5bps_1gi_nss2 84c3 11ax40_68m8bps_1gi_nss2_dcm 2024 11a20_36mbps 64c8 11ac40_360mbps_sgi_nss2 8c53 11ax160_136m1bps_2gi_dcm 88d1 11ax80_68m1bps_2gi_nss2_dcm 6448 11ac40_180mbps_sgi 8c11 11ax160_136m1bps_2gi 8891 11ax80_136m1bps_2gi_nss2 6c0a 11ac160_877m5bps 8ce0 11ax160_61m3bps_4gi_nss2_dcm 6c4a 11ac160_975mbps_sgi 8cc3 11ax160_288m2bps_1gi_nss2_dcm 8c03 11ax160_288m2bps_1gi 680a 11ac80_438m8bps 6841 11ac80_65mbps_sgi 80c1 11ax20_17m2bps_1gi_nss2_dcm 000b 11b20_11mbps 84a4 11ax40_175m5bps_4gi_nss2 8400 11ax40_17m2bps_1gi 4402 11n40_40m5bps 8c93 11ax160_544m4bps_2gi_nss2 4406 11n40_121m5bps 6c07 11ac160_585mbps 4003 11n20_26mbps 6487 11ac40_270mbps_nss2 6489 11ac40_360mbps_nss2 8091 11ax20_32m5bps_2gi_nss2 8cd1 11ax160_136m1bps_2gi_nss2_dcm 8813 11ax80_136m1bps_2gi 60c0 11ac20_14m4bps_sgi_nss2 8493 11ax40_130mbps_2gi_nss2 8c41 11ax160_72m1bps_1gi_dcm 80a0 11ax20_14m6bps_4gi_nss2 809a 11ax20_243m8bps_2gi_nss2 6402 11ac40_40m5bps 84a1 11ax40_58m5bps_4gi_nss2 8c17 11ax160_680m6bps_2gi 8494 11ax40_195mbps_2gi_nss2 8c64 11ax160_183m8bps_4gi_dcm 8886 11ax80_648m5bps_1gi_nss2 8809 11ax80_480m4bps_1gi 68c1 11ac80_130mbps_sgi_nss2 88aa 11ax80_918m8bps_4gi_nss2 8409 11ax40_229m4bps_1gi 6c04 11ac160_351mbps 6888 11ac80_702mbps_nss2 e000 ctr_total 6003 11ac20_26mbps 8c25 11ax160_490mbps_4gi 4047 11n20_72m2bps_sgi 8010 11ax20_8m1bps_2gi 6804 11ac80_175m5bps 849b 11ax40_541m7bps_2gi_nss2 8ce4 11ax160_367m5bps_4gi_nss2_dcm 80a4 11ax20_87m8bps_4gi_nss2 8889 11ax80_960m7bps_1gi_nss2 8486 11ax40_309m7bps_1gi_nss2 841b 11ax40_270m8bps_2gi 688b 11ac80_975mbps_nss2 6485 11ac40_216mbps_nss2 8854 11ax80_102m1bps_2gi_dcm 64c4 11ac40_180mbps_sgi_nss2 8ca1 11ax160_245mbps_4gi_nss2 8453 11ax40_32m5bps_2gi_dcm 40ce 11n20_130mbps_sgi_nss2 0001 11b20_1mbps 6403 11ac40_54mbps 8806 11ax80_324m3bps_1gi 60c4 11ac20_86m7bps_sgi_nss2 6c82 11ac160_351mbps_nss2 8c29 11ax160_816m6bps_4gi 8444 11ax40_51m6bps_1gi_dcm 8463 11ax40_29m3bps_4gi_dcm 60c5 11ac20_115m6bps_sgi_nss2 80a2 11ax20_43m9bps_4gi_nss2 6cc5 11ac160_1040mbps_sgi_nss2 68c5 11ac80_520mbps_sgi_nss2 8426 11ax40_131m6bps_4gi 8c00 11ax160_72m1bps_1gi 8841 11ax80_36mbps_1gi_dcm 8c16 11ax160_612m5bps_2gi 8c84 11ax160_864m7bps_1gi_nss2 88d3 11ax80_136m1bps_2gi_nss2_dcm 8818 11ax80_408m3bps_2gi 6c80 11ac160_117mbps_nss2 8017 11ax20_81m3bps_2gi 6405 11ac40_108mbps 408e 11n20_117mbps_nss2 6000 11ac20_6m5bps 8487 11ax40_344m1bps_1gi_nss2 8cc4 11ax160_432m4bps_1gi_nss2_dcm 80a7 11ax20_146m3bps_4gi_nss2 448b 11n40_108mbps_nss2 408b 11n20_52mbps_nss2 88a9 11ax80_816m6bps_4gi_nss2 8003 11ax20_34m4bps_1gi 4400 11n40_13m5bps 6c0b 11ac160_975mbps 684b 11ac80_541m7bps_sgi 40c9 11n20_28m9bps_sgi_nss2 8005 11ax20_68m8bps_1gi 4006 11n20_58m5bps 8c02 11ax160_216m2bps_1gi 8827 11ax80_306m3bps_4gi 84a0 11ax40_29m3bps_4gi_nss2 6881 11ac80_117mbps_nss2 6482 11ac40_81mbps_nss2 8c18 11ax160_816m7bps_2gi 8805 11ax80_288m2bps_1gi 6c05 11ac160_468mbps 848a 11ax40_516m2bps_1gi_nss2 4404 11n40_81mbps 8826 11ax80_275m6bps_4gi 6449 11ac40_200mbps_sgi 6c09 11ac160_780mbps 88a6 11ax80_551m3bps_4gi_nss2 448a 11n40_81mbps_nss2 4446 11n40_135mbps_sgi 84a5 11ax40_234mbps_4gi_nss2 80a5 11ax20_117mbps_4gi_nss2 6086 11ac20_117mbps_nss2 8c28 11ax160_735mbps_4gi 8c15 11ax160_544m4bps_2gi 8c51 11ax160_68m1bps_2gi_dcm 8c06 11ax160_648m5bps_1gi 44cd 11n40_240mbps_sgi_nss2 841a 11ax40_243m8bps_2gi 6408 11ac40_162mbps 6045 11ac20_57m8bps_sgi 6043 11ac20_28m9bps_sgi 8481 11ax40_68m8bps_1gi_nss2 8c89 11ax160_1921m5bps_1gi_nss2 8c50 11ax160_34mbps_2gi_dcm 408f 11n20_130mbps_nss2 8412 11ax40_48m8bps_2gi 8c40 11ax160_36mbps_1gi_dcm 8815 11ax80_272m2bps_2gi 8814 11ax80_204m2bps_2gi 882a 11ax80_459m4bps_4gi 6800 11ac80_29m3bps 8015 11ax20_65mbps_2gi 88a7 11ax80_612m5bps_4gi_nss2 8497 11ax40_325mbps_2gi_nss2 84a8 11ax40_351mbps_4gi_nss2 4045 11n20_57m8bps_sgi e006 ctr_error 84a3 11ax40_117mbps_4gi_nss2 8413 11ax40_65mbps_2gi 848b 11ax40_573m5bps_1gi_nss2 0002 11b20_2mbps 88a8 11ax80_735mbps_4gi_nss2 8019 11ax20_108m3bps_2gi 80d1 11ax20_16m3bps_2gi_nss2_dcm 44cf 11n40_300mbps_sgi_nss2 6c43 11ac160_260mbps_sgi 8804 11ax80_216m2bps_1gi 680b 11ac80_487m5bps 88e1 11ax80_61m3bps_4gi_nss2_dcm 8c9a 11ax160_2041m7bps_2gi_nss2 6c03 11ac160_234mbps 80c4 11ax20_51m6bps_1gi_nss2_dcm 6c81 11ac160_234mbps_nss2 8040 11ax20_4m3bps_1gi_dcm 8092 11ax20_48m8bps_2gi_nss2 8cc1 11ax160_144m1bps_1gi_nss2_dcm 6cc4 11ac160_780mbps_sgi_nss2 8890 11ax80_68m1bps_2gi_nss2 8843 11ax80_72m1bps_1gi_dcm 8093 11ax20_65mbps_2gi_nss2 8c1a 11ax160_1020m8bps_2gi 44ca 11n40_90mbps_sgi_nss2 684a 11ac80_487m5bps_sgi 88a0 11ax80_61m3bps_4gi_nss2 80e3 11ax20_29m3bps_4gi_nss2_dcm 8012 11ax20_24m4bps_2gi 6c02 11ac160_175m5bps 8081 11ax20_34m4bps_1gi_nss2 6042 11ac20_21m7bps_sgi 8896 11ax80_612m5bps_2gi_nss2 8460 11ax40_7m3bps_4gi_dcm 6486 11ac40_243mbps_nss2 8ce1 11ax160_122m5bps_4gi_nss2_dcm 6c89 11ac160_1560mbps_nss2 842b 11ax40_243m8bps_4gi 8c86 11ax160_1297m1bps_1gi_nss2 8401 11ax40_34m4bps_1gi 80e4 11ax20_43m9bps_4gi_nss2_dcm 801a 11ax20_121m9bps_2gi 8485 11ax40_275m3bps_1gi_nss2 40cf 11n20_144m4bps_sgi_nss2 8496 11ax40_292m5bps_2gi_nss2 60c8 11ac20_173m3bps_sgi_nss2 6c85 11ac160_936mbps_nss2 8085 11ax20_137m6bps_1gi_nss2 64c9 11ac40_400mbps_sgi_nss2 8c83 11ax160_576m5bps_1gi_nss2 6407 11ac40_135mbps 8420 11ax40_14m6bps_4gi 60ca 11ac20_216m7bps_sgi_nss2 644a 11ac40_225mbps_sgi 200c 11a20_12mbps 448e 11n40_243mbps_nss2 8840 11ax80_18mbps_1gi_dcm 8882 11ax80_216m2bps_1gi_nss2 8c13 11ax160_272m2bps_2gi 88a3 11ax80_245mbps_4gi_nss2 8402 11ax40_51m6bps_1gi 849a 11ax40_487m5bps_2gi_nss2 8cd4 11ax160_408m3bps_2gi_nss2_dcm 6041 11ac20_14m4bps_sgi 8050 11ax20_4mbps_2gi_dcm 8421 11ax40_29m3bps_4gi 6889 11ac80_780mbps_nss2 6884 11ac80_351mbps_nss2 80e1 11ax20_14m6bps_4gi_nss2_dcm 8c94 11ax160_816m7bps_2gi_nss2 8482 11ax40_103m2bps_1gi_nss2 84e3 11ax40_58m5bps_4gi_nss2_dcm 6c06 11ac160_526m5bps 8c08 11ax160_864m7bps_1gi 6c8a 11ac160_1755mbps_nss2 8028 11ax20_87m8bps_4gi 8004 11ax20_51m6bps_1gi 6880 11ac80_58m5bps_nss2 80aa 11ax20_219m4bps_4gi_nss2 8c07 11ax160_720m6bps_1gi 8098 11ax20_195mbps_2gi_nss2 842a 11ax40_219m4bps_4gi 8ca7 11ax160_1225mbps_4gi_nss2 8c1b 11ax160_1134m2bps_2gi 408c 11n20_78mbps_nss2 608a 11ac20_195mbps_nss2 8c43 11ax160_144m1bps_1gi_dcm 40cb 11n20_57m8bps_sgi_nss2 8427 11ax40_146m3bps_4gi 8ca2 11ax160_367m5bps_4gi_nss2 8060 11ax20_3m6bps_4gi_dcm 8415 11ax40_130mbps_2gi 6803 11ac80_117mbps 60c6 11ac20_130mbps_sgi_nss2 2030 11a20_48mbps 6444 11ac40_90mbps_sgi 6c40 11ac160_65mbps_sgi 6484 11ac40_162mbps_nss2 6cc9 11ac160_1733m3bps_sgi_nss2 8c8a 11ax160_2161m8bps_1gi_nss2 64ca 11ac40_450mbps_sgi_nss2 6083 11ac20_52mbps_nss2 80a3 11ax20_58m5bps_4gi_nss2 640b 11ac40_225mbps 4041 11n20_14m4bps_sgi 8006 11ax20_77m4bps_1gi 8484 11ax40_206m5bps_1gi_nss2 80d3 11ax20_32m5bps_2gi_nss2_dcm 6887 11ac80_585mbps_nss2 8880 11ax80_72m1bps_1gi_nss2 8800 11ax80_36mbps_1gi 4447 11n40_150mbps_sgi 8094 11ax20_97m5bps_2gi_nss2 8417 11ax40_162m5bps_2gi 4044 11n20_43m3bps_sgi 8053 11ax20_16m3bps_2gi_dcm 8cd0 11ax160_68m1bps_2gi_nss2_dcm 8008 11ax20_103m2bps_1gi e004 ctr_stbc 6c88 11ac160_1404mbps_nss2 8c8b 11ax160_2401m9bps_1gi_nss2 44cb 11n40_120mbps_sgi_nss2 8829 11ax80_408m3bps_4gi 8009 11ax20_114m7bps_1gi 8c22 11ax160_183m8bps_4gi 8ca8 11ax160_1470mbps_4gi_nss2 64c1 11ac40_60mbps_sgi_nss2 8803 11ax80_144m1bps_1gi 6c4b 11ac160_1083m3bps_sgi 6406 11ac40_121m5bps 6c45 11ac160_520mbps_sgi 448c 11n40_162mbps_nss2 8490 11ax40_32m5bps_2gi_nss2 8c23 11ax160_245mbps_4gi 84c1 11ax40_34m4bps_1gi_nss2_dcm 6007 11ac20_65mbps 0005 11b20_5m5bps 6c86 11ac160_1053mbps_nss2 4046 11n20_65mbps_sgi 6808 11ac80_351mbps 6044 11ac20_43m3bps_sgi 801b 11ax20_135m4bps_2gi 8c82 11ax160_432m4bps_1gi_nss2 88a1 11ax80_122m5bps_4gi_nss2 6087 11ac20_130mbps_nss2 4004 11n20_39mbps 88a4 11ax80_367m5bp_4gi_nss2 604a 11ac20_108m3bps_sgi 6c08 11ac160_702mbps 6047 11ac20_72m2bps_sgi 6c44 11ac160_390mbps_sgi 68c3 11ac80_260mbps_sgi_nss2 6cca 11ac160_1950mbps_sgi_nss2 8812 11ax80_102m1bps_2gi 6cc2 11ac160_390mbps_sgi_nss2 8018 11ax20_97m5bps_2gi 60c2 11ac20_43m3bps_sgi_nss2 8404 11ax40_103m2bps_1gi 6401 11ac40_27mbps 44c9 11n40_60mbps_sgi_nss2 80a9 11ax20_195mbps_4gi_nss2 8099 11ax20_216m7bps_2gi_nss2 8892 11ax80_204m2bps_2gi_nss2 4040 11n20_7m2bps_sgi 44cc 11n40_180mbps_sgi_nss2 880b 11ax80_600m4bps_1gi 8c05 11ax160_576m5bps_1gi 8c81 11ax160_288m2bps_1gi_nss2 4002 11n20_19m5bps 408d 11n20_104mbps_nss2 60c7 11ac20_144m4bps_sgi_nss2 2018 11a20_24mbps 6481 11ac40_54mbps_nss2 8029 11ax20_97m5bps_4gi 6c46 11ac160_585mbps_sgi 8054 11ax20_24m4bps_2gi_dcm 64cb 11ac40_500mbps_sgi_nss2 6882 11ac80_175m5bps_nss2 8c19 11ax160_907m4bps_2gi 88a5 11ax80_490mbps_4gi_nss2 881b 11ax80_567m1bps_2gi 6006 11ac20_58m5bps 8864 11ax80_91m9bps_4gi_dcm 6085 11ac20_104mbps_nss2 8c87 11ax160_1441m2bps_1gi_nss2 4440 11n40_15mbps_sgi 6447 11ac40_150mbps_sgi 80e0 11ax20_7m3bps_4gi_nss2_dcm 2036 11a20_54mbps 6cc1 11ac160_260mbps_sgi_nss2 6886 11ac80_526m5bps_nss2 e003 ctr_bad_signal 8023 11ax20_29m3bps_4gi 6001 11ac20_13mbps 4445 11n40_120mbps_sgi 80c0 11ax20_8m6bps_1gi_nss2_dcm 80d0 11ax20_8m1bps_2gi_nss2_dcm 6c01 11ac160_117mbps 6849 11ac80_433m3bps_sgi 6483 11ac40_108mbps_nss2 6c41 11ac160_130mbps_sgi 8c9b 11ax160_2268m5bps_2gi_nss2 64c2 11ac40_90mbps_sgi_nss2 88c3 11ax80_144m1bps_1gi_nss2_dcm 8418 11ax40_195mbps_2gi 8450 11ax40_8m1bps_2gi_dcm 8cab 11ax160_2041m6bps_4gi_nss2 84a6 11ax40_263m3bps_4gi_nss2 808a 11ax20_258m1bps_1gi_nss2 840a 11ax40_258m1bps_1gi 8825 11ax80_245mbps_4gi 889b 11ax80_1134m3bps_2gi_nss2 4007 11n20_65mbps 8080 11ax20_17m2bps_1gi_nss2 8405 11ax40_137m6bps_1gi 84a7 11ax40_292m5bps_4gi_nss2 40ca 11n20_43m3bps_sgi_nss2 6c00 11ac160_58m5bps 8810 11ax80_34mbps_2gi 8c10 11ax160_68m1bps_2gi 8027 11ax20_73m1bps_4gi 6004 11ac20_39mbps 6cc6 11ac160_1170mbps_sgi_nss2 88e4 11ax80_183m8bps_4gi_nss2_dcm e007 ctr_ldpc 4489 11n40_54mbps_nss2 688a 11ac80_877m5bps_nss2 8097 11ax20_162m5bps_2gi_nss2 8425 11ax40_117mbps_4gi 8084 11ax20_103m2bps_1gi_nss2 8491 11ax40_65mbps_2gi_nss2 4403 11n40_54mbps 84e0 11ax40_14m6bps_4gi_nss2_dcm 8087 11ax20_172m1bps_1gi_nss2 40c8 11n20_14m4bps_sgi_nss2 8001 11ax20_17m2bps_1gi 84d4 11ax40_97m5bps_2gi_nss2_dcm 8064 11ax20_21m9bps_4gi_dcm 8090 11ax20_16m3bps_2gi_nss2 8411 11ax40_32m5bps_2gi 8807 11ax80_360m3bps_1gi 88c1 11ax80_72m1bps_1gi_nss2_dcm 2006 11a20_6mbps 648a 11ac40_405mbps_nss2 6844 11ac80_195mbps_sgi 8824 11ax80_183m8bps_4gi 802b 11ax20_121m9bps_4gi 644b 11ac40_250mbps_sgi 8410 11ax40_16m3bps_2gi 2012 11a20_18mbps 80c3 11ax20_34m4bps_1gi_nss2_dcm 8ca3 11ax160_490mbps_4gi_nss2 8c2a 11ax160_918m8bps_4gi 8cd3 11ax160_272m2bps_2gi_nss2_dcm 6805 11ac80_234mbps 4420 11n40_6mbps 84c0 11ax40_17m2bps_1gi_nss2_dcm 8c26 11ax160_551m3bps_4gi 88e3 11ax80_122m5bps_4gi_nss2_dcm 600a 11ac20_97m5bps 6081 11ac20_26mbps_nss2 e005 ctr_duplicate 6c47 11ac160_650mbps_sgi 8ca5 11ax160_980mbps_4gi_nss2 640a 11ac40_202m5bps 6cc0 11ac160_130mbps_sgi_nss2 6842 11ac80_97m5bps_sgi 8499 11ax40_433m3bps_2gi_nss2 6005 11ac20_52mbps 8c92 11ax160_408m3bps_2gi_nss2 8c09 11ax160_960m7bps_1gi 6cc3 11ac160_520mbps_sgi_nss2 8c01 11ax160_144m1bps_1gi 6040 11ac20_7m2bps_sgi 8c2b 11ax160_1020m8bps_4gi 8043 11ax20_17m2bps_1gi_dcm 8811 11ax80_68m1bps_2gi 8082 11ax20_51m6bps_1gi_nss2 6802 11ac80_87m8bps
+Raw_Power Natural16s
+RTT_ID Natural16
+Procedure_Type Enum 0002 Device_Discovered 0003 Roaming_Started 0000 Unknown 0001 Connection_Started
+StatsStop_Mask Natural16
+Association_Id Natural16
+DFS_Regulatory Enum 0001 FCC 0003 JAPAN 0004 GLOBAL 0000 Unknown 0006 CHINA 0002 ETSI
+Authentication_Type Enum 0001 Shared_Key 0003 SAE 0000 Open_System 0080 LEAP
+Device_State Enum 4 bist_running 2 tx_running 1 rx_running 0 idle 3 cw_running
+Key_Type Enum 0003 IGTK 0001 Pairwise 0004 PMK 0002 WEP 0005 First_Illegal 0000 Group
+Picoseconds16 Natural16
+Slot_Number Natural16
+APF_Filter_Mode Enum 0001 Suspend 0000 Disabled 0002 Active
+Counter32 Natural32
+Host_State Natural16
+Event Enum 0010 WIFI_EVENT_ROAM_SCAN_COMPLETE 000f WIFI_EVENT_ROAM_SCAN_STARTED 0005 WIFI_EVENT_FW_RE_ASSOC_STARTED 0015 WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_START 0007 WIFI_EVENT_DRIVER_SCAN_RESULT_FOUND 000a WIFI_EVENT_G_SCAN_COMPLETE 0006 WIFI_EVENT_DRIVER_SCAN_REQUESTED 0034 WIFI_EVENT_DRIVER_PNO_NETWORK_FOUND 0026 WIFI_EVENT_G_SCAN_STOP 0029 WIFI_EVENT_G_SCAN_BUCKET_STARTED 000e WIFI_EVENT_BEACON_RECEIVED 0104 WIFI_EVENT_NAN_CLUSTER_STARTED 0105 WIFI_EVENT_NAN_CLUSTER_JOINED 0003 WIFI_EVENT_FW_AUTH_STARTED 0032 WIFI_EVENT_DRIVER_PNO_ADD 0017 WIFI_EVENT_DRIVER_EAPOL_FRAME_TRANSMIT_REQUESTED 0101 WIFI_EVENT_NAN_SUBSCRIBE_TERMINATED 0020 WIFI_EVENT_BT_COEX_BT_HID_START 0012 WIFI_EVENT_ROAM_SEARCH_STOPPED 0065 WIFI_EVENT_BLACKOUT_STOP 0000 WIFI_EVENT_ASSOCIATION_REQUESTED 0008 WIFI_EVENT_DRIVER_SCAN_COMPLETE 002f WIFI_EVENT_AUTH_TIMEOUT 002b WIFI_EVENT_G_SCAN_RESULTS_AVAILABLE 0001 WIFI_EVENT_AUTH_COMPLETE 0037 WIFI_EVENT_DRIVER_PNO_SCAN_COMPLETE 0035 WIFI_EVENT_DRIVER_PNO_SCAN_REQUESTED 002d WIFI_EVENT_ROAM_CANDIDATE_FOUND 001c WIFI_EVENT_BT_COEX_BT_SCO_START 0016 WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_STOP 0011 WIFI_EVENT_ROAM_SEARCH_STARTED 000d WIFI_EVENT_ROAM_REQUESTED 0009 WIFI_EVENT_G_SCAN_STARTED 000b WIFI_EVENT_DISASSOCIATION_REQUESTED 0100 WIFI_EVENT_NAN_PUBLISH_TERMINATED 001f WIFI_EVENT_BT_COEX_BT_SCAN_STOP 001d WIFI_EVENT_BT_COEX_BT_SCO_STOP 0028 WIFI_EVENT_G_SCAN_CYCLE_COMPLETED 0031 WIFI_EVENT_MEM_ALLOC_FAILURE 002c WIFI_EVENT_G_SCAN_CAPABILITIES 0024 WIFI_EVENT_ROAM_ASSOC_STARTED 0103 WIFI_EVENT_NAN_ADDRESS_CHANGED 0002 WIFI_EVENT_ASSOC_COMPLETE 0102 WIFI_EVENT_NAN_MATCH_EXPIRED 0033 WIFI_EVENT_DRIVER_PNO_REMOVE 0025 WIFI_EVENT_ROAM_ASSOC_COMPLETE 001b WIFI_EVENT_BLOCK_ACK_NEGOTIATION_COMPLETE 0106 WiFI_EVENT_NAN_TRANSMIT_FOLLOWUP 0036 WIFI_EVENT_DRIVER_PNO_SCAN_RESULT_FOUND 0030 WIFI_EVENT_ASSOC_TIMEOUT 0021 WIFI_EVENT_BT_COEX_BT_HID_STOP 0064 WIFI_EVENT_BLACKOUT_START 000c WIFI_EVENT_RE_ASSOCIATION_REQUESTED 0018 WIFI_EVENT_FW_EAPOL_FRAME_RECEIVED 002e WIFI_EVENT_ROAM_SCAN_CONFIG 0023 WIFI_EVENT_ROAM_AUTH_COMPLETE 001a WIFI_EVENT_DRIVER_EAPOL_FRAME_RECEIVED 0014 WIFI_EVENT_CHANNEL_SWITCH_ANOUNCEMENT 002a WIFI_EVENT_G_SCAN_BUCKET_COMPLETED 0027 WIFI_EVENT_G_SCAN_CYCLE_STARTED 0004 WIFI_EVENT_FW_ASSOC_STARTED 0022 WIFI_EVENT_ROAM_AUTH_STARTED 001e WIFI_EVENT_BT_COEX_BT_SCAN_START
+Purpose Enum 0004 Association_Response 0010 Association_Request 0020 Probe_Request 0002 Probe_Response 0008 Local 0001 Beacon
+Tx_Read_Flags Enum 0002 thermal_cutout 0001 frame_counting 0000 none
+Picoseconds32 Natural32
+Direction Enum 0000 Transmit 0001 Receive
+Decibels Natural16s
+RTT_Bandwidth Enum 0020 160MHz 0010 80MHz 0008 40MHz 0004 20MHz
+RTT_Preamble Enum 0002 HT 0004 VHT 0001 Legacy
+Ranging_Ind_Type Enum 0002 Ingress 0001 Continuous_Indication 0004 Egress
+Report_Mode Enum 0002 End_of_Scan_cycle 0004 Real_Time 0001 Reserved 0008 No_Batch
+Capability_Information Natural16
+Scan_Type Enum 000e Hard_All_Roaming_Scan 0005 P2P_Scan_Social 0001 Initial_Scan 0002 Full_Scan 0003 Scheduled_Scan 000f OBSS_Scan_Internal 000d Hard_Cached_Roaming_Scan 0009 GScan 0011 FTM_Neighbour_Scan 000b Soft_Cached_Roaming_Scan 0006 OBSS_Scan 0010 NAN_Scan 0007 AP_Auto_Channel_Selection 0004 P2P_Scan_Full 000a Measurement_Scan 0012 First_Illegal 000c Soft_All_Roaming_Scan
+ACL_Policy Enum 0001 WhiteList 0000 BlackList
+Rx_Start_Flags Enum 0020 chan_rssi 0000 none 0040 disable_external_lna 0004 beamforming 0010 lp_mode 0008 ack 0001 scan_channel 0002 filtering
+IPv4_Address Natural32
+Reason_Code Enum 8007 Channel_Switch_Failure 0022 QoS_Excessive_Not_Ack 9002 NAN_Service_Terminated_User_Request 8004 Security_Required 9009 NDP_Rejected 0029 Start 0006 Deauthenticated_invalid_class_2_frame 9006 NAN_Transmit_Followup_Success 0019 TDLS_Peer_Unreachable 8003 Synchronisation_Loss 0023 QoS_TXOP_Limit_Exceeded 0010 Deauthenticated_Group_ Handshake_Timeout 9003 NAN_Service_Terminated_Count_Reached 0000 Reserved 0024 QSTA_Leaving 9007 NAN_Transmit_Followup_Failure 0001 Unspecified_Reason 9004 NAN_Service_Terminated_Discovery_Shutdown 000d Deauthenticated_Reason_invalid_IE 0026 Unknown 0011 Deauthenticated_Handshake_Element_Mismatch 8008 Reporting_Aborted_Scanning 9008 NDP_Accepted 0028 Keep_Alive_Failure 0003 Deauthenticated_Leaving 0005 Deauthenticated_no_more_stations 8005 Roaming_failure_link_loss_no_candidate 0025 End 0014 Deauthenticated_Reason_Invalid_RSNE 0020 QoS_Unspecified_Reason 000f Deauthenticated_4_Way_Handshake_Timeout 001a TDLS_Teardown_Unspecified_Reason 0049 Invalid_Pmkid 8006 Hotspot_max_client_reached 9001 NAN_Service_Terminated_Timeout 8009 Reporting_Aborted_Roaming 0017 Deauthenticated_802_1_X_Auth_Failed 0007 Deauthenticated_invalid_class_3_frame 0002 Deauthenticated_Invalid_authentication 0027 Timeout 0031 Deauthenticated_Reason_invalid_PMKID
+RTT_Status Enum 0009 Fail_Invalid_Time_Stamp 0006 Fail_Incorrect_channel 0008 Fail_Measurement_Aborted 0003 Fail_Rejected 0005 Fail_Timeout 000f Fail_FTM_Parameter_Override 000c Fail_Busy_try_later 0002 Fail_No_Response 0007 Fail_FTM_Not_Supported 000b Fail_Burst_Not_Scheduled 000a Fail_No_FTM_Received 0001 Unspecified_failure 000d Fail_Invalid_request 0000 Success 0004 Fail_Not_Scheduled
+Protocol Enum 0002 TCP 0001 UDP
+Transmission_Status Enum 0002 Tx_Lifetime 0005 Unavailable_Key_Mapping 0003 No_BSS 0006 Unspecified_failure 0000 Successful 0004 Excessive_Data_Length 0001 Retry_Limit
+Result_Code Enum 800c Host_Request_Failed 8010 Auth_Timeout 900b NDP_Rejected 9006 NAN_Invalid_Match_ID 9004 Unsupported_Concurrency 8013 Auth_No_Ack 9000 Invalid_TLV_Value 0030 Not_Allowed 900c NDL_Unacceptable 8012 Assoc_Abort 8011 Assoc_Timeout 8006 Insufficient_Resource 800e Invalid_Frequency 800b Host_Request_Success 8100 Auth_Failed_Code 8002 BSS_Already_Started_Or_Joined 8003 Not_Supported 0031 Not_Present 9005 NAN_Invalid_NDP_ID 9008 NAN_Invalid_Availability 900a NAN_Rejected_Security_Policy 9002 NAN_Invalid_Session_ID 9003 NAN_Invalid_Requestor_Instance_ID 9007 NAN_No_OTA_Ack 8200 Assoc_Failed_Code 800f Probe_Timeout 004f Transmission_Failure 900d NDL_Failed_Schedule 800a Invalid_Virtual_Interface_Index 0028 Rejected_Invalid_IE 0000 Success 0026 Invalid_Parameters 8001 Too_Many_Simultaneous_Requests 9009 NAN_Immutable_Unacceptable 9001 NAN_Protocol_Failure 0001 Unspecified_Failure 8014 Assoc_No_Ack 8004 Invalid_State
+int16 Natural16s
+Priority Enum 0006 QoS_UP6 0003 QoS_UP3 0002 QoS_UP2 0005 QoS_UP5 0001 QoS_UP1 0007 QoS_UP7 8000 Contention 0000 QoS_UP0 0004 QoS_UP4
+Category_Mask Natural32
+StatsStop_Bitmap Enum 0040 Stats_Iface_AC 0004 Stats_Radio_Channels 0002 Stats_Radio_CCA 0080 Stats_Iface_Contension 0008 Stats_Radio_Scan 0001 Stats_Radio 0020 Stats_Iface_Txrate 0010 Stats_Iface
+Roaming_Type Enum 0001 NCHO 0000 Legacy
+# Generated From fsm_signals/station_types.xml
+trace_types 23
+Trigger_Type Enum 0001 Type_B 0000 Type_A
+MLME_Frame_Type Enum 0002 Management 0003 All 0001 Data
+RICE_RADIO_STATE_T Enum 0002 rx_only 0001 rx_only_lp 0005 rxtx_ax 0003 rxtx_lp 0005 num_on_states 0004 rxtx 0000 off
+RICE_VIF_MODE_T Enum 0001 operational 0000 scan
+Basf_Status_Type Enum 0002 Teardown 0001 Fail 0003 Timeout 0000 Success
+Halradio_Log_Cap_format_T Enum 0005 num_cap_formats 0004 clipped_8_8 0002 rounding_10_10 0000 full_precision ffff max 0003 rounding_8_8 0001 floating_point
+Scan_Event_Type Enum 0002 active_scan_start 0001 passive_scan_end 0003 active_scan_end 0000 passive_scan_start
+Rice_Calibration_Wlan_Impact_Type Enum 0001 not_allowed 0000 not_affected
+Halradio_Log_Fsel_T Enum 0000 fsel_80 0001 fsel_40 ffff max 0002 fsel_20 0003 num_fsel
+Halradio_Log_Cap_Point_T Enum 0004 tx_dpd_out_iq 0001 tx_dac_q 003e max 0015 mac_phy_radio_debug_0 0011 dpd_tx1_rx2 0013 dpd_tx2_rx2 000f rx_mac 0009 rx_adc 0002 tx_dac_iq 001c capture_cest_stream_6_7 0005 tx_iq_chain_in_msbs 0000 tx_dac_i 0006 tx_iq_chain_in_lsbs 0016 bt_coex_debug 000e rx_ofdm_modem_input 0003 tx_in_iq 000b rx_bba_demap 001b capture_cest_stream_4_5 0019 capture_cest_stream_0_1 001d num_cap_points 0007 tx_mac 000c rx_ofdm_modem_msb_input 000d rx_cck_modem_input 0017 rfic_debug 0012 dpd_tx2_rx1 0008 dpd_tx3_rx2 0010 dpd_tx1_rx1 000a rx_comp_out 0018 mac_phy_radio_debug_1 0014 mac_phy_bb_debug 001a capture_cest_stream_2_3
+VIF_Register_Status_Type Enum 0002 Failed_Low_Resources 0001 Failed 0000 Success
+Triggered_Get_Type Enum 0000 rssi_snr_bound
+BLACKOUT_TYPE Enum 0001 LOCAL_DEVICE_ONLY 0004 QUIET_ELEMENT ffff ANY 0002 P2P
+Halradio_Log_Trig_T Enum 0023 event_match_3 001d max_phy_tx_pulse 001b max_phy_tx_en ffff max 001a max_phy_rx_en 0011 agc_lock 001c max_phy_rx_pulse 000d end_of_buffer 000e stf_sync 0019 plcp_crc_err 0002 noack 0013 end_of_ndp 0024 num_trigs 0017 stf_no_ltf 0009 bad_crc_cck_only 000f rci_sync 0008 ofdm_only 0000 none 0018 capture_timer_expired 0003 int 0005 short 0001 immediate 0020 event_match_0 0012 rx_payload_start 0006 bad_crc 0021 event_match_1 0010 rx_cca 0016 tx_end 000a bad_crc_ofdm_only 0014 rx_end 0004 sync 0022 event_match_2 000c interrupt 001e gpio 0015 tx_start 0007 cck_only 001f first_cest
+Conn_Security_Mode Enum 0000 OPEN 0001 PROTECTED
+Mbulk Natural32
+NAN_Role_Type Enum 0004 Non_Sync 0001 Anchor_Master 0000 Not_Set 0003 Sync 0002 Master
+BLACKOUT_SOURCE Enum 0000 DOT11_LOCAL_TSF 0002 OTHER_RADIO 0004 DOT11_LOCAL_SYSTIME
+BLACKOUT_ID Natural16
+VIF_Schedule_Type Enum 0002 fully_descheduled 0001 deschedule 0000 schedule
+Halradio_Log_Cap_Stream_T Enum 0006 dpd_spatial_stream_0_tx 0004 mimo_stream_1 ffff max 0008 spatial_stream_0_TXRX_DPD 0007 radio_logging_mimo_streams_0_1 0002 rsdb_siso_modem_0 000a num_stream_ids 0003 dpd_spatial_stream_0_rx 0000 single_stream_siso 0009 spatial_stream_1_TXRX_DPD 0001 mimo_stream_0 0005 rsdb_siso_modem_1
+Rice_Calibration_Bt_Impact_Type Enum 0004 not_allowed_and_bt_lo_needed 0003 not_allowed 0002 silence_needed 0000 not_affected 0001 receive_blocked
+VIX_BM_T VIX_BM_TYPE
+VIF_Schedule_Flags Enum 0004 honour_start_time 0080 schedule_exclusively 0002 schedule 20 rx_only 0008 non_operational_trim 0040 schedule_once 0001 clear_frames_after_deschedule 0010 get_scheduled_ind
+trace_types 1
+Boolean Enum 0000 False 0001 True
--- /dev/null
+signalid 541
+1000 MaUnitdata_request
+1002 MaSpare1_request
+1003 MaSpare2_request
+1004 MaSpare3_request
+1005 DataSpareSignal1_request
+1006 DataSpareSignal2_request
+1007 DataSpareSignal3_request
+1100 MaUnitdata_confirm
+1102 MaSpare1_confirm
+1103 MaSpare2_confirm
+1104 MaSpare3_confirm
+1105 DataSpareSignal1_confirm
+1106 DataSpareSignal2_confirm
+1107 DataSpareSignal3_confirm
+1200 MaSpare1_response
+1201 MaSpare2_response
+1202 MaSpare3_response
+1203 DataSpareSignal1_response
+1204 DataSpareSignal2_response
+1205 DataSpareSignal3_response
+1300 MaUnitdata_indication
+1301 MaBlockack_indication
+1302 MaSpare1_indication
+1303 MaSpare2_indication
+1304 MaSpare3_indication
+1305 DataSpareSignal1_indication
+1306 DataSpareSignal2_indication
+1307 DataSpareSignal3_indication
+2001 MlmeGet_request
+2002 MlmeSet_request
+2003 MlmePowermgt_request
+2004 MlmeAddInfoElements_request
+2005 MlmeAddScan_request
+2006 MlmeDelScan_request
+2007 MlmeAddVif_request
+2008 MlmeDelVif_request
+2009 MlmeStart_request
+200a MlmeSetChannel_request
+200b MlmeConnect_request
+200c MlmeReassociate_request
+200d MlmeRoam_request
+200e MlmeDisconnect_request
+200f MlmeRegisterActionFrame_request
+2010 MlmeSendFrame_request
+2011 MlmeResetDwellTime_request
+2012 MlmeSetTrafficParameters_request
+2013 MlmeDelTrafficParameters_request
+2014 MlmeSetPacketFilter_request
+2015 MlmeSetIpAddress_request
+2016 MlmeSetAcl_request
+2018 MlmeSetkeys_request
+201a MlmeGetKeySequence_request
+201c MlmeSetPmk_request
+201f MlmeSetCachedChannels_request
+2020 MlmeSetWhitelistSsid_request
+2021 MlmeTdlsAction_request
+2022 MlmeChannelSwitch_request
+2023 MlmeMonitorRssi_request
+2024 MlmeStartLinkStatistics_request
+2025 MlmeStopLinkStatistics_request
+2027 MlmeSetPnoList_request
+2028 MlmeHostState_request
+2029 MlmeAddRange_request
+202a MlmeDelRange_request
+202b MlmeSetNoa_request
+202c MlmeSetCtwindow_request
+202d MlmeNanStart_request
+202e MlmeNanConfig_request
+202f MlmeNanPublish_request
+2030 MlmeNanSubscribe_request
+2031 MlmeNanFollowup_request
+2032 MlmeUnsetChannel_request
+2033 MlmeSetCountry_request
+2034 MlmeForwardBeacon_request
+2035 MlmeNdpRequest_request
+2036 MlmeNdpResponse_request
+2037 MlmeNdpTerminate_request
+203a MlmeSpare4_request
+203b MlmeSpare5_request
+203c MlmeSpare6_request
+203d MlmeInstallApf_request
+203e MlmeReadApf_request
+203f MlmeSetNumAntennas_request
+2040 MlmeArpDetect_request
+2041 MlmeSetRoamingType_request
+2042 MlmeSetBand_request
+2101 MlmeGet_confirm
+2102 MlmeSet_confirm
+2103 MlmePowermgt_confirm
+2104 MlmeAddInfoElements_confirm
+2105 MlmeAddScan_confirm
+2106 MlmeDelScan_confirm
+2107 MlmeAddVif_confirm
+2108 MlmeDelVif_confirm
+2109 MlmeStart_confirm
+210a MlmeSetChannel_confirm
+210b MlmeConnect_confirm
+210c MlmeReassociate_confirm
+210d MlmeRoam_confirm
+210e MlmeDisconnect_confirm
+210f MlmeRegisterActionFrame_confirm
+2110 MlmeSendFrame_confirm
+2111 MlmeResetDwellTime_confirm
+2112 MlmeSetTrafficParameters_confirm
+2113 MlmeDelTrafficParameters_confirm
+2114 MlmeSetPacketFilter_confirm
+2115 MlmeSetIpAddress_confirm
+2116 MlmeSetAcl_confirm
+2118 MlmeSetkeys_confirm
+211a MlmeGetKeySequence_confirm
+211c MlmeSetPmk_confirm
+211f MlmeSetCachedChannels_confirm
+2120 MlmeSetWhitelistSsid_confirm
+2121 MlmeTdlsAction_confirm
+2122 MlmeChannelSwitch_confirm
+2123 MlmeMonitorRssi_confirm
+2124 MlmeStartLinkStatistics_confirm
+2125 MlmeStopLinkStatistics_confirm
+2127 MlmeSetPnoList_confirm
+2128 MlmeHostState_confirm
+2129 MlmeAddRange_confirm
+212a MlmeDelRange_confirm
+212b MlmeSetNoa_confirm
+212c MlmeSetCtwindow_confirm
+212d MlmeNanStart_confirm
+212e MlmeNanConfig_confirm
+212f MlmeNanPublish_confirm
+2130 MlmeNanSubscribe_confirm
+2131 MlmeNanFollowup_confirm
+2132 MlmeUnsetChannel_confirm
+2133 MlmeSetCountry_confirm
+2134 MlmeForwardBeacon_confirm
+2135 MlmeNdpRequest_confirm
+2136 MlmeNdpResponse_confirm
+2137 MlmeNdpTerminate_confirm
+213a MlmeSpare4_confirm
+213b MlmeSpare5_confirm
+213c MlmeSpare6_confirm
+213d MlmeInstallApf_confirm
+213e MlmeReadApf_confirm
+213f MlmeSetNumAntennas_confirm
+2140 MlmeArpDetect_confirm
+2141 MlmeSetRoamingType_confirm
+2142 MlmeSetBand_confirm
+2200 MlmeConnect_response
+2201 MlmeConnected_response
+2202 MlmeReassociate_response
+2203 MlmeRoamed_response
+2204 MlmeTdlsPeer_response
+2205 MlmeSynchronised_response
+2206 MlmeSpare2_response
+2207 MlmeSpare3_response
+2208 MlmeSpare4_response
+2300 MlmeScan_indication
+2301 MlmeScanDone_indication
+2302 MlmeListenEnd_indication
+2303 MlmeConnect_indication
+2304 MlmeConnected_indication
+2305 MlmeReassociate_indication
+2306 MlmeRoam_indication
+2307 MlmeRoamed_indication
+2308 MlmeDisconnect_indication
+2309 MlmeDisconnected_indication
+230a MlmeProcedureStarted_indication
+230b MlmeMicFailure_indication
+230c MlmeFrameTransmission_indication
+230d MlmeReceivedFrame_indication
+230f MlmeTdlsPeer_indication
+2312 MlmeRssiReport_indication
+2313 MlmeAcPriorityUpdate_indication
+2314 MlmeRange_indication
+2315 MlmeRangeDone_indication
+2316 MlmeEventLog_indication
+2317 MlmeNanEvent_indication
+2318 MlmeNanService_indication
+2319 MlmeNanFollowup_indication
+231a MlmeChannelSwitched_indication
+231b MlmeSynchronised_indication
+231c MlmeBeaconReportingEvent_indication
+231d MlmeSpare3_indication
+231e MlmeSpare4_indication
+231f MlmeNdpRequest_indication
+2320 MlmeNdpRequested_indication
+2321 MlmeNdpResponse_indication
+2322 MlmeNdpTerminate_indication
+2323 MlmeNdpTerminated_indication
+2324 MlmeSpare5_indication
+8000 DebugSpare1_request
+8001 DebugSpare2_request
+8002 DebugSpare3_request
+8003 DebugSpareSignal1_request
+8004 DebugSpareSignal2_request
+8005 DebugSpareSignal3_request
+8100 DebugSpare1_confirm
+8101 DebugSpare2_confirm
+8102 DebugSpare3_confirm
+8103 DebugSpareSignal1_confirm
+8104 DebugSpareSignal2_confirm
+8105 DebugSpareSignal3_confirm
+8200 DebugSpare1_response
+8201 DebugSpare2_response
+8202 DebugSpare3_response
+8203 DebugSpareSignal1_response
+8204 DebugSpareSignal2_response
+8205 DebugSpareSignal3_response
+8301 DebugWord12_indication
+8302 DebugFault_indication
+8303 DebugWords_indication
+8304 DebugSpare2_indication
+8305 DebugSpare3_indication
+8306 DebugSpare4_indication
+8307 DebugSpareSignal1_indication
+8308 DebugSpareSignal2_indication
+8309 DebugSpareSignal3_indication
+9000 TestBlockRequests_request
+9001 TestPanic_request
+9002 TestSuspend_request
+9003 TestResume_request
+9004 RadioLogging_request
+9005 WlanliteCwStart_request
+9006 WlanliteCwStop_request
+9007 WlanliteTxSetParams_request
+9008 WlanliteTxStart_request
+9009 WlanliteTxRead_request
+900a WlanliteTxStop_request
+900b WlanliteRxStart_request
+900c WlanliteRxRead_request
+900d WlanliteRxStop_request
+900e WlanliteStatus_request
+900f TestPmalloc_request
+9010 TestConfigureMonitorMode_request
+9012 TestCheckFwAlive_request
+9013 DebugGeneric_request
+9014 DebugPktSinkStart_request
+9015 DebugPktSinkStop_request
+9016 DebugPktSinkReport_request
+9017 DebugPktGenStart_request
+9018 DebugPktGenStop_request
+9019 DebugPktGenReport_request
+901a WlanliteRadioSelect_request
+901b TestHipTesterStart_request
+901c TestHipTesterStop_request
+901d TestHipTesterSetParams_request
+901e TestHipTesterReport_request
+901f TestBistGetTxGain_request
+9020 TestSpare1_request
+9021 TestSpare2_request
+9022 TestSpare3_request
+9023 TestSpareSignal1_request
+9024 TestSpareSignal2_request
+9025 TestSpareSignal3_request
+9100 RadioLogging_confirm
+9101 WlanliteCwStart_confirm
+9102 WlanliteTxSetParams_confirm
+9103 WlanliteCwStop_confirm
+9104 WlanliteTxStart_confirm
+9105 WlanliteTxRead_confirm
+9106 WlanliteTxStop_confirm
+9107 WlanliteRxStart_confirm
+9108 WlanliteRxRead_confirm
+9109 WlanliteRxStop_confirm
+910a WlanliteStatus_confirm
+910b TestPmalloc_confirm
+910c TestConfigureMonitorMode_confirm
+910e TestCheckFwAlive_confirm
+910f TestSuspend_confirm
+9110 TestResume_confirm
+9111 DebugGeneric_confirm
+9112 WlanliteRadioSelect_confirm
+9113 TestHipTesterStart_confirm
+9114 TestHipTesterStop_confirm
+9115 TestHipTesterSetParams_confirm
+9116 TestBistGetTxGain_confirm
+9117 TestSpare1_confirm
+9118 TestSpare2_confirm
+9119 TestSpare3_confirm
+911a TestSpareSignal1_confirm
+911b TestSpareSignal2_confirm
+911c TestSpareSignal3_confirm
+9200 TestSpare1_response
+9201 TestSpare2_response
+9202 TestSpare3_response
+9203 TestSpareSignal1_response
+9204 TestSpareSignal2_response
+9205 TestSpareSignal3_response
+9300 RadioLogging_indication
+9301 DebugGeneric_indication
+9302 DebugPktSinkReport_indication
+9303 DebugPktGenReport_indication
+9304 TestHipTesterReport_indication
+9305 TestSpare1_indication
+9306 TestSpare2_indication
+9307 TestSpare3_indication
+9308 TestSpareSignal1_indication
+9309 TestSpareSignal2_indication
+930a TestSpareSignal3_indication
+a252 RiceChangeFsmParams_request
+a253 RiceInitialise_request
+a254 RiceInitialise_confirm
+a255 RiceChangeRadioState_request
+a256 RiceChangeRadioState_confirm
+a257 RiceRadioDpdDone_response
+a258 RiceRadioLog_request
+a259 RicePhyEventLog_request
+a25a RiceRadioNudgeNannyTimer_request
+a25b RiceRadioEvaluateNanny_request
+a25c RiceRadioEvaluateNanny_confirm
+a25d RiceReserveRadioForCalibration_indication
+a25e RiceRadioCalibrationDone_indication
+a25f RiceAbortRadioCalibration_request
+a260 RiceReserveRadioForCalibration_response
+a261 RiceNannyTimer_indication
+a262 RiceSwitchOnTimer_indication
+a263 RiceRadioLogTimer_indication
+a264 RiceRadioDeinit_indication
+a302 TxPowerUpdate_indication
+a303 TmeasurementsStartScan_indication
+a304 TmeasurementsStartTableScan_indication
+a305 BurstTriggerTimer_indication
+a306 BurstEndTimer_indication
+a307 IftmRspTimeoutTimer_indication
+a308 FtmRespBurstTrigger_indication
+a309 HostResume_indication
+a30a HostSuspend_indication
+a30b DeauthIn10Sec_indication
+a30c ActiveProcessingTime_indication
+a30d AssistForceActiveTimer_indication
+a30e AssistDhcpTimer_indication
+a30f AssistWaiTimer_indication
+a310 ChannelUtilisation_indication
+a311 OblcStartTimeout_indication
+a312 OblcStopTimeout_indication
+a313 ScanTimeout_indication
+a314 ScanChannelTimeout_indication
+a315 ScanProbeTimeout_indication
+a316 ApChannelSwitchTimeout_indication
+a317 StaChannelSwitchTimeout_indication
+a318 DisconnectTimeout_indication
+a319 RaTimeout_indication
+a31a BasfRxTimeout_indication
+a31b ProcedureTimeout_indication
+a31c SlowApSwitchTimeout_indication
+a31d SendFramePeriodicTimeout_indication
+a31e TdlsDiscoveryRequestWindowTimeout_indication
+a31f TdlsSetupReplyTimeout_indication
+a320 TdlsPeerTrafficResponseTimeout_indication
+a321 TdlsMonitorTimeout_indication
+a322 TdlsKeyLifeTimeout_indication
+a323 TdlsSetupInitiatorDelayTimeout_indication
+a324 SaQueryRetryTimeout_indication
+a325 P2PNoaTimeout_indication
+a326 StaStartupKickTimeout_indication
+a327 NanWarmupTimeout_indication
+a328 SecurityEapolOffloadTimeout_indication
+a329 SecurityEapOffloadTimeout_indication
+a32a OffchannelScheduleTimeout_indication
+a32b VifctrlPrepareBeacon_indication
+a32c InactivityCheckTimeout_indication
+a32d ChannelMapChanged_indication
+a32e Teardown_request
+a32f Teardown_confirm
+a330 Teardown_indication
+a331 BasfResult_indication
+a332 ConmgrAssociationResult_indication
+a333 SecurityEapolOffload_request
+a334 SecurityEapolOffload_confirm
+a335 RoamChangeBss_request
+a336 RoamChangeBss_confirm
+a337 RoamGiveUp_indication
+a338 RoamLinkLoss_indication
+a339 RoamConnectionResumed_indication
+a33a BaAddTx_request
+a33b BaDel_request
+a33c BaResetPeerConfig_request
+a33d RameAddBa_confirm
+a33e RameDelBa_confirm
+a33f BaAddTxResponseFrameTimeout_indication
+a340 BaAddTxRetryTimeout_indication
+a341 ScanChannel_request
+a342 ScanChannelEnd_request
+a343 ScanChannel_indication
+a344 ScanPause_request
+a345 OffchannelCancel_request
+a346 SaQuery_request
+a347 SaQueryResult_indication
+a348 TdlsVifStatus_indication
+a349 TdlsCtrl_indication
+a34a TdlsBaAddTx_indication
+a34b TdlsBaAddRx_indication
+a34c TdlsLinkTerminate_request
+a34d RameTdlsTrafficStatistics_indication
+a34e PeerLost_indication
+a34f SaeRetry_indication
+a350 ChannelSwitch_indication
+a351 BssChannelSwitch_indication
+a352 InternalChannelSwitch_request
+a353 InternalChannelSwitch_confirm
+a354 InternalChannelSwitched_indication
+a355 RameChannelActivity_indication
+a356 RameMmFrame_indication
+a357 RameStaUnknownPeer_indication
+a358 RameVifDeregister_confirm
+a359 RameVifSchedule_indication
+a35a RameVifDeschedule_indication
+a35b RameVifStaOffchannelFinished_indication
+a35c RameTrafficQueue_request
+a35d RameMm_confirm
+a35e DplaneStaPause_confirm
+a35f DplaneStaClear_confirm
+a360 RameGetKey_confirm
+a361 RameConnectionQualityTrigger_indication
+a362 RameFilterMatched_indication
+a363 RameMicFailure_indication
+a364 RameChannelAvoidance_indication
+a365 RameAddNoa_indication
+a366 RameDelNoa_indication
+a367 RameQeAdd_indication
+a368 RameQeDel_indication
+a369 RameEcsaCountFinished_indication
+a36a RameTpuSp_indication
+a36b RameRssiMonitor_indication
+a36c RameBlackoutEnd_indication
+a36d RameBeaconNextWindow_indication
+a36e RameNanDwFinished_indication
+a36f RameCurrentNssChanged_indication
+a402 RameMsgIdleLiteOff_indication
+a403 RameIdleApPrepEnter_indication
+a404 RameIdleApPrepDone_indication
+a405 RameChangeToActive_indication
+a406 RameChangeToWaitingForActive_indication
+a407 RameChangeToStaActive_indication
+a408 RameChangeToStaIdle_indication
+a409 RameChangeToStaIdleRadioOn_indication
+a40a RameStaIdleExit_indication
+a40b RameSchedBlocked_indication
+a40c RameDplaneOff_indication
+a40d RameBtLoAccessGranted_indication
+a422 RameMsgDelba_confirm
+a423 RameMsgRadioOffDplpOff_indication
+a424 RameMsgRadioOnDplpOn_indication
+a425 RameMsgRadioSwitchChannelDplpOff_indication
+a426 RameMsgRxActivityOccurred_indication
+a427 RameMsgDplpVifDelete_confirm
+a428 RameMsgVifCheckClear_indication
+a429 RameMsgVifAnnounceAvailability_indication
+a42a RameMsgPsUpdate_indication
+a42b RameMsgTdlsPeerSp_indication
+a42c RameMsgTdlsPsUpdate_indication
+a42d RameMsgNullAnnounceFrameProcessed_indication
+a42e RameMsgPersistentFrameProcessed_indication
+a42f RameMsgCtsAnnounceFrameProcessed_indication
+a430 RameMsgFrameRx_indication
+a431 RameMsgMm_confirm
+a432 RameMsgPsServTriggered_indication
+a433 RameMsgPsServEnd_indication
+a434 RameMsgSpuriousMorebit_indication
+a435 RameMsgMcastServiceEnd_indication
+a436 RameMsgBeaconTxFinished_indication
+a437 RameMsgNanSdfCallback_confirm
+a438 RameMsgPsPollTxFinished_indication
+a439 RameMsgPeerPsStateUpdate_indication
+a43a RameMsgSendNullFrame_request
+a43b RameMsgBaTxError_indication
+a43c RameMsgPauseResumeDplp_confirm
+a43d RameMsgDpdFrameProcessed_indication
+a43e RameMsgFrameTxFinished_indication
+a43f RameMsgStaKeepaliveTxFinished_indication
+a440 RameMsgRadioReady_indication
+a462 RameMsgDelba_request
+a463 RameMsgMonitorRssi_request
+a464 RameMsgAdjustTxPower_indication
+a465 RameMm_request
+a466 RameConnectStatus_request
+a467 RameSetPowermgt_request
+a468 RameAddBlackout_request
+a469 RameDelBlackout_request
+a46a RameCtwConfig_request
+a46b RameVifDeregister_request
+a46c RameVifFtmRespSetupHw_request
+a46d RameVifSetChannel_request
+a46e RameVifDeschedule_request
+a46f RameDwelltimeReset_request
+a470 RameTdlsEnableTrafficReport_request
+a471 RameHostSuspendResume_indication
+a472 RameStaConnectStart_indication
+a473 RameStaConnectDone_indication
+a474 RameEvent_indication
+a475 RameScreenUpdate_indication
+a476 RameStaCancelFrame_request
+a477 RameVifCancelFrame_request
+a478 RameSetVifPriority_request
+a479 RameVifProtectionConfig_request
+a47a RameVifDesiredAntennaChange_indication
+a47b RameHostUpdateAntennaPref_request
+a47c RameScheduleUpdate_request
+a4a2 RameBeaconTxTime_indication
+a4a3 RameStaIdleTimer_indication
+a4a4 RameTdlsIndWindowTime_indication
+a4a5 RamePsTime_indication
+a4a6 RameFastPsTimeoutCheck_indication
+a4a7 RameActiveAfterMoreBitTime_indication
+a4a8 RamePsDelayTimeoutPoll_indication
+a4a9 RameVifClearCheckTimeout_indication
+a4aa RameRetryPowerSaveCheckTime_indication
+a4ab RameMulticastTimeout_indication
+a4ac RameUsboStateChangeTime_indication
+a4ad RameRadioCalibDelayTimeout_indication
+a4ae RameRadioCalibLoGrantTimeout_indication
+a4af RameDplaneOperationTimeout_indication
+a4b0 RameImlEvalTimeout_indication
+a4b1 RameSssBlackoutTimerExpiry_indication
+a4b2 RameCoexLteBlackoutUpdate_indication
+a4b3 RameNanClearOutsideOfSlotInhibit_indication
+a4b4 RameNanSetOutsideOfSlotInhibit_indication
+a4c2 RameRiceRadioSetupDone_indication
+a4c3 RameRiceRadioCalib_request
+a4c4 RameRiceRadioCalibDone_indication
+a4c5 RameRiceRadioChangeStateDone_confirm
+a4c6 RameRiceRadioChangeStateOffDone_confirm
+a4d2 RameRadioChangeState_request
+a4d3 RameRadioOff_request
+a4d4 RameRadioPerformDpd_request
+a4e2 RameSchdlReschedule_indication
+a4e3 RameSchdlVifCleared_indication
+a4e4 RameSchdlRelinquish_indication
+a4e5 RameSchdlUnforceSchedule_indication
+a4e6 RameSchdlVifDeschedule_request
+a4e7 RameSchdlVifSchedule_request
+a4e8 RameSchdlReqLp_request
+a4e9 RameSchdlReqHp_request
+a4ea RameSchdlEvaluateSchedule_request
+a4eb RameSchdlChangeToActive_indication
+a4ec RameSchdlChangeToWaitingForActive_indication
+a4ed RameSchdlBlockScheduler_request
+a4ee RameSchdlUnblockScheduler_indication
+a4ef RameSchdlStopScheduler_request
+a4f0 RameSchdlStartScheduler_indication
+a4f1 RameSchdlRadiomacSwitchTimeout_indication
+a4f2 RameSchdlRadioSwitchResponse_indication
+a4f3 RameScanEndTimeout_indication
+a4f4 RameSchdlSchdlCanStop_indication
+pid 37
+4000 rice_radio_fsm[0] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4001 rice_radio_fsm[1] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4002 rice_mgr_fsm 0008 not_initialised initialising idle changing_state trimming retrimming dpd nanny
+4003 macrame_radio_ctl[0] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4004 macrame_radio_ctl[1] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4005 macrame_main 0006 Powerup Active ImmWaitingForActive IdleAPWaitingForPrep StaIdle StaIdleRadioOn
+4006 macrame_schdl[0] 0004 Active Blocked Stopped ImmWaitingForActive
+4007 macrame_schdl[1] 0004 Active Blocked Stopped ImmWaitingForActive
+4008 macrame_calibration 0006 Idle Calibrating WaitForSchedulers WaitForDPlanes WaitForDelayTimer WaitForCoex
+4009 mlme_mpdu_router 0001 Idle
+400a mlme_requests 0003 Idle Wait_MLME Host_Suspended
+400b mlme_scan 0003 Idle Scanning End
+400c mlme_scan_channel[0] 0004 Idle WaitForInterface Listening WaitForDeschedule
+400d mlme_scan_channel[1] 0004 Idle WaitForInterface Listening WaitForDeschedule
+400e mlme_ap 0004 Idle TxFrame ClearingSta DisconnectAll
+400f mlme_roaming 0003 Idle Scanning Roaming
+4010 mlme_measurements 0002 Idle PerformMeasurement
+4011 mlme_nan 0002 InitialScan Running
+4012 mlme_ndm 0001 Running
+4013 mlme_ftm 0004 Idle Scanning WaitForFtmInitialResponse PerformingBurst
+4014 mlme_ftm_resp 0004 Listening WaitForBurstTrigger Bursting DeletingVif
+4015 mlme_conmgr[0] 0008 Synchronising Deauthenticating Authenticating HostAuthenticating Associating Connected Detached TearingDown
+4016 mlme_conmgr[1] 0008 Synchronising Deauthenticating Authenticating HostAuthenticating Associating Connected Detached TearingDown
+4017 mlme_basf[0] 0003 WaitForConfirm WaitForFrame WaitForRameCancel
+4018 mlme_basf[1] 0003 WaitForConfirm WaitForFrame WaitForRameCancel
+4019 mlme_vifctrl[0] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401a mlme_vifctrl[1] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401b mlme_vifctrl[2] 000d Idle StationConnecting StationConnectingSoftApChSwitch StationAssociatedSecurity StationConnected StationRoamTeardown StationRoamPending Ap P2POnChannel Nan EndingConnection WaitForDelVif DeletingVif
+401c mlme_ba[0] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401d mlme_ba[1] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401e mlme_ba[2] 0005 Idle SendDelFrame ConfigureDelTxRame SendAddTxFrame WaitAddTxResponseFrame
+401f mlme_sa_query[0] 0001 Idle
+4020 mlme_sa_query[1] 0001 Idle
+4021 mlme_tdls[0] 0003 Idle TxFrame TerminatingLink
+4022 mlme_tdls[1] 0003 Idle TxFrame TerminatingLink
+4023 mlme_security[0] 0002 Idle Eapol
+4024 mlme_security[1] 0002 Idle Eapol
+faultid 596
+2000 DPLANE_RX_PDU_LOST
+2001 DPLANE_RECEIVED_FRAME_FROM_OWN_MAC_ADDR
+2002 DPLANE_ENCPTION_NO_KEY_FOUND
+2003 DPLP_MPDU_LOST
+2004 DPLANE_PROTECTION
+2005 DPLANE_FALLBACK_CREATE_TBL
+2006 DPLANE_MIB
+2007 DPLANE_RX_RESOURCE_LOW
+2008 DPLANE_BLOCK_ACK_REQ_UNKNOWN_STA
+2009 DPLANE_BLOCK_ACK_REQ_NOT_COMPRESSED
+200a DPLANE_BLOCK_ACK_REQ_NO_STREAM
+200b DPLANE_BLOCK_ACK_REQ_STALE_BUNS
+200c DPLANE_BLOCK_ACK_REQ_WRONG_DEST
+200d DPLANE_BLOCK_ACK_RX_NO_MATCH
+200e DPLANE_BLOCK_ACK_MISSING
+200f DPLANE_NO_KEY_FOR_PMF
+2010 DPLANE_BFMEE_UNSUPPORTED_VIF_TYPE
+2011 DPLANE_BFMEE_TOO_MANY_INTERFACES
+2012 DPLANE_BFMEE_UNKNOWN_MODULATION
+2013 DPLANE_BFMEE_UNDERFLOW
+2014 DPLANE_FBMEE_UNKNOWN_MAC_STATUS
+2015 DPLANE_BFMEE_BAD_STATE_TRANSITION
+2016 DPLANE_MM_CONFIRM_ASOC_REQ
+2017 DPLANE_MM_CONFIRM_ASOC_RSP
+2018 DPLANE_MM_CONFIRM_REASOC_REQ
+2019 DPLANE_MM_CONFIRM_REASOC_RSP
+201a DPLANE_MM_CONFIRM_PROBE_REQ
+201b DPLANE_MM_CONFIRM_PROBE_RSP
+201c DPLANE_MM_CONFIRM_MGMT6
+201d DPLANE_MM_CONFIRM_MGMT7
+201e DPLANE_MM_CONFIRM_BEACON
+201f DPLANE_MM_CONFIRM_ATIM
+2020 DPLANE_MM_CONFIRM_DISASOC
+2021 DPLANE_MM_CONFIRM_AUTH
+2022 DPLANE_MM_CONFIRM_DEAUTH
+2023 DPLANE_MM_CONFIRM_ACTION
+2024 DPLANE_MM_CONFIRM_MGMT14
+2025 DPLANE_MM_CONFIRM_MGMT15
+2026 DPLANE_MM_CONFIRM_NOT_MGMT
+2027 DPLANE_UNKNOWN_DUD_REQUEST_TYPE
+2028 DPLANE_MA_PACKET_REQ_WARN
+2029 DPLANE_UNABLE_TO_MALLOC
+202a DPLANE_LINK_ADAPT_PDU_RETRIES_TOO_HIGH
+202b DPLANE_IQ_CAPTURE_TOO_MANY_REQUESTS
+202c DPLANE_FILTER_FWCALLBACK_NO_MEM
+202d DPLANE_PPDU_STATS_DROPPED
+202e DPLANE_REPLAY_NULL_KEY
+202f DPLANE_REPLAY_SUSPECTED_ATTACK
+2030 DPLANE_BEAMFORMER
+2031 DPLANE_BEAMFORMER_INVALID_PEER
+2032 DPLANE_FRAG_SEQ_FOR_PATCH_NOT_FOUND
+2033 DPLANE_FAILED_TO_ALLOCATE_AMSDU_TCM
+2034 DPLANE_BFEE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2035 DPLANE_RX_ACT_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2036 DPLANE_MSG_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2037 DPLANE_RATE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2038 DPLANE_CANCEL_NO_RESP
+2039 DPLANE_FRAME_TX_DPIF_DEST_Q_FULL
+203a DPLANE_FRAME_TX_PPDU_CREATE_FAILED
+203b DPLANE_FRAME_TX_MPDU_LIST_CREATE_FAILED
+203c DPLANE_FRAME_TX_UNSPECIFIED_FAILURE
+203d DPLANE_DEADLINE_STOP_REQUESTED_WITH_ONE_ACTIVE
+203e DPLANE_DEADLINE_CANNOT_CREATE
+203f DPLANE_DEADLINE_TX_TIMED_REQUESTED_WHILE_ONE_ACTIVE
+2040 DPLANE_PROTECTION_5g_11b
+2041 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2042 DPLP_PPDU_ALLOC_FAILED
+2043 DPLANE_LAA_LOWER_SPECULATED_RATE
+2044 DPLP_Q_SLOT_PPDU_STATUS_UNEXPECTED
+2045 FAILED_TO_FORWARD_TO_MACRAME
+2046 DPLANE_DEADLINE_STOP_REQUESTED_IN_PAST
+2047 DPLANE_UNABLE_TO_RESUME_MAC
+2049 DPLANE_BFEE_INVALID_PEER
+2050 DPLANE_BFER_INVALID_PEER
+2051 DPLANE_RX_FTM_FAILURE
+2200 DPHP_DMA_NONRECOVERABLE_TIMEOUT
+2201 DPHP_SLOT_STUCK_LOCKUP
+2202 DPHP_SLOT_CANCEL_LOCKUP
+2300 RAME_RATES
+2301 RAME_INVALID_BO_ID
+2302 RAME_ENCRYPTION_KEY
+2303 RAME_INCOMPATIBLE_REG_DOMAINS
+2304 RAME_INVALID_BA
+2305 RAME_INVALID_BAINFO
+2306 RAME_CHANGE_MODE_PS_TO_FPS
+2307 RAME_INVALID_GO_BEACON_DRIFT_VALUE
+2308 RAME_INVALID_SET_PEER_CHANNEL_REQUEST
+2309 RAME_INVALID_SCHED_REQUEST
+230a RAME_COEX_BLACKOUT_ATTACH_INVALID_VIF
+230b RAME_ENCRYPTION_KEYFIND_FAIL
+230c RAME_SET_QOS_INVALID_STA
+230d RAME_MLME_TX_FRAME_REQUEST_WITH_NULL_MBULK
+230e RAME_STA_DOUBLE_ADD
+230f RAME_SCHDL_UNEXPECTED_RESUME_REQUEST
+2310 RAME_SCHDL_UNEXPECTED_SIGNAL
+2311 RAME_COEX_BLACKOUT_ATTACH_FAILED
+2312 RAME_MLME_FRAME_DISCARDED
+2313 RAME_UNEXPECTED_SIGNAL
+2314 RAME_COEX_IDLE_EXIT_FORCED
+2315 RAME_RADIO_UNEXPECTED_SIGNAL
+2316 RAME_EARLIEST_TOO_LATE
+2317 RAME_USING_FORCED_CHANNEL_BW
+2318 RAME_NO_CCK_MODEM
+2319 RAME_BEACON_TX_SW_DEADLINE_MISSED
+231a RAME_RADIOMAC_SWITCH_FAILED
+231b RAME_RADIOMAC_SWITCH_OFF_FAILED
+231c RAME_IQ_RESOURCE_UNAVAILABLE
+231d RAME_IQ_INVALID_PARAM
+231e RAME_INVALID_ANTENNA_CONFIG
+231f SCHDL_UNEXPECTED_START_IND
+2320 RAME_FTM_INVALID_DFE_CONFIG
+2321 RAME_FTM_INVALID_BANDWIDTH_CONFIG
+2322 RAME_CALIB_UNEXPECTED_SIGNAL
+2323 RAME_SCAN_BLOCKED_BY_NUM_VIFS
+2500 MLME_WIFI_LOGGER_JAMMER_LIKELY_PRESENT
+2501 MLME_WIFI_LOGGER_NO_MEM
+2510 MLME_AP_CONNECTED_RSP_UNEXPECTED
+2511 MLME_AP_DISCARDED_DISCONNECTION_FRAME
+2512 MLME_AP_UNHANDLED_MM_FRAME_IND
+2513 MLME_AP_PMKID_COULD_NOT_BE_COMPUTED
+2514 MLME_AP_PROVIDED_PMKIDS_ARE_INVALID
+2515 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD
+2516 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD_WRONG_STATE
+2517 MLME_AP_SA_QUERY_IND_NO_PEER_RECORD
+2530 MLME_BA_EXTRA_DELETE_CONFIRM
+2531 MLME_BA_TX_RES_POLICY_INVALID
+2532 MLME_BA_NO_PEER_FOUND
+2533 MLME_BA_TX_ADD_NOT_ALLOWED_NAN_TOO_MANY
+2534 MLME_BA_RX_ADD_REJECTED_MIB
+2535 MLME_BA_RX_ADD_REJECTED_RAME
+2536 MLME_BA_RX_ADD_REJECTED_HT
+2537 MLME_BA_RX_SPAREA
+2538 MLME_BA_RX_ADD_INVALID_REQ
+2539 MLME_BA_TX_ADD_NOT_ALLOWED_MIB
+253a MLME_BA_TX_ADD_NOT_ALLOWED_TOO_MANY
+253b MLME_BA_TX_ADD_NOT_ALLOWED_HT
+253c MLME_BA_TX_ADD_INVALID_REQ
+253d MLME_BA_TX_ADD_WITHOUT_PEER
+253e MLME_BA_TX_RES_MACRAME_BLOCKED
+253f MLME_BA_TX_RES_PID_MISMATCH
+2550 MLME_CONMGR_AP_REJECTED_US
+2551 MLME_CONMGR_CONNECTION_ATTEMPT_ABORTED
+2553 MLME_CONMGR_ASSOC_VERIFICATION_FAILED
+2556 MLME_CONMGR_FAILED_TO_SEND_ASSOC
+2559 MLME_CONMGR_MBULK_ALLOC_FAILURE
+255a MLME_CONMGR_TIMEOUT
+255b MLME_CONMGR_TX_OR_TIMEOUT
+2570 MLME_FRAME_BSSID_NOT_INDIVIDUAL
+2571 MLME_FRAME_BUILD_INCR_MBULK_ALLOC_FAILED
+2572 MLME_FRAME_BUILD_INCR_NULL_FRAME
+2573 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_SUBTYPE
+2574 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_TYPE
+2575 MLME_FRAME_DATA_GET_PRI_INVALID_SUBTYPE
+2576 MLME_FRAME_DATA_GET_PRI_INVALID_TYPE
+2577 MLME_FRAME_DATA_PACKET_NULL_PTR
+2578 MLME_FRAME_FAILED_VALIDATION_CODE
+2579 MLME_FRAME_GET_BSSID_UNEXPECTED_DS
+257a MLME_FRAME_GET_DA_UNEXPECTED_DS
+257b MLME_FRAME_GET_SA_UNEXPECTED_DS
+257c MLME_FRAME_HEADER_INVALID_TYPE
+257d MLME_FRAME_ICMP6_CHECKSUM_MALLOC_ERR
+257e MLME_FRAME_MBULK_SIZE_NOT_ENOUGH
+257f MLME_FRAME_RM_RM_REPORT_INVALID_ELEMENTS
+2580 MLME_FRAME_RM_RM_REPORT_NO_MEASUREMENT_REPORT
+2581 MLME_FRAME_TDLS_GET_ACTION_OFFSET_INVALID_SUBTYPE
+2582 MLME_FRAME_TDLS_GET_ELEMENT_OFFSET_INVALID_ACTION
+2583 MLME_FRAME_UNEXPECTED_MGT_FRAME
+2584 MLME_FRAME_ALLOC_FAILED
+2585 MLME_FRAME_CRITICAL_PARAM_IE_LENGTH_ERROR
+2586 MLME_FRAME_NAN_SDF_WITH_NO_PAYLOAD
+25a0 MLME_IE_RSN_INVALID_LENGTH
+25a1 MLME_IE_COUNTRY_INVALID_LENGTH_OUT_OF_RANGE
+25a2 MLME_IE_COUNTRY_INVALID_LENGTH_PADDING
+25a3 MLME_IE_RATE_INVALID_RATE_1
+25a4 MLME_IE_RATE_INVALID_RATE_2
+25a5 MLME_IE_RATE_INVALID_RATE_3
+25a6 MLME_IE_RSN_INVALID_AKM_COUNT
+25a7 MLME_IE_RSN_INVALID_CAPS_LENGTH
+25a8 MLME_IE_RSN_INVALID_PAIRWISE_COUNT
+25a9 MLME_IE_RSN_NO_AKM_SUITE
+25aa MLME_IE_CRITICAL_PARAM_LENGTH_ERROR
+25ab MLME_IE_RSN_INVALID_PMKID_COUNT
+25ac MLME_IE_RSN_INVALID_VERSION
+25ad MLME_IE_RSN_INVALID_PMF_SETTINGS
+25ae MLME_IE_RSN_CORRUPT_AKM_SUITE
+25af MLME_IE_RSN_INVALID_PARWISE_CIPHER_COUNT
+25b1 MLME_IE_RSN_INVALID_GROUP_CIPHER_SIZE
+25b2 MLME_IE_RSN_NO_PAIRWISE_CIPHER_SUITE
+25c0 MLME_MEASUREMENTS_MBULK_ALLOC_FAILURE
+25c1 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_FAIL
+25c2 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_LEAK
+25c3 MLME_MEASUREMENTS_MBULK_RM_BEACON_REQUEST_LEAK
+25c4 MLME_MEASUREMENTS_MBULK_RM_LM_REPORT_FAIL
+25c5 MLME_MEASUREMENTS_MBULK_SCAN_IES_ALLOC_FAIL
+25d0 MLME_MPDU_ROUTER_INVALID_FRAME_DISCARDED
+25d1 MLME_MPDU_ROUTER_REGISTER_INVALID_NO_BUFFER_MEMORY
+25e0 MLME_NAN_CONFIG_TLV_DOES_NOT_EXIST
+25e1 MLME_NAN_INVALID_MAC_ADDR_RANDOMISATION_INTERVAL
+25e2 MLME_NAN_INVALID_MASTER_PREFERENCE_VALUE
+25e3 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_2
+25e4 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_1
+25e5 MLME_NAN_MBULK_SCAN_IES_ALLOC_FAIL
+25e6 MLME_NAN_PUBLISH_NODE_ALLOC_FAILURE
+25e7 MLME_NAN_INVALID_SERVICE_DESCRIPTOR
+25e8 MLME_NAN_MATCH_NODE_ALLOC_FAILURE
+25e9 MLME_NAN_INVALID_BAND_CONFIG
+25ea MLME_NAN_UNEXPECTED_AMR_UPDATE_FLAGS
+2600 MLME_REGULATORY_20_MHZ_CHANNEL_WIDTH_NOT_FOUND
+2601 MLME_REGULATORY_BAD_CHANNEL_CENTRE_FREQUENCY
+2602 MLME_REGULATORY_COUNTRY_NOT_FOUND_USE_WORLD
+2603 MLME_REGULATORY_DEFAULT_CASE_SHOULD_NOT_HAPPEN
+2604 MLME_REGULATORY_FAILED_TO_MATCH_COUNTRY_CODE_FOR_EVALUATED_IDX
+2605 MLME_REGULATORY_SET_COUNTRY_REQ_IS_INVALID_USE_WORLD
+2607 MLME_REGULATORY_OPERATING_CLASS_TABLE_READ_FAILURE
+2608 MLME_REGULATORY_NO_MEM
+2610 MLME_REQUESTS_VIF_INCOMPATIBLE_FOR_SINGAL
+2611 MLME_REQUESTS_MIB_MBULK_GET_CFM_ALLOC_FAIL
+2612 MLME_REQUESTS_MIB_MBULK_SET_CFM_ALLOC_FAIL
+2613 MLME_REQUESTS_MISSING_MANDATORY_MBULK
+2614 MLME_REQUESTS_NO_DESTINATION_FOR_VIF_IN_SIGNAL
+2615 MLME_REQUESTS_SPURIOUS_MBULK_IN_SIGNAL
+2620 MLME_ROAMING_MBULK_SCAN_IES_ALLOC_FAIL
+2621 MLME_ROAMING_MBULK_CANDIDATE_ALLOC_FAIL
+2630 MLME_SA_QUERY_NO_PEER_RECORD
+2631 MLME_SA_QUERY_NO_BUFFER_IN_FRAME_INDICATION
+2642 MLME_SCAN_DESC_LIST_AP_THRESHOLD_DIFFERS
+2643 MLME_SCAN_DESC_LIST_IE_INVALID_LENGTH
+2644 MLME_SCAN_DESC_LIST_RSSI_THRESHOLD_INVALID
+2648 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_SPS
+264e MLME_SCAN_ERROR_IN_GET_NEXT_CHANNEL
+264f MLME_SCAN_SPAREB
+2655 MLME_SCAN_IGNORING_SCHED_IND
+2656 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_LISTS
+2658 MLME_SCAN_MORE_THAN_ONE_PRIORITY_PAUSE
+2659 MLME_SCAN_NO_CHANNELS_SCANNED
+265a MLME_SCAN_NO_MEDIUM_ENABLED_TEST_USE_ONLY_1
+265b MLME_SCAN_NO_MEMORY_FOR_SCAN_FRAME_DETAILS
+265c MLME_SCAN_ADD_INVALID_NO_CHANNELS
+265d MLME_SCAN_NO_MEM_FOR_LOST_AP_DATA_REF
+265e MLME_SCAN_NO_MEM_FOR_SIGNIFICANT_CHANGE_DATA_REF
+265f MLME_SCAN_NO_MEDIUM_TEST_MODE
+2660 MLME_SCAN_SPAREC
+2661 MLME_SCAN_UNPAUSE_WHEN_NOT_PAUSED
+2662 MLME_SCAN_UNSUPPORTED_CHANNEL
+2664 MLME_SCAN_VERIFICATION_DEVICE_ADDRESS_INVALID
+2665 MLME_SCAN_VERIFICATION_DUPLICATED_WILDCARD_SSID
+2666 MLME_SCAN_VERIFICATION_SCAN_ID_INVALID
+2667 MLME_SCAN_VERIFICATION_IES_TOO_LONG
+2668 MLME_SCAN_VERIFICATION_IE_BUFFER_CORRUPT
+266a MLME_SCAN_VERIFICATION_IE_MISSING_BSSID_IE
+266b MLME_SCAN_VERIFICATION_IE_NOT_RECOGNISED
+266c MLME_SCAN_VERIFICATION_IE_NO_CHANNEL_OR_BSSID_LIST
+266d MLME_SCAN_VERIFICATION_IE_NO_SCAN_TIMING
+266e MLME_SCAN_VERIFICATION_IE_TO_SMALL
+2670 MLME_SCAN_VERIFICATION_INVALID_CHANNEL_COUNT
+2671 MLME_SCAN_VERIFICATION_INVALID_POLICY
+2672 MLME_SCAN_VERIFICATION_INVALID_POLICY_1
+2673 MLME_SCAN_VERIFICATION_INVALID_POLICY_2
+2674 MLME_SCAN_VERIFICATION_INVALID_REPORT_BITMAP
+2675 MLME_SCAN_VERIFICATION_INVALID_SCAN_TYPE
+2676 MLME_SCAN_VERIFICATION_MULTIPLE_CHANNEL_LISTS
+2677 MLME_SCAN_VERIFICATION_NEIGHBOUR_DL_IE_INVALID
+2678 MLME_SCAN_VERIFICATION_SSID_FILTER_IE_INVALID_LENGTH
+2679 MLME_SCAN_VERIFICATION_SSID_IE_INVALID_LENGTH
+267a MLME_SCAN_VERIFICATION_TIMING_IE_INVALID
+267b MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_1
+267c MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_2
+267d MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_3
+267e MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_4
+267f MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_5
+2680 MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_6
+2681 MLME_SCAN_VERIFICATION_NCHO_SCAN
+2682 MLME_SCAN_DISABLED_IN_SPS
+2683 MLME_SCAN_CALLBACK_INVALID
+2684 MLME_SCAN_VERIFICATION_SSID_DESCRIPTOR_INVALID_LENGTH
+26a0 MLME_SECURITY_EAPOL_NO_PEER_FOUND
+26a1 MLME_SECURITY_EAPOL_UNEXPECTED_SECURITY_SUITE
+26a2 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK
+26a3 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_LEN
+26a4 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_1
+26a5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_LEN
+26a6 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_UNWRAP_FAILURE
+26a7 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R0KHID
+26a8 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R1KH_ID
+26a9 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_1
+26aa MLME_SECURITY_FT_AUTH_VALIDATION_MDE_BAD_MDID
+26ab MLME_SECURITY_FT_AUTH_VALIDATION_MIC_CMP_FAILURE
+26ac MLME_SECURITY_FT_AUTH_VALIDATION_NO_FTE
+26ad MLME_SECURITY_FT_AUTH_VALIDATION_NO_MDE
+26ae MLME_SECURITY_FT_AUTH_VALIDATION_NO_RSN
+26b0 MLME_SECURITY_MBULK_ALLOC_FAILURE
+26b1 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_1
+26b2 MLME_SECURITY_NO_MEM_FOR_ANONCE
+26b3 MLME_SECURITY_WRONG_EAPOL_TYPE
+26b4 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_2
+26b5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_2
+26b6 MLME_SECURITY_FT_UNKNOWN_MIC_LEN
+26b7 MLME_SECURITY_M3_PROCESSING_FAILURE
+26bf MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_2
+26d0 MLME_TDLS_SPAREA
+26d1 MLME_TDLS_DISCOVERY_REQUEST_LINKID_INVALID
+26d2 MLME_TDLS_DISCOVERY_REQUEST_NOT_ALLOWED
+26d3 MLME_TDLS_DISCOVERY_RESPONSE_DIALOG_TOKEN_INVALID
+26d4 MLME_TDLS_DISCOVERY_RESPONSE_LINKID_INVALID
+26d5 MLME_TDLS_DISCOVERY_RESPONSE_UNEXPECTED
+26d6 MLME_TDLS_IS_NOT_ACTIVATED
+26d7 MLME_TDLS_LINK_IS_NOT_ESTABLISHED
+26d8 MLME_TDLS_LINK_IS_NULL
+26d9 MLME_TDLS_NO_FREE_SLOT
+26da MLME_TDLS_PEER_NOT_FOUND_1
+26db MLME_TDLS_PEER_NOT_FOUND_2
+26dc MLME_TDLS_RAME_CFM_PEER_NOT_FOUND
+26dd MLME_TDLS_SETUP_CONFIRM_DIALOG_INVALID
+26de MLME_TDLS_SETUP_CONFIRM_LINKID_INVALID
+26df MLME_TDLS_SETUP_CONFIRM_REJECTED
+26e0 MLME_TDLS_SETUP_CONFIRM_TPK_INVALID
+26e1 MLME_TDLS_SETUP_CONFIRM_WRONG_STATE
+26e2 MLME_TDLS_SETUP_REQUEST_DISCARDED_CONFIRM
+26e3 MLME_TDLS_SETUP_REQUEST_MAX_LINKS
+26e4 MLME_TDLS_SETUP_REQUEST_SETUP_IN_PROGRESS
+26e5 MLME_TDLS_SETUP_RESPONSE_INVALID
+26e6 MLME_TDLS_SETUP_RESPONSE_SECURITY_INVALID
+26e7 MLME_TDLS_SETUP_RESPONSE_WRONG_STATE
+26e8 MLME_TDLS_UNKNOWN_ACTION_TYPE
+26ea MLME_TDLS_TERMINATE_ADDRESS_UNKNOWN
+2700 RADIO_WL_RX_COMP
+2701 RADIO_RX_DCOC_TIMEOUT
+2702 RADIO_DPD_GAIN_ALIGN_PATH_ZERO
+2703 RADIO_BAD_BB_SAMPLE_OFFSET_SHORT_GI
+2704 RADIO_RECALIBRATE
+2705 RADIO_UNKNOWN_PLATFORM
+2707 RADIO_UNSUPPORTED_PLATFORM_FEATURE
+2708 RADIO_PAPR_CONFIG
+2709 RADIO_INVALID_MODULATION_TYPE
+270a RADIO_LOGGER_HW_FAIL
+270b RADIO_SIGNANAL_TOO_MANY_SAMPLES_READ
+270c RADIO_INVALID_RADIO_IDENTIFIER
+270d RADIO_VCO_LOCK_FAILED
+270e RADIO_ADC_CONVERT
+270f RADIO_DPD_LOOPBACK_SIGNAL_SUSPECT
+2710 RADIO_INVALID_FIR_COEFFICIENT
+2711 RADIO_INCOMPATIBLE_REG_DOMAINS
+2712 RADIO_RICE_FREQ_OUTSIDE_KNOWN_BANDS
+2713 RADIO_RICE_PACKET_WHEN_MODEM_DISCONNECTED
+2714 RADIO_RICE_FREQUENCY_OFFSET_TOO_BIG
+2715 RADIO_SETUP_FAILED
+2716 RADIO_ESTIMATES
+2717 RADIO_INVALID_RSSI
+2718 RADIO_POWER_OVERRIDDEN
+2719 RADIO_DPD_LOOPBACK_FIR_GAIN
+271a RADIO_SPIKE_REMOVED_FROM_DPD_LUT
+271b RADIO_SIGNAL_ANALYSER_16_BIT_OVERFLOW
+271c RADIO_IQ_CAPTURE_FREE_RAMSW_INFO
+271d RADIO_DPD_SUSPECT_LUT
+271e RADIO_SA_ZERO_AS_DIVISOR
+271f RADIO_DPD_BAD_LUT_QUALITY
+2720 RADIO_LOGGER_BAD_CAPTURE
+2721 RADIO_RUN_OUT_TRIM_TIME_DPD
+2722 RADIO_XDMAC_MEMCPY_FAIL
+2723 RADIO_RX_AAB_FTRIM
+2724 RADIO_WBRSSI_FAILED
+2725 RADIO_TX_POWER_DIGITAL_SERVO
+2726 RADIO_VALUE_BELOW_MIN_SETTING
+2727 RADIO_VALUE_ABOVE_MAX_SETTING
+2728 RADIO_NO_SUITABLE_SETTING
+2729 RADIO_TX_POWER_DIGITAL_LIMIT
+272a RADIO_BAD_POWER_TABLE_CONFIG
+272b RADIO_BAD_TX_SETTINGS
+272c RADIO_BAD_ANTENNA_GAIN_SETTINGS
+272d RADIO_BAD_IREF_TRIM
+272e RADIO_AGC_SETTING_OUT_OF_RANGE
+272f RADIO_DPD_LOOPBACK_ABB_GAIN
+2730 RADIO_DPD_CALC_LOOPBACK_BROKEN_RX
+2731 RADIO_CHIP_DOES_NOT_SUPPORT_RX_IQ_CONFIG
+2732 RADIO_RX_IQ_TRIM_RADIO_ISSUE
+2733 RADIO_RX_IQ_TRIM_NUMERIC_ISSUE
+2734 RADIO_DPD_LOOPBACK_RESTART_ALIGN
+2735 RADIO_INADEQUATE_TRIM_TIME
+2736 RADIO_CHAN_RSSI_MEASUREMENT_ERROR
+2737 RADIO_DPD_CALC_LOOPBACK_CORRELATION
+2738 RADIO_INADEQUATE_TRIM_RANGE
+2739 RADIO_BAD_RSSI_PDOLLOP_RSSI_LIN_IS_ZERO
+273a RADIO_LARGE_RX_DCOC_OFFSET_TRIM_VALUE
+273b RADIO_DPD_IQ_CAPTURE_FAILURE
+273c RADIO_INDICATE_FW_SIGANAL_USAGE
+273d RADIO_RX_DCOC_RF_AGC_MAX_GAINS_TIMEOUT
+273e RADIO_RX_DCOC_RF_MAXIMUM_RETRIES
+273f RADIO_TX_POWER_PRE_GAIN_TOO_LOW
+2740 RADIO_TX_POWER_TRIM_FAILED
+2741 RADIO_IQ_TRIM_NOT_CONVERGING
+2742 RADIO_BAD_CONFIG_FOR_FLEXIMAC_POWER_TRIM
+2743 RADIO_INVALID_RSSI_ADJUSTMENTS
+2744 RADIO_INVALID_FEC_CONFIG
+2745 RADIO_TRIM_PASS_EXCEEDED_SCO_LIMIT
+2746 RADIO_SIG_AN_LOCKED_UP
+2747 RADIO_PA_SAT_READING_LOW
+2748 RADIO_PHY_FLEXIMAC_ST_TOO_LONG
+2749 RADIO_INVALID_PER_CH_TRIM_ITERATION
+274a RADIO_BAD_TX_IQ_DIFFERENTIAL_DELAY
+274b RADIO_UNEXPECTED_FLEXIMAC_STATE
+274c RADIO_EXCESS_RX_IQ_COMP_MEAS_VARIATION
+274d RADIO_TX_PARAMETER_OUT_OF_RANGE
+2800 TEST_WLANLITE_AMPDU_TOO_LONG
+2801 TEST_WLANLITE_INVALID_RATE
+2802 TEST_WLANLITE_MAC_BAND_MAPPING_NOT_UNIQUE
+2803 TEST_WLANLITE_BEAMFORMER
+2804 TEST_WLANLITE_INVALID_BANDWIDTH
+2805 TEST_WLANLITE_CHANNEL_RSSI_MEASUREMENT_FAILED
+2806 BIST_LOW_LOOPBACK_GAIN
+2807 BIST_BROKEN_LOOPBACK
+2808 TEST_MICRAME_TX_BAD_PPDU_STATE
+2809 RADIO_RX_IQ_TRIM_FAILED_AFTER_RETRIES
+2900 COEX_DEBUG_OVERRIDE_BT_ENABLED
+2901 COEX_INIT_FAILED
+2902 COEX_WRONG_IMPOSED_MIN_RATE
+2903 COEX_MAC_CREATE_BLACKOUT_FAILED
+2904 COEX_VIF_UPDATE_TIMING
+2905 COEX_VIF_TIMING_BAD_NOA_OFFSET
+2906 COEX_MODEM_CC_BAND_UNKNOWN
+2907 COEX_MODEM_CDMA_BAND_UNKNOWN
+2a00 COMMON_FSM_LEAKY_SIGNAL_DISCARDED
+2a01 COMMON_FSM_ERROR_PROCESSING_SIGNAL
+2a02 COMMON_FSM_UNEXPECTED_TERMINATED_FSM
+2a10 COMMON_MIB_WRITE
+2a11 COMMON_MIB_READ
+2a12 COMMON_MIB_REQ_VAL_ABSENT
+2a13 COMMON_MIB_TYPE_CLASH
+2a14 COMMON_MIB_RAM_CORRUPT
+2a15 COMMON_MIB_DUFF_INDEX_COUNT
+2a16 COMMON_MIB_ROM_CORRUPT
+2a17 COMMON_MIB_INVALID_INDEX
+2a18 COMMON_MIB_LIMIT
+2a19 COMMON_MIB_RAM_REC_CORRUPT
+2a1a COMMON_MIB_ASSERT_FAIL
+2a1b COMMON_MIB_TAB_INDEX
+2a1c COMMON_MIB_READ_WARNING
+2a1d COMMON_MIB_WRITE_WARNING
+2a1e COMMON_MIB_NON_EXISTENT_VIF_INDEX
+2a30 COMMON_STA_DATA_CREATE_RECORD
+2a31 COMMON_STA_DATA_CREATE_RECORD_INIT_CALLS_DELAYED
+2a40 COMMON_RATE_BAD_RATE_TX
+2a50 COMMON_DORM_INVALID_ENTITY
+2a60 COMMON_DEBUG_INIT
+2a70 COMMON_HIP_BAD_SIGNAL_PROCESS_ID
+2a80 COMMON_HOSTIO_KICK_UNMASK_TO_HOST_INT
+2a81 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a90 COMMON_VLDATA_TOO_BIG
+2a91 COMMON_VLDATA_WRONG_FORMAT
+2a92 COMMON_VLDATA_NEGATIVE_UNSIGNED_VALUE
+2a93 COMMON_VLDATA_OVERFLOW
+2a94 COMMON_VIF_WRONG_TYPE
+2aa0 COMMON_FAULT_INIT
+2ab0 COMMON_PANIC_SUBSYSTEM_LEVEL
+2c00 MLME_VIFCTRL_ACTIVE_PROCESSING_TIME_NOT_RECEIVED
+2c01 MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_AUTH_TYPE
+2c02 MLME_VIFCTRL_ARP_EXTRACT_ARP_INFO_INVALID_ETH_TYPE
+2c03 MLME_VIFCTRL_ARP_EXTRACT_NDP_INFO_INVALID_ETH_TYPE
+2c04 MLME_VIFCTRL_ARP_OFFLOAD_INVALID_ARP_FRAME
+2c05 MLME_VIFCTRL_ARP_OFFLOAD_IP4_ADDR_UNSET
+2c06 MLME_VIFCTRL_BAD_BEACON_1
+2c07 MLME_VIFCTRL_CHANNEL_SWITCH_REQ_CHANNEL_VALIDATION_FAILED
+2c08 MLME_VIFCTRL_PEER_NOT_FOUND_2
+2c09 MLME_VIFCTRL_CONNECT_REQ_INFO_BSSID_IS_GROUP_ADDRESS
+2c0a MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_CHANNEL_CONFIG
+2c0b MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_RSN_IE
+2c0c MLME_VIFCTRL_CONNECT_REQ_INFO_NO_SSID_IE
+2c0d MLME_VIFCTRL_CONNECT_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c0e MLME_VIFCTRL_ECSA_IS_NOT_STARTED
+2c0f MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_HOST_PID
+2c10 MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_TAG
+2c11 MLME_VIFCTRL_FRAME_BAD_TAG_INDEX
+2c12 MLME_VIFCTRL_INVALID_PMF
+2c13 MLME_VIFCTRL_KEEPALIVE_IP4_ADDR_UNSET
+2c14 MLME_VIFCTRL_BAD_BEACON_2
+2c15 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED
+2c16 MLME_VIFCTRL_NAN_START_REQ_INFO_INVALID_TLV
+2c18 MLME_VIFCTRL_NAN_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c19 MLME_VIFCTRL_NDP_OFFLOAD_INVALID_ICMP6_FRAME
+2c1a MLME_VIFCTRL_NDP_OFFLOAD_INVALID_NDP_NS_FRAME
+2c1b MLME_VIFCTRL_NOA_SCHEDULE_INCOMPLETE
+2c1c MLME_VIFCTRL_NOA_SCHEDULE_INVALID
+2c1d MLME_VIFCTRL_NO_MEM_FOR_WMM
+2c1f MLME_VIFCTRL_NO_VALID_RATES_INTERSECTION
+2c20 MLME_VIFCTRL_OBSS_CANT_ALLOC_SCAN_IES
+2c21 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_INVALID
+2c22 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_DFS_OR_NOR_IR
+2c23 MLME_VIFCTRL_OFFCHANNEL_SPARE
+2c24 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_PARAMETERS
+2c25 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_VIF
+2c26 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_TOO_MANY_SIMULTANEOUS_REQUESTS
+2c27 MLME_VIFCTRL_OLBC_DURATION_TIMEOUT_INVALID
+2c28 MLME_VIFCTRL_UNKNOWN_AP
+2c29 MLME_VIFCTRL_PEER_NOT_FOUND_1
+2c2a MLME_VIFCTRL_PEER_NOT_FOUND_3
+2c2b MLME_VIFCTRL_PEER_NOT_FOUND_4
+2c2c MLME_VIFCTRL_PEER_NOT_FOUND_5
+2c2d MLME_VIFCTRL_PEER_NOT_FOUND_6
+2c2e MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_BLACKOUT_LIST_FULL
+2c2f MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_1
+2c30 MLME_VIFCTRL_RAME_DEL_NOA_IND_FAILED_TO_MATCH
+2c32 MLME_VIFCTRL_RA_PKT_VALIDATION_FAILED
+2c33 MLME_VIFCTRL_SECURITY
+2c34 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_CHANNEL
+2c35 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_COUNT
+2c36 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_DURATION
+2c37 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_INTERVAL
+2c38 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_P2P_IE
+2c39 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_WSC_IE
+2c3b MLME_VIFCTRL_SET_CHANNEL_FAILURE_REGULATORY
+2c3c MLME_VIFCTRL_SET_IP_ADDR_INVALID_VERSION
+2c3e MLME_VIFCTRL_START_REQ_INFO_COUNTRY_MISMATCH
+2c3f MLME_VIFCTRL_START_REQ_INFO_INVALID_AUTH_TYPE
+2c40 MLME_VIFCTRL_START_REQ_INFO_INVALID_BEACON_PERIOD
+2c41 MLME_VIFCTRL_START_REQ_INFO_INVALID_BSSID
+2c42 MLME_VIFCTRL_START_REQ_INFO_INVALID_CHANNEL
+2c43 MLME_VIFCTRL_START_REQ_NO_VALID_CHANNEL_IS_FOUND
+2c45 MLME_VIFCTRL_START_REQ_INFO_INVALID_DTIM_PERIOD
+2c46 MLME_VIFCTRL_START_REQ_INFO_INVALID_IE_LIST
+2c48 MLME_VIFCTRL_START_REQ_INFO_MULTIPLE_SECURITY_IES
+2c49 MLME_VIFCTRL_START_REQ_INFO_NO_RATES_IE
+2c4a MLME_VIFCTRL_START_REQ_INFO_NO_SSID_IE
+2c4b MLME_VIFCTRL_START_REQ_INFO_P2P_NO_PROBE_RSP_IES
+2c4c MLME_VIFCTRL_START_REQ_INFO_VENDOR_IE_PRESENT
+2c4d MLME_VIFCTRL_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c4e MLME_VIFCTRL_START_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c4f MLME_VIFCTRL_STATION_INACTIVITY_PEER_NOT_FOUND
+2c50 MLME_VIFCTRL_TOO_MANY_QUIET_ELEMENTS
+2c51 MLME_VIFCTRL_SPAREB
+2c52 MLME_VIFCTRL_UNABLE_TO_USE_CHAN_FROM_BEACON
+2c53 MLME_VIFCTRL_UNEXPECTED_IP_VER
+2c54 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_1
+2c55 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_2
+2c56 MLME_VIFCTRL_WIFISHARING_INVALID_CHANNEL
+2c57 MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_2
+2c58 MLME_VIFCTRL_CHANNEL_SWITCH_BAD_CHANNEL
+2c59 MLME_VIFCTRL_CHANNEL_SWITCH_WIFISHARING_NOT_ALLOWED
+2c5a MLME_VIFCTRL_UNEXPECTED_QE_DEL_REQ
+2c60 MLME_VIFCTRL_AP_NO_CHANNEL_FOUND
+2c61 MLME_VIFCTRL_STA_CHANNEL_NOT_FOUND
+2c62 MLME_VIFCTRL_EDCA_OVERRIDE_FAILED
+2c63 MLME_VIFCTRL_READ_APF_MBULK_ALLOC_FAIL
+2c70 MLME_CHANNELISATION_LTE_COEX_NO_CHANNEL_FOUND
+2c71 MLME_MBULK_NOT_ENOUGH_HEADROOM
+2c72 MLME_STATION_RECORD_DOES_NOT_EXIST
+2c73 MLME_UTILS_FORCE_ACTIVE_IDEMPOTENT_FALSE
+2c74 MLME_UTILS_FORCE_ACTIVE_OUT_OF_RANGE
+2c75 MLME_UTILS_NON_STATION_POWERMGT
+2c76 MLME_INVALID_SIGNAL_DISCARDED
+2c77 MLME_UTILS_MBULK_CLONE_OUT_OF_MEM
+2c90 MLME_TXPOWER
+2c91 MLME_TXPOWER_SAR_INIT
+2c92 MLME_TXPOWER_NO_CELL_INIT
+2c93 MLME_TXPOWER_NO_CELL_INIT_INCLUDED_CHANNELS
+2c94 MLME_TXPOWER_POWER_CAP_BELOW_MIN
+2c95 MLME_TXPOWER_11AC_TPC_NO_ENV_WITH_RM
+2ca0 MLME_FTM_CREATE_RESPONDER_ENTRY
+2ca1 MLME_FTM_INVALID_PARAMETERS
+2ca2 MLME_FTM_INVALID_RANGE_REQ
+2ca3 MLME_FTM_MBULK_SCAN_IES_ALLOC_FAIL
+2ca4 MLME_FTM_SCAN_UNKNOWN_RESPONDER
+2ca5 MLME_FTM_SCAN_NO_RESPONDER_FOUND
+2ca6 MLME_FTM_DEL_UNKNOWN_RESPONDER
+2ca7 MLME_FTM_CREATE_RTT_RECORD
+2ca8 MLME_FTM_RTT_CONF_NO_RESPONDERS
+2ca9 MLME_FTM_RTT_CONF_TOO_MANY_RESPONDERS
+2caa MLME_FTM_RTT_CONF_DUPLICATE_PEER
+2cab MLME_FTM_RTT_CONF_BURST_PERIODS_CONFLICT
+2cac MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_SHORT
+2cad MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_LONG
+2cae MLME_FTM_RTT_CONF_INVALID_RTT_TYPE
+2caf MLME_FTM_RTT_CONF_INVALID_CHANNEL_FREQ
+2cb0 MLME_FTM_RTT_CONF_INVALID_BURST_PERIOD
+2cb1 MLME_FTM_RTT_CONF_INVALID_BURSTS_EXPONENT
+2cb2 MLME_FTM_RTT_CONF_INVALID_FRAMES_PER_BURST
+2cb3 MLME_FTM_RTT_CONF_INVALID_BURST_DURATION
+2cb4 MLME_FTM_RTT_CONF_TOO_MANY_FRAMES_IN_BURST
+2cb5 MLME_FTM_PARAMETER_OVERRIDE_BURST_EXPONENT
+2cb6 MLME_FTM_PARAMETER_OVERRIDE_BURST_DURATION
+2cb7 MLME_FTM_PARAMETER_OVERRIDE_BURST_MIN_DELTA
+2cb8 MLME_FTM_PARAMETER_OVERRIDE_ASAP_MDOE
+2cb9 MLME_FTM_PARAMETER_OVERRIDE_FTM_PER_BURST
+2cba MLME_FTM_PARAMETER_OVERRIDE_BANDWIDTH
+2cbb MLME_FTM_PARAMETER_OVERRIDE_INTERVAL
+2cbc MLME_FTM_REQUEST_VALIDATION_DISABLED
+2cbd MLME_FTM_RESPONSE_VALIDATION_DISABLED
+2cbe MLME_FTM_CREATE_RTT_RECORD_DUPLICATED
+2cbf MLME_FTM_RTT_RECORD_NOT_FOUND
+2cc0 MLME_FTM_BURST_PARAMETERS_NOT_EXIST
+2cc1 MLME_FTM_PARAMETER_OVERRIDE_START_TIME
+2cc2 MLME_FTM_RTT_CONF_INVALID_BURST_INTERVAL
+2cc3 MLME_FTM_RTT_MEASUREMENT_UNSUCCESSFUL
+2cc4 MLME_FTM_RTT_T3_T2_INVALID
+2cc5 MLME_FTM_RTT_T4_T1_INVALID
+2cc6 MLME_FTM_RTT_T4_T1_IS_LESS_THAN_T3_T2
+2cd0 MLME_NDM_UNEXPECTED_FRAME
+2ce0 MLME_NAM_NDC_SCHEDULE_NOT_POSSIBLE
+panicid 722
+2000 DPLP_FRAG_GENERIC
+2001 DPLP_FRAG_WRONG_LEN
+2002 DPLP_FRAG_FREE_DU
+2003 DPLP_FRAG_IS_LAST_FRAME_FRAG
+2004 DPLP_FRAG_IS_INCONSISTENT
+2010 DPLP_FALLBACK_GENERIC
+2011 DPLP_FALLBACK_INVALID_MIB_SIZE
+2013 DPLP_FALLBACK_INVALID_MODULATION
+2014 DPLP_FALLBACK_MAX_ENTRIES_IS_ZERO
+2016 DPLP_FALLBACK_FAILED_TO_ALLOCATE_LINK_INFO
+2017 DPLP_FALLBACK_TBL_LENGTH_OUT_OF_BOUNDS
+2018 DPLP_FALLBACK_RATE_INDEX_OUT_OF_BOUNDS
+2020 DPLP_ENC_HNDL_GENERIC
+2021 DPLP_ENC_HNDL_WRONG_ENC_TYPE
+2022 DPLP_ENC_HNDL_MBULK_NULL
+2023 DPLP_ENC_HNDL_KEYC_NULL
+2024 DPLP_ENC_HNDL_NO_ROOM_LEFT
+2025 DPLP_ENC_HNDL_LIST_EMPTY
+2026 DPLP_ENC_HNDL_NO_KEY_FOUND
+2027 DPLP_ENC_HNDL_ENC_INFO_ALLOC_FAIL
+2028 DPLP_ENC_HNDL_NO_FRAMES_QUEUED_TO_DPHP
+2029 DPLP_ENC_HNDL_WAPI_CRYPTOSW_INVALID
+202a DPLP_ENC_HNDL_MBULK_IS_CHAINED
+2030 DPLP_CTRL_MGRL_GENERIC
+2031 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSING
+2032 DPLP_CTRL_MGR_DP_STATE_NOT_RESUMING
+2033 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSED
+2034 DPLP_CTRL_MGR_NEW_CMD_ALLOC_FAIL
+2035 DPLP_CTRL_MGR_CMD_TIMEOUT
+2040 DPLP_LINK_ADAPT_GENERIC
+2041 DPLP_LINK_ADAPT_RATE_UNSUPPORTED
+2042 DPLP_LINK_ADAPT_RATE_INDEX_OUT_OF_BOUNDS
+2043 DPLP_LINK_ADAPT_RATE_MIN_BA_RATE_WRONG
+2044 DPLP_LINK_ADAPT_SELECTED_RATE_INVALID
+2045 DPLP_LINK_ADAPT_FALLBACK_TABLE_IS_NULL
+2047 DPLP_LINK_ADAPT_NUM_RETRIES_IS_WRONG
+2050 DPLP_EXT_API_GENERIC
+2051 DPLP_EXT_API_DU_IS_NOT_RXENTRY
+2052 DPLP_EXT_API_DU_IS_NOT_TXENTRY
+2053 DPLP_EXT_API_RESOURCE_HANDLE_NOT_CALLED_FROM_CB
+2054 DPLP_EXT_API_WRONG_AMSDU_LEN
+2055 DPLP_EXT_API_WRONG_SIGNAL_BUFFER_SIZE
+2057 DPLP_EXT_API_MSG_CANNOT_QUEUE_BEACON
+2058 DPLP_EXT_API_DU_HAS_WRONG_STATE
+205a DPLP_EXT_API_INVALID_PID
+205b DPLP_EXT_API_INVALID_PAUSE_TYPE
+205c DPLP_EXT_API_STA_RECORD_DOES_NOT_EXIST
+205d DPLP_EXT_API_STA_RECORD_ALREADY_CLEARING
+205e DPLP_EXT_API_MLME_CALLBACK_ALREADY_SET
+205f DPLP_EXT_API_INVALID_MAC
+2060 DPLP_RX_GENERIC
+2061 DPLP_RX_VIF_IS_SCAN
+2062 DPLP_RX_FRAG_COUNT_WRONG_FOR_AMPDU
+2063 DPLP_RX_SEQ_DIFF_GREATER_THAN_WIN_SIZE
+2064 DPLP_RX_DPLP_INTERNAL_ERROR
+2065 DPLP_RX_CORRUPT_MBULK
+2066 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2067 DPLP_RX_FORWARD_CHAINED_TO_CTRLPLANE
+2068 DPLP_RX_MISSING_DRAM
+2070 DPLP_STATION_GENERIC
+2071 DPLP_STATION_TX_UP_IS_UNMAPPED
+2072 DPLP_STATION_FRAME_ALREADY_COUNTED
+2073 DPLP_STATION_TOO_MANY_QUEUED_FRAMES
+2074 DPLP_STATION_FRAME_IS_NOT_COUNTED
+2075 DPLP_STATION_NO_QUEUED_FRAME
+2076 DPLP_STATION_FRAME_HAS_NO_TXQUEUE
+2077 DPLP_STATION_FRAME_NOT_READY_TO_QUEUE
+2078 DPLP_STATION_RATE_INVALID
+207a DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_HIGH_IMPORTANCE
+207b DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_AMDPU
+207c DPLP_STATION_TXENTRY_HAS_NO_BAINFO
+207d DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_MULTICAST
+207e DPLP_STATION_DPLP_IN_WRONG_STATE
+207f DPLP_STATION_CLEAR_MUST_BE_TOTAL_PAUSED
+2080 DPLP_STATION_CLEAR_MUST_BE_NOTHING_QUEUED
+2081 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_SF_NOT_NULL
+2082 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_LF_NOT_NULL
+2083 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_COUNT_NOT_ZERO
+2090 DPLP_AMPDU_MGR_GENERIC
+2091 DPLP_AMPDU_MGR_MALLOC_FAIL
+2092 DPLP_AMPDU_MGR_TX_QUEUE_HEAD_OR_TAIL_NULL
+2093 DPLP_AMPDU_MGR_DU_NOT_READY_TO_SEND
+2094 DPLP_AMPDU_MGR_AMPDU_TXENTRY_LIST_NOT_FOUND
+2095 DPLP_AMPDU_MGR_TOO_MANY_FRAMES_WAITING_TO_TX
+2096 DPLP_AMPDU_MGR_TX_ENTRY_HAS_NO_BAINFO
+2097 DPLP_AMPDU_MGR_TX_ENTRY_HAS_INVALID_RATE
+2098 DPLP_AMPDU_LINK_INFO_IS_NULL
+2099 DPLP_AMPDU_AMSDU_OVERSIZE
+209a DPLP_AMPDU_AMSDU_NOT_SUPPORTED
+209b DPLP_AMPDU_MGR_RX_BA
+209c DPLP_AMPDU_MGR_FREE_PPDU_STILL_IN_DPHP
+209d DPLP_AMPDU_MGR_CFMS_COUNT
+209e DPLP_AMPDU_MGR_CANNOT_CANCEL_PPDU
+209f DPLP_AMPDU_MGR_CANCEL_COUNT
+20a0 DPLP_HW_GENERIC
+20a1 DPLP_HW_VIF_IS_NOT_SCHEDULED
+20a2 DPLP_HW_MBULK_HAS_NO_SIGNAL
+20a3 DPLP_HW_MBULK_HAS_REFCOUNT_OR_LEN
+20a4 DPLP_HW_UNEXPECTED_DU_STATE
+20a5 DPLP_HW_TXENTRY_IS_DATAFRAME
+20a9 DPLP_HW_UNEXPECTED_VIF_ID
+20aa DPLP_HW_TXENTRY_STILL_COUNTED
+20b0 DPLP_MPDU_LOAD_GENERIC
+20b1 DPLP_MPDU_LOAD_NODE_ELEMENT_NOT_NULL
+20b2 DPLP_MPDU_LOAD_PPDU_NOT_FOUND
+20b3 DPLP_MPDU_LOAD_NOT_A_TRIGGERED_QUEUE
+20b4 DPLP_MPDU_LOAD_CANCELLING_NULL_PPDU
+20b5 DPLP_MPDU_LOAD_UNICAST_IS_PAUSING
+20b6 DPLP_MPDU_LOAD_TXENTRY_NOT_FOUND
+20b7 DPLP_MPDU_LOAD_NO_MORE_TRIGGERED_Q_LEFT
+20b8 DPLP_MPDU_LOAD_FRAME_NOT_QUEUED
+20b9 DPLP_MPDU_LOAD_COUNT_NOT_ZERO
+20ba DPLP_MPDU_LOAD_DPLANE_NOT_RUNNING
+20c0 DPLP_QUEUE_GENERIC
+20c1 DPLP_QUEUE_WRONG_DU_STATE
+20c2 DPLP_QUEUE_TX_QUEUE_NOT_EMPTY
+20c3 DPLP_QUEUE_MAC_AC_IS_WRONG
+20c4 DPLP_QUEUE_FRAME_WITHOUT_TX_QUEUE
+20c5 DPLP_QUEUE_LIST_ELEMENT_IS_WRONG
+20c6 DPLP_QUEUE_MBULK_NOT_LARGE_ENOUGH
+20c7 DPLP_QUEUE_UNKNOWN_REQUEST_TYPE
+20c8 DPLP_QUEUE_DOUBLE_DEQUEUE
+20c9 DPLP_QUEUE_TX_QUEUE_EMPTY
+20ca DPLP_QUEUE_DEBUG_BEACON_SW_TIMEOUT
+20cb DPLP_QUEUE_DEBUG_AMSDU_ERROR
+20cc DPLP_QUEUE_INVALID_DU
+20d0 DPLP_FROM_HOST_HARD
+20e0 DPLP_TIMER_SCHEDULE_WHEN_PAUSED
+20f0 DPLP_ANTENNA_MODE_INVALID_BITMAP
+2100 DPLP_DPLP_IMM_UNIMPLEMENTED
+2110 DPLP_DPIF_GENERIC
+2111 DPLP_DPIF_BAD_OPERATION
+2112 DPLP_DPIF_RESOURCE_LOW
+2113 DPLP_DPIF_RESOURCE_INDEX_ERROR
+2114 DPLP_DPIF_BFEE
+2115 DPLP_DPIF_PEER_INFO
+2116 DPLP_DPIF_INTERRUPT_SANITY
+2117 DPLP_DPIF_INVALID_BSS_INDEX
+2120 DPLP_PEER_MGT_GENERIC
+2121 DPLP_PEER_MGT_FRAMES_NOT_CANCELLED
+2130 DPLP_BEAMFORMER_GENERIC
+2131 DPLP_BEAMFORMER_UNEXPECTED_NDPA
+2140 DPLP_DEADLINE_GENERIC
+2141 DPLP_DEADLINE_STOP_DEADLINE_NOT_FOUND
+2142 DPLP_DEADLINE_VIF_DEADLINE_NOT_FOUND
+2143 DPLP_DEADLINE_ACTIVE_DEADLINE_IS_NULL
+2144 DPLP_DEADLINE_DPIF_Q_NUM_NOT_FOUND
+2145 DPLP_DEADLINE_UNABLE_TO_CANCEL_DLINE
+2150 DPLP_PROTECTION_GENERIC
+2151 DPLP_PROTECTION_RATE_INDEX_OUT_OF_BOUNDS
+2160 DPLP_VIF_GENERIC
+2200 DPHP_BA_GENERIC
+2201 DPHP_BA_RESERVE_NON_AMPDU
+2202 DPHP_BA_LOAD_NON_AMPDU
+2203 DPHP_BA_LOAD_RESERVE_FAILED
+2210 DPHP_COORD_GENERIC
+2211 DPHP_COORD_BAD_RESET
+2212 DPHP_COORD_BAD_RESET_STAGE2
+2213 DPHP_COORD_INVALID_BK_CLEAR
+2214 DPHP_COORD_PPDU_LIST_DAMAGED
+2215 DPHP_COORD_NOT_MARKED_CANCEL
+2216 DPHP_COORD_INVALID_PPDU_STATE
+2217 DPHP_COORD_INVALID_DPHP_STATE
+2218 DPHP_COORD_Q_EMPTY
+2220 DPHP_DEADLINE_GENERIC
+2221 DPHP_DEADLINE_BK_NOT_EMPTY
+2222 DPHP_DEADLINE_BAD_DEADLINE
+2223 DPHP_DEADLINE_IS_NULL
+2224 DPHP_DEADLINE_BAD_Q_MASK
+2225 DPHP_DEADLINE_ILLEGAL_PPDU
+2226 DPHP_DEADLINE_ALREADY_ACTIVE
+2227 DPHP_DEADLINE_INVALID_TYPE
+2228 DPHP_DEADLINE_NO_INSTALLED_DEADLINE
+2230 DPHP_RX_GENERIC
+2231 DPHP_RX_NO_DRAM
+2232 DPHP_RX_TRUNCATED_DOLLOP
+2233 DPHP_RX_SANITY
+2234 DPHP_RX_NO_PRECEDING_MPDU
+2235 DPHP_RX_BAD_DOLLOP
+2236 DPHP_RX_GIVE_BEHIND_TAKE
+2240 DPHP_DMA_GENERIC
+2241 DPHP_DMA_RX_ORDER
+2242 DPHP_DMA_UNEVEN_ALIGN
+2243 DPHP_DMA_INVALID_ENC_TYPE
+2244 DPHP_DMA_NO_SPACE
+2245 DPHP_DMA_TX_FRAME_TOO_LONG
+2246 DPHP_DMA_PLINE_FULL
+2247 DPHP_DMA_PLINE_EMPTY
+2248 DPHP_DMA_PLINE_INVALID
+2249 DPHP_DMA_INVALID_TFER_ALERT
+224a DPHP_DMA_MBULK_CHAIN_ERROR
+224b DPHP_DMA_INVALID_PAUSE_STATE
+224c DPHP_DMA_SG_LIST_FULL
+224d DPHP_DMA_BAD_SAVED_RX_STATE
+2250 DPHP_RESET_GENERIC
+2251 DPHP_RESET_BAD_STATE_REQUEST
+2252 DPHP_RESET_RX_NOT_IDLE
+2253 DPHP_RESET_DMA_NOT_IDLE
+2254 DPHP_RESET_BAD_WDOG_STATE
+2255 DPHP_RESET_HW_IDLE_FAIL
+2256 DPHP_INIT_BAD_MAC_REGS_ADDR_START
+2257 DPHP_INIT_BAD_MAC_INSTANCE_NUM
+2258 DPHP_MAC_FAILED_TO_START
+2260 DPHP_INT_GENERIC
+2261 DPHP_INT_UNHANDLED
+2262 DPHP_INT_MAC_ERROR
+2263 DPHP_INT_DMA_ALERT_RECURSION
+2264 DPHP_INT_BAD_DMA_TFER_STATE
+2265 DPHP_INT_DMA_TFER_FAIL
+2266 MAC_ACC_BAD_TX_RATE
+2267 MAC_ACC_BAD_PROT_RATE
+2268 DPHP_INT_XDMA_TFER_FAIL
+2269 DPHP_XDMA_TFER_FAIL
+226a DPHP_XDMA_TFER_CHAINED_MBULK_FAIL
+226b DPHP_XDMA_TFER_CHUNK_MBULKS_FAIL
+226c DPHP_FLEXIMAC_PANIC
+226d DPHP_CAPTURE_IQ_SAMPLES_LOST
+226e DPHP_CAPTURE_DONE
+226f DPHP_PHYDMA_DOUBLE_REGISTER
+2270 DPHP_TX_GENERIC
+2271 DPHP_TX_UNDERFLOW
+2272 DPHP_TX_BUFFER_INCORRECT
+2280 DPHP_SLOT_GENERIC
+2281 DPHP_SLOT_EXPECTED_AMPDU
+2282 DPHP_SLOT_NULL_PPDU
+2283 DPHP_SLOT_DMA_INCOMPLETE
+2284 DPHP_SLOT_QUEUEING_FAIL
+2285 DPHP_SLOT_BAD_CANCEL_REQ
+2286 DPHP_SLOT_TIMED_TX_Q_PAUSED
+2287 DPHP_SLOT_DMA_DATA_INVALID
+2288 DPHP_SLOT_INVALID_STATE
+2289 DPHP_SLOT_INVALID_PDU_STATUS
+228a DPHP_SLOT_UNEXPECTED_CFM
+228b DPHP_SLOT_MPDU_INDEX_OUT_OF_BOUNDS
+228c DPHP_SLOT_UNEXPECTED_DYN_RESTART
+228d DPHP_SLOT_BAD_COMMAND
+2290 DPHP_CONFIG_GENERIC
+2291 DPHP_CONFIG_BAD_EDCA_Q
+2292 DPHP_CONFIG_BAD_EDCA_CONFIG
+2293 DPHP_CONFIG_MISSING_PROT_TABLE
+2294 DPHP_CONFIG_RAMSW_SIZE_INVALID
+22a0 DPHP_DPIF_GENERIC
+22a1 DPHP_DPIF_BAD_DEADLINE_CANCEL
+22a2 DPHP_DPIF_INVALID_ECW
+22a3 DPHP_DPIF_INVALID_BURST
+22a4 DPHP_DPIF_BAD_RX_CHAIN_CALC
+22a5 DPHP_DPIF_BAD_RX_TYPE
+22a6 DPHP_DPIF_PEER_INFO
+22a7 DPHP_DPIF_UNXPECTED_AMPDU
+22a8 DPIF_LINK_INFO_INC_REF_COUNT_WHEN_MAX
+22a9 DPIF_LINK_INFO_DEC_REF_COUNT_WHEN_ZERO
+22aa DPIF_LINK_INFO_ASSIGN_TO_TX_ENTRY_Q_NULL
+22ab DPIF_MBULK_DATA_WRONG_CACHELINE
+22ac DPIF_BAD_ENC_KEY
+22ad DPIF_UNEXPECTED_REQUEST_CANCEL
+22b0 DPHP_TCM_GENERIC
+22b1 DPHP_TCM_ALLOC_SIZE_MISMATCH
+22b2 DPHP_TCM_POOL_EMPTY
+22b3 DPHP_TCM_BAD_FREE
+22b4 DPHP_TCM_INIT_INSUFFICIENT_SPACE
+22b5 DPHP_TCM_POOL_SIZE
+22b6 DPHP_TCM_INIT_FAIL
+22b7 TCM_INIT_POOL_IN_USE
+22c0 DPHP_BAD_MIF_STATE
+22d0 DPHP_BA_TX_GENERIC
+22d1 DPHP_BA_TX_UNEXPECTED_CFM_STATE
+22d2 DPHP_BA_TX_PPDU_AT_Q_HEAD_DOES_NOT_MATCH
+22d3 DPHP_BA_TX_DEINT_OUTSTANDING_AMPDUS
+22d4 DPHP_BA_TX_DEINT_OUTSTANDING_BA_TX_AGRS
+22d5 DPHP_BA_TX_AMPDU_ALREADY_CONFIRMED
+22d6 DPHP_BA_TX_PPDU_COUNT_VALUE_INCORRECT
+22d7 DPHP_BA_TX_UNEXPECTED_PANIC_SIGNAL
+22d8 DPHP_BA_TX_BA_WINDOW_NOT_EMPTY
+22d9 DPHP_BA_TX_AMPDU_DEQUEUED_INCORRECTLY
+22da DPHP_BA_TX_AMPDU_NOT_FOUND
+22e0 DPHP_WATCHDOG_GENERIC
+22e1 DPHP_UNHANDLED_LOCKUP
+22f0 DPHP_BEAMFORMER_INVALID_NDPA
+22f1 DPHP_BEAMFORMEE_GENERIC
+2300 MACRAME_VIF_CREATE_NULL_SCANVIF
+2301 MACRAME_VIF_DEREGISTER_QUEUED_TX_FRAMES
+2302 MACRAME_VIF_DELETE_STATION_ASSOCIATED
+2303 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_STATE
+2304 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_PS_STATE
+2305 MACRAME_VIF_CLEAR_INVALID_SCHED_STATE
+2308 MACRAME_VIF_DESCHED_REG_REQ_INVALID_PS_STATE
+230a MACRAME_VIF_SW_DONE_VIF_NOT_SCHEDULED
+230c MACRAME_VIF_CTS_PROCESSED_NULL_DU
+230d MACRAME_VIF_DEREGISTER_NO_REG_VIF
+230e MACRAME_VIF_DEREGISTER_INVALID_SCHED_STATE
+230f MACRAME_VIF_SCHED_MISSED_INVALID_START_TIME
+2311 MACRAME_VIF_INDEX_OUT_OF_RANGE
+2313 MACRAME_VIF_CANCEL_NULL_ENTRY
+2315 MACRAME_VIF_IS_NULL
+2316 MACRAME_VIF_INVALID_TRAFFIC_STATISTICS
+2320 MACRAME_STATION_ADD_NULL_RECORD
+2323 MACRAME_STATION_SET_CONNECT_NULL_RECORD
+2326 MACRAME_STATION_RESET_STA_RECORD_WITH_ENC_KEY
+2340 MACRAME_SCHED_UPDATE_DURATION_HIST_VIF_NOT_SCHEDULED
+2342 MACRAME_SCHED_QUERY_BO_INVALID_BO_TIMES
+2343 MACRAME_SCHED_RESCHEDULE_ALREADY_ACTIVE
+2344 MACRAME_SCHED_SCHED_INVALID_VIF
+2345 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_VIF
+2346 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_STATE
+2347 MACRAME_SCHED_SCHED_IND_INVALID_VIF
+2348 MACRAME_SCHED_RADIO_DONE_INVALID_STATE
+2349 MACRAME_SCHED_BO_UPDATE_INVALID_VIX
+234a MACRAME_SCHED_DESCHED_NOW_NOT_SCEDULED
+234b MACRAME_SCHED_NEAREST_SCHED_TIME_INVALID_STATE
+234c MACRAME_SCHED_COULD_NOT_INSTANTIATE_FSM
+234d MACRAME_SCHED_INVALID_FSM_PID
+234e MACRAME_SCHED_INVALID_RADIO_BM
+234f MACRAME_SCHED_INVALID_PAUSE_REASON
+2350 MACRAME_SCHED_INVALID_INDEX
+2351 MACRAME_SCHED_INVALID_INTERFACE
+2352 MACRAME_SCHED_INVALID_SCHDL_FSM
+2361 MACRAME_TX_MM_REQUEST_INVALID_VIF
+2362 MACRAME_TX_ADDING_NULL_ENTRY_TO_BUFFER
+2363 MACRAME_TX_SENDING_NULL_ENTRY_FROM_BUFFER
+2364 MACRAME_TX_DISCARDING_NULL_ENTRY_FROM_BUFFER
+2366 MACRAME_TX_DISCARD_NULL_PTR_TO_ENTRY
+2367 MACRAME_TX_CANCEL_NULL_PTR_TO_ENTRY
+2368 MACRAME_TX_CANCEL_NULL_TXENTRY
+2369 MACRAME_TX_NO_PSPOLL
+2382 MACRAME_BEACON_MISSED_BEACON_NOT_SCHEDULED_VIF
+2384 MACRAME_BEACON_UPDATE_WAKEUP_VIF_NOT_STA
+2386 MACRAME_BEACON_TX_CLEAR_INVALID_VIF_TYPE
+2387 MACRAME_BEACON_TX_LOAD_HANDLER_INVALID_VIF_TYPE
+2388 MACRAME_BEACON_TX_LOAD_HANDLER_READONLY_FRAME
+2389 MACRAME_BEACON_TX_FINISHED_INVALID_VIF
+238a MACRAME_BEACON_RX_SCHEDULE_TOO_FAR_IN_THE_FUTURE
+238c MACRAME_BEACON_TX_SHEDULE_REQUEST_IN_THE_PAST
+238d MACRAME_BEACON_TX_GET_NEXT_TIME_INVALID_VIF_TYPE
+238e MACRAME_BEACON_TX_AP_WRITE_PVB_INPUT_CHECK
+238f MACRAME_BEACON_TX_AP_UPDATE_NEEDED_NON_AP_VIF
+2390 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_SCHEDULED_VIF
+2391 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_AP_VIF
+2392 MACRAME_BEACON_TX_AP_SEND_BEACON_NOT_FOUND
+2394 MACRAME_BEACON_TX_AP_CLEAR_BEACON_IN_DPLP
+2395 MACRAME_BEACON_TX_ECSA_COUNT_REACHED_ZERO
+239a MACRAME_BEACON_CALC_SLEEP_PERIODS
+239b MACRAME_BEACON_TBTT_EBRT_INVALID_VIF
+239c MACRAME_BEACON_TBTT_EBRT_INVALID_LISTEN_START
+239e MACRAME_BEACON_TX_TXENTRY_IS_NULL
+23a2 MACRAME_PS_COMMON_PS_CHECK_INVALID_VIF
+23a3 MACRAME_PS_COMMON_ANNOUNCE_PROCESSED_NULL_DU
+23a4 MACRAME_PS_COMMON_SEND_PSNULL_NULL_ERROR
+23a6 MACRAME_PS_COMMON_POPULATE_PSNULL_VIF_NOT_SCHEDULED
+23a7 MACRAME_PS_LEGACY_PSPOLL_CFM_NULL_DU
+23a8 MACRAME_PS_LEGACY_PSPOLL_CFM_NON_STA_VIF
+23a9 MACRAME_PS_UAPSD_ENQUEUE_TRIGGER_VIF_NOT_SCHEDULED
+23c0 MACRAME_BLACKOUT_CMM_INVALID_NUM_BO
+23c1 MACRAME_BLACKOUT_CHIP_INVALID_NUM_BO
+23c2 MACRAME_BLACKOUT_P2P_INVALID_VIF_TYPE_NOA
+23c3 MACRAME_BLACKOUT_P2P_SET_CTW_FAIL
+23c4 MACRAME_BLACKOUT_NOT_REGISTERED
+23c5 MACRAME_BLACKOUT_P2P_SCAN_NOA_NOT_UPDATED
+23c6 MACRAME_BLACKOUT_AP_SCAN_QUIET_COUNT_NOT_UPDATED
+23e2 MACRAME_FSM_ADD_BO_INVALID_TYPE
+23e3 MACRAME_FSM_ADD_BO_UNDEFINED_TYPE
+23e4 MACRAME_FSM_ADD_BO_QUIET_INVALID_ID
+23e5 MACRAME_FSM_ADD_BO_LOCAL_INVALID_ID
+23e6 MACRAME_FSM_DEL_BO_INVALID_TYPE
+23e7 MACRAME_FSM_DEL_BO_UNDEFINED_TYPE
+23e8 MACRAME_FSM_DEL_BO_QUIET_INVALID_ID
+23e9 MACRAME_FSM_DEL_BO_LOCAL_INVALID_ID
+2400 MACRAME_TIMER_UNSCHEDULABLE_VIF_MULTICAST
+2401 MACRAME_TIMER_UNSCHEDULABLE_VIF_FAST_PS
+2402 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_DELAY
+2403 MACRAME_TIMER_UNSCHEDULABLE_VIF_CHECK_CLEAR
+2404 MACRAME_TIMER_UNSCHEDULABLE_VIF_MOREBIT
+2405 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_CHECK
+2406 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_TIMER
+2407 MACRAME_TIMER_UNSCHEDULABLE_VIF_TDLS
+240a MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_TX
+240b MACRAME_TIMER_DPLANE_OPERATION_TIMEOUT
+240c MACRAME_TIMER_RADIOMAC_SWITCH_TIMEOUT
+240d MACRAME_TIMER_BT_LO_ACCESS_GRANT_TIMEOUT
+240e MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_RX
+2420 MACRAME_COEX_BLACKOUT_ATTACH_USPBO_FAILED
+2421 MACRAME_COEX_BLACKOUT_ATTACH_VIF_FAILED
+2422 MACRAME_COEX_BLACKOUT_ATTACH_INVALID_HANDLE
+2423 MACRAME_COEX_BLACKOUT_UPDATE_INVALID_HANDLE
+2424 MACRAME_COEX_BLACKOUT_DESTROY_INVALID_HANDLE
+2425 MACRAME_COEX_BLACKOUT_DETACH_INVALID_HANDLE
+2426 MACRAME_COEX_BLACKOUT_MASK_INVALID_HANDLE
+2427 MACRAME_COEX_BLACKOUT_UNMASK_INVALID_HANDLE
+2428 MACRAME_COEX_VIF_GET_NEXT_DTIM_TIME_INVALID_VIF
+2429 MACRAME_COEX_VIF_GET_CLEAR_TIME_INVALID_VIF
+242a MACRAME_COEX_NEGATIVE_MAX_CLEAR_TIMEOUT
+2431 MACRAME_MLME_API_ALLOW_BEACONS_NON_AP_VIF
+2434 MACRAME_MLME_API_SET_BSS_INVALID_VIF
+2435 MACRAME_MLME_API_SET_BSS_NO_AP
+2436 MACRAME_MLME_API_SET_INFO_SCAN_VIF
+2437 MACRAME_MLME_API_CONFIG_QUEUE_SCAN_VIF
+2438 MACRAME_MLME_API_SET_BSS_UNMATCHED_VIF_TYPES
+2439 MACRAME_MLME_API_INVALID_VIF
+243a MACRAME_MLME_API_NOT_STATION_OWNER
+243b MACRAME_MLME_API_STATION_CLEAR_RECORD_NOT_FOUND
+243c MACRAME_MLME_API_STATION_PAUSE_RECORD_NOT_FOUND
+243d MACRAME_MLME_API_STATION_UNPAUSE_RECORD_NOT_FOUND
+2441 MACRAME_BA_MGR_REMOVE_BA_NULL_INFO
+2442 MACRAME_BA_MGR_REMOVE_BA_HWINFO
+2443 MACRAME_BA_MGR_QUEUE_HEAD_NULL
+2444 MACRAME_BA_MGR_QUEUE_TAIL_NULL
+2445 MACRAME_BA_MGR_DELBA_RX_BAINSTANCE_NULL
+2446 MACRAME_BA_MGR_FIND_BA_INVALID_TPRI
+2447 MACRAME_BA_MGR_DELBA_INVALID_DIR
+2448 MACRAME_BA_MGR_ADDBA_ZERO_BUF_SIZE
+2449 MACRAME_BA_MGR_ADDBA_STA_RECORD_NULL
+244a MACRAME_BA_MGR_ADD_BA_RX_AGREEMENT
+2450 MACRAME_KEY_MALLOC_FAILED
+2451 MACRAME_RADIO_INIT_DONE_INVALID_STATE
+2452 MACRAME_RADIO_STATE_CHANGE_ON_NO_DESCRIPTORS
+2453 MACRAME_RADIO_OFF_INVALID_STATE
+2454 MACRAME_RADIO_DPD_NO_RATES
+2455 MACRAME_RADIO_INVALID_STATE
+2456 MACRAME_RADIO_COULD_NOT_INSTANTIATE_FSM
+2457 MACRAME_RADIO_INVALID_BITMAP
+2458 MACRAME_RADIO_ILLEGAL_SWITCH_REQUEST
+2459 MACRAME_MODEM_INVALID_DFE_CONFIG
+245a MACRAME_RADIOMAC_TOO_MANY_REQUESTS
+245b MACRAME_MODEM_CONFLICTING_DFE_CONFIG
+245c MACRAME_RADIOMAC_MAC0_UNAVAILABLE
+245d MACRAME_RADIO_DUMMY_FRAME_DPD_NOT_SUPPORTED
+2480 MACRAME_DPLANE_MACRAME_NULL_POINTER
+2490 MACRAME_VIF_PAUSE_RESUME_NOT_ENOUGH_MEMORY_FOR_REQUEST
+2491 MACRAME_VIF_NAN_ELAPSED_TIME_GREATER_THAN_DW0_PERIOD
+2492 MACRAME_VIF_NAN_INSUFFICINET_OCTETS
+2493 MACRAME_VIF_NAN_NO_SLOTS_FOUND
+24a0 MACRAME_IDLE_AP_INVALID_VIF
+24ff MACRAME_LAST_ID
+2500 MLME_RAME_GET_KA_INTERVAL_INVALID_DATA
+2501 MLME_FSM_PID_ALREADY_IN_USE_1
+2502 MLME_AP_NO_CURRENT_STA
+2503 MLME_FSM_PID_ALREADY_IN_USE_2
+2504 MLME_FSM_PID_ALREADY_IN_USE_3
+2505 MLME_FSM_PID_ALREADY_IN_USE_4
+2506 MLME_FSM_PID_ALREADY_IN_USE_5
+2507 MLME_FSM_PID_ALREADY_IN_USE_6
+2508 MLME_FSM_PID_ALREADY_IN_USE_7
+2509 MLME_FSM_PID_ALREADY_IN_USE_8
+250a MLME_FSM_PID_ALREADY_IN_USE_9
+250b MLME_FSM_PID_ALREADY_IN_USE_10
+250c MLME_AP_DISCONNECT_NO_STATION_RECORD
+250e MLME_AP_UNEXPECTED_FRAME_TYPE
+250f MLME_AP_UNEXPECTED_FRAME_SUBTYPE
+2510 MLME_REG_MIB_READ_FAIL
+2511 MLME_REG_MIB_READ_FAIL_2
+2512 MLME_REG_MIB_COUNTRY_CODE_FAIL
+2513 MLME_REG_MIB_WORLD_DOMAIN_COUNTRY_CODE_FAIL
+2514 MLME_REG_IS_NULL
+2520 MLME_CONMGR_MLME_SYNCHRONISED_RSP_INVALID
+2530 MLME_STA_RECORD_ADD_1
+2531 MLME_STA_RECORD_DELETE
+2532 MLME_DATA_SAVE_UNKNOWN_KEY_TYPE
+2533 MLME_STA_RECORD_ADD_2
+2534 MLME_STA_RECORD_PAUSE
+2535 MLME_STA_RECORD_RESUME
+2536 MLME_STA_RECORD_MOVE
+2537 MLME_DATA_NO_AVAILABLE_VIF
+2538 MLME_DATA_ADD_VIF_FAILED_1
+2539 MLME_DATA_ADD_VIF_FAILED_3
+253a MLME_DATA_ADD_VIF_FAILED_4
+253b MLME_STA_RECORD_CLEAR
+253c MLME_STA_RECORDS_EXIST
+253d MLME_STA_RECORD_DELETE_WRONG_OWNER
+2560 MLME_MEASUREMENTS_FRAME_SZ_WRONG
+2580 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_WITH_VIX
+2581 MLME_REQUESTS_TEST_PANIC
+2582 MLME_REQUESTS_INVALID_STATE_IN_ADD_VIF
+2583 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_NULL_VIX
+25a0 MLME_ROAMING_IES_SZ_WRONG
+25a1 MLME_ROAMING_LOGGING_IE_SZ_WRONG
+25c2 MLME_SCAN_INTERNAL_DATA_CORRUPTED
+25c3 MLME_SCAN_NO_SCANNERS
+25c4 MLME_SCAN_PID_TO_INSTANCE_FAILED
+25c5 MLME_SCAN_MIB_FAIL
+25c6 MLME_SCAN_CHANNEL_ZERO_FREQ
+25d0 MLME_TDLS_INVALID_DTIM_PERIOD
+25d1 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_1
+25d2 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_2
+25d3 MLME_TDLS_INVALID_TERMINATE_LINK
+25d4 MLME_TDLS_INVALID_TERMINATE_LINK_SETUP
+25d5 MLME_TDLS_INVALID_CONFIRM
+25d6 MLME_TDLS_MAX_SLOTS_EXCEEDED
+25e0 MLME_VIFCTRL_DMS_IES_SZ_WRONG_1
+25e1 MLME_VIFCTRL_DMS_IES_SZ_WRONG_2
+25e2 MLME_VIFCTRL_DMS_IES_SZ_WRONG_3
+25e3 MLME_VIFCTRL_DMS_IES_SZ_WRONG_4
+25e4 MLME_VIFCTRL_DMS_IES_SZ_WRONG_5
+25e5 MLME_VIFCTRL_DMS_IES_SZ_WRONG_6
+25e6 MLME_VIFCTRL_DMS_IES_SZ_WRONG_7
+25e7 MLME_VIFCTRL_CHANNEL_SWITCH_NO_STA_RECORD
+25e8 MLME_VIFCTRL_TEARDOWN_BITMAP_OVERFLOW
+25e9 MLME_VIFCTRL_SEND_FRAME_INVALID_CHANNEL_FREQ
+25ea MLME_VIFCTRL_OBSS_SCAN_IES_SIZE_WRONG
+25eb MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_1
+25ec MLME_VIFCTRL_PACKET_FILTER_IES_TOO_LONG
+25ed MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_MODE
+25f0 MLME_SECURITY_EAPOL_PEER_NOT_FOUND
+25f1 MLME_SECURITY_FILTER_OVERFLOW
+25f2 MLME_SECURITY_EAPOL_REPLY_TYPE_INVALID
+2600 MLME_VIFCTRL_FILTER_OVERFLOW_1
+2601 MLME_VIFCTRL_FILTER_OVERFLOW_2
+2602 MLME_VIFCTRL_FILTER_OVERFLOW_3
+2603 MLME_VIFCTRL_FILTER_OVERFLOW_4
+2604 MLME_VIFCTRL_FILTER_OVERFLOW_5
+2605 MLME_VIFCTRL_FILTER_OVERFLOW_6
+2606 MLME_VIFCTRL_FILTER_OVERFLOW_7
+2607 MLME_VIFCTRL_FILTER_OVERFLOW_8
+2608 MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_2
+2610 MLME_MBULK_IS_NULL
+2611 MLME_MBULK_ADDRESS_IS_NULL
+2620 MLME_MPDU_VIX_REGISTRATION_FAILED_1
+2621 MLME_MPDU_VIX_REGISTRATION_FAILED_2
+2630 MLME_FRAMES_FRAME_SZ_WRONG
+2631 MLME_FRAMES_INVALID_FRAME_TYPE_1
+2632 MLME_FRAMES_INVALID_FRAME_TYPE_2
+2633 MLME_FRAME_ADDR_DS_MODE_UNSUPPORTED
+2634 MLME_FRAME_APPEND_OOB
+2635 MLME_FRAME_EAPOL_INVALID_FRAME_TYPE
+2636 MLME_FRAME_BUILD_INC_SZ_MISMATCH
+2640 MLME_NAN_SCAN_IES_SIZE_WRONG
+2641 MLME_NAN_FRAME_SZ_WRONG_1
+2642 MLME_NAN_INVALID_NAN_FRAME
+2643 MLME_NAN_INITIAL_CHANNEL_CFG_FAILED
+2644 MLME_NAN_NUM_OF_SDA_OVERFLOW
+2645 MLME_NAN_SDF_WITH_NO_PAYLOAD
+2646 MLME_NAN_RAME_MM_CFM_NOT_RECEIVED
+2647 MLME_NAN_INVALID_CLUSTER_MERGE_STATE
+2649 MLME_NAN_FRAME_SZ_WRONG_3
+264a MLME_NAN_FRAME_SZ_WRONG_4
+264c MLME_NAN_FRAME_SZ_WRONG_6
+264e MLME_FSM_PID_ALREADY_IN_USE_11
+2650 MLME_API_STATION_RECORD_DOES_NOT_EXIST_1
+2651 MLME_API_STATION_RECORD_DOES_NOT_EXIST_2
+2652 MLME_API_STATION_RECORD_DOES_NOT_EXIST_3
+2653 MLME_API_INVALID_VIF
+2660 MLME_FTM_SCAN_IES_SIZE_WRONG
+2700 RADIO_RICE_RADIO_SETUP_FAILED
+2701 RADIO_RICE_ALREADY_SETUP
+2702 RADIO_RICE_BAD_CLOCK_FREQ
+2703 RADIO_RICE_IMM_ERROR
+2704 RADIO_RICE_RICE_ERROR
+2705 RADIO_RICE_MGR_FSM_ERROR
+2706 RADIO_RICE_RADIO_FSM_ERROR
+2707 RADIO_RICE_ILLEGAL_RECONFIGURE
+2708 RADIO_RICE_CONNECTION_CLASH
+2709 RADIO_RICE_FSM_CHANGE_PARAMS
+270a RADIO_RICE_FSM_INADEQUATE_TIME
+270b RADIO_RICE_BAD_ANTENNA_GAIN_SETTINGS
+2710 RADIO_HAL_BAD_FREQ_COMP_TABLE_TYPE
+2711 RADIO_HAL_BAD_TEMP_COMP_TABLE_TYPE
+2712 RADIO_HAL_BAD_SIG_GEN_WAVEFORM_TYPE
+2713 RADIO_HAL_BAD_SIG_GEN_LOCATION_TYPE
+2714 RADIO_HAL_UNKNOWN_TX_TRIM_TYPE
+2715 RADIO_HAL_UNKNOWN_TX_LOOPBACK_TYPE
+2716 RADIO_HAL_BAD_CONFIGURATION
+2717 RADIO_HAL_BAD_PATH_MUX_CONFIGURATION
+2718 RADIO_HAL_PATH_MUX_SETUP_FAILED
+2719 RADIO_HAL_PATH_MUX_MAP_INDETERMINATE
+271a RADIO_HAL_INTERNAL
+271b RADIO_HAL_INVALID_RADIO_ID
+271c RADIO_HAL_BAD_RAMSW_REC
+271d RADIO_NOT_ENOUGH_SRAM_FOR_PLAYBACK_SIGNAL
+271e RADIO_PLAYBACK_FAILED
+271f RADIO_TOO_MANY_DPD_TRIM_FAILURES
+2720 RADIO_MIB_ERROR
+2721 RADIO_HAL_BAD_RAMSW_PLAY
+2722 RADIO_PHASE_COMPUTATION
+2723 RADIO_DPD_CALC_LOOPBACK_FAILED
+2724 RADIO_ILLEGAL_COMPLEX_DIVISION
+2725 RADIO_DPD_ALIGN_CAPTURE_FAIL
+2726 RADIO_HAL_BAD_CAPTURE_POINT_TX_RX_DEF
+2727 RADIO_TRIM_SETUP_ERROR
+2728 RADIO_NULL_REG_CACHE_PTR
+2729 RADIO_NULL_PTR
+272a RADIO_ILLEGAL_DIVISION
+272b RADIO_DEINIT_ALREADY_IN_PROGRESS
+272c RADIO_BAD_RF_CB_STATE
+272d RADIO_DPD_UNDEFINED_TRIM_STEP
+272e RADIO_RF_RX_DCOC_NULL_POINTER
+272f RADIO_REGISTER_LOG_VERIFY_FAIL
+2730 RADIO_INVALID_CALL_IN_IMM
+2731 RADIO_INVALID_CALL_IN_DPD_TRAIN
+2732 RADIO_UNKNOWN_BAND
+2733 RADIO_HAL_TOO_MANY_TX_GAIN_STEPS
+2734 RADIO_VCO_LOCK_FAILED
+2735 RADIO_PHY_FLEXIMAC_ST_INCONSISTENT
+2736 PA_SAT_IS_NULL
+2737 LARK_D00_INVALID_5G_FREQ
+2780 RADIO_HALMAC_FAILED_TO_INSTALL_MIB
+2781 RADIO_HALMAC_FAILED_TO_FIND_ROW
+2800 TEST_UNUSED
+2801 TEST_DPHPADPT_RX_OUT_OF_MBULKS
+2802 TEST_DPHPADPT_RX_UNEXPECTED_MPDU
+2803 TEST_DPHPADPT_RX_TOO_MANY_MPDUS_IN_AMPDU
+2810 TEST_MICRAME_BAD_RADIO_REQUEST
+2811 TEST_MICRAME_TX_QUEUE_EMPTY
+2812 TEST_MICRAME_TX_QUEUE_FULL
+2813 TEST_MICRAME_TX_NO_MEM_FOR_CANCEL
+2814 TEST_MICRAME_TX_BAD_PPDU_STATE
+2815 TEST_MICRAME_TX_BAD_MPDU_COUNT
+2816 TEST_MICRAME_TX_BAD_SLOT_STATE
+2817 TEST_MICRAME_TX_BAD_SLOT_COUNT
+2818 TEST_MICRAME_TX_BAD_MPDU_LEN
+2820 TEST_WLANLITE_MGR_FSM_ERROR
+2821 TEST_WLANLITE_LOAD_FRAME_PPDU_ALLOC
+2822 TEST_WLANLITE_INVALID_RADIO_ID
+2823 TEST_WLANLITE_INVALID_MAC_ID
+2824 TEST_WLANLITE_INVALID_RADIO_BITMAP
+2825 TEST_WLANLITE_BEAMFORMER
+2826 TEST_WLANLITE_CONN_FSM_ERROR
+2827 TEST_WLANLITE_DPHP_HW_LOCKUP
+2900 COEX_API_PERIODIC_EVENT_INVALID_ENTRY
+2910 COEX_STRAT_INIT_FAILURE
+2940 COEX_MAC_KA_BO_FAILURE
+2950 COEX_RAME_BAD_VIX
+2960 COEX_FLEXIMAC_INT_UNHANDLED
+2970 COEX_FLEXIMAC_INVALID_SEQ_NUM
+29ff COEX_LAST
+2a00 LOWER_MAC
+2a01 COMMON_HOSTIO_GENERIC
+2a02 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a03 COMMON_HOSTIO_VIRT_GENERIC
+2a04 COMMON_HOSTIO_VIRT_WLANLITE
+2a10 COMMON_PMALLOC_OUT_OF_MEMORY
+2a11 COMMON_PMALLOC_INVALID_MEMORY_CONFIG
+2a12 COMMON_PMALLOC_INVALID_POINTER
+2a13 COMMON_PMALLOC_MEMORY_EXHAUSTION
+2a20 COMMON_DEBUG_DWORD12_INVALID_PTR
+2a21 COMMON_DEBUG_DWORD12_SANITY_FAIL
+2a22 COMMON_DEBUG_SAP_TOO_LARGE_ALLOC_SZ
+2a23 COMMON_DEBUG_NOT_ALLOWED
+2a30 COMMON_SERVICE_FOS_RES_NOT_CLEANED
+2a31 COMMON_SERVICE_START_FAILED
+2a32 COMMON_SERVICE_STOP_FAILED
+2a33 COMMON_SERVICE_FOS_TASK_NOT_SCHEDULED
+2a34 COMMON_SERVICE_TOO_MANY_NON_RTOS_IRQ
+2a40 COMMON_FAULT_NOT_ALLOWED
+2a50 COMMON_HW_ILLEGAL_RESPONSE_RATE
+2a51 COMMON_RSA_OUT_OF_RANGE
+2a52 COMMON_LMIF_MAC_CONFIG_GENERIC
+2a60 COMMON_FSM_ALLOCATION_FAILURE
+2a61 COMMON_FSM_INVALID_SIGNAL
+2a62 COMMON_FSM_INVALID_PRIORITY
+2a63 COMMON_FSM_FAILURE
+2a64 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESS
+2a65 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESSOR
+2a66 COMMON_FSM_SIGNAL_TO_ENV
+2a67 COMMON_FSM_EMPTY_TIMER_LIST
+2a68 COMMON_FSM_LAST_NEXT_NOT_NULL
+2a69 COMMON_FSM_LAST_IS_NULL
+2a6a COMMON_FSM_CHANGE_NOT_ALLOWED_IN_INTERRUPT_CONTEXT
+2a6b COMMON_FSM_INVALID_PID
+2a6c COMMON_FSM_DATA_NOT_READY
+2a6d COMMON_FSM_INVALID_RADIO_ID_TO_PID
+2a6e COMMON_FSM_INVALID_SCHDL_ID_TO_PID
+2a6f COMMON_FSM_TOO_MANY_SAVED_OR_FORWARD_EVENTS
+2a70 COMMON_UTILS_DATA_UNIT
+2a71 COMMON_UTILS_MAKE_FRAME
+2a72 COMMON_UTILS_LINKED_LIST
+2a80 COMMON_MIB_ROM_CORRUPT
+2a81 COMMON_MIB_OVERRIDE
+2a82 COMMON_MIB_GETACTOS
+2aa0 COMMON_SHARED_DATA_VIF_INVALID_ACCESS
+2aa1 COMMON_SHARED_DATA_VIF_STA_INVALID_ACCESS
+2aa2 COMMON_SHARED_DATA_VIF_AP_INVALID_ACCESS
+2aa3 COMMON_SHARED_DATA_VIF_NAN_INVALID_ACCESS
+2aa4 COMMON_SHARED_DATA_VIF_SCAN_INVALID_ACCESS
+2aa5 COMMON_SHARED_DATA_STA_INVALID_ACCESS
+2aa6 COMMON_SHARED_DATA_MISSING_CALLBACK
+2aa7 COMMON_SHARED_DATA_VIF_FTM_INVALID_ACCESS
+2aa8 COMMON_SHARED_DATA_DU_INVALID_ACCESS
+2aa9 COMMON_SHARED_DATA_CALLBACKS_ALREADY_TRIGGERED
+2aaa COMMON_SHARED_DATA_VIF_FTM_INVALID_BW
+2ab0 COMMON_PACKET_FILTER_GENERIC
+2ab1 COMMON_PACKET_FILTER_INVALID_PID
+2ab2 COMMON_PACKET_FILTER_LIST_HEAD_IS_NOT_NULL
+2ab3 COMMON_PACKET_FILTER_NOT_ALL_FILTERS_DELETED
+2ab4 COMMON_PACKET_FILTER_INVALID_PARAMETERS
+2ab5 COMMON_PACKET_FILTER_INSUFFICIENT_RESOURCE
+2ac0 COMMON_SMAPPER_GENERIC
+2ad0 COMMON_MBULK_GENERIC
+2ad1 COMMON_MBULK_CHAIN_ALREADY_HEAD_SET
+2ad2 COMMON_MBULK_CHAIN_CANNOT_RECLAIM_AS_USED
+2ad3 COMMON_MBULK_CHAIN_EXPECTED
+2ad4 COMMON_MBULK_CHAIN_WRITE_LEN_TOO_LARGE
+2ad5 COMMON_MBULK_DAT_AT_OFFSET_OUTSIDE_DATA
+2ad6 COMMON_MBULK_DAT_MOVE_OUTSIDE_DATA
+2ad7 COMMON_MBULK_DAT_MOVE_IS_READ_ONLY
+2ad8 COMMON_MBULK_DAT_ACCESS_NOT_ALLOWED
+2ad9 COMMON_MBULK_INVALID_POOL
+2ada COMMON_MBULK_MBULK_FREE_BUT_CHAINED
+2adb COMMON_MBULK_MSIGNAL_FREE_NO_SIGNAL
+2adc COMMON_MBULK_MSIGNAL_FREE_UNDER_DELIVERY
+2add COMMON_MBULK_POOL_CHECK_SANITY_FAILURE
+2ade COMMON_MBULK_INCORRECT_REFCNT
+2adf COMMON_MBULK_POOL_GET_FREE_OUTSIDE_POOL_MEMORY
+2ae0 COMMON_MBULK_POOL_GET_FREE_WRONG_OFFSET
+2ae1 COMMON_MBULK_POOL_NOT_4K_ALIGNED
+2ae2 COMMON_MBULK_POOL_PUT_AT_WRONG_OFFSET
+2ae3 COMMON_MBULK_POOL_PUT_NONE_IN_USE
+2ae4 COMMON_MBULK_POOL_PUT_OUTSIDE_POOL_MEMORY
+2ae5 COMMON_MBULK_RESIZE_EXCEEDS_DATA_BUFSIZ
+2ae6 COMMON_MBULK_SEG_DUPLICATE_RW
+2ae7 COMMON_MBULK_SEG_GENERIC_FREE_IN_OUTBOUND
+2ae8 COMMON_MBULK_SEG_GENERIC_FREE_NO_RETURN_TO_HOST
+2ae9 COMMON_MBULK_SEG_GENERIC_FREE_NOT_IN_USE
+2aea COMMON_MBULK_SEG_GENERIC_FREE_PTR_OUTSIDE_POOLS
+2aeb COMMON_MBULK_SEG_GENERIC_FREE_UNDER_DELIVERY
+2aec COMMON_MBULK_MULTIPLE_USERS
+2aed COMMON_MBULK_TOO_LARGE_SIZE_REQUESTED
+2aee COMMON_MBULK_TRIM_EXCEEDS_ACTUAL_DATA_LEN
+2aef COMMON_MBULK_SMAPPER_OP_NOT_SUPPORTED
+2af0 COMMON_GENERIC_EDP
+2af1 COMMON_GENERIC_RESET
+2af2 COMMON_CACHE_UNALIGNED_ADDR
+2af3 COMMON_MBULK_SMAPPER_FREE_NON_SMAPPER_MBULK
+2af4 COMMON_FSMLITE_GENERIC
+2aff COMMON_PLACEHOLDER_PLACEHOLDER_MAX
+mibkey 543
+0000 MIBKEY_NULL
+0001 DOT11RSNASTATSSTAADDRESS
+03ef UNIFIAPOLBCINTERVAL
+03f9 UNIFIDNSSUPPORTACTIVATED
+0401 UNIFIOFFCHANNELSCHEDULETIMEOUT
+040b UNIFIFRAMERESPONSETIMEOUT
+0069 DOT11RSNASTATSROBUSTMGMTCCMPREPLAYS
+041b UNIFICONNECTIONFAILURETIMEOUT
+042b UNIFICONNECTINGPROBETIMEOUT
+0439 UNIFIDISCONNECTTIMEOUT
+0449 UNIFIFRAMERESPONSECFMTXLIFETIMETIMEOUT
+0451 UNIFIFRAMERESPONSECFMFAILURETIMEOUT
+0459 UNIFIFORCEACTIVEDURATION
+0469 UNIFIMLMESCANMAXNUMBEROFPROBESETS
+046f UNIFIMLMESCANSTOPIFLESSTHANXFRAMES
+0477 UNIFIAPASSOCIATIONTIMEOUT
+0481 UNIFIHOSTNUMANTENNACONTROLACTIVATED
+0489 UNIFIMLMESTATIONINACTIVITYTIMEOUT
+0491 UNIFIMLMECLIINACTIVITYTIMEOUT
+0499 UNIFIMLMESTATIONINITIALKICKTIMEOUT
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+04a7 UNIFIUARTPIOS
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+0079 DOT11TDLSPEERUAPSDINDICATIONWINDOW
+04bf UNIFIEXTERNALCLOCKDETECT
+04c7 UNIFIEXTERNALFASTCLOCKREQUEST
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+04e3 UNIFIEXTERNALFASTCLOCKREQUESTPIO
+04ed UNIFIRXDATARATE
+04f5 UNIFIRSSI
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+0503 UNIFISNR
+0081 DOT11ASSOCIATIONSAQUERYMAXIMUMTIMEOUT
+050b UNIFILASTBSSSNR
+0511 UNIFISWTXTIMEOUT
+0519 UNIFIHWTXTIMEOUT
+0523 UNIFITXDATARATE
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+0533 UNIFIRSSIMAXAVERAGINGPERIOD
+053f UNIFIRSSIMINRECEIVEDFRAMES
+0549 UNIFILASTBSSTXDATARATE
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+0557 UNIFIMACRAMEDEBUGSTATS
+0561 UNIFICURRENTTSFTIME
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+0573 UNIFIBATXENABLETID
+057d UNIFITRAFFICTHRESHOLDTOSETUPBA
+0587 UNIFIDPLANETXAMSDUHWCAPABILITY
+058f UNIFIDPLANETXAMSDUSUBFRAMECOUNTMAX
+059f UNIFIBACONFIG
+05ab UNIFIBATXMAXNUMBER
+05b3 UNIFIMOVEBKTOBE
+05b9 UNIFIBEACONRECEIVED
+0093 DOT11ASSOCIATIONSAQUERYRETRYTIMEOUT
+05c1 UNIFIPSLEAKYAP
+05cb UNIFITQAMACTIVATED
+05d3 UNIFIOUTPUTRADIOINFOTOKERNELLOG
+05db UNIFINOACKACTIVATIONCOUNT
+05e3 UNIFIRXFCSERRORCOUNT
+05eb UNIFIBEACONSRECEIVEDPERCENTAGE
+05f7 UNIFIARPDETECTACTIVATED
+05ff UNIFIARPDETECTRESPONSECOUNTER
+0609 UNIFIENABLEMGMTTXPACKETSTATS
+0613 UNIFIQUEUESTATSENABLE
+061d UNIFIDPDMASTERSWITCH
+0629 UNIFIGOOGLEMAXNUMBEROFPERIODICSCANS
+062f UNIFIGOOGLEMAXRSSISAMPLESIZE
+0635 UNIFIGOOGLEMAXHOTLISTAPS
+063b UNIFIGOOGLEMAXSIGNIFICANTWIFICHANGEAPS
+0641 UNIFIGOOGLEMAXBSSIDHISTORYENTRIES
+0647 UNIFIMACBEACONTIMEOUT
+0651 UNIFIMIFOFFALLOWED
+0659 UNIFIBLOCKSCANAFTERNUMSCHEDVIF
+00a3 DOT11RTSTHRESHOLD
+0663 UNIFISTAUSESONEANTENNAWHENIDLE
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+0673 UNIFIAPUSESONEANTENNAWHENPEERSIDLE
+067d DEPRECATED_UNIFIUPDATEANTENNACAPABILITIESWHENSCANNING
+0685 UNIFIPREFERREDANTENNABITMAP
+068f UNIFIMAXCONCURRENTMACS
+0697 UNIFIROAMDEAUTHREASON
+069f UNIFIROAMTRACKINGSCANPERIOD
+426f UNIFIROAMCUFACTOR
+429f UNIFIROAMCUSCANTRIGGER
+42ad UNIFIROAMRSSIBOOST
+42b9 UNIFIROAMRSSIFACTOR
+06ad UNIFIROAMCULOCAL
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+42ff UNIFIRXEXTERNALGAIN
+430d UNIFIRXRSSIADJUSTMENTS
+4319 UNIFISARBACKOFF
+433f UNIFISCANPARAMETERS
+06bb UNIFIROAMCUSCANNOCANDIDATEDELTATRIGGER
+06c9 UNIFIROAMAPSELECTDELTAFACTOR
+06d7 UNIFIROAMCUWEIGHT
+44d5 UNIFISTATICDPDGAIN
+44e1 UNIFITHROUGHPUTDEBUG
+44eb UNIFITXANTENNACONNECTIONLOSSFREQUENCY
+06e5 UNIFIROAMRSSIWEIGHT
+44fb UNIFITXANTENNACONNECTIONLOSS
+4509 UNIFITXANTENNAMAXGAINFREQUENCY
+4519 UNIFITXANTENNAMAXGAIN
+4527 UNIFITXDETECTORFREQUENCYCOMPENSATION
+4535 UNIFITXDETECTORTEMPERATURECOMPENSATION
+4543 UNIFITXFTRIMSETTINGS
+4551 UNIFITXGAINSETTINGS
+455f UNIFITXGAINSTEPSETTINGS
+456d UNIFITXOOBCONSTRAINTS
+457b UNIFITXOPENLOOPFREQUENCYCOMPENSATION
+06f3 UNIFIROAMBSSLOADMONITORINGFREQUENCY
+4589 UNIFITXOPENLOOPTEMPERATURECOMPENSATION
+4597 UNIFITXPAGAINDPDFREQUENCYCOMPENSATION
+45a5 UNIFITXPAGAINDPDTEMPERATURECOMPENSATION
+45b3 UNIFITXPOWERDETECTORRESPONSE
+45c1 UNIFITXPOWERTRIMCONFIG
+45cd UNIFITXSETTINGS
+0701 UNIFIROAMBLACKLISTSIZE
+070f UNIFICUMEASUREMENTINTERVAL
+071f UNIFICURRENTBSSNSS
+0727 UNIFIAPMIMOUSED
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+00b9 DOT11SHORTRETRYLIMIT
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+0745 UNIFIROAMINGAKM
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+0753 UNIFICURRENTBSSCHANNELFREQUENCY
+0759 UNIFILOGGERENABLED
+0761 UNIFIMAPACKETFATEENABLED
+076b UNIFISTAVIFLINKNSS
+0773 UNIFILAANSSSPECULATIONINTERVALSLOTTIME
+0781 UNIFILAANSSSPECULATIONINTERVALSLOTMAXNUM
+078d UNIFILAABWSPECULATIONINTERVALSLOTTIME
+079b UNIFILAABWSPECULATIONINTERVALSLOTMAXNUM
+07a7 UNIFILAAMCSSPECULATIONINTERVALSLOTTIME
+07b5 UNIFILAAMCSSPECULATIONINTERVALSLOTMAXNUM
+07c1 UNIFILAAGISPECULATIONINTERVALSLOTTIME
+07cf UNIFILAAGISPECULATIONINTERVALSLOTMAXNUM
+07db UNIFILAATXDIVERSITYBEAMFORMENABLED
+07e7 UNIFILAATXDIVERSITYBEAMFORMMINMCS
+00cb DOT11LONGRETRYLIMIT
+07f3 UNIFILAATXDIVERSITYFIXMODE
+07ff UNIFILAAPROTECTIONCONFIGOVERRIDE
+0809 UNIFICSRONLYEIFSDURATION
+0811 UNIFIOVERRIDEDEFAULTBETXOPFORHT
+081b UNIFIOVERRIDEDEFAULTBETXOP
+0825 UNIFIRXABBTRIMSETTINGS
+082d UNIFIRADIOTRIMSENABLE
+0839 UNIFIHARDWAREPLATFORM
+0841 UNIFIFORCECHANNELBW
+084b UNIFIDPDTRAININGDURATION
+0855 UNIFITXPOWERTRIMCOMMONCONFIG
+0863 UNIFIIQDEBUGENABLED
+086b UNIFICOEXDEBUGOVERRIDEBT
+0873 UNIFILTEMAILBOX
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+088d UNIFILTEENABLEPOWERBACKOFF
+0895 UNIFILTEENABLETIMEDOMAIN
+089d UNIFILTEENABLELTECOEX
+00dd DOT11FRAGMENTATIONTHRESHOLD
+08a5 UNIFILTEBAND40POWERBACKOFFCHANNELS
+08b5 UNIFILTEBAND40POWERBACKOFFRSRPLOW
+08c5 UNIFILTEBAND40POWERBACKOFFRSRPHIGH
+08d5 UNIFILTEBAND40POWERBACKOFFRSRPAVERAGINGALPHA
+08dd UNIFILTESETCHANNEL
+08e5 UNIFILTESETPOWERBACKOFF
+08ed UNIFILTESETTDDDEBUGMODE
+08f5 UNIFILTEBAND40AVOIDCHANNELS
+0905 UNIFILTEBAND41AVOIDCHANNELS
+0915 UNIFILTEBAND7AVOIDCHANNELS
+0925 UNIFIAPSCANABSENCEDURATION
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+0941 UNIFIMLMEAPKEEPALIVETIMEOUTCHECK
+094d UNIFIMLMEGOKEEPALIVETIMEOUTCHECK
+0959 UNIFIBSSMAXIDLEPERIOD
+0967 UNIFISTAIDLEMODEENABLED
+0971 UNIFIFASTPOWERSAVETIMEOUTAGGRESSIVE
+00f3 DOT11RTSSUCCESSCOUNT
+0981 UNIFIIDLEMODELISTENINTERVALSKIPPINGDTIM
+0997 UNIFIIDLEMODEP2PLISTENINTERVALSKIPPINGDTIM
+09a9 UNIFIAPIDLEMODEENABLED
+09b3 UNIFIFASTPOWERSAVETIMEOUT
+0019 DOT11RSNASTATSTKIPLOCALMICFAILURES
+09c5 UNIFIFASTPOWERSAVETIMEOUTSMALL
+09d5 UNIFIMLMESTAKEEPALIVETIMEOUT
+09e1 UNIFIMLMEAPKEEPALIVETIMEOUT
+09ed UNIFIMLMEGOKEEPALIVETIMEOUT
+09f9 UNIFISTAROUTERADVERTISEMENTMINIMUMINTERVALTOFORWARD
+0a09 UNIFIROAMCONNECTIONQUALITYCHECKWAITAFTERCONNECT
+0a13 UNIFIAPBEACONMAXDRIFT
+0a1d UNIFIBSSMAXIDLEPERIODACTIVATED
+0103 DOT11ACKFAILURECOUNT
+0a25 UNIFIVIFIDLEMONITORTIME
+0a31 UNIFIDISABLELEGACYPOWERSAVE
+0a39 UNIFIDEBUGFORCEACTIVE
+0a41 UNIFISTATIONACTIVITYIDLETIME
+0a4b UNIFIDMSACTIVATED
+0a53 UNIFIPOWERMANAGEMENTDELAYTIMEOUT
+0a63 UNIFIAPSDSERVICEPERIODTIMEOUT
+0a71 UNIFICONCURRENTPOWERMANAGEMENTDELAYTIMEOUT
+0a81 UNIFISTATIONQOSINFO
+0a89 UNIFILISTENINTERVALSKIPPINGDTIM
+0a9f UNIFILISTENINTERVAL
+0aad UNIFILEGACYPSPOLLTIMEOUT
+0abb UNIFIBEACONSKIPPINGCONTROL
+0113 DOT11MULTICASTRECEIVEDFRAMECOUNT
+0acf UNIFITOGGLEPOWERDOMAIN
+0ad7 UNIFIP2PLISTENINTERVALSKIPPINGDTIM
+0ae9 UNIFIFRAGMENTATIONDURATION
+0af5 UNIFIIDLEMODELITEENABLED
+0aff UNIFIIDLEMODEENABLED
+0b09 UNIFIDTIMWAITTIMEOUT
+0b13 UNIFILISTENINTERVALMAXTIME
+0b23 UNIFISCANMAXPROBETRANSMITLIFETIME
+0b2f UNIFIPOWERSAVETRANSITIONPACKETTHRESHOLD
+0b37 UNIFIPROBERESPONSELIFETIME
+0b41 UNIFIPROBERESPONSEMAXRETRY
+0b4d UNIFITRAFFICANALYSISPERIOD
+0b57 UNIFIAGGRESSIVEPOWERSAVETRANSITIONPERIOD
+0123 DOT11FCSERRORCOUNT
+0b5f UNIFIACTIVETIMEAFTERMOREBIT
+0b67 UNIFIDEFAULTDWELLTIME
+0b6f UNIFIVHTCAPABILITIES
+0b89 UNIFIMAXVIFSCHEDULEDURATION
+0b91 UNIFIVIFLONGINTERVALTIME
+0b99 UNIFIDISALLOWSCHEDRELINQUISH
+0ba1 UNIFIRAMEDPLANEOPERATIONTIMEOUT
+0bab UNIFIDEBUGKEEPRADIOON
+0bb3 UNIFIFORCEFIXEDDURATIONSCHEDULE
+0bbb UNIFIRAMEUPDATEMIBS
+0bc1 UNIFIGOSCANABSENCEDURATION
+0bc9 UNIFIGOSCANABSENCEPERIOD
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+2279 unifiMaxConcurrentMACs
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+2281 unifiOverrideDpdLutPerRadio
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+2295 unifiRoamCUFactor
+2298 unifiRoamRSSIBoost
+2299 UnifiRoamTrackingScanPeriod
+2300 unifiRoamCuLocal
+2301 unifiRoamCUScanNoCandidateDeltaTrigger
+2302 unifiRoamAPSelectDeltaFactor
+2303 unifiRoamCUWeight
+2305 unifiRoamRssiweight
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+2307 unifiRSSICURoamScanTrigger
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+2310 unifiRoamBlacklistSize
+2311 unifiCUMeasurementInterval
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+2316 unifiRoamingAKM
+2317 unifiCurrentBssBandwidth
+2318 unifiCurrentBssChannelFrequency
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+2336 unifiLaaGiSpeculationIntervalSlotTime
+2337 unifiLaaGiSpeculationIntervalSlotMaxNum
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+2351 UnifiLaaTxDiversityBeamformMinMcs
+2352 UnifiLaaTxDiversityFixMode
+2356 unifiLaaProtectionConfigOverride
+2358 unifiRateStatsRTSErrorCount
+2362 unifiCSROnlyEIFSDuration
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+2430 unifiLteMailbox
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+2441 unifiLteSetPowerBackoff
+2442 unifiLteSetTddDebugMode
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+2486 unifiMLMEAPKeepAliveTimeoutCheck
+2487 unifiMLMEGOKeepAliveTimeoutCheck
+2488 unifiBSSMaxIdlePeriod
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+2496 unifiIdlemodeP2PListenIntervalSkippingDTIM
+2497 unifiAPIdleModeEnabled
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+2501 unifiFastPowerSaveTimeOutSmall
+2502 unifiMLMESTAKeepAliveTimeout
+2503 unifiMLMEAPKeepAliveTimeout
+2504 unifiMLMEGOKeepAliveTimeout
+2505 unifiSTARouterAdvertisementMinimumIntervalToForward
+2506 unifiRoamConnectionQualityCheckWaitAfterConnect
+2507 unifiApBeaconMaxDrift
+2508 unifiBSSMaxIdlePeriodActivated
+2509 unifiVifIdleMonitorTime
+2510 unifiDisableLegacyPowerSave
+2511 unifiDebugForceActive
+2512 unifiStationActivityIdleTime
+2513 unifiDmsActivated
+2514 unifiPowerManagementDelayTimeout
+2515 unifiAPSDServicePeriodTimeout
+2516 unifiConcurrentPowerManagementDelayTimeout
+2517 unifiStationQosInfo
+2518 unifiListenIntervalSkippingDTIM
+2519 unifiListenInterval
+2520 unifiLegacyPsPollTimeout
+2521 unifiBeaconSkippingControl
+2522 unifiTogglePowerDomain
+2523 unifiP2PListenIntervalSkippingDTIM
+2524 unifiFragmentationDuration
+2526 unifiIdleModeLiteEnabled
+2527 unifiIdleModeEnabled
+2529 unifiDTIMWaitTimeout
+2530 unifiListenIntervalMaxTime
+2531 unifiScanMaxProbeTransmitLifetime
+2532 unifiPowerSaveTransitionPacketThreshold
+2533 unifiProbeResponseLifetime
+2534 unifiProbeResponseMaxRetry
+2535 unifiTrafficAnalysisPeriod
+2536 unifiAggressivePowerSaveTransitionPeriod
+2537 unifiActiveTimeAfterMoreBit
+2538 unifiDefaultDwellTime
+2540 unifiVhtCapabilities
+2541 unifiMAXVifScheduleDuration
+2542 unifiVifLongIntervalTime
+2543 unifiDisallowSchedRelinquish
+2544 unifiRameDplaneOperationTimeout
+2545 unifiDebugKeepRadioOn
+2546 unifiForceFixedDurationSchedule
+2547 unifiRameUpdateMibs
+2548 unifiGOScanAbsenceDuration
+2549 unifiGOScanAbsencePeriod
+2550 unifiMaxClient
+2556 unifiTdlsInP2pActivated
+2558 unifiTdlsActivated
+2559 unifiTdlsTPThresholdPktSecs
+2560 unifiTdlsRssiThreshold
+2561 unifiTdlsMaximumRetry
+2562 unifiTdlsTPMonitorSecs
+2563 unifiTdlsBasicHtMcsSet
+2564 unifiTdlsBasicVhtMcsSet
+2565 dot11TDLSDiscoveryRequestWindow
+2566 dot11TDLSResponseTimeout
+2567 dot11TDLSChannelSwitchActivated
+2568 unifiTdlsDesignForTestMode
+2569 unifiTdlsWiderBandwidthProhibited
+2577 unifiTdlsKeyLifeTimeInterval
+2578 unifiTdlsTeardownFrameTxTimeout
+2580 unifiWifiSharingActivated
+2582 unifiWiFiSharing5GHzChannel
+2583 unifiWifiSharingChannelSwitchCount
+2584 unifiChannelAnnouncementCount
+2585 unifiRATestStoredSA
+2586 unifiRATestStoreFrame
+2587 dot11TDLSPeerUAPSDBufferSTAActivated
+2600 unifiProbeResponseLifetimeP2P
+2601 unifiStaChannelSwitchSlowApActivated
+2604 unifiStaChannelSwitchSlowApMaxTime
+2605 unifiStaChannelSwitchSlowApPollInterval
+2606 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+2607 unifiMLMEScanMaxAerials
+2650 unifiAPFActivated
+2651 unifiAPFVersion
+2652 unifiAPFMaxSize
+2653 unifiAPFActiveModeEnabled
+4001 unifiCSROnlyMIBShield
+4071 unifiPrivateBbbTxFilterConfig
+4075 unifiPrivateSWAGCFrontEndGain
+4076 unifiPrivateSWAGCFrontEndLoss
+4077 unifiPrivateSWAGCExtThresh
+4078 unifiCSROnlyPowerCalDelay
+4079 unifiRxAgcControl
+4130 deprecated_unifiWapiQosMask
+4139 unifiWMMStallEnable
+4148 unifiRaaTxHostRate
+4149 unifiFallbackShortFrameRetryDistribution
+4150 unifiRXTHROUGHPUTLOW
+4151 unifiRXTHROUGHPUTHIGH
+4152 unifiSetFixedAMPDUAggregationSize
+4153 unifiThroughputDebugReportInterval
+4154 unifiDplaneTest1
+4155 unifiDplaneTest2
+4156 unifiDplaneTest3
+4157 unifiDplaneTest4
+4171 unifiPreEBRTWindow
+4173 unifiPostEBRTWindow
+4179 unifiPsPollThreshold
+430 dot11RSNAStatsSTAAddress
+433 dot11RSNAStatsTKIPICVErrors
+434 dot11RSNAStatsTKIPLocalMICFailures
+435 dot11RSNAStatsTKIPRemoteMICFailures
+436 dot11RSNAStatsCCMPReplays
+437 dot11RSNAStatsCCMPDecryptErrors
+438 dot11RSNAStatsTKIPReplays
+441 dot11RSNAStatsRobustMgmtCCMPReplays
+5000 unifiSableContainerSizeConfiguration
+5001 unifiSableFrameLogMode
+5002 unifiSableFrameLogCpuThresPercent
+5003 unifiSableFrameLogCpuOverheadPercent
+5010 unifiDebugSVCModeStackHighWaterMark
+5023 unifiOverrideEDCAParamBE
+5024 unifiOverrideEDCAParamBEEnable
+5026 unifiPanicSubSystemControl
+5027 unifiFaultEnable
+5028 unifiFaultSubSystemControl
+5029 unifiDebugModuleControl
+5030 unifiTxUsingLdpcActivated
+5031 unifiTxSettings
+5032 unifiTxGainSettings
+5033 unifiTxAntennaConnectionLossFrequency
+5034 unifiTxAntennaConnectionLoss
+5035 unifiTxAntennaMaxGainFrequency
+5036 unifiTxAntennaMaxGain
+5037 unifiRxExternalGainFrequency
+5038 unifiRxExternalGain
+5040 unifiTxSGI20Activated
+5041 unifiTxSGI40Activated
+5042 unifiTxSGI80Activated
+5043 unifiTxSGI160Activated
+5044 unifiMacAddressRandomisation
+5047 unifiMacAddressRandomisationMask
+5050 unifiWipsActivated
+5054 unifiRfTestModeActivated
+5055 unifiTxPowerDetectorResponse
+5056 unifiTxDetectorTemperatureCompensation
+5057 unifiTxDetectorFrequencyCompensation
+5058 unifiTxOpenLoopTemperatureCompensation
+5059 unifiTxOpenLoopFrequencyCompensation
+5060 unifiTxOfdmSelect
+5061 unifiTxDigGain
+5062 unifiChipTemperature
+5063 UnifiBatteryVoltage
+5064 unifiTxOOBConstraints
+5066 unifiTxPaGainDpdTemperatureCompensation
+5067 unifiTxPaGainDpdFrequencyCompensation
+5072 unifiTxPowerTrimConfig
+5080 unifiForceShortSlotTime
+5081 unifiTxGainStepSettings
+5082 unifiDebugDisableRadioNannyActions
+5083 unifiRxCckModemSensitivity
+5084 unifiDpdPerBandwidth
+5085 unifiBBVersion
+5086 unifiRFVersion
+5087 unifiReadHardwareCounter
+5088 unifiClearRadioTrimCache
+5089 unifiRadioTXSettingsRead
+5090 unifiModemSgiOffset
+5091 unifiRadioTxPowerOverride
+5092 unifiRxRadioCsMode
+5093 unifiRxPriEnergyDetThreshold
+5094 unifiRxSecEnergyDetThreshold
+5095 unifiAgcThresholds
+5096 unifiRadioRXSettingsRead
+5097 unifiStaticDpdGain
+5098 unifiIQBufferSize
+5099 unifiNarrowbandCCAThresholds
+5100 unifiRadioCCADebug
+5101 unifiCCACSThresh
+5102 unifiCCAMasterSwitch
+5103 unifiRxSyncCCACfg
+5104 unifiMacCCABusyTime
+5105 unifiMacSecChanClearTime
+5106 unifiDpdDebug
+5107 unifiNarrowbandCCADebug
+5109 unifiNannyTemperatureReportDelta
+5110 unifiNannyTemperatureReportInterval
+5111 unifiRadioRxDcocDebugIqValue
+5112 unifiRadioRxDcocDebug
+5113 unifiNannyRetrimDpdMod
+5114 unifiDisableDpdSubIteration
+5115 unifiRxRssiAdjustments
+5116 unifiFleximacCcaEdEnable
+5117 unifiRadioTxIqDelay
+5118 unifiDisableLNABypass
+5200 unifiEnableFlexiMacWatchdog
+53 dot11TDLSPeerUAPSDIndicationWindow
+5300 unifiRttCapabilities
+5301 unifiFtmMinDeltaFrames
+5302 unifiFtmPerBurst
+5303 unifiFtmBurstDuration
+5304 unifiFtmNumOfBurstsExponent
+5305 unifiFtmASAPModeActivated
+5306 unifiFtmResponderActivated
+5307 unifiFtmDefaultSessionEstablishmentTimeout
+5308 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+5309 unifiFtmDefaultGapBetweenBursts
+5310 unifiFtmDefaultTriggerDelay
+5311 unifiFtmDefaultEndBurstDelay
+5312 unifiFtmRequestValidationEnabled
+5313 unifiFtmResponseValidationEnabled
+5314 unifiFtmUseResponseParameters
+5315 unifiFtmInitialResponseTimeout
+5320 unifiFtmDSPInpBW
+5321 unifiFtmOFDMCutOffset
+5322 unifiFtmMeanAroundCluster
+5410 unifiMLMEScanContinueIfMoreThanXAps
+5411 unifiMLMEScanStopIfLessThanXNewAps
+5412 unifiScanMultiVifActivated
+5413 unifiScanNewAlgorithmActivated
+6010 unifiUnsyncVifLnaEnabled
+6011 unifiTPCMinPower2GMIMO
+6012 unifiTPCMinPower5GMIMO
+6013 unifiLnaControlEnabled
+6014 unifiLnaControlRssiThresholdLower
+6015 unifiLnaControlRssiThresholdUpper
+6016 unifiPowerIsGrip
+6018 unifiLowPowerRxConfig
+6019 unifiTPCEnabled
+6020 unifiCurrentTxpowerLevel
+6021 unifiUserSetTxpowerLevel
+6022 unifiTPCMaxPowerRSSIThreshold
+6023 unifiTPCMinPowerRSSIThreshold
+6024 unifiTPCMinPower2G
+6025 unifiTPCMinPower5G
+6026 unifiSarBackoff
+6027 unifiTPCUseAfterConnectRsp
+6028 unifiRadioLpRxRssiThresholdLower
+6029 unifiRadioLpRxRssiThresholdUpper
+6032 unifiTestTxPowerEnable
+6033 unifiLteCoexMaxPowerRSSIThreshold
+6034 unifiLteCoexMinPowerRSSIThreshold
+6035 unifiLteCoexPowerReduction
+6050 unifiPMFAssociationComebackTimeDelta
+6060 unifiTestTspecHack
+6061 unifiTestTspecHackValue
+6069 unifiDebugInstantDelivery
+6071 unifiDebugEnable
+6073 unifiDPlaneDebug
+6080 unifiNANActivated
+6081 unifiNANBeaconCapabilities
+6082 unifiNANMaxConcurrentClusters
+6083 unifiNANMaxConcurrentPublishes
+6084 unifiNANMaxConcurrentSubscribes
+6085 unifiNANMaxServiceNameLength
+6086 unifiNANMaxMatchFilterLength
+6087 unifiNANMaxTotalMatchFilterLength
+6088 unifiNANMaxServiceSpecificInfoLength
+6089 unifiNANMaxVSADataLength
+6090 unifiNANMaxMeshDataLength
+6091 unifiNANMaxNDIInterfaces
+6092 unifiNANMaxNDPSessions
+6093 unifiNANMaxAppInfoLength
+6094 unifiNANMatchExpirationTime
+6095 unifiNANDefaultScanDwellTime
+6096 unifiNANDefaultScanPeriod
+6097 unifiNANMaxChannelSwitchTime
+6098 unifiNANMacRandomisationActivated
+6100 hutsReadWriteDataElementInt32
+6101 hutsReadWriteDataElementBoolean
+6102 hutsReadWriteDataElementOctetString
+6103 hutsReadWriteTableInt16Row
+6104 hutsReadWriteTableOctetStringRow
+6105 hutsReadWriteRemoteProcedureCallInt32
+6107 hutsReadWriteRemoteProcedureCallOctetString
+6108 hutsReadWriteInternalAPIInt16
+6109 hutsReadWriteInternalAPIUint16
+6110 hutsReadWriteInternalAPIUint32
+6111 hutsReadWriteInternalAPIInt64
+6112 hutsReadWriteInternalAPIBoolean
+6113 hutsReadWriteInternalAPIOctetString
+6114 hutsReadWriteInternalAPIFixedSizeTableRow
+6115 hutsReadWriteInternalAPIVarSizeTableRow
+6116 hutsReadWriteInternalAPIFixSizeTableKey1Row
+6117 hutsReadWriteInternalAPIFixSizeTableKey2Row
+6118 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+6119 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+6120 hutsReadWriteInternalAPIFixSizeTableKeyRow
+6121 hutsReadWriteInternalAPIVarSizeTableKeyRow
+6122 unifiTestScanNoMedium
+6123 unifiDualBandConcurrency
+6124 unifiLoggerMaxDelayedEvents
+8011 unifiRegulatoryParameters
+8012 unifiSupportedChannels
+8013 unifiDefaultCountry
+8014 unifiCountryList
+8015 unifiOperatingClassParamters
+8016 unifiVifCountry
+8017 unifiNoCellMaxPower
+8018 unifiNoCellIncludedChannels
+8019 unifiRegDomVersion
+8020 unifiDefaultCountryWithoutCH12CH13
+8051 unifiReadReg
--- /dev/null
+2 dot11RSNAStatsSTAAddress
+2 dot11RSNAStatsTKIPICVErrors
+2 dot11RSNAStatsTKIPLocalMICFailures
+2 dot11RSNAStatsTKIPRemoteMICFailures
+2 dot11RSNAStatsCCMPReplays
+2 dot11RSNAStatsCCMPDecryptErrors
+2 dot11RSNAStatsTKIPReplays
+2 dot11RSNAStatsRobustMgmtCCMPReplays
+0 dot11TDLSPeerUAPSDIndicationWindow
+0 dot11AssociationSAQueryMaximumTimeout
+0 dot11AssociationSAQueryRetryTimeout
+0 dot11RTSThreshold
+0 dot11ShortRetryLimit
+0 dot11LongRetryLimit
+0 dot11FragmentationThreshold
+0 dot11RTSSuccessCount
+0 dot11ACKFailureCount
+0 dot11MulticastReceivedFrameCount
+0 dot11FCSErrorCount
+0 dot11WEPUndecryptableCount
+0 dot11manufacturerProductVersion
+0 unifiMLMEConnectionTimeOut
+0 unifiMLMEScanChannelMaxScanTime
+0 unifiMLMEScanChannelProbeInterval
+0 unifiMLMEScanChannelRule
+0 unifiMLMEDataReferenceTimeout
+0 unifiMLMEScanProbeInterval
+0 unifiMLMEScanHighRSSIThreshold
+0 unifiMLMEScanDeltaRSSIThreshold
+0 unifiMLMEScanMaximumAge
+0 unifiMLMEScanMaximumResults
+0 unifiMLMEAutonomousScanNoisy
+0 unifiChannelBusyThreshold
+0 unifiMacSequenceNumberRandomisationActivated
+0 unifiFirmwareBuildID
+0 unifiChipVersion
+0 unifiFirmwarePatchBuildID
+0 unifiMaxNumAntennaToUse
+0 unifiHtCapabilities5G
+0 unifiVhtCapabilities5G
+0 unifiHtCapabilitiesSoftAp
+0 unifiSoftAp40MHzOn24G
+0 unifiBasicCapabilities
+0 unifiExtendedCapabilities
+0 unifiHtCapabilities
+0 unifiRsnCapabilities
+0 unifi24G40MHZChannels
+0 unifiExtendedCapabilitiesDisabled
+0 unifiSupportedDataRates
+0 unifiRadioMeasurementActivated
+0 unifiRadioMeasurementCapabilities
+0 unifiVhtActivated
+0 unifiHtActivated
+0 unifiEnableTwoSimultaneousPassiveScansSameBand
+0 unifiRoamingActivated
+0 unifiRoamRssiScanTrigger
+0 unifiRoamDeltaTrigger
+0 unifiRoamCachedChannelScanPeriod
+0 unifiFullRoamScanPeriod
+0 unifiRoamSoftRoamingEnabled
+0 unifiRoamScanBand
+0 unifiRoamScanMaxActiveChannelTime
+0 unifiRoamFullChannelScanFrequency
+0 unifiRoamMode
+0 unifiRoamRssiScanNoCandidateDeltaTrigger
+0 unifiRoamEAPTimeout
+0 unifiRoamScanControl
+0 unifiRoamDfsScanMode
+0 unifiRoamScanHomeTime
+0 unifiRoamScanHomeAwayTime
+0 unifiRoamScanNProbe
+0 unifiApOlbcDuration
+0 unifiApOlbcInterval
+0 unifiDNSSupportActivated
+0 unifiOffchannelScheduleTimeout
+0 unifiFrameResponseTimeOut
+0 unifiConnectionFailureTimeout
+0 unifiConnectingProbeTimeout
+0 unifiDisconnectTimeout
+0 unifiFrameResponseCfmTxLifetimeTimeOut
+0 unifiFrameResponseCfmFailureTimeOut
+0 unifiForceActiveDuration
+0 unifiMLMEScanMaxNumberOfProbeSets
+0 unifiMLMEScanStopIfLessThanXFrames
+0 unifiAPAssociationTimeout
+0 unifiHostNumAntennaControlActivated
+0 unifiMLMEStationInactivityTimeOut
+0 unifiMLMECliInactivityTimeOut
+0 unifiMLMEStationInitialKickTimeOut
+0 unifiUartConfigure
+0 unifiUartPios
+0 unifiCrystalFrequencyTrim
+0 unifiEnableDorm
+0 unifiExternalClockDetect
+0 unifiExternalFastClockRequest
+0 unifiWatchdogTimeout
+0 unifiOverrideEDCAParamActivated
+0 unifiExternalFastClockRequestPIO
+0 unifiRxDataRate
+0 unifiRSSI
+0 unifiLastBssRSSI
+0 unifiSNR
+0 unifiLastBssSNR
+0 unifiSwTxTimeout
+0 unifiHwTxTimeout
+0 unifiTxDataRate
+0 unifiSNRExtraOffsetCCK
+0 unifiRSSIMaxAveragingPeriod
+0 unifiRSSIMinReceivedFrames
+0 unifiLastBssTxDataRate
+0 unifiDiscardedFrameCount
+0 unifiMacrameDebugStats
+0 unifiCurrentTSFTime
+0 unifiBaRxEnableTid
+0 unifiBaTxEnableTid
+0 unifiTrafficThresholdToSetupBA
+0 unifiDplaneTXAmsduHWCapability
+0 unifiDplaneTXAmsduSubframeCountMax
+0 unifiBaConfig
+0 unifiBaTxMaxNumber
+0 unifiMoveBKtoBE
+0 unifiBeaconReceived
+0 unifiPSLeakyAP
+0 unifiTqamActivated
+0 unifiOutputRadioInfoToKernelLog
+0 unifiNoAckActivationCount
+0 unifiRxFcsErrorCount
+0 unifiBeaconsReceivedPercentage
+0 unifiARPDetectActivated
+0 unifiARPDetectResponseCounter
+0 unifiEnableMgmtTxPacketStats
+0 unifiQueueStatsEnable
+0 unifiDpdMasterSwitch
+0 unifiGoogleMaxNumberOfPeriodicScans
+0 unifiGoogleMaxRSSISampleSize
+0 unifiGoogleMaxHotlistAPs
+0 unifiGoogleMaxSignificantWifiChangeAPs
+0 unifiGoogleMaxBssidHistoryEntries
+0 unifiMacBeaconTimeout
+0 unifiMIFOffAllowed
+0 unifiBlockScanAfterNumSchedVif
+0 unifiSTAUsesOneAntennaWhenIdle
+0 unifiSTAUsesMultiAntennasDuringConnect
+0 unifiAPUsesOneAntennaWhenPeersIdle
+0 deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+0 unifiPreferredAntennaBitmap
+0 unifiMaxConcurrentMACs
+0 unifiRoamDeauthReason
+0 UnifiRoamTrackingScanPeriod
+0 unifiRoamCuLocal
+0 unifiRoamCUScanNoCandidateDeltaTrigger
+0 unifiRoamAPSelectDeltaFactor
+0 unifiRoamCUWeight
+0 unifiRoamRssiweight
+0 unifiRoamBSSLoadMonitoringFrequency
+0 unifiRoamBlacklistSize
+0 unifiCUMeasurementInterval
+0 unifiCurrentBssNss
+0 unifiAPMimoUsed
+0 unifiRoamEapolTimeout
+0 unifiRoamingCount
+0 unifiRoamingAKM
+0 unifiCurrentBssBandwidth
+0 unifiCurrentBssChannelFrequency
+0 unifiLoggerEnabled
+0 unifiMaPacketFateEnabled
+0 unifiStaVifLinkNss
+0 unifiLaaNssSpeculationIntervalSlotTime
+0 unifiLaaNssSpeculationIntervalSlotMaxNum
+0 unifiLaaBwSpeculationIntervalSlotTime
+0 unifiLaaBwSpeculationIntervalSlotMaxNum
+0 unifiLaaMcsSpeculationIntervalSlotTime
+0 unifiLaaMcsSpeculationIntervalSlotMaxNum
+0 unifiLaaGiSpeculationIntervalSlotTime
+0 unifiLaaGiSpeculationIntervalSlotMaxNum
+0 UnifiLaaTxDiversityBeamformEnabled
+0 UnifiLaaTxDiversityBeamformMinMcs
+0 UnifiLaaTxDiversityFixMode
+0 unifiLaaProtectionConfigOverride
+0 unifiCSROnlyEIFSDuration
+0 unifiOverrideDefaultBETXOPForHT
+0 unifiOverrideDefaultBETXOP
+0 unifiRXABBTrimSettings
+0 unifiRadioTrimsEnable
+0 unifiHardwarePlatform
+0 unifiForceChannelBW
+0 unifiDPDTrainingDuration
+0 unifiTxPowerTrimCommonConfig
+0 unifiIqDebugEnabled
+0 unifiCoexDebugOverrideBt
+0 unifiLteMailbox
+0 unifiLteMwsSignal
+0 unifiLteEnableChannelAvoidance
+0 unifiLteEnablePowerBackoff
+0 unifiLteEnableTimeDomain
+0 unifiLteEnableLteCoex
+0 unifiLteBand40PowerBackoffChannels
+0 unifiLteBand40PowerBackoffRsrpLow
+0 unifiLteBand40PowerBackoffRsrpHigh
+0 unifiLteBand40PowerBackoffRsrpAveragingAlpha
+0 unifiLteSetChannel
+0 unifiLteSetPowerBackoff
+0 unifiLteSetTddDebugMode
+0 unifiLteBand40AvoidChannels
+0 unifiLteBand41AvoidChannels
+0 unifiLteBand7AvoidChannels
+0 unifiAPScanAbsenceDuration
+0 unifiAPScanAbsencePeriod
+0 unifiMLMESTAKeepAliveTimeoutCheck
+0 unifiMLMEAPKeepAliveTimeoutCheck
+0 unifiMLMEGOKeepAliveTimeoutCheck
+0 unifiBSSMaxIdlePeriod
+0 unifiSTAIdleModeEnabled
+0 unifiFastPowerSaveTimeOutAggressive
+0 unifiIdlemodeListenIntervalSkippingDTIM
+0 unifiIdlemodeP2PListenIntervalSkippingDTIM
+0 unifiAPIdleModeEnabled
+0 unifiFastPowerSaveTimeout
+0 unifiFastPowerSaveTimeOutSmall
+0 unifiMLMESTAKeepAliveTimeout
+0 unifiMLMEAPKeepAliveTimeout
+0 unifiMLMEGOKeepAliveTimeout
+0 unifiSTARouterAdvertisementMinimumIntervalToForward
+0 unifiRoamConnectionQualityCheckWaitAfterConnect
+0 unifiApBeaconMaxDrift
+0 unifiBSSMaxIdlePeriodActivated
+0 unifiVifIdleMonitorTime
+0 unifiDisableLegacyPowerSave
+0 unifiDebugForceActive
+0 unifiStationActivityIdleTime
+0 unifiDmsActivated
+0 unifiPowerManagementDelayTimeout
+0 unifiAPSDServicePeriodTimeout
+0 unifiConcurrentPowerManagementDelayTimeout
+0 unifiStationQosInfo
+0 unifiListenIntervalSkippingDTIM
+0 unifiListenInterval
+0 unifiLegacyPsPollTimeout
+0 unifiBeaconSkippingControl
+0 unifiTogglePowerDomain
+0 unifiP2PListenIntervalSkippingDTIM
+0 unifiFragmentationDuration
+0 unifiIdleModeLiteEnabled
+0 unifiIdleModeEnabled
+0 unifiDTIMWaitTimeout
+0 unifiListenIntervalMaxTime
+0 unifiScanMaxProbeTransmitLifetime
+0 unifiPowerSaveTransitionPacketThreshold
+0 unifiProbeResponseLifetime
+0 unifiProbeResponseMaxRetry
+0 unifiTrafficAnalysisPeriod
+0 unifiAggressivePowerSaveTransitionPeriod
+0 unifiActiveTimeAfterMoreBit
+0 unifiDefaultDwellTime
+0 unifiVhtCapabilities
+0 unifiMAXVifScheduleDuration
+0 unifiVifLongIntervalTime
+0 unifiDisallowSchedRelinquish
+0 unifiRameDplaneOperationTimeout
+0 unifiDebugKeepRadioOn
+0 unifiForceFixedDurationSchedule
+0 unifiRameUpdateMibs
+0 unifiGOScanAbsenceDuration
+0 unifiGOScanAbsencePeriod
+0 unifiMaxClient
+0 unifiTdlsInP2pActivated
+0 unifiTdlsActivated
+0 unifiTdlsTPThresholdPktSecs
+0 unifiTdlsRssiThreshold
+0 unifiTdlsMaximumRetry
+0 unifiTdlsTPMonitorSecs
+0 unifiTdlsBasicHtMcsSet
+0 unifiTdlsBasicVhtMcsSet
+0 dot11TDLSDiscoveryRequestWindow
+0 dot11TDLSResponseTimeout
+0 dot11TDLSChannelSwitchActivated
+0 unifiTdlsDesignForTestMode
+0 unifiTdlsWiderBandwidthProhibited
+0 unifiTdlsKeyLifeTimeInterval
+0 unifiTdlsTeardownFrameTxTimeout
+0 unifiWifiSharingActivated
+0 unifiWiFiSharing5GHzChannel
+0 unifiWifiSharingChannelSwitchCount
+0 unifiChannelAnnouncementCount
+0 unifiRATestStoredSA
+0 unifiRATestStoreFrame
+0 dot11TDLSPeerUAPSDBufferSTAActivated
+0 unifiProbeResponseLifetimeP2P
+0 unifiStaChannelSwitchSlowApActivated
+0 unifiStaChannelSwitchSlowApMaxTime
+0 unifiStaChannelSwitchSlowApPollInterval
+0 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+0 unifiMLMEScanMaxAerials
+0 unifiAPFActivated
+0 unifiAPFVersion
+0 unifiAPFMaxSize
+0 unifiAPFActiveModeEnabled
+0 unifiCSROnlyMIBShield
+0 unifiPrivateBbbTxFilterConfig
+0 unifiPrivateSWAGCFrontEndGain
+0 unifiPrivateSWAGCFrontEndLoss
+0 unifiPrivateSWAGCExtThresh
+0 unifiCSROnlyPowerCalDelay
+0 unifiRxAgcControl
+0 deprecated_unifiWapiQosMask
+0 unifiWMMStallEnable
+0 unifiRaaTxHostRate
+0 unifiFallbackShortFrameRetryDistribution
+0 unifiRXTHROUGHPUTLOW
+0 unifiRXTHROUGHPUTHIGH
+0 unifiSetFixedAMPDUAggregationSize
+0 unifiThroughputDebugReportInterval
+0 unifiDplaneTest1
+0 unifiDplaneTest2
+0 unifiDplaneTest3
+0 unifiDplaneTest4
+0 unifiPreEBRTWindow
+0 unifiPostEBRTWindow
+0 unifiPsPollThreshold
+0 unifiSableContainerSizeConfiguration
+0 unifiSableFrameLogMode
+0 unifiSableFrameLogCpuThresPercent
+0 unifiSableFrameLogCpuOverheadPercent
+0 unifiDebugSVCModeStackHighWaterMark
+0 unifiOverrideEDCAParamBE
+0 unifiOverrideEDCAParamBEEnable
+0 unifiFaultEnable
+0 unifiTxUsingLdpcActivated
+0 unifiTxSGI20Activated
+0 unifiTxSGI40Activated
+0 unifiTxSGI80Activated
+0 unifiTxSGI160Activated
+0 unifiMacAddressRandomisation
+0 unifiMacAddressRandomisationMask
+0 unifiWipsActivated
+0 unifiRfTestModeActivated
+0 unifiTxOfdmSelect
+0 unifiTxDigGain
+0 unifiChipTemperature
+0 UnifiBatteryVoltage
+0 unifiForceShortSlotTime
+0 unifiDebugDisableRadioNannyActions
+0 unifiRxCckModemSensitivity
+0 unifiDpdPerBandwidth
+0 unifiBBVersion
+0 unifiRFVersion
+0 unifiClearRadioTrimCache
+0 unifiRxRadioCsMode
+0 unifiRxPriEnergyDetThreshold
+0 unifiRxSecEnergyDetThreshold
+0 unifiIQBufferSize
+0 unifiCCAMasterSwitch
+0 unifiRxSyncCCACfg
+0 unifiMacSecChanClearTime
+0 unifiNannyTemperatureReportDelta
+0 unifiNannyTemperatureReportInterval
+0 unifiRadioRxDcocDebugIqValue
+0 unifiRadioRxDcocDebug
+0 unifiNannyRetrimDpdMod
+0 unifiDisableDpdSubIteration
+0 unifiFleximacCcaEdEnable
+0 unifiDisableLNABypass
+0 unifiEnableFlexiMacWatchdog
+0 unifiRttCapabilities
+0 unifiFtmMinDeltaFrames
+0 unifiFtmPerBurst
+0 unifiFtmBurstDuration
+0 unifiFtmNumOfBurstsExponent
+0 unifiFtmASAPModeActivated
+0 unifiFtmResponderActivated
+0 unifiFtmDefaultSessionEstablishmentTimeout
+0 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+0 unifiFtmDefaultGapBetweenBursts
+0 unifiFtmDefaultTriggerDelay
+0 unifiFtmDefaultEndBurstDelay
+0 unifiFtmRequestValidationEnabled
+0 unifiFtmResponseValidationEnabled
+0 unifiFtmUseResponseParameters
+0 unifiFtmInitialResponseTimeout
+0 unifiFtmDSPInpBW
+0 unifiFtmOFDMCutOffset
+0 unifiFtmMeanAroundCluster
+0 unifiMLMEScanContinueIfMoreThanXAps
+0 unifiMLMEScanStopIfLessThanXNewAps
+0 unifiScanMultiVifActivated
+0 unifiScanNewAlgorithmActivated
+0 unifiUnsyncVifLnaEnabled
+0 unifiTPCMinPower2GMIMO
+0 unifiTPCMinPower5GMIMO
+0 unifiLnaControlEnabled
+0 unifiLnaControlRssiThresholdLower
+0 unifiLnaControlRssiThresholdUpper
+0 unifiPowerIsGrip
+0 unifiLowPowerRxConfig
+0 unifiTPCEnabled
+0 unifiCurrentTxpowerLevel
+0 unifiUserSetTxpowerLevel
+0 unifiTPCMaxPowerRSSIThreshold
+0 unifiTPCMinPowerRSSIThreshold
+0 unifiTPCMinPower2G
+0 unifiTPCMinPower5G
+0 unifiTPCUseAfterConnectRsp
+0 unifiRadioLpRxRssiThresholdLower
+0 unifiRadioLpRxRssiThresholdUpper
+0 unifiTestTxPowerEnable
+0 unifiLteCoexMaxPowerRSSIThreshold
+0 unifiLteCoexMinPowerRSSIThreshold
+0 unifiLteCoexPowerReduction
+0 unifiPMFAssociationComebackTimeDelta
+0 unifiTestTspecHack
+0 unifiTestTspecHackValue
+0 unifiDebugInstantDelivery
+0 unifiDebugEnable
+0 unifiDPlaneDebug
+0 unifiNANActivated
+0 unifiNANBeaconCapabilities
+0 unifiNANMaxConcurrentClusters
+0 unifiNANMaxConcurrentPublishes
+0 unifiNANMaxConcurrentSubscribes
+0 unifiNANMaxServiceNameLength
+0 unifiNANMaxMatchFilterLength
+0 unifiNANMaxTotalMatchFilterLength
+0 unifiNANMaxServiceSpecificInfoLength
+0 unifiNANMaxVSADataLength
+0 unifiNANMaxMeshDataLength
+0 unifiNANMaxNDIInterfaces
+0 unifiNANMaxNDPSessions
+0 unifiNANMaxAppInfoLength
+0 unifiNANMatchExpirationTime
+0 unifiNANMaxChannelSwitchTime
+0 unifiNANMacRandomisationActivated
+0 hutsReadWriteDataElementInt32
+0 hutsReadWriteDataElementBoolean
+0 hutsReadWriteDataElementOctetString
+0 hutsReadWriteRemoteProcedureCallInt32
+0 hutsReadWriteInternalAPIInt16
+0 hutsReadWriteInternalAPIUint16
+0 hutsReadWriteInternalAPIUint32
+0 hutsReadWriteInternalAPIInt64
+0 hutsReadWriteInternalAPIBoolean
+0 hutsReadWriteInternalAPIOctetString
+0 unifiTestScanNoMedium
+0 unifiDualBandConcurrency
+0 unifiLoggerMaxDelayedEvents
+0 unifiSupportedChannels
+0 unifiCountryList
+0 unifiVifCountry
+0 unifiNoCellIncludedChannels
+0 unifiRegDomVersion
+0 unifiDefaultCountryWithoutCH12CH13
+2 hutsReadWriteInternalAPIFixSizeTableKeyRow
+1 hutsReadWriteInternalAPIFixSizeTableKey1Row
+1 hutsReadWriteInternalAPIFixSizeTableKey2Row
+1 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+1 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+1 hutsReadWriteInternalAPIFixedSizeTableRow
+1 hutsReadWriteInternalAPIVarSizeTableRow
+2 hutsReadWriteInternalAPIVarSizeTableKeyRow
+2 hutsReadWriteRemoteProcedureCallOctetString
+1 hutsReadWriteTableInt16Row
+1 hutsReadWriteTableOctetStringRow
+1 unifiACRetries
+1 unifiTxDataConfirm
+1 unifiAgcThresholds
+1 unifiCCACSThresh
+1 unifiDPDTrainPacketConfig
+1 unifiDebugModuleControl
+1 unifiDefaultCountry
+1 unifiDpdDebug
+1 unifiDpdPredistortGains
+1 unifiFaultSubSystemControl
+1 unifiFrameRXCounters
+1 unifiFrameTXCounters
+2 unifiLoadDpdLut
+2 unifiOverrideDpdLut
+3 unifiLoadDpdLutPerRadio
+3 unifiOverrideDpdLutPerRadio
+2 unifiMacCCABusyTime
+2 unifiModemSgiOffset
+1 unifiNANDefaultScanDwellTime
+1 unifiNANDefaultScanPeriod
+1 unifiNarrowbandCCADebug
+1 unifiNoCellMaxPower
+1 unifiOperatingClassParamters
+1 unifiOverrideEDCAParam
+1 unifiPanicSubSystemControl
+1 unifiPeerBandwidth
+1 unifiCurrentPeerNss
+1 unifiPeerTxDataRate
+1 unifiPeerRSSI
+1 unifiPeerRxRetryCount
+1 unifiPeerRxMulticastCount
+1 unifiSwToHwQueueStats
+1 unifiHostToSwQueueStats
+1 unifiRSSICURoamScanTrigger
+2 unifiRadioCCADebug
+1 unifiRadioCCAThresholds
+1 unifiNarrowbandCCAThresholds
+1 unifiRadioOnTime
+1 unifiRadioTxTime
+1 unifiRadioRxTime
+1 unifiRadioScanTime
+1 unifiRadioOnTimeNan
+2 unifiRadioRXSettingsRead
+2 unifiRadioTXSettingsRead
+1 unifiRadioTxIqDelay
+1 unifiRadioTxPowerOverride
+1 unifiRateStatsRxSuccessCount
+1 unifiRateStatsTxSuccessCount
+1 unifiRateStatsRate
+1 unifiRateStatsRTSErrorCount
+2 unifiReadHardwareCounter
+1 unifiReadReg
+1 unifiRegulatoryParameters
+1 unifiRoamCUFactor
+1 unifiRoamCUScanTrigger
+1 unifiRoamRSSIBoost
+1 unifiRoamRssiFactor
+1 unifiRxExternalGainFrequency
+1 unifiRxExternalGain
+2 unifiRxRssiAdjustments
+2 unifiSarBackoff
+1 unifiScanParameters
+1 unifiStaticDpdGain
+1 unifiThroughputDebug
+1 unifiTxAntennaConnectionLossFrequency
+1 unifiTxAntennaConnectionLoss
+1 unifiTxAntennaMaxGainFrequency
+1 unifiTxAntennaMaxGain
+1 unifiTxDetectorFrequencyCompensation
+1 unifiTxDetectorTemperatureCompensation
+1 unifiTxFtrimSettings
+1 unifiTxGainSettings
+1 unifiTxGainStepSettings
+1 unifiTxOOBConstraints
+1 unifiTxOpenLoopFrequencyCompensation
+1 unifiTxOpenLoopTemperatureCompensation
+1 unifiTxPaGainDpdFrequencyCompensation
+1 unifiTxPaGainDpdTemperatureCompensation
+1 unifiTxPowerDetectorResponse
+1 unifiTxPowerTrimConfig
+1 unifiTxSettings
--- /dev/null
+z dot11RSNAStatsSTAAddress
+z dot11RSNAStatsTKIPICVErrors
+z dot11RSNAStatsTKIPLocalMICFailures
+z dot11RSNAStatsTKIPRemoteMICFailures
+z dot11RSNAStatsCCMPReplays
+z dot11RSNAStatsCCMPDecryptErrors
+z dot11RSNAStatsTKIPReplays
+z dot11RSNAStatsRobustMgmtCCMPReplays
+z dot11TDLSPeerUAPSDIndicationWindow
+z dot11AssociationSAQueryMaximumTimeout
+z dot11AssociationSAQueryRetryTimeout
+ p dot11RTSThreshold
+ p dot11ShortRetryLimit
+ p dot11LongRetryLimit
+ p dot11FragmentationThreshold
+ p dot11RTSSuccessCount
+ p dot11ACKFailureCount
+ p dot11MulticastReceivedFrameCount
+ p dot11FCSErrorCount
+ p dot11WEPUndecryptableCount
+z dot11manufacturerProductVersion
+z unifiMLMEConnectionTimeOut
+z unifiMLMEScanChannelMaxScanTime
+z unifiMLMEScanChannelProbeInterval
+z unifiMLMEScanChannelRule
+z unifiMLMEDataReferenceTimeout
+z unifiMLMEScanProbeInterval
+z unifiMLMEScanHighRSSIThreshold
+z unifiMLMEScanDeltaRSSIThreshold
+z unifiMLMEScanMaximumAge
+z unifiMLMEScanMaximumResults
+z unifiMLMEAutonomousScanNoisy
+z unifiChannelBusyThreshold
+z unifiMacSequenceNumberRandomisationActivated
+z unifiFirmwareBuildID
+z unifiChipVersion
+z unifiFirmwarePatchBuildID
+z unifiMaxNumAntennaToUse
+z unifiHtCapabilities5G
+z unifiVhtCapabilities5G
+z unifiHtCapabilitiesSoftAp
+z unifiSoftAp40MHzOn24G
+z unifiBasicCapabilities
+z unifiExtendedCapabilities
+z unifiHtCapabilities
+z unifiRsnCapabilities
+z unifi24G40MHZChannels
+z unifiExtendedCapabilitiesDisabled
+z unifiSupportedDataRates
+z unifiRadioMeasurementActivated
+z unifiRadioMeasurementCapabilities
+z unifiVhtActivated
+z unifiHtActivated
+z unifiEnableTwoSimultaneousPassiveScansSameBand
+z unifiRoamingActivated
+z unifiRoamRssiScanTrigger
+z unifiRoamDeltaTrigger
+z unifiRoamCachedChannelScanPeriod
+z unifiFullRoamScanPeriod
+z unifiRoamSoftRoamingEnabled
+z unifiRoamScanBand
+z unifiRoamScanMaxActiveChannelTime
+z unifiRoamFullChannelScanFrequency
+z unifiRoamMode
+z unifiRoamRssiScanNoCandidateDeltaTrigger
+z unifiRoamEAPTimeout
+z unifiRoamScanControl
+z unifiRoamDfsScanMode
+z unifiRoamScanHomeTime
+z unifiRoamScanHomeAwayTime
+z unifiRoamScanNProbe
+z unifiApOlbcDuration
+z unifiApOlbcInterval
+z unifiDNSSupportActivated
+z unifiOffchannelScheduleTimeout
+z unifiFrameResponseTimeOut
+z unifiConnectionFailureTimeout
+z unifiConnectingProbeTimeout
+z unifiDisconnectTimeout
+z unifiFrameResponseCfmTxLifetimeTimeOut
+z unifiFrameResponseCfmFailureTimeOut
+z unifiForceActiveDuration
+z unifiMLMEScanMaxNumberOfProbeSets
+z unifiMLMEScanStopIfLessThanXFrames
+z unifiAPAssociationTimeout
+z unifiHostNumAntennaControlActivated
+z unifiMLMEStationInactivityTimeOut
+z unifiMLMECliInactivityTimeOut
+z unifiMLMEStationInitialKickTimeOut
+z unifiUartConfigure
+z unifiUartPios
+z unifiCrystalFrequencyTrim
+z unifiEnableDorm
+z unifiExternalClockDetect
+z unifiExternalFastClockRequest
+z unifiWatchdogTimeout
+z unifiOverrideEDCAParamActivated
+z unifiExternalFastClockRequestPIO
+ p unifiRxDataRate
+ p unifiRSSI
+z unifiLastBssRSSI
+ p unifiSNR
+z unifiLastBssSNR
+z unifiSwTxTimeout
+z unifiHwTxTimeout
+ p unifiTxDataRate
+z unifiSNRExtraOffsetCCK
+z unifiRSSIMaxAveragingPeriod
+z unifiRSSIMinReceivedFrames
+z unifiLastBssTxDataRate
+ p unifiDiscardedFrameCount
+z unifiMacrameDebugStats
+ p unifiCurrentTSFTime
+z unifiBaRxEnableTid
+z unifiBaTxEnableTid
+z unifiTrafficThresholdToSetupBA
+z unifiDplaneTXAmsduHWCapability
+z unifiDplaneTXAmsduSubframeCountMax
+z unifiBaConfig
+z unifiBaTxMaxNumber
+z unifiMoveBKtoBE
+ p unifiBeaconReceived
+ p unifiPSLeakyAP
+z unifiTqamActivated
+z unifiOutputRadioInfoToKernelLog
+ p unifiNoAckActivationCount
+ p unifiRxFcsErrorCount
+ p unifiBeaconsReceivedPercentage
+z unifiARPDetectActivated
+ p unifiARPDetectResponseCounter
+z unifiEnableMgmtTxPacketStats
+ p unifiQueueStatsEnable
+z unifiDpdMasterSwitch
+z unifiGoogleMaxNumberOfPeriodicScans
+z unifiGoogleMaxRSSISampleSize
+z unifiGoogleMaxHotlistAPs
+z unifiGoogleMaxSignificantWifiChangeAPs
+z unifiGoogleMaxBssidHistoryEntries
+z unifiMacBeaconTimeout
+z unifiMIFOffAllowed
+z unifiBlockScanAfterNumSchedVif
+z unifiSTAUsesOneAntennaWhenIdle
+z unifiSTAUsesMultiAntennasDuringConnect
+z unifiAPUsesOneAntennaWhenPeersIdle
+z deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+z unifiPreferredAntennaBitmap
+z unifiMaxConcurrentMACs
+z unifiRoamDeauthReason
+z UnifiRoamTrackingScanPeriod
+z unifiRoamCuLocal
+z unifiRoamCUScanNoCandidateDeltaTrigger
+z unifiRoamAPSelectDeltaFactor
+z unifiRoamCUWeight
+z unifiRoamRssiweight
+z unifiRoamBSSLoadMonitoringFrequency
+z unifiRoamBlacklistSize
+z unifiCUMeasurementInterval
+z unifiCurrentBssNss
+z unifiAPMimoUsed
+z unifiRoamEapolTimeout
+z unifiRoamingCount
+z unifiRoamingAKM
+z unifiCurrentBssBandwidth
+z unifiCurrentBssChannelFrequency
+z unifiLoggerEnabled
+z unifiMaPacketFateEnabled
+z unifiStaVifLinkNss
+z unifiLaaNssSpeculationIntervalSlotTime
+z unifiLaaNssSpeculationIntervalSlotMaxNum
+z unifiLaaBwSpeculationIntervalSlotTime
+z unifiLaaBwSpeculationIntervalSlotMaxNum
+z unifiLaaMcsSpeculationIntervalSlotTime
+z unifiLaaMcsSpeculationIntervalSlotMaxNum
+z unifiLaaGiSpeculationIntervalSlotTime
+z unifiLaaGiSpeculationIntervalSlotMaxNum
+z UnifiLaaTxDiversityBeamformEnabled
+z UnifiLaaTxDiversityBeamformMinMcs
+z UnifiLaaTxDiversityFixMode
+ p unifiLaaProtectionConfigOverride
+z unifiCSROnlyEIFSDuration
+z unifiOverrideDefaultBETXOPForHT
+z unifiOverrideDefaultBETXOP
+z unifiRXABBTrimSettings
+z unifiRadioTrimsEnable
+z unifiHardwarePlatform
+z unifiForceChannelBW
+z unifiDPDTrainingDuration
+z unifiTxPowerTrimCommonConfig
+z unifiIqDebugEnabled
+z unifiCoexDebugOverrideBt
+z unifiLteMailbox
+z unifiLteMwsSignal
+z unifiLteEnableChannelAvoidance
+z unifiLteEnablePowerBackoff
+z unifiLteEnableTimeDomain
+z unifiLteEnableLteCoex
+z unifiLteBand40PowerBackoffChannels
+z unifiLteBand40PowerBackoffRsrpLow
+z unifiLteBand40PowerBackoffRsrpHigh
+z unifiLteBand40PowerBackoffRsrpAveragingAlpha
+z unifiLteSetChannel
+z unifiLteSetPowerBackoff
+z unifiLteSetTddDebugMode
+z unifiLteBand40AvoidChannels
+z unifiLteBand41AvoidChannels
+z unifiLteBand7AvoidChannels
+z unifiAPScanAbsenceDuration
+z unifiAPScanAbsencePeriod
+z unifiMLMESTAKeepAliveTimeoutCheck
+z unifiMLMEAPKeepAliveTimeoutCheck
+z unifiMLMEGOKeepAliveTimeoutCheck
+z unifiBSSMaxIdlePeriod
+z unifiSTAIdleModeEnabled
+z unifiFastPowerSaveTimeOutAggressive
+z unifiIdlemodeListenIntervalSkippingDTIM
+z unifiIdlemodeP2PListenIntervalSkippingDTIM
+z unifiAPIdleModeEnabled
+z unifiFastPowerSaveTimeout
+z unifiFastPowerSaveTimeOutSmall
+z unifiMLMESTAKeepAliveTimeout
+z unifiMLMEAPKeepAliveTimeout
+z unifiMLMEGOKeepAliveTimeout
+z unifiSTARouterAdvertisementMinimumIntervalToForward
+z unifiRoamConnectionQualityCheckWaitAfterConnect
+z unifiApBeaconMaxDrift
+z unifiBSSMaxIdlePeriodActivated
+z unifiVifIdleMonitorTime
+z unifiDisableLegacyPowerSave
+z unifiDebugForceActive
+z unifiStationActivityIdleTime
+z unifiDmsActivated
+z unifiPowerManagementDelayTimeout
+ p unifiAPSDServicePeriodTimeout
+z unifiConcurrentPowerManagementDelayTimeout
+z unifiStationQosInfo
+z unifiListenIntervalSkippingDTIM
+z unifiListenInterval
+ p unifiLegacyPsPollTimeout
+z unifiBeaconSkippingControl
+z unifiTogglePowerDomain
+z unifiP2PListenIntervalSkippingDTIM
+ p unifiFragmentationDuration
+z unifiIdleModeLiteEnabled
+z unifiIdleModeEnabled
+z unifiDTIMWaitTimeout
+z unifiListenIntervalMaxTime
+z unifiScanMaxProbeTransmitLifetime
+z unifiPowerSaveTransitionPacketThreshold
+z unifiProbeResponseLifetime
+z unifiProbeResponseMaxRetry
+z unifiTrafficAnalysisPeriod
+z unifiAggressivePowerSaveTransitionPeriod
+z unifiActiveTimeAfterMoreBit
+z unifiDefaultDwellTime
+z unifiVhtCapabilities
+z unifiMAXVifScheduleDuration
+z unifiVifLongIntervalTime
+z unifiDisallowSchedRelinquish
+z unifiRameDplaneOperationTimeout
+z unifiDebugKeepRadioOn
+z unifiForceFixedDurationSchedule
+z unifiRameUpdateMibs
+z unifiGOScanAbsenceDuration
+z unifiGOScanAbsencePeriod
+z unifiMaxClient
+z unifiTdlsInP2pActivated
+z unifiTdlsActivated
+z unifiTdlsTPThresholdPktSecs
+z unifiTdlsRssiThreshold
+z unifiTdlsMaximumRetry
+z unifiTdlsTPMonitorSecs
+z unifiTdlsBasicHtMcsSet
+z unifiTdlsBasicVhtMcsSet
+z dot11TDLSDiscoveryRequestWindow
+z dot11TDLSResponseTimeout
+z dot11TDLSChannelSwitchActivated
+z unifiTdlsDesignForTestMode
+z unifiTdlsWiderBandwidthProhibited
+z unifiTdlsKeyLifeTimeInterval
+z unifiTdlsTeardownFrameTxTimeout
+z unifiWifiSharingActivated
+z unifiWiFiSharing5GHzChannel
+z unifiWifiSharingChannelSwitchCount
+z unifiChannelAnnouncementCount
+z unifiRATestStoredSA
+z unifiRATestStoreFrame
+z dot11TDLSPeerUAPSDBufferSTAActivated
+z unifiProbeResponseLifetimeP2P
+z unifiStaChannelSwitchSlowApActivated
+z unifiStaChannelSwitchSlowApMaxTime
+z unifiStaChannelSwitchSlowApPollInterval
+z unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+z unifiMLMEScanMaxAerials
+z unifiAPFActivated
+z unifiAPFVersion
+z unifiAPFMaxSize
+z unifiAPFActiveModeEnabled
+z unifiCSROnlyMIBShield
+z unifiPrivateBbbTxFilterConfig
+z unifiPrivateSWAGCFrontEndGain
+z unifiPrivateSWAGCFrontEndLoss
+z unifiPrivateSWAGCExtThresh
+z unifiCSROnlyPowerCalDelay
+z unifiRxAgcControl
+z deprecated_unifiWapiQosMask
+z unifiWMMStallEnable
+z unifiRaaTxHostRate
+z unifiFallbackShortFrameRetryDistribution
+z unifiRXTHROUGHPUTLOW
+z unifiRXTHROUGHPUTHIGH
+z unifiSetFixedAMPDUAggregationSize
+z unifiThroughputDebugReportInterval
+z unifiDplaneTest1
+z unifiDplaneTest2
+z unifiDplaneTest3
+z unifiDplaneTest4
+ p unifiPreEBRTWindow
+ p unifiPostEBRTWindow
+ p unifiPsPollThreshold
+z unifiSableContainerSizeConfiguration
+z unifiSableFrameLogMode
+z unifiSableFrameLogCpuThresPercent
+z unifiSableFrameLogCpuOverheadPercent
+z unifiDebugSVCModeStackHighWaterMark
+z unifiOverrideEDCAParamBE
+z unifiOverrideEDCAParamBEEnable
+z unifiFaultEnable
+z unifiTxUsingLdpcActivated
+z unifiTxSGI20Activated
+z unifiTxSGI40Activated
+z unifiTxSGI80Activated
+z unifiTxSGI160Activated
+z unifiMacAddressRandomisation
+z unifiMacAddressRandomisationMask
+z unifiWipsActivated
+z unifiRfTestModeActivated
+z unifiTxOfdmSelect
+z unifiTxDigGain
+z unifiChipTemperature
+z UnifiBatteryVoltage
+z unifiForceShortSlotTime
+z unifiDebugDisableRadioNannyActions
+z unifiRxCckModemSensitivity
+z unifiDpdPerBandwidth
+z unifiBBVersion
+z unifiRFVersion
+z unifiClearRadioTrimCache
+z unifiRxRadioCsMode
+z unifiRxPriEnergyDetThreshold
+z unifiRxSecEnergyDetThreshold
+z unifiIQBufferSize
+z unifiCCAMasterSwitch
+z unifiRxSyncCCACfg
+z unifiMacSecChanClearTime
+z unifiNannyTemperatureReportDelta
+z unifiNannyTemperatureReportInterval
+z unifiRadioRxDcocDebugIqValue
+z unifiRadioRxDcocDebug
+z unifiNannyRetrimDpdMod
+z unifiDisableDpdSubIteration
+z unifiFleximacCcaEdEnable
+z unifiDisableLNABypass
+z unifiEnableFlexiMacWatchdog
+z unifiRttCapabilities
+z unifiFtmMinDeltaFrames
+z unifiFtmPerBurst
+z unifiFtmBurstDuration
+z unifiFtmNumOfBurstsExponent
+z unifiFtmASAPModeActivated
+z unifiFtmResponderActivated
+z unifiFtmDefaultSessionEstablishmentTimeout
+z unifiFtmDefaultGapBeforeFirstBurstPerResponder
+z unifiFtmDefaultGapBetweenBursts
+z unifiFtmDefaultTriggerDelay
+z unifiFtmDefaultEndBurstDelay
+z unifiFtmRequestValidationEnabled
+z unifiFtmResponseValidationEnabled
+z unifiFtmUseResponseParameters
+z unifiFtmInitialResponseTimeout
+z unifiFtmDSPInpBW
+z unifiFtmOFDMCutOffset
+z unifiFtmMeanAroundCluster
+z unifiMLMEScanContinueIfMoreThanXAps
+z unifiMLMEScanStopIfLessThanXNewAps
+z unifiScanMultiVifActivated
+z unifiScanNewAlgorithmActivated
+z unifiUnsyncVifLnaEnabled
+z unifiTPCMinPower2GMIMO
+z unifiTPCMinPower5GMIMO
+z unifiLnaControlEnabled
+z unifiLnaControlRssiThresholdLower
+z unifiLnaControlRssiThresholdUpper
+z unifiPowerIsGrip
+z unifiLowPowerRxConfig
+z unifiTPCEnabled
+ p unifiCurrentTxpowerLevel
+z unifiUserSetTxpowerLevel
+z unifiTPCMaxPowerRSSIThreshold
+z unifiTPCMinPowerRSSIThreshold
+z unifiTPCMinPower2G
+z unifiTPCMinPower5G
+z unifiTPCUseAfterConnectRsp
+z unifiRadioLpRxRssiThresholdLower
+z unifiRadioLpRxRssiThresholdUpper
+z unifiTestTxPowerEnable
+z unifiLteCoexMaxPowerRSSIThreshold
+z unifiLteCoexMinPowerRSSIThreshold
+z unifiLteCoexPowerReduction
+z unifiPMFAssociationComebackTimeDelta
+z unifiTestTspecHack
+z unifiTestTspecHackValue
+z unifiDebugInstantDelivery
+z unifiDebugEnable
+ p unifiDPlaneDebug
+z unifiNANActivated
+z unifiNANBeaconCapabilities
+z unifiNANMaxConcurrentClusters
+z unifiNANMaxConcurrentPublishes
+z unifiNANMaxConcurrentSubscribes
+z unifiNANMaxServiceNameLength
+z unifiNANMaxMatchFilterLength
+z unifiNANMaxTotalMatchFilterLength
+z unifiNANMaxServiceSpecificInfoLength
+z unifiNANMaxVSADataLength
+z unifiNANMaxMeshDataLength
+z unifiNANMaxNDIInterfaces
+z unifiNANMaxNDPSessions
+z unifiNANMaxAppInfoLength
+z unifiNANMatchExpirationTime
+z unifiNANMaxChannelSwitchTime
+z unifiNANMacRandomisationActivated
+z hutsReadWriteDataElementInt32
+z hutsReadWriteDataElementBoolean
+z hutsReadWriteDataElementOctetString
+ p hutsReadWriteRemoteProcedureCallInt32
+z hutsReadWriteInternalAPIInt16
+z hutsReadWriteInternalAPIUint16
+z hutsReadWriteInternalAPIUint32
+ p hutsReadWriteInternalAPIInt64
+z hutsReadWriteInternalAPIBoolean
+z hutsReadWriteInternalAPIOctetString
+z unifiTestScanNoMedium
+z unifiDualBandConcurrency
+z unifiLoggerMaxDelayedEvents
+z unifiSupportedChannels
+z unifiCountryList
+ p unifiVifCountry
+z unifiNoCellIncludedChannels
+z unifiRegDomVersion
+z unifiDefaultCountryWithoutCH12CH13
+z hutsReadWriteInternalAPIFixSizeTableKeyRow
+ p hutsReadWriteInternalAPIFixSizeTableKey1Row
+ p hutsReadWriteInternalAPIFixSizeTableKey2Row
+z hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+z hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+z hutsReadWriteInternalAPIFixedSizeTableRow
+z hutsReadWriteInternalAPIVarSizeTableRow
+z hutsReadWriteInternalAPIVarSizeTableKeyRow
+z hutsReadWriteRemoteProcedureCallOctetString
+ p hutsReadWriteTableInt16Row
+z hutsReadWriteTableOctetStringRow
+ p unifiACRetries
+z unifiTxDataConfirm
+z unifiAgcThresholds
+z unifiCCACSThresh
+z unifiDPDTrainPacketConfig
+z unifiDebugModuleControl
+z unifiDefaultCountry
+z unifiDpdDebug
+z unifiDpdPredistortGains
+z unifiFaultSubSystemControl
+ p unifiFrameRXCounters
+ p unifiFrameTXCounters
+z unifiLoadDpdLut
+z unifiOverrideDpdLut
+z unifiLoadDpdLutPerRadio
+z unifiOverrideDpdLutPerRadio
+z unifiMacCCABusyTime
+z unifiModemSgiOffset
+z unifiNANDefaultScanDwellTime
+z unifiNANDefaultScanPeriod
+z unifiNarrowbandCCADebug
+z unifiNoCellMaxPower
+z unifiOperatingClassParamters
+z unifiOverrideEDCAParam
+z unifiPanicSubSystemControl
+z unifiPeerBandwidth
+z unifiCurrentPeerNss
+z unifiPeerTxDataRate
+z unifiPeerRSSI
+z unifiPeerRxRetryCount
+z unifiPeerRxMulticastCount
+ p unifiSwToHwQueueStats
+ p unifiHostToSwQueueStats
+z unifiRSSICURoamScanTrigger
+z unifiRadioCCADebug
+z unifiRadioCCAThresholds
+z unifiNarrowbandCCAThresholds
+z unifiRadioOnTime
+z unifiRadioTxTime
+z unifiRadioRxTime
+z unifiRadioScanTime
+z unifiRadioOnTimeNan
+z unifiRadioRXSettingsRead
+z unifiRadioTXSettingsRead
+z unifiRadioTxIqDelay
+z unifiRadioTxPowerOverride
+ p unifiRateStatsRxSuccessCount
+ p unifiRateStatsTxSuccessCount
+z unifiRateStatsRate
+ p unifiRateStatsRTSErrorCount
+z unifiReadHardwareCounter
+z unifiReadReg
+z unifiRegulatoryParameters
+z unifiRoamCUFactor
+z unifiRoamCUScanTrigger
+z unifiRoamRSSIBoost
+z unifiRoamRssiFactor
+z unifiRxExternalGainFrequency
+z unifiRxExternalGain
+z unifiRxRssiAdjustments
+z unifiSarBackoff
+z unifiScanParameters
+z unifiStaticDpdGain
+ p unifiThroughputDebug
+z unifiTxAntennaConnectionLossFrequency
+z unifiTxAntennaConnectionLoss
+z unifiTxAntennaMaxGainFrequency
+z unifiTxAntennaMaxGain
+z unifiTxDetectorFrequencyCompensation
+z unifiTxDetectorTemperatureCompensation
+z unifiTxFtrimSettings
+z unifiTxGainSettings
+z unifiTxGainStepSettings
+z unifiTxOOBConstraints
+z unifiTxOpenLoopFrequencyCompensation
+z unifiTxOpenLoopTemperatureCompensation
+z unifiTxPaGainDpdFrequencyCompensation
+z unifiTxPaGainDpdTemperatureCompensation
+z unifiTxPowerDetectorResponse
+z unifiTxPowerTrimConfig
+z unifiTxSettings
--- /dev/null
+Element dot11RSNAStatsSTAAddress BasicType string BERType string OID 1.2.3.2.1.2.3.1.430 Access read_only PSID 430 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType var BFAccess RO
+Element dot11RSNAStatsTKIPICVErrors BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.433 Access read_only Min 0 Max 4294967295 PSID 433 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPLocalMICFailures BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.434 Access read_only Min 0 Max 4294967295 PSID 434 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPRemoteMICFailures BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.435 Access read_only Min 0 Max 4294967295 PSID 435 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsCCMPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.436 Access read_only Min 0 Max 4294967295 PSID 436 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsCCMPDecryptErrors BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.437 Access read_only Min 0 Max 4294967295 PSID 437 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.438 Access read_only Min 0 Max 4294967295 PSID 438 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsRobustMgmtCCMPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.441 Access read_only Min 0 Max 4294967295 PSID 441 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11TDLSPeerUAPSDIndicationWindow BasicType integer BERType integer OID 1.2.3.1.53 Access read_write PSID 53 Default 1 BFType uint16 BFAccess RW
+Element dot11AssociationSAQueryMaximumTimeout BasicType integer BERType integer_counter32 OID 1.2.3.1.100 Access read_write Min 0 Max 4294967295 PSID 100 Default 1000 BFType int64 BFAccess RW
+Element dot11AssociationSAQueryRetryTimeout BasicType integer BERType integer_counter32 OID 1.2.3.1.101 Access read_write Max 4294967295 PSID 101 Default 201 BFType int64 BFAccess RW
+Element dot11RTSThreshold BasicType integer BERType integer_unsigned32 OID 1.2.3.1.121 Access read_write Min 0 Max 65536 PSID 121 Default 65536 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RW
+Element dot11ShortRetryLimit BasicType integer BERType integer OID 1.2.3.1.122 Access read_write Min 1 Max 255 PSID 122 Default 32 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11LongRetryLimit BasicType integer BERType integer OID 1.2.3.1.123 Access read_write Min 1 Max 255 PSID 123 Default 4 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11FragmentationThreshold BasicType integer BERType integer OID 1.2.3.1.124 Access read_write Min 256 Max 11500 PSID 124 Default 3000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11RTSSuccessCount BasicType integer BERType integer_counter32 OID 1.2.3.1.146 Access read_only Min 0 Max 4294967295 PSID 146 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11ACKFailureCount BasicType integer BERType integer_counter32 OID 1.2.3.1.148 Access read_only Min 0 Max 4294967295 PSID 148 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11MulticastReceivedFrameCount BasicType integer BERType integer_counter32 OID 1.2.3.1.150 Access read_only Min 0 Max 4294967295 PSID 150 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11FCSErrorCount BasicType integer BERType integer_counter32 OID 1.2.3.1.151 Access read_only Max 4294967295 PSID 151 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11WEPUndecryptableCount BasicType integer BERType integer_counter32 OID 1.2.3.1.153 Access read_only Min 0 Max 4294967295 PSID 153 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11manufacturerProductVersion BasicType string BERType string OID 1.2.3.1.183 Access read_only Min 0 Max 300 PSID 183 GetFunction mibgetfirmwareproductversion BFType var BFAccess RO
+Element unifiMLMEConnectionTimeOut BasicType integer BERType integer OID 1.2.3.1.2000 Access read_write PSID 2000 BFType uint16 BFAccess RW
+Element unifiMLMEScanChannelMaxScanTime BasicType string BERType string OID 1.2.3.1.2001 Access read_write Min 14 Max 14 PSID 2001 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiMLMEScanChannelProbeInterval BasicType string BERType string OID 1.2.3.1.2002 Access read_write Min 14 Max 14 PSID 2002 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiMLMEScanChannelRule BasicType string BERType string OID 1.2.3.1.2003 Access read_write Min 4 Max 4 PSID 2003 Default 0x00:0x01:0x00:0x01 BFType var BFAccess RW
+Element unifiMLMEDataReferenceTimeout BasicType integer BERType integer OID 1.2.3.1.2005 Access read_only Max 65534 PSID 2005 Default 0 BFType uint16 BFAccess RO
+Element unifiMLMEScanProbeInterval BasicType integer BERType integer OID 1.2.3.1.2007 Access read_write PSID 2007 BFType uint16 BFAccess RW
+Element unifiMLMEScanHighRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.2008 Access read_write Min -128 Max 127 PSID 2008 Default -90 BFType int16 BFAccess RW
+Element unifiMLMEScanDeltaRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.2010 Access read_write Min 1 Max 255 PSID 2010 Default 20 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaximumAge BasicType integer BERType integer OID 1.2.3.1.2014 Access read_write PSID 2014 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaximumResults BasicType integer BERType integer OID 1.2.3.1.2015 Access read_write PSID 2015 Default 100 BFType uint16 BFAccess RW
+Element unifiMLMEAutonomousScanNoisy BasicType integer BERType string OID 1.2.3.1.2016 Access read_write PSID 2016 BFType bool BFAccess RW
+Element unifiChannelBusyThreshold BasicType integer BERType integer OID 1.2.3.1.2018 Access read_write Min 1 Max 100 PSID 2018 Default 25 BFType uint16 BFAccess RW
+Element unifiMacSequenceNumberRandomisationActivated BasicType integer BERType string OID 1.2.3.1.2020 Access read_write PSID 2020 Default 1 BFType bool BFAccess RW
+Element unifiFirmwareBuildID BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2021 Access read_only PSID 2021 GetFunction mibgetfirmwarebuildid BFType uint32 BFAccess RO
+Element unifiChipVersion BasicType integer BERType integer OID 1.2.3.1.2022 Access read_only PSID 2022 BFType uint16 BFAccess RO
+Element unifiFirmwarePatchBuildID BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2023 Access read_only PSID 2023 GetFunction mibgetfirmwarebuildid BFType uint32 BFAccess RO
+Element unifiMaxNumAntennaToUse BasicType integer BERType integer OID 1.2.3.1.2025 Access read_write PSID 2025 Default 0x0202 BFType uint16 BFAccess RW
+Element unifiHtCapabilities5G BasicType string BERType string OID 1.2.3.1.2026 Access read_write Min 21 Max 21 PSID 2026 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiVhtCapabilities5G BasicType string BERType string OID 1.2.3.1.2027 Access read_write Min 12 Max 12 PSID 2027 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiHtCapabilitiesSoftAp BasicType string BERType string OID 1.2.3.1.2028 Access read_write Min 21 Max 21 PSID 2028 Default 0xef:0x0a:0x17:0xff:0xff:0x00:0x00:0x01:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiSoftAp40MHzOn24G BasicType integer BERType string OID 1.2.3.1.2029 Access read_only PSID 2029 Default 0 BFType bool BFAccess RO
+Element unifiBasicCapabilities BasicType integer BERType integer OID 1.2.3.1.2030 Access read_write PSID 2030 Default 0x1730 BFType uint16 BFAccess RW
+Element unifiExtendedCapabilities BasicType string BERType string OID 1.2.3.1.2031 Access read_write Min 9 Max 9 PSID 2031 Default 0x01:0x00:0x08:0x00:0x00:0x00:0x00:0x40:0x80 BFType var BFAccess RW
+Element unifiHtCapabilities BasicType string BERType string OID 1.2.3.1.2032 Access read_write Min 21 Max 21 PSID 2032 Default 0xef:0x0a:0x17:0xff:0xff:0x00:0x00:0x01:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiRsnCapabilities BasicType integer BERType integer OID 1.2.3.1.2034 Access read_write PSID 2034 BFType uint16 BFAccess RW
+Element unifi24G40MHZChannels BasicType integer BERType string OID 1.2.3.1.2035 Access read_only PSID 2035 Default 0 BFType bool BFAccess RO
+Element unifiExtendedCapabilitiesDisabled BasicType integer BERType string OID 1.2.3.1.2036 Access read_write PSID 2036 Default 0 BFType bool BFAccess RW
+Element unifiSupportedDataRates BasicType string BERType string OID 1.2.3.1.2041 Access read_only Min 2 Max 16 PSID 2041 Default 0x02:0x04:0x0b:0x0c:0x12:0x16:0x18:0x24:0x30:0x48:0x60:0x6c BFType var BFAccess RO
+Element unifiRadioMeasurementActivated BasicType integer BERType string OID 1.2.3.1.2043 Access read_write PSID 2043 Default 1 BFType bool BFAccess RW
+Element unifiRadioMeasurementCapabilities BasicType string BERType string OID 1.2.3.1.2044 Access read_write Min 5 Max 5 PSID 2044 Default 0x73:0x00:0x00:0x00:0x04 BFType var BFAccess RW
+Element unifiVhtActivated BasicType integer BERType string OID 1.2.3.1.2045 Access read_write PSID 2045 Default 0 BFType bool BFAccess RW
+Element unifiHtActivated BasicType integer BERType string OID 1.2.3.1.2046 Access read_write PSID 2046 Default 1 BFType bool BFAccess RW
+Element unifiEnableTwoSimultaneousPassiveScansSameBand BasicType integer BERType string OID 1.2.3.1.2047 Access read_write PSID 2047 Default 0 BFType bool BFAccess RW
+Element unifiRoamingActivated BasicType integer BERType string OID 1.2.3.1.2049 Access read_write PSID 2049 Default 1 BFType bool BFAccess RW
+Element unifiRoamRssiScanTrigger BasicType integer BERType integer OID 1.2.3.1.2050 Access read_write Min -128 Max 127 PSID 2050 Default -75 BFType int16 BFAccess RW
+Element unifiRoamDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2051 Access read_write Min 1 Max 255 PSID 2051 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamCachedChannelScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2052 Access read_write Min 1 PSID 2052 Default 20000000 BFType uint32 BFAccess RW
+Element unifiFullRoamScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2053 Access read_write Min 1 PSID 2053 Default 30000000 BFType uint32 BFAccess RW
+Element unifiRoamSoftRoamingEnabled BasicType integer BERType string OID 1.2.3.1.2054 Access read_write PSID 2054 BFType bool BFAccess RW
+Element unifiRoamScanBand BasicType integer BERType integer OID 1.2.3.1.2055 Access read_write Min 1 Max 2 PSID 2055 Default 2 BFType uint16 BFAccess RW
+Element unifiRoamScanMaxActiveChannelTime BasicType integer BERType integer OID 1.2.3.1.2057 Access read_write Min 1 PSID 2057 Default 120 BFType uint16 BFAccess RW
+Element unifiRoamFullChannelScanFrequency BasicType integer BERType integer OID 1.2.3.1.2058 Access read_write Min 1 PSID 2058 Default 9 BFType uint16 BFAccess RW
+Element unifiRoamMode BasicType integer BERType integer OID 1.2.3.1.2060 Access read_write Min 0 Max 2 PSID 2060 Default 1 BFType uint16 BFAccess RW
+Element unifiRoamRssiScanNoCandidateDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2064 Access read_only Min 1 Max 255 PSID 2064 Default 10 BFType uint16 BFAccess RO
+Element unifiRoamEAPTimeout BasicType integer BERType integer OID 1.2.3.1.2065 Access read_only PSID 2065 Default 200 BFType uint16 BFAccess RO
+Element unifiRoamScanControl BasicType integer BERType string OID 1.2.3.1.2067 Access read_write PSID 2067 Default 0 BFType bool BFAccess RW
+Element unifiRoamDfsScanMode BasicType integer BERType integer OID 1.2.3.1.2068 Access read_write Min 0 Max 2 PSID 2068 Default 1 BFType uint16 BFAccess RW
+Element unifiRoamScanHomeTime BasicType integer BERType integer OID 1.2.3.1.2069 Access read_write Min 40 PSID 2069 Default 45 BFType uint16 BFAccess RW
+Element unifiRoamScanHomeAwayTime BasicType integer BERType integer OID 1.2.3.1.2070 Access read_write Min 40 PSID 2070 Default 100 BFType uint16 BFAccess RW
+Element unifiRoamScanNProbe BasicType integer BERType integer OID 1.2.3.1.2072 Access read_write PSID 2072 Default 2 BFType uint16 BFAccess RW
+Element unifiApOlbcDuration BasicType integer BERType integer OID 1.2.3.1.2076 Access read_write PSID 2076 Default 300 BFType uint16 BFAccess RW
+Element unifiApOlbcInterval BasicType integer BERType integer OID 1.2.3.1.2077 Access read_write PSID 2077 Default 2000 BFType uint16 BFAccess RW
+Element unifiDNSSupportActivated BasicType integer BERType string OID 1.2.3.1.2078 Access read_write PSID 2078 Default 1 BFType bool BFAccess RW
+Element unifiOffchannelScheduleTimeout BasicType integer BERType integer OID 1.2.3.1.2079 Access read_write PSID 2079 Default 1000 BFType uint16 BFAccess RW
+Element unifiFrameResponseTimeOut BasicType integer BERType integer OID 1.2.3.1.2080 Access read_write Min 0 Max 500 PSID 2080 Default 200 BFType uint16 BFAccess RW
+Element unifiConnectionFailureTimeout BasicType integer BERType integer OID 1.2.3.1.2081 Access read_write Min 0 Max 20000 PSID 2081 Default 10000 BFType uint16 BFAccess RW
+Element unifiConnectingProbeTimeout BasicType integer BERType integer OID 1.2.3.1.2082 Access read_write Min 0 Max 100 PSID 2082 Default 10 BFType uint16 BFAccess RW
+Element unifiDisconnectTimeout BasicType integer BERType integer OID 1.2.3.1.2083 Access read_write Min 0 Max 3000 PSID 2083 Default 1500 BFType uint16 BFAccess RW
+Element unifiFrameResponseCfmTxLifetimeTimeOut BasicType integer BERType integer OID 1.2.3.1.2084 Access read_write PSID 2084 Default 10 BFType uint16 BFAccess RW
+Element unifiFrameResponseCfmFailureTimeOut BasicType integer BERType integer OID 1.2.3.1.2085 Access read_write PSID 2085 Default 40 BFType uint16 BFAccess RW
+Element unifiForceActiveDuration BasicType integer BERType integer OID 1.2.3.1.2086 Access read_write Min 0 Max 1000 PSID 2086 Default 200 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaxNumberOfProbeSets BasicType integer BERType integer OID 1.2.3.1.2087 Access read_write PSID 2087 BFType uint16 BFAccess RW
+Element unifiMLMEScanStopIfLessThanXFrames BasicType integer BERType integer OID 1.2.3.1.2088 Access read_write PSID 2088 Default 4 BFType uint16 BFAccess RW
+Element unifiAPAssociationTimeout BasicType integer BERType integer OID 1.2.3.1.2089 Access read_write PSID 2089 Default 2000 BFType uint16 BFAccess RW
+Element unifiHostNumAntennaControlActivated BasicType integer BERType string OID 1.2.3.1.2091 Access read_only PSID 2091 Default 0 BFType bool BFAccess RO
+Element unifiMLMEStationInactivityTimeOut BasicType integer BERType integer OID 1.2.3.1.2098 Access read_write PSID 2098 Default 3 BFType uint16 BFAccess RW
+Element unifiMLMECliInactivityTimeOut BasicType integer BERType integer OID 1.2.3.1.2099 Access read_write PSID 2099 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEStationInitialKickTimeOut BasicType integer BERType integer OID 1.2.3.1.2100 Access read_write PSID 2100 Default 50 BFType uint16 BFAccess RW
+Element unifiUartConfigure BasicType integer BERType integer OID 1.2.3.1.2110 Access read_write PSID 2110 Hide BFType uint16 BFAccess RW
+Element unifiUartPios BasicType integer BERType integer OID 1.2.3.1.2111 Access read_write NamedValues no_pios:1:tx_rx_only:2:tx_rx_rts_cts:3 NamedValues no_pios:1:tx_rx_only:2:tx_rx_rts_cts:3 PSID 2111 Hide BFType uint16 BFAccess RW
+Element unifiCrystalFrequencyTrim BasicType integer BERType integer OID 1.2.3.1.2141 Access read_only Max 63 PSID 2141 Default 31 BFType uint16 BFAccess RO
+Element unifiEnableDorm BasicType integer BERType string OID 1.2.3.1.2142 Access read_write PSID 2142 Default 1 BFType bool BFAccess RW
+Element unifiExternalClockDetect BasicType integer BERType string OID 1.2.3.1.2146 Access read_only PSID 2146 Default 0 BFType bool BFAccess RO
+Element unifiExternalFastClockRequest BasicType integer BERType integer OID 1.2.3.1.2149 Access read_only NamedValues no_clock_request:0:totem_pole:1:inverted_totem_pole:2:open_drain:3:open_source:4 NamedValues no_clock_request:0:totem_pole:1:inverted_totem_pole:2:open_drain:3:open_source:4 PSID 2149 Default 1 BFType uint16 BFAccess RO
+Element unifiWatchdogTimeout BasicType integer BERType integer OID 1.2.3.1.2152 Access read_only Min 1 PSID 2152 Default 1500 BFType uint16 BFAccess RO
+Element unifiOverrideEDCAParamActivated BasicType integer BERType string OID 1.2.3.1.2155 Access read_write PSID 2155 Default 0 BFType bool BFAccess RW
+Element unifiExternalFastClockRequestPIO BasicType integer BERType integer OID 1.2.3.1.2158 Access read_only Max 15 PSID 2158 Default 9 BFType uint16 BFAccess RO
+Element unifiRxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2196 Access read_only PSID 2196 GetPerVifFunction mibrxdatarateget BFType uint32 BFAccess RO
+Element unifiRSSI BasicType integer BERType integer OID 1.2.3.1.2200 Access read_only PSID 2200 GetPerVifFunction mibgetrssi BFType int16 BFAccess RO
+Element unifiLastBssRSSI BasicType integer BERType integer OID 1.2.3.1.2201 Access read_write PSID 2201 BFType int16 BFAccess RW
+Element unifiSNR BasicType integer BERType integer OID 1.2.3.1.2202 Access read_only PSID 2202 GetPerVifFunction mibgetsnr BFType int16 BFAccess RO
+Element unifiLastBssSNR BasicType integer BERType integer OID 1.2.3.1.2203 Access read_write PSID 2203 BFType int16 BFAccess RW
+Element unifiSwTxTimeout BasicType integer BERType integer OID 1.2.3.1.2204 Access read_write PSID 2204 Default 5 BFType uint16 BFAccess RW
+Element unifiHwTxTimeout BasicType integer BERType integer OID 1.2.3.1.2205 Access read_write PSID 2205 Default 512 BFType uint16 BFAccess RW
+Element unifiTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2208 Access read_only PSID 2208 GetPerVifFunction mibtxdatarateget BFType uint32 BFAccess RO
+Element unifiSNRExtraOffsetCCK BasicType integer BERType integer OID 1.2.3.1.2209 Access read_only PSID 2209 Default 8 BFType int16 BFAccess RO
+Element unifiRSSIMaxAveragingPeriod BasicType integer BERType integer OID 1.2.3.1.2210 Access read_only Min 1 PSID 2210 Default 3000 BFType uint16 BFAccess RO
+Element unifiRSSIMinReceivedFrames BasicType integer BERType integer OID 1.2.3.1.2211 Access read_only Min 1 PSID 2211 Default 2 BFType uint16 BFAccess RO
+Element unifiLastBssTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2213 Access read_write PSID 2213 BFType uint32 BFAccess RW
+Element unifiDiscardedFrameCount BasicType integer BERType integer OID 1.2.3.1.2214 Access read_only PSID 2214 GetPerVifFunction mibpktcntget BFType uint16 BFAccess RO
+Element unifiMacrameDebugStats BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2215 Access read_write PSID 2215 GetFunction mibuint32get SetFunction mibuint32set BFType uint32 BFAccess RW
+Element unifiCurrentTSFTime BasicType integer BERType integer OID 1.2.3.1.2218 Access read_only PSID 2218 GetPerVifFunction mibtsftime BFType int64 BFAccess RO
+Element unifiBaRxEnableTid BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2219 Access read_write PSID 2219 Default 0x1555 BFType uint32 BFAccess RW
+Element unifiBaTxEnableTid BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2221 Access read_write PSID 2221 Default 0x0557 BFType uint32 BFAccess RW
+Element unifiTrafficThresholdToSetupBA BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2222 Access read_write PSID 2222 Default 100 BFType uint32 BFAccess RW
+Element unifiDplaneTXAmsduHWCapability BasicType integer BERType integer OID 1.2.3.1.2223 Access read_only PSID 2223 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiDplaneTXAmsduSubframeCountMax BasicType integer BERType integer OID 1.2.3.1.2224 Access read_write Min 1 Max 4 PSID 2224 Default 3 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiBaConfig BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2225 Access read_write PSID 2225 Default 0x3fff01 BFType uint32 BFAccess RW
+Element unifiBaTxMaxNumber BasicType integer BERType integer OID 1.2.3.1.2226 Access read_write PSID 2226 Default 0x10 BFType uint16 BFAccess RW
+Element unifiMoveBKtoBE BasicType integer BERType string OID 1.2.3.1.2227 Access read_write PSID 2227 BFType bool BFAccess RW
+Element unifiBeaconReceived BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2228 Access read_only PSID 2228 GetPerVifFunction mibllsstatsget BFType uint32 BFAccess RO
+Element unifiPSLeakyAP BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2234 Access read_only PSID 2234 Default 0 GetPerVifFunction mibllsstatsget BFType uint32 BFAccess RO
+Element unifiTqamActivated BasicType integer BERType string OID 1.2.3.1.2235 Access read_write PSID 2235 Default 0 BFType bool BFAccess RW
+Element unifiOutputRadioInfoToKernelLog BasicType integer BERType string OID 1.2.3.1.2239 Access read_write PSID 2239 Default 0 BFType bool BFAccess RW
+Element unifiNoAckActivationCount BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2240 Access read_only PSID 2240 GetPerVifFunction mibuint32get BFType uint32 BFAccess RO
+Element unifiRxFcsErrorCount BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2241 Access read_only PSID 2241 GetPerVifFunction mibuint32get BFType uint32 BFAccess RO
+Element unifiBeaconsReceivedPercentage BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2245 Access read_only PSID 2245 Default 0 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RO
+Element unifiARPDetectActivated BasicType integer BERType string OID 1.2.3.1.2246 Access read_write PSID 2246 Default 0 BFType bool BFAccess RW
+Element unifiARPDetectResponseCounter BasicType integer BERType integer OID 1.2.3.1.2247 Access read_write PSID 2247 Default 0 GetPerVifFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiEnableMgmtTxPacketStats BasicType integer BERType string OID 1.2.3.1.2249 Access read_write PSID 2249 Default 1 SetFunction mib_mgmt_tx_packet_stats_set BFType bool BFAccess RW
+Element unifiQueueStatsEnable BasicType integer BERType string OID 1.2.3.1.2252 Access read_write PSID 2252 Default 0 SetPerVifFunction mibuint16set BFType bool BFAccess RW
+Element unifiDpdMasterSwitch BasicType integer BERType integer OID 1.2.3.1.2256 Access read_write PSID 2256 Default 0 GetFunction mibuint16get SetFunction mibricechangefsmparams BFType uint16 BFAccess RW
+Element unifiGoogleMaxNumberOfPeriodicScans BasicType integer BERType integer OID 1.2.3.1.2260 Access read_write PSID 2260 BFType uint16 BFAccess RW
+Element unifiGoogleMaxRSSISampleSize BasicType integer BERType integer OID 1.2.3.1.2261 Access read_write PSID 2261 BFType uint16 BFAccess RW
+Element unifiGoogleMaxHotlistAPs BasicType integer BERType integer OID 1.2.3.1.2262 Access read_write PSID 2262 BFType uint16 BFAccess RW
+Element unifiGoogleMaxSignificantWifiChangeAPs BasicType integer BERType integer OID 1.2.3.1.2263 Access read_write PSID 2263 BFType uint16 BFAccess RW
+Element unifiGoogleMaxBssidHistoryEntries BasicType integer BERType integer OID 1.2.3.1.2264 Access read_write PSID 2264 BFType uint16 BFAccess RW
+Element unifiMacBeaconTimeout BasicType integer BERType integer OID 1.2.3.1.2270 Access read_write PSID 2270 Default 128 BFType uint16 BFAccess RW
+Element unifiMIFOffAllowed BasicType integer BERType string OID 1.2.3.1.2271 Access read_write PSID 2271 Default 1 BFType bool BFAccess RW
+Element unifiBlockScanAfterNumSchedVif BasicType integer BERType integer OID 1.2.3.1.2272 Access read_write PSID 2272 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiSTAUsesOneAntennaWhenIdle BasicType integer BERType string OID 1.2.3.1.2274 Access read_write PSID 2274 Default 1 BFType bool BFAccess RW
+Element unifiSTAUsesMultiAntennasDuringConnect BasicType integer BERType string OID 1.2.3.1.2275 Access read_write PSID 2275 Default 1 BFType bool BFAccess RW
+Element unifiAPUsesOneAntennaWhenPeersIdle BasicType integer BERType string OID 1.2.3.1.2276 Access read_write PSID 2276 Default 0 SetFunction mibuint16set BFType bool BFAccess RW
+Element deprecated_unifiUpdateAntennaCapabilitiesWhenScanning BasicType integer BERType string OID 1.2.3.1.2277 Access read_write PSID 2277 Default 0 BFType bool BFAccess RW
+Element unifiPreferredAntennaBitmap BasicType integer BERType integer OID 1.2.3.1.2278 Access read_write PSID 2278 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiMaxConcurrentMACs BasicType integer BERType integer OID 1.2.3.1.2279 Access read_write PSID 2279 Default 2 BFType uint16 BFAccess RW
+Element unifiRoamDeauthReason BasicType integer BERType integer OID 1.2.3.1.2294 Access read_write PSID 2294 Default 3 BFType uint16 BFAccess RW
+Element UnifiRoamTrackingScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2299 Access read_write Min 1 PSID 2299 Default 5000000 BFType uint32 BFAccess RW
+Element unifiRoamCuLocal BasicType integer BERType integer OID 1.2.3.1.2300 Access read_write Min 0 Max 255 PSID 2300 Default 0 BFType uint16 BFAccess RW
+Element unifiRoamCUScanNoCandidateDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2301 Access read_write Min 0 Max 100 PSID 2301 Default 15 BFType uint16 BFAccess RW
+Element unifiRoamAPSelectDeltaFactor BasicType integer BERType integer OID 1.2.3.1.2302 Access read_write Min 0 Max 100 PSID 2302 Default 20 BFType uint16 BFAccess RW
+Element unifiRoamCUWeight BasicType integer BERType integer OID 1.2.3.1.2303 Access read_write Min 0 Max 100 PSID 2303 Default 35 BFType uint16 BFAccess RW
+Element unifiRoamRssiweight BasicType integer BERType integer OID 1.2.3.1.2305 Access read_write Min 0 Max 100 PSID 2305 Default 65 BFType uint16 BFAccess RW
+Element unifiRoamBSSLoadMonitoringFrequency BasicType integer BERType integer OID 1.2.3.1.2309 Access read_write Min 0 Max 100 PSID 2309 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamBlacklistSize BasicType integer BERType integer OID 1.2.3.1.2310 Access read_write Min 0 Max 100 PSID 2310 Default 5 BFType uint16 BFAccess RW
+Element unifiCUMeasurementInterval BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2311 Access read_write Min 1 Max 1000 PSID 2311 Default 500 BFType uint32 BFAccess RW
+Element unifiCurrentBssNss BasicType integer BERType integer OID 1.2.3.1.2312 Access read_only NamedValues SISO:0:MIMO_2x2:1:MIMO_3x3:2:MIMO_4x4:3 PSID 2312 Default 0 BFType uint16 BFAccess RO
+Element unifiAPMimoUsed BasicType integer BERType string OID 1.2.3.1.2313 Access read_only PSID 2313 Default 0 BFType bool BFAccess RO
+Element unifiRoamEapolTimeout BasicType integer BERType integer OID 1.2.3.1.2314 Access read_write Min 0 Max 100 PSID 2314 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamingCount BasicType integer BERType integer OID 1.2.3.1.2315 Access read_only PSID 2315 Default 0 BFType uint16 BFAccess RO
+Element unifiRoamingAKM BasicType integer BERType integer OID 1.2.3.1.2316 Access read_only NamedValues AKM_None:0:AKM_OKC:1:AKM_FT_1X:2:AKM_PSK:3:AKM_FT_PSK:4:AKM_PMKSA_Caching:5:AKM_SAE:6:AKM_FT_SAE:7 NamedValues AKM_None:0:AKM_OKC:1:AKM_FT_1X:2:AKM_PSK:3:AKM_FT_PSK:4:AKM_PMKSA_Caching:5:AKM_SAE:6:AKM_FT_SAE:7 PSID 2316 Default 0 BFType uint16 BFAccess RO
+Element unifiCurrentBssBandwidth BasicType integer BERType integer OID 1.2.3.1.2317 Access read_only PSID 2317 BFType uint16 BFAccess RO
+Element unifiCurrentBssChannelFrequency BasicType integer BERType integer OID 1.2.3.1.2318 Access read_only PSID 2318 BFType uint16 BFAccess RO
+Element unifiLoggerEnabled BasicType integer BERType integer OID 1.2.3.1.2320 Access read_only NamedValues Disabled:0:Partial:1:Full:2 PSID 2320 Default 1 BFType uint16 BFAccess RO
+Element unifiMaPacketFateEnabled BasicType integer BERType string OID 1.2.3.1.2321 Access read_write PSID 2321 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiStaVifLinkNss BasicType integer BERType integer OID 1.2.3.1.2324 Access read_only NamedValues SISO:0:MIMO_2x2:1:MIMO_3x3:2:MIMO_4x4:3 PSID 2324 Default 0 BFType uint16 BFAccess RO
+Element unifiLaaNssSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2330 Access read_write PSID 2330 Default 300 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaNssSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2331 Access read_write PSID 2331 Default 5 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaBwSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2332 Access read_write PSID 2332 Default 300 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaBwSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2333 Access read_write PSID 2333 Default 8 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaMcsSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2334 Access read_write PSID 2334 Default 100 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaMcsSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2335 Access read_write PSID 2335 Default 10 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaGiSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2336 Access read_write PSID 2336 Default 100 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaGiSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2337 Access read_write PSID 2337 Default 50 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element UnifiLaaTxDiversityBeamformEnabled BasicType integer BERType string OID 1.2.3.1.2350 Access read_write PSID 2350 Default 0 SetFunction mibboolset GetFunction mibboolget BFType bool BFAccess RW
+Element UnifiLaaTxDiversityBeamformMinMcs BasicType integer BERType integer OID 1.2.3.1.2351 Access read_write PSID 2351 Default 2 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element UnifiLaaTxDiversityFixMode BasicType integer BERType integer OID 1.2.3.1.2352 Access read_write PSID 2352 Default 0 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaProtectionConfigOverride BasicType integer BERType integer OID 1.2.3.1.2356 Access read_write PSID 2356 Default 6 SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiCSROnlyEIFSDuration BasicType integer BERType integer OID 1.2.3.1.2362 Access read_only PSID 2362 Default 12 BFType uint16 BFAccess RO
+Element unifiOverrideDefaultBETXOPForHT BasicType integer BERType integer OID 1.2.3.1.2364 Access read_write PSID 2364 Default 171 BFType uint16 BFAccess RW
+Element unifiOverrideDefaultBETXOP BasicType integer BERType integer OID 1.2.3.1.2365 Access read_write PSID 2365 Default 78 BFType uint16 BFAccess RW
+Element unifiRXABBTrimSettings BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2366 Access read_write PSID 2366 Default 0 BFType uint32 BFAccess RW
+Element unifiRadioTrimsEnable BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2367 Access read_write PSID 2367 Default 0x0ff5 SetFunction mibricechangenonfsmparams BFType uint32 BFAccess RW
+Element unifiHardwarePlatform BasicType integer BERType integer OID 1.2.3.1.2369 Access read_write NamedValues PLATFORM_NOT_SET:0:T20:2:LASSEN_SMDK:17:LEMAN_S620_SMDK:18:LASSEN_UNIV:19:LEMAN_S612_SMDK:21:LASSEN_A5_REV02_2017_07:23:LASSEN_A7_REV01_2017_07:24:LASSEN_J3NEO_2017_08:25:LASSEN_J3TOP:26:LASSEN_J7TOP:27:LEMAN_S620_MAESTRO:28:LEMAN_S620_UNIV:31:LASSEN_A530D:33:LEMAN_S620_WING_DUALFEM:35:LASSEN_A6_SMA600_2018_04:36:LEMAN_S620_MAESTRO_SISO:39:LEMAN_S620_ROBUSTA2_DUALFEM:40:LEMAN_S620_ROBUSTA2_NOFEM:41:LEMAN_S620_A50:43:LEMAN_S620_A50_DUALFEM:44:LEMAN_S620_TROIKA_DUALFEM:45:LEMAN_S620_A50_MIMO:46:NACHO_S612_SMDK:47:NEUS_S620_SMDK:48:NEUS_S621_SMDK:49:LEMAN_S620_MAESTRO_VOLCANO:50:LEMAN_S620_A505Y:51:LEMAN_S620_A505N_DUALFEM:52:LEMAN_S620_FLEXI:53:LEMAN_S620_SHINE_F9T_DUALFEM:54:LEMAN_S620_M307F:55:LEMAN_S620_V_TD1904_DUALFEM:56:NEUS_S620_ERD:57:NEUS_S620_V_TD1905_DUALFEM:58:LEMAN_S620_A507FN_DUALFEM:59:NEUS_S620_L_RACER_DUALFEM:61:NEUS_S620_ERD_REV0:62:LEMAN_S620_A515FM:63:NACHO_S612_ERD:64:NEUS_S620_A71:65:NEUS_S620_ERD_VOLCANO:66:NEUS_S620_V_TD1905_DUALFEMSKY:67:NEUS_S620_A71_PRE:68:NACHO_S612_A31_UNIV:69:NACHO_S612_A31:70:LASSEN_A305FN_GLOBAL:71:NEUS_S620_ERD_VOLCANO_SISO:72:NEUS_S620_V_PD1938_DUALFEM:73:NEUS_S620_V_PD1949_DUALFEM:74:LASSEN_TAB_A4_S_2019_09:75:NEUS_S621_ERD_DUALFEM:76:NEUS_S621_ERD_DUALSWITCH:77:LEMAN_S620_G715FN_DUALFEM:78:LEMAN_S620_A515U_DUALFEM:79:LEMAN_S620_P615_MIMO:80:NEUS_S620_A716U_DUALFEM:81:LEMAN_S620_G715U_DUALFEM:82 NamedValues PLATFORM_NOT_SET:0:T20:2:LASSEN_SMDK:17:LEMAN_S620_SMDK:18:LASSEN_UNIV:19:LEMAN_S612_SMDK:21:LASSEN_A5_REV02_2017_07:23:LASSEN_A7_REV01_2017_07:24:LASSEN_J3NEO_2017_08:25:LASSEN_J3TOP:26:LASSEN_J7TOP:27:LEMAN_S620_MAESTRO:28:LEMAN_S620_UNIV:31:LASSEN_A530D:33:LEMAN_S620_WING_DUALFEM:35:LASSEN_A6_SMA600_2018_04:36:LEMAN_S620_MAESTRO_SISO:39:LEMAN_S620_ROBUSTA2_DUALFEM:40:LEMAN_S620_ROBUSTA2_NOFEM:41:LEMAN_S620_A50:43:LEMAN_S620_A50_DUALFEM:44:LEMAN_S620_TROIKA_DUALFEM:45:LEMAN_S620_A50_MIMO:46:NACHO_S612_SMDK:47:NEUS_S620_SMDK:48:NEUS_S621_SMDK:49:LEMAN_S620_MAESTRO_VOLCANO:50:LEMAN_S620_A505Y:51:LEMAN_S620_A505N_DUALFEM:52:LEMAN_S620_FLEXI:53:LEMAN_S620_SHINE_F9T_DUALFEM:54:LEMAN_S620_M307F:55:LEMAN_S620_V_TD1904_DUALFEM:56:NEUS_S620_ERD:57:NEUS_S620_V_TD1905_DUALFEM:58:LEMAN_S620_A507FN_DUALFEM:59:NEUS_S620_L_RACER_DUALFEM:61:NEUS_S620_ERD_REV0:62:LEMAN_S620_A515FM:63:NACHO_S612_ERD:64:NEUS_S620_A71:65:NEUS_S620_ERD_VOLCANO:66:NEUS_S620_V_TD1905_DUALFEMSKY:67:NEUS_S620_A71_PRE:68:NACHO_S612_A31_UNIV:69:NACHO_S612_A31:70:LASSEN_A305FN_GLOBAL:71:NEUS_S620_ERD_VOLCANO_SISO:72:NEUS_S620_V_PD1938_DUALFEM:73:NEUS_S620_V_PD1949_DUALFEM:74:LASSEN_TAB_A4_S_2019_09:75:NEUS_S621_ERD_DUALFEM:76:NEUS_S621_ERD_DUALSWITCH:77:LEMAN_S620_G715FN_DUALFEM:78:LEMAN_S620_A515U_DUALFEM:79:LEMAN_S620_P615_MIMO:80:NEUS_S620_A716U_DUALFEM:81:LEMAN_S620_G715U_DUALFEM:82 PSID 2369 Default 0 BFType uint16 BFAccess RW
+Element unifiForceChannelBW BasicType integer BERType integer OID 1.2.3.1.2370 Access read_write PSID 2370 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiDPDTrainingDuration BasicType integer BERType integer OID 1.2.3.1.2371 Access read_write PSID 2371 Default 10 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiTxPowerTrimCommonConfig BasicType string BERType string OID 1.2.3.1.2374 Access read_write Min 3 Max 255 PSID 2374 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiIqDebugEnabled BasicType integer BERType string OID 1.2.3.1.2375 Access read_write PSID 2375 Default 0 BFType bool BFAccess RW
+Element unifiCoexDebugOverrideBt BasicType integer BERType string OID 1.2.3.1.2425 Access read_write PSID 2425 Default 0 BFType bool BFAccess RW
+Element unifiLteMailbox BasicType string BERType string OID 1.2.3.1.2430 Access read_write Min 36 Max 40 PSID 2430 BFType var BFAccess RW
+Element unifiLteMwsSignal BasicType integer BERType integer OID 1.2.3.1.2431 Access read_write PSID 2431 SetFunction mibltemwssignal BFType uint16 BFAccess RW
+Element unifiLteEnableChannelAvoidance BasicType integer BERType string OID 1.2.3.1.2432 Access read_write PSID 2432 Default 1 BFType bool BFAccess RW
+Element unifiLteEnablePowerBackoff BasicType integer BERType string OID 1.2.3.1.2433 Access read_write PSID 2433 Default 1 BFType bool BFAccess RW
+Element unifiLteEnableTimeDomain BasicType integer BERType string OID 1.2.3.1.2434 Access read_write PSID 2434 Default 1 BFType bool BFAccess RW
+Element unifiLteEnableLteCoex BasicType integer BERType string OID 1.2.3.1.2435 Access read_write PSID 2435 Default 1 BFType bool BFAccess RW
+Element unifiLteBand40PowerBackoffChannels BasicType string BERType string OID 1.2.3.1.2436 Access read_write Min 2 Max 2 PSID 2436 Default 0x01:0x02 BFType var BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpLow BasicType integer BERType integer OID 1.2.3.1.2437 Access read_write Min -140 Max -77 PSID 2437 Default -100 BFType int16 BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpHigh BasicType integer BERType integer OID 1.2.3.1.2438 Access read_write Min -140 Max -77 PSID 2438 Default -95 BFType int16 BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpAveragingAlpha BasicType integer BERType integer OID 1.2.3.1.2439 Access read_write PSID 2439 Default 50 BFType uint16 BFAccess RW
+Element unifiLteSetChannel BasicType integer BERType integer OID 1.2.3.1.2440 Access read_write PSID 2440 SetFunction mibltesetchannel BFType uint16 BFAccess RW
+Element unifiLteSetPowerBackoff BasicType integer BERType integer OID 1.2.3.1.2441 Access read_write PSID 2441 SetFunction mibltesetpowerbackoff BFType uint16 BFAccess RW
+Element unifiLteSetTddDebugMode BasicType integer BERType integer OID 1.2.3.1.2442 Access read_write PSID 2442 SetFunction mibltesetltetdddebugmode BFType uint16 BFAccess RW
+Element unifiLteBand40AvoidChannels BasicType string BERType string OID 1.2.3.1.2443 Access read_write Min 2 Max 2 PSID 2443 Default 0x01:0x05 BFType var BFAccess RW
+Element unifiLteBand41AvoidChannels BasicType string BERType string OID 1.2.3.1.2444 Access read_write Min 2 Max 2 PSID 2444 Default 0x04:0x0D BFType var BFAccess RW
+Element unifiLteBand7AvoidChannels BasicType string BERType string OID 1.2.3.1.2445 Access read_write Min 2 Max 2 PSID 2445 Default 0x09:0x0D BFType var BFAccess RW
+Element unifiAPScanAbsenceDuration BasicType integer BERType integer OID 1.2.3.1.2480 Access read_write PSID 2480 Default 7 BFType uint16 BFAccess RW
+Element unifiAPScanAbsencePeriod BasicType integer BERType integer OID 1.2.3.1.2481 Access read_write PSID 2481 Default 14 BFType uint16 BFAccess RW
+Element unifiMLMESTAKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2485 Access read_write Max 100 PSID 2485 Default 5 BFType uint16 BFAccess RW
+Element unifiMLMEAPKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2486 Access read_write Max 100 PSID 2486 Default 5 BFType uint16 BFAccess RW
+Element unifiMLMEGOKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2487 Access read_write Max 100 PSID 2487 Default 5 BFType uint16 BFAccess RW
+Element unifiBSSMaxIdlePeriod BasicType integer BERType integer OID 1.2.3.1.2488 Access read_write Max 300 PSID 2488 Default 300 BFType uint16 BFAccess RW
+Element unifiSTAIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2493 Access read_write PSID 2493 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiFastPowerSaveTimeOutAggressive BasicType integer BERType integer OID 1.2.3.1.2494 Access read_only Max 2147483647 PSID 2494 Default 20000 BFType uint32 BFAccess RO
+Element unifiIdlemodeListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2495 Access read_write Min 0 Max 4294967295 PSID 2495 Default 0x00054645 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiIdlemodeP2PListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2496 Access read_write Min 0 Max 4294967295 PSID 2496 Default 0x00000002 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiAPIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2497 Access read_write PSID 2497 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiFastPowerSaveTimeout BasicType integer BERType integer OID 1.2.3.1.2500 Access read_only Max 2147483647 PSID 2500 Default 400000 BFType uint32 BFAccess RO
+Element unifiFastPowerSaveTimeOutSmall BasicType integer BERType integer OID 1.2.3.1.2501 Access read_only Max 2147483647 PSID 2501 Default 50000 BFType uint32 BFAccess RO
+Element unifiMLMESTAKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2502 Access read_write Max 2147 PSID 2502 Default 30 BFType uint16 BFAccess RW
+Element unifiMLMEAPKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2503 Access read_write Max 2147 PSID 2503 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEGOKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2504 Access read_write Max 2147 PSID 2504 Default 10 BFType uint16 BFAccess RW
+Element unifiSTARouterAdvertisementMinimumIntervalToForward BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2505 Access read_write Min 60 Max 4294967285 PSID 2505 Default 60 BFType uint32 BFAccess RW
+Element unifiRoamConnectionQualityCheckWaitAfterConnect BasicType integer BERType integer OID 1.2.3.1.2506 Access read_write PSID 2506 Default 200 BFType uint16 BFAccess RW
+Element unifiApBeaconMaxDrift BasicType integer BERType integer OID 1.2.3.1.2507 Access read_write PSID 2507 Default 0xFFFF BFType uint16 BFAccess RW
+Element unifiBSSMaxIdlePeriodActivated BasicType integer BERType string OID 1.2.3.1.2508 Access read_write PSID 2508 Default 1 BFType bool BFAccess RW
+Element unifiVifIdleMonitorTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2509 Access read_only Max 1800 PSID 2509 Default 1 BFType uint32 BFAccess RO
+Element unifiDisableLegacyPowerSave BasicType integer BERType string OID 1.2.3.1.2510 Access read_write PSID 2510 Default 1 BFType bool BFAccess RW
+Element unifiDebugForceActive BasicType integer BERType string OID 1.2.3.1.2511 Access read_write PSID 2511 Default 0 BFType bool BFAccess RW
+Element unifiStationActivityIdleTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2512 Access read_write PSID 2512 Default 500 BFType uint32 BFAccess RW
+Element unifiDmsActivated BasicType integer BERType string OID 1.2.3.1.2513 Access read_write PSID 2513 Default 0 BFType bool BFAccess RW
+Element unifiPowerManagementDelayTimeout BasicType integer BERType integer OID 1.2.3.1.2514 Access read_write Max 2147483647 PSID 2514 Default 30000 BFType uint32 BFAccess RW
+Element unifiAPSDServicePeriodTimeout BasicType integer BERType integer OID 1.2.3.1.2515 Access read_write PSID 2515 Default 20000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiConcurrentPowerManagementDelayTimeout BasicType integer BERType integer OID 1.2.3.1.2516 Access read_write Max 2147483647 PSID 2516 Default 10000 BFType uint32 BFAccess RW
+Element unifiStationQosInfo BasicType integer BERType integer OID 1.2.3.1.2517 Access read_write PSID 2517 Default 0 BFType uint16 BFAccess RW
+Element unifiListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2518 Access read_write Min 0 Max 4294967295 PSID 2518 Default 0x000A89AA SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiListenInterval BasicType integer BERType integer OID 1.2.3.1.2519 Access read_only Min 0 Max 100 PSID 2519 Default 10 BFType int16 BFAccess RO
+Element unifiLegacyPsPollTimeout BasicType integer BERType integer OID 1.2.3.1.2520 Access read_write PSID 2520 Default 15000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiBeaconSkippingControl BasicType integer BERType integer_counter32 OID 1.2.3.1.2521 Access read_write Min 0 Max 4294967295 PSID 2521 Default 0x00010103 BFType int64 BFAccess RW
+Element unifiTogglePowerDomain BasicType integer BERType string OID 1.2.3.1.2522 Access read_write PSID 2522 Default 1 BFType bool BFAccess RW
+Element unifiP2PListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2523 Access read_write Min 0 Max 4294967295 PSID 2523 Default 0x00000002 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiFragmentationDuration BasicType integer BERType integer OID 1.2.3.1.2524 Access read_write PSID 2524 Default 0 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiIdleModeLiteEnabled BasicType integer BERType string OID 1.2.3.1.2526 Access read_write PSID 2526 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2527 Access read_write PSID 2527 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiDTIMWaitTimeout BasicType integer BERType integer OID 1.2.3.1.2529 Access read_write PSID 2529 Default 50000 BFType uint16 BFAccess RW
+Element unifiListenIntervalMaxTime BasicType integer BERType integer OID 1.2.3.1.2530 Access read_only Min 0 Max 65535 PSID 2530 Default 1000 BFType uint16 BFAccess RO
+Element unifiScanMaxProbeTransmitLifetime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2531 Access read_write Min 1 PSID 2531 Default 64 BFType uint32 BFAccess RW
+Element unifiPowerSaveTransitionPacketThreshold BasicType integer BERType integer OID 1.2.3.1.2532 Access read_write PSID 2532 Default 10 BFType uint16 BFAccess RW
+Element unifiProbeResponseLifetime BasicType integer BERType integer OID 1.2.3.1.2533 Access read_write PSID 2533 Default 100 BFType uint16 BFAccess RW
+Element unifiProbeResponseMaxRetry BasicType integer BERType integer OID 1.2.3.1.2534 Access read_write Max 255 PSID 2534 Default 5 BFType uint16 BFAccess RW
+Element unifiTrafficAnalysisPeriod BasicType integer BERType integer OID 1.2.3.1.2535 Access read_write PSID 2535 Default 200 BFType uint16 BFAccess RW
+Element unifiAggressivePowerSaveTransitionPeriod BasicType integer BERType integer OID 1.2.3.1.2536 Access read_write PSID 2536 Default 5 BFType uint16 BFAccess RW
+Element unifiActiveTimeAfterMoreBit BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2537 Access read_write PSID 2537 Default 30 BFType uint32 BFAccess RW
+Element unifiDefaultDwellTime BasicType integer BERType integer OID 1.2.3.1.2538 Access read_write PSID 2538 Default 50 BFType uint16 BFAccess RW
+Element unifiVhtCapabilities BasicType string BERType string OID 1.2.3.1.2540 Access read_write Min 12 Max 12 PSID 2540 Default 0xb1:0x7a:0x11:0x03:0xfa:0xff:0x00:0x00:0xfa:0xff:0x00:0x00 BFType var BFAccess RW
+Element unifiMAXVifScheduleDuration BasicType integer BERType integer OID 1.2.3.1.2541 Access read_write PSID 2541 Default 50 BFType uint16 BFAccess RW
+Element unifiVifLongIntervalTime BasicType integer BERType integer OID 1.2.3.1.2542 Access read_write PSID 2542 Default 60 BFType uint16 BFAccess RW
+Element unifiDisallowSchedRelinquish BasicType integer BERType string OID 1.2.3.1.2543 Access read_write PSID 2543 Default 0 BFType bool BFAccess RW
+Element unifiRameDplaneOperationTimeout BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2544 Access read_only PSID 2544 Default 1000 BFType uint32 BFAccess RO
+Element unifiDebugKeepRadioOn BasicType integer BERType string OID 1.2.3.1.2545 Access read_write PSID 2545 Default 0 BFType bool BFAccess RW
+Element unifiForceFixedDurationSchedule BasicType integer BERType integer OID 1.2.3.1.2546 Access read_write PSID 2546 Default 0 BFType uint16 BFAccess RW
+Element unifiRameUpdateMibs BasicType integer BERType string OID 1.2.3.1.2547 Access read_write PSID 2547 BFType bool BFAccess RW
+Element unifiGOScanAbsenceDuration BasicType integer BERType integer OID 1.2.3.1.2548 Access read_write PSID 2548 Default 7 BFType uint16 BFAccess RW
+Element unifiGOScanAbsencePeriod BasicType integer BERType integer OID 1.2.3.1.2549 Access read_write PSID 2549 Default 14 BFType uint16 BFAccess RW
+Element unifiMaxClient BasicType integer BERType integer OID 1.2.3.1.2550 Access read_write Min 1 Max 10 PSID 2550 Default 10 BFType uint16 BFAccess RW
+Element unifiTdlsInP2pActivated BasicType integer BERType string OID 1.2.3.1.2556 Access read_write PSID 2556 Default 1 BFType bool BFAccess RW
+Element unifiTdlsActivated BasicType integer BERType string OID 1.2.3.1.2558 Access read_write PSID 2558 Default 1 BFType bool BFAccess RW
+Element unifiTdlsTPThresholdPktSecs BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2559 Access read_write PSID 2559 Default 100 BFType uint32 BFAccess RW
+Element unifiTdlsRssiThreshold BasicType integer BERType integer OID 1.2.3.1.2560 Access read_write PSID 2560 Default -75 BFType int16 BFAccess RW
+Element unifiTdlsMaximumRetry BasicType integer BERType integer OID 1.2.3.1.2561 Access read_write PSID 2561 BFType uint16 BFAccess RW
+Element unifiTdlsTPMonitorSecs BasicType integer BERType integer OID 1.2.3.1.2562 Access read_write PSID 2562 Default 10 BFType uint16 BFAccess RW
+Element unifiTdlsBasicHtMcsSet BasicType string BERType string OID 1.2.3.1.2563 Access read_write PSID 2563 BFType var BFAccess RW
+Element unifiTdlsBasicVhtMcsSet BasicType string BERType string OID 1.2.3.1.2564 Access read_write PSID 2564 BFType var BFAccess RW
+Element dot11TDLSDiscoveryRequestWindow BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2565 Access read_write PSID 2565 Default 10 BFType uint32 BFAccess RW
+Element dot11TDLSResponseTimeout BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2566 Access read_write PSID 2566 Default 5 BFType uint32 BFAccess RW
+Element dot11TDLSChannelSwitchActivated BasicType integer BERType string OID 1.2.3.1.2567 Access read_write PSID 2567 BFType bool BFAccess RW
+Element unifiTdlsDesignForTestMode BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2568 Access read_write PSID 2568 BFType uint32 BFAccess RW
+Element unifiTdlsWiderBandwidthProhibited BasicType integer BERType string OID 1.2.3.1.2569 Access read_write PSID 2569 Default 0 BFType bool BFAccess RW
+Element unifiTdlsKeyLifeTimeInterval BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2577 Access read_write PSID 2577 Default 0x000FFFFF BFType uint32 BFAccess RW
+Element unifiTdlsTeardownFrameTxTimeout BasicType integer BERType integer OID 1.2.3.1.2578 Access read_write PSID 2578 Default 500 BFType uint16 BFAccess RW
+Element unifiWifiSharingActivated BasicType integer BERType string OID 1.2.3.1.2580 Access read_write PSID 2580 Default 1 BFType bool BFAccess RW
+Element unifiWiFiSharing5GHzChannel BasicType string BERType string OID 1.2.3.1.2582 Access read_write Min 8 Max 8 PSID 2582 Default 0x00:0xC0:0xFF:0xFF:0x7F:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiWifiSharingChannelSwitchCount BasicType integer BERType integer OID 1.2.3.1.2583 Access read_write Min 3 Max 10 PSID 2583 Default 10 BFType uint16 BFAccess RW
+Element unifiChannelAnnouncementCount BasicType integer BERType integer OID 1.2.3.1.2584 Access read_write PSID 2584 Default 10 BFType uint16 BFAccess RW
+Element unifiRATestStoredSA BasicType string BERType string OID 1.2.3.1.2585 Access read_write PSID 2585 Default "0x00000000" BFType var BFAccess RW
+Element unifiRATestStoreFrame BasicType string BERType string OID 1.2.3.1.2586 Access read_write PSID 2586 Default "0x00000000" BFType var BFAccess RW
+Element dot11TDLSPeerUAPSDBufferSTAActivated BasicType integer BERType string OID 1.2.3.1.2587 Access read_write PSID 2587 Default 1 BFType bool BFAccess RW
+Element unifiProbeResponseLifetimeP2P BasicType integer BERType integer OID 1.2.3.1.2600 Access read_write PSID 2600 Default 500 BFType uint16 BFAccess RW
+Element unifiStaChannelSwitchSlowApActivated BasicType integer BERType string OID 1.2.3.1.2601 Access read_write PSID 2601 Default 0 BFType bool BFAccess RW
+Element unifiStaChannelSwitchSlowApMaxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2604 Access read_write PSID 2604 Default 70 BFType uint32 BFAccess RW
+Element unifiStaChannelSwitchSlowApPollInterval BasicType integer BERType integer OID 1.2.3.1.2605 Access read_write PSID 2605 Default 1 BFType uint16 BFAccess RW
+Element unifiStaChannelSwitchSlowApProcedureTimeoutIncrement BasicType integer BERType integer OID 1.2.3.1.2606 Access read_write PSID 2606 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaxAerials BasicType integer BERType integer OID 1.2.3.1.2607 Access read_write Min 1 PSID 2607 Default 1 BFType uint16 BFAccess RW
+Element unifiAPFActivated BasicType integer BERType string OID 1.2.3.1.2650 Access read_write PSID 2650 Default 0 BFType bool BFAccess RW
+Element unifiAPFVersion BasicType integer BERType integer OID 1.2.3.1.2651 Access read_write PSID 2651 Default 4 BFType uint16 BFAccess RW
+Element unifiAPFMaxSize BasicType integer BERType integer OID 1.2.3.1.2652 Access read_only PSID 2652 Default 1024 BFType uint16 BFAccess RO
+Element unifiAPFActiveModeEnabled BasicType integer BERType integer OID 1.2.3.1.2653 Access read_write PSID 2653 Default 1 BFType uint16 BFAccess RW
+Element unifiCSROnlyMIBShield BasicType integer BERType integer OID 1.2.3.1.4001 Access not_accessible NamedValues open:1:warn:2:guard:3:alarm:4 NamedValues open:1:warn:2:guard:3:alarm:4 PSID 4001 Default 2 Hide BFType uint16 BFAccess NA
+Element unifiPrivateBbbTxFilterConfig BasicType integer BERType integer OID 1.2.3.1.4071 Access read_write PSID 4071 Default 0x17 Hide BFType uint16 BFAccess RW
+Element unifiPrivateSWAGCFrontEndGain BasicType integer BERType integer OID 1.2.3.1.4075 Access read_write Min -128 Max 127 PSID 4075 Default 0 Hide BFType int16 BFAccess RW
+Element unifiPrivateSWAGCFrontEndLoss BasicType integer BERType integer OID 1.2.3.1.4076 Access read_write Min -128 Max 127 PSID 4076 Default 0 Hide BFType int16 BFAccess RW
+Element unifiPrivateSWAGCExtThresh BasicType integer BERType integer OID 1.2.3.1.4077 Access read_write Min -128 Max 127 PSID 4077 Default -25 Hide BFType int16 BFAccess RW
+Element unifiCSROnlyPowerCalDelay BasicType integer BERType integer OID 1.2.3.1.4078 Access read_write PSID 4078 Default 0 Hide BFType uint16 BFAccess RW
+Element unifiRxAgcControl BasicType string BERType string OID 1.2.3.1.4079 Access read_write Min 9 Max 11 PSID 4079 GetFunction mibbmsgget SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element deprecated_unifiWapiQosMask BasicType integer BERType integer OID 1.2.3.1.4130 Access read_write PSID 4130 Default 15 Hide BFType uint16 BFAccess RW
+Element unifiWMMStallEnable BasicType integer BERType integer OID 1.2.3.1.4139 Access read_write PSID 4139 Default 1 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiRaaTxHostRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4148 Access read_write PSID 4148 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiFallbackShortFrameRetryDistribution BasicType string BERType string OID 1.2.3.1.4149 Access read_write Min 6 Max 5 PSID 4149 Default 0x3:0x2:0x2:0x2:0x1:0x0 GetFunction mibdplanefallbackget SetFunction mibdplanefallbackset BFType var BFAccess RW
+Element unifiRXTHROUGHPUTLOW BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4150 Access read_write PSID 4150 Default 37500000 Hide BFType uint32 BFAccess RW
+Element unifiRXTHROUGHPUTHIGH BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4151 Access read_write PSID 4151 Default 50000000 Hide BFType uint32 BFAccess RW
+Element unifiSetFixedAMPDUAggregationSize BasicType integer BERType integer OID 1.2.3.1.4152 Access read_write PSID 4152 Default 0 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiThroughputDebugReportInterval BasicType integer BERType integer OID 1.2.3.1.4153 Access read_write PSID 4153 Default 1000 GetFunction mibuint16get SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiDplaneTest1 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4154 Access read_write PSID 4154 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest2 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4155 Access read_write PSID 4155 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest3 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4156 Access read_write PSID 4156 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest4 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4157 Access read_write PSID 4157 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiPreEBRTWindow BasicType integer BERType integer OID 1.2.3.1.4171 Access read_only Max 2147483647 PSID 4171 Default 100 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set Hide BFType uint32 BFAccess RO
+Element unifiPostEBRTWindow BasicType integer BERType integer OID 1.2.3.1.4173 Access read_only Max 2147483647 PSID 4173 Default 2000 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set Hide BFType uint32 BFAccess RO
+Element unifiPsPollThreshold BasicType integer BERType integer OID 1.2.3.1.4179 Access read_write PSID 4179 Default 30 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiSableContainerSizeConfiguration BasicType string BERType string OID 1.2.3.1.5000 Access read_write Min 3 Max 3 PSID 5000 Default 0x64 BFType var BFAccess RW
+Element unifiSableFrameLogMode BasicType integer BERType integer OID 1.2.3.1.5001 Access read_write Min 0 Max 2 PSID 5001 Default 2 SetFunction mibsableframelogmodeset BFType uint16 BFAccess RW
+Element unifiSableFrameLogCpuThresPercent BasicType integer BERType integer OID 1.2.3.1.5002 Access read_write Min 0 Max 100 PSID 5002 Default 95 SetFunction mibsableframelogcputhresset BFType uint16 BFAccess RW
+Element unifiSableFrameLogCpuOverheadPercent BasicType integer BERType integer OID 1.2.3.1.5003 Access read_write Min 0 Max 100 PSID 5003 Default 3 SetFunction mibsableframelogcpuoverheadset BFType uint16 BFAccess RW
+Element unifiDebugSVCModeStackHighWaterMark BasicType integer BERType integer OID 1.2.3.1.5010 Access read_only PSID 5010 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiOverrideEDCAParamBE BasicType string BERType string OID 1.2.3.1.5023 Access read_write PSID 5023 BFType var BFAccess RW
+Element unifiOverrideEDCAParamBEEnable BasicType integer BERType string OID 1.2.3.1.5024 Access read_write PSID 5024 BFType bool BFAccess RW
+Element unifiFaultEnable BasicType integer BERType string OID 1.2.3.1.5027 Access read_write PSID 5027 Default 1 SetFunction mibfaultenableset BFType bool BFAccess RW
+Element unifiTxUsingLdpcActivated BasicType integer BERType string OID 1.2.3.1.5030 Access read_write PSID 5030 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI20Activated BasicType integer BERType string OID 1.2.3.1.5040 Access read_write PSID 5040 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI40Activated BasicType integer BERType string OID 1.2.3.1.5041 Access read_write PSID 5041 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI80Activated BasicType integer BERType string OID 1.2.3.1.5042 Access read_write PSID 5042 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI160Activated BasicType integer BERType string OID 1.2.3.1.5043 Access read_write PSID 5043 Default 0 BFType bool BFAccess RW
+Element unifiMacAddressRandomisation BasicType integer BERType string OID 1.2.3.1.5044 Access read_write PSID 5044 Default 1 BFType bool BFAccess RW
+Element unifiMacAddressRandomisationMask BasicType string BERType string OID 1.2.3.1.5047 Access read_write Min 6 Max 6 PSID 5047 Default 0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiWipsActivated BasicType integer BERType string OID 1.2.3.1.5050 Access read_write PSID 5050 Default 1 BFType bool BFAccess RW
+Element unifiRfTestModeActivated BasicType integer BERType string OID 1.2.3.1.5054 Access read_write PSID 5054 Default 0 BFType bool BFAccess RW
+Element unifiTxOfdmSelect BasicType string BERType string OID 1.2.3.1.5060 Access read_write Min 4 Max 8 PSID 5060 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiTxDigGain BasicType string BERType string OID 1.2.3.1.5061 Access read_write Min 16 Max 48 PSID 5061 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiChipTemperature BasicType integer BERType integer OID 1.2.3.1.5062 Access read_only PSID 5062 GetFunction mibint16get BFType int16 BFAccess RO
+Element UnifiBatteryVoltage BasicType integer BERType integer OID 1.2.3.1.5063 Access read_only PSID 5063 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiForceShortSlotTime BasicType integer BERType string OID 1.2.3.1.5080 Access read_write PSID 5080 Default 0 BFType bool BFAccess RW
+Element unifiDebugDisableRadioNannyActions BasicType integer BERType integer OID 1.2.3.1.5082 Access read_write PSID 5082 Default 0 GetFunction mibuint16get SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRxCckModemSensitivity BasicType string BERType string OID 1.2.3.1.5083 Access read_write Min 6 Max 6 PSID 5083 SetFunction mibhalmacmodemgenericset BFType var BFAccess RW
+Element unifiDpdPerBandwidth BasicType integer BERType integer OID 1.2.3.1.5084 Access read_write PSID 5084 Default 63 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiBBVersion BasicType integer BERType integer OID 1.2.3.1.5085 Access read_only PSID 5085 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiRFVersion BasicType integer BERType integer OID 1.2.3.1.5086 Access read_only PSID 5086 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiClearRadioTrimCache BasicType integer BERType integer OID 1.2.3.1.5088 Access read_write PSID 5088 SetFunction mibricechangefsmparams BFType uint16 BFAccess RW
+Element unifiRxRadioCsMode BasicType integer BERType integer OID 1.2.3.1.5092 Access read_write PSID 5092 Default 0 BFType uint16 BFAccess RW
+Element unifiRxPriEnergyDetThreshold BasicType integer BERType integer OID 1.2.3.1.5093 Access read_write PSID 5093 Default 0 BFType uint16 BFAccess RW
+Element unifiRxSecEnergyDetThreshold BasicType integer BERType integer OID 1.2.3.1.5094 Access read_write PSID 5094 Default 0 BFType uint16 BFAccess RW
+Element unifiIQBufferSize BasicType integer BERType integer_unsigned32 OID 1.2.3.1.5098 Access read_only PSID 5098 GetFunction mibriceuint32get BFType uint32 BFAccess RO
+Element unifiCCAMasterSwitch BasicType integer BERType integer_unsigned32 OID 1.2.3.1.5102 Access read_write PSID 5102 Default 0x00540050 GetFunction mibhalmacmacconfiggenericget SetFunction mibhalmacmacconfiggenericset BFType uint32 BFAccess RW
+Element unifiRxSyncCCACfg BasicType integer BERType integer OID 1.2.3.1.5103 Access read_write PSID 5103 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset BFType uint16 BFAccess RW
+Element unifiMacSecChanClearTime BasicType integer BERType integer OID 1.2.3.1.5105 Access read_write PSID 5105 GetFunction mibhalmacmacconfiggenericget SetFunction mibhalmacmacconfiggenericset BFType uint16 BFAccess RW
+Element unifiNannyTemperatureReportDelta BasicType integer BERType integer OID 1.2.3.1.5109 Access read_write PSID 5109 Default 4 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiNannyTemperatureReportInterval BasicType integer BERType integer OID 1.2.3.1.5110 Access read_write PSID 5110 Default 200 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRadioRxDcocDebugIqValue BasicType integer BERType integer OID 1.2.3.1.5111 Access read_write PSID 5111 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRadioRxDcocDebug BasicType integer BERType integer OID 1.2.3.1.5112 Access read_write PSID 5112 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiNannyRetrimDpdMod BasicType integer BERType integer OID 1.2.3.1.5113 Access read_write PSID 5113 Default 2 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiDisableDpdSubIteration BasicType integer BERType string OID 1.2.3.1.5114 Access read_write PSID 5114 Default 0 SetFunction mibricechangenonfsmparams BFType bool BFAccess RW
+Element unifiFleximacCcaEdEnable BasicType integer BERType integer OID 1.2.3.1.5116 Access read_write PSID 5116 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset BFType uint16 BFAccess RW
+Element unifiDisableLNABypass BasicType integer BERType integer OID 1.2.3.1.5118 Access read_write PSID 5118 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiEnableFlexiMacWatchdog BasicType integer BERType integer OID 1.2.3.1.5200 Access read_write PSID 5200 Default 0x0000 BFType uint16 BFAccess RW
+Element unifiRttCapabilities BasicType string BERType string OID 1.2.3.1.5300 Access read_write Min 8 Max 8 PSID 5300 Default 0x01:0x01:0x01:0x01:0x00:0x07:0x1c:0x32 BFType var BFAccess RW
+Element unifiFtmMinDeltaFrames BasicType integer BERType integer OID 1.2.3.1.5301 Access read_write Min 0 Max 255 PSID 5301 Default 5 BFType uint16 BFAccess RW
+Element unifiFtmPerBurst BasicType integer BERType integer OID 1.2.3.1.5302 Access read_write Min 1 Max 31 PSID 5302 Default 4 BFType uint16 BFAccess RW
+Element unifiFtmBurstDuration BasicType integer BERType integer OID 1.2.3.1.5303 Access read_write Min 2 Max 11 PSID 5303 Default 6 BFType uint16 BFAccess RW
+Element unifiFtmNumOfBurstsExponent BasicType integer BERType integer OID 1.2.3.1.5304 Access read_write Min 0 Max 14 PSID 5304 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmASAPModeActivated BasicType integer BERType string OID 1.2.3.1.5305 Access read_write PSID 5305 Default 1 BFType bool BFAccess RW
+Element unifiFtmResponderActivated BasicType integer BERType string OID 1.2.3.1.5306 Access read_write PSID 5306 Default 0 BFType bool BFAccess RW
+Element unifiFtmDefaultSessionEstablishmentTimeout BasicType integer BERType integer OID 1.2.3.1.5307 Access read_write Min 10 Max 100 PSID 5307 Default 50 BFType uint16 BFAccess RW
+Element unifiFtmDefaultGapBeforeFirstBurstPerResponder BasicType integer BERType integer OID 1.2.3.1.5308 Access read_write PSID 5308 BFType uint16 BFAccess RW
+Element unifiFtmDefaultGapBetweenBursts BasicType integer BERType integer OID 1.2.3.1.5309 Access read_write Min 5 Max 50 PSID 5309 Default 10 BFType uint16 BFAccess RW
+Element unifiFtmDefaultTriggerDelay BasicType integer BERType integer OID 1.2.3.1.5310 Access read_write Min 0 Max 100 PSID 5310 Default 1 BFType uint16 BFAccess RW
+Element unifiFtmDefaultEndBurstDelay BasicType integer BERType integer OID 1.2.3.1.5311 Access read_write Min 0 Max 100 PSID 5311 Default 10 BFType uint16 BFAccess RW
+Element unifiFtmRequestValidationEnabled BasicType integer BERType string OID 1.2.3.1.5312 Access read_write PSID 5312 Default 0 BFType bool BFAccess RW
+Element unifiFtmResponseValidationEnabled BasicType integer BERType string OID 1.2.3.1.5313 Access read_write PSID 5313 Default 0 BFType bool BFAccess RW
+Element unifiFtmUseResponseParameters BasicType integer BERType string OID 1.2.3.1.5314 Access read_write PSID 5314 Default 0 BFType bool BFAccess RW
+Element unifiFtmInitialResponseTimeout BasicType integer BERType integer OID 1.2.3.1.5315 Access read_write Min 10 Max 100 PSID 5315 Default 50 BFType uint16 BFAccess RW
+Element unifiFtmDSPInpBW BasicType integer BERType integer OID 1.2.3.1.5320 Access read_write Min 0 Max 255 PSID 5320 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmOFDMCutOffset BasicType integer BERType integer OID 1.2.3.1.5321 Access read_write Min 0 Max 255 PSID 5321 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmMeanAroundCluster BasicType integer BERType string OID 1.2.3.1.5322 Access read_write PSID 5322 Default 0 BFType bool BFAccess RW
+Element unifiMLMEScanContinueIfMoreThanXAps BasicType integer BERType integer OID 1.2.3.1.5410 Access read_write PSID 5410 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEScanStopIfLessThanXNewAps BasicType integer BERType integer OID 1.2.3.1.5411 Access read_write PSID 5411 Default 4 BFType uint16 BFAccess RW
+Element unifiScanMultiVifActivated BasicType integer BERType string OID 1.2.3.1.5412 Access read_write PSID 5412 Default 1 BFType bool BFAccess RW
+Element unifiScanNewAlgorithmActivated BasicType integer BERType string OID 1.2.3.1.5413 Access read_write PSID 5413 Default 1 BFType bool BFAccess RW
+Element unifiUnsyncVifLnaEnabled BasicType integer BERType string OID 1.2.3.1.6010 Access read_write PSID 6010 Default 0 BFType bool BFAccess RW
+Element unifiTPCMinPower2GMIMO BasicType integer BERType integer OID 1.2.3.1.6011 Access read_write PSID 6011 Default 52 BFType int16 BFAccess RW
+Element unifiTPCMinPower5GMIMO BasicType integer BERType integer OID 1.2.3.1.6012 Access read_write PSID 6012 Default 52 BFType int16 BFAccess RW
+Element unifiLnaControlEnabled BasicType integer BERType string OID 1.2.3.1.6013 Access read_write PSID 6013 Default 1 BFType bool BFAccess RW
+Element unifiLnaControlRssiThresholdLower BasicType integer BERType integer OID 1.2.3.1.6014 Access read_write Min -128 Max 127 PSID 6014 Default -40 BFType int16 BFAccess RW
+Element unifiLnaControlRssiThresholdUpper BasicType integer BERType integer OID 1.2.3.1.6015 Access read_write Min -128 Max 127 PSID 6015 Default -30 BFType int16 BFAccess RW
+Element unifiPowerIsGrip BasicType integer BERType string OID 1.2.3.1.6016 Access read_write PSID 6016 Default 0 BFType bool BFAccess RW
+Element unifiLowPowerRxConfig BasicType integer BERType integer OID 1.2.3.1.6018 Access read_write PSID 6018 Default 3 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiTPCEnabled BasicType integer BERType string OID 1.2.3.1.6019 Access read_write PSID 6019 BFType bool BFAccess RW
+Element unifiCurrentTxpowerLevel BasicType integer BERType integer OID 1.2.3.1.6020 Access read_only PSID 6020 Default 0 GetPerVifFunction mibint16get BFType int16 BFAccess RO
+Element unifiUserSetTxpowerLevel BasicType integer BERType integer OID 1.2.3.1.6021 Access read_write PSID 6021 Default 127 SetFunction mlmeusersettxpowerlevel BFType int16 BFAccess RW
+Element unifiTPCMaxPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6022 Access read_write PSID 6022 Default -55 BFType int16 BFAccess RW
+Element unifiTPCMinPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6023 Access read_write PSID 6023 Default -45 BFType int16 BFAccess RW
+Element unifiTPCMinPower2G BasicType integer BERType integer OID 1.2.3.1.6024 Access read_write PSID 6024 Default 52 BFType int16 BFAccess RW
+Element unifiTPCMinPower5G BasicType integer BERType integer OID 1.2.3.1.6025 Access read_write PSID 6025 Default 40 BFType int16 BFAccess RW
+Element unifiTPCUseAfterConnectRsp BasicType integer BERType string OID 1.2.3.1.6027 Access read_write PSID 6027 Default 1 BFType bool BFAccess RW
+Element unifiRadioLpRxRssiThresholdLower BasicType integer BERType integer OID 1.2.3.1.6028 Access read_write Min -128 Max 127 PSID 6028 Default -75 BFType int16 BFAccess RW
+Element unifiRadioLpRxRssiThresholdUpper BasicType integer BERType integer OID 1.2.3.1.6029 Access read_write Min -128 Max 127 PSID 6029 Default -65 BFType int16 BFAccess RW
+Element unifiTestTxPowerEnable BasicType integer BERType integer OID 1.2.3.1.6032 Access read_write PSID 6032 Default 0x03DD BFType uint16 BFAccess RW
+Element unifiLteCoexMaxPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6033 Access read_write PSID 6033 Default -55 BFType int16 BFAccess RW
+Element unifiLteCoexMinPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6034 Access read_write PSID 6034 Default -45 BFType int16 BFAccess RW
+Element unifiLteCoexPowerReduction BasicType integer BERType integer OID 1.2.3.1.6035 Access read_write Min 0 Max 127 PSID 6035 Default 24 BFType uint16 BFAccess RW
+Element unifiPMFAssociationComebackTimeDelta BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6050 Access read_write PSID 6050 Default 1100 BFType uint32 BFAccess RW
+Element unifiTestTspecHack BasicType integer BERType string OID 1.2.3.1.6060 Access read_write PSID 6060 Default 0 BFType bool BFAccess RW
+Element unifiTestTspecHackValue BasicType integer BERType integer OID 1.2.3.1.6061 Access read_write PSID 6061 Default 0 BFType uint16 BFAccess RW
+Element unifiDebugInstantDelivery BasicType integer BERType string OID 1.2.3.1.6069 Access read_write PSID 6069 Default 0 SetFunction mibdebuginstantdeliveryset BFType bool BFAccess RW
+Element unifiDebugEnable BasicType integer BERType string OID 1.2.3.1.6071 Access read_write PSID 6071 Default 1 SetFunction mibdebugenableset BFType bool BFAccess RW
+Element unifiDPlaneDebug BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6073 Access read_write PSID 6073 Default 0x203 GetPerVifFunction mibdplanedebugmaskget SetPerVifFunction mibdplanedebugmaskset BFType uint32 BFAccess RW
+Element unifiNANActivated BasicType integer BERType string OID 1.2.3.1.6080 Access read_write PSID 6080 Default 1 BFType bool BFAccess RW
+Element unifiNANBeaconCapabilities BasicType integer BERType integer OID 1.2.3.1.6081 Access read_write PSID 6081 Default 0x0620 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentClusters BasicType integer BERType integer OID 1.2.3.1.6082 Access read_write PSID 6082 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentPublishes BasicType integer BERType integer OID 1.2.3.1.6083 Access read_write PSID 6083 Default 2 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentSubscribes BasicType integer BERType integer OID 1.2.3.1.6084 Access read_write PSID 6084 Default 2 BFType uint16 BFAccess RW
+Element unifiNANMaxServiceNameLength BasicType integer BERType integer OID 1.2.3.1.6085 Access read_write PSID 6085 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxMatchFilterLength BasicType integer BERType integer OID 1.2.3.1.6086 Access read_write PSID 6086 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxTotalMatchFilterLength BasicType integer BERType integer OID 1.2.3.1.6087 Access read_write PSID 6087 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxServiceSpecificInfoLength BasicType integer BERType integer OID 1.2.3.1.6088 Access read_write PSID 6088 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxVSADataLength BasicType integer BERType integer OID 1.2.3.1.6089 Access read_write PSID 6089 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMaxMeshDataLength BasicType integer BERType integer OID 1.2.3.1.6090 Access read_write PSID 6090 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMaxNDIInterfaces BasicType integer BERType integer OID 1.2.3.1.6091 Access read_write PSID 6091 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxNDPSessions BasicType integer BERType integer OID 1.2.3.1.6092 Access read_write PSID 6092 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxAppInfoLength BasicType integer BERType integer OID 1.2.3.1.6093 Access read_write PSID 6093 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMatchExpirationTime BasicType integer BERType integer OID 1.2.3.1.6094 Access read_write PSID 6094 Default 60 BFType uint16 BFAccess RW
+Element unifiNANMaxChannelSwitchTime BasicType integer BERType integer OID 1.2.3.1.6097 Access read_write PSID 6097 Default 5000 BFType uint16 BFAccess RW
+Element unifiNANMacRandomisationActivated BasicType integer BERType string OID 1.2.3.1.6098 Access read_write PSID 6098 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteDataElementInt32 BasicType integer BERType integer_counter32 OID 1.2.3.1.6100 Access read_write Min 0 Max 4294967295 PSID 6100 Default 1000 BFType int64 BFAccess RW
+Element hutsReadWriteDataElementBoolean BasicType integer BERType string OID 1.2.3.1.6101 Access read_write PSID 6101 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteDataElementOctetString BasicType string BERType string OID 1.2.3.1.6102 Access read_write Min 9 Max 9 PSID 6102 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element hutsReadWriteRemoteProcedureCallInt32 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6105 Access read_write PSID 6105 Default 0x000A0001 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIInt16 BasicType integer BERType integer OID 1.2.3.1.6108 Access read_write PSID 6108 Default -55 BFType int16 BFAccess RW
+Element hutsReadWriteInternalAPIUint16 BasicType integer BERType integer OID 1.2.3.1.6109 Access read_write PSID 6109 Default 0x0730 BFType uint16 BFAccess RW
+Element hutsReadWriteInternalAPIUint32 BasicType integer BERType integer OID 1.2.3.1.6110 Access read_write Max 2147483647 PSID 6110 Default 30000 BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIInt64 BasicType integer BERType integer OID 1.2.3.1.6111 Access read_only PSID 6111 GetPerVifFunction mibtsftime BFType int64 BFAccess RO
+Element hutsReadWriteInternalAPIBoolean BasicType integer BERType string OID 1.2.3.1.6112 Access read_write PSID 6112 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteInternalAPIOctetString BasicType string BERType string OID 1.2.3.1.6113 Access read_write Min 8 Max 8 PSID 6113 Default 0x00:0x18:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiTestScanNoMedium BasicType integer BERType string OID 1.2.3.1.6122 Access read_write PSID 6122 Default 0 BFType bool BFAccess RW
+Element unifiDualBandConcurrency BasicType integer BERType string OID 1.2.3.1.6123 Access read_write PSID 6123 Default 0 BFType bool BFAccess RW
+Element unifiLoggerMaxDelayedEvents BasicType integer BERType integer OID 1.2.3.1.6124 Access read_only PSID 6124 Default 10 BFType uint16 BFAccess RO
+Element unifiSupportedChannels BasicType string BERType string OID 1.2.3.1.8012 Access read_write Min 0 Max 20 PSID 8012 Default 0x01:0x0d:0x24:0x04:0x34:0x04:0x64:0x0c:0x95:0x05 BFType var BFAccess RW
+Element unifiCountryList BasicType string BERType string OID 1.2.3.1.8014 Access read_only Min 2 Max 270 PSID 8014 Default 0x30:0x30:0x58:0x58:0x41:0x44:0x41:0x45:0x41:0x46:0x41:0x47:0x41:0x49:0x41:0x4c:0x41:0x4d:0x41:0x4e:0x41:0x4f:0x41:0x51:0x41:0x52:0x41:0x53:0x41:0x54:0x41:0x55:0x41:0x57:0x41:0x58:0x41:0x5a:0x42:0x41:0x42:0x42:0x42:0x44:0x42:0x45:0x42:0x46:0x42:0x47:0x42:0x48:0x42:0x49:0x42:0x4a:0x42:0x4c:0x42:0x4d:0x42:0x4e:0x42:0x4f:0x42:0x52:0x42:0x53:0x42:0x54:0x42:0x56:0x42:0x57:0x42:0x59:0x42:0x5a:0x43:0x41:0x43:0x43:0x43:0x44:0x43:0x46:0x43:0x47:0x43:0x48:0x43:0x49:0x43:0x4b:0x43:0x4c:0x43:0x4d:0x43:0x4e:0x43:0x4f:0x43:0x52:0x43:0x55:0x43:0x56:0x43:0x58:0x43:0x59:0x43:0x5a:0x44:0x45:0x44:0x4a:0x44:0x4b:0x44:0x4d:0x44:0x4f:0x44:0x5a:0x45:0x43:0x45:0x45:0x45:0x47:0x45:0x48:0x45:0x52:0x45:0x53:0x45:0x54:0x46:0x49:0x46:0x4a:0x46:0x4b:0x46:0x4c:0x46:0x4d:0x46:0x4f:0x46:0x52:0x47:0x41:0x47:0x42:0x47:0x44:0x47:0x45:0x47:0x46:0x47:0x47:0x47:0x48:0x47:0x49:0x47:0x4c:0x47:0x4d:0x47:0x4e:0x47:0x50:0x47:0x51:0x47:0x52:0x47:0x53:0x47:0x54:0x47:0x55:0x47:0x57:0x47:0x59:0x48:0x4b:0x48:0x4d:0x48:0x4e:0x48:0x52:0x48:0x54:0x48:0x55:0x49:0x44:0x49:0x45:0x49:0x4c:0x49:0x4d:0x49:0x4e:0x49:0x4f:0x49:0x51:0x49:0x52:0x49:0x53:0x49:0x54:0x4a:0x45:0x4a:0x4d:0x4a:0x4f:0x4a:0x50:0x4b:0x45:0x4b:0x47:0x4b:0x48:0x4b:0x49:0x4b:0x4d:0x4b:0x4e:0x4b:0x50:0x4b:0x52:0x4b:0x57:0x4b:0x59:0x4b:0x5a:0x4c:0x41:0x4c:0x42:0x4c:0x43:0x4c:0x49:0x4c:0x4b:0x4c:0x52:0x4c:0x53:0x4c:0x54:0x4c:0x55:0x4c:0x56:0x4c:0x59:0x4d:0x41:0x4d:0x43:0x4d:0x44:0x4d:0x45:0x4d:0x46:0x4d:0x47:0x4d:0x48:0x4d:0x4b:0x4d:0x4c:0x4d:0x4d:0x4d:0x4e:0x4d:0x4f:0x4d:0x50:0x4d:0x51:0x4d:0x52:0x4d:0x53:0x4d:0x54:0x4d:0x55:0x4d:0x56:0x4d:0x57:0x4d:0x58:0x4d:0x59:0x4d:0x5a:0x4e:0x41:0x4e:0x43:0x4e:0x45:0x4e:0x46:0x4e:0x47:0x4e:0x49:0x4e:0x4c:0x4e:0x4f:0x4e:0x50:0x4e:0x52:0x4e:0x55:0x4e:0x5a:0x4f:0x4d:0x50:0x41:0x50:0x45:0x50:0x46:0x50:0x47:0x50:0x48:0x50:0x4b:0x50:0x4c:0x50:0x4d:0x50:0x4e:0x50:0x52:0x50:0x53:0x50:0x54:0x50:0x57:0x50:0x59:0x51:0x41:0x52:0x45:0x52:0x4f:0x52:0x53:0x52:0x55:0x52:0x57:0x53:0x41:0x53:0x42:0x53:0x43:0x53:0x44:0x53:0x45:0x53:0x47:0x53:0x48:0x53:0x49:0x53:0x4a:0x53:0x4b:0x53:0x4c:0x53:0x4d:0x53:0x4e:0x53:0x4f:0x53:0x52:0x53:0x53:0x53:0x54:0x53:0x56:0x53:0x58:0x53:0x59:0x53:0x5a:0x54:0x43:0x54:0x44:0x54:0x46:0x54:0x47:0x54:0x48:0x54:0x4a:0x54:0x4b:0x54:0x4c:0x54:0x4d:0x54:0x4e:0x54:0x4f:0x54:0x52:0x54:0x54:0x54:0x56:0x54:0x57:0x54:0x5a:0x55:0x41:0x55:0x47:0x55:0x4d:0x55:0x53:0x55:0x59:0x55:0x5a:0x56:0x41:0x56:0x43:0x56:0x45:0x56:0x47:0x56:0x49:0x56:0x4e:0x56:0x55:0x57:0x46:0x57:0x53:0x58:0x4b:0x59:0x45:0x59:0x54:0x5a:0x41:0x5a:0x4d:0x5a:0x57 BFType var BFAccess RO
+Element unifiVifCountry BasicType string BERType string OID 1.2.3.1.8016 Access read_write PSID 8016 GetPerVifFunction mibosget BFType var BFAccess RW
+Element unifiNoCellIncludedChannels BasicType string BERType string OID 1.2.3.1.8018 Access read_write Min 8 Max 8 PSID 8018 Default 0x00:0x18:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiRegDomVersion BasicType integer BERType integer OID 1.2.3.1.8019 Access read_only PSID 8019 Default 0x0107 BFType uint16 BFAccess RO
+Element unifiDefaultCountryWithoutCH12CH13 BasicType integer BERType string OID 1.2.3.1.8020 Access read_write PSID 8020 Default 0 BFType bool BFAccess RW
+Element hutsReadWriteInternalAPIFixSizeTableKeyRow BasicType integer BERType integer_counter32 OID 1.2.3.3.1.2.3.1.6120 Access read_only Min 0 Max 4294967295 PSID 6120 GetFunction mibtsftime ElementTable hutsReadWriteInternalAPIFixSizeTableKeyRowTable ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeyIndex1:hutsReadWriteInternalAPIFixSizeTableKeyIndex2 BFType int64 BFAccess RO
+Element hutsReadWriteInternalAPIFixSizeTableKey1Row BasicType integer BERType integer OID 1.2.3.4.1.2.3.1.6116 Access read_only PSID 6116 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteInternalAPIFixSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeysindex BFType uint16 BFAccess RO
+Element hutsReadWriteInternalAPIFixSizeTableKey2Row BasicType integer BERType integer OID 1.2.3.4.1.2.3.1.6117 Access read_only PSID 6117 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteInternalAPIFixSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeysindex BFType uint16 BFAccess RO
+Element hutsReadWriteInternalAPIFixVarSizeTableKey1Row BasicType integer BERType integer_unsigned32 OID 1.2.3.5.1.2.3.1.6118 Access read_write PSID 6118 ElementTable hutsReadWriteInternalAPIFixVarSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixVarSizeTableKeysIndex BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIFixVarSizeTableKey2Row BasicType string BERType string OID 1.2.3.5.1.2.3.1.6119 Access read_write PSID 6119 ElementTable hutsReadWriteInternalAPIFixVarSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixVarSizeTableKeysIndex BFType var BFAccess RW
+Element hutsReadWriteInternalAPIFixedSizeTableRow BasicType integer BERType integer OID 1.2.3.6.1.2.3.1.6114 Access read_write Min 0 Max 100 PSID 6114 DefaultIX1 1::80: DefaultIX1 2::80: DefaultIX1 3::80: DefaultIX1 4::80: ElementTable hutsReadWriteInternalAPIFixedSizeTable ElementTableIndices hutsReadWriteInternalAPIFixedSizeTableIndex BFType int16 BFAccess RW
+Element hutsReadWriteInternalAPIVarSizeTableRow BasicType string BERType string OID 1.2.3.7.1.2.3.1.6115 Access read_only Min 6 Max 73 PSID 6115 DefaultIX1 1:0x53:0x54:0x70:0x73:0x74:0x75:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80:0x81:0x82 DefaultIX1 2:0x01:0x02:0x03:0x05:0x06:0x07:0x08:0x09:0x0A:0x10:0x11:0x80:0x81:0x82 DefaultIX1 3:0x01:0x03:0x05:0x16:0x17:0x19:0x1A:0x1B:0x1C:0x1E:0x1F:0x20:0x21:0x80:0x81:0x82 DefaultIX1 4:0x01:0x02:0x03:0x04:0x05:0x06:0x20:0x21:0x24:0x25:0x26:0x29:0x2A:0x2B:0x3A:0x80:0x81:0x82 ElementTable hutsReadWriteInternalAPIVarSizeTable ElementTableIndices hutsReadWriteInternalAPIVarSizeTableindex BFType var BFAccess RO
+Element hutsReadWriteInternalAPIVarSizeTableKeyRow BasicType string BERType string OID 1.2.3.8.1.2.3.1.6121 Access read_write Min 144 Max 144 PSID 6121 GetFunction miboctetstringget SetFunction miboctetstringset ElementTable hutsReadWriteInternalAPIVarSizeTableKeyTable ElementTableIndices hutsReadWriteInternalAPIVarSizeTableKeyIndex1:hutsReadWriteInternalAPIVarSizeTableKeyIndex2 BFType var BFAccess RW
+Element hutsReadWriteRemoteProcedureCallOctetString BasicType string BERType string OID 1.2.3.9.1.2.3.1.6107 Access read_write Min 144 Max 144 PSID 6107 GetFunction miboctetstringget SetFunction miboctetstringset ElementTable hutsReadWriteRPCTableOctetStringTable ElementTableIndices hutsReadWriteRPCTableOctetStringTableIndex0:hutsReadWriteRPCTableOctetStringTableIndex1 BFType var BFAccess RW
+Element hutsReadWriteTableInt16Row BasicType integer BERType integer OID 1.2.3.10.1.2.3.1.6103 Access read_only Min -32768 Max 32767 PSID 6103 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteTableInt16IdTable ElementTableIndices hutsReadWriteTableInt16 BFType int16 BFAccess RO
+Element hutsReadWriteTableOctetStringRow BasicType string BERType string OID 1.2.3.11.1.2.3.1.6104 Access read_only Min 6 Max 73 PSID 6104 DefaultIX1 1:0x53:0x54:0x70:0x73:0x74:0x75:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80:0x81:0x82 DefaultIX1 2:0x01:0x02:0x03:0x05:0x06:0x07:0x08:0x09:0x0A:0x10:0x11:0x80:0x81:0x82 DefaultIX1 3:0x01:0x03:0x05:0x16:0x17:0x19:0x1A:0x1B:0x1C:0x1E:0x1F:0x20:0x21:0x80:0x81:0x82 DefaultIX1 4:0x01:0x02:0x03:0x04:0x05:0x06:0x20:0x21:0x24:0x25:0x26:0x29:0x2A:0x2B:0x3A:0x80:0x81:0x82 ElementTable hutsReadWriteTableOctetStringTable ElementTableIndices hutsReadWriteTableOctetString BFType var BFAccess RO
+Element unifiACRetries BasicType integer BERType integer_unsigned32 OID 1.2.3.12.1.2.3.1.2229 Access read_only PSID 2229 GetPerVifFunction mibllsstatsget ElementTable unifiAcTxConfirmTable ElementTableIndices unifiAccessClassIndex BFType uint32 BFAccess RO
+Element unifiTxDataConfirm BasicType integer BERType string OID 1.2.3.12.1.2.3.1.2253 Access read_write PSID 2253 Default 0 SetFunction mibtxdatacfmset ElementTable unifiAcTxConfirmTable ElementTableIndices unifiAccessClassIndex BFType bool BFAccess RW
+Element unifiAgcThresholds BasicType string BERType string OID 1.2.3.13.1.2.3.1.5095 Access read_write Min 0 Max 255 PSID 5095 SetFunction mibricechangefsmparams ElementTable unifiAgcThresholdsTable ElementTableIndices unifiAgcThresholdsTableIndex BFType var BFAccess RW
+Element unifiCCACSThresh BasicType integer BERType integer OID 1.2.3.14.1.2.3.1.5101 Access read_write PSID 5101 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset ElementTable unifiCCACSThreshTable ElementTableIndices unifiSisoMimoTableIndex BFType uint16 BFAccess RW
+Element unifiDPDTrainPacketConfig BasicType string BERType string OID 1.2.3.15.1.2.3.1.2373 Access read_write Min 8 Max 8 PSID 2373 DefaultIX1 1:0x00:0x00:0x80:0x01:0x80:0x05:0x00:0x00 DefaultIX1 2:0x01:0x00:0x82:0x01:0x80:0x05:0x00:0x00 DefaultIX1 3:0x01:0x00:0x82:0x01:0x82:0x05:0x00:0x00 SetFunction mibricechangefsmparams ElementTable unifiDPDTrainPacketConfigTable ElementTableIndices unifiDPDTrainPacketConfigIndex BFType var BFAccess RW
+Element unifiDebugModuleControl BasicType integer BERType integer OID 1.2.3.16.1.2.3.1.5029 Access read_write PSID 5029 DefaultIX1 1:::0xE003: DefaultIX1 2:::0xE000: DefaultIX1 3:::0x00FF: DefaultIX1 4:::0xE004: DefaultIX1 5:::0x00FF: DefaultIX1 6:::0xE000: DefaultIX1 7:::0xE004: DefaultIX1 8:::0xE004: DefaultIX1 9:::0x00FF: DefaultIX1 10::0x00FF: DefaultIX1 11::0x0001: DefaultIX1 12::0x00FF: DefaultIX1 13::0x00FF: DefaultIX1 14::0xE000: DefaultIX1 15::0x00FF: DefaultIX1 16::0x00FF: DefaultIX1 17::0x0001: DefaultIX1 18::0xE004: DefaultIX1 19::0xE004: DefaultIX1 20::0xE000: DefaultIX1 21::0xE004: DefaultIX1 22::0xE004: DefaultIX1 23::0x0000: DefaultIX1 24::0xE004: DefaultIX1 25::0x0001: DefaultIX1 26::0x00FF: DefaultIX1 27::0x00FF: DefaultIX1 28::0xE004: DefaultIX1 29::0x0001: DefaultIX1 30::0x0001: DefaultIX1 31::0xE000: DefaultIX1 32::0x00FF: DefaultIX1 33::0x00FF: DefaultIX1 34::0x00FF: DefaultIX1 35::0xE001: DefaultIX1 36::0x0000: DefaultIX1 37::0xE004: DefaultIX1 38::0x00FF: DefaultIX1 39::0x0004: DefaultIX1 40::0x00FF: DefaultIX1 41::0x0000: DefaultIX1 42::0x00FF: DefaultIX1 43::0xE004: DefaultIX1 44::0xE004: DefaultIX1 45::0xE000: DefaultIX1 46::0x00FF: DefaultIX1 47::0x00FF: DefaultIX1 48::0x0000: DefaultIX1 49::0x0000: DefaultIX1 50::0x0001: DefaultIX1 51::0xE001: DefaultIX1 52::0x000F: DefaultIX1 53::0xE004: DefaultIX1 54::0xE004: DefaultIX1 55::0x0004: DefaultIX1 56::0x0004: DefaultIX1 57::0x00FF: DefaultIX1 58::0x0000: DefaultIX1 59::0x0000: DefaultIX1 60::0x0000: DefaultIX1 61::0x0000: DefaultIX1 62::0xE001: DefaultIX1 63::0x00FF: DefaultIX1 64::0x0001: DefaultIX1 65::0x00FF: DefaultIX1 66::0xE004: DefaultIX1 67::0xE00F: DefaultIX1 68::0x000F: DefaultIX1 69::0xE004: DefaultIX1 70::0xE004: DefaultIX1 71::0x00FF: DefaultIX1 72::0xE004: DefaultIX1 73::0x0004: DefaultIX1 74::0xE004: DefaultIX1 75::0xE004: DefaultIX1 76::0x0000: ElementTable unifiDebugConfigTable ElementTableIndices unifiDebugModulesIndex BFType uint16 BFAccess RW
+Element unifiDefaultCountry BasicType string BERType string OID 1.2.3.17.1.2.3.1.8013 Access read_write Min 3 Max 3 PSID 8013 DefaultIX1 1:0x30:0x30:0x20 DefaultIX1 2:0x00:0x01:0x02 SetFunction mibdefaultcountryupdate ElementTable unifiDefaultCountryTable ElementTableIndices unifiDefaultCountryIndex BFType var BFAccess RW
+Element unifiDpdDebug BasicType integer BERType integer_unsigned32 OID 1.2.3.18.1.2.3.1.5106 Access read_write PSID 5106 DefaultIX1 1::170: DefaultIX1 2::3::: SetFunction mibricechangenonfsmparams ElementTable unifiDpdDebugTable ElementTableIndices unifiDpdDebugTableIndex BFType uint32 BFAccess RW
+Element unifiDpdPredistortGains BasicType string BERType string OID 1.2.3.19.1.2.3.1.2257 Access read_write Min 14 Max 14 PSID 2257 SetFunction mibricechangefsmparams ElementTable unifiDpdPredistortGainsTable ElementTableIndices unifiDpdPredistortGainsTableIndex BFType var BFAccess RW
+Element unifiFaultSubSystemControl BasicType integer BERType integer OID 1.2.3.20.1.2.3.1.5028 Access read_write PSID 5028 DefaultIX1 1:::0x0001: DefaultIX1 2:::0x0001: DefaultIX1 3:::0x0001: DefaultIX1 4:::0x0001: DefaultIX1 5:::0x0001: DefaultIX1 6:::0x0001: ElementTable unifiFaultConfigTable ElementTableIndices unifiSubSystemsIndex BFType uint16 BFAccess RW
+Element unifiFrameRXCounters BasicType integer BERType integer_unsigned32 OID 1.2.3.21.1.2.3.1.2326 Access read_write PSID 2326 GetPerVifFunction mib_frameRXcounters_get ElementTable unifiFrameRXCountersTable ElementTableIndices unifiFrameRXCountersTableIndex BFType uint32 BFAccess RW
+Element unifiFrameTXCounters BasicType integer BERType integer_unsigned32 OID 1.2.3.22.1.2.3.1.2327 Access read_write PSID 2327 GetPerVifFunction mib_frameTXcounters_get ElementTable unifiFrameTXCountersTable ElementTableIndices unifiFrameTXCountersTableIndex BFType uint32 BFAccess RW
+Element unifiLoadDpdLut BasicType string BERType string OID 1.2.3.23.1.2.3.1.2255 Access read_write Min 147 Max 147 PSID 2255 GetFunction mibbmsgget SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTable ElementTableIndices unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiOverrideDpdLut BasicType string BERType string OID 1.2.3.23.1.2.3.1.2258 Access read_write Min 147 Max 147 PSID 2258 SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTable ElementTableIndices unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiLoadDpdLutPerRadio BasicType string BERType string OID 1.2.3.24.1.2.3.1.2280 Access read_write Min 147 Max 147 PSID 2280 GetFunction mibbmsgget SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTablePerRadio ElementTableIndices unifiLoadDpdLutRadioIndex:unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiOverrideDpdLutPerRadio BasicType string BERType string OID 1.2.3.24.1.2.3.1.2281 Access read_write Min 147 Max 147 PSID 2281 SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTablePerRadio ElementTableIndices unifiLoadDpdLutRadioIndex:unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiMacCCABusyTime BasicType integer BERType integer OID 1.2.3.25.1.2.3.1.5104 Access read_write PSID 5104 GetFunction mibhalmacmacconfiggenericget ElementTable unifiMacBusyTimeTable ElementTableIndices unifiMacInstanceIndex:unifiMacBusyTimeTableIndex BFType uint16 BFAccess RW
+Element unifiModemSgiOffset BasicType integer BERType integer OID 1.2.3.26.1.2.3.1.5090 Access read_write PSID 5090 SetFunction mibhalmacmodemgenericset ElementTable unifiModemSgiOffsetTable ElementTableIndices unifiBandTableIndex:unifiBWTableIndex BFType uint16 BFAccess RW
+Element unifiNANDefaultScanDwellTime BasicType integer BERType integer OID 1.2.3.27.1.2.3.1.6095 Access read_write PSID 6095 DefaultIX1 1:200 DefaultIX1 2:200 ElementTable unifiNANDefaultScanDwellTimeTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiNANDefaultScanPeriod BasicType integer BERType integer OID 1.2.3.28.1.2.3.1.6096 Access read_write PSID 6096 DefaultIX1 1:20 DefaultIX1 2:20 ElementTable unifiNANDefaultScanPeriodTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiNarrowbandCCADebug BasicType integer BERType integer_unsigned32 OID 1.2.3.29.1.2.3.1.5107 Access read_only PSID 5107 GetFunction mibhalmacmodemnarrowbandcca ElementTable unifiNarrowbandCCADebugTable ElementTableIndices unifiNarrowbandCCADebugTableIndex BFType uint32 BFAccess RO
+Element unifiNoCellMaxPower BasicType integer BERType integer OID 1.2.3.30.1.2.3.1.8017 Access read_write PSID 8017 DefaultIX1 1::28: DefaultIX1 2::28: DefaultIX1 3::20: DefaultIX1 4::20: ElementTable unifiNoCellTable ElementTableIndices unifiConnectionTypeTableIndex BFType int16 BFAccess RW
+Element unifiOperatingClassParamters BasicType string BERType string OID 1.2.3.31.1.2.3.1.8015 Access read_only Min 1 Max 73 PSID 8015 DefaultIX1 1:0x51:0x53:0x54:0x73:0x74:0x75:0x76:0x77:0x78:0x79:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80 DefaultIX1 2:0x01:0x02:0x03:0x04:0x05:0x06:0x07:0x08:0x09:0x0A:0x0B:0x0C:0x11:0x80 DefaultIX1 3:0x01:0x02:0x03:0x04:0x05:0x0C:0x16:0x17:0x18:0x19:0x1A:0x1B:0x1C:0x1D:0x1E:0x1F:0x20:0x21:0x80 DefaultIX1 4:0x01:0x1E:0x20:0x21:0x22:0x24:0x25:0x27:0x29:0x2A:0x2C:0x38:0x39:0x3A:0x80 ElementTable unifiOperatingClassTable ElementTableIndices unifiOperatingClassTableIndex BFType var BFAccess RO
+Element unifiOverrideEDCAParam BasicType string BERType string OID 1.2.3.32.1.2.3.1.2156 Access read_write Min 0 Max 255 PSID 2156 DefaultIX1 1:0x0:0x32:0x0:0x0 DefaultIX1 2:0x0:0x32:0x0:0x0 DefaultIX1 3:0x0:0x32:0x0:0x0 DefaultIX1 4:0x0:0x32:0x0:0x0 ElementTable unifiOverrideEDCAParamTable ElementTableIndices unifiAccessClassIndex BFType var BFAccess RW
+Element unifiPanicSubSystemControl BasicType integer BERType integer OID 1.2.3.33.1.2.3.1.5026 Access read_write PSID 5026 DefaultIX1 1:::0x0001: DefaultIX1 2:::0x0001: DefaultIX1 3:::0x0001: DefaultIX1 4:::0x0000: DefaultIX1 5:::0x0001: DefaultIX1 6:::0x0001: ElementTable unifiPanicConfigTable ElementTableIndices unifiSubSystemsIndex BFType uint16 BFAccess RW
+Element unifiPeerBandwidth BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2094 Access read_only PSID 2094 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiCurrentPeerNss BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2095 Access read_only PSID 2095 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiPeerTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.34.1.2.3.1.2096 Access read_only PSID 2096 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint32 BFAccess RO
+Element unifiPeerRSSI BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2097 Access read_only PSID 2097 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType int16 BFAccess RO
+Element unifiPeerRxRetryCount BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2198 Access read_only PSID 2198 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiPeerRxMulticastCount BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2199 Access read_only PSID 2199 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiSwToHwQueueStats BasicType integer BERType integer OID 1.2.3.35.1.2.3.1.2250 Access read_only PSID 2250 GetPerVifFunction mibqueuestatsget ElementTable unifiQueueStatsIdTable ElementTableIndices unifiQueueStatsIndex BFType uint16 BFAccess RO
+Element unifiHostToSwQueueStats BasicType integer BERType integer OID 1.2.3.35.1.2.3.1.2251 Access read_only PSID 2251 GetPerVifFunction mibqueuestatsget ElementTable unifiQueueStatsIdTable ElementTableIndices unifiQueueStatsIndex BFType uint16 BFAccess RO
+Element unifiRSSICURoamScanTrigger BasicType integer BERType integer OID 1.2.3.36.1.2.3.1.2307 Access read_write PSID 2307 DefaultIX1 1::-60: DefaultIX1 2::-70: ElementTable unifiRSSICURoamScanTriggerTable ElementTableIndices unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiRadioCCADebug BasicType integer BERType integer_unsigned32 OID 1.2.3.37.1.2.3.1.5100 Access read_only PSID 5100 GetFunction mibriceuint32get ElementTable unifiRadioCCADebugTable ElementTableIndices unifiRadioInstanceIndex:unifiRadioCCADebugTableIndex BFType uint32 BFAccess RO
+Element unifiRadioCCAThresholds BasicType string BERType string OID 1.2.3.38.1.2.3.1.2368 Access read_write Min 0 Max 255 PSID 2368 DefaultIX1 1:0x01:0x03:0x07:0x03:0x03:0x00:0x16:0x00:0x30:0x00:0x16:0x00:0x30 DefaultIX1 2:0x02:0x03:0x07:0x03:0x03:0x00:0x16:0x00:0x30:0x00:0x16:0x00:0x30 SetFunction mibricechangefsmparams ElementTable unifiRadioCCAThresholdsTable ElementTableIndices unifiRadioCCAThresholdsTableIndex BFType var BFAccess RW
+Element unifiNarrowbandCCAThresholds BasicType string BERType string OID 1.2.3.38.1.2.3.1.5099 Access read_write Min 0 Max 255 PSID 5099 DefaultIX1 1:0x01:0x03:0x01:0x03:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x03 DefaultIX1 2:0x02:0x03:0x06:0x03:0x01:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x03 SetFunction mibhalmacmodemchangeparams ElementTable unifiRadioCCAThresholdsTable ElementTableIndices unifiRadioCCAThresholdsTableIndex BFType var BFAccess RW
+Element unifiRadioOnTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2230 Access read_only PSID 2230 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioTxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2231 Access read_only PSID 2231 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioRxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2232 Access read_only PSID 2232 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioScanTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2233 Access read_only PSID 2233 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioOnTimeNan BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2236 Access read_only PSID 2236 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioRXSettingsRead BasicType string BERType string OID 1.2.3.40.1.2.3.1.5096 Access read_only PSID 5096 GetFunction mibbmsgget ElementTable unifiRadioRXSettingsTable ElementTableIndices unifiRadioInstanceIndex:unifiRadioRXSettingsIndex BFType var BFAccess RO
+Element unifiRadioTXSettingsRead BasicType integer BERType integer_unsigned32 OID 1.2.3.41.1.2.3.1.5089 Access read_only PSID 5089 GetFunction mibriceuint32get ElementTable unifiRadioTXSettingsTable ElementTableIndices unifiMacInstanceIndex:unifiRadioTXSettingsIndex BFType uint32 BFAccess RO
+Element unifiRadioTxIqDelay BasicType string BERType string OID 1.2.3.42.1.2.3.1.5117 Access read_write Min 0 Max 255 PSID 5117 DefaultIX1 1:0x01:0xff:0xff:0xff:0x00 DefaultIX1 2:0x02:0xff:0xff:0xff:0x00 SetFunction mibricechangefsmparams ElementTable unifiRadioTxIqDelayTable ElementTableIndices unifiRadioTxIqDelayTableIndex BFType var BFAccess RW
+Element unifiRadioTxPowerOverride BasicType integer BERType integer OID 1.2.3.43.1.2.3.1.5091 Access read_write Min -128 Max 127 PSID 5091 SetFunction mibricegenericset GetFunction mibint16get ElementTable unifiRadioTxPowerOverrideTable ElementTableIndices unifiRadioTXPowerOverrideTableIndex BFType int16 BFAccess RW
+Element unifiRateStatsRxSuccessCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2206 Access read_only PSID 2206 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiRateStatsTxSuccessCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2207 Access read_only PSID 2207 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiRateStatsRate BasicType integer BERType integer OID 1.2.3.44.1.2.3.1.2212 Access read_only PSID 2212 GetFunction mibuint16get ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint16 BFAccess RO
+Element unifiRateStatsRTSErrorCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2358 Access read_only PSID 2358 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiReadHardwareCounter BasicType integer BERType integer_unsigned32 OID 1.2.3.45.1.2.3.1.5087 Access read_only PSID 5087 GetFunction mibreadhardwarecounter ElementTable unifiReadHardwareCounterTable ElementTableIndices unifiRadioInstanceIndex:unifiReadHardwareCounterIndex BFType uint32 BFAccess RO
+Element unifiReadReg BasicType integer BERType integer_unsigned32 OID 1.2.3.46.1.2.3.1.8051 Access read_only PSID 8051 GetFunction mibreadreg ElementTable unifiReadRegTable ElementTableIndices unifiReadHardwareCounterIndex BFType uint32 BFAccess RO
+Element unifiRegulatoryParameters BasicType string BERType string OID 1.2.3.47.1.2.3.1.8011 Access read_only Min 3 Max 73 PSID 8011 DefaultIX1 1:0x30:0x30:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x99:0x09:0xB2:0x09:0x28:0x14:0x01:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 2:0x58:0x58:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 3:0x41:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0x50:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 4:0x41:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 5:0x41:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 6:0x41:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 7:0x41:0x49:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 8:0x41:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 9:0x41:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x12:0x00 DefaultIX1 10:0x41:0x4E:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 11:0x41:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 12:0x41:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 13:0x41:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 14:0x41:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 15:0x41:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 16:0x41:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x17:0x12:0x5E:0x15:0xE0:0x15:0x50:0x1E:0x02:0x12:0x16:0x62:0x16:0x50:0x1E:0x02:0x5D:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 17:0x41:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x5D:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 18:0x41:0x58:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 19:0x41:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x12:0x00:0x82:0x14:0xD2:0x14:0x50:0x12:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 20:0x42:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 21:0x42:0x42:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 22:0x42:0x44:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 23:0x42:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 24:0x42:0x46:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 25:0x42:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x5D:0x16:0xF3:0x16:0x50:0x0E:0x00 DefaultIX1 26:0x42:0x48:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x14:0x10:0x82:0x14:0xD2:0x14:0x14:0x14:0x12:0x67:0x16:0xCB:0x16:0x14:0x14:0x00 DefaultIX1 27:0x42:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 28:0x42:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x14:0x14:0x00 DefaultIX1 29:0x42:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 30:0x42:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 31:0x42:0x4E:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 32:0x42:0x4F:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x1E:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x10 DefaultIX1 33:0x42:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 34:0x42:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 35:0x42:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 36:0x42:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 37:0x42:0x57:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 38:0x42:0x59:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x12:0x16:0x4E:0x16:0x28:0x1B:0x02 DefaultIX1 39:0x42:0x5A:0x03:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 40:0x43:0x41:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xE0:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 41:0x43:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 42:0x43:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 43:0x43:0x46:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x11:0x00:0x82:0x14:0xD2:0x14:0x28:0x18:0x02:0x72:0x15:0x4E:0x16:0x28:0x18:0x02 DefaultIX1 44:0x43:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 45:0x43:0x48:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 46:0x43:0x49:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 47:0x43:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 48:0x43:0x4C:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 49:0x43:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 50:0x43:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 51:0x43:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 52:0x43:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 53:0x43:0x55:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 54:0x43:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 55:0x43:0x58:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0xA0:0x1B:0x02:0x12:0x16:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 56:0x43:0x59:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 57:0x43:0x5A:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 58:0x44:0x45:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 59:0x44:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 60:0x44:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 61:0x44:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 62:0x44:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 63:0x44:0x5A:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xE6:0x14:0x50:0x17:0x02:0x5E:0x15:0x26:0x16:0xA0:0x1E:0x02 DefaultIX1 64:0x45:0x43:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 65:0x45:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 66:0x45:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02 DefaultIX1 67:0x45:0x48:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02 DefaultIX1 68:0x45:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 69:0x45:0x53:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 70:0x45:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 71:0x46:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 72:0x46:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 73:0x46:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 74:0x46:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 75:0x46:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 76:0x46:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 77:0x46:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 78:0x47:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 79:0x47:0x42:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 80:0x47:0x44:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 81:0x47:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x12:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 82:0x47:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 83:0x47:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 84:0x47:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 85:0x47:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 86:0x47:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 87:0x47:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 88:0x47:0x4E:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 89:0x47:0x50:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 90:0x47:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 91:0x47:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 92:0x47:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 93:0x47:0x54:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 94:0x47:0x55:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 95:0x47:0x57:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 96:0x47:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 97:0x48:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 98:0x48:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 99:0x48:0x4E:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 100:0x48:0x52:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 101:0x48:0x54:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 102:0x48:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 103:0x49:0x44:0x03:0x62:0x09:0xB2:0x09:0x14:0x14:0x00:0x67:0x16:0xCB:0x16:0x14:0x17:0x00 DefaultIX1 104:0x49:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 105:0x49:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x17:0x12:0x72:0x15:0x62:0x16:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x17:0x01 DefaultIX1 106:0x49:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 107:0x49:0x4E:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 108:0x49:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 109:0x49:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 110:0x49:0x52:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 111:0x49:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 112:0x49:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 113:0x4A:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 114:0x4A:0x4D:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 115:0x4A:0x4F:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x67:0x16:0xCB:0x16:0x50:0x17:0x00 DefaultIX1 116:0x4A:0x50:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0xAA:0x09:0xBE:0x09:0x14:0x14:0x04:0x2E:0x13:0x7E:0x13:0x28:0x17:0x00:0xA6:0x13:0xE2:0x13:0x28:0x17:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x17:0x02 DefaultIX1 117:0x4B:0x45:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x28:0x17:0x00 DefaultIX1 118:0x4B:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 119:0x4B:0x48:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1B:0x00 DefaultIX1 120:0x4B:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 121:0x4B:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 122:0x4B:0x4E:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 123:0x4B:0x50:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 124:0x4B:0x52:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x5E:0x15:0x62:0x16:0xA0:0x1E:0x02:0x5D:0x16:0xDA:0x16:0x50:0x1E:0x00 DefaultIX1 125:0x4B:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 126:0x4B:0x59:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 127:0x4B:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xE6:0x14:0x50:0x14:0x02:0x12:0x16:0x4E:0x16:0x50:0x14:0x02 DefaultIX1 128:0x4C:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 129:0x4C:0x42:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 130:0x4C:0x43:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 131:0x4C:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 132:0x4C:0x4B:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 133:0x4C:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 134:0x4C:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 135:0x4C:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 136:0x4C:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 137:0x4C:0x56:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 138:0x4C:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 139:0x4D:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12 DefaultIX1 140:0x4D:0x43:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 141:0x4D:0x44:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 142:0x4D:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 143:0x4D:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 144:0x4D:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 145:0x4D:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 146:0x4D:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 147:0x4D:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 148:0x4D:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x4E:0x16:0x50:0x1E:0x02 DefaultIX1 149:0x4D:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 150:0x4D:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x17:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 151:0x4D:0x50:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 152:0x4D:0x51:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 153:0x4D:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 154:0x4D:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 155:0x4D:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 156:0x4D:0x55:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 157:0x4D:0x56:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5D:0x16:0xDA:0x16:0x50:0x14:0x00 DefaultIX1 158:0x4D:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 159:0x4D:0x58:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 160:0x4D:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x12:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x18:0x00 DefaultIX1 161:0x4D:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 162:0x4E:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 163:0x4E:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 164:0x4E:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 165:0x4E:0x46:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 166:0x4E:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 167:0x4E:0x49:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 168:0x4E:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 169:0x4E:0x4F:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 170:0x4E:0x50:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x67:0x16:0xB7:0x16:0x50:0x14:0x00 DefaultIX1 171:0x4E:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 172:0x4E:0x55:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 173:0x4E:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 174:0x4F:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 175:0x50:0x41:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x5E:0x15:0x62:0x16:0xA0:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 176:0x50:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 177:0x50:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 178:0x50:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 179:0x50:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 180:0x50:0x4B:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 181:0x50:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 182:0x50:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 183:0x50:0x4E:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 184:0x50:0x52:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 185:0x50:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 186:0x50:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 187:0x50:0x57:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 188:0x50:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 189:0x51:0x41:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x62:0x16:0xA0:0x1B:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x12 DefaultIX1 190:0x52:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 191:0x52:0x4F:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 192:0x52:0x53:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0xE6:0x14:0x28:0x17:0x10:0x5E:0x15:0x5D:0x16:0x14:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 193:0x52:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 194:0x52:0x57:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 195:0x53:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xB7:0x16:0x50:0x0E:0x00 DefaultIX1 196:0x53:0x42:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 197:0x53:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 198:0x53:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 199:0x53:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 200:0x53:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 201:0x53:0x48:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 202:0x53:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 203:0x53:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 204:0x53:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 205:0x53:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 206:0x53:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 207:0x53:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02 DefaultIX1 208:0x53:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 209:0x53:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 210:0x53:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 211:0x53:0x54:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 212:0x53:0x56:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 213:0x53:0x58:0x00:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 214:0x53:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 215:0x53:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 216:0x54:0x43:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 217:0x54:0x44:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 218:0x54:0x46:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 219:0x54:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x4E:0x16:0x28:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 220:0x54:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 221:0x54:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 222:0x54:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 223:0x54:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 224:0x54:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 225:0x54:0x4E:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0xD6:0x15:0x50:0x14:0x02 DefaultIX1 226:0x54:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 227:0x54:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 228:0x54:0x54:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 229:0x54:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 230:0x54:0x57:0x01:0x60:0x09:0xA8:0x09:0x28:0x1E:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xE6:0x14:0x50:0x17:0x02:0x5E:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xDA:0x16:0x50:0x1E:0x00 DefaultIX1 231:0x54:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 232:0x55:0x41:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x72:0x15:0x26:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 233:0x55:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xB7:0x16:0x50:0x1E:0x00 DefaultIX1 234:0x55:0x4D:0x00:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 235:0x55:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 236:0x55:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 237:0x55:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02 DefaultIX1 238:0x56:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 239:0x56:0x43:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 240:0x56:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 241:0x56:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 242:0x56:0x49:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 243:0x56:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 244:0x56:0x55:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 245:0x57:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1B:0x00 DefaultIX1 246:0x57:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x62:0x16:0x28:0x1B:0x02:0x67:0x16:0xA3:0x16:0x28:0x1B:0x00 DefaultIX1 247:0x58:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 248:0x59:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 249:0x59:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 250:0x5A:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 251:0x5A:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 252:0x5A:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 ElementTable unifiRegulatoryTable ElementTableIndices unifiRegulatoryTableIndex BFType var BFAccess RO
+Element unifiRoamCUFactor BasicType string BERType string OID 1.2.3.48.1.2.3.1.2295 Access read_write PSID 2295 DefaultIX1 1:0x09:0x64:0x00 DefaultIX1 2:0x45:0x6F:0x0D DefaultIX1 3:0x65:0x14:0x00 DefaultIX1 4:0x1D:0x64:0x00 DefaultIX1 5:0x4F:0x94:0x10 DefaultIX1 6:0x65:0x14:0x00 ElementTable unifiRoamCUFactorTable ElementTableIndices unifiRoamCUFactorTableIndex BFType var BFAccess RW
+Element unifiRoamCUScanTrigger BasicType integer BERType integer OID 1.2.3.49.1.2.3.1.2308 Access read_write PSID 2308 DefaultIX1 1::70: DefaultIX1 2::70: ElementTable unifiRoamCUScanTriggerTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiRoamRSSIBoost BasicType integer BERType integer OID 1.2.3.50.1.2.3.1.2298 Access read_write PSID 2298 DefaultIX1 1:0 DefaultIX1 2:0 ElementTable unifiRoamRSSIBoostTable ElementTableIndices unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiRoamRssiFactor BasicType string BERType string OID 1.2.3.51.1.2.3.1.2306 Access read_write PSID 2306 DefaultIX1 1:0xC9:0x64:0x00:0x00 DefaultIX1 2:0xC4:0x5A:0x02:0x3C DefaultIX1 3:0xBA:0x3C:0x03:0x46 DefaultIX1 4:0xB0:0x14:0x04:0x50 DefaultIX1 5:0xA6:0x00:0x02:0x5A DefaultIX1 6:0x81:0x00:0x00:0x00 ElementTable unifiRoamRssiFactorTable ElementTableIndices unifiRoamRssiFactorTableIndex BFType var BFAccess RW
+Element unifiRxExternalGainFrequency BasicType integer BERType integer OID 1.2.3.52.1.2.3.1.5037 Access read_write Min 3940 Max 12000 PSID 5037 SetFunction mibricegenericset ElementTable unifiRxExternalGainTable ElementTableIndices unifiRxExternalGainTableIndex BFType uint16 BFAccess RW
+Element unifiRxExternalGain BasicType integer BERType integer OID 1.2.3.52.1.2.3.1.5038 Access read_write Min -128 Max 127 PSID 5038 SetFunction mibricegenericset ElementTable unifiRxExternalGainTable ElementTableIndices unifiRxExternalGainTableIndex BFType int16 BFAccess RW
+Element unifiRxRssiAdjustments BasicType string BERType string OID 1.2.3.53.1.2.3.1.5115 Access read_write Min 4 Max 4 PSID 5115 SetFunction mibricegenericset ElementTable unifiRxRssiAdjustmentsTable ElementTableIndices unifiRadioIndex:unifiBandTableIndex BFType var BFAccess RW
+Element unifiSarBackoff BasicType integer BERType integer OID 1.2.3.54.1.2.3.1.6026 Access read_write PSID 6026 DefaultIX2 1:1:60 DefaultIX2 1:2:52 DefaultIX2 2:1:59 DefaultIX2 2:2:51 DefaultIX2 3:1:58 DefaultIX2 3:2:50 DefaultIX2 4:1:57 DefaultIX2 4:2:49 ElementTable unifiSarBackoffTable ElementTableIndices unifiSarModeTableIndex:unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiScanParameters BasicType string BERType string OID 1.2.3.55.1.2.3.1.2154 Access read_write Min 18 Max 18 PSID 2154 DefaultIX1 1:0x06:0x09:0x18:0x00:0x3A:0x00:0x66:0x00:0x00:0x06:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 2:0x06:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x06:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 3:0x02:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x02:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 4:0x06:0x09:0x18:0x00:0x44:0x00:0x66:0x00:0x00:0x06:0x01:0x18:0x00:0x32:0x00:0x66:0x00:0x00 DefaultIX1 5:0x06:0x08:0x18:0x00:0x44:0x00:0x00:0x00:0x00:0x06:0x00:0x18:0x00:0x32:0x00:0x00:0x00:0x00 DefaultIX1 6:0x04:0x09:0x18:0x00:0x3A:0x00:0x00:0x00:0x00:0x04:0x01:0x18:0x00:0x3A:0x00:0x00:0x00:0x00 DefaultIX1 7:0x04:0x09:0x18:0x00:0x27:0x00:0x00:0x00:0x00:0x04:0x01:0x18:0x00:0x27:0x00:0x00:0x00:0x00 DefaultIX1 8:0x00:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x00:0x01:0x44:0x00:0x92:0x00:0x75:0x00:0x00 DefaultIX1 9:0x02:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x02:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 10:0x03:0x09:0x18:0x00:0x3A:0x00:0x66:0x00:0x80:0x03:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x80 DefaultIX1 11:0x04:0x0C:0x1B:0x00:0x44:0x00:0x75:0x00:0x04:0x04:0x04:0x1B:0x00:0x44:0x00:0x75:0x00:0x04 DefaultIX1 12:0x04:0x09:0x1B:0x00:0x44:0x00:0x75:0x00:0x04:0x04:0x01:0x1B:0x00:0x44:0x00:0x75:0x00:0x04 DefaultIX1 13:0x08:0x08:0x27:0x00:0x62:0x00:0x75:0x00:0x04:0x08:0x00:0x27:0x00:0x62:0x00:0x75:0x00:0x04 DefaultIX1 14:0x08:0x08:0x27:0x00:0x62:0x00:0x75:0x00:0x04:0x08:0x00:0x27:0x00:0x62:0x00:0x75:0x00:0x04 DefaultIX1 15:0x03:0x09:0x05:0x00:0x14:0x00:0x64:0x00:0x00:0x03:0x01:0x05:0x00:0x14:0x00:0x64:0x00:0x00 DefaultIX1 16:0x03:0x08:0x00:0x00:0x00:0x00:0xC8:0x00:0x01:0x03:0x00:0x00:0x00:0x00:0x00:0xC8:0x00:0x01 DefaultIX1 17:0x04:0x08:0x1B:0x00:0x44:0x00:0x75:0x00:0x00:0x04:0x00:0x1B:0x00:0x44:0x00:0x75:0x00:0x00 DefaultIX1 18:0x00:0x09:0x02:0x03:0x04:0x05:0x06:0x07:0x08:0x09:0x08:0x07:0x06:0x05:0x04:0x03:0x02:0x01 ElementTable unifiScanParametersTable ElementTableIndices unifiScanParametersTableIndex BFType var BFAccess RW
+Element unifiStaticDpdGain BasicType string BERType string OID 1.2.3.56.1.2.3.1.5097 Access read_write Min 11 Max 27 PSID 5097 SetFunction mibricechangefsmparams ElementTable unifiStaticDpdGainTable ElementTableIndices unifiStaticDpdGainTableIndex BFType var BFAccess RW
+Element unifiThroughputDebug BasicType integer BERType integer OID 1.2.3.57.1.2.3.1.2254 Access read_write PSID 2254 GetPerVifFunction mibthroughputdiagnosticsget SetPerVifFunction mibthroughputdiagnosticsset ElementTable unifiThroughputDebugTable ElementTableIndices unifiThroughputDebugIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaConnectionLossFrequency BasicType integer BERType integer OID 1.2.3.58.1.2.3.1.5033 Access read_write Min 3940 Max 12000 PSID 5033 SetFunction mibricegenericset ElementTable unifiTxAntennaConnectionLossTable ElementTableIndices unifiTxAntennaConnectionLossTableIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaConnectionLoss BasicType integer BERType integer OID 1.2.3.58.1.2.3.1.5034 Access read_write Min -128 Max 127 PSID 5034 SetFunction mibricegenericset ElementTable unifiTxAntennaConnectionLossTable ElementTableIndices unifiTxAntennaConnectionLossTableIndex BFType int16 BFAccess RW
+Element unifiTxAntennaMaxGainFrequency BasicType integer BERType integer OID 1.2.3.59.1.2.3.1.5035 Access read_write Min 3940 Max 12000 PSID 5035 SetFunction mibricegenericset ElementTable unifiTxAntennaMaxGainTable ElementTableIndices unifiTxAntennaMaxGainTableIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaMaxGain BasicType integer BERType integer OID 1.2.3.59.1.2.3.1.5036 Access read_write Min -128 Max 127 PSID 5036 SetFunction mibricegenericset ElementTable unifiTxAntennaMaxGainTable ElementTableIndices unifiTxAntennaMaxGainTableIndex BFType int16 BFAccess RW
+Element unifiTxDetectorFrequencyCompensation BasicType string BERType string OID 1.2.3.60.1.2.3.1.5057 Access read_write Min 0 Max 255 PSID 5057 SetFunction mibricechangefsmparams ElementTable unifiTxDetectorFrequencyCompensationTable ElementTableIndices unifiTxDetectorTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxDetectorTemperatureCompensation BasicType string BERType string OID 1.2.3.61.1.2.3.1.5056 Access read_write Min 0 Max 255 PSID 5056 SetFunction mibricechangefsmparams ElementTable unifiTxDetectorTemperatureCompensationTable ElementTableIndices unifiTxDetectorTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxFtrimSettings BasicType string BERType string OID 1.2.3.62.1.2.3.1.2372 Access read_write Min 0 Max 255 PSID 2372 SetFunction mibricechangefsmparams ElementTable unifiTxFtrimSettingsTable ElementTableIndices unifiTxFtrimSettingsTableIndex BFType var BFAccess RW
+Element unifiTxGainSettings BasicType string BERType string OID 1.2.3.63.1.2.3.1.5032 Access read_write Min 0 Max 255 PSID 5032 SetFunction mibricechangefsmparams ElementTable unifiTxGainSettingsTable ElementTableIndices unifiTxGainSettingsTableIndex BFType var BFAccess RW
+Element unifiTxGainStepSettings BasicType string BERType string OID 1.2.3.64.1.2.3.1.5081 Access read_write Min 0 Max 255 PSID 5081 SetFunction mibricechangefsmparams ElementTable unifiTxGainStepSettingsTable ElementTableIndices unifiTxGainStepSettingsTableIndex BFType var BFAccess RW
+Element unifiTxOOBConstraints BasicType string BERType string OID 1.2.3.65.1.2.3.1.5064 Access read_write Min 0 Max 255 PSID 5064 SetFunction mibricechangefsmparams ElementTable unifiTxOOBConstraintTable ElementTableIndices unifiTxOOBConstraintTableIndex BFType var BFAccess RW
+Element unifiTxOpenLoopFrequencyCompensation BasicType string BERType string OID 1.2.3.66.1.2.3.1.5059 Access read_write Min 0 Max 255 PSID 5059 SetFunction mibricechangefsmparams ElementTable unifiTxOpenLoopFrequencyCompensationTable ElementTableIndices unifiTxOpenLoopFrequencyCompensationTableIndex BFType var BFAccess RW
+Element unifiTxOpenLoopTemperatureCompensation BasicType string BERType string OID 1.2.3.67.1.2.3.1.5058 Access read_write Min 0 Max 255 PSID 5058 SetFunction mibricechangefsmparams ElementTable unifiTxOpenLoopTemperatureCompensationTable ElementTableIndices unifiTxOpenLoopTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPaGainDpdFrequencyCompensation BasicType string BERType string OID 1.2.3.68.1.2.3.1.5067 Access read_write Min 0 Max 255 PSID 5067 SetFunction mibricechangefsmparams ElementTable unifiTxPaGainDpdFrequencyCompensationTable ElementTableIndices unifiTxPaGainDpdFrequencyCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPaGainDpdTemperatureCompensation BasicType string BERType string OID 1.2.3.69.1.2.3.1.5066 Access read_write Min 0 Max 255 PSID 5066 SetFunction mibricechangefsmparams ElementTable unifiTxPaGainDpdTemperatureCompensationTable ElementTableIndices unifiTxPaGainDpdTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPowerDetectorResponse BasicType string BERType string OID 1.2.3.70.1.2.3.1.5055 Access read_write Min 0 Max 255 PSID 5055 SetFunction mibricechangefsmparams ElementTable unifiTxPowerDetectorResponseTable ElementTableIndices unifiTxPowerDetectorResponseTableIndex BFType var BFAccess RW
+Element unifiTxPowerTrimConfig BasicType string BERType string OID 1.2.3.71.1.2.3.1.5072 Access read_write Min 25 Max 25 PSID 5072 SetFunction mibricechangefsmparams ElementTable unifiTxPowerTrimConfigTable ElementTableIndices unifiTxPowerTrimConfigTableIndex BFType var BFAccess RW
+Element unifiTxSettings BasicType string BERType string OID 1.2.3.72.1.2.3.1.5031 Access read_write Min 0 Max 255 PSID 5031 SetFunction mibricechangefsmparams ElementTable unifiTxSettingsTable ElementTableIndices unifiTxSettingsTableIndex BFType var BFAccess RW
--- /dev/null
+leman_s612_smdk
--- /dev/null
+leman_s620_flexi
--- /dev/null
+leman_s620_maestro
--- /dev/null
+leman_s620_maestro_siso
--- /dev/null
+leman_s620_robusta2_nofem
--- /dev/null
+leman_s620_smdk
--- /dev/null
+leman_s620_wing_dualfem
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2017, moredump definitions for Cortex R7 processor
+-->
+
+<processor xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:schemaLocation="http://www.samsung.com Processor.xsd"
+ name="Cortex R7"
+ comment="Cortex R7 Processor/co-processors">
+
+ <cpuregister name="R0"/>
+ <cpuregister name="R1"/>
+ <cpuregister name="R2"/>
+ <cpuregister name="R3"/>
+ <cpuregister name="R4"/>
+ <cpuregister name="R5"/>
+ <cpuregister name="R6"/>
+ <cpuregister name="R7"/>
+ <cpuregister name="R8"/>
+ <cpuregister name="R9"/>
+ <cpuregister name="R10"/>
+ <cpuregister name="R11"/>
+ <cpuregister name="R12"/>
+ <cpuregister name="R13"/>
+ <cpuregister name="R14"/>
+ <cpuregister name="PC"/>
+ <cpuregister name="SPSR"/>
+ <cpuregister name="CPSR"/>
+ <cpuregister name="R8_USR"/>
+ <cpuregister name="R9_USR"/>
+ <cpuregister name="R10_USR"/>
+ <cpuregister name="R11_USR"/>
+ <cpuregister name="R12_USR"/>
+ <cpuregister name="R13_USR"/>
+ <cpuregister name="R14_USR"/>
+ <cpuregister name="R8_FIQ"/>
+ <cpuregister name="R9_FIQ"/>
+ <cpuregister name="R10_FIQ"/>
+ <cpuregister name="R11_FIQ"/>
+ <cpuregister name="R12_FIQ"/>
+ <cpuregister name="R13_FIQ"/>
+ <cpuregister name="R14_FIQ"/>
+ <cpuregister name="SPSR_FIQ"/>
+ <cpuregister name="R13_SVC"/>
+ <cpuregister name="R14_SVC"/>
+ <cpuregister name="SPSR_SVC"/>
+ <cpuregister name="R13_IRQ"/>
+ <cpuregister name="R14_IRQ"/>
+ <cpuregister name="SPSR_IRQ"/>
+ <cpuregister name="R13_UND"/>
+ <cpuregister name="R14_UND"/>
+ <cpuregister name="SPSR_UND"/>
+ <cpuregister name="R13_ABT"/>
+ <cpuregister name="R14_ABT"/>
+ <cpuregister name="SPSR_ABT"/>
+
+ <coprocessor name="System Control" id="C15">
+ <block name="C0 Registers">
+ <register addr="0000" rw_flags="R" width="4" name="MIDR" comment="Main ID Register"/>
+ <register addr="0100" rw_flags="R" width="4" name="CTR" comment="Cache Type Register"/>
+ <register addr="0200" rw_flags="R" width="4" name="TCMTR" comment="TCM Type Register"/>
+ <register addr="0400" rw_flags="R" width="4" name="MPUIR" comment="MPU Type Register"/>
+ <register addr="0500" rw_flags="R" width="4" name="MPIDR" comment="Multiprocessor Affinity Register"/>
+ <register addr="0600" rw_flags="R" width="4" name="REVIDR" comment="Revision ID Register"/>
+ <register addr="0010" rw_flags="R" width="4" name="PFR0" comment="Processor Feature Register 0"/>
+ <register addr="0110" rw_flags="R" width="4" name="PFR1" comment="Processor Feature Register 1"/>
+ <register addr="0210" rw_flags="R" width="4" name="DFR0" comment="Debug Feature Register 0"/>
+ <register addr="0310" rw_flags="R" width="4" name="AFR0" comment="Auxiliary Feature Register 0"/>
+ <register addr="0410" rw_flags="R" width="4" name="MMFR0" comment="Memory Model Feature Register 0"/>
+ <register addr="0510" rw_flags="R" width="4" name="MMFR1" comment="Memory Model Feature Register 1"/>
+ <register addr="0610" rw_flags="R" width="4" name="MMFR2" comment="Memory Model Feature Register 2"/>
+ <register addr="0710" rw_flags="R" width="4" name="MMFR3" comment="Memory Model Feature Register 3"/>
+ <register addr="0020" rw_flags="R" width="4" name="ISAR0" comment="Instruction Set Attributes Register 0"/>
+ <register addr="0120" rw_flags="R" width="4" name="ISAR1" comment="Instruction Set Attributes Register 1"/>
+ <register addr="0220" rw_flags="R" width="4" name="ISAR2" comment="Instruction Set Attributes Register 2"/>
+ <register addr="0320" rw_flags="R" width="4" name="ISAR3" comment="Instruction Set Attributes Register 3"/>
+ <register addr="0420" rw_flags="R" width="4" name="ISAR4" comment="Instruction Set Attributes Register 4"/>
+ <register addr="1000" rw_flags="R" width="4" name="CCSIDR" comment="Cache Size ID Register"/>
+ <register addr="1100" rw_flags="R" width="4" name="CLIDR" comment="Cache Level ID Register"/>
+ <register addr="2000" rw_flags="RW" width="4" name="CSSELR" comment="Cache Size Selection Register"/>
+ </block>
+
+ <block name="C1 Registers">
+ <register addr="0101" rw_flags="RW" width="4" name="ACTLR" comment="Auxiliary Control Register"/>
+ <register addr="0201" rw_flags="RW" width="4" name="CPACR" comment="Coprocessor Access Control Register"/>
+ </block>
+
+ <block name="C5 Registers">
+ <register addr="0005" rw_flags="RW" width="4" name="DFSR" comment="Data Fault Status Register"/>
+ <register addr="0105" rw_flags="RW" width="4" name="IFSR" comment="Instruction Fault Status Register"/>
+ </block>
+
+ <block name="C6 Registers">
+ <register addr="0006" rw_flags="RW" width="4" name="DFAR" comment="Data Fault Address Register"/>
+ <register addr="0206" rw_flags="RW" width="4" name="IFAR" comment="Instruction Fault Address Register"/>
+ <table name="MPU Regions">
+ <indexregister addr="0026" rw_flags="RW" width="4" name="RGNR" comment="MPU Region Number Register">
+ <countfrom addr="0400" rw_flags="RW" width="4" name="MPUIR" comment="MPU type register" shift="8" mask="00FF"/>
+ </indexregister>
+ <register addr="0016" rw_flags="RW" width="4" name="DRBAR" comment="Region Base Address Register"/>
+ <register addr="0216" rw_flags="RW" width="4" name="DRSR" comment="Region Size and Enable Register"/>
+ <register addr="0416" rw_flags="RW" width="4" name="DRACR" comment="Region Access Control Register"/>
+ </table>
+ <!-- Must restore this after MPU -->
+ <register addr="0001" rw_flags="RW" width="4" name="SCTLR" comment="Control Register"/>
+ </block>
+
+ <block name="C7 Registers">
+ <register addr="0407" rw_flags="W" width="4" name="NOP" comment="No Operation Register"/>
+ <register addr="0017" rw_flags="W" width="4" name="ICIALLUIS" comment="Invalidate All Instruction Caches To PoU Inner Shareable Register"/>
+ <register addr="0617" rw_flags="W" width="4" name="BPIALLIS" comment="Invalidate Entire Branch Predictor Array Inner Shareable Register"/>
+ <register addr="0057" rw_flags="W" width="4" name="ICIALLU" comment="Invalidate Entire Instruction Cache Register"/>
+ <register addr="0157" rw_flags="W" width="4" name="ICIMVAU" comment="Invalidate Instruction Cache Line by VA to Point-of-Unification Register"/>
+ <register addr="0457" rw_flags="W" width="4" name="CP15ISB" comment="Instruction Synchronization Barrier Register"/>
+ <register addr="0657" rw_flags="W" width="4" name="BPIALL" comment="Invalidate Entire Branch Predictor Array (NOP) Register"/>
+ <register addr="0757" rw_flags="W" width="4" name="BPIMVA" comment="Invalidate MVA From Branch Predictors Register"/>
+ <register addr="0167" rw_flags="W" width="4" name="DCIMVAC" comment="Invalidate Data Cache Line by VA to PoC Register"/>
+ <register addr="0267" rw_flags="W" width="4" name="DCISW" comment="Invalidate Data Cache Line by Set/Way Register"/>
+ <register addr="01a7" rw_flags="W" width="4" name="DCCMVAC" comment="Clean Data Cache Line to PoC by VA Register"/>
+ <register addr="02a7" rw_flags="W" width="4" name="DCCSW" comment="Clean Data Cache Line by Set/Way Register"/>
+ <register addr="04a7" rw_flags="W" width="4" name="CP15DSB" comment="Data Synchronization Barrier Register"/>
+ <register addr="05a7" rw_flags="W" width="4" name="CP15DMB" comment="Data Memory Barrier Register"/>
+ <register addr="01b7" rw_flags="W" width="4" name="DCCMVAU" comment="Clean Data Or Unified Cache Line By VA To PoU Register"/>
+ <register addr="01e7" rw_flags="W" width="4" name="DCCIMVAC" comment="Clean and Invalidate Data Cache Line by VA to PoC Register"/>
+ <register addr="02e7" rw_flags="W" width="4" name="DCCISW" comment="Clean and Invalidate Data Cache Line by Set/Way Register"/>
+ </block>
+
+ <block name="C9 Registers">
+ <register addr="0019" rw_flags="RW" width="4" name="DTCMRR" comment="DTCM Region Register"/>
+ <register addr="0119" rw_flags="RW" width="4" name="ITCMRR" comment="ITCM Region Register"/>
+ <register addr="00c9" rw_flags="RW" width="4" name="PMCR" comment="Performance Monitor Count Register"/>
+ <register addr="01c9" rw_flags="RW" width="4" name="PMCNTENSET" comment="Count Enable Set Register"/>
+ <register addr="02c9" rw_flags="RW" width="4" name="PMCNTENCLR" comment="Count Enable Clear Register"/>
+ <register addr="03c9" rw_flags="RW" width="4" name="PMOVSR" comment="Overflow Flag Status Register"/>
+ <register addr="04c9" rw_flags="W" width="4" name="PMSWINC" comment="Software Increment Register"/>
+ <table name="Performance Counters">
+ <indexregister addr="05c9" rw_flags="RW" width="4" name="PMSELR" comment="Performance Counter Selection Register">
+ <count value="8"/>
+ </indexregister>
+ <register addr="00d9" rw_flags="RW" width="4" name="PMCCNTR" comment="Cycle Count Register"/>
+ <register addr="01d9" rw_flags="RW" width="4" name="PMXEVTYPER" comment="Event Type Selection Register"/>
+ <register addr="02d9" rw_flags="RW" width="4" name="PMXEVCNTR" comment="Event Count Register"/>
+ </table>
+ <register addr="00e9" rw_flags="RW" width="4" name="PMUSERENR" comment="User Enable Register"/>
+ <register addr="01e9" rw_flags="RW" width="4" name="PMINTENSET" comment="Interrupt Enable Set Register"/>
+ <register addr="02e9" rw_flags="RW" width="4" name="PMINTENCLR" comment="Interrupt Enable Clear Register"/>
+ </block>
+
+ <block name="C13 Registers">
+ <register addr="010d" rw_flags="RW" width="4" name="CONTEXTIDR" comment="Context ID Register"/>
+ <register addr="020d" rw_flags="RW" width="4" name="TPIDRURW" comment="User Read/Write Thread ID Register"/>
+ <register addr="030d" rw_flags="RW" width="4" name="TPIDRURO" comment="User Read-only Thread ID Register"/>
+ <register addr="040d" rw_flags="RW" width="4" name="TPIDRPRW" comment="Privileged Only Thread ID Register"/>
+ </block>
+
+ <block name="C15 Registers">
+ <register addr="000f" rw_flags="RW" width="4" name="PCR" comment="Power Control Register"/>
+ <register addr="001f" rw_flags="RW" width="4" name="CTDOR" comment="Cache and TCM Debug Operation Register"/>
+ <register addr="011f" rw_flags="RW" width="4" name="RADRLO" comment="RAM Access Data Low Register"/>
+ <register addr="021f" rw_flags="RW" width="4" name="RADRHI" comment="RAM Access Data High Register"/>
+ <register addr="031f" rw_flags="RW" width="4" name="RAECCR" comment="RAM Access ECC Register"/>
+ <register addr="002f" rw_flags="R" width="4" name="D_ECC_ENTRY_0" comment="D ECC Error Entry 0 Register"/>
+ <register addr="012f" rw_flags="R" width="4" name="D_ECC_ENTRY_1" comment="D ECC Error Entry 1 Register"/>
+ <register addr="022f" rw_flags="R" width="4" name="D_ECC_ENTRY_2" comment="D ECC Error Entry 2 Register"/>
+ <register addr="003f" rw_flags="R" width="4" name="I_ECC_ENTRY_0" comment="I ECC Error Entry 0 Register"/>
+ <register addr="013f" rw_flags="R" width="4" name="I_ECC_ENTRY_1" comment="I ECC Error Entry 1 Register"/>
+ <register addr="023f" rw_flags="R" width="4" name="I_ECC_ENTRY_2" comment="I ECC Error Entry 2 Register"/>
+ <register addr="004f" rw_flags="RW" width="4" name="DTCM_ECC_ENTRY" comment="DTCM ECC Entry Register"/>
+ <register addr="005f" rw_flags="RW" width="4" name="ITCM_ECC_ENTRY" comment="ITCM ECC Entry Register"/>
+ </block>
+ </coprocessor>
+
+ <coprocessor name="Memory mapped registers" id="C14">
+ <block name="Debug registers">
+ <register addr="0000" rw_flags="R" width="4" name="DBGDIDR" comment="Debug ID Register"/>
+ <register addr="0007" rw_flags="RW" width="4" name="DBGVCR" comment="Vector Catch Register"/>
+ <register addr="0020" rw_flags="R" width="4" name="DBGDTRRX" comment="Data Transfer Register (External View)"/>
+ <register addr="0021" rw_flags="W" width="4" name="DBGITR" comment="Instruction Transfer Register"/>
+ <register addr="0021" rw_flags="R" width="4" name="DBGPCSR" comment="Program Counter Sampling Register"/>
+ <register addr="0022" rw_flags="RW" width="4" name="DBGDSCR" comment="Debug Status and Control Register (External View)"/>
+ <register addr="0023" rw_flags="RW" width="4" name="DBGDTRTX" comment="Target to Host Data Transfer Register (External View)"/>
+ <register addr="0024" rw_flags="W" width="4" name="DBGDRCR" comment="Debug Run Control Register"/>
+
+ <register addr="0040" rw_flags="RW" width="4" name="DBGBVR0" comment="Breakpoint Value 0 Register"/>
+ <register addr="0041" rw_flags="RW" width="4" name="DBGBVR1" comment="Breakpoint Value 1 Register"/>
+ <register addr="0042" rw_flags="RW" width="4" name="DBGBVR2" comment="Breakpoint Value 2 Register"/>
+ <register addr="0043" rw_flags="RW" width="4" name="DBGBVR3" comment="Breakpoint Value 3 Register"/>
+ <register addr="0044" rw_flags="RW" width="4" name="DBGBVR4" comment="Breakpoint Value 4 Register"/>
+ <register addr="0045" rw_flags="RW" width="4" name="DBGBVR5" comment="Breakpoint Value 5 Register"/>
+
+ <register addr="0050" rw_flags="RW" width="4" name="DBGBCR0" comment="Breakpoint Control 0 Register"/>
+ <register addr="0051" rw_flags="RW" width="4" name="DBGBCR1" comment="Breakpoint Control 1 Register"/>
+ <register addr="0052" rw_flags="RW" width="4" name="DBGBCR2" comment="Breakpoint Control 2 Register"/>
+ <register addr="0053" rw_flags="RW" width="4" name="DBGBCR3" comment="Breakpoint Control 3 Register"/>
+ <register addr="0054" rw_flags="RW" width="4" name="DBGBCR4" comment="Breakpoint Control 4 Register"/>
+ <register addr="0055" rw_flags="RW" width="4" name="DBGBCR5" comment="Breakpoint Control 5 Register"/>
+
+ <register addr="0060" rw_flags="RW" width="4" name="DBGWVR0" comment="Watchpoint Value 0 Register"/>
+ <register addr="0061" rw_flags="RW" width="4" name="DBGWVR1" comment="Watchpoint Value 1 Register"/>
+ <register addr="0062" rw_flags="RW" width="4" name="DBGWVR2" comment="Watchpoint Value 2 Register"/>
+ <register addr="0063" rw_flags="RW" width="4" name="DBGWVR3" comment="Watchpoint Value 3 Register"/>
+
+ <register addr="0070" rw_flags="RW" width="4" name="DBGWCR0" comment="Watchpoint Control 0 Register"/>
+ <register addr="0071" rw_flags="RW" width="4" name="DBGWCR1" comment="Watchpoint Control 1 Register"/>
+ <register addr="0072" rw_flags="RW" width="4" name="DBGWCR2" comment="Watchpoint Control 2 Register"/>
+ <register addr="0073" rw_flags="RW" width="4" name="DBGWCR3" comment="Watchpoint Control 3 Register"/>
+
+ <register addr="00c4" rw_flags="RW" width="4" name="DBGPRCR" comment="Device Power-down and Reset Control Register"/>
+ <register addr="00c5" rw_flags="R" width="4" name="DBGPRSR" comment="Device Power-down and Reset Status Register"/>
+ </block>
+
+ <block name="Processor ID Registers">
+ <register addr="0340" rw_flags="R" width="4" name="CPUID" comment="Main ID Register"/>
+ <register addr="0341" rw_flags="R" width="4" name="CTR" comment="Cache Type Register"/>
+ <register addr="0342" rw_flags="R" width="4" name="TCMTR" comment="TCM Type Register"/>
+ <register addr="0348" rw_flags="R" width="4" name="ID_PFR0" comment="Processor Feature Register 0"/>
+ <register addr="0349" rw_flags="R" width="4" name="ID_PFR1" comment="Processor Feature Register 1"/>
+ <register addr="034a" rw_flags="R" width="4" name="ID_DFR0" comment="Debug Feature Register 0"/>
+ <register addr="034b" rw_flags="R" width="4" name="ID_AFR0" comment="Auxiliary Feature Register 0"/>
+ <register addr="034c" rw_flags="R" width="4" name="ID_MMFR0" comment="Processor Feature Register 0"/>
+ <register addr="034d" rw_flags="R" width="4" name="ID_MMFR1" comment="Processor Feature Register 1"/>
+ <register addr="034e" rw_flags="R" width="4" name="ID_MMFR2" comment="Processor Feature Register 2"/>
+ <register addr="034f" rw_flags="R" width="4" name="ID_MMFR3" comment="Processor Feature Register 3"/>
+ <register addr="0350" rw_flags="R" width="4" name="ID_ISAR0" comment="ISA Feature Register 0"/>
+ <register addr="0351" rw_flags="R" width="4" name="ID_ISAR1" comment="ISA Feature Register 1"/>
+ <register addr="0352" rw_flags="R" width="4" name="ID_ISAR2" comment="ISA Feature Register 2"/>
+ <register addr="0353" rw_flags="R" width="4" name="ID_ISAR3" comment="ISA Feature Register 3"/>
+ <register addr="0354" rw_flags="R" width="4" name="ID_ISAR4" comment="ISA Feature Register 4"/>
+ <register addr="0355" rw_flags="R" width="4" name="ID_ISAR5" comment="ISA Feature Register 5"/>
+ </block>
+
+ <block name="Management Registers">
+ <register addr="03c0" rw_flags="RW" width="4" name="DBGITCTRL" comment="Integration Mode Control Register"/>
+ <register addr="03e8" rw_flags="RW" width="4" name="DBGCLAIMSET" comment="Claim Tag Set Register"/>
+ <register addr="03e9" rw_flags="RW" width="4" name="DBGCLAIMCLR" comment="Claim Tag Clear Register"/>
+ <register addr="03ec" rw_flasg="W" width="4" name="DBGLAR" comment="Lock Access Register"/>
+ <register addr="03ed" rw_flags="R" width="4" name="DBGLSR" comment="Lock Status Register"/>
+ <register addr="03ee" rw_flags="R" width="4" name="DBGAUTHSTATUS" comment="Authentication Status Register"/>
+ <register addr="03f2" rw_flags="R" width="4" name="DBGDEVID" comment="Debug Device ID Register"/>
+ <register addr="03f3" rw_flags="R" width="4" name="DBGDEVTYPE" comment="Device Type Register"/>
+ </block>
+
+ <block name="CoreSight Identification Registers">
+ <register addr="03f8" rw_flags="R" width="4" name="PERIPHERALID0" comment="Peripheral Identification Register 0"/>
+ <register addr="03f9" rw_flags="R" width="4" name="PERIPHERALID1" comment="Peripheral Identification Register 1"/>
+ <register addr="03fa" rw_flags="R" width="4" name="PERIPHERALID2" comment="Peripheral Identification Register 2"/>
+ <register addr="03fb" rw_flags="R" width="4" name="PERIPHERALID3" comment="Peripheral Identification Register 3"/>
+ <register addr="03f4" rw_flags="R" width="4" name="PERIPHERALID4" comment="Peripheral Identification Register 4"/>
+ <register addr="03fc" rw_flags="R" width="4" name="COMPONENTID0" comment="Component Identification Register 0"/>
+ <register addr="03fd" rw_flags="R" width="4" name="COMPONENTID1" comment="Component Identification Register 1"/>
+ <register addr="03fe" rw_flags="R" width="4" name="COMPONENTID2" comment="Component Identification Register 2"/>
+ <register addr="03ff" rw_flags="R" width="4" name="COMPONENTID3" comment="Component Identification Register 3"/>
+ </block>
+ </coprocessor>
+</processor>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_ap2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_ap2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0030000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0030008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a003000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0030010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0030014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0030018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a003001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0030020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0030024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0030028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a003002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0030050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0030080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0030084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0030088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a003008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_apm2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_apm2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0020000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0020008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a002000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0020010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0020014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0020018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a002001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0020020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0020024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0020028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a002002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0020050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0020080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0020084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0020088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a002008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_cp2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_cp2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0000000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0000008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a000000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0000010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0000014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0000018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a000001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0000020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0000024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0000028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a000002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0000050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0000080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0000084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0000088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a000008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_shub2wlbt subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_shub2wlbt">
+ <block name="mailbox" comment="">
+ <register addr="a0010000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0010008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a001000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0010010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0010014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0010018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a001001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0010020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0010024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0010028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a001002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0010050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0010080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0010084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0010088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a001008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_wlbt2abox subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_wlbt2abox">
+ <block name="mailbox" comment="">
+ <register addr="a0040000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0040008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a004000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0040010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0040014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0040018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a004001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0040020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0040024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0040028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a004002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0040050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0040080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0040084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0040088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a004008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for mb_wlbt2gnss subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="mb_wlbt2gnss">
+ <block name="mailbox" comment="">
+ <register addr="a0050000" rw_flags="RW" width="4" name="MCUCTRL" comment="MCU_Controller_Register"/>
+ <register addr="a0050008" rw_flags="RW" width="4" name="INTGR0" comment="Interrupt_Generation_Register_0"/>
+ <register addr="a005000c" rw_flags="RW" width="4" name="INTCR0" comment="Interrupt_Clear_Register_0"/>
+ <register addr="a0050010" rw_flags="RW" width="4" name="INTMR0" comment="Interrupt_MASK_Register_0"/>
+ <register addr="a0050014" rw_flags="RW" width="4" name="INTSR0" comment="Interrupt_Status_Register_0"/>
+ <register addr="a0050018" rw_flags="RW" width="4" name="INTMSR0" comment="Interrupt_MASK_Status_Register_0"/>
+ <register addr="a005001c" rw_flags="RW" width="4" name="INTGR1" comment="Interrupt_Generation_Register_1"/>
+ <register addr="a0050020" rw_flags="RW" width="4" name="INTCR1" comment="Interrupt_Clear_Register_1"/>
+ <register addr="a0050024" rw_flags="RW" width="4" name="INTMR1" comment="Interrupt_MASK_Register_1"/>
+ <register addr="a0050028" rw_flags="RW" width="4" name="INTSR1" comment="Interrupt_Status_Register_1"/>
+ <register addr="a005002c" rw_flags="RW" width="4" name="INTMSR1" comment="Interrupt_MASK_Status_Register_1"/>
+ <register addr="a0050050" rw_flags="R" width="4" name="IS_VERSION" comment="Version_information_register"/>
+ <register addr="a0050080" rw_flags="RW" width="4" name="ISSR0" comment="IS_Shared_Register_0"/>
+ <register addr="a0050084" rw_flags="RW" width="4" name="ISSR1" comment="IS_Shared_Register_1"/>
+ <register addr="a0050088" rw_flags="RW" width="4" name="ISSR2" comment="IS_Shared_Register_2"/>
+ <register addr="a005008c" rw_flags="RW" width="4" name="ISSR3" comment="IS_Shared_Register_3"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2017, definitions for moredump3: leman/ramen platform
+-->
+
+<moredump xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:schemaLocation="http://www.samsung.com ..\Moredump.xsd">
+
+ <target name="leman" aka="mxl250" idat="51000000" chipid="A4" firmware="80000000"
+ comment="http://confluence/display/MXL250/Maxwell250+Memory+Map">
+ <!-- Define the mmap range - DO NOT CHANGE THIS -->
+ <mmap startAddr="80000000" endAddr="805FFFFF" dev="/dev/mx_0_mmap"/>
+
+ <bb>
+ <!-- Fix this: SSB-30790 /dev/mx_0_r7_gdb -->
+ <cpu name="CortexR7" xml="cortexR7.xml" t32API="20001" t32GDB="30001" dev="/dev/mx_0_r4_gdb">
+ <extraXml name ="GIC" xml="periph_gic_registers.xml"/>
+ </cpu>
+ <subsystem name="btwl" xml="peri_registers.xml"/>
+ </bb>
+
+ <memory>
+ <region startAddr="00000000" endAddr="0000FFFF" name="ITCM" comment="64K"/>
+ <region startAddr="10000000" endAddr="1000FFFF" name="DTCM" comment="64K"/>
+ <region startAddr="52008000" endAddr="520083FF" name="KARAM" comment="1K"/>
+ <region startAddr="60000000" endAddr="60047FFF" name="RAMS" comment="288KB" />
+ <region startAddr="80000000" endAddr="805FFFFF" name="DRAM" comment="6MB" />
+ <region startAddr="82000000" endAddr="8209FFFF" name="SMAPPER0" comment="640KB" />
+ <region startAddr="82100000" endAddr="8219FFFF" name="SMAPPER1" comment="640KB" />
+ <region startAddr="82200000" endAddr="8229FFFF" name="SMAPPER2" comment="640KB" />
+ <region startAddr="82300000" endAddr="8239FFFF" name="SMAPPER3" comment="640KB" />
+
+ <extraXml name="A-BOX mailbox" xml="mb_wlbt2abox_registers.xml"/>
+ <extraXml name="AP mailbox" xml="mb_ap2wlbt_registers.xml"/>
+ <extraXml name="APM mailbox" xml="mb_apm2wlbt_registers.xml"/>
+ <extraXml name="Sensor hub mailbox" xml="mb_shub2wlbt_registers.xml"/>
+ <extraXml name="Cellular mailbox" xml="mb_cp2wlbt_registers.xml"/>
+ <extraXml name="GNSS mailbox" xml="mb_wlbt2gnss_registers.xml"/>
+ </memory>
+ </target>
+
+ <rfchips bt_speedy="56002000" wl_speedy="50130000" zippy="56100000">
+ <!-- Both of these point to the same xml, it is up to the build system to deploy the correct xml -->
+ <rfchip name="jar" idat="0000" chipid="B1" interface="speedy" comment="S612">
+ </rfchip>
+ <rfchip name="hopper" idat ="0000" chipid ="B2" interface ="zippy" comment="S620">
+ </rfchip>
+ </rfchips>
+</moredump>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for peri subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="peri">
+ <block name="bbic_pad_control" comment="">
+ <register addr="54000000" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL0" comment="Control register for pad RFIC_CTRL0"/>
+ <register addr="54000004" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL1" comment="Control register for pad RFIC_CTRL1"/>
+ <register addr="54000008" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL2" comment="Control register for pad RFIC_CTRL2"/>
+ <register addr="5400000c" rw_flags="RW" width="1" name="BBIC_PAD_CONTROL_RFIC_CTRL3" comment="Control register for pad RFIC_CTRL3"/>
+ </block>
+ <block name="bt_bb_bsp" comment="">
+ <register addr="56001000" rw_flags="R" width="4" name="BT_DEBUG" comment="BT Debug readback."/>
+ <register addr="56001004" rw_flags="RW" width="4" name="BT_DEBUG_MUX" comment="BT Debug Mux Selection."/>
+ <register addr="56001008" rw_flags="RW" width="4" name="BT_WBREE_CONFIG" comment="Enables Wibree featues."/>
+ <register addr="5600100c" rw_flags="RW" width="4" name="BT_WBREE_CONFIG_EXT" comment="Extra Wibree controls."/>
+ <register addr="56001010" rw_flags="RW" width="2" name="BT_WBREE_CONFIG_2M" comment="2M Wibree controls."/>
+ <register addr="56001014" rw_flags="RW" width="1" name="BT_WBREE_CONFIG_LR" comment="LR Wibree controls."/>
+ <register addr="56001018" rw_flags="RW" width="4" name="BT_WBREE_CONFIG_ANGLE" comment="AOD /AOAWibree controls."/>
+ <register addr="5600101c" rw_flags="RW" width="4" name="BT_WBREE_SUPP_ENABLES" comment="More AOD /AOA Wibree controls."/>
+ <register addr="56001020" rw_flags="RW" width="4" name="BT_WBREE_LEN_PARAMS" comment="Configure BLE length paramters"/>
+ <register addr="56001024" rw_flags="RW" width="2" name="BT_LEN_PARAMS" comment="Configure BR, EDR length paramters"/>
+ <register addr="56001028" rw_flags="RW" width="2" name="BT_ANTPLUS_CONFIG" comment="Enables ANT+ featues."/>
+ <register addr="5600102c" rw_flags="RW" width="4" name="BT_LLR_TRIGGER_LSW" comment="LLR Access Code to transmit or receive LSW"/>
+ <register addr="56001030" rw_flags="RW" width="4" name="BT_LLR_TRIGGER_MSW" comment="LLR Access Code to transmit or receive MSW"/>
+ <register addr="56001034" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_1" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="56001038" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_2" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="5600103c" rw_flags="RW" width="4" name="BT_AES_ACL_CFG_3" comment="Enable BT AES and AES CCM modes on ACL packets"/>
+ <register addr="56001040" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_1" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001044" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_2" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001048" rw_flags="RW" width="4" name="BT_AES_ACL23_CFG_3" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="5600104c" rw_flags="RW" width="2" name="BT_AES_ACL23_CFG_4" comment="Enable BT AES and AES CCM modes on EDR ACL packets"/>
+ <register addr="56001050" rw_flags="RW" width="4" name="BT_AES_ESCO_CFG" comment="Enable BT AES modes on ESCO packets"/>
+ <register addr="56001054" rw_flags="RW" width="4" name="BT_AES_ESCO23_CFG" comment="Enable BT AES modes on EDR ESCO packets"/>
+ <register addr="56001058" rw_flags="RW" width="4" name="BT_AES_MISC_CFG" comment="Miscellaneous BT AES config"/>
+ <register addr="5600105c" rw_flags="RW" width="4" name="BT_CONFIG_TX" comment="BT Config TX on Bitstream processing control"/>
+ <register addr="56001060" rw_flags="RW" width="2" name="BT_CONFIG_TX2" comment="BT Config TX on Bitstream processing control"/>
+ <register addr="56001064" rw_flags="RW" width="4" name="BT_TX_AUTO_START_TIME" comment="Automatically turn on the Tx Bitstream digital at this time when TX_AUTO_START_EN is set."/>
+ <register addr="56001068" rw_flags="RW" width="4" name="BT_CONFIG_RX" comment="BT Config RX on Bitstream processing control"/>
+ <register addr="5600106c" rw_flags="RW" width="4" name="BT_RX_AUTO_START_TIME" comment="Automatically turn on the Rx Bitstream digital at this time when RX_AUTO_START_EN is set."/>
+ <register addr="56001070" rw_flags="RW" width="2" name="BT_CONFIG_COEX" comment="BT Config Coex Masking "/>
+ <register addr="56001074" rw_flags="RW" width="1" name="BT_SPEEDY_RST" comment="BT reset on Bitstream processing control"/>
+ <register addr="56001078" rw_flags="RW" width="4" name="BT_SPEEDY_S_MON_CTRL" comment="BT Speedy Slave Monitor Ctrl"/>
+ <register addr="5600107c" rw_flags="RW" width="4" name="BT_SPEEDY_M_MON_CTRL" comment="BT Speedy Master Monitor Ctrl"/>
+ <register addr="56001080" rw_flags="R" width="4" name="BT_SPEEDY_MON_STATUS" comment="BT Speedy Monitor Status"/>
+ <register addr="56001084" rw_flags="R" width="1" name="BT_SPEEDY_INT_STATUS" comment="BT Speedy Monitor Status"/>
+ <register addr="56001088" rw_flags="RW" width="2" name="BT_BUF_CTRL" comment="BT Axi Buffer Ctrl"/>
+ <register addr="5600108c" rw_flags="R" width="4" name="BT_BUF_STATUS" comment="BT Axi Buffer Status"/>
+ <register addr="56001090" rw_flags="R" width="4" name="BT_BUF_STATUS2" comment="BT Axi Buffer Status bits"/>
+ <register addr="56001094" rw_flags="RW" width="1" name="BT_TX_LINK_TYPE" comment=""/>
+ <register addr="56001098" rw_flags="RW" width="1" name="BT_TX_CORRUPT_CRC" comment="Corrupt transmitted CRC by inverting for BLE/BDR/EDR"/>
+ <register addr="5600109c" rw_flags="R" width="2" name="BT_TX_CRC" comment="Transmitted BR/EDR CRC"/>
+ <register addr="560010a0" rw_flags="RW" width="2" name="BT_TX_PACKET_HEADER" comment="Bluetooth packet header data."/>
+ <register addr="560010a4" rw_flags="RW" width="2" name="BT_TX_PAYLOAD_HEADER" comment="Bluetooth payload header data."/>
+ <register addr="560010a8" rw_flags="RW" width="2" name="BT_TX_PAYLOAD_LENGTH" comment="Bluetooth payload length, used by the state machine to seperate from payload_header field changes"/>
+ <register addr="560010ac" rw_flags="RW" width="4" name="BT_TX_VOICE_BUFFER" comment="Buffer Handle for voice data"/>
+ <register addr="560010b0" rw_flags="RW" width="4" name="BT_TX_DATA_BUFFER" comment="Buffer Handle for data"/>
+ <register addr="560010b4" rw_flags="RW" width="4" name="BT_TX_PACKET_CONFIG1" comment=""/>
+ <register addr="560010b8" rw_flags="RW" width="4" name="BT_TX_WBREE_SUPP" comment="Supplemental field for AoA Data packets."/>
+ <register addr="560010bc" rw_flags="RW" width="2" name="BT_TX_WBREE_EXT_HEADER" comment="Advertising extensions field and supplemental field for Data packets."/>
+ <register addr="560010c0" rw_flags="RW" width="2" name="BT_TX_ESCO_NUM_VOICE_BYTES" comment=""/>
+ <register addr="560010c4" rw_flags="R" width="1" name="BT_TX_STATE" comment=""/>
+ <register addr="560010c8" rw_flags="R" width="1" name="BT_TX_EVENT_TYPE" comment="Status of last transmitted packet"/>
+ <register addr="560010cc" rw_flags="R" width="1" name="BT_TX_EVENT_TYPE_BIT" comment="Latch of Status/Errors of last transmitted packet - each bit corresponds to event type value"/>
+ <register addr="560010d0" rw_flags="R" width="4" name="BT_TX_STATE_STATUS_BIT" comment="Latch of TX State Status - each bit corresponds to state we've transitioned through"/>
+ <register addr="560010d4" rw_flags="RW" width="4" name="BT_TX_WBREE_ACCESS_ADDR" comment="Wibree transmit sync word"/>
+ <register addr="560010d8" rw_flags="RW" width="2" name="BT_TX_WBREE_HDR_DATA" comment="Wibree tranamit header - this is what is sent on air"/>
+ <register addr="560010dc" rw_flags="RW" width="1" name="BT_TX_WBREE_LENGTH" comment="Seoerate the length field (use for ctrl), in case field moves"/>
+ <register addr="560010e0" rw_flags="RW" width="4" name="BT_TX_WBREE_AD_ADDR_LSW" comment="Wibree Advertiser address - transmitted by master in an advertising packet LSW"/>
+ <register addr="560010e4" rw_flags="RW" width="2" name="BT_TX_WBREE_AD_ADDR_MSW" comment="Wibree Advertiser address - transmitted by master in an advertising packet MSW"/>
+ <register addr="560010e8" rw_flags="RW" width="4" name="BT_TX_WBREE_CRC_SEED" comment="Seed value for Wibree CRC and ICV checksum"/>
+ <register addr="560010ec" rw_flags="RW" width="4" name="BT_TX_WBREE_BUFFER" comment="Buffer handle for Wibree data"/>
+ <register addr="560010f0" rw_flags="R" width="4" name="BT_TX_WBREE_CRC" comment="Transmitted Wibree CRC/ICV"/>
+ <register addr="560010f4" rw_flags="RW" width="1" name="BT_TX_ANTPLUS_LENGTH" comment="Length of ANT+ frame to transmit in bytes (including access code, etc.). For example, a standard fixed frame length should be 18."/>
+ <register addr="560010f8" rw_flags="RW" width="2" name="BT_TX_LLR_CONFIG" comment="Transmit LLR config : "/>
+ <register addr="560010fc" rw_flags="RW" width="2" name="BT_TX_LLR_REPETTIONS" comment="Number of times to repeat the LLR Trigger code"/>
+ <register addr="56001100" rw_flags="RW" width="4" name="BT_TX_WBREE_HDR_ADV_MASK" comment="Wibree transmit common adv extended header decoding masks"/>
+ <register addr="56001104" rw_flags="RW" width="4" name="BT_TX_WBREE_HDR_ADV_TYPE_DECODE" comment="Wibree transmit common adv extended header type values"/>
+ <register addr="56001108" rw_flags="RW" width="1" name="BT_TX_WAIT_FOR_RFIC_DONE" comment="Wait for the TxDone acknowledgement to come back from the RFIC before firing the end of packet interrupt"/>
+ <register addr="5600110c" rw_flags="RW" width="4" name="BT_TX_DATA_FETCH" comment="BT Config Data Fetch for TX on Bitstream processing control"/>
+ <register addr="56001110" rw_flags="RW" width="1" name="BT_RX_MEMBER_ADDRESS" comment="Receive member address"/>
+ <register addr="56001114" rw_flags="RW" width="2" name="BT_RX_LINK_TYPE" comment="Bluetooth link type"/>
+ <register addr="56001118" rw_flags="RW" width="4" name="BT_RX_FHS_BUFFER" comment="MMU FHS buffer handle"/>
+ <register addr="5600111c" rw_flags="RW" width="4" name="BT_RX_LMP_BUFFER" comment="MMU LMP buffer handle"/>
+ <register addr="56001120" rw_flags="RW" width="4" name="BT_RX_VOICE_BUFFER" comment="MMU Voice buffer handle"/>
+ <register addr="56001124" rw_flags="RW" width="4" name="BT_RX_DATA_BUFFER" comment="MMU Data buffer handle"/>
+ <register addr="56001128" rw_flags="RW" width="2" name="BT_RX_FHS_BUF_SIZE" comment="MMU FHS buffer size "/>
+ <register addr="5600112c" rw_flags="RW" width="2" name="BT_RX_LMP_BUF_SIZE" comment="MMU LMP buffer size "/>
+ <register addr="56001130" rw_flags="RW" width="2" name="BT_RX_VOICE_BUF_SIZE" comment="MMU Voice buffer size"/>
+ <register addr="56001134" rw_flags="RW" width="2" name="BT_RX_DATA_BUF_SIZE" comment="MMU Data buffer size"/>
+ <register addr="56001138" rw_flags="RW" width="4" name="BT_RX_CONFIG" comment=""/>
+ <register addr="5600113c" rw_flags="RW" width="4" name="BT_RX_PACKET_CONFIG1" comment="Receive packet configuration - part1"/>
+ <register addr="56001140" rw_flags="RW" width="2" name="BT_RX_ESCO_NUM_VOICE_BYTES" comment=""/>
+ <register addr="56001144" rw_flags="RW" width="1" name="BT_RX_MR_DEBUG_CONFIG" comment="Enable EDR debug - non zero"/>
+ <register addr="56001148" rw_flags="R" width="1" name="BT_RX_STATE" comment="Debug register - current state of rx_control"/>
+ <register addr="5600114c" rw_flags="R" width="1" name="BT_RX_FEC_NUM_CORR_HEADER_ERRORS" comment="FEC correctable header error count"/>
+ <register addr="56001150" rw_flags="R" width="2" name="BT_RX_PACKET_HEADER" comment="Received packet header"/>
+ <register addr="56001154" rw_flags="R" width="2" name="BT_RX_PAYLOAD_HEADER" comment="Received payload header"/>
+ <register addr="56001158" rw_flags="RW" width="1" name="BT_RX_PAYLOAD_LENGTH_FIELD" comment="ctrl to determine length field in received payload header, Reset to standard payload header length field being bits 12:3"/>
+ <register addr="5600115c" rw_flags="R" width="2" name="BT_RX_PAYLOAD_NUM_VOICE_BYTES" comment="Number of voice bytes received"/>
+ <register addr="56001160" rw_flags="R" width="2" name="BT_RX_PAYLOAD_NUM_DATA_BYTES" comment="Number of data bytes received"/>
+ <register addr="56001164" rw_flags="R" width="1" name="BT_RX_FEC_NUM_CORR_ERRORS" comment="FEC correctable error count"/>
+ <register addr="56001168" rw_flags="R" width="1" name="BT_RX_FEC_NUM_UNCORR_ERRORS" comment="FEC un-correctable error count"/>
+ <register addr="5600116c" rw_flags="W" width="1" name="BT_RX_EVENT_CLEAR" comment="Write to clear receive event and interrupt without disabling the RX - Write sensitive"/>
+ <register addr="56001170" rw_flags="R" width="1" name="BT_RX_EVENT_TYPE" comment="Received event type"/>
+ <register addr="56001174" rw_flags="R" width="4" name="BT_RX_EVENT_TYPE_BIT" comment="Received event type - Latch of bits for each error/event type"/>
+ <register addr="56001178" rw_flags="R" width="4" name="BT_RX_STATE_STATUS_BIT" comment="Latch of RX State Status - each bit corresponds to state we've transitioned through"/>
+ <register addr="5600117c" rw_flags="R" width="4" name="BT_RX_WBREE_HDR_DATA" comment="Wibree received header"/>
+ <register addr="56001180" rw_flags="RW" width="2" name="BT_RX_WBREE_HDR_STP" comment="Wibree received header SP field decoding"/>
+ <register addr="56001184" rw_flags="RW" width="4" name="BT_RX_WBREE_HDR_ADV_MASK" comment="Wibree received common adv extended header decoding masks"/>
+ <register addr="56001188" rw_flags="RW" width="4" name="BT_RX_WBREE_HDR_ADV_TYPE_DECODE" comment="Wibree received common adv extended header type values"/>
+ <register addr="5600118c" rw_flags="RW" width="1" name="BT_RX_WBREE_LENGTH_FIELD" comment="ctrl to determine where to look for length field in received payload header, Reset to standard payload header length field being bits 8:0"/>
+ <register addr="56001190" rw_flags="R" width="1" name="BT_RX_WBREE_SUPP_DATA" comment="Wibree received SuppInfo"/>
+ <register addr="56001194" rw_flags="R" width="4" name="BT_RX_WBREE_AD_ADDR_LSW" comment="Received Advertiser address - applicable to adverting packets only LSW"/>
+ <register addr="56001198" rw_flags="R" width="2" name="BT_RX_WBREE_AD_ADDR_MSW" comment="Received Advertiser address - applicable to adverting packets only MSW"/>
+ <register addr="5600119c" rw_flags="RW" width="4" name="BT_RX_WBREE_CRC_SEED" comment="Wibree CRC seed"/>
+ <register addr="560011a0" rw_flags="RW" width="4" name="BT_RX_WBREE_BUFFER" comment="Wibree receive buffer handle"/>
+ <register addr="560011a4" rw_flags="RW" width="2" name="BT_RX_WBREE_BUF_SIZE" comment="Wibree receive buffer size"/>
+ <register addr="560011a8" rw_flags="RW" width="4" name="BT_RX_WBREE_SUPP_BUFFER" comment="Wibree receive Supplemental buffer handle"/>
+ <register addr="560011ac" rw_flags="RW" width="4" name="BT41_ZL_NONCE_CFG" comment="Set zero flag on Rcv Nonce for zero length packets received with following types:"/>
+ <register addr="560011b0" rw_flags="R" width="4" name="AES_CCM_DATA" comment="Received encrypted MIC"/>
+ <register addr="560011b4" rw_flags="R" width="4" name="AES_EXP_CCM_DATA" comment="Expected encrypted MIC"/>
+ <register addr="560011b8" rw_flags="RW" width="1" name="BT41_SNIFF_MODE" comment="Prevent decryption of incoming data stream"/>
+ <register addr="560011bc" rw_flags="RW" width="1" name="BT_RX_ANTPLUS_LENGTH" comment="ANT plus packet length (for receive state machine)"/>
+ <register addr="560011c0" rw_flags="RW" width="1" name="BT_RX_WAIT_FOR_RFIC_DONE" comment="Wait for the RxDone acknowledgement to come back from the RFIC before firing the end of packet interrupt"/>
+ <register addr="560011c4" rw_flags="RW" width="1" name="BT_RX_DISABLE_RF_PAYLOAD_MSG" comment="Option to allow the disabling of the payload length being sent for MLSE/MLE"/>
+ <register addr="560011c8" rw_flags="RW" width="1" name="BT_RX_BDR_SYNC_INT_EN" comment="Enable generation of interrupt on BDR Sync"/>
+ <register addr="560011cc" rw_flags="RW" width="1" name="BT_RX_MLE_ACL_PAYLOAD_DELAY" comment="Number of clock cycles to delay sending the ACL payload to the RFIC. This is used to correct a potential timing issue (see SB-17048)"/>
+ <register addr="560011d0" rw_flags="RW" width="4" name="BT_TXRX_MASTER_CLOCK" comment="Master clock seed for BT encryption LSFR"/>
+ <register addr="560011d4" rw_flags="RW" width="4" name="BT_TXRX_MASTER_ADDRESS_LSW" comment="Master address seed for BT encryption LSFR"/>
+ <register addr="560011d8" rw_flags="RW" width="2" name="BT_TXRX_MASTER_ADDRESS_MSW" comment="Master address seed for BT encryption LSFR"/>
+ <register addr="560011dc" rw_flags="RW" width="4" name="BT_TXRX_ACCESS_CODE_LAP" comment="Lower 24 bits of BT address to generate access code"/>
+ <register addr="560011e0" rw_flags="RW" width="1" name="BT_TXRX_WHITEN_ACTIVE" comment="Enable data whitening"/>
+ <register addr="560011e4" rw_flags="RW" width="1" name="BT_TXRX_WHITEN_SEED" comment="Whitener seed for BT and Wibree packets"/>
+ <register addr="560011e8" rw_flags="RW" width="1" name="BT_TXRX_ENCRYPT_ACTIVE" comment="Enable BT encryption"/>
+ <register addr="560011ec" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[0]" comment="BT encryption key"/>
+ <register addr="560011f0" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[1]" comment="BT encryption key"/>
+ <register addr="560011f4" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[2]" comment="BT encryption key"/>
+ <register addr="560011f8" rw_flags="RW" width="4" name="BT_TXRX_ENCRYPT_KEY[3]" comment="BT encryption key"/>
+ <register addr="560011fc" rw_flags="RW" width="1" name="BT_TXRX_HEC_CRC_SEED" comment="Transmit and receive Header Error CRC seed"/>
+ <register addr="56001200" rw_flags="RW" width="1" name="BT_TXRX_AES_DBG_ADDR" comment="Select data to be read in AES_DBG_DATA"/>
+ <register addr="56001204" rw_flags="R" width="2" name="BT_TXRX_AES_DBG_DATA" comment="P and K debug data"/>
+ <register addr="56001208" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[0]" comment="AES key"/>
+ <register addr="5600120c" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[1]" comment="AES key"/>
+ <register addr="56001210" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[2]" comment="AES key"/>
+ <register addr="56001214" rw_flags="RW" width="4" name="BT_TXRX_AES_KEY[3]" comment="AES key"/>
+ <register addr="56001218" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[0]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600121c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[1]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001220" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[2]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001224" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[3]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001228" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[4]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600122c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[5]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001230" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[6]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001234" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[7]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001238" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[8]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600123c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[9]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001240" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[10]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001244" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[11]" comment="AES Nonce to be encrypted"/>
+ <register addr="56001248" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE[12]" comment="AES Nonce to be encrypted"/>
+ <register addr="5600124c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[0]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001250" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[1]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001254" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[2]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001258" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[3]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600125c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[4]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001260" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[5]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001264" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[6]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001268" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[7]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600126c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[8]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001270" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[9]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001274" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[10]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001278" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[11]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="5600127c" rw_flags="RW" width="1" name="BT_TXRX_AES_NONCE2[12]" comment="AES Additional Nonce to be encrypted"/>
+ <register addr="56001280" rw_flags="RW" width="2" name="BT_TXRX_AES_CCM_HDR_EN1" comment="Select which bits of header make up B0 key for AES-CCM"/>
+ <register addr="56001284" rw_flags="RW" width="2" name="BT_TXRX_AES_CCM_HDR_EN2" comment="Select which bits of header make up B0 key for AES-CCM"/>
+ <register addr="56001288" rw_flags="RW" width="1" name="BT_TXRX_AES_CCM_FLAG_B0" comment="Aes-Ccm B0 flag"/>
+ <register addr="5600128c" rw_flags="RW" width="1" name="BT_TXRX_AES_CCM_FLAG_C0" comment="Aes-Ccm C0 flag"/>
+ <register addr="56001290" rw_flags="RW" width="2" name="BT_TXRX_AES_CONFIG" comment="AES config CMM select / Nonce Select"/>
+ <register addr="56001294" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[0]" comment="AES key for standalone engine"/>
+ <register addr="56001298" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[1]" comment="AES key for standalone engine"/>
+ <register addr="5600129c" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[2]" comment="AES key for standalone engine"/>
+ <register addr="560012a0" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_KEY[3]" comment="AES key for standalone engine"/>
+ <register addr="560012a4" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[0]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012a8" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[1]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012ac" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[2]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012b0" rw_flags="RW" width="4" name="BT_TXRX_STANDALONE_AES_PLAINTEXT[3]" comment="Plaintext for standalone AES engine"/>
+ <register addr="560012b4" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[0]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012b8" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[1]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012bc" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[2]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012c0" rw_flags="R" width="4" name="BT_TXRX_STANDALONE_AES_CRYPTTEXT[3]" comment="Enciphered text for standalone AES engine"/>
+ <register addr="560012c4" rw_flags="RW" width="2" name="BT_TXRX_STANDALONE_AES_CONTROL" comment="Write to start standalone AES engine"/>
+ <register addr="560012c8" rw_flags="R" width="1" name="BT_TXRX_STANDALONE_AES_BUSY" comment="Indicates that the AES engine is currently busy. Goes high immediately when BT_TXRX_STANDALONE_AES_START is written. BT_TXRX_STANDALONE_AES_CRYPTTEXT is not valid until it goes low."/>
+ <register addr="560012cc" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[0]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d0" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[1]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d4" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[2]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012d8" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[3]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012dc" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[4]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e0" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[5]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e4" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[6]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012e8" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[7]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012ec" rw_flags="W" width="4" name="BT_CVSD_OLD_STATE[8]" comment="Update the CVSD codec state 279:0"/>
+ <register addr="560012f0" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[0]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012f4" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[1]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012f8" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[2]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="560012fc" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[3]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001300" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[4]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001304" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[5]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001308" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[6]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="5600130c" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[7]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001310" rw_flags="R" width="4" name="BT_CVSD_NEW_STATE[8]" comment="Current voice codec state bits 279:0 "/>
+ <register addr="56001314" rw_flags="RW" width="2" name="BT_VOICE_SETTING" comment="SCO voice setting"/>
+ <register addr="56001318" rw_flags="RW" width="1" name="BT_TXRX_HOP_SEQ_TYPE" comment="Configure HOP sequence type"/>
+ <register addr="5600131c" rw_flags="RW" width="4" name="BT_TXRX_HOP_UAP_LAP" comment="Upper and Lower BT address to determine frequecy hopping sequence"/>
+ <register addr="56001320" rw_flags="RW" width="4" name="BT_TXRX_HOP_CLOCK" comment="Master clock"/>
+ <register addr="56001324" rw_flags="RW" width="1" name="BT_TXRX_HOP_Y1" comment="Y1 from BT specification,"/>
+ <register addr="56001328" rw_flags="RW" width="1" name="BT_TXRX_HOP_K_SEL" comment="K from BT specification, 0: Koffset=24, 1: Koffset=8"/>
+ <register addr="5600132c" rw_flags="RW" width="1" name="BT_TXRX_HOP_N" comment="Number of channels in adapted hop sequence"/>
+ <register addr="56001330" rw_flags="RW" width="1" name="BT_TXRX_HOP_F" comment="Adapted Hop sequence mapping (F from BT specification)"/>
+ <register addr="56001334" rw_flags="R" width="2" name="BT_TXRX_HOP_INDEX_PRE_MOD" comment="Index of required hop before final modulus"/>
+ <register addr="56001338" rw_flags="R" width="1" name="BT_TXRX_HOP_INDEX" comment="Index of required hop (0 to 78 or 0 to 22)"/>
+ </block>
+ <block name="bt_bb_clkgen" comment="">
+ <register addr="56000000" rw_flags="R" width="4" name="BT_CLKGEN_SYSTEM_TIME" comment="The current microsecond system time."/>
+ <register addr="56000004" rw_flags="RW" width="4" name="BT_CLKGEN_ENABLES" comment="This register enables the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="56000008" rw_flags="RW" width="4" name="BT_AUDIO_CLOCK0" comment="Audio clock 0 configuration"/>
+ <register addr="5600000c" rw_flags="RW" width="4" name="BT_AUDIO_CLOCK1" comment="Audio clock 1 configuration"/>
+ <register addr="56000010" rw_flags="RW" width="2" name="BT_AUDIO_CLOCK_EN" comment="Audio clock En"/>
+ </block>
+ <block name="bt_speedy" comment="">
+ <register addr="56002000" rw_flags="RW" width="4" name="BT_SPEEDY_ADDR_CTRL" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="56002004" rw_flags="RW" width="4" name="BT_SPEEDY_WRITE_DATA" comment="Data to write to APB over Speedy"/>
+ <register addr="56002008" rw_flags="R" width="4" name="BT_SPEEDY_READ_DATA" comment="Data read back for APB over Speedy"/>
+ <register addr="5600200c" rw_flags="R" width="1" name="BT_SPEEDY_APB_STATUS" comment="Status of the current APB cycle"/>
+ <register addr="56002010" rw_flags="RW" width="1" name="BT_SPEEDY_ERROR_RECOVERY" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="coex_bb" comment="">
+ <register addr="56200000" rw_flags="RW" width="1" name="COEX_BB_DEBUG_SEL" comment=""/>
+ </block>
+ <block name="coex_bb_bt" comment="">
+ <register addr="56210000" rw_flags="RW" width="1" name="COEX_BT_CFG" comment=""/>
+ <register addr="56210004" rw_flags="RW" width="1" name="COEX_BT_DEBUG_SEL" comment=""/>
+ <register addr="56210008" rw_flags="RW" width="1" name="COEX_BT_SW_IF_DEBUG_SEL" comment=""/>
+ <register addr="5621000c" rw_flags="RW" width="1" name="COEX_BT_CDL_DEBUG_SEL" comment=""/>
+ <register addr="56210010" rw_flags="RW" width="1" name="COEX_BT_SW_RESET" comment="Write a 1 to reset BT Coexistence digital on BBIC."/>
+ <register addr="56210014" rw_flags="RW" width="1" name="COEX_BT_ALLOWED_ORIDE" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="56210018" rw_flags="RW" width="4" name="COEX_BT_TX_COL[0]" comment=""/>
+ <register addr="5621001c" rw_flags="RW" width="4" name="COEX_BT_TX_COL[1]" comment=""/>
+ <register addr="56210020" rw_flags="RW" width="4" name="COEX_BT_RX_COL[0]" comment=""/>
+ <register addr="56210024" rw_flags="RW" width="4" name="COEX_BT_RX_COL[1]" comment=""/>
+ <register addr="56210028" rw_flags="RW" width="4" name="COEX_BT_ASTX" comment="BT ASTX configuration."/>
+ <register addr="5621002c" rw_flags="RW" width="4" name="COEX_BT_ASTX1" comment="BT ASTX configuration."/>
+ <register addr="56210030" rw_flags="RW" width="4" name="COEX_BT_ASTX_START_TIME" comment="BT ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="56210034" rw_flags="RW" width="1" name="COEX_BT_ASTX_UPDATE" comment="BT ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="56210038" rw_flags="R" width="1" name="COEX_BT_ASTX_STICKY_STATUS" comment="BT ASTX status register. Contents are cleared when a 1 is written to COEX_BT_ASTX_UPDATE."/>
+ <register addr="5621003c" rw_flags="R" width="1" name="COEX_BT_ASTX_DEFER_COUNT" comment="BT ASTX defer counter. An accumulative count showing the number of times BT ASTX has been deferred."/>
+ <register addr="56210040" rw_flags="RW" width="1" name="COEX_BT_ASTX_CLR_DEFER_COUNT" comment="BT ASTX defer count clear - write a 1 in order to clear COEX_BT_ASTX_DEFER_COUNT."/>
+ <register addr="56210044" rw_flags="RW" width="4" name="COEX_BT_ASRX" comment="BT ASRX configuration."/>
+ <register addr="56210048" rw_flags="RW" width="4" name="COEX_BT_ASRX1" comment="BT ASTX configuration."/>
+ <register addr="5621004c" rw_flags="RW" width="4" name="COEX_BT_ASRX_START_TIME" comment="BT ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="56210050" rw_flags="RW" width="1" name="COEX_BT_ASRX_UPDATE" comment="BT ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="56210054" rw_flags="R" width="1" name="COEX_BT_ASRX_STICKY_STATUS" comment="BT ASRX status register. Contents are cleared when a 1 is written to COEX_BT_ASRX_UPDATE."/>
+ <register addr="56210058" rw_flags="R" width="1" name="COEX_BT_ASRX_DEFER_COUNT" comment="BT ASRX defer counter. An accumulative count showing the number of times BT ASRX has been deferred."/>
+ <register addr="5621005c" rw_flags="RW" width="1" name="COEX_BT_ASRX_CLR_DEFER_COUNT" comment="BT ASRX defer count clear - write a 1 in order to clear COEX_BT_ASRX_DEFER_COUNT."/>
+ </block>
+ <block name="coex_bb_wl_0" comment="">
+ <register addr="56220000" rw_flags="RW" width="1" name="COEX_WL_CFG_I0" comment=""/>
+ <register addr="56220004" rw_flags="RW" width="1" name="COEX_WL_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220008" rw_flags="RW" width="1" name="COEX_WL_MAC_IF_DEBUG_SEL_I0" comment=""/>
+ <register addr="5622000c" rw_flags="RW" width="1" name="COEX_WL_SW_IF_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220010" rw_flags="RW" width="1" name="COEX_WL_CDL_DEBUG_SEL_I0" comment=""/>
+ <register addr="56220014" rw_flags="RW" width="1" name="COEX_WL_SW_RESET_I0" comment="Set in order to force a software reset of the WL Coexistence digital."/>
+ <register addr="56220018" rw_flags="RW" width="1" name="COEX_WL_ALLOWED_ORIDE_I0" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="5622001c" rw_flags="RW" width="4" name="COEX_WL_TX_COL_I0" comment=""/>
+ <register addr="56220020" rw_flags="RW" width="4" name="COEX_WL_RX_COL_I0" comment=""/>
+ <register addr="56220024" rw_flags="RW" width="1" name="COEX_WL_DELAY_DEFERS_EN_I0" comment="When set to 1, the CDL defer is gated until the remote Activity Set is in progress."/>
+ <register addr="56220028" rw_flags="RW" width="2" name="COEX_WL_TRAN_CTRL_CFG_I0" comment="Coexistence Transition Control configuration."/>
+ <register addr="5622002c" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I0[0]" comment="5G RF Switch Configurations"/>
+ <register addr="56220030" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I0[1]" comment="5G RF Switch Configurations"/>
+ <register addr="56220034" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_PRIORITY_I0" comment="The WLAN priority to use for transmitted Acks."/>
+ <register addr="56220038" rw_flags="RW" width="1" name="COEX_WL_TX_DATA_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a transmitted Data frame. (should not be required)."/>
+ <register addr="5622003c" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a transmitted Ack (should not be required)."/>
+ <register addr="56220040" rw_flags="RW" width="2" name="COEX_WL_TX_START_CHANNEL_I0" comment=""/>
+ <register addr="56220044" rw_flags="RW" width="2" name="COEX_WL_TX_END_CHANNEL_I0" comment=""/>
+ <register addr="56220048" rw_flags="RW" width="2" name="COEX_WL_TX_MISC_CFG_I0" comment="Misc WLAN Tx configuration."/>
+ <register addr="5622004c" rw_flags="R" width="1" name="COEX_WL_TX_STICKY_STATUS_I0" comment="WLAN ASTX status register. Contents are cleared when the MAC Acc makes a new Tx request."/>
+ <register addr="56220050" rw_flags="R" width="1" name="COEX_WL_TX_DEFER_COUNT_I0" comment="WLAN ASTX defer counter. An accumulative count showing the number of times WLAN ASTX has been deferred."/>
+ <register addr="56220054" rw_flags="RW" width="1" name="COEX_WL_TX_CLR_DEFER_COUNT_I0" comment="WLAN ASTX defer count clear - write a 1 in order to clear COEX_WL_ASTX_DEFER_COUNT."/>
+ <register addr="56220058" rw_flags="RW" width="2" name="COEX_WL_RX_LISTEN_DURATION_I0" comment="The advertised ASRX duration when WLAN is listening. ASRX is automatically updated when this time expires."/>
+ <register addr="5622005c" rw_flags="RW" width="1" name="COEX_WL_RX_LISTEN_PRIORITY_I0" comment="The WLAN priority when WLAN is listening."/>
+ <register addr="56220060" rw_flags="RW" width="1" name="COEX_WL_RX_PHYACT_PRIORITY_I0" comment="The WLAN priority when the PHY is actively receiving (but Rx is not confirmed by MAC Acc)."/>
+ <register addr="56220064" rw_flags="RW" width="1" name="COEX_WL_RX_MAC_PRIORITY_I0" comment="The WLAN priority when MAC Acc confirms Rx."/>
+ <register addr="56220068" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_PRIORITY_I0" comment="The WLAN priority for Rx acknowledgements."/>
+ <register addr="5622006c" rw_flags="RW" width="1" name="COEX_WL_RX_DATA_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a received Data frame. (should not be required)."/>
+ <register addr="56220070" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_DUR_OFFSET_I0" comment="An optional number of microseconds to add onto the duration of a received Ack. (should not be required)."/>
+ <register addr="56220074" rw_flags="RW" width="1" name="COEX_WL_RX_MIN_ANT_SEL_I0" comment="Select minimum number of antenna(s) to use for Rx."/>
+ <register addr="56220078" rw_flags="RW" width="2" name="COEX_WL_RX_START_CHANNEL_I0" comment=""/>
+ <register addr="5622007c" rw_flags="RW" width="2" name="COEX_WL_RX_END_CHANNEL_I0" comment=""/>
+ <register addr="56220080" rw_flags="RW" width="1" name="COEX_WL_RX_MISC_CFG_I0" comment="Misc WLAN Rx configuration"/>
+ <register addr="56220084" rw_flags="R" width="1" name="COEX_WL_RX_STICKY_STATUS_I0" comment="WLAN ASRX status register. Contents are cleared when the MAC Acc makes a new Rx request."/>
+ <register addr="56220088" rw_flags="R" width="1" name="COEX_WL_RX_DEFER_COUNT_I0" comment="WLAN ASRX defer counter. An accumulative count showing the number of times WLAN ASRX has been deferred."/>
+ <register addr="5622008c" rw_flags="RW" width="1" name="COEX_WL_RX_CLR_DEFER_COUNT_I0" comment="WLAN ASRX defer count clear - write a 1 in order to clear COEX_WL_ASRX_DEFER_COUNT."/>
+ <register addr="56220090" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_I0" comment="WLAN Software ASTX configuration."/>
+ <register addr="56220094" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX1_I0" comment="WLAN Software ASTX configuration."/>
+ <register addr="56220098" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_START_TIME_I0" comment="WLAN Software ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="5622009c" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_UPDATE_I0" comment="WLAN Software ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="562200a0" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_STICKY_STATUS_I0" comment="WLAN Software ASTX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASTX_UPDATE"/>
+ <register addr="562200a4" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_DEFER_COUNT_I0" comment="WLAN Software ASTX defer counter. An accumulative count showing the number of times WLAN Software ASTX has been deferred."/>
+ <register addr="562200a8" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_CLR_DEFER_COUNT_I0" comment="WLAN Software ASTX defer count clear - write a 1 in order to clear COEX_WL_SW_ASTX_DEFER_COUNT"/>
+ <register addr="562200ac" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_I0" comment="WLAN Software ASRX configuration."/>
+ <register addr="562200b0" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX1_I0" comment="WLAN Software ASRX configuration."/>
+ <register addr="562200b4" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_START_TIME_I0" comment="WLAN Software ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="562200b8" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_UPDATE_I0" comment="WLAN Software ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="562200bc" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_STICKY_STATUS_I0" comment="WLAN Software ASRX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASRX_UPDATE"/>
+ <register addr="562200c0" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_DEFER_COUNT_I0" comment="WLAN Software ASRX defer counter. An accumulative count showing the number of times WLAN Software ASRX has been deferred."/>
+ <register addr="562200c4" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_CLR_DEFER_COUNT_I0" comment="WLAN Software ASRX defer count clear - write a 1 in order to clear COEX_WL_SW_ASRX_DEFER_COUNT"/>
+ </block>
+ <block name="coex_bb_wl_1" comment="">
+ <register addr="56230000" rw_flags="RW" width="1" name="COEX_WL_CFG_I1" comment=""/>
+ <register addr="56230004" rw_flags="RW" width="1" name="COEX_WL_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230008" rw_flags="RW" width="1" name="COEX_WL_MAC_IF_DEBUG_SEL_I1" comment=""/>
+ <register addr="5623000c" rw_flags="RW" width="1" name="COEX_WL_SW_IF_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230010" rw_flags="RW" width="1" name="COEX_WL_CDL_DEBUG_SEL_I1" comment=""/>
+ <register addr="56230014" rw_flags="RW" width="1" name="COEX_WL_SW_RESET_I1" comment="Set in order to force a software reset of the WL Coexistence digital."/>
+ <register addr="56230018" rw_flags="RW" width="1" name="COEX_WL_ALLOWED_ORIDE_I1" comment="Software overrides for the WLAN/BT Coex radio enables. Forcing these bits on will allow BT/WLAN Tx/Rx activity to start. Shouldn't really be used!"/>
+ <register addr="5623001c" rw_flags="RW" width="4" name="COEX_WL_TX_COL_I1" comment=""/>
+ <register addr="56230020" rw_flags="RW" width="4" name="COEX_WL_RX_COL_I1" comment=""/>
+ <register addr="56230024" rw_flags="RW" width="1" name="COEX_WL_DELAY_DEFERS_EN_I1" comment="When set to 1, the CDL defer is gated until the remote Activity Set is in progress."/>
+ <register addr="56230028" rw_flags="RW" width="2" name="COEX_WL_TRAN_CTRL_CFG_I1" comment="Coexistence Transition Control configuration."/>
+ <register addr="5623002c" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I1[0]" comment="5G RF Switch Configurations"/>
+ <register addr="56230030" rw_flags="RW" width="2" name="COEX_WL_FEC_CFG_I1[1]" comment="5G RF Switch Configurations"/>
+ <register addr="56230034" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_PRIORITY_I1" comment="The WLAN priority to use for transmitted Acks."/>
+ <register addr="56230038" rw_flags="RW" width="1" name="COEX_WL_TX_DATA_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a transmitted Data frame. (should not be required)."/>
+ <register addr="5623003c" rw_flags="RW" width="1" name="COEX_WL_TX_ACK_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a transmitted Ack (should not be required)."/>
+ <register addr="56230040" rw_flags="RW" width="2" name="COEX_WL_TX_START_CHANNEL_I1" comment=""/>
+ <register addr="56230044" rw_flags="RW" width="2" name="COEX_WL_TX_END_CHANNEL_I1" comment=""/>
+ <register addr="56230048" rw_flags="RW" width="2" name="COEX_WL_TX_MISC_CFG_I1" comment="Misc WLAN Tx configuration."/>
+ <register addr="5623004c" rw_flags="R" width="1" name="COEX_WL_TX_STICKY_STATUS_I1" comment="WLAN ASTX status register. Contents are cleared when the MAC Acc makes a new Tx request."/>
+ <register addr="56230050" rw_flags="R" width="1" name="COEX_WL_TX_DEFER_COUNT_I1" comment="WLAN ASTX defer counter. An accumulative count showing the number of times WLAN ASTX has been deferred."/>
+ <register addr="56230054" rw_flags="RW" width="1" name="COEX_WL_TX_CLR_DEFER_COUNT_I1" comment="WLAN ASTX defer count clear - write a 1 in order to clear COEX_WL_ASTX_DEFER_COUNT."/>
+ <register addr="56230058" rw_flags="RW" width="2" name="COEX_WL_RX_LISTEN_DURATION_I1" comment="The advertised ASRX duration when WLAN is listening. ASRX is automatically updated when this time expires."/>
+ <register addr="5623005c" rw_flags="RW" width="1" name="COEX_WL_RX_LISTEN_PRIORITY_I1" comment="The WLAN priority when WLAN is listening."/>
+ <register addr="56230060" rw_flags="RW" width="1" name="COEX_WL_RX_PHYACT_PRIORITY_I1" comment="The WLAN priority when the PHY is actively receiving (but Rx is not confirmed by MAC Acc)."/>
+ <register addr="56230064" rw_flags="RW" width="1" name="COEX_WL_RX_MAC_PRIORITY_I1" comment="The WLAN priority when MAC Acc confirms Rx."/>
+ <register addr="56230068" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_PRIORITY_I1" comment="The WLAN priority for Rx acknowledgements."/>
+ <register addr="5623006c" rw_flags="RW" width="1" name="COEX_WL_RX_DATA_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a received Data frame. (should not be required)."/>
+ <register addr="56230070" rw_flags="RW" width="1" name="COEX_WL_RX_ACK_DUR_OFFSET_I1" comment="An optional number of microseconds to add onto the duration of a received Ack. (should not be required)."/>
+ <register addr="56230074" rw_flags="RW" width="1" name="COEX_WL_RX_MIN_ANT_SEL_I1" comment="Select minimum number of antenna(s) to use for Rx."/>
+ <register addr="56230078" rw_flags="RW" width="2" name="COEX_WL_RX_START_CHANNEL_I1" comment=""/>
+ <register addr="5623007c" rw_flags="RW" width="2" name="COEX_WL_RX_END_CHANNEL_I1" comment=""/>
+ <register addr="56230080" rw_flags="RW" width="1" name="COEX_WL_RX_MISC_CFG_I1" comment="Misc WLAN Rx configuration"/>
+ <register addr="56230084" rw_flags="R" width="1" name="COEX_WL_RX_STICKY_STATUS_I1" comment="WLAN ASRX status register. Contents are cleared when the MAC Acc makes a new Rx request."/>
+ <register addr="56230088" rw_flags="R" width="1" name="COEX_WL_RX_DEFER_COUNT_I1" comment="WLAN ASRX defer counter. An accumulative count showing the number of times WLAN ASRX has been deferred."/>
+ <register addr="5623008c" rw_flags="RW" width="1" name="COEX_WL_RX_CLR_DEFER_COUNT_I1" comment="WLAN ASRX defer count clear - write a 1 in order to clear COEX_WL_ASRX_DEFER_COUNT."/>
+ <register addr="56230090" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_I1" comment="WLAN Software ASTX configuration."/>
+ <register addr="56230094" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX1_I1" comment="WLAN Software ASTX configuration."/>
+ <register addr="56230098" rw_flags="RW" width="4" name="COEX_WL_SW_ASTX_START_TIME_I1" comment="WLAN Software ASTX Start Time (with respect to microsecond system time)."/>
+ <register addr="5623009c" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_UPDATE_I1" comment="WLAN Software ASTX control: Simply write a 1 to this register to refresh ASTX contents and advertise it, or write a 0 to invalidate ASTX."/>
+ <register addr="562300a0" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_STICKY_STATUS_I1" comment="WLAN Software ASTX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASTX_UPDATE"/>
+ <register addr="562300a4" rw_flags="R" width="1" name="COEX_WL_SW_ASTX_DEFER_COUNT_I1" comment="WLAN Software ASTX defer counter. An accumulative count showing the number of times WLAN Software ASTX has been deferred."/>
+ <register addr="562300a8" rw_flags="RW" width="1" name="COEX_WL_SW_ASTX_CLR_DEFER_COUNT_I1" comment="WLAN Software ASTX defer count clear - write a 1 in order to clear COEX_WL_SW_ASTX_DEFER_COUNT"/>
+ <register addr="562300ac" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_I1" comment="WLAN Software ASRX configuration."/>
+ <register addr="562300b0" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX1_I1" comment="WLAN Software ASRX configuration."/>
+ <register addr="562300b4" rw_flags="RW" width="4" name="COEX_WL_SW_ASRX_START_TIME_I1" comment="WLAN Software ASRX Start Time (with respect to microsecond system time)."/>
+ <register addr="562300b8" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_UPDATE_I1" comment="WLAN Software ASRX control: Simply write a 1 to this register to refresh ASRX contents and advertise it, or write a 0 to invalidate ASRX."/>
+ <register addr="562300bc" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_STICKY_STATUS_I1" comment="WLAN Software ASRX status register. Contents are cleared when a 1 is written to COEX_WL_SW_ASRX_UPDATE"/>
+ <register addr="562300c0" rw_flags="R" width="1" name="COEX_WL_SW_ASRX_DEFER_COUNT_I1" comment="WLAN Software ASRX defer counter. An accumulative count showing the number of times WLAN Software ASRX has been deferred."/>
+ <register addr="562300c4" rw_flags="RW" width="1" name="COEX_WL_SW_ASRX_CLR_DEFER_COUNT_I1" comment="WLAN Software ASRX defer count clear - write a 1 in order to clear COEX_WL_SW_ASRX_DEFER_COUNT"/>
+ </block>
+ <block name="mif_axi_monitor" comment="">
+ <register addr="51200000" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[0]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200004" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[1]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200008" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[2]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="5120000c" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[3]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200010" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[4]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200014" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[5]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200018" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[6]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="5120001c" rw_flags="RW" width="4" name="MIF_AXI_MON_MASTER_MASK[7]" comment="Bitfield indicating from which bus master(s) to count burst transactions. If multiple bits are set then multiple masters will be counted."/>
+ <register addr="51200020" rw_flags="R" width="4" name="MIF_AXI_MON_READ_BURST_COUNT" comment="Count of the number of read burst transactions on the AXI read channel."/>
+ <register addr="51200024" rw_flags="R" width="4" name="MIF_AXI_MON_READ_BYTE_COUNT" comment="Count of the number of bytes transferred in the read burst transactions on the AXI read channel."/>
+ <register addr="51200028" rw_flags="R" width="4" name="MIF_AXI_MON_WRITE_BURST_COUNT" comment="Count of the number of write burst transactions on the AXI read channel."/>
+ <register addr="5120002c" rw_flags="R" width="4" name="MIF_AXI_MON_WRITE_BYTE_COUNT" comment="Count of the number of bytes transferred in the write burst transactions on the AXI write channel."/>
+ </block>
+ <block name="mildred_sfr_core" comment="">
+ <register addr="5200fe04" rw_flags="RW" width="1" name="MILDRED_SP" comment="Stack pointer"/>
+ <register addr="5200fe08" rw_flags="RW" width="1" name="MILDRED_DPL" comment="Data pointer low byte"/>
+ <register addr="5200fe0c" rw_flags="RW" width="1" name="MILDRED_DPH" comment="Data pointer high byte"/>
+ <register addr="5200fe10" rw_flags="RW" width="1" name="MILDRED_CONTROL" comment="Control Mildred"/>
+ <register addr="5200fe14" rw_flags="RW" width="1" name="MILDRED_SET_PC_LO" comment="Set Mildred's PC - lower half"/>
+ <register addr="5200fe18" rw_flags="RW" width="1" name="MILDRED_SET_PC_HI" comment="Set Mildred's PC - upper half. Setting this register causes the update to occur if Mildred is stopped."/>
+ <register addr="5200fe1c" rw_flags="RW" width="1" name="MILDRED_PCON" comment="Power control"/>
+ <register addr="5200fe20" rw_flags="RW" width="1" name="MILDRED_TCON" comment="Timer control"/>
+ <register addr="5200fe24" rw_flags="RW" width="1" name="MILDRED_TMOD" comment="Timer mode"/>
+ <register addr="5200fe28" rw_flags="RW" width="1" name="MILDRED_TL0" comment="Timer low 0"/>
+ <register addr="5200fe2c" rw_flags="RW" width="1" name="MILDRED_TL1" comment="Timer low 1"/>
+ <register addr="5200fe30" rw_flags="RW" width="1" name="MILDRED_TH0" comment="Timer high 0"/>
+ <register addr="5200fe34" rw_flags="RW" width="1" name="MILDRED_TH1" comment="Timer high 1"/>
+ <register addr="5200fe60" rw_flags="RW" width="1" name="MILDRED_SCON" comment="Serial interface unit (SIU) control."/>
+ <register addr="5200fe64" rw_flags="RW" width="1" name="MILDRED_SBUF" comment="Serial data buffer"/>
+ <register addr="5200fe84" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_PRESCALE_INT" comment="Set the integer part of the timer/counter prescaler"/>
+ <register addr="5200fe88" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_PRESCALE_FRAC" comment="Set the fractional part of the timer/counter prescaler"/>
+ <register addr="5200fe94" rw_flags="R" width="1" name="MILDRED_PROGRAM_COUNTER_LO" comment="Register view of the Mildred program counter"/>
+ <register addr="5200fe98" rw_flags="R" width="1" name="MILDRED_PROGRAM_COUNTER_HI" comment="Register view of the Mildred program counter"/>
+ <register addr="5200fe9c" rw_flags="RW" width="1" name="MILDRED_READ_WRITE_INTERNAL_INT_STATE" comment="Clear Mildred's internal interrupt status flops. This is a bitfield register."/>
+ <register addr="5200fea0" rw_flags="RW" width="1" name="MILDRED_IE" comment="Interrupt enable"/>
+ <register addr="5200fee0" rw_flags="RW" width="1" name="MILDRED_IP" comment="Interrupt priority"/>
+ <register addr="5200ff40" rw_flags="RW" width="1" name="MILDRED_PSW" comment="Program and status word"/>
+ <register addr="5200ff80" rw_flags="RW" width="1" name="MILDRED_ACC" comment="Accumulator"/>
+ <register addr="5200ff84" rw_flags="RW" width="1" name="MILDRED_SIU_SDIV" comment="Control the SDIV input to the serial interface unit"/>
+ <register addr="5200ffc0" rw_flags="RW" width="1" name="MILDRED_B" comment="B register"/>
+ </block>
+ <block name="mildred_sfr_pmu" comment="">
+ <register addr="5200fe00" rw_flags="RW" width="1" name="MILDRED_P0" comment="PIO 0-7 config/status"/>
+ <register addr="5200fe38" rw_flags="RW" width="1" name="MILDRED_P0_RISING" comment="Reads bits 07:00 of the PIO rising edge capture register. When a PIO is high the matching bit is asynchronously set. If low, writing a 1 clears the bit."/>
+ <register addr="5200fe3c" rw_flags="RW" width="1" name="MILDRED_P1_RISING" comment="Reads bits 15:08 of the PIO rising edge capture register. When a PIO is high the matching bit is asynchronously set. If low, writing a 1 clears the bit."/>
+ <register addr="5200fe40" rw_flags="RW" width="1" name="MILDRED_P1" comment="PIO 8-15 config/status"/>
+ <register addr="5200fe44" rw_flags="RW" width="1" name="RESET" comment="Resets for main MXL140 clock generator, WLBT toplevel"/>
+ <register addr="5200fe48" rw_flags="RW" width="1" name="CLOCK_ENABLE" comment="Enables for main clock generator"/>
+ <register addr="5200fe4c" rw_flags="RW" width="1" name="CLOCK_ENABLE2" comment="Enables for main clock generator"/>
+ <register addr="5200fe50" rw_flags="RW" width="1" name="QREQ_OFF_OVR" comment="Q-channel request overrides"/>
+ <register addr="5200fe54" rw_flags="R" width="1" name="RANDOM_NUMBER_15_08" comment="Random number."/>
+ <register addr="5200fe58" rw_flags="R" width="1" name="RANDOM_NUMBER_07_00" comment="Random number."/>
+ <register addr="5200fe5c" rw_flags="RW" width="1" name="PIO" comment="PIO Vdd Alive registers"/>
+ <register addr="5200fe68" rw_flags="RW" width="1" name="WPLL_DSM_F_26_24" comment="PLL F controls"/>
+ <register addr="5200fe6c" rw_flags="RW" width="1" name="WPLL_DSM_F_23_16" comment="PLL F controls"/>
+ <register addr="5200fe70" rw_flags="RW" width="1" name="WPLL_DSM_F_15_08" comment="PLL F controls"/>
+ <register addr="5200fe74" rw_flags="RW" width="1" name="WPLL_DSM_F_07_00" comment="PLL F controls"/>
+ <register addr="5200fe78" rw_flags="RW" width="1" name="CLOCK_MUX_SEL" comment="Choose which clock to run the PMU on."/>
+ <register addr="5200fe7c" rw_flags="RW" width="1" name="MILDRED_P0_FALLING" comment="Reads bits 07:00 of the PIO falling edge capture register. When a PIO is low the matching bit is asynchronously set. If high, writing a 1 clears the bit."/>
+ <register addr="5200fe80" rw_flags="RW" width="1" name="MILDRED_RESOURCE_REQ" comment="Outgoing resource requests from WLBT to AP/CP."/>
+ <register addr="5200fe8c" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_T0_MUX_SEL" comment="Choose the source for timer/counter 0. 0-15 = PIO[15:0]."/>
+ <register addr="5200fe90" rw_flags="RW" width="1" name="MILDRED_TIMER_COUNTER_T1_MUX_SEL" comment="Choose the source for timer/counter 0. 0-15 = PIO[15:0]."/>
+ <register addr="5200fea4" rw_flags="RW" width="1" name="CLOCK_MUX_CBUS_SEL" comment="Choose which clock to run the PMU on."/>
+ <register addr="5200fea8" rw_flags="RW" width="1" name="CLK_GATE_OVR" comment="Clock Gate overrides"/>
+ <register addr="5200feac" rw_flags="R" width="1" name="WPLL_STATUS" comment=""/>
+ <register addr="5200feb0" rw_flags="RW" width="1" name="PCH_REQ" comment="PCH Power down request"/>
+ <register addr="5200feb4" rw_flags="R" width="1" name="PCH_ACK" comment="PCH Power down acknoledge"/>
+ <register addr="5200feb8" rw_flags="RW" width="1" name="MILDRED_IPC_IRQ" comment="Interprocessor communication interrupts "/>
+ <register addr="5200febc" rw_flags="RW" width="1" name="MILDRED_EXT_RESET_REQUEST" comment="Requests and status out of WLBT"/>
+ <register addr="5200fec0" rw_flags="R" width="1" name="MILDRED_RESOURCE_ACK" comment="Outgoing resource status/acknowledgement"/>
+ <register addr="5200fec4" rw_flags="RW" width="1" name="SWEEPER_CONTROL" comment="Controls the DBUS Sweeper module in WLBT."/>
+ <register addr="5200fec8" rw_flags="R" width="1" name="SWEEPER_STATUS" comment="Status from the PBUS Sweeper module in WLBT."/>
+ <register addr="5200fecc" rw_flags="R" width="1" name="MILDRED_AP2WB_REQ" comment="Incoming requests from AP to WLBT."/>
+ <register addr="5200fed0" rw_flags="RW" width="1" name="MILDRED_WB2AP_ACK" comment="Outgoing acknowledgement from WLBT to AP."/>
+ <register addr="5200fed4" rw_flags="RW" width="1" name="MILDRED_P1_FALLING" comment="Reads bits 15:08 of the PIO falling edge capture register. When a PIO is low the matching bit is asynchronously set. If high, writing a 1 clears the bit."/>
+ <register addr="5200fed8" rw_flags="RW" width="1" name="WATCHDOG_ENABLE" comment="Writing '1' enables the watchdog regardless of its previous state and resets its state machine to 0."/>
+ <register addr="5200fedc" rw_flags="RW" width="1" name="WATCHDOG_DISABLE" comment=" NOTE VALUES CHANGED FOR MAXWELL Writing the 3 disable codes in sequence to this register will disable the watchdog. Writing WATCHDOG_DEBUG_CODE3 instead of WATCHDOG_DISABLE_CODE3 will set the watchdog into debug mode. Each correct code written will advance the WATCHDOG_STATUS by 1 until it reaches 3. A status of 3 indicates that the watchdog has been disabled A status of 4 indicates that the watchdog is in debug mode. If an incorrect code is written at any time, the status will revert to 0 (enabled). The watchdog will not stop counting down until all three codes have been written correctly."/>
+ <register addr="5200fee4" rw_flags="RW" width="1" name="WATCHDOG_KICK" comment="Writing to this register causes the countdown value to be reset to the value stored in WATCHDOG_DELAY."/>
+ <register addr="5200fee8" rw_flags="R" width="1" name="WATCHDOG_KICK_PENDING" comment="This indicates that WATCHDOG_KICK has been written to recently, but has not yet been transferred to the slow clock domain to reset the countdown value."/>
+ <register addr="5200feec" rw_flags="R" width="1" name="WATCHDOG_SLOW_KICK_PENDING" comment="This indicates that the WATCHDOG_KICK has got as far as the slow clock domain, and the countdown reset will occur on the next slow clock edge."/>
+ <register addr="5200fef0" rw_flags="R" width="1" name="WATCHDOG_STATUS" comment="This indicates the current status of the enable/disable state machine. The states are: 0 - Enabled; 1 - Disable1; 2 - Disable2; 3 - Disabled; 4 - Debug mode. The watchdog is not fully disabled until it is in state 3. In addition, bit 3 is set if the watchdog has fired in debug mode."/>
+ <register addr="5200fef4" rw_flags="RW" width="1" name="MILDRED_INT_EN" comment="Interrupt enable."/>
+ <register addr="5200fef8" rw_flags="RW" width="1" name="DRCG" comment="Dynamic Root Clock gating "/>
+ <register addr="5200fefc" rw_flags="RW" width="1" name="MILDRED_INT_VECTOR_HI" comment="Interrupt vector top 8 bits."/>
+ <register addr="5200ff00" rw_flags="RW" width="1" name="MILDRED_INT_STATUS" comment="Interrupt status. Write to clear."/>
+ <register addr="5200ff04" rw_flags="RW" width="1" name="WPLL_CONTROLS_0" comment="PLL controls"/>
+ <register addr="5200ff08" rw_flags="RW" width="1" name="WPLL_CONTROLS_1" comment="PLL controls"/>
+ <register addr="5200ff0c" rw_flags="RW" width="1" name="WPLL_CONTROLS_2" comment="PLL controls"/>
+ <register addr="5200ff10" rw_flags="RW" width="1" name="WPLL_CONTROLS_3" comment="PLL controls"/>
+ <register addr="5200ff14" rw_flags="RW" width="1" name="WPLL_CONTROLS_4" comment="PLL controls"/>
+ <register addr="5200ff18" rw_flags="RW" width="1" name="WPLL_CONTROLS_5" comment="PLL controls"/>
+ <register addr="5200ff1c" rw_flags="RW" width="1" name="WPLL_CONTROLS_6" comment="PLL controls"/>
+ <register addr="5200ff20" rw_flags="RW" width="1" name="MILDRED_INT_PRIORITIES" comment="Interrupt source priorities."/>
+ <register addr="5200ff24" rw_flags="RW" width="1" name="WPLL_DSM_K_26_24" comment="PLL K controls"/>
+ <register addr="5200ff28" rw_flags="RW" width="1" name="WPLL_DSM_K_23_16" comment="PLL K controls"/>
+ <register addr="5200ff2c" rw_flags="RW" width="1" name="WPLL_DSM_K_15_08" comment="PLL K controls"/>
+ <register addr="5200ff30" rw_flags="RW" width="1" name="WPLL_DSM_K_07_00" comment="PLL K controls"/>
+ <register addr="5200ff34" rw_flags="RW" width="1" name="PD_CONTROL_WLAN" comment="Controls the state of switches, isolation and reset in WLAN power domain"/>
+ <register addr="5200ff38" rw_flags="RW" width="1" name="PD_CONTROL_CORE" comment="Controls the state of switches, isolation and reset in CORE power domain"/>
+ <register addr="5200ff3c" rw_flags="R" width="1" name="PD_STATUS" comment="Indicates the status of the switches in each power domain"/>
+ <register addr="5200ff44" rw_flags="RW" width="1" name="WPLL_CONTROLS_7" comment="PLL controls"/>
+ <register addr="5200ff48" rw_flags="RW" width="1" name="WPLL_CONTROLS_8" comment="PLL controls"/>
+ <register addr="5200ff4c" rw_flags="RW" width="1" name="WPLL_CONTROLS_9" comment="PLL controls"/>
+ <register addr="5200ff50" rw_flags="RW" width="1" name="WPLL_CONTROLS_10" comment="PLL controls"/>
+ <register addr="5200ff54" rw_flags="RW" width="1" name="WPLL_CONTROLS_11" comment="PLL controls"/>
+ <register addr="5200ff58" rw_flags="RW" width="1" name="MILDRED_P0_RISING_MASK" comment="Bits 07:00 of the PIO rising edge interrupt mask register. The contents of this register are ANDed with MILDRED_P0_RISING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff5c" rw_flags="RW" width="1" name="MILDRED_P1_RISING_MASK" comment="Bits 15:08 of the PIO rising edge interrupt mask register. The contents of this register are ANDed with MILDRED_P1_RISING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff60" rw_flags="RW" width="1" name="MILDRED_INT_SOURCES_EN" comment="Interrupt sources enable."/>
+ <register addr="5200ff64" rw_flags="RW" width="1" name="MILDRED_P0_FALLING_MASK" comment="Bits 07:00 of the PIO falling edge interrupt mask register. The contents of this register are ANDed with MILDRED_P0_FALLING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff68" rw_flags="RW" width="1" name="MILDRED_P1_FALLING_MASK" comment="Bits 15:08 of the PIO falling edge interrupt mask register. The contents of this register are ANDed with MILDRED_P1_FALLING and if any bits are 1 an interrupt is raised."/>
+ <register addr="5200ff6c" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_31_24" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff70" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_23_16" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff74" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_15_08" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff78" rw_flags="R" width="1" name="SLOW_CLK_TIMER_STATUS_07_00" comment="This read-only register is 32-bit a free-running slow clock counter"/>
+ <register addr="5200ff7c" rw_flags="RW" width="1" name="WPLL_CONTROLS_12" comment="PLL controls"/>
+ <register addr="5200ff8c" rw_flags="RW" width="1" name="WATCHDOG_DELAY_31_24" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff90" rw_flags="RW" width="1" name="WATCHDOG_DELAY_23_16" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff94" rw_flags="RW" width="1" name="WATCHDOG_DELAY_15_08" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff98" rw_flags="RW" width="1" name="WATCHDOG_DELAY_07_00" comment="This is the reset value for the watchdog countdown. The reset value is 0xFFFF which allows a countdown period of 2 seconds. The maximum value of 0xFFFFFFFF allows for a sleep time of around 37 hours"/>
+ <register addr="5200ff9c" rw_flags="RW" width="1" name="WPLL_CONTROLS_13" comment="PLL controls"/>
+ <register addr="5200ffa0" rw_flags="RW" width="1" name="MILDRED_PIO_0700_DRIVE_ENABLE" comment="Bits [ 7: 0] of PIO drive enable bus. These 8 PIO drive enable bits are bit-addressable to allow convenient switching for use with e.g. I2C."/>
+ <register addr="5200ffa4" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_0700_WAKEUP_ENABLES" comment="This register enables the PIO[7:0] inputs individually to allow them to create a deep sleep wakeup event."/>
+ <register addr="5200ffa8" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_0700_WAKEUP_INVERT" comment="This register inverts the PIO[7:0] inputs individually before feeding them into the deep sleep wakeup logic. A 1 on the resulting bit may cause a wakeup event."/>
+ <register addr="5200ffac" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_PIO_0700_WAKEUP_STICKY" comment="This register returns a sticky version of the PIO[7:0] deep sleep wakeup activities. Clear the sticky activity flops by writing 1 to DEEP_SLEEP_WAKEUP_CLR_PIO."/>
+ <register addr="5200ffb0" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_1508_WAKEUP_ENABLES" comment="This register enables the PIO[15:8] inputs individually to allow them to create a deep sleep wakeup event."/>
+ <register addr="5200ffb4" rw_flags="RW" width="1" name="DEEP_SLEEP_PIO_1508_WAKEUP_INVERT" comment="This register inverts the PIO[15:8] inputs individually before feeding them into the deep sleep wakeup logic. A 1 on the resulting bit may cause a wakeup event."/>
+ <register addr="5200ffb8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_PIO_1508_WAKEUP_STICKY" comment="This register returns a sticky version of the PIO[15:8] deep sleep wakeup activities. Clear the sticky activity flops by writing 1 to DEEP_SLEEP_WAKEUP_CLR_PIO."/>
+ <register addr="5200ffbc" rw_flags="RW" width="1" name="DEEP_SLEEP_CMD" comment="This register is used to trigger events in the sleep block"/>
+ <register addr="5200ffc4" rw_flags="RW" width="1" name="DEEP_SLEEP_WAKEUP_ENABLES0" comment="This register controls the sources which can cause deep sleep wakeup. Functions are enabled by setting individual bits. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffc8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS0" comment="This register indicates the currently-active deep sleep wakeup sources."/>
+ <register addr="5200ffcc" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_STICKY0" comment="This register returns a sticky version of DEEP_SLEEP_STATUS, recording all wakeup events since it was last cleared. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffd0" rw_flags="RW" width="1" name="DEEP_SLEEP_WAKEUP_ENABLES1" comment="This register controls the sources which can cause deep sleep wakeup. Functions are enabled by setting individual bits. Bits are enumerated as DEEP_SLEEP_WAKEUP. "/>
+ <register addr="5200ffd4" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS1" comment="This register indicates the currently-active deep sleep wakeup sources."/>
+ <register addr="5200ffd8" rw_flags="R" width="1" name="DEEP_SLEEP_STATUS_STICKY1" comment="This register returns a sticky version of DEEP_SLEEP_STATUS, recording all wakeup events since it was last cleared. "/>
+ <register addr="5200ffdc" rw_flags="RW" width="1" name="PROC_CONFIG" comment="PROC processor platform configuration cleanable on PROC POR only"/>
+ <register addr="5200ffe0" rw_flags="RW" width="1" name="MILDRED_PIO_1508_DRIVE_ENABLE" comment="Bits [15: 8] of PIO drive enable bus. These 8 PIO drive enable bits are bit-addressable to allow convenient switching for use with e.g. I2C."/>
+ <register addr="5200ffe4" rw_flags="RW" width="1" name="MILDRED_MISC_CONTROL" comment="Miscellaneous control signals"/>
+ <register addr="5200ffe8" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_31_24" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200ffec" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_23_16" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff0" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_15_08" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff4" rw_flags="RW" width="1" name="SLOW_CLK_TIMER_EVENT_07_00" comment="When the timer matches this count a deep sleep wakeup event will be triggered."/>
+ <register addr="5200fff8" rw_flags="RW" width="1" name="PAD_RETENTION" comment="Pad retention controls."/>
+ <register addr="5200fffc" rw_flags="RW" width="1" name="DEBUG_SOURCE_SELECT" comment="Select the ouput on DEBUG_OUT[15:0] on the PMU"/>
+ </block>
+ <block name="pcr_config" comment="">
+ <register addr="51000000" rw_flags="R" width="4" name="PCR_VERSION" comment=""/>
+ <register addr="51000004" rw_flags="RW" width="1" name="PCR_RST_CONFIG" comment="Processor platform configuration cleanable on reset"/>
+ <register addr="51000008" rw_flags="RW" width="1" name="PCR_RTC_IRQ_EN" comment="RTC Interrupt enable. Any writes to this register also clear any RTC interrupt."/>
+ <register addr="5100000c" rw_flags="RW" width="4" name="PCR_SYSTEM_CTRL" comment="Processor platform general system control"/>
+ <register addr="51000010" rw_flags="RW" width="1" name="PCR_WL_ADC_COMMON_CFG" comment=""/>
+ <register addr="51000014" rw_flags="RW" width="2" name="PCR_WL_ADC0_CFG" comment=""/>
+ <register addr="51000018" rw_flags="RW" width="2" name="PCR_WL_ADC1_CFG" comment=""/>
+ <register addr="5100001c" rw_flags="RW" width="1" name="PCR_WL_DAC0_CFG" comment=""/>
+ <register addr="51000020" rw_flags="RW" width="1" name="PCR_WL_DAC1_CFG" comment=""/>
+ <register addr="51000024" rw_flags="RW" width="2" name="PCR_WL_ADC0_CTRLI" comment=""/>
+ <register addr="51000028" rw_flags="RW" width="2" name="PCR_WL_ADC0_CTRLQ" comment=""/>
+ <register addr="5100002c" rw_flags="RW" width="2" name="PCR_WL_ADC1_CTRLI" comment=""/>
+ <register addr="51000030" rw_flags="RW" width="2" name="PCR_WL_ADC1_CTRLQ" comment=""/>
+ <register addr="51000034" rw_flags="RW" width="4" name="PCR_WL_DAC0_CTRLI" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000038" rw_flags="RW" width="4" name="PCR_WL_DAC0_CTRLQ" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="5100003c" rw_flags="RW" width="4" name="PCR_WL_DAC1_CTRLI" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000040" rw_flags="RW" width="4" name="PCR_WL_DAC1_CTRLQ" comment="Bits [21] and [8] set from powerdown."/>
+ <register addr="51000044" rw_flags="RW" width="2" name="PCR_PIO_DRIVE" comment="PIO output values for PIO[15:0]"/>
+ <register addr="51000048" rw_flags="RW" width="2" name="PCR_PIO_DRIVE_EN" comment="PIO output enable for PIO[15:0]"/>
+ <register addr="5100004c" rw_flags="R" width="2" name="PCR_PIO_STATUS" comment="PIO status values for PIO[15:0]"/>
+ <register addr="51000050" rw_flags="RW" width="4" name="PCR_QOS" comment="Quality of service values of the matrix AXI masters"/>
+ <register addr="51000054" rw_flags="RW" width="1" name="PCR_RMP_RGN0_BOOT" comment="PROC0 Boot Address Remapping Region 0 Enable"/>
+ <register addr="51000058" rw_flags="RW" width="4" name="PCR_RMP_RGN0_BASE" comment="PROC0 Address Remapping Region 0 Start Address (4K address)"/>
+ <register addr="5100005c" rw_flags="RW" width="1" name="PCR_RMP_RGN0_SIZE" comment="PROC0 Address Remapping Region 0 Size (4K bytes)"/>
+ <register addr="51000060" rw_flags="RW" width="4" name="PCR_RMP_RGN0_OFST" comment="PROC0 Address Remapping Region 0 Offset (4K bytes)"/>
+ <register addr="51000064" rw_flags="RW" width="4" name="PCR_RMP_RGN1_BASE" comment="PROC0 Address Remapping Region 1 Start Address (4K address)"/>
+ <register addr="51000068" rw_flags="RW" width="1" name="PCR_RMP_RGN1_SIZE" comment="PROC0 Address Remapping Region 1 Size (4K bytes)"/>
+ <register addr="5100006c" rw_flags="RW" width="4" name="PCR_RMP_RGN1_OFST" comment="PROC0 Address Remapping Region 1 Offset (4K bytes)"/>
+ <register addr="51000070" rw_flags="RW" width="4" name="PCR_RMP_RGN2_BASE" comment="PROC0 Address Remapping Region 2 Start Address (4K address)"/>
+ <register addr="51000074" rw_flags="RW" width="1" name="PCR_RMP_RGN2_SIZE" comment="PROC0 Address Remapping Region 2 Size (4K bytes)"/>
+ <register addr="51000078" rw_flags="RW" width="4" name="PCR_RMP_RGN2_OFST" comment="PROC0 Address Remapping Region 2 Offset (4K bytes)"/>
+ <register addr="5100007c" rw_flags="RW" width="4" name="PCR_RMP_RGN3_BASE" comment="PROC0 Address Remapping Region 3 Start Address (4K address)"/>
+ <register addr="51000080" rw_flags="RW" width="1" name="PCR_RMP_RGN3_SIZE" comment="PROC0 Address Remapping Region 3 Size (4K bytes)"/>
+ <register addr="51000084" rw_flags="RW" width="4" name="PCR_RMP_RGN3_OFST" comment="PROC0 Address Remapping Region 3 Offset (4K bytes)"/>
+ <register addr="51000088" rw_flags="RW" width="4" name="PCR_RMP_RGN4_BASE" comment="PROC0 Address Remapping Region 4 Start Address (4K address)"/>
+ <register addr="5100008c" rw_flags="RW" width="1" name="PCR_RMP_RGN4_SIZE" comment="PROC0 Address Remapping Region 4 Size (4K bytes)"/>
+ <register addr="51000090" rw_flags="RW" width="4" name="PCR_RMP_RGN4_OFST" comment="PROC0 Address Remapping Region 4 Offset (4K bytes)"/>
+ <register addr="51000094" rw_flags="RW" width="4" name="PCR_RMP_RGN5_BASE" comment="PROC0 Address Remapping Region 5 Start Address (4K address)"/>
+ <register addr="51000098" rw_flags="RW" width="1" name="PCR_RMP_RGN5_SIZE" comment="PROC0 Address Remapping Region 5 Size (4K bytes)"/>
+ <register addr="5100009c" rw_flags="RW" width="4" name="PCR_RMP_RGN5_OFST" comment="PROC0 Address Remapping Region 5 Offset (4K bytes)"/>
+ <register addr="510000a0" rw_flags="RW" width="1" name="PCR_MEMARB_QOS_EN" comment="Memory arbiters QoS enable"/>
+ <register addr="510000a4" rw_flags="RW" width="1" name="PCR_SPLT_LOW_ADDR_BITS" comment="Splitting Memory with lsbits(1) or msbits(0)"/>
+ <register addr="510000a8" rw_flags="RW" width="1" name="PCR_QREQ_OFF_XDMA" comment="XDMA Q-channel request"/>
+ <register addr="510000ac" rw_flags="RW" width="2" name="PCR_DRAM_EARLY_WAKEUP" comment="DRAM Early Wakeup"/>
+ <register addr="510000b0" rw_flags="RW" width="4" name="PCR_QEXP" comment="Expiration Q-channel registers"/>
+ </block>
+ <block name="pcr_ticker" comment="">
+ <register addr="51100000" rw_flags="R" width="4" name="TCKR_VALUE" comment="Current value of the ticker"/>
+ <register addr="51100004" rw_flags="RW" width="4" name="TCKR_SET_VALUE" comment="Set a new value of the ticker"/>
+ <register addr="51100008" rw_flags="RW" width="4" name="TCKR_ALARM0" comment="Set the Proc alarm 0 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="5110000c" rw_flags="RW" width="4" name="TCKR_ALARM1" comment="Set the Proc alarm 1 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100010" rw_flags="RW" width="4" name="TCKR_ALARM2" comment="Set the Proc alarm 2 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100014" rw_flags="RW" width="4" name="TCKR_ALARM3" comment="Set the Proc alarm 3 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="51100018" rw_flags="RW" width="4" name="TCKR_ALARM4" comment="Set the Proc alarm 4 value. As a side effect - clears the corresponding interrupt line"/>
+ <register addr="5110001c" rw_flags="RW" width="4" name="TCKR_TIMESTAMP_CTRL" comment="Control of timestamping"/>
+ <register addr="51100020" rw_flags="R" width="4" name="TCKR_TIMESTAMP0_COARSE_VAL" comment="Timestamp 0 block microsecond count"/>
+ <register addr="51100024" rw_flags="R" width="4" name="TCKR_TIMESTAMP1_COARSE_VAL" comment="Timestamp 1 block microsecond count"/>
+ <register addr="51100028" rw_flags="R" width="4" name="TCKR_TIMESTAMP2_COARSE_VAL" comment="Timestamp 2 block microsecond count"/>
+ <register addr="5110002c" rw_flags="R" width="4" name="TCKR_TIMESTAMP3_COARSE_VAL" comment="Timestamp 3 block microsecond count"/>
+ <register addr="51100030" rw_flags="R" width="2" name="TCKR_TIMESTAMP0_FINE_VAL" comment="Timestamp 0 block 1/80 microsecond count"/>
+ <register addr="51100034" rw_flags="R" width="2" name="TCKR_TIMESTAMP1_FINE_VAL" comment="Timestamp 1 block 1/80 microsecond count"/>
+ <register addr="51100038" rw_flags="R" width="2" name="TCKR_TIMESTAMP2_FINE_VAL" comment="Timestamp 2 block 1/80 microsecond count"/>
+ <register addr="5110003c" rw_flags="R" width="2" name="TCKR_TIMESTAMP3_FINE_VAL" comment="Timestamp 3 block 1/80 microsecond count"/>
+ <register addr="51100040" rw_flags="R" width="1" name="TCKR_TIMESTAMP_OCCURRED" comment="Timestamp edge has happened (one bit for each block)"/>
+ <register addr="51100044" rw_flags="RW" width="1" name="TCKR_TIMESTAMP_OCCURRED_CLEAR" comment="Clears corresponding TIMESTAMP_OCCURRED flag"/>
+ <register addr="51100048" rw_flags="RW" width="1" name="TCKR_CTRL0" comment="The Proc alarm 0 control register"/>
+ <register addr="5110004c" rw_flags="RW" width="1" name="TCKR_CTRL1" comment="The Proc alarm 1 control register"/>
+ <register addr="51100050" rw_flags="RW" width="1" name="TCKR_CTRL2" comment="The Proc alarm 2 control register"/>
+ <register addr="51100054" rw_flags="RW" width="1" name="TCKR_CTRL3" comment="The Proc alarm 3 control register"/>
+ <register addr="51100058" rw_flags="RW" width="1" name="TCKR_CTRL4" comment="The Proc alarm 4 control register"/>
+ </block>
+ <block name="phy" comment="">
+ <register addr="50000000" rw_flags="R" width="4" name="PHY_ID_0" comment='PHY ID 0, ASCII "PHY-"'/>
+ <register addr="50000004" rw_flags="R" width="4" name="PHY_ID_1" comment="PHY ID 1, ASCII BANDWIDTH,TX_SS,RX_SS,TC"/>
+ <register addr="50000008" rw_flags="RW" width="4" name="PHY_CONFIG[0]" comment="PHY configuration (one for each of the two paths in RSDB builds)"/>
+ <register addr="5000000c" rw_flags="RW" width="4" name="PHY_CONFIG[1]" comment="PHY configuration (one for each of the two paths in RSDB builds)"/>
+ <register addr="50000010" rw_flags="RW" width="2" name="PHY_RESET" comment="Async reset for phy blocks"/>
+ <register addr="50000014" rw_flags="R" width="4" name="PHY_MAC_STATUS" comment="Status register showing the current value of the private MAC baseband control registers"/>
+ <register addr="50000018" rw_flags="RW" width="4" name="PHY_CONTROL" comment="Allows the CPU to override MAC start/abort of baseband operations"/>
+ <register addr="5000001c" rw_flags="RW" width="2" name="CAPTURE_INTERVAL" comment=" capture interval in steps of 50ns"/>
+ <register addr="50000020" rw_flags="RW" width="4" name="CAPTURE_BASE_ADDR" comment=" Capture base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000024" rw_flags="RW" width="4" name="CAPTURE_BUFFER_LEN" comment=" Capture buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000028" rw_flags="RW" width="4" name="CAPTURE_CONTROL" comment="This register controls the data capture features within the capture block"/>
+ <register addr="5000002c" rw_flags="RW" width="4" name="EVENT_COUNT_CONTROL[0]" comment="This register configure capture trigger events to be counted"/>
+ <register addr="50000030" rw_flags="RW" width="4" name="EVENT_COUNT_CONTROL[1]" comment="This register configure capture trigger events to be counted"/>
+ <register addr="50000034" rw_flags="R" width="2" name="EVENT_COUNT[0]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000038" rw_flags="R" width="2" name="EVENT_COUNT[1]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="5000003c" rw_flags="R" width="2" name="EVENT_COUNT[2]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000040" rw_flags="R" width="2" name="EVENT_COUNT[3]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000044" rw_flags="R" width="2" name="EVENT_COUNT[4]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000048" rw_flags="R" width="2" name="EVENT_COUNT[5]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="5000004c" rw_flags="R" width="2" name="EVENT_COUNT[6]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000050" rw_flags="R" width="2" name="EVENT_COUNT[7]" comment="Store the event count for EVENT_SEL0...7"/>
+ <register addr="50000054" rw_flags="R" width="2" name="CAPTURE_STATUS" comment="Capture and DMA channel state "/>
+ <register addr="50000058" rw_flags="R" width="4" name="CAPTURE_CUR_ADDR" comment=" Capture current address"/>
+ <register addr="5000005c" rw_flags="RW" width="4" name="PLAYBACK_BASE_ADDR" comment=" Playback base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000060" rw_flags="RW" width="4" name="PLAYBACK_BUFFER_LEN" comment=" Playback buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000064" rw_flags="RW" width="4" name="PLAYBACK_CONTROL" comment="This register controls the data Playback features within the Playback block"/>
+ <register addr="50000068" rw_flags="R" width="2" name="PLAYBACK_STATUS" comment="Playback and DMA channel state"/>
+ <register addr="5000006c" rw_flags="R" width="4" name="PLAYBACK_CUR_ADDR" comment=" Playback current address"/>
+ <register addr="50000070" rw_flags="RW" width="4" name="EVENT_CONTROL_0" comment="enables for event capture"/>
+ <register addr="50000074" rw_flags="RW" width="4" name="EVENT_CONTROL_1" comment="enables for event capture"/>
+ <register addr="50000078" rw_flags="W" width="4" name="EVENT_GENERATE" comment="generates event from software"/>
+ <register addr="5000007c" rw_flags="RW" width="4" name="EVENT_HIGH" comment="high 32 bits of software generated events"/>
+ <register addr="50000080" rw_flags="RW" width="4" name="EVENT_MATCH[0]" comment="Event ID matches that generate interrupt or capture trigger"/>
+ <register addr="50000084" rw_flags="RW" width="4" name="EVENT_MATCH[1]" comment="Event ID matches that generate interrupt or capture trigger"/>
+ <register addr="50000088" rw_flags="RW" width="4" name="EVENT_DMA_BASE_ADDR" comment=" Events logging base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="5000008c" rw_flags="RW" width="4" name="EVENT_DMA_BUFFER_LEN" comment="Events logging buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="50000090" rw_flags="R" width="2" name="EVENT_STATUS" comment=" EVENT logging status "/>
+ <register addr="50000094" rw_flags="R" width="4" name="EVENT_DMA_CUR_ADDR" comment=" Beamformee0 DMA read current address"/>
+ <register addr="50000098" rw_flags="RW" width="1" name="BBA_BF_RX0_CONTROL" comment="Beamformee 0 control to request CBR upon next NDP"/>
+ <register addr="5000009c" rw_flags="RW" width="1" name="BBA_BF_RX0_DMA_EN" comment=" Beamformee 0 DMA channel enable "/>
+ <register addr="500000a0" rw_flags="RW" width="4" name="BBA_BF_RX0_DMA_BASE_ADDR" comment=" Beamformee 0 base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000a4" rw_flags="RW" width="2" name="BBA_BF_RX0_DMA_BUFFER_LEN" comment=" Beamformee 0 buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000a8" rw_flags="R" width="2" name="BBA_BF_RX0_STATUS" comment=" BBA_BF_RX0 status "/>
+ <register addr="500000ac" rw_flags="R" width="4" name="BBA_BF_RX0_DMA_CUR_ADDR" comment=" Beamformee0 DMA read current address"/>
+ <register addr="500000b0" rw_flags="RW" width="1" name="BBA_BF_RX1_CONTROL" comment="Beamformee 1 control to request CBR upon next NDP"/>
+ <register addr="500000b4" rw_flags="RW" width="1" name="BBA_BF_RX1_DMA_EN" comment=" Beamformee 1 DMA channel enable "/>
+ <register addr="500000b8" rw_flags="RW" width="4" name="BBA_BF_RX1_DMA_BASE_ADDR" comment=" Beamformee 1 base address must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000bc" rw_flags="RW" width="2" name="BBA_BF_RX1_DMA_BUFFER_LEN" comment=" Beamformee 1 buffer length must be 8-byte aligned, three LSBs is ignored"/>
+ <register addr="500000c0" rw_flags="R" width="2" name="BBA_BF_RX1_STATUS" comment=" BBA_BF_RX1 status "/>
+ <register addr="500000c4" rw_flags="R" width="4" name="BBA_BF_RX1_DMA_CUR_ADDR" comment=" Beamformee1 DMA read current address"/>
+ <register addr="500000c8" rw_flags="RW" width="1" name="BBA_BF_TX_DMA_CONTROL" comment="This register controls the beamformer angle fetch DMA "/>
+ <register addr="500000cc" rw_flags="RW" width="4" name="BBA_BF_TX_DMA_BASE_ADDR" comment="Beamformer angle fetch DMA base address (byte address)"/>
+ <register addr="500000d0" rw_flags="RW" width="4" name="BBA_BF_TX_DMA_BUFFER_LEN" comment="Beamformer angle fetch buffer length (bytes)"/>
+ <register addr="500000d4" rw_flags="R" width="2" name="BBA_BF_TX_STATUS" comment=" BBA_BF_TX_status "/>
+ <register addr="500000d8" rw_flags="R" width="4" name="BBA_BF_TX_DMA_CUR_ADDR" comment=" Beamformer DMA read current address"/>
+ <register addr="500000dc" rw_flags="RW" width="4" name="DMA_INT_EN" comment="Write one to enable corresponding DMA interrupt "/>
+ <register addr="500000e0" rw_flags="R" width="4" name="DMA_EVENTS" comment="Generated DMA events.Register has the same fields as DMA_INT "/>
+ <register addr="500000e4" rw_flags="RW" width="4" name="DMA_INT_CLEAR" comment="Write one to clear DMA event.Register has the same fields as DMA_INT_EN "/>
+ </block>
+ <block name="phy_clkgen_0" comment="">
+ <register addr="50010000" rw_flags="RW" width="1" name="CLKGEN_DEBUG_SELECT_I0" comment="This register selects which of a variety of debug buses are driven out of the block"/>
+ <register addr="50010004" rw_flags="R" width="2" name="CLKGEN_TIMER_FAST_STATUS_I0" comment="This read-only register contains the current value of the fast timer. It is used to set time changes on PIOs to implement serial buses. The value is in units of 12.5ns (80MHz) and it is free running all the time that the CLKGEN_TIMER_FAST_EN bit in CLKGEN_TIMER_ENABLES is set."/>
+ <register addr="50010008" rw_flags="RW" width="2" name="WL_CLKGEN_ENABLES_I0" comment="This register enables many of the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="5001000c" rw_flags="RW" width="1" name="CLKGEN_PP_ENABLES_I0" comment="This register enables processor platform clocks. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50010010" rw_flags="RW" width="2" name="CLKGEN_WL_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN specific clocks"/>
+ <register addr="50010014" rw_flags="RW" width="2" name="CLKGEN_BB_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN baseband specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="50010018" rw_flags="RW" width="1" name="CLKGEN_LDPC_ENABLES_I0" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with LDPC specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="5001001c" rw_flags="RW" width="1" name="CLKGEN_CLKMAC_SLEEP_CONFIG_I0" comment="This register selects which of the clock requests and the Mac Activity input are capable of forcing the Clk20MRadio clock to be active. This could be useful to software in controlling sleep modes for the Mac Accelerator."/>
+ <register addr="50010020" rw_flags="R" width="2" name="CLKGEN_STATUS_I0" comment="This register returns the instantaneous status of the various deep sleep wakeup sources, along with the deep sleep mode bit and the status of the slow clock"/>
+ <register addr="50010024" rw_flags="RW" width="4" name="CLKGEN_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50010028" rw_flags="RW" width="2" name="CLKGEN_BB_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="5001002c" rw_flags="RW" width="1" name="CLKGEN_LDPC_CLK_REQ_ENABLES_I0" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50010030" rw_flags="R" width="2" name="CLKGEN_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50010034" rw_flags="R" width="2" name="CLKGEN_BB_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50010038" rw_flags="R" width="1" name="CLKGEN_LDPC_CLK_REQ_STATUS_I0" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="5001003c" rw_flags="RW" width="1" name="CLKGEN_VITERBI_PRESCALE_CFG_I0" comment="Register to set 480MHz clock prescaling before it is used to create Viterbi clock. Prescaled clock would be 480, 240, 120 and 80 MHz when set to 1, 2, 3 and 4 respectfully. Recommended settings are SISO 1, 1, 2 and 4 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 1, 1, 3, 4 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 1."/>
+ <register addr="50010040" rw_flags="RW" width="1" name="CLKGEN_VITERBI_SCALE_CFG_I0" comment="Register to divide prescaled 480MHz clock to create Viterbi clock. The scaling value applied is (Register Value + 1)/8. Recommended settings are SISO 5, 5, 5 and 7 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 7, 7, 7, 6 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 4."/>
+ </block>
+ <block name="phy_clkgen_1" comment="">
+ <register addr="50020000" rw_flags="RW" width="1" name="CLKGEN_DEBUG_SELECT_I1" comment="This register selects which of a variety of debug buses are driven out of the block"/>
+ <register addr="50020004" rw_flags="R" width="2" name="CLKGEN_TIMER_FAST_STATUS_I1" comment="This read-only register contains the current value of the fast timer. It is used to set time changes on PIOs to implement serial buses. The value is in units of 12.5ns (80MHz) and it is free running all the time that the CLKGEN_TIMER_FAST_EN bit in CLKGEN_TIMER_ENABLES is set."/>
+ <register addr="50020008" rw_flags="RW" width="2" name="WL_CLKGEN_ENABLES_I1" comment="This register enables many of the core clocks on the chip. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="5002000c" rw_flags="RW" width="1" name="CLKGEN_PP_ENABLES_I1" comment="This register enables processor platform clocks. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50020010" rw_flags="RW" width="2" name="CLKGEN_WL_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN specific clocks"/>
+ <register addr="50020014" rw_flags="RW" width="2" name="CLKGEN_BB_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with wireless LAN baseband specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="50020018" rw_flags="RW" width="1" name="CLKGEN_LDPC_ENABLES_I1" comment="This register is logically an extension of CLKGEN_ENABLES, but contains bits associated with LDPC specific clocks. Forcing the clocks ON is not recommended for power saving."/>
+ <register addr="5002001c" rw_flags="RW" width="1" name="CLKGEN_CLKMAC_SLEEP_CONFIG_I1" comment="This register selects which of the clock requests and the Mac Activity input are capable of forcing the Clk20MRadio clock to be active. This could be useful to software in controlling sleep modes for the Mac Accelerator."/>
+ <register addr="50020020" rw_flags="R" width="2" name="CLKGEN_STATUS_I1" comment="This register returns the instantaneous status of the various deep sleep wakeup sources, along with the deep sleep mode bit and the status of the slow clock"/>
+ <register addr="50020024" rw_flags="RW" width="4" name="CLKGEN_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50020028" rw_flags="RW" width="2" name="CLKGEN_BB_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="5002002c" rw_flags="RW" width="1" name="CLKGEN_LDPC_CLK_REQ_ENABLES_I1" comment="This register enables clock requests to have an effect. If these bits are cleared, the clock request from the corresponding block is ignored"/>
+ <register addr="50020030" rw_flags="R" width="2" name="CLKGEN_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50020034" rw_flags="R" width="2" name="CLKGEN_BB_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="50020038" rw_flags="R" width="1" name="CLKGEN_LDPC_CLK_REQ_STATUS_I1" comment="This register allows the firmware to see the instantaneous state of the clock request lines from the various subsystems to assist in deciding whether the hardware is really idle or just pausing briefly"/>
+ <register addr="5002003c" rw_flags="RW" width="1" name="CLKGEN_VITERBI_PRESCALE_CFG_I1" comment="Register to set 480MHz clock prescaling before it is used to create Viterbi clock. Prescaled clock would be 480, 240, 120 and 80 MHz when set to 1, 2, 3 and 4 respectfully. Recommended settings are SISO 1, 1, 2 and 4 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 1, 1, 3, 4 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 1."/>
+ <register addr="50020040" rw_flags="RW" width="1" name="CLKGEN_VITERBI_SCALE_CFG_I1" comment="Register to divide prescaled 480MHz clock to create Viterbi clock. The scaling value applied is (Register Value + 1)/8. Recommended settings are SISO 5, 5, 5 and 7 for 80+80, 80, 40 and 20 MHz operating bandwidth; MIMO 7, 7, 7, 6 for 80+80, 80, 40 and 20 MHz operating bandwidth. NOTE: If HT-GF LDPC 20 MHz reception capability is advertised configure to 4."/>
+ </block>
+ <block name="phy_dfe" comment="">
+ <register addr="50030000" rw_flags="RW" width="4" name="DFE_RX_CONFIG[0]" comment="Rx configuration bits"/>
+ <register addr="50030004" rw_flags="R" width="4" name="DFE_RX_STATUS[0]" comment="Rx status bits per channel"/>
+ <register addr="50030008" rw_flags="RW" width="1" name="DFE_RX_LNA_PHASE_COMP_CONFIG1[0]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="5003000c" rw_flags="RW" width="2" name="DFE_RX_LNA_PHASE_COMP_CONFIG2[0]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030010" rw_flags="RW" width="2" name="DFE_RX_NOTCH_CONFIG[0]" comment="This register configures the two notch filters in each of the receive chains. The lower 5 bits configure the OFDM filter and the next 5 bits the CCK filter. The MSB enables the notch filter in front of the rx_ctrl module"/>
+ <register addr="50030014" rw_flags="RW" width="2" name="DFE_RX_NOTCH_PRELOAD[0]" comment="This is the value loaded into the memory element of the notch filters if requested"/>
+ <register addr="50030018" rw_flags="RW" width="2" name="DFE_SIGANAL_CONFIG[0]" comment="This register configures the signal analyser"/>
+ <register addr="5003001c" rw_flags="RW" width="2" name="DFE_SIGANAL_FREQ[0]" comment="This sets the frequency of the tone used by the signal analyser. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000.This sets the frequency of the tone used by the signal analyser."/>
+ <register addr="50030020" rw_flags="RW" width="1" name="DFE_RX_COMP_CONFIG1[0]" comment="This register controls phase and magnitude compensation for the receive signals in the first receive chain, and has a bit which enables frequency compensation for both receive chains."/>
+ <register addr="50030024" rw_flags="RW" width="2" name="DFE_RX_COMP_CONFIG2[0]" comment="Configuration parameters for the averaging block in the Rx IQ Compensation measurement block"/>
+ <register addr="50030028" rw_flags="RW" width="2" name="DFE_RX_COMP_DELAY_CONFIG[0]" comment="This register controls the receiver delay compensation parameters"/>
+ <register addr="5003002c" rw_flags="RW" width="2" name="DFE_RX_COMP_PHASE_CONFIG[0]" comment="Configuration for receiver phase compensation"/>
+ <register addr="50030030" rw_flags="RW" width="2" name="DFE_RX_COMP_AMPL_CONFIG[0]" comment="Configuration for receiver amplitude compensation"/>
+ <register addr="50030034" rw_flags="R" width="2" name="DFE_RX_COMP_AUTO_COEFFS[0]" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the DFE_RX_COMP_LUT_READ_EN bit in the DFE_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50030038" rw_flags="R" width="1" name="DFE_RX_PHASE_COMP_LUT_STATUS[0]" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="5003003c" rw_flags="R" width="1" name="DFE_RX_AMPL_COMP_LUT_STATUS[0]" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="50030040" rw_flags="R" width="4" name="DFE_SIGANAL_I_POSITIVE_OUTPUT[0]" comment="This contains the I value generated by the positive frequency signal analyser"/>
+ <register addr="50030044" rw_flags="R" width="4" name="DFE_SIGANAL_Q_POSITIVE_OUTPUT[0]" comment="This contains the Q value generated by the positive frequency signal analyser"/>
+ <register addr="50030048" rw_flags="R" width="4" name="DFE_SIGANAL_I_NEGATIVE_OUTPUT[0]" comment="This contains the I value generated by the negative frequency signal analyser"/>
+ <register addr="5003004c" rw_flags="R" width="4" name="DFE_SIGANAL_Q_NEGATIVE_OUTPUT[0]" comment="This contains the Q value generated by the negative frequency signal analyser"/>
+ <register addr="50030050" rw_flags="R" width="1" name="DFE_SIGANAL_RSSI[0]" comment="This register contains the RSSI too loud indicati ons collected while the signal analyser was running. Bits set in this register mean that the corresponding signal analyser output may be unreliable"/>
+ <register addr="50030054" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_CONTROL[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030058" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_HDRLEN[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003005c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI0[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030060" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ0[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030064" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI1[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030068" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ1[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003006c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI2[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030070" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ2[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030074" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI3[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030078" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ3[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="5003007c" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI4[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030080" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ4[0]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030084" rw_flags="RW" width="4" name="DFE_RX_CONFIG[1]" comment="Rx configuration bits"/>
+ <register addr="50030088" rw_flags="R" width="4" name="DFE_RX_STATUS[1]" comment="Rx status bits per channel"/>
+ <register addr="5003008c" rw_flags="RW" width="1" name="DFE_RX_LNA_PHASE_COMP_CONFIG1[1]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030090" rw_flags="RW" width="2" name="DFE_RX_LNA_PHASE_COMP_CONFIG2[1]" comment="Configuration for LNA phase compensation - WL LNA."/>
+ <register addr="50030094" rw_flags="RW" width="2" name="DFE_RX_NOTCH_CONFIG[1]" comment="This register configures the two notch filters in each of the receive chains. The lower 5 bits configure the OFDM filter and the next 5 bits the CCK filter. The MSB enables the notch filter in front of the rx_ctrl module"/>
+ <register addr="50030098" rw_flags="RW" width="2" name="DFE_RX_NOTCH_PRELOAD[1]" comment="This is the value loaded into the memory element of the notch filters if requested"/>
+ <register addr="5003009c" rw_flags="RW" width="2" name="DFE_SIGANAL_CONFIG[1]" comment="This register configures the signal analyser"/>
+ <register addr="500300a0" rw_flags="RW" width="2" name="DFE_SIGANAL_FREQ[1]" comment="This sets the frequency of the tone used by the signal analyser. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000.This sets the frequency of the tone used by the signal analyser."/>
+ <register addr="500300a4" rw_flags="RW" width="1" name="DFE_RX_COMP_CONFIG1[1]" comment="This register controls phase and magnitude compensation for the receive signals in the first receive chain, and has a bit which enables frequency compensation for both receive chains."/>
+ <register addr="500300a8" rw_flags="RW" width="2" name="DFE_RX_COMP_CONFIG2[1]" comment="Configuration parameters for the averaging block in the Rx IQ Compensation measurement block"/>
+ <register addr="500300ac" rw_flags="RW" width="2" name="DFE_RX_COMP_DELAY_CONFIG[1]" comment="This register controls the receiver delay compensation parameters"/>
+ <register addr="500300b0" rw_flags="RW" width="2" name="DFE_RX_COMP_PHASE_CONFIG[1]" comment="Configuration for receiver phase compensation"/>
+ <register addr="500300b4" rw_flags="RW" width="2" name="DFE_RX_COMP_AMPL_CONFIG[1]" comment="Configuration for receiver amplitude compensation"/>
+ <register addr="500300b8" rw_flags="R" width="2" name="DFE_RX_COMP_AUTO_COEFFS[1]" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the DFE_RX_COMP_LUT_READ_EN bit in the DFE_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="500300bc" rw_flags="R" width="1" name="DFE_RX_PHASE_COMP_LUT_STATUS[1]" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="500300c0" rw_flags="R" width="1" name="DFE_RX_AMPL_COMP_LUT_STATUS[1]" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="500300c4" rw_flags="R" width="4" name="DFE_SIGANAL_I_POSITIVE_OUTPUT[1]" comment="This contains the I value generated by the positive frequency signal analyser"/>
+ <register addr="500300c8" rw_flags="R" width="4" name="DFE_SIGANAL_Q_POSITIVE_OUTPUT[1]" comment="This contains the Q value generated by the positive frequency signal analyser"/>
+ <register addr="500300cc" rw_flags="R" width="4" name="DFE_SIGANAL_I_NEGATIVE_OUTPUT[1]" comment="This contains the I value generated by the negative frequency signal analyser"/>
+ <register addr="500300d0" rw_flags="R" width="4" name="DFE_SIGANAL_Q_NEGATIVE_OUTPUT[1]" comment="This contains the Q value generated by the negative frequency signal analyser"/>
+ <register addr="500300d4" rw_flags="R" width="1" name="DFE_SIGANAL_RSSI[1]" comment="This register contains the RSSI too loud indicati ons collected while the signal analyser was running. Bits set in this register mean that the corresponding signal analyser output may be unreliable"/>
+ <register addr="500300d8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_CONTROL[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300dc" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_HDRLEN[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e0" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI0[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e4" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ0[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300e8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI1[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300ec" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ1[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f0" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI2[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f4" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ2[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300f8" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI3[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="500300fc" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ3[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030100" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFI4[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030104" rw_flags="RW" width="4" name="DFE_RX_FDIQMC_COEFFQ4[1]" comment="Frequency dependent Rx IQ Compensation.compensates IQ mismatches based on adaptive filter method"/>
+ <register addr="50030108" rw_flags="RW" width="1" name="DFE_SIGGEN_ENABLE" comment="bit N = 1 : Signal Generator N is Enabled "/>
+ <register addr="5003010c" rw_flags="RW" width="4" name="DFE_SIGGEN_CONFIG[0]" comment="Register to control operation of the internal signal generator. SigGen must be enabled in DFE_SIGGEN_ENABLE to start"/>
+ <register addr="50030110" rw_flags="RW" width="2" name="DFE_SIGGEN_CONFIG2[0]" comment="Register to control operation of the internal signal generator- logical extension of DFE_SIGGEN_CONFIG"/>
+ <register addr="50030114" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ1[0]" comment="This sets the frequency of the primary (only) tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000."/>
+ <register addr="50030118" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ2[0]" comment="This sets the frequency of the secondary tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000"/>
+ <register addr="5003011c" rw_flags="RW" width="2" name="DFE_SIGGEN_PHASE[0]" comment="This register has two functions: it is the value preloaded into the accumulator used to generate the first tone, so can set the phase of that tone relative to the second tone or the signal analyser tone. Also, it is used to provide the DC level in that mode of operation"/>
+ <register addr="50030120" rw_flags="RW" width="4" name="DFE_SIGGEN_CONFIG[1]" comment="Register to control operation of the internal signal generator. SigGen must be enabled in DFE_SIGGEN_ENABLE to start"/>
+ <register addr="50030124" rw_flags="RW" width="2" name="DFE_SIGGEN_CONFIG2[1]" comment="Register to control operation of the internal signal generator- logical extension of DFE_SIGGEN_CONFIG"/>
+ <register addr="50030128" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ1[1]" comment="This sets the frequency of the primary (only) tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000."/>
+ <register addr="5003012c" rw_flags="RW" width="2" name="DFE_SIGGEN_FREQ2[1]" comment="This sets the frequency of the secondary tone used by the signal generator. The value for a given frequency can be found by multiplying by 65 536 and dividing by 80 000 000"/>
+ <register addr="50030130" rw_flags="RW" width="2" name="DFE_SIGGEN_PHASE[1]" comment="This register has two functions: it is the value preloaded into the accumulator used to generate the first tone, so can set the phase of that tone relative to the second tone or the signal analyser tone. Also, it is used to provide the DC level in that mode of operation"/>
+ <register addr="50030134" rw_flags="RW" width="1" name="DFE_TX_CONFIG[0]" comment="Rx configuration bits"/>
+ <register addr="50030138" rw_flags="RW" width="2" name="DFE_TX_COMP_LP_SCALE_CONFIG[0]" comment="This register contains the Low Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="5003013c" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_SCALE_CONFIG[0]" comment="This register contains the High Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030140" rw_flags="RW" width="4" name="DFE_TX_COMP_LP_OFFSET_CONFIG[0]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - low power mode"/>
+ <register addr="50030144" rw_flags="RW" width="2" name="DFE_TX_COMP_PHASE_CONFIG[0]" comment="Additional Tx compensation value used for phase imbalance correction"/>
+ <register addr="50030148" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_OFFSET_CONFIG[0]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - high power mode"/>
+ <register addr="5003014c" rw_flags="RW" width="1" name="DFE_TX_COMP_DELAY_CONFIG[0]" comment="This register controls the transmit delay compensation parameters"/>
+ <register addr="50030150" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][0]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030154" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][1]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030158" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][2]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003015c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][3]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030160" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][4]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030164" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][5]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030168" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][6]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003016c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][7]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030170" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][8]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030174" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][9]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030178" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][10]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003017c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][11]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030180" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][12]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030184" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][13]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030188" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][14]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003018c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][15]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030190" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][16]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030194" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][17]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="50030198" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][18]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003019c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][19]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][20]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][21]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301a8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][22]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301ac" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[0][23]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500301b0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301b4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301b8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301bc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[0][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301c8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301cc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d0" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d4" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301d8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301dc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[0][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e0" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e4" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301e8" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301ec" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f0" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f4" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[0][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301f8" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500301fc" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030200" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030204" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030208" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003020c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[0][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030210" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG1[0]" comment="Predist Mode and block enables, LutWr and LutRd Config Register"/>
+ <register addr="50030214" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG2[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030218" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG3[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003021c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG4[0]" comment="Predistortion OFDM0 Config"/>
+ <register addr="50030220" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG5[0]" comment="Predistortion OFDM1 Config"/>
+ <register addr="50030224" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG6[0]" comment="Predistortion Mode CCK Config"/>
+ <register addr="50030228" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG7[0]" comment="Training Mode Config1"/>
+ <register addr="5003022c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG8[0]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030230" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG9[0]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030234" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG10[0]" comment="Predistortion - Feedback FIR Filter Config1"/>
+ <register addr="50030238" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG11[0]" comment="Predistortion - Feedback FIR Filter Config2"/>
+ <register addr="5003023c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG12[0]" comment="Predistortion - Feedback Notch Mode Config1"/>
+ <register addr="50030240" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG13[0]" comment="Predistortion - Feedback Notch Mode Config2"/>
+ <register addr="50030244" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG14[0]" comment="Predistortion - Feedback Signal Power Config"/>
+ <register addr="50030248" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG15[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="5003024c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG16[0]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030250" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG17[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030254" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG18[0]" comment="DPD Interpolator gain,force enable control register"/>
+ <register addr="50030258" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG19[0]" comment="DPD Training force enable control register"/>
+ <register addr="5003025c" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS1[0]" comment="Predistortion - Output DC Bias and FIR Register"/>
+ <register addr="50030260" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS2[0]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="50030264" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS3[0]" comment="Predistortion - Debug Register"/>
+ <register addr="50030268" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_RE[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003026c" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_IM[0]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030270" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS5[0]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="50030274" rw_flags="R" width="2" name="DFE_TX_PREDIST_STATUS6[0]" comment="Training sequence read register 1"/>
+ <register addr="50030278" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS7[0]" comment="Training sequece read register2"/>
+ <register addr="5003027c" rw_flags="RW" width="1" name="DFE_TX_CONFIG[1]" comment="Rx configuration bits"/>
+ <register addr="50030280" rw_flags="RW" width="2" name="DFE_TX_COMP_LP_SCALE_CONFIG[1]" comment="This register contains the Low Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030284" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_SCALE_CONFIG[1]" comment="This register contains the High Power Tx compensation values that are used for magnitude and phase compensation, and also controls whether the frequency compensation block is enabled on transmit."/>
+ <register addr="50030288" rw_flags="RW" width="4" name="DFE_TX_COMP_LP_OFFSET_CONFIG[1]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - low power mode"/>
+ <register addr="5003028c" rw_flags="RW" width="2" name="DFE_TX_COMP_PHASE_CONFIG[1]" comment="Additional Tx compensation value used for phase imbalance correction"/>
+ <register addr="50030290" rw_flags="RW" width="2" name="DFE_TX_COMP_HP_OFFSET_CONFIG[1]" comment="This register is a logical extension of DFE_TX_COMP_CONFIG1 and contains additional Tx compensation values - high power mode"/>
+ <register addr="50030294" rw_flags="RW" width="1" name="DFE_TX_COMP_DELAY_CONFIG[1]" comment="This register controls the transmit delay compensation parameters"/>
+ <register addr="50030298" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][0]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="5003029c" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][1]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][2]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][3]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302a8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][4]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302ac" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][5]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][6]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][7]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302b8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][8]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302bc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][9]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][10]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][11]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302c8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][12]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302cc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][13]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][14]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][15]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302d8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][16]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302dc" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][17]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][18]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][19]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302e8" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][20]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302ec" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][21]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f0" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][22]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f4" rw_flags="RW" width="2" name="DFE_TX_MOD_CONFIG[1][23]" comment="Tx modulation-specific configuration for digital gain, DPD training, DPD bank select, spectral shaping filter select."/>
+ <register addr="500302f8" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="500302fc" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030300" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030304" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030308" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003030c" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK0[1][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030310" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][0]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030314" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][1]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030318" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][2]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003031c" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][3]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030320" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][4]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030324" rw_flags="RW" width="4" name="DFE_TX_SSF_BANK1[1][5]" comment="Twenty-one 8-bit coeffecients for Tx Spectrum shaping filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030328" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003032c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030330" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030334" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030338" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003033c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK0[1][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 0, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030340" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][0]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030344" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][1]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030348" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][2]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="5003034c" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][3]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030350" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][4]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030354" rw_flags="RW" width="4" name="DFE_DPD_SSF_BANK1[1][5]" comment="Twenty-one 8-bit coeffecients for Tx DPD filter bank 1, Bit 8 of last register is Filter enable bit"/>
+ <register addr="50030358" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG1[1]" comment="Predist Mode and block enables, LutWr and LutRd Config Register"/>
+ <register addr="5003035c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG2[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030360" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG3[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="50030364" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG4[1]" comment="Predistortion OFDM0 Config"/>
+ <register addr="50030368" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG5[1]" comment="Predistortion OFDM1 Config"/>
+ <register addr="5003036c" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG6[1]" comment="Predistortion Mode CCK Config"/>
+ <register addr="50030370" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG7[1]" comment="Training Mode Config1"/>
+ <register addr="50030374" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG8[1]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="50030378" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG9[1]" comment="Predistortion Modulation based Pre Gain configuration"/>
+ <register addr="5003037c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG10[1]" comment="Predistortion - Feedback FIR Filter Config1"/>
+ <register addr="50030380" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG11[1]" comment="Predistortion - Feedback FIR Filter Config2"/>
+ <register addr="50030384" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG12[1]" comment="Predistortion - Feedback Notch Mode Config1"/>
+ <register addr="50030388" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG13[1]" comment="Predistortion - Feedback Notch Mode Config2"/>
+ <register addr="5003038c" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG14[1]" comment="Predistortion - Feedback Signal Power Config"/>
+ <register addr="50030390" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG15[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030394" rw_flags="RW" width="4" name="DFE_TX_PREDIST_CONFIG16[1]" comment="Predist Mode and block enables, LutWr Config Register"/>
+ <register addr="50030398" rw_flags="RW" width="2" name="DFE_TX_PREDIST_CONFIG17[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="5003039c" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG18[1]" comment="DPD Interpolator gain,force enable control register"/>
+ <register addr="500303a0" rw_flags="RW" width="1" name="DFE_TX_PREDIST_CONFIG19[1]" comment="DPD Training force enable control register"/>
+ <register addr="500303a4" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS1[1]" comment="Predistortion - Output DC Bias and FIR Register"/>
+ <register addr="500303a8" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS2[1]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="500303ac" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS3[1]" comment="Predistortion - Debug Register"/>
+ <register addr="500303b0" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_RE[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="500303b4" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS4_IM[1]" comment="Predist Mode and block enables, LutRd Config Register"/>
+ <register addr="500303b8" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS5[1]" comment="Predistortion - Adaption Quality and Signal Powers"/>
+ <register addr="500303bc" rw_flags="R" width="2" name="DFE_TX_PREDIST_STATUS6[1]" comment="Training sequence read register 1"/>
+ <register addr="500303c0" rw_flags="R" width="4" name="DFE_TX_PREDIST_STATUS7[1]" comment="Training sequece read register2"/>
+ <register addr="500303c4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF0_READ[0]" comment="READ COEFF0"/>
+ <register addr="500303c8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF1_READ[0]" comment="READ COEFF1"/>
+ <register addr="500303cc" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF2_READ[0]" comment="READ COEFF2"/>
+ <register addr="500303d0" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF3_READ[0]" comment="READ COEFF3"/>
+ <register addr="500303d4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF4_READ[0]" comment="READ COEFF4"/>
+ <register addr="500303d8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF0_READ[1]" comment="READ COEFF0"/>
+ <register addr="500303dc" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF1_READ[1]" comment="READ COEFF1"/>
+ <register addr="500303e0" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF2_READ[1]" comment="READ COEFF2"/>
+ <register addr="500303e4" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF3_READ[1]" comment="READ COEFF3"/>
+ <register addr="500303e8" rw_flags="R" width="2" name="DFE_RX_FDIQMC_COEFF4_READ[1]" comment="READ COEFF4"/>
+ </block>
+ <block name="pio_mux" comment="">
+ <register addr="53000000" rw_flags="RW" width="2" name="PIO_INVERT_ENABLES" comment="Set a bit to 1 to invert the driven output."/>
+ <register addr="53000004" rw_flags="R" width="2" name="PIO_INPUT_STATUS" comment="The PIO input status(after loopback)."/>
+ <register addr="53000008" rw_flags="R" width="2" name="PIO_OUTPUT_STATUS" comment="The PIO output status."/>
+ <register addr="5300000c" rw_flags="RW" width="2" name="PIO0_CFG" comment=""/>
+ <register addr="53000010" rw_flags="RW" width="2" name="PIO1_CFG" comment=""/>
+ <register addr="53000014" rw_flags="RW" width="2" name="PIO2_CFG" comment=""/>
+ <register addr="53000018" rw_flags="RW" width="2" name="PIO3_CFG" comment=""/>
+ <register addr="5300001c" rw_flags="RW" width="2" name="PIO4_CFG" comment=""/>
+ <register addr="53000020" rw_flags="RW" width="2" name="PIO5_CFG" comment=""/>
+ <register addr="53000024" rw_flags="RW" width="2" name="PIO6_CFG" comment=""/>
+ <register addr="53000028" rw_flags="RW" width="2" name="PIO7_CFG" comment=""/>
+ <register addr="5300002c" rw_flags="RW" width="2" name="PIO8_CFG" comment=""/>
+ <register addr="53000030" rw_flags="RW" width="2" name="PIO9_CFG" comment=""/>
+ <register addr="53000034" rw_flags="RW" width="2" name="PIO10_CFG" comment=""/>
+ <register addr="53000038" rw_flags="RW" width="2" name="PIO11_CFG" comment=""/>
+ <register addr="5300003c" rw_flags="RW" width="2" name="PIO12_CFG" comment=""/>
+ <register addr="53000040" rw_flags="RW" width="2" name="PIO13_CFG" comment=""/>
+ <register addr="53000044" rw_flags="RW" width="2" name="PIO14_CFG" comment=""/>
+ <register addr="53000048" rw_flags="RW" width="2" name="PIO15_CFG" comment=""/>
+ <register addr="5300004c" rw_flags="RW" width="4" name="DEBUG_SERIALISER_CFG" comment=""/>
+ <register addr="53000050" rw_flags="RW" width="4" name="PMU_SERIALISER_CFG" comment=""/>
+ <register addr="53000054" rw_flags="RW" width="4" name="WL_SERIALISER_CFG" comment=""/>
+ <register addr="53000058" rw_flags="RW" width="4" name="BT_SERIALISER_CFG" comment=""/>
+ <register addr="5300005c" rw_flags="RW" width="4" name="COEX_SERIALISER_CFG" comment=""/>
+ <register addr="53000060" rw_flags="RW" width="4" name="SH_PROC_SERIALISER_CFG" comment=""/>
+ <register addr="53000064" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL0_MUX_CTRL" comment=""/>
+ <register addr="53000068" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL1_MUX_CTRL" comment=""/>
+ <register addr="5300006c" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL2_MUX_CTRL" comment=""/>
+ <register addr="53000070" rw_flags="RW" width="1" name="BBIC_RFIC_CTRL3_MUX_CTRL" comment=""/>
+ <register addr="53000074" rw_flags="RW" width="1" name="BBIC_CAPTURE_TRIG_MUX_CTRL" comment=""/>
+ <register addr="53000078" rw_flags="RW" width="4" name="DEBUG_DESERIALISER_CFG" comment="Configuration for the RFIC debug de-serialisers"/>
+ <register addr="5300007c" rw_flags="RW" width="4" name="DEBUG_DESERIALISER_CFG2" comment="Second configuration register for the RFIC debug de-serialisers"/>
+ <register addr="53000080" rw_flags="R" width="4" name="DEBUG_DESERIALISER_STATUS" comment="Status register for the RFIC debug de-serialisers"/>
+ <register addr="53000084" rw_flags="R" width="4" name="DEBUG_DESERIALISER_MONITOR" comment="Monitor register for the RFIC debug de-serialisers"/>
+ </block>
+ <block name="wl_bba_0" comment="">
+ <register addr="50040000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I0" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50040004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I0" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50040008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I0" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5004000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I0" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50040010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I0" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50040014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I0" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50040018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I0" comment="Packet transmit options."/>
+ <register addr="5004001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I0" comment="Signal field."/>
+ <register addr="50040020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I0" comment="Scan accelerator configuration."/>
+ <register addr="50040024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I0" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50040028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I0" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5004002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I0" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50040030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I0" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50040034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I0" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50040038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I0" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5004003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I0" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50040040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I0" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50040044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I0" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50040048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I0" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5004004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I0" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50040050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I0" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50040054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I0" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50040058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I0" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5004005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I0" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50040060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I0" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50040064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I0" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50040068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I0" comment="Receiver configuration"/>
+ <register addr="5004006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I0" comment="Receiver configuration"/>
+ <register addr="50040070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I0" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50040074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I0" comment="Receiver configuration"/>
+ <register addr="50040078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I0" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5004007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I0" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50040080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I0" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50040084" rw_flags="R" width="1" name="BB_STATUS_I0" comment=""/>
+ <register addr="50040088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I0" comment="Frequency offset for the last received burst"/>
+ <register addr="5004008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I0" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50040090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I0" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50040094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I0" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50040098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5004009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500400a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I0" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500400ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I0" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500400b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I0" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500400b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I0" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500400b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I0" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500400bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I0" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500400c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I0" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500400c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I0" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500400c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I0" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500400cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I0" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500400d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I0" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500400d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I0" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500400d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I0" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500400dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I0" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500400e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I0" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500400e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I0" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500400e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I0" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500400ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I0" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500400f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I0" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500400f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I0" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500400f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I0" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500400fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I0" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50040100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I0" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50040104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I0" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50040108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I0" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5004010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I0" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50040110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I0" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50040114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I0" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50040118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I0" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5004011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I0" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50040120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I0" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50040124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I0" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50040128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I0" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5004012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I0" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50040130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I0" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50040134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I0" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50040138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I0" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5004013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I0" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50040140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I0" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50040144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I0" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50040148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I0" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5004014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I0" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50040150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I0" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50040154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I0" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50040158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I0" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5004015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I0" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50040160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I0" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50040164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I0" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50040168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I0" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5004016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I0" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50040170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I0" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50040174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I0" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50040178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I0" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5004017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I0" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50040180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I0" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50040184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I0" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50040188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I0" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5004018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I0" comment="When set, apply Radio nudge again"/>
+ <register addr="50040190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I0" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50040194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I0" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50040198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I0" comment="Select the set of signals output at the debug port"/>
+ <register addr="5004019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I0" comment=""/>
+ <register addr="500401a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I0" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500401a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I0" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500401a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I0" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500401ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I0" comment="synchronizer configuration"/>
+ <register addr="500401b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I0" comment="synchronizer configuration"/>
+ <register addr="500401b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I0" comment="synchronizer configuration"/>
+ <register addr="500401b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I0" comment="synchronizer configuration"/>
+ <register addr="500401bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I0" comment="synchronizer configuration "/>
+ <register addr="500401c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I0" comment="synchronizer configuration "/>
+ <register addr="500401c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I0" comment="synchronizer configuration "/>
+ <register addr="500401c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I0" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500401cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I0" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500401d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I0" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500401d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I0" comment="synchronizer configuration "/>
+ <register addr="500401d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I0" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500401dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I0" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500401e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I0" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500401e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I0" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500401e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I0" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500401ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I0" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500401f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I0" comment=" 80MHz sync split filter"/>
+ <register addr="500401f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I0" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500401f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I0" comment="STF sync detector configuration"/>
+ <register addr="500401fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I0" comment="STF sync configuration with spare bits"/>
+ <register addr="50040200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I0" comment="Tone notch configuration"/>
+ <register addr="50040204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I0" comment="Tone notch configuration"/>
+ <register addr="50040208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I0" comment="Tone notch configuration"/>
+ <register addr="5004020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I0" comment="Tone notch configuration"/>
+ <register addr="50040210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I0" comment="STF group weight factor"/>
+ <register addr="50040214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I0" comment="STF group weight factor"/>
+ <register addr="50040218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I0" comment="CCA weighted combing sel"/>
+ <register addr="5004021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I0" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50040220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I0" comment="LTF Peak selection control"/>
+ <register addr="50040224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I0" comment="LTF peak threshold(for index7)"/>
+ <register addr="50040228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I0" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5004022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I0" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50040230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I0" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50040234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I0" comment="Beamformee CBR Length."/>
+ <register addr="50040238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I0" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5004023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I0" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50040240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I0" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50040244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I0" comment="Configuration for handling data for calibration"/>
+ <register addr="50040248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I0" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5004024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I0" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50040250" rw_flags="R" width="2" name="BB_CEST_MAX_I0" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50040254" rw_flags="R" width="1" name="BB_CEST_STATUS_I0" comment="Status information for calibration support"/>
+ <register addr="50040258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I0" comment="Channel estimate value requested"/>
+ <register addr="5004025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I0" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50040260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I0" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50040264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I0" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50040268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I0" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5004026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I0" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50040270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I0" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50040274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I0" comment="Unused register"/>
+ <register addr="50040278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I0" comment="Unused register"/>
+ <register addr="5004027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I0" comment="Unused register"/>
+ <register addr="50040280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I0" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50040284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I0" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50040288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I0" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5004028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I0" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50040290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I0" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50040294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I0" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50040298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I0" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5004029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I0" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500402a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I0" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500402a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I0" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500402a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I0" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500402ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I0" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500402b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I0" comment="QAM1024 Support Enable"/>
+ <register addr="500402b4" rw_flags="RW" width="2" name="BB_CHDET_I0" comment="Channel Type Detection"/>
+ <register addr="500402b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I0" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500402bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I0" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500402c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I0" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500402c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I0" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500402c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I0" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500402cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I0" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500402d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I0" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500402d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I0" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500402d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I0" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500402dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I0" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500402e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I0" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500402e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I0" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500402e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I0" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500402ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I0" comment="Payload Detector enables."/>
+ <register addr="500402f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I0" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I0" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I0" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500402fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I0" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I0" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I0" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I0" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5004030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I0" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50040310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I0" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50040314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I0" comment="MLD Configuration registers"/>
+ <register addr="50040318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I0" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5004031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I0" comment="TX beamforming configuration."/>
+ <register addr="50040320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I0" comment="TX beamforming configuration #2."/>
+ <register addr="50040324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I0" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50040328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I0" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5004032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I0" comment="This register is used to read the angle store data."/>
+ <register addr="50040330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I0" comment="This register is used to control smoothing"/>
+ <register addr="50040334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I0" comment="LDPC configuration"/>
+ <register addr="50040338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I0" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5004033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I0" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50040340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I0" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50040344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I0" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50040348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I0" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5004034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I0" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50040350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I0" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50040354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I0" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50040358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I0" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5004035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I0" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50040360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I0" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50040364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I0" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50040368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I0" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5004036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I0" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50040370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I0" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50040374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I0" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50040378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I0" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5004037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I0[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I0[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I0[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I0[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I0[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500403fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50040408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I0[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5004040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I0" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50040410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I0" comment="Linear phase estimation configuration"/>
+ <register addr="50040414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I0" comment="BB DD CPE configuration"/>
+ <register addr="50040418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I0" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5004041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I0" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50040420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50040424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50040428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I0" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5004042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I0" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50040438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5004043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50040440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I0" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50040444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I0" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50040448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I0" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5004044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I0" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50040450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I0" comment="Misc Internal signal status"/>
+ <register addr="50040454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I0" comment="Membership status array"/>
+ <register addr="50040458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I0" comment="Membership status array"/>
+ <register addr="5004045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I0" comment="User Position Array 2 bits"/>
+ <register addr="50040468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I0" comment="User Position Array 2 bits"/>
+ <register addr="5004046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I0" comment="NDP Decision Method Control"/>
+ <register addr="50040470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I0" comment="Config for PAPR module"/>
+ <register addr="50040474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I0" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50040478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I0" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5004047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I0" comment="SWED PAPR Configuration"/>
+ <register addr="50040480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I0" comment="Configuration for direction finder"/>
+ <register addr="50040484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I0" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50040488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I0" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5004048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I0" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50040490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I0" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50040494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I0" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50040498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I0" comment="EVM Sig. EN"/>
+ <register addr="5004049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I0" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bba_1" comment="">
+ <register addr="50050000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I1" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50050004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I1" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50050008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I1" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5005000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I1" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50050010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I1" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50050014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I1" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50050018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I1" comment="Packet transmit options."/>
+ <register addr="5005001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I1" comment="Signal field."/>
+ <register addr="50050020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I1" comment="Scan accelerator configuration."/>
+ <register addr="50050024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I1" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50050028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I1" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5005002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I1" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50050030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I1" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50050034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I1" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50050038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I1" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5005003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I1" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50050040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I1" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50050044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I1" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50050048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I1" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5005004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I1" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50050050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I1" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50050054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I1" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50050058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I1" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5005005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I1" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50050060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I1" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50050064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I1" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50050068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I1" comment="Receiver configuration"/>
+ <register addr="5005006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I1" comment="Receiver configuration"/>
+ <register addr="50050070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I1" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50050074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I1" comment="Receiver configuration"/>
+ <register addr="50050078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I1" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5005007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I1" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50050080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I1" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50050084" rw_flags="R" width="1" name="BB_STATUS_I1" comment=""/>
+ <register addr="50050088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I1" comment="Frequency offset for the last received burst"/>
+ <register addr="5005008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I1" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50050090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I1" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50050094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I1" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50050098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5005009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500500a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I1" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500500ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I1" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500500b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I1" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500500b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I1" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500500b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I1" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500500bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I1" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500500c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I1" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500500c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I1" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500500c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I1" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500500cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I1" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500500d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I1" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500500d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I1" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500500d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I1" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500500dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I1" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500500e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I1" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500500e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I1" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500500e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I1" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500500ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I1" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500500f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I1" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500500f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I1" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500500f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I1" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500500fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I1" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50050100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I1" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50050104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I1" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50050108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I1" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5005010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I1" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50050110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I1" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50050114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I1" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50050118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I1" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5005011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I1" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50050120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I1" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50050124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I1" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50050128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I1" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5005012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I1" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50050130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I1" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50050134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I1" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50050138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I1" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5005013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I1" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50050140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I1" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50050144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I1" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50050148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I1" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5005014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I1" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50050150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I1" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50050154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I1" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50050158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I1" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5005015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I1" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50050160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I1" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50050164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I1" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50050168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I1" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5005016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I1" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50050170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I1" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50050174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I1" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50050178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I1" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5005017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I1" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50050180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I1" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50050184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I1" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50050188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I1" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5005018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I1" comment="When set, apply Radio nudge again"/>
+ <register addr="50050190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I1" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50050194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I1" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50050198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I1" comment="Select the set of signals output at the debug port"/>
+ <register addr="5005019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I1" comment=""/>
+ <register addr="500501a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I1" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500501a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I1" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500501a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I1" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500501ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I1" comment="synchronizer configuration"/>
+ <register addr="500501b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I1" comment="synchronizer configuration"/>
+ <register addr="500501b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I1" comment="synchronizer configuration"/>
+ <register addr="500501b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I1" comment="synchronizer configuration"/>
+ <register addr="500501bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I1" comment="synchronizer configuration "/>
+ <register addr="500501c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I1" comment="synchronizer configuration "/>
+ <register addr="500501c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I1" comment="synchronizer configuration "/>
+ <register addr="500501c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I1" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500501cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I1" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500501d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I1" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500501d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I1" comment="synchronizer configuration "/>
+ <register addr="500501d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I1" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500501dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I1" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500501e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I1" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500501e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I1" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500501e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I1" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500501ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I1" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500501f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I1" comment=" 80MHz sync split filter"/>
+ <register addr="500501f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I1" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500501f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I1" comment="STF sync detector configuration"/>
+ <register addr="500501fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I1" comment="STF sync configuration with spare bits"/>
+ <register addr="50050200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I1" comment="Tone notch configuration"/>
+ <register addr="50050204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I1" comment="Tone notch configuration"/>
+ <register addr="50050208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I1" comment="Tone notch configuration"/>
+ <register addr="5005020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I1" comment="Tone notch configuration"/>
+ <register addr="50050210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I1" comment="STF group weight factor"/>
+ <register addr="50050214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I1" comment="STF group weight factor"/>
+ <register addr="50050218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I1" comment="CCA weighted combing sel"/>
+ <register addr="5005021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I1" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50050220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I1" comment="LTF Peak selection control"/>
+ <register addr="50050224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I1" comment="LTF peak threshold(for index7)"/>
+ <register addr="50050228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I1" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5005022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I1" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50050230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I1" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50050234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I1" comment="Beamformee CBR Length."/>
+ <register addr="50050238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I1" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5005023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I1" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50050240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I1" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50050244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I1" comment="Configuration for handling data for calibration"/>
+ <register addr="50050248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I1" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5005024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I1" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50050250" rw_flags="R" width="2" name="BB_CEST_MAX_I1" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50050254" rw_flags="R" width="1" name="BB_CEST_STATUS_I1" comment="Status information for calibration support"/>
+ <register addr="50050258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I1" comment="Channel estimate value requested"/>
+ <register addr="5005025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I1" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50050260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I1" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50050264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I1" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50050268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I1" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5005026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I1" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50050270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I1" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50050274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I1" comment="Unused register"/>
+ <register addr="50050278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I1" comment="Unused register"/>
+ <register addr="5005027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I1" comment="Unused register"/>
+ <register addr="50050280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I1" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50050284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I1" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50050288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I1" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5005028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I1" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50050290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I1" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50050294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I1" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50050298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I1" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5005029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I1" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500502a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I1" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500502a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I1" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500502a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I1" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500502ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I1" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500502b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I1" comment="QAM1024 Support Enable"/>
+ <register addr="500502b4" rw_flags="RW" width="2" name="BB_CHDET_I1" comment="Channel Type Detection"/>
+ <register addr="500502b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I1" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500502bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I1" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500502c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I1" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500502c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I1" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500502c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I1" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500502cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I1" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500502d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I1" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500502d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I1" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500502d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I1" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500502dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I1" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500502e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I1" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500502e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I1" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500502e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I1" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500502ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I1" comment="Payload Detector enables."/>
+ <register addr="500502f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I1" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I1" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I1" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500502fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I1" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I1" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I1" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I1" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5005030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I1" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50050310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I1" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50050314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I1" comment="MLD Configuration registers"/>
+ <register addr="50050318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I1" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5005031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I1" comment="TX beamforming configuration."/>
+ <register addr="50050320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I1" comment="TX beamforming configuration #2."/>
+ <register addr="50050324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I1" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50050328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I1" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5005032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I1" comment="This register is used to read the angle store data."/>
+ <register addr="50050330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I1" comment="This register is used to control smoothing"/>
+ <register addr="50050334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I1" comment="LDPC configuration"/>
+ <register addr="50050338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I1" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5005033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I1" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50050340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I1" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50050344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I1" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50050348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I1" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5005034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I1" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50050350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I1" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50050354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I1" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50050358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I1" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5005035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I1" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50050360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I1" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50050364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I1" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50050368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I1" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5005036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I1" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50050370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I1" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50050374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I1" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50050378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I1" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5005037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I1[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I1[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I1[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I1[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I1[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500503fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50050408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I1[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5005040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I1" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50050410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I1" comment="Linear phase estimation configuration"/>
+ <register addr="50050414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I1" comment="BB DD CPE configuration"/>
+ <register addr="50050418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I1" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5005041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I1" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50050420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50050424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50050428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I1" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5005042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I1" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50050438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5005043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50050440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I1" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50050444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I1" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50050448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I1" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5005044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I1" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50050450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I1" comment="Misc Internal signal status"/>
+ <register addr="50050454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I1" comment="Membership status array"/>
+ <register addr="50050458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I1" comment="Membership status array"/>
+ <register addr="5005045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I1" comment="User Position Array 2 bits"/>
+ <register addr="50050468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I1" comment="User Position Array 2 bits"/>
+ <register addr="5005046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I1" comment="NDP Decision Method Control"/>
+ <register addr="50050470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I1" comment="Config for PAPR module"/>
+ <register addr="50050474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I1" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50050478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I1" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5005047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I1" comment="SWED PAPR Configuration"/>
+ <register addr="50050480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I1" comment="Configuration for direction finder"/>
+ <register addr="50050484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I1" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50050488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I1" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5005048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I1" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50050490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I1" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50050494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I1" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50050498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I1" comment="EVM Sig. EN"/>
+ <register addr="5005049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I1" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bba_2" comment="">
+ <register addr="50060000" rw_flags="RW" width="2" name="BB_LEG_DUP_DET_CONFIG_I2" comment="Contains parameters used for Non-HT Duplicate detection for 40MHz mode."/>
+ <register addr="50060004" rw_flags="R" width="2" name="BB_TX_PACK_START_STATUS_I2" comment="The start time of the OFDM transmit packet, relative to the hardware timer, in units of 400 ns. For packets having a preamble, this points to the beginning of that preamble."/>
+ <register addr="50060008" rw_flags="RW" width="1" name="BB_TX_PACK_TYPE_I2" comment="Packet type : should be set to TYPE_80211A for 11a/n. See definition of BB_PACK_TYPE for value."/>
+ <register addr="5006000c" rw_flags="RW" width="1" name="BB_TX_PREAMB_TYPE_I2" comment="Packet preamble type : should be set to PRE_80211A for 11a/n. See definition of BB_PREAMBLE_TYPE for value."/>
+ <register addr="50060010" rw_flags="R" width="2" name="BB_TX_PACK_RATE_STATUS_I2" comment="Packet type, rate and channel bandwidth."/>
+ <register addr="50060014" rw_flags="R" width="1" name="BB_TX_PACK_RATE_EXT_STATUS_I2" comment="extend bits of BB_TX_PACK_RATE_STATUS for 11ac."/>
+ <register addr="50060018" rw_flags="R" width="2" name="BB_TX_PACK_OPTIONS_STATUS_I2" comment="Packet transmit options."/>
+ <register addr="5006001c" rw_flags="R" width="2" name="BB_TX_SIGNAL_FIELD_STATUS_I2" comment="Signal field."/>
+ <register addr="50060020" rw_flags="R" width="2" name="BB_TX_PACK_SCAN_CONFIG_STATUS_I2" comment="Scan accelerator configuration."/>
+ <register addr="50060024" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_1_STATUS_I2" comment="For Hiperlan2: The number of OFDM symbols in the first data part of the packet. For 802.11a: bit 0 is bit 10 of N_data, where N_data is the number of OFDM symbols in the 'Data' part of the burst. Bits [8:1] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n non-STBC: bits [10:0] contain the number of bits transmitted in the last OFDM symbol, including the 6 tail bits. For 802.11n STBC: bits [10:0] contain the number of bits transmitted in the last pair of OFDM symbols, including the 6 tail bits."/>
+ <register addr="50060028" rw_flags="R" width="2" name="BB_TX_PACK_PLEN_2_STATUS_I2" comment="For Hiperlan 2: The number of OFDM symbols in the second data part of the packet. For 802.11a: Bits [9:0] contain bits [9:0] of N_data. For 802.11n: Bits [14:0] contain [bits [14:0] of] N_data. Bit 15 indicates LDPC Extra OFDM symbol."/>
+ <register addr="5006002c" rw_flags="RW" width="1" name="BB_TX_PACK_P1_START_I2" comment="Bit 0 is one if the first data part of the packet has P1 puncturing, else is zero. Bit 1 is one if the second data part of the packet has P1 puncturing, else is zero. 11a/n does not use P1 puncturing."/>
+ <register addr="50060030" rw_flags="RW" width="1" name="BB_TX_PACK_CRC_TYPE_I2" comment="Bit 0 indicates the CRC type for the first data part of the burst (0 = CRC16, 1 = CRC24). Bit 1 indicates the CRC type for the second data part of the burst"/>
+ <register addr="50060034" rw_flags="R" width="2" name="BB_TX_PACK_CRC_PERIOD_STATUS_I2" comment="For Hiperlan2: The CRC period i.e. the number of bytes over which the CRC is computed within each of the data parts of the packet. Bits [5:0] are the CRC period for the first data part of the packet, bits [11:6] are the CRC period for the second part. For 802.11a and 802.11n: The number of bytes of the payload, including the four CRC32 bytes."/>
+ <register addr="50060038" rw_flags="RW" width="2" name="BB_TX_PACK_CRC_N_PERIODS_I2" comment="The number of CRC periods in each part of the packet. Bits [7:0] - the number of CRC periods in the first part of the packet. Bits [15:8] - the number of CRC periods in the second part of the packet."/>
+ <register addr="5006003c" rw_flags="RW" width="1" name="BB_TX_WARMUP_I2" comment="The TX warmup time, in units of 400 ns."/>
+ <register addr="50060040" rw_flags="RW" width="1" name="BB_TX_INT_MASK_I2" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50060044" rw_flags="R" width="1" name="BB_TX_INT_CAUSE_I2" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50060048" rw_flags="RW" width="1" name="BB_TX_INT_CLEAR_I2" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5006004c" rw_flags="RW" width="1" name="BB_TX_TIMING_I2" comment="Tx timing adjust control to allow correction for TX latency"/>
+ <register addr="50060050" rw_flags="RW" width="1" name="BB_RX_INT_MASK_I2" comment="Interrupt mask register. Setting a bit in this register against an interrupt cause bit position, ensures that it generates an interrupt."/>
+ <register addr="50060054" rw_flags="R" width="1" name="BB_RX_INT_CAUSE_I2" comment="Interrupt cause register. Read by the host to determine why it was interrupted."/>
+ <register addr="50060058" rw_flags="RW" width="1" name="BB_RX_INT_CLEAR_I2" comment="Interrupt clear register. Writing a one to an interrupt cause bit position clears the associated bit in the BB_**_INT_CAUSE register."/>
+ <register addr="5006005c" rw_flags="R" width="1" name="BB_TX_PACK_QUEUE_I2" comment="The number of packets queued for TX by the host and not yet completed."/>
+ <register addr="50060060" rw_flags="R" width="1" name="BB_RX_PACK_QUEUE_I2" comment="The number of packets queued for RX by the host and not yet completed."/>
+ <register addr="50060064" rw_flags="RW" width="1" name="BB_TX_SCRAMBLER_SEED_I2" comment="Scrambler seed for transmitted bursts. If this register is set to zero, then a pseudo-random scrambler seed is automatically generated for every transmit burst. If this register is set to a non-zero value, then that value is used as the scrambler seed for transmitted bursts."/>
+ <register addr="50060068" rw_flags="RW" width="4" name="BB_RX_CONFIG_I2" comment="Receiver configuration"/>
+ <register addr="5006006c" rw_flags="RW" width="2" name="BB_RX_CONFIG2_I2" comment="Receiver configuration"/>
+ <register addr="50060070" rw_flags="RW" width="1" name="BB_SIGB_SEGPARS_I2" comment="Enable VHTSIGB Segment parsing and deparsing in Transmitter and Receiver"/>
+ <register addr="50060074" rw_flags="RW" width="1" name="BB_RX_CONFIG3_I2" comment="Receiver configuration"/>
+ <register addr="50060078" rw_flags="RW" width="1" name="BB_RX_PLL_COEFFS_I2" comment="Frequency tracking PLL coefficients"/>
+ <register addr="5006007c" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_A_I2" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50060080" rw_flags="RW" width="2" name="BB_RX_DEMAP_METRIC_B_I2" comment="Demapper soft-decision metric as used by the Viterbi decoder"/>
+ <register addr="50060084" rw_flags="R" width="1" name="BB_STATUS_I2" comment=""/>
+ <register addr="50060088" rw_flags="R" width="2" name="BB_FREQ_OFFSET_I2" comment="Frequency offset for the last received burst"/>
+ <register addr="5006008c" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_I2" comment="Bits 15:8 - The estimated EVM for the receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the receive channel"/>
+ <register addr="50060090" rw_flags="R" width="2" name="BB_SIGNAL_QUALITY_DUAL_I2" comment="Bits 15:8 - The estimated EVM for the dual receive channel. Bits 7:0 - The estimated SNR, based on the burst preamble, for the dual receive channel"/>
+ <register addr="50060094" rw_flags="RW" width="1" name="BB_BBA_FREQ_OFFSET_MASK_CONFIG_I2" comment="Reduce the reliability of soft decsions on inner carriers (+/-1, +/-2) when estimated frequency offset exceeds certain thresholds OR permanently reduce the reliability on inner carriers regardless of frequency offset."/>
+ <register addr="50060098" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_20M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="5006009c" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_20M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 20/40MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600a0" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_10M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500600a4" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_10M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 10MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600a8" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_MA_SC_5M_I2" comment="Reduce the reliability of soft decision on the most affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to -1 -2 and -3"/>
+ <register addr="500600ac" rw_flags="RW" width="2" name="BB_BBA_FREQ_OFFSET_MASK_CFG_LA_SC_5M_I2" comment="Reduce the reliability of soft decision on the less affected subcarriers for 5MHz bandwidth(1 2 3 or -1 -2 -3, when offset frequency is positive,, it corresponds to 1 2 and 3"/>
+ <register addr="500600b0" rw_flags="RW" width="2" name="BB_CTRACK_UNREL_I2" comment="Thresholds to define which values of soft bits should disable channel tracking. When below ABS_THRESH on any valid soft bit, channel tracking is disabled for that subcarrier"/>
+ <register addr="500600b4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_20M_40M_I2" comment="the high threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 122 KHz/20 MHz * 2^16"/>
+ <register addr="500600b8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_20M_40M_I2" comment="the low threshold value for frequency offset in soft weigh for 20/40MHz bandwidth, it is derived by 50 KHz/20 MHz * 2^16"/>
+ <register addr="500600bc" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_10M_I2" comment="the high threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 84 KHz/10 MHz * 2^16"/>
+ <register addr="500600c0" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_10M_I2" comment="the low threshold value for frequency offset in soft weigh for 10MHz bandwidth, it is derived by 14 KHz/10 MHz * 2^16"/>
+ <register addr="500600c4" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_HIGH_THRESH_5M_I2" comment="the high threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 75 KHz/5 MHz * 2^16"/>
+ <register addr="500600c8" rw_flags="RW" width="2" name="BB_SOFT_WEIGH_FREQ_OFFSET_LOW_THRESH_5M_I2" comment="the low threshold value for frequency offset in soft weigh for 5MHz bandwidth, it is derived by 31KHz/5 MHz * 2^16"/>
+ <register addr="500600cc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_AWGN_I2" comment="DEMAP SISO BCC AWGN QFAC configuration"/>
+ <register addr="500600d0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_AWGN_I2" comment="MLD MIMO BCC AWGN QFAC configuration"/>
+ <register addr="500600d4" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_BCC_FADING_I2" comment="DEMAP SISO BCC FADING QFAC configuration"/>
+ <register addr="500600d8" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS7_I2" comment="DEMAP SISO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="500600dc" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS8_I2" comment="DEMAP SISO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="500600e0" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_BCC_FADING_MCS9_I2" comment="DEMAP SISO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="500600e4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS0_I2" comment="DEMAP MIMO BCC FADING MCS0 QFAC configuration"/>
+ <register addr="500600e8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS1_I2" comment="DEMAP MIMO BCC FADING MCS1 QFAC configuration"/>
+ <register addr="500600ec" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS2_I2" comment="DEMAP MIMO BCC FADING MCS2 QFAC configuration"/>
+ <register addr="500600f0" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS3_I2" comment="DEMAP MIMO BCC FADING MCS3 QFAC configuration"/>
+ <register addr="500600f4" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS4_I2" comment="DEMAP MIMO BCC FADING MCS4 QFAC configuration"/>
+ <register addr="500600f8" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS5_I2" comment="DEMAP MIMO BCC FADING MCS5 QFAC configuration"/>
+ <register addr="500600fc" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS6_I2" comment="DEMAP MIMO BCC FADING MCS6 QFAC configuration"/>
+ <register addr="50060100" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS7_I2" comment="DEMAP MIMO BCC FADING MCS7 QFAC configuration"/>
+ <register addr="50060104" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS8_I2" comment="DEMAP MIMO BCC FADING MCS8 QFAC configuration"/>
+ <register addr="50060108" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_BCC_FADING_MCS9_I2" comment="DEMAP MIMO BCC FADING MCS9 QFAC configuration"/>
+ <register addr="5006010c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_SISO_LDPC_AWGN_I2" comment="DEMAP SISO LDPC AWGN QFAC configuration"/>
+ <register addr="50060110" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_AWGN_I2" comment="MLD MIMO LDPC AWGN QFAC configuration"/>
+ <register addr="50060114" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS0_I2" comment="DEMAP SISO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50060118" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS1_I2" comment="DEMAP SISO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5006011c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS2_I2" comment="DEMAP SISO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50060120" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS3_I2" comment="DEMAP SISO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50060124" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS4_I2" comment="DEMAP SISO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50060128" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS5_I2" comment="DEMAP SISO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5006012c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS6_I2" comment="DEMAP SISO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50060130" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS7_I2" comment="DEMAP SISO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50060134" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS8_I2" comment="DEMAP SISO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50060138" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS9_I2" comment="DEMAP SISO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5006013c" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS10_I2" comment="DEMAP SISO LDPC FADING MCS10 QFAC configuration"/>
+ <register addr="50060140" rw_flags="RW" width="2" name="BB_DEMAP_QFAC_SISO_LDPC_FADING_MCS11_I2" comment="DEMAP SISO LDPC FADING MCS11 QFAC configuration"/>
+ <register addr="50060144" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS0_I2" comment="DEMAP MIMO LDPC FADING MCS0 QFAC configuration"/>
+ <register addr="50060148" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS1_I2" comment="DEMAP MIMO LDPC FADING MCS1 QFAC configuration"/>
+ <register addr="5006014c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS2_I2" comment="DEMAP MIMO LDPC FADING MCS2 QFAC configuration"/>
+ <register addr="50060150" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS3_I2" comment="DEMAP MIMO LDPC FADING MCS3 QFAC configuration"/>
+ <register addr="50060154" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS4_I2" comment="DEMAP MIMO LDPC FADING MCS4 QFAC configuration"/>
+ <register addr="50060158" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS5_I2" comment="DEMAP MIMO LDPC FADING MCS5 QFAC configuration"/>
+ <register addr="5006015c" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS6_I2" comment="DEMAP MIMO LDPC FADING MCS6 QFAC configuration"/>
+ <register addr="50060160" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS7_I2" comment="DEMAP MIMO LDPC FADING MCS7 QFAC configuration"/>
+ <register addr="50060164" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS8_I2" comment="DEMAP MIMO LDPC FADING MCS8 QFAC configuration"/>
+ <register addr="50060168" rw_flags="RW" width="4" name="BB_MLD_QFAC_MIMO_LDPC_FADING_MCS9_I2" comment="DEMAP MIMO LDPC FADING MCS9 QFAC configuration"/>
+ <register addr="5006016c" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_AWGN_I2" comment="DEMAP STBC BCC AWGN QFAC configuration"/>
+ <register addr="50060170" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_BCC_FADING_I2" comment="DEMAP STBC BCC FADING QFAC configuration"/>
+ <register addr="50060174" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_AWGN_I2" comment="DEMAP STBC LDPC AWGN QFAC configuration"/>
+ <register addr="50060178" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_STBC_LDPC_FADING_I2" comment="DEMAP STBC LDPC FADING QFAC configuration"/>
+ <register addr="5006017c" rw_flags="RW" width="2" name="BB_DEMAP_LLR_DOWN_I2" comment="DEMAP LLR DOWN configuration"/>
+ <register addr="50060180" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_AWGN_I2" comment="DEMAP BEAMFORM LDPC AWGN QFAC configuration"/>
+ <register addr="50060184" rw_flags="RW" width="4" name="BB_DEMAP_QFAC_BF_LDPC_FADING_I2" comment="DEMAP BEAMFORM LDPC FADING QFAC configuration"/>
+ <register addr="50060188" rw_flags="RW" width="2" name="BB_DEMAP_NOISE_VARIANCE_I2" comment="DEMAP NOISE VARIANCE Forcing"/>
+ <register addr="5006018c" rw_flags="RW" width="1" name="BB_DEMAP_NUDGE_GAIN_ADAPT_I2" comment="When set, apply Radio nudge again"/>
+ <register addr="50060190" rw_flags="RW" width="2" name="BB_PILOT_PHASE_LIMIT_I2" comment="Limit the absolute pilot angle correction. This is an 11-bit unsigned number in RTL phase format (max value 1024). RTL phase format = (angle in deg / 180) * 1024. (Default = 0.4 radians)"/>
+ <register addr="50060194" rw_flags="RW" width="1" name="BB_SAMP_OFFSET_I2" comment="Sampling offset. Data symbols are sampled at a position -BB_SAMP_OFFSET with respect to the beginning of the data part of the symbol."/>
+ <register addr="50060198" rw_flags="RW" width="2" name="BB_DEBUG_SELECT_I2" comment="Select the set of signals output at the debug port"/>
+ <register addr="5006019c" rw_flags="RW" width="2" name="BB_RX_MISC_CONFIG_I2" comment=""/>
+ <register addr="500601a0" rw_flags="RW" width="2" name="BB_MIMO_RATE_MASK_I2" comment="Control rejection of HT and VHT 40MHz packets with certain MIMO rates"/>
+ <register addr="500601a4" rw_flags="RW" width="2" name="BB_VHT_SS1_RATE_MASK_I2" comment="Control rejection of VHT 80MHz single spatial stream (or STBC) packets with certain rates"/>
+ <register addr="500601a8" rw_flags="RW" width="2" name="BB_VHT_SS2_RATE_MASK_I2" comment="Control rejection of VHT two spatial stream packets with certain rates"/>
+ <register addr="500601ac" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG1_I2" comment="synchronizer configuration"/>
+ <register addr="500601b0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG2_I2" comment="synchronizer configuration"/>
+ <register addr="500601b4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG3_I2" comment="synchronizer configuration"/>
+ <register addr="500601b8" rw_flags="RW" width="1" name="BB_RX_SYNC_CONFIG4_I2" comment="synchronizer configuration"/>
+ <register addr="500601bc" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG5_I2" comment="synchronizer configuration "/>
+ <register addr="500601c0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG6_I2" comment="synchronizer configuration "/>
+ <register addr="500601c4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG7_I2" comment="synchronizer configuration "/>
+ <register addr="500601c8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG8_I2" comment="Lower limit on quantization to avoid excessive AGC action "/>
+ <register addr="500601cc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG9_I2" comment="High limit on quantization to avoid excessive AGC action"/>
+ <register addr="500601d0" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG10_I2" comment="Number of samples to advance the start the LTF search window"/>
+ <register addr="500601d4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG11_I2" comment="synchronizer configuration "/>
+ <register addr="500601d8" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG12_I2" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500601dc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG13_I2" comment="synchronizer configuration for new new STBC sync "/>
+ <register addr="500601e0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG14_I2" comment="LTF lock limited by distance from max peak "/>
+ <register addr="500601e4" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG15_I2" comment="Threshold for comparing the combined STF correlation"/>
+ <register addr="500601e8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG16_I2" comment=" Threshold for comparing the combined STF correlation"/>
+ <register addr="500601ec" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG17_I2" comment=" First and second 40MHz sync split filter"/>
+ <register addr="500601f0" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG18_I2" comment=" 80MHz sync split filter"/>
+ <register addr="500601f4" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG19_I2" comment="Configuration for detection logic for CCA primary and secondary"/>
+ <register addr="500601f8" rw_flags="RW" width="4" name="BB_RX_SYNC_CONFIG20_I2" comment="STF sync detector configuration"/>
+ <register addr="500601fc" rw_flags="RW" width="2" name="BB_RX_SYNC_CONFIG21_I2" comment="STF sync configuration with spare bits"/>
+ <register addr="50060200" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH1_I2" comment="Tone notch configuration"/>
+ <register addr="50060204" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH2_I2" comment="Tone notch configuration"/>
+ <register addr="50060208" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH3_I2" comment="Tone notch configuration"/>
+ <register addr="5006020c" rw_flags="RW" width="4" name="BB_RX_SYNC_NOTCH4_I2" comment="Tone notch configuration"/>
+ <register addr="50060210" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG0_I2" comment="STF group weight factor"/>
+ <register addr="50060214" rw_flags="RW" width="4" name="BB_SYNC_STF_WEIGHT_CFG1_I2" comment="STF group weight factor"/>
+ <register addr="50060218" rw_flags="RW" width="1" name="BB_SYNC_CCA_WEIGHT_SEL_I2" comment="CCA weighted combing sel"/>
+ <register addr="5006021c" rw_flags="RW" width="1" name="BB_SYNC_LTF_WEIGHT_COMBINE_MODE_I2" comment="LTF MF weighted combine mode 0: no weight, 1:Bc0+0.75xBc0, 2:Bc0+0.625Bc0, 3:Bc0+0.5Bc0"/>
+ <register addr="50060220" rw_flags="RW" width="1" name="BB_SYNC_LTF_MODE_I2" comment="LTF Peak selection control"/>
+ <register addr="50060224" rw_flags="RW" width="1" name="BB_SYNC_LTF_THR2_I2" comment="LTF peak threshold(for index7)"/>
+ <register addr="50060228" rw_flags="RW" width="1" name="BB_RX_SYNC_CCA_CFG_I2" comment="Configure to take into account the CCA of each 20M subband for the primary channel"/>
+ <register addr="5006022c" rw_flags="RW" width="1" name="BB_BFEE_FDBK_DSNR_EXPR_I2" comment="Beemforming feedback deltan snr expr control"/>
+ <register addr="50060230" rw_flags="RW" width="1" name="BB_BFEE_MU_CBR_I2" comment="Indication of MU/SU CBR, 0:SU, 1:MU"/>
+ <register addr="50060234" rw_flags="R" width="2" name="BB_BFEE_CBR_LENGTH_I2" comment="Beamformee CBR Length."/>
+ <register addr="50060238" rw_flags="R" width="2" name="BB_CEST_RE_DATA_I2" comment="Real part of data for calibration channel estimation"/>
+ <register addr="5006023c" rw_flags="R" width="2" name="BB_CEST_IM_DATA_I2" comment="Imaginary part of data for calibration channel estimation"/>
+ <register addr="50060240" rw_flags="R" width="1" name="BB_CEST_LTF_OFFSET_I2" comment="20 MHz Sample offset for values read from BB_CEST_ADDR[8:6]=='000' for an 11a or green-field packet. Value is in 2's complement. Negative values indicate that the LTF sync is earlier than the position indicated by the STF sync."/>
+ <register addr="50060244" rw_flags="RW" width="4" name="BB_CEST_CONFIG_I2" comment="Configuration for handling data for calibration"/>
+ <register addr="50060248" rw_flags="RW" width="2" name="BB_CEST_STS_MULT_I2" comment="Data needed for Space-Time-Stream combination (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="5006024c" rw_flags="RW" width="2" name="BB_CEST_STS_PHASE_I2" comment="Phase rotation for Space-Time-Stream channel estimate (needed for BB_CEST_CONFIG_MODE='10')"/>
+ <register addr="50060250" rw_flags="R" width="2" name="BB_CEST_MAX_I2" comment="Maximum channel estimate value across all Space-Time-Streams (needed to normalise the channel estimates sent for calibration purposes)"/>
+ <register addr="50060254" rw_flags="R" width="1" name="BB_CEST_STATUS_I2" comment="Status information for calibration support"/>
+ <register addr="50060258" rw_flags="RW" width="2" name="BB_CEST_ADDR_I2" comment="Channel estimate value requested"/>
+ <register addr="5006025c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD1_I2" comment="SNR Threshold 1 channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 1, then filter option 0 is used in channel smoothing."/>
+ <register addr="50060260" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD2_I2" comment="SNR Threshold 2 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 5, then filter option 4 is used in channel smoothing. If below, filter option 5 is used."/>
+ <register addr="50060264" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD3_I2" comment="SNR Threshold 3 for channel smoothing. To program value, multiply desired SNR (in dB) by 4.If signal SNR is above threshold 2, then filter option 1 is used in channel smoothing."/>
+ <register addr="50060268" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD4_I2" comment="SNR Threshold 4 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 3, then filter option 2 is used in channel smoothing."/>
+ <register addr="5006026c" rw_flags="RW" width="2" name="BB_CEST_SMOOTH_SNR_THRESHOLD5_I2" comment="SNR Threshold 5 for channel smoothing. To program value, multiply desired SNR (in dB) by 4. If signal SNR is above threshold 4, then filter option 3 is used in channel smoothing."/>
+ <register addr="50060270" rw_flags="RW" width="2" name="BB_MRC_CONFIG_BASIC_I2" comment="Control register to configure OFDM Maximum Ratio Combining and Basic MRC block"/>
+ <register addr="50060274" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STBC_I2" comment="Unused register"/>
+ <register addr="50060278" rw_flags="RW" width="2" name="BB_MRC_CONFIG_STREAM2_I2" comment="Unused register"/>
+ <register addr="5006027c" rw_flags="RW" width="2" name="BB_MRC_CONFIG_FINAL_I2" comment="Unused register"/>
+ <register addr="50060280" rw_flags="RW" width="1" name="BB_MRC_NONCONT_BANDS_I2" comment="Control register to whether MRC non contiguous bands or not."/>
+ <register addr="50060284" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ADDRESS_I2" comment="This register is used for the first step of a two stage process to reduce reliability of individual subcarriers. First this register is set to a subcarrier range, and then BB_SC_SOFT_WEIGH_ENABLE is used to select which sub-carrier is being targetted within this range"/>
+ <register addr="50060288" rw_flags="RW" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_I2" comment="Each bit can enable reduced reliability if set. The sub-carrier affected by each bit is BB_SC_SOFT_WEIGH_ADDRESS+bit_index. e.g. with BB_SC_SOFT_WEIGH_ADDRESS=-16, bit 0 targets sub-carrier -16, bit 1 targets -15 etc."/>
+ <register addr="5006028c" rw_flags="R" width="2" name="BB_SC_SOFT_WEIGH_ENABLE_STATUS_I2" comment="Internal values of BB_SC_SOFT_WEIGH_ENABLE can be read by selecting the range using BB_SC_SOFT_WEIGH_ADDRESS and then reading this register. N.B. Sub-carriers that cannot be valid are returned as 0"/>
+ <register addr="50060290" rw_flags="RW" width="2" name="BB_DD_CPE_CONFIG_I2" comment="Configuration for the Data Directed Common Phase Error calculation"/>
+ <register addr="50060294" rw_flags="RW" width="1" name="BB_DD_CPE_CONFIG2_I2" comment="Configuration 2 for the Data Directed Common Phase Error calculation"/>
+ <register addr="50060298" rw_flags="RW" width="2" name="BB_PTW70_CONFIG_I2" comment="Setup to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="5006029c" rw_flags="RW" width="2" name="BB_PTW70_CONFIG2_I2" comment="Setup 2 to allow detection and control relating to packets with strong phase wobble such as those from PTW70 test equipment"/>
+ <register addr="500602a0" rw_flags="RW" width="1" name="BB_RX_RADIO_CS_CONFIG_I2" comment="RX Radio CS detection configuration for 80MHz bandwidth"/>
+ <register addr="500602a4" rw_flags="RW" width="4" name="BB_RX_ENERGY_DET_THRESHOLD_I2" comment="RX energy detection threshold for primary and secondary 20MHz channel"/>
+ <register addr="500602a8" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_I2" comment="Min-Sum algorithm offset for LDPC decoder for AWGN and FADING"/>
+ <register addr="500602ac" rw_flags="RW" width="4" name="BB_LDPC_OFFSET_1024QAM_I2" comment="Min-Sum algorithm offset for LDPC decoder for 1024QAM"/>
+ <register addr="500602b0" rw_flags="RW" width="4" name="BB_QAM1024_ENABLE_I2" comment="QAM1024 Support Enable"/>
+ <register addr="500602b4" rw_flags="RW" width="2" name="BB_CHDET_I2" comment="Channel Type Detection"/>
+ <register addr="500602b8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_SISO_I2" comment="Channel Type Detection Zero Threshold for SISO Case"/>
+ <register addr="500602bc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_SISO_I2" comment="Channel Type Detection Low Threshold for SISO Case"/>
+ <register addr="500602c0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_SISO_I2" comment="Channel Type Detection Mid Threshold for SISO Case"/>
+ <register addr="500602c4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_SISO_I2" comment="Channel Type Detection High Threshold for SISO Case"/>
+ <register addr="500602c8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_STBC_I2" comment="Channel Type Detection Zero Threshold for STBC Case"/>
+ <register addr="500602cc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_STBC_I2" comment="Channel Type Detection Low Threshold for STBC Case"/>
+ <register addr="500602d0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_STBC_I2" comment="Channel Type Detection Mid Threshold for STBC Case"/>
+ <register addr="500602d4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_STBC_I2" comment="Channel Type Detection High Threshold for STBC Case"/>
+ <register addr="500602d8" rw_flags="RW" width="4" name="BB_CHDET_ZERO_THRESHOLD_BF_I2" comment="Channel Type Detection Zero Threshold for BF Case"/>
+ <register addr="500602dc" rw_flags="RW" width="4" name="BB_CHDET_LOW_THRESHOLD_BF_I2" comment="Channel Type Detection Low Threshold for BF Case"/>
+ <register addr="500602e0" rw_flags="RW" width="4" name="BB_CHDET_MID_THRESHOLD_BF_I2" comment="Channel Type Detection Mid Threshold for BF Case"/>
+ <register addr="500602e4" rw_flags="RW" width="4" name="BB_CHDET_HIGH_THRESHOLD_BF_I2" comment="Channel Type Detection High Threshold for BF Case"/>
+ <register addr="500602e8" rw_flags="RW" width="2" name="BB_RX_PAYLOAD_DET_THRESHOLD_I2" comment="RX payload detection threshold for all subbands"/>
+ <register addr="500602ec" rw_flags="RW" width="1" name="BB_RX_PAYLOAD_DET_CONFIG_I2" comment="Payload Detector enables."/>
+ <register addr="500602f0" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG1_I2" comment="First configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602f4" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG2_I2" comment="Second configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602f8" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG3_I2" comment="Third configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="500602fc" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_NGI_CONFIG4_I2" comment="Fourth configuration register for the normal guard interval (NGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060300" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG1_I2" comment="First configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060304" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG2_I2" comment="Second configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060308" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG3_I2" comment="Third configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="5006030c" rw_flags="RW" width="2" name="BB_RX_OFDM_DET_SGI_CONFIG4_I2" comment="Fourth configuration register for the short guard interval (SGI) correlator within the OFDM Payload Detector."/>
+ <register addr="50060310" rw_flags="RW" width="1" name="BB_BBA_CCA_CFG_I2" comment="CCA ignore control on the primary channel, secondary channel, secondary 40 channel and secondary 80 channel."/>
+ <register addr="50060314" rw_flags="RW" width="1" name="BB_MLD_CONFIG_I2" comment="MLD Configuration registers"/>
+ <register addr="50060318" rw_flags="R" width="2" name="BB_BBA_DEBUG_I2" comment="Read access to BBA debug information. To see this data correctly, the enable bit BB_DEBUG_SELECT.BB_DEBUG_SELECT_EN must be set, to enable the register supplying this information."/>
+ <register addr="5006031c" rw_flags="RW" width="2" name="BB_BBA_BF_TX_CONFIG_I2" comment="TX beamforming configuration."/>
+ <register addr="50060320" rw_flags="RW" width="4" name="BB_BBA_BF_TX_KEYHOLE_I2" comment="TX beamforming configuration #2."/>
+ <register addr="50060324" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS1_I2" comment="Tx beamformer CBR category fields parsed."/>
+ <register addr="50060328" rw_flags="R" width="4" name="BB_BBA_BF_TX_STATUS2_I2" comment="Tx beamformer fields parsed and DMA collision counter."/>
+ <register addr="5006032c" rw_flags="R" width="4" name="BB_BBA_BF_TX_ANGLE_STORE_KEYHOLE_DATA_STATUS_I2" comment="This register is used to read the angle store data."/>
+ <register addr="50060330" rw_flags="RW" width="4" name="BB_CEST_SMOOTHING_I2" comment="This register is used to control smoothing"/>
+ <register addr="50060334" rw_flags="RW" width="4" name="BB_LDPC_CONFIG_I2" comment="LDPC configuration"/>
+ <register addr="50060338" rw_flags="RW" width="1" name="BB_LDPC_RX_THROTTLE_ADDR_I2" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output. Address to use is described in BB_LDPC_RX_THROTTLE_ADDR_REF"/>
+ <register addr="5006033c" rw_flags="RW" width="2" name="BB_LDPC_RX_THROTTLE_I2" comment="Address used to load different values to internal register to allow reduced data rate in LDPC output"/>
+ <register addr="50060340" rw_flags="RW" width="1" name="BB_CPE_PHASE_REG_EN_I2" comment="Enables the phase reg calculations in RTL"/>
+ <register addr="50060344" rw_flags="R" width="2" name="BB_CPE_PHASE_MAX_I2" comment="Maximum CPE phase of a frame over all symbols"/>
+ <register addr="50060348" rw_flags="R" width="2" name="BB_CPE_PHASE_MIN_I2" comment="Minimum CPE phase of a frame over all symbols"/>
+ <register addr="5006034c" rw_flags="R" width="2" name="BB_CPE_PHASE_ACCUM_I2" comment="Phase accumulation of all symbol phase of the frame"/>
+ <register addr="50060350" rw_flags="R" width="2" name="BB_CPE_PHASE_SQR_ACCUM_I2" comment="Accumulation of phase square over all symbols of the frame"/>
+ <register addr="50060354" rw_flags="R" width="2" name="BB_CPE_PHASE_DIFF_ACCUM_I2" comment="Accumulation of phase difference over all symbols of the frame"/>
+ <register addr="50060358" rw_flags="R" width="2" name="BB_CPE_NUM_ACCUM_I2" comment="Number of phases accumulated in the accumulation registers"/>
+ <register addr="5006035c" rw_flags="RW" width="1" name="BB_FREQ_TRACK_REG_EN_I2" comment="Enables the frequency reg calculations in RTL"/>
+ <register addr="50060360" rw_flags="R" width="2" name="BB_FREQ_TRACK_MAX_I2" comment="Maximum fine frequency of a frame over all symbols"/>
+ <register addr="50060364" rw_flags="R" width="2" name="BB_FREQ_TRACK_MIN_I2" comment="Minimum fine frequency of a frame over all symbols"/>
+ <register addr="50060368" rw_flags="R" width="2" name="BB_FREQ_TRACK_ACCUM_I2" comment="Fine frequency accumulation of all symbol phase of the frame"/>
+ <register addr="5006036c" rw_flags="R" width="2" name="BB_FREQ_TRACK_SQR_ACCUM_I2" comment="Accumulation of fine frequency square over all symbols of the frame"/>
+ <register addr="50060370" rw_flags="R" width="2" name="BB_FREQ_TRACK_NUM_ACCUM_I2" comment="Number of fine frequency accumulated in the accumulation registers"/>
+ <register addr="50060374" rw_flags="RW" width="1" name="BB_EN_VHT_NUDGEAGAIN_I2" comment="When set enables nudge again for HT/VHT packets otherwise nudge again only for HT packets"/>
+ <register addr="50060378" rw_flags="RW" width="4" name="BB_LTF_SYNC_LATENCY_I2" comment="Number of 20M clock cycles of LTF peak calculation latency"/>
+ <register addr="5006037c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[0]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060380" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[1]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060384" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[2]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060388" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[3]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006038c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[4]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060390" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT1_I2[5]" comment="Smoothing filter coefficient for SNR1 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060394" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[0]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060398" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[1]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006039c" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[2]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[3]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[4]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603a8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT2_I2[5]" comment="Smoothing filter coefficient for SNR2 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603ac" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[0]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[1]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[2]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603b8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[3]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603bc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[4]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT3_I2[5]" comment="Smoothing filter coefficient for SNR3 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[0]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603c8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[1]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603cc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[2]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[3]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[4]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603d8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT4_I2[5]" comment="Smoothing filter coefficient for SNR4 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603dc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[0]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[1]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[2]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603e8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[3]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603ec" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[4]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f0" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT5_I2[5]" comment="Smoothing filter coefficient for SNR5 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f4" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[0]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603f8" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[1]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="500603fc" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[2]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060400" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[3]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060404" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[4]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="50060408" rw_flags="RW" width="4" name="BB_CEST_SMOOTH_COEFFICIENT6_I2[5]" comment="Smoothing filter coefficient for SNR6 (0:Fading, 1:AWGN, 2:BF Nsts1 Fading, 3:BF Nsts1 AWGN, 4:BF Nsts2 Fading, 5:BF Nsts2 AWGN)"/>
+ <register addr="5006040c" rw_flags="R" width="1" name="BB_CEST_SMOOTH_DEBUG_I2" comment="Selected Smoothing filter type for debugging"/>
+ <register addr="50060410" rw_flags="RW" width="4" name="BB_LPE_CONFIG_I2" comment="Linear phase estimation configuration"/>
+ <register addr="50060414" rw_flags="RW" width="4" name="BB_CPE_CONFIG_I2" comment="BB DD CPE configuration"/>
+ <register addr="50060418" rw_flags="RW" width="4" name="BB_DDCPE_PHASE_LIMIT_I2" comment="Phase limitation value for DD-CPE"/>
+ <register addr="5006041c" rw_flags="RW" width="1" name="BB_DDCPE_PHASE_1024QAM_LIMIT_I2" comment="Phase limitation value for DD-CPE"/>
+ <register addr="50060420" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK0_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50060424" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK1_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="50060428" rw_flags="RW" width="4" name="BB_CPE_MMSE_WEIGHT_BANK2_I2" comment="Pilot weight for MMSE CPE"/>
+ <register addr="5006042c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK0_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060430" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK1_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060434" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_PILOT_WEIGHT_BANK2_I2" comment="Pilot weight for MMSE DD-CPE"/>
+ <register addr="50060438" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK0_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="5006043c" rw_flags="RW" width="4" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK1_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50060440" rw_flags="RW" width="2" name="BB_DDCPE_MMSE_DATA_WEIGHT_BANK2_I2" comment="Data weight for MMSE DD-CPE"/>
+ <register addr="50060444" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_BCC_I2" comment="DDCPE LLR threshold for BCC"/>
+ <register addr="50060448" rw_flags="RW" width="4" name="BB_DDCPE_LLR_THRES_LDPC_I2" comment="DDCPE LLR threshold for LDPC"/>
+ <register addr="5006044c" rw_flags="RW" width="2" name="BB_MMSE_SYM_OFFSET_I2" comment="Symbol Offset to skip MMSE-CPE"/>
+ <register addr="50060450" rw_flags="R" width="4" name="BB_DEBUG_STATUS_MISC_I2" comment="Misc Internal signal status"/>
+ <register addr="50060454" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_L_I2" comment="Membership status array"/>
+ <register addr="50060458" rw_flags="RW" width="4" name="BB_GID_MEMBERSHIP_H_I2" comment="Membership status array"/>
+ <register addr="5006045c" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LL_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060460" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_LH_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060464" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HL_I2" comment="User Position Array 2 bits"/>
+ <register addr="50060468" rw_flags="RW" width="4" name="BB_GID_USERPOSITION_HH_I2" comment="User Position Array 2 bits"/>
+ <register addr="5006046c" rw_flags="RW" width="1" name="BB_IEEE_NDP_CTRL_I2" comment="NDP Decision Method Control"/>
+ <register addr="50060470" rw_flags="RW" width="4" name="BASEBAND_TX_CONFIG_I2" comment="Config for PAPR module"/>
+ <register addr="50060474" rw_flags="RW" width="2" name="BASEBAND_TX_CONFIG2_I2" comment="Config for Tx filtering stages and papr"/>
+ <register addr="50060478" rw_flags="RW" width="1" name="BASEBAND_TX_EVM_PARAMS_I2" comment="Used to tune the gain in the upsample filters in preproc to enhance the Evm across the preproc"/>
+ <register addr="5006047c" rw_flags="RW" width="4" name="BB_TX_SWED_PAPR_CONFIG_I2" comment="SWED PAPR Configuration"/>
+ <register addr="50060480" rw_flags="RW" width="4" name="BB_DIRECTION_FIND_CONFIG_I2" comment="Configuration for direction finder"/>
+ <register addr="50060484" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_01_I2" comment="This register is used to read the phase of symbol 0 and 1 ."/>
+ <register addr="50060488" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_23_I2" comment="This register is used to read the phase of symbol 2 and 3 ."/>
+ <register addr="5006048c" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_45_I2" comment="This register is used to read the phase of symbol 4 and 5 ."/>
+ <register addr="50060490" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_67_I2" comment="This register is used to read the phase of symbol 6 and 7 ."/>
+ <register addr="50060494" rw_flags="R" width="4" name="BB_DIRECTION_FIND_PHASE_89_I2" comment="This register is used to read the phase of symbol 8 and 9 ."/>
+ <register addr="50060498" rw_flags="RW" width="1" name="BB_EVM_SIG_EN_I2" comment="EVM Sig. EN"/>
+ <register addr="5006049c" rw_flags="RW" width="1" name="BB_DISABLE_NUDGE_GAIN_I2" comment="Nudge Gain Disable"/>
+ </block>
+ <block name="wl_bbb" comment="">
+ <register addr="50070000" rw_flags="R" width="2" name="BBB_TX_BURST_START_STATUS" comment=""/>
+ <register addr="50070004" rw_flags="R" width="1" name="BBB_TX_PREAMB_TYPE_STATUS" comment=""/>
+ <register addr="50070008" rw_flags="R" width="1" name="BBB_TX_BURST_RATE_STATUS" comment="Transmit burst status information: rate and duplicate mode config for DSSS/CCK (a non-standard feature)"/>
+ <register addr="5007000c" rw_flags="R" width="2" name="BBB_TX_BURST_LEN_STATUS" comment=""/>
+ <register addr="50070010" rw_flags="R" width="2" name="BBB_TX_BURST_OPTIONS_STATUS" comment="Packet transmit options."/>
+ <register addr="50070014" rw_flags="R" width="2" name="BBB_TX_BURST_SCAN_CONFIG_STATUS" comment="Scan accelerator configuration."/>
+ <register addr="50070018" rw_flags="RW" width="1" name="BBB_TX_PKT_CONFIG" comment=""/>
+ <register addr="5007001c" rw_flags="RW" width="2" name="BBB_TX_MOD_CONFIG" comment=""/>
+ <register addr="50070020" rw_flags="RW" width="2" name="BBB_TX_FILTER_CONFIG" comment=""/>
+ <register addr="50070024" rw_flags="RW" width="4" name="BBB_TX_TIMER_CONFIG" comment=""/>
+ <register addr="50070028" rw_flags="RW" width="2" name="BBB_TX_INT_MASK" comment=""/>
+ <register addr="5007002c" rw_flags="RW" width="2" name="BBB_TX_INT_CLEAR" comment=""/>
+ <register addr="50070030" rw_flags="R" width="2" name="BBB_TX_INT_CAUSE" comment=""/>
+ <register addr="50070034" rw_flags="R" width="1" name="BBB_TX_EVENT_TYPE" comment=""/>
+ <register addr="50070038" rw_flags="R" width="1" name="BBB_TX_PKT_STATUS" comment="CCK transmitter state machine current state"/>
+ <register addr="5007003c" rw_flags="RW" width="1" name="BBB_RX_PKT_CONFIG" comment=""/>
+ <register addr="50070040" rw_flags="RW" width="1" name="BBB_RX_FILTER_CONFIG" comment="40 to 44MHz resampling filter settings. These settings are applied to the two instances of this filter module, for I and Q signals."/>
+ <register addr="50070044" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_CONFIG" comment=""/>
+ <register addr="50070048" rw_flags="RW" width="2" name="BBB_RX_SYNC_PKT_CONFIG" comment="Configures detection of SFD (Start Frame Delimiter), aka Packet Sync"/>
+ <register addr="5007004c" rw_flags="RW" width="1" name="BBB_RX_SLICER_CONFIG" comment=""/>
+ <register addr="50070050" rw_flags="RW" width="2" name="BBB_RX_FREQ_EST_CONFIG" comment=""/>
+ <register addr="50070054" rw_flags="RW" width="2" name="BBB_RX_CHAN_EST_CONFIG" comment=""/>
+ <register addr="50070058" rw_flags="RW" width="1" name="BBB_RX_CLKTRACK_CONFIG" comment=""/>
+ <register addr="5007005c" rw_flags="RW" width="2" name="BBB_RX_DESPREAD_CONFIG" comment=""/>
+ <register addr="50070060" rw_flags="RW" width="4" name="BBB_RX_DESPREAD_CONFIG2" comment=""/>
+ <register addr="50070064" rw_flags="RW" width="4" name="BBB_RX_TIMER_CONFIG" comment=""/>
+ <register addr="50070068" rw_flags="RW" width="1" name="BBB_RX_AGC_GAIN_INIT" comment=""/>
+ <register addr="5007006c" rw_flags="RW" width="2" name="BBB_RX_AGC_GAIN_LIMITS" comment=""/>
+ <register addr="50070070" rw_flags="RW" width="2" name="BBB_RX_AGC_TARGETS" comment=""/>
+ <register addr="50070074" rw_flags="RW" width="2" name="BBB_RX_AGC_CONFIG" comment=""/>
+ <register addr="50070078" rw_flags="RW" width="2" name="BBB_RX_INT_MASK" comment=""/>
+ <register addr="5007007c" rw_flags="RW" width="2" name="BBB_RX_INT_CLEAR" comment=""/>
+ <register addr="50070080" rw_flags="RW" width="2" name="BBB_RX_SYNC_SYM_CONFIG2" comment=""/>
+ <register addr="50070084" rw_flags="RW" width="2" name="BBB_RX_SYNC_SYM_CONFIG3" comment="Configuration of CCK symbol synchronizer with pattern matching criteria (See B-65913)"/>
+ <register addr="50070088" rw_flags="RW" width="1" name="BBB_RX_SYNC_SYM_CONFIG4" comment="More configuration related to CCK symbol synchronizer with pattern matching criteria (See B-65913 and B-77346)"/>
+ <register addr="5007008c" rw_flags="RW" width="1" name="BBB_RX_DIVERSITY_CFG" comment="Configuration for DSSS/CCK switched diversity reception"/>
+ <register addr="50070090" rw_flags="RW" width="4" name="BBB_RX_JUMP_DET_CONFIG" comment="B Modem signal jump detector configuration"/>
+ <register addr="50070094" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_PAT_L" comment="Pattern to match for Long preamble"/>
+ <register addr="50070098" rw_flags="RW" width="4" name="BBB_RX_SYNC_SYM_PAT_S" comment="Pattern to match for Short preamble"/>
+ <register addr="5007009c" rw_flags="RW" width="2" name="BBB_RX_DEBUG_CONFIG" comment=""/>
+ <register addr="500700a0" rw_flags="R" width="2" name="BBB_RX_INT_CAUSE" comment=""/>
+ <register addr="500700a4" rw_flags="R" width="1" name="BBB_RX_PREAMB_TYPE" comment=""/>
+ <register addr="500700a8" rw_flags="R" width="1" name="BBB_RX_BURST_RATE" comment=""/>
+ <register addr="500700ac" rw_flags="R" width="2" name="BBB_RX_BURST_LEN" comment=""/>
+ <register addr="500700b0" rw_flags="R" width="1" name="BBB_RX_EVENT_TYPE" comment=""/>
+ <register addr="500700b4" rw_flags="R" width="2" name="BBB_RX_SIGNAL_QUALITY" comment=""/>
+ <register addr="500700b8" rw_flags="R" width="4" name="BBB_RX_FREQ_ERROR" comment="RxFreqErrorKHz = ((Reg Value in 2s complement) * 44000) / (11 * 65536 * 4)"/>
+ <register addr="500700bc" rw_flags="R" width="2" name="BBB_RX_DESPREAD_MARGIN" comment=""/>
+ <register addr="500700c0" rw_flags="R" width="1" name="BBB_RX_SLICE_MARGIN" comment=""/>
+ <register addr="500700c4" rw_flags="R" width="1" name="BBB_RX_SYNC_SCORE" comment=""/>
+ <register addr="500700c8" rw_flags="R" width="1" name="BBB_RX_PKT_STATUS" comment="CCK receiver state machine current state"/>
+ <register addr="500700cc" rw_flags="R" width="4" name="BBB_RX_CHAN_TAP_AMPLS_0" comment="least significant 32 bits"/>
+ <register addr="500700d0" rw_flags="R" width="4" name="BBB_RX_CHAN_TAP_AMPLS_1" comment="most significant 32 bits"/>
+ <register addr="500700d4" rw_flags="R" width="1" name="BBB_RX_AGC_GAIN" comment=""/>
+ <register addr="500700d8" rw_flags="R" width="2" name="BBB_RX_DEBUG" comment="Contents of this register are only available when BBB_RX_DEBUG_CONFIG_EN has been enabled"/>
+ <register addr="500700dc" rw_flags="RW" width="1" name="BBB_RX_CHAN_EQ_CONFIG" comment=""/>
+ <register addr="500700e0" rw_flags="RW" width="1" name="BBB_SPARE1" comment=""/>
+ <register addr="500700e4" rw_flags="RW" width="1" name="BBB_SPARE2" comment=""/>
+ <register addr="500700e8" rw_flags="RW" width="1" name="BBB_RX_SYNC_SYM_BLANK_TIME" comment="Interval at start of CCK symbol detection time to blank if needed to avoid transient effects after rx antenna switch in CCK switched diversity chop mode. Each unit of time is 1 microsec"/>
+ </block>
+ <block name="wl_enc_dma_0" comment="">
+ <register addr="50400000" rw_flags="RW" width="1" name="ENC_DMA_INT_CLEAR_I0" comment=""/>
+ <register addr="50400004" rw_flags="RW" width="1" name="ENC_DMA_INT_MASK_I0" comment=""/>
+ <register addr="50400008" rw_flags="RW" width="1" name="ENC_DMA_ENCR_TYPE_I0" comment="Encryption operation, one of:"/>
+ <register addr="5040000c" rw_flags="RW" width="1" name="ENC_DMA_KEY_LENGTH_I0" comment="Encryption key length 128 or 256"/>
+ <register addr="50400010" rw_flags="RW" width="2" name="ENC_DMA_FRAME_LENGTH_I0" comment="Frame body length in octets"/>
+ <register addr="50400014" rw_flags="RW" width="1" name="ENC_DMA_HDR_LENGTH_I0" comment="Frame header length in octets"/>
+ <register addr="50400018" rw_flags="RW" width="1" name="ENC_DMA_ENC_CONFIG_I0" comment="Contains the following configuration bits:"/>
+ <register addr="5040001c" rw_flags="RW" width="1" name="ENC_DMA_PRIORITY_OCTET_I0" comment="Priority octet used in TKIP MIC calculation. Set to zero in this case. For CCMP operation, bits set to 1 in this octet will be set to one in the Nonce Flags Octet. It should be set to 0x10 for Management frames but should be set to 0xFF for Cisco CCX S67 compatibility; it must be set to 0x0 otherwise. (Refer to 802.11w section 8.3.3.3.3)"/>
+ <register addr="50400020" rw_flags="RW" width="2" name="ENC_DMA_FC_MASK_I0" comment="Frame Control Mask. Determines which Frame Control bits are masked (i.e. included in the AAD calculation) in CCMP mode. Its default value is 0xC78F. (Refer to 802.11n section 8.3.3.3.2)"/>
+ <register addr="50400024" rw_flags="RW" width="1" name="ENC_DMA_AAD_QC_MASK_I0" comment="Additional Authentication Data QoS Control field mask value for CCMP encryption. Set to 0x0F unless both the STA and its peer have their SPP A-MSDU Capable fields set to 1. In that case, set to 0x8F. (Refer to 802.11n section 8.3.3.3.2 g)"/>
+ <register addr="50400028" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[0]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040002c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[0]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400030" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[0]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400034" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[0]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400038" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[1]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040003c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[1]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400040" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[1]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400044" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[1]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400048" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[2]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040004c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[2]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400050" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[2]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400054" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[2]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400058" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[3]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040005c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[3]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400060" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[3]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400064" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[3]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400068" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[4]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040006c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[4]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400070" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[4]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400074" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[4]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400078" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[5]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040007c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[5]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400080" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[5]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400084" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[5]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400088" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[6]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040008c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[6]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50400090" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[6]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50400094" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[6]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50400098" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I0[7]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5040009c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I0[7]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="504000a0" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I0[7]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="504000a4" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I0[7]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="504000a8" rw_flags="RW" width="1" name="ENC_DMA_DST_FIFO_READ_TIMEOUT_I0" comment="If the destination scatter-gather list is such that the wide output FIFO gets stuck with less data than a whole word width in it before the last AXI burst occurs then wait this many cycles before forcing the final read from the FIFO."/>
+ <register addr="504000ac" rw_flags="RW" width="1" name="ENC_DMA_STROBE_I0" comment="Contains the following bits:"/>
+ <register addr="504000b0" rw_flags="R" width="1" name="ENC_DMA_QUEUE_STATUS_I0" comment="Bits [2:1] contain the number of operations currently in progress or completed. The processor must read this number before programming any configuration registers, and may write configuration registers only when this number is less than 2. Bits [1:0] contain the number of sets of status registers in the status queue."/>
+ <register addr="504000b4" rw_flags="R" width="1" name="ENC_DMA_OPERATION_STATUS_I0" comment="Indicates the outcome of the corresponding encryption operation. One of: ENC_DONE, ENC_STATUS_MIC_FAIL (MIC failed), ENC_DMA_DONE (DMA operation has been finished), AXI_READ_SLAVE_ERROR, AXI_READ_DECODE_ERROR, AXI_WRITE_SLAVE_ERROR, AXI_WRITE_DECODE_ERROR"/>
+ <register addr="504000b8" rw_flags="R" width="2" name="ENC_DMA_STATE_I0" comment="DMA current state for debug purposes"/>
+ <register addr="504000bc" rw_flags="R" width="4" name="ENC_DMA_STATE_FIFOS_I0" comment="DMA current state for debug purposes"/>
+ <register addr="504000c0" rw_flags="R" width="1" name="ENC_CORE_STATUS_I0" comment="Encryption accelerator state for debug purposes"/>
+ <register addr="504000c4" rw_flags="RW" width="1" name="ENC_DMA_MAX_AXI_READ_BURST_NUM_I0" comment="Max mumber of outstanding read AXI bursts, for debug only. Upto 15 are theoretically supported in the logic but only if there is space for all of them in the SRC FIFO."/>
+ <register addr="504000c8" rw_flags="RW" width="2" name="ENC_DMA_AXI_CACHE_CONFIG_I0" comment="AXI cache control settings, for debug only"/>
+ <register addr="504000cc" rw_flags="RW" width="1" name="ENC_DMA_AXI_BURST_CONFIG_I0" comment="Generate AXI access depending on FIFO state configuration, for debug only"/>
+ </block>
+ <block name="wl_enc_dma_1" comment="">
+ <register addr="50500000" rw_flags="RW" width="1" name="ENC_DMA_INT_CLEAR_I1" comment=""/>
+ <register addr="50500004" rw_flags="RW" width="1" name="ENC_DMA_INT_MASK_I1" comment=""/>
+ <register addr="50500008" rw_flags="RW" width="1" name="ENC_DMA_ENCR_TYPE_I1" comment="Encryption operation, one of:"/>
+ <register addr="5050000c" rw_flags="RW" width="1" name="ENC_DMA_KEY_LENGTH_I1" comment="Encryption key length 128 or 256"/>
+ <register addr="50500010" rw_flags="RW" width="2" name="ENC_DMA_FRAME_LENGTH_I1" comment="Frame body length in octets"/>
+ <register addr="50500014" rw_flags="RW" width="1" name="ENC_DMA_HDR_LENGTH_I1" comment="Frame header length in octets"/>
+ <register addr="50500018" rw_flags="RW" width="1" name="ENC_DMA_ENC_CONFIG_I1" comment="Contains the following configuration bits:"/>
+ <register addr="5050001c" rw_flags="RW" width="1" name="ENC_DMA_PRIORITY_OCTET_I1" comment="Priority octet used in TKIP MIC calculation. Set to zero in this case. For CCMP operation, bits set to 1 in this octet will be set to one in the Nonce Flags Octet. It should be set to 0x10 for Management frames but should be set to 0xFF for Cisco CCX S67 compatibility; it must be set to 0x0 otherwise. (Refer to 802.11w section 8.3.3.3.3)"/>
+ <register addr="50500020" rw_flags="RW" width="2" name="ENC_DMA_FC_MASK_I1" comment="Frame Control Mask. Determines which Frame Control bits are masked (i.e. included in the AAD calculation) in CCMP mode. Its default value is 0xC78F. (Refer to 802.11n section 8.3.3.3.2)"/>
+ <register addr="50500024" rw_flags="RW" width="1" name="ENC_DMA_AAD_QC_MASK_I1" comment="Additional Authentication Data QoS Control field mask value for CCMP encryption. Set to 0x0F unless both the STA and its peer have their SPP A-MSDU Capable fields set to 1. In that case, set to 0x8F. (Refer to 802.11n section 8.3.3.3.2 g)"/>
+ <register addr="50500028" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[0]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050002c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[0]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500030" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[0]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500034" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[0]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500038" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[1]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050003c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[1]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500040" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[1]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500044" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[1]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500048" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[2]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050004c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[2]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500050" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[2]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500054" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[2]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500058" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[3]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050005c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[3]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500060" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[3]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500064" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[3]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500068" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[4]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050006c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[4]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500070" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[4]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500074" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[4]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500078" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[5]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050007c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[5]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500080" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[5]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500084" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[5]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500088" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[6]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050008c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[6]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="50500090" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[6]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="50500094" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[6]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="50500098" rw_flags="RW" width="4" name="ENC_DMA_SRC_START_ADDR_I1[7]" comment="Scatter-gather list, Source block address."/>
+ <register addr="5050009c" rw_flags="RW" width="2" name="ENC_DMA_SRC_BLOCK_CONFIG_I1[7]" comment="Scatter-gather list, Source block configuration"/>
+ <register addr="505000a0" rw_flags="RW" width="4" name="ENC_DMA_DST_START_ADDR_I1[7]" comment="Scatter-gather list, Destination block address low"/>
+ <register addr="505000a4" rw_flags="RW" width="2" name="ENC_DMA_DST_BLOCK_CONFIG_I1[7]" comment="Scatter-gather list, Destination block length in bytes."/>
+ <register addr="505000a8" rw_flags="RW" width="1" name="ENC_DMA_DST_FIFO_READ_TIMEOUT_I1" comment="If the destination scatter-gather list is such that the wide output FIFO gets stuck with less data than a whole word width in it before the last AXI burst occurs then wait this many cycles before forcing the final read from the FIFO."/>
+ <register addr="505000ac" rw_flags="RW" width="1" name="ENC_DMA_STROBE_I1" comment="Contains the following bits:"/>
+ <register addr="505000b0" rw_flags="R" width="1" name="ENC_DMA_QUEUE_STATUS_I1" comment="Bits [2:1] contain the number of operations currently in progress or completed. The processor must read this number before programming any configuration registers, and may write configuration registers only when this number is less than 2. Bits [1:0] contain the number of sets of status registers in the status queue."/>
+ <register addr="505000b4" rw_flags="R" width="1" name="ENC_DMA_OPERATION_STATUS_I1" comment="Indicates the outcome of the corresponding encryption operation. One of: ENC_DONE, ENC_STATUS_MIC_FAIL (MIC failed), ENC_DMA_DONE (DMA operation has been finished), AXI_READ_SLAVE_ERROR, AXI_READ_DECODE_ERROR, AXI_WRITE_SLAVE_ERROR, AXI_WRITE_DECODE_ERROR"/>
+ <register addr="505000b8" rw_flags="R" width="2" name="ENC_DMA_STATE_I1" comment="DMA current state for debug purposes"/>
+ <register addr="505000bc" rw_flags="R" width="4" name="ENC_DMA_STATE_FIFOS_I1" comment="DMA current state for debug purposes"/>
+ <register addr="505000c0" rw_flags="R" width="1" name="ENC_CORE_STATUS_I1" comment="Encryption accelerator state for debug purposes"/>
+ <register addr="505000c4" rw_flags="RW" width="1" name="ENC_DMA_MAX_AXI_READ_BURST_NUM_I1" comment="Max mumber of outstanding read AXI bursts, for debug only. Upto 15 are theoretically supported in the logic but only if there is space for all of them in the SRC FIFO."/>
+ <register addr="505000c8" rw_flags="RW" width="2" name="ENC_DMA_AXI_CACHE_CONFIG_I1" comment="AXI cache control settings, for debug only"/>
+ <register addr="505000cc" rw_flags="RW" width="1" name="ENC_DMA_AXI_BURST_CONFIG_I1" comment="Generate AXI access depending on FIFO state configuration, for debug only"/>
+ </block>
+ <block name="wl_mac_0" comment="">
+ <register addr="50200000" rw_flags="RW" width="2" name="CLKGEN_MAC_ENABLES_I0" comment="This register enables clocks for MAC_IF_ and MAC_ACC. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50200004" rw_flags="RW" width="1" name="MAC_DEBUG_SEL_I0" comment="Select MAC debug port output (this is in addition to MAC IF and MAC ACC ports)"/>
+ <register addr="50200008" rw_flags="R" width="4" name="MAC_DEBUG_STATUS_I0" comment="Read MAC debug {MAC_ACC, MAC_IF}"/>
+ </block>
+ <block name="wl_mac_1" comment="">
+ <register addr="50300000" rw_flags="RW" width="2" name="CLKGEN_MAC_ENABLES_I1" comment="This register enables clocks for MAC_IF_ and MAC_ACC. When a corresponding bit is set, the clock is enabled, regardless of any corresponding clock request"/>
+ <register addr="50300004" rw_flags="RW" width="1" name="MAC_DEBUG_SEL_I1" comment="Select MAC debug port output (this is in addition to MAC IF and MAC ACC ports)"/>
+ <register addr="50300008" rw_flags="R" width="4" name="MAC_DEBUG_STATUS_I1" comment="Read MAC debug {MAC_ACC, MAC_IF}"/>
+ </block>
+ <block name="wl_mac_acc_0" comment="">
+ <register addr="50220000" rw_flags="RW" width="1" name="MAC_ACC_CONTROL_I0" comment="Resets and enables the MAC accelerator."/>
+ <register addr="50220004" rw_flags="R" width="1" name="MAC_BA_TX_ACTIVITY_I0" comment="MAC BA_TX activity status."/>
+ <register addr="50220008" rw_flags="RW" width="2" name="MAC_BA_ENABLE_I0" comment="Enables for the BA_RX/BA_TX instances."/>
+ <register addr="5022000c" rw_flags="RW" width="1" name="MAC_MODULE_RESET_I0" comment="This register can be used to reset MAC submodules individually [one at a time]."/>
+ <register addr="50220010" rw_flags="RW" width="2" name="MAC_CLOCK_DISABLE_I0" comment="Clock disable signals that control the local clock gating logic of MAC submodules."/>
+ <register addr="50220014" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS_BYTE3_0_I0" comment="Primary MAC address"/>
+ <register addr="50220018" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS_BYTE5_4_I0" comment="Primary MAC address"/>
+ <register addr="5022001c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS1_BYTE3_0_I0" comment="MAC address #1"/>
+ <register addr="50220020" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS1_BYTE5_4_I0" comment="MAC address #1"/>
+ <register addr="50220024" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS2_BYTE3_0_I0" comment="MAC address #2"/>
+ <register addr="50220028" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS2_BYTE5_4_I0" comment="MAC address #2"/>
+ <register addr="5022002c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_BYTE3_0_I0" comment="MAC address #3"/>
+ <register addr="50220030" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_BYTE5_4_I0" comment="MAC address #3"/>
+ <register addr="50220034" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE3_0_I0" comment="If a bit is set, then that bit"/>
+ <register addr="50220038" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE5_4_I0" comment="is ignored for receive Address1 matching."/>
+ <register addr="5022003c" rw_flags="RW" width="1" name="MAC_STATION_ADDRESS_CONFIG_I0" comment="Configures receive Address1 matching on our MAC addresses."/>
+ <register addr="50220040" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220044" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220048" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5022004c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220050" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220054" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220058" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE3_0_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5022005c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE5_4_I0" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50220060" rw_flags="RW" width="1" name="MAC_GRP_ACK_CONFIG_I0" comment="Configures immediate ACK behaviour for reception of Group Addressed frames"/>
+ <register addr="50220064" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_MANAGEMENT_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220068" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_CONTROL_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="5022006c" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_DATA_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220070" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_RESERVED_SUBTYPE_EN_I0" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50220074" rw_flags="RW" width="4" name="MAC_BSSID_BYTE3_0_I0" comment="BSSID"/>
+ <register addr="50220078" rw_flags="RW" width="2" name="MAC_BSSID_BYTE5_4_I0" comment="BSSID"/>
+ <register addr="5022007c" rw_flags="RW" width="4" name="MAC_ALT_BSSID_BYTE3_0_I0" comment="Alternative BSSID"/>
+ <register addr="50220080" rw_flags="RW" width="2" name="MAC_ALT_BSSID_BYTE5_4_I0" comment="Alternative BSSID"/>
+ <register addr="50220084" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_01MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220088" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_02MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5022008c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_5M5BPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220090" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_11MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220094" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_06MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50220098" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_09MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5022009c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_12MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_18MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a4" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_24MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200a8" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_36MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200ac" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_48MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200b0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_54MBPS_I0" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="502200b4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS0_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200b8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS1_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200bc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS2_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS3_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS4_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200c8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS5_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200cc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS6_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS7_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS8_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200d8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS9_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200dc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS10_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS11_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS12_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200e8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS13_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200ec" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS14_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS15_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS32_I0" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200f8" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="502200fc" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220100" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220104" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220108" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022010c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220110" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220114" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220118" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022011c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220120" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220124" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220128" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022012c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220130" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220134" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220138" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5022013c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220140" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220144" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_NSS2_I0" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50220148" rw_flags="RW" width="2" name="MAC_CTRL_MAC2_FLAGS_I0" comment="Flags [Configuration bits] register 2"/>
+ <register addr="5022014c" rw_flags="RW" width="2" name="MAC_CTRL_MAC3_FLAGS_I0" comment="Flags [Configuration bits] register 3"/>
+ <register addr="50220150" rw_flags="RW" width="2" name="MAC_CTRL_MAC4_FLAGS_I0" comment="Flags [Configuration bits] register 4"/>
+ <register addr="50220154" rw_flags="RW" width="2" name="MAC_CTRL_MAC5_FLAGS_I0" comment="Flags [Configuration bits] register 5"/>
+ <register addr="50220158" rw_flags="RW" width="2" name="MAC_CTRL_MAC6_FLAGS_I0" comment="Flags [Configuration bits] register 6"/>
+ <register addr="5022015c" rw_flags="RW" width="2" name="MAC_CTRL_MAC7_FLAGS_I0" comment="Flags [Configuration bits] register 7"/>
+ <register addr="50220160" rw_flags="RW" width="2" name="MAC_CTRL_MAC10_FLAGS_I0" comment="Flags [Configuration bits] register 10"/>
+ <register addr="50220164" rw_flags="RW" width="2" name="MAC_CTRL_MAC11_FLAGS_I0" comment="Flags [Configuration bits] register 11 (This replaces some ACTING_AS_AP functionality by splitting it into several programmable bits."/>
+ <register addr="50220168" rw_flags="RW" width="2" name="MAC_CTRL_MAC12_FLAGS_I0" comment="Flags [Configuration bits] register 12."/>
+ <register addr="5022016c" rw_flags="RW" width="2" name="MAC_RX_FILTER_CONFIG_I0" comment="RX filter configuration"/>
+ <register addr="50220170" rw_flags="RW" width="2" name="MAC_MIN_MPDU_LEN_I0" comment="Minimum RX MPDU length. Received MPDUs shorter than this are discarded."/>
+ <register addr="50220174" rw_flags="RW" width="2" name="MAC_MAX_MPDU_LEN_I0" comment="Maximum RX MPDU length. Received MPDUs longer than this are discarded."/>
+ <register addr="50220178" rw_flags="RW" width="2" name="MAC_CCA_CFG_I0" comment="Configures CCA utilisation."/>
+ <register addr="5022017c" rw_flags="RW" width="2" name="MAC_CTRL_RESPONSE_TX_LEVEL_I0" comment="Transmit level for control response frames."/>
+ <register addr="50220180" rw_flags="RW" width="1" name="MAC_CTRL_RESPONSE_TX_ANT_I0" comment="Transmit antenna configuration for control response frames."/>
+ <register addr="50220184" rw_flags="RW" width="2" name="MAC_AC_BK_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_BK EDCA queue."/>
+ <register addr="50220188" rw_flags="RW" width="2" name="MAC_AC_BE_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_BE EDCA queue."/>
+ <register addr="5022018c" rw_flags="RW" width="2" name="MAC_AC_VI_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_VI EDCA queue."/>
+ <register addr="50220190" rw_flags="RW" width="2" name="MAC_AC_VO_TXOP_LIMIT_I0" comment="TXOP limit in units of 32 us for the AC_VO EDCA queue."/>
+ <register addr="50220194" rw_flags="R" width="2" name="MAC_TXOP_TIME_LEFT_I0" comment="The firmware can read from this register the time remaining in the current TXOP, in units of 1 us."/>
+ <register addr="50220198" rw_flags="RW" width="2" name="MAC_EIFS_I0" comment="Programmable EIFS"/>
+ <register addr="5022019c" rw_flags="RW" width="1" name="MAC_SLOT_TIME_US_I0" comment="Programmable slot time in us"/>
+ <register addr="502201a0" rw_flags="RW" width="2" name="MAC_NDP_MCS_I0" comment="Programs MCS used for HT NDP or VHT NDP transmission."/>
+ <register addr="502201a4" rw_flags="RW" width="2" name="MAC_BFER_CFG_I0" comment="Configures beamformer."/>
+ <register addr="502201a8" rw_flags="RW" width="2" name="MAC_BFEE_CFG_I0" comment="Configures beamformee."/>
+ <register addr="502201ac" rw_flags="RW" width="2" name="MAC_MCS_FEEDBACK_CONFIG_I0" comment="MCS feedback configuration"/>
+ <register addr="502201b0" rw_flags="RW" width="4" name="MAC_TID_QSIZE_MAP_I0" comment="Maps one of 16 TIDs to one of four queue sizes, for the purpose of setting the 'Queue Size' field in transmitted QoS frames."/>
+ <register addr="502201b4" rw_flags="RW" width="4" name="MAC_TID_QSIZE_I0" comment="Queue sizes numbers 0, 1, 2 and 3."/>
+ <register addr="502201b8" rw_flags="R" width="4" name="MAC_M_NAV_END_I0" comment="The firmware can read from this register the NAV end time."/>
+ <register addr="502201bc" rw_flags="R" width="4" name="MAC_NAV_BSSID_BYTE3_0_I0" comment="The firmware can read from this register the BSSID associated to the current NAV."/>
+ <register addr="502201c0" rw_flags="R" width="2" name="MAC_NAV_BSSID_BYTE5_4_I0" comment=""/>
+ <register addr="502201c4" rw_flags="R" width="4" name="MAC_TXOPHOLDER_BYTE3_0_I0" comment="The firmware can read from this register the TXOP holder associated to the current NAV."/>
+ <register addr="502201c8" rw_flags="R" width="2" name="MAC_TXOPHOLDER_BYTE5_4_I0" comment=""/>
+ <register addr="502201cc" rw_flags="R" width="1" name="MAC_NAV_SRC_I0" comment="NAV sources. See 802.11-1999 as amended in 802.11-2007."/>
+ <register addr="502201d0" rw_flags="RW" width="4" name="MAC_TX_SIFS_REF_I0" comment="Adjust the timing of Data frame following a CTS-to-self. This is nominally the time between the on-air end of frame to the point when MAC issues PHY RX End signal. This is measured in 25 ns units."/>
+ <register addr="502201d4" rw_flags="RW" width="4" name="MAC_TX_RIFS_REF_I0" comment="Adjust TX timing references to achieve RIFS transmission. This is 25 ns units."/>
+ <register addr="502201d8" rw_flags="RW" width="2" name="MAC_RESPONSE_DELAY_SIFS_I0" comment="Bits 7 down to 0 are programmable time in 25ns units to delay response frames such that SIFS is met. Bit 8 allows timing at the end of HT-MM short GI frames to be measured on 4us symbol boundaries. This affects SIFS timing of short GI frames."/>
+ <register addr="502201dc" rw_flags="RW" width="2" name="MAC_TXEND_LATENCY_I0" comment="The time between the modem sending a 'TX End' signal to the actual on-air end of frame. This is measured in 25 ns units. This is used as an 'off-air' indicator. "/>
+ <register addr="502201e0" rw_flags="RW" width="4" name="MAC_CSTATE_IFS_ADJUST_I0" comment="Adjust IFS timing for in channel state module"/>
+ <register addr="502201e4" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_11B_I0" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+) for 11b. This adjusts the position of the PHY preamble."/>
+ <register addr="502201e8" rw_flags="RW" width="2" name="MAC_PHYIF_SYMB_END_11B_I0" comment="Programmable time that adjust 11b RX latency to meet SIFS. The format is 4.6 unsigned. The integer part is in microseconds. The fractional part is in 25 ns."/>
+ <register addr="502201ec" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="502201f0" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_END_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="502201f4" rw_flags="RW" width="1" name="MAC_PHYIF_STBC_WITH_LDPC_SYMB_END_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE for a received frame containing both STBC and LDPC (+/-) for OFDM."/>
+ <register addr="502201f8" rw_flags="RW" width="2" name="MAC_PHYIF_STBC_LDPC_SYMB_END_ADJUST_I0" comment="Programmable time in 25us units that adjusts the symbol end time in MAC_PHY_INTERFACE for STBC or LDPC reception (+/-) for OFDM."/>
+ <register addr="502201fc" rw_flags="RW" width="1" name="MAC_PHYIF_RXSTART_ADJUST_I0" comment="Programmable time in 1us unit that adjusts the RX_START start time in MAC_PHY_INTERFACE."/>
+ <register addr="50220200" rw_flags="RW" width="1" name="MAC_TX_CTSRESPONSE_ADJUST_I0" comment="Programmable time in 25ns units that adjusts the start of the TX of the frame sent at SIFS after a CTS TX or RX."/>
+ <register addr="50220204" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11A_I0" comment="Programmable time in us that the MAC waits for a response in 11a."/>
+ <register addr="50220208" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11B_I0" comment="Programmable time in us that the MAC waits for a response in 11b."/>
+ <register addr="5022020c" rw_flags="RW" width="2" name="MAC_RX_AMPDU_CFG_I0" comment="Receive A-MPDU configuration."/>
+ <register addr="50220210" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_I0" comment="Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop."/>
+ <register addr="50220214" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_CTS_I0" comment="The bottom 10 bits means secondary channel must be free for this amount of time (50ns unit) before it is declared non-busy for CTS response to a RTS signalling TA. Bits [13:10] is a signed number that adjusts the delay between the start of frame and the synchronisation start pulse from the modem."/>
+ <register addr="50220218" rw_flags="RW" width="2" name="MAC_TX_DELAY_FINE_TUNE_I0" comment="Transmit delay fine tune. Provides fine adjustment of inter-frame spacing."/>
+ <register addr="5022021c" rw_flags="RW" width="2" name="MAC_CS_LATENCY_I0" comment="CS latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to stretch CCA status from CS latency to nominal OFDM RX latency."/>
+ <register addr="50220220" rw_flags="RW" width="2" name="MAC_RADIO_SYNC_LATENCY_I0" comment="Radio sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between modem indicates CCA busy to the start of packet pulse."/>
+ <register addr="50220224" rw_flags="RW" width="2" name="MAC_MODEM_SYNC_LATENCY_I0" comment="Modem sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between OFDM STF sync to the start of packet pulse."/>
+ <register addr="50220228" rw_flags="RW" width="1" name="MAC_DEFAULT_AMPDU_DURATION_I0" comment="This is the duration of an A-MPDU frame exchange when it is the next frame from the frame at the head of a queue."/>
+ <register addr="5022022c" rw_flags="RW" width="4" name="MAC_MAX_ACK_DURATION_I0" comment="Maximum ACK duration for DSSS/CCK and OFDM."/>
+ <register addr="50220230" rw_flags="R" width="4" name="MAC_DOT11_FCS_ERROR_COUNT_I0" comment="Received frame FCS error counter."/>
+ <register addr="50220234" rw_flags="R" width="4" name="MAC_DOT11_FCS_GOOD_COUNT_I0" comment="Received frame FCS good counter."/>
+ <register addr="50220238" rw_flags="R" width="4" name="MAC_DOT11_ERROR_COUNT_I0" comment="Received frame error counter that is NOT a FCS error."/>
+ <register addr="5022023c" rw_flags="R" width="4" name="MAC_BAD_SIG_COUNT_I0" comment="Received frame bad signal counter."/>
+ <register addr="50220240" rw_flags="R" width="4" name="MAC_TX_UNDER_COUNT_I0" comment="TX frames which were corrupted by the accelerator due to TX underflow."/>
+ <register addr="50220244" rw_flags="R" width="4" name="MAC_RX_VHT_MU_UNMATCHED_GID_I0" comment="VHT MU frames where GID does not match."/>
+ <register addr="50220248" rw_flags="R" width="2" name="MAC_AC_BK_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_BK queue, in units of 16 us."/>
+ <register addr="5022024c" rw_flags="R" width="4" name="MAC_DOT11_RX_OCTETS_IN_AMPDUS_I0" comment="Counts of the number of octets received in AMPDUs."/>
+ <register addr="50220250" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDUS_COUNT_I0" comment="Counts of the number of received AMPDUs."/>
+ <register addr="50220254" rw_flags="R" width="2" name="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT_I0" comment="Counts of the number of MPDUs received in AMPDUs."/>
+ <register addr="50220258" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT_I0" comment="Counts the number of length errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="5022025c" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT_I0" comment="Counts the number of start spacing errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50220260" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT_I0" comment="Counts the number of VHT single errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50220264" rw_flags="R" width="2" name="MAC_AC_BE_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_BE queue, in units of 16 us."/>
+ <register addr="50220268" rw_flags="R" width="2" name="MAC_AC_VI_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_VI queue, in units of 16 us."/>
+ <register addr="5022026c" rw_flags="R" width="2" name="MAC_AC_VO_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_VO queue, in units of 16 us."/>
+ <register addr="50220270" rw_flags="R" width="2" name="MAC_AC_CBR_TIME_SPENT_I0" comment="This register counts the time spent transmitting from the AC_CBR queue, in units of 16 us."/>
+ <register addr="50220274" rw_flags="R" width="2" name="MAC_TXRX_TIME_SPENT_I0" comment="This register counts the time spent transmitting and receiving, in units of 16 us."/>
+ <register addr="50220278" rw_flags="R" width="2" name="MAC_CCA_BUSY_TIME_I0" comment="This register counts the time CCA indicates busy, in units of 16 us."/>
+ <register addr="5022027c" rw_flags="R" width="2" name="MAC_SEC_BUSY_TIME_I0" comment="This register counts the time secondary channel is busy, in units of 16 us."/>
+ <register addr="50220280" rw_flags="R" width="2" name="MAC_SEC40_BUSY_TIME_I0" comment="This register counts the time secondary40 channel is busy, in units of 16 us."/>
+ <register addr="50220284" rw_flags="R" width="2" name="MAC_SEC80_BUSY_TIME_I0" comment="This register counts the time secondary80 channel is busy, in units of 16 us."/>
+ <register addr="50220288" rw_flags="RW" width="2" name="MAC_DEBUG_MUX_SEL_I0" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="5022028c" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_CFG_I0" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="50220290" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_SOURCE_I0" comment="For edge trigger modes, a '1' selects the source. For logic trigger modes, a '1' defines input."/>
+ <register addr="50220294" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_LEVEL_I0" comment="For logic trigger modes, each bit defines level for logic."/>
+ <register addr="50220298" rw_flags="RW" width="1" name="MAC_DEBUG_SELECT_I0" comment="Select register for MAC debug multiplexer."/>
+ <register addr="5022029c" rw_flags="R" width="2" name="MAC_DEBUG_X00_I0" comment="Debug bus."/>
+ <register addr="502202a0" rw_flags="R" width="2" name="MAC_DEBUG_X01_I0" comment="Debug bus."/>
+ <register addr="502202a4" rw_flags="R" width="2" name="MAC_DEBUG_X02_I0" comment="Debug bus."/>
+ <register addr="502202a8" rw_flags="R" width="2" name="MAC_DEBUG_X03_I0" comment="Debug bus."/>
+ <register addr="502202ac" rw_flags="R" width="2" name="MAC_DEBUG_X04_I0" comment="Debug bus."/>
+ <register addr="502202b0" rw_flags="R" width="2" name="MAC_DEBUG_X05_I0" comment="Debug bus."/>
+ <register addr="502202b4" rw_flags="R" width="2" name="MAC_DEBUG_X06_I0" comment="Debug bus."/>
+ <register addr="502202b8" rw_flags="R" width="2" name="MAC_DEBUG_X07_I0" comment="Debug bus."/>
+ <register addr="502202bc" rw_flags="R" width="2" name="MAC_DEBUG_X08_I0" comment="Debug bus."/>
+ <register addr="502202c0" rw_flags="R" width="2" name="MAC_DEBUG_X09_I0" comment="Debug bus."/>
+ <register addr="502202c4" rw_flags="R" width="2" name="MAC_DEBUG_X0A_I0" comment="Debug bus."/>
+ <register addr="502202c8" rw_flags="R" width="2" name="MAC_DEBUG_X0B_I0" comment="Debug bus."/>
+ <register addr="502202cc" rw_flags="R" width="2" name="MAC_DEBUG_X0C_I0" comment="Debug bus."/>
+ <register addr="502202d0" rw_flags="R" width="2" name="MAC_DEBUG_X0D_I0" comment="Debug bus."/>
+ <register addr="502202d4" rw_flags="R" width="2" name="MAC_DEBUG_X0E_I0" comment="Debug bus."/>
+ <register addr="502202d8" rw_flags="R" width="2" name="MAC_DEBUG_X0F_I0" comment="Debug bus."/>
+ <register addr="502202dc" rw_flags="R" width="2" name="MAC_DEBUG_X10_I0" comment="Debug bus."/>
+ <register addr="502202e0" rw_flags="R" width="2" name="MAC_DEBUG_X11_I0" comment="Debug bus."/>
+ <register addr="502202e4" rw_flags="R" width="2" name="MAC_DEBUG_X12_I0" comment="Debug bus."/>
+ <register addr="502202e8" rw_flags="R" width="2" name="MAC_DEBUG_X13_I0" comment="Debug bus."/>
+ <register addr="502202ec" rw_flags="R" width="2" name="MAC_DEBUG_X14_I0" comment="Debug bus."/>
+ <register addr="502202f0" rw_flags="R" width="2" name="MAC_DEBUG_X15_I0" comment="Debug bus."/>
+ <register addr="502202f4" rw_flags="R" width="2" name="MAC_DEBUG_X16_I0" comment="Debug bus."/>
+ <register addr="502202f8" rw_flags="R" width="2" name="MAC_DEBUG_X17_I0" comment="Debug bus."/>
+ <register addr="502202fc" rw_flags="R" width="2" name="MAC_DEBUG_X18_I0" comment="Debug bus."/>
+ <register addr="50220300" rw_flags="R" width="2" name="MAC_DEBUG_X19_I0" comment="Debug bus."/>
+ <register addr="50220304" rw_flags="R" width="2" name="MAC_DEBUG_X1A_I0" comment="Debug bus."/>
+ <register addr="50220308" rw_flags="R" width="2" name="MAC_DEBUG_X1B_I0" comment="Debug bus."/>
+ <register addr="5022030c" rw_flags="R" width="2" name="MAC_DEBUG_X1C_I0" comment="Debug bus."/>
+ <register addr="50220310" rw_flags="R" width="2" name="MAC_DEBUG_X1D_I0" comment="Debug bus."/>
+ <register addr="50220314" rw_flags="R" width="2" name="MAC_DEBUG_X1E_I0" comment="Debug bus."/>
+ <register addr="50220318" rw_flags="R" width="2" name="MAC_DEBUG_X1F_I0" comment="Debug bus."/>
+ <register addr="5022031c" rw_flags="R" width="2" name="MAC_DEBUG_X20_I0" comment="Debug bus."/>
+ <register addr="50220320" rw_flags="R" width="2" name="MAC_DEBUG_X21_I0" comment="Debug bus."/>
+ <register addr="50220324" rw_flags="R" width="2" name="MAC_DEBUG_X22_I0" comment="Debug bus."/>
+ <register addr="50220328" rw_flags="R" width="2" name="MAC_DEBUG_X23_I0" comment="Debug bus."/>
+ <register addr="5022032c" rw_flags="R" width="2" name="MAC_DEBUG_X24_I0" comment="Debug bus."/>
+ <register addr="50220330" rw_flags="R" width="2" name="MAC_DEBUG_X25_I0" comment="Debug bus."/>
+ <register addr="50220334" rw_flags="R" width="2" name="MAC_DEBUG_X26_I0" comment="Debug bus."/>
+ <register addr="50220338" rw_flags="R" width="2" name="MAC_DEBUG_X27_I0" comment="Debug bus."/>
+ <register addr="5022033c" rw_flags="R" width="2" name="MAC_DEBUG_X28_I0" comment="Debug bus."/>
+ <register addr="50220340" rw_flags="R" width="2" name="MAC_DEBUG_X29_I0" comment="Debug bus."/>
+ <register addr="50220344" rw_flags="R" width="2" name="MAC_DEBUG_X2A_I0" comment="Debug bus."/>
+ <register addr="50220348" rw_flags="R" width="2" name="MAC_DEBUG_X2B_I0" comment="Debug bus."/>
+ <register addr="5022034c" rw_flags="R" width="2" name="MAC_DEBUG_X2C_I0" comment="Debug bus."/>
+ <register addr="50220350" rw_flags="R" width="2" name="MAC_DEBUG_X2D_I0" comment="Debug bus."/>
+ <register addr="50220354" rw_flags="R" width="2" name="MAC_DEBUG_X2E_I0" comment="Debug bus."/>
+ <register addr="50220358" rw_flags="R" width="2" name="MAC_DEBUG_X2F_I0" comment="Debug bus."/>
+ <register addr="5022035c" rw_flags="R" width="2" name="MAC_DEBUG_X30_I0" comment="Debug bus."/>
+ <register addr="50220360" rw_flags="R" width="2" name="MAC_DEBUG_X31_I0" comment="Debug bus."/>
+ <register addr="50220364" rw_flags="R" width="2" name="MAC_DEBUG_X32_I0" comment="Debug bus."/>
+ <register addr="50220368" rw_flags="R" width="2" name="MAC_DEBUG_X33_I0" comment="Debug bus."/>
+ <register addr="5022036c" rw_flags="R" width="2" name="MAC_DEBUG_X34_I0" comment="Debug bus."/>
+ <register addr="50220370" rw_flags="R" width="2" name="MAC_DEBUG_X35_I0" comment="Debug bus."/>
+ <register addr="50220374" rw_flags="R" width="2" name="MAC_DEBUG_X36_I0" comment="Debug bus."/>
+ <register addr="50220378" rw_flags="R" width="2" name="MAC_DEBUG_X37_I0" comment="Debug bus."/>
+ <register addr="5022037c" rw_flags="R" width="1" name="MAC_SM_STATE_PHY_INTERFACE_I0" comment="State of state machine."/>
+ <register addr="50220380" rw_flags="R" width="1" name="MAC_SM_STATE_VALIDATE_MPDU_I0" comment="State of state machine."/>
+ <register addr="50220384" rw_flags="R" width="1" name="MAC_SM_STATE_FILTER_MPDU_I0" comment="State of state machine."/>
+ <register addr="50220388" rw_flags="R" width="1" name="MAC_SM_STATE_DEFRAGMENT_I0" comment="State of state machine."/>
+ <register addr="5022038c" rw_flags="R" width="1" name="MAC_SM_STATE_RX_COORDINATION_I0" comment="State of state machine."/>
+ <register addr="50220390" rw_flags="R" width="1" name="MAC_SM_STATE_CHANNEL_STATE_I0" comment="State of state machine."/>
+ <register addr="50220394" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BE_I0" comment="State of state machine."/>
+ <register addr="50220398" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BK_I0" comment="State of state machine."/>
+ <register addr="5022039c" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VI_I0" comment="State of state machine."/>
+ <register addr="502203a0" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VO_I0" comment="State of state machine."/>
+ <register addr="502203a4" rw_flags="R" width="1" name="MAC_SM_STATE_DATA_PUMP_I0" comment="State of state machine."/>
+ <register addr="502203a8" rw_flags="R" width="1" name="MAC_SM_STATE_TX_COORDINATION_I0" comment="State of state machine."/>
+ <register addr="502203ac" rw_flags="R" width="1" name="MAC_SM_STATE_TX_AGGREGATION_I0" comment="State of state machine."/>
+ <register addr="502203b0" rw_flags="R" width="1" name="MAC_SM_STATE_RX_DEAGGREGATION_I0" comment="State of state machine."/>
+ <register addr="502203b4" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMA_I0" comment="Time of last A modem start of packet."/>
+ <register addr="502203b8" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMB_I0" comment="Time of last B modem start of packet."/>
+ <register addr="502203bc" rw_flags="R" width="4" name="PDU_LAST_CBR_REQ_I0" comment="Time of last TX request on the CBR queue."/>
+ <register addr="502203c0" rw_flags="RW" width="4" name="MAC_BA_RX_0_PEER_ADDRESS_LSB_I0" comment="BA RX 0 peer address [31:0]"/>
+ <register addr="502203c4" rw_flags="RW" width="2" name="MAC_BA_RX_0_PEER_ADDRESS_MSB_I0" comment="BA RX 0 peer address [47:32]"/>
+ <register addr="502203c8" rw_flags="RW" width="4" name="MAC_BA_RX_0_CONFIG_I0" comment="BA RX 0 configuration"/>
+ <register addr="502203cc" rw_flags="RW" width="4" name="MAC_BA_RX_1_PEER_ADDRESS_LSB_I0" comment="BA RX 1 peer address [31:0]"/>
+ <register addr="502203d0" rw_flags="RW" width="2" name="MAC_BA_RX_1_PEER_ADDRESS_MSB_I0" comment="BA RX 1 peer address [47:32]"/>
+ <register addr="502203d4" rw_flags="RW" width="4" name="MAC_BA_RX_1_CONFIG_I0" comment="BA RX 1 configuration"/>
+ <register addr="502203d8" rw_flags="RW" width="4" name="MAC_BA_RX_2_PEER_ADDRESS_LSB_I0" comment="BA RX 2 peer address [31:0]"/>
+ <register addr="502203dc" rw_flags="RW" width="2" name="MAC_BA_RX_2_PEER_ADDRESS_MSB_I0" comment="BA RX 2 peer address [47:32]"/>
+ <register addr="502203e0" rw_flags="RW" width="4" name="MAC_BA_RX_2_CONFIG_I0" comment="BA RX 2 configuration"/>
+ <register addr="502203e4" rw_flags="RW" width="4" name="MAC_BA_RX_3_PEER_ADDRESS_LSB_I0" comment="BA RX 3 peer address [31:0]"/>
+ <register addr="502203e8" rw_flags="RW" width="2" name="MAC_BA_RX_3_PEER_ADDRESS_MSB_I0" comment="BA RX 3 peer address [47:32]"/>
+ <register addr="502203ec" rw_flags="RW" width="4" name="MAC_BA_RX_3_CONFIG_I0" comment="BA RX 3 configuration"/>
+ <register addr="502203f0" rw_flags="RW" width="4" name="MAC_BA_RX_4_PEER_ADDRESS_LSB_I0" comment="BA RX 4 peer address [31:0]"/>
+ <register addr="502203f4" rw_flags="RW" width="2" name="MAC_BA_RX_4_PEER_ADDRESS_MSB_I0" comment="BA RX 4 peer address [47:32]"/>
+ <register addr="502203f8" rw_flags="RW" width="4" name="MAC_BA_RX_4_CONFIG_I0" comment="BA RX 4 configuration"/>
+ <register addr="502203fc" rw_flags="RW" width="4" name="MAC_BA_RX_5_PEER_ADDRESS_LSB_I0" comment="BA RX 5 peer address [31:0]"/>
+ <register addr="50220400" rw_flags="RW" width="2" name="MAC_BA_RX_5_PEER_ADDRESS_MSB_I0" comment="BA RX 5 peer address [47:32]"/>
+ <register addr="50220404" rw_flags="RW" width="4" name="MAC_BA_RX_5_CONFIG_I0" comment="BA RX 5 configuration"/>
+ <register addr="50220408" rw_flags="RW" width="4" name="MAC_BA_RX_6_PEER_ADDRESS_LSB_I0" comment="BA RX 6 peer address [31:0]"/>
+ <register addr="5022040c" rw_flags="RW" width="2" name="MAC_BA_RX_6_PEER_ADDRESS_MSB_I0" comment="BA RX 6 peer address [47:32]"/>
+ <register addr="50220410" rw_flags="RW" width="4" name="MAC_BA_RX_6_CONFIG_I0" comment="BA RX 6 configuration"/>
+ <register addr="50220414" rw_flags="RW" width="4" name="MAC_BA_RX_7_PEER_ADDRESS_LSB_I0" comment="BA RX 7 peer address [31:0]"/>
+ <register addr="50220418" rw_flags="RW" width="2" name="MAC_BA_RX_7_PEER_ADDRESS_MSB_I0" comment="BA RX 7 peer address [47:32]"/>
+ <register addr="5022041c" rw_flags="RW" width="4" name="MAC_BA_RX_7_CONFIG_I0" comment="BA RX 7 configuration"/>
+ <register addr="50220420" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_LSB_I0" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [31:0]"/>
+ <register addr="50220424" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_MSB_I0" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [63:32]"/>
+ <register addr="50220428" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_LSB_I0" comment="Current BA RX bitmap from the selected instance. [31:0]"/>
+ <register addr="5022042c" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_MSB_I0" comment="Current BA RX bitmap from the selected instance. [61:32]"/>
+ <register addr="50220430" rw_flags="RW" width="1" name="MAC_BA_RX_BITMAP_SELECT_I0" comment="Select which BA RX instance has its bitmap readable on MAC_BA_RX_BITMAP."/>
+ <register addr="50220434" rw_flags="RW" width="1" name="MAC_CHANGE_NAV_SOURCE_I0" comment="NAV Source"/>
+ <register addr="50220438" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_BSSID_LSB_I0" comment="BSSID [31:0]"/>
+ <register addr="5022043c" rw_flags="RW" width="2" name="MAC_CHANGE_NAV_BSSID_MSB_I0" comment="BSSID [47:32]"/>
+ <register addr="50220440" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_END_I0" comment="NAV End"/>
+ <register addr="50220444" rw_flags="RW" width="2" name="MAC_CHANGE_STATE_I0" comment="Change internal states"/>
+ </block>
+ <block name="wl_mac_acc_1" comment="">
+ <register addr="50320000" rw_flags="RW" width="1" name="MAC_ACC_CONTROL_I1" comment="Resets and enables the MAC accelerator."/>
+ <register addr="50320004" rw_flags="R" width="1" name="MAC_BA_TX_ACTIVITY_I1" comment="MAC BA_TX activity status."/>
+ <register addr="50320008" rw_flags="RW" width="2" name="MAC_BA_ENABLE_I1" comment="Enables for the BA_RX/BA_TX instances."/>
+ <register addr="5032000c" rw_flags="RW" width="1" name="MAC_MODULE_RESET_I1" comment="This register can be used to reset MAC submodules individually [one at a time]."/>
+ <register addr="50320010" rw_flags="RW" width="2" name="MAC_CLOCK_DISABLE_I1" comment="Clock disable signals that control the local clock gating logic of MAC submodules."/>
+ <register addr="50320014" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS_BYTE3_0_I1" comment="Primary MAC address"/>
+ <register addr="50320018" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS_BYTE5_4_I1" comment="Primary MAC address"/>
+ <register addr="5032001c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS1_BYTE3_0_I1" comment="MAC address #1"/>
+ <register addr="50320020" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS1_BYTE5_4_I1" comment="MAC address #1"/>
+ <register addr="50320024" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS2_BYTE3_0_I1" comment="MAC address #2"/>
+ <register addr="50320028" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS2_BYTE5_4_I1" comment="MAC address #2"/>
+ <register addr="5032002c" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_BYTE3_0_I1" comment="MAC address #3"/>
+ <register addr="50320030" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_BYTE5_4_I1" comment="MAC address #3"/>
+ <register addr="50320034" rw_flags="RW" width="4" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE3_0_I1" comment="If a bit is set, then that bit"/>
+ <register addr="50320038" rw_flags="RW" width="2" name="MAC_STATION_MAC_ADDRESS3_MASK_BYTE5_4_I1" comment="is ignored for receive Address1 matching."/>
+ <register addr="5032003c" rw_flags="RW" width="1" name="MAC_STATION_ADDRESS_CONFIG_I1" comment="Configures receive Address1 matching on our MAC addresses."/>
+ <register addr="50320040" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320044" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320048" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5032004c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR1_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320050" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320054" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR2_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320058" rw_flags="RW" width="4" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE3_0_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="5032005c" rw_flags="RW" width="2" name="MAC_GROUP_PLAY_PEER_ADDR3_BYTE5_4_I1" comment="Group Play Transmit Leader MAC address"/>
+ <register addr="50320060" rw_flags="RW" width="1" name="MAC_GRP_ACK_CONFIG_I1" comment="Configures immediate ACK behaviour for reception of Group Addressed frames"/>
+ <register addr="50320064" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_MANAGEMENT_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320068" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_CONTROL_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="5032006c" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_DATA_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320070" rw_flags="RW" width="2" name="MAC_GRP_ACK_TYPE_RESERVED_SUBTYPE_EN_I1" comment="Each bit corresponds to a data subtype. If set to 1, it means that subtype will get ACKed."/>
+ <register addr="50320074" rw_flags="RW" width="4" name="MAC_BSSID_BYTE3_0_I1" comment="BSSID"/>
+ <register addr="50320078" rw_flags="RW" width="2" name="MAC_BSSID_BYTE5_4_I1" comment="BSSID"/>
+ <register addr="5032007c" rw_flags="RW" width="4" name="MAC_ALT_BSSID_BYTE3_0_I1" comment="Alternative BSSID"/>
+ <register addr="50320080" rw_flags="RW" width="2" name="MAC_ALT_BSSID_BYTE5_4_I1" comment="Alternative BSSID"/>
+ <register addr="50320084" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_01MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320088" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_02MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5032008c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_5M5BPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320090" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_11MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320094" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_06MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="50320098" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_09MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="5032009c" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_12MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_18MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a4" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_24MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200a8" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_36MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200ac" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_48MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200b0" rw_flags="RW" width="2" name="MAC_RESPONSE_RATES_54MBPS_I1" comment="Non-HT response rates associated with primary and secondary MAC addresses."/>
+ <register addr="503200b4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS0_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200b8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS1_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200bc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS2_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS3_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS4_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200c8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS5_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200cc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS6_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS7_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS8_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200d8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS9_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200dc" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS10_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS11_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS12_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200e8" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS13_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200ec" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS14_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f0" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS15_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f4" rw_flags="RW" width="2" name="MAC_HT_RESPONSE_RATES_MCS32_I1" comment="HT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200f8" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="503200fc" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320100" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320104" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320108" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032010c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320110" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320114" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320118" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032011c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320120" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS0_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320124" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS1_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320128" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS2_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032012c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS3_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320130" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS4_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320134" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS5_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320138" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS6_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="5032013c" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS7_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320140" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS8_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320144" rw_flags="RW" width="2" name="MAC_VHT_RESPONSE_RATES_MCS9_NSS2_I1" comment="VHT response rates tables associated with primary and secondary MAC addresses."/>
+ <register addr="50320148" rw_flags="RW" width="2" name="MAC_CTRL_MAC2_FLAGS_I1" comment="Flags [Configuration bits] register 2"/>
+ <register addr="5032014c" rw_flags="RW" width="2" name="MAC_CTRL_MAC3_FLAGS_I1" comment="Flags [Configuration bits] register 3"/>
+ <register addr="50320150" rw_flags="RW" width="2" name="MAC_CTRL_MAC4_FLAGS_I1" comment="Flags [Configuration bits] register 4"/>
+ <register addr="50320154" rw_flags="RW" width="2" name="MAC_CTRL_MAC5_FLAGS_I1" comment="Flags [Configuration bits] register 5"/>
+ <register addr="50320158" rw_flags="RW" width="2" name="MAC_CTRL_MAC6_FLAGS_I1" comment="Flags [Configuration bits] register 6"/>
+ <register addr="5032015c" rw_flags="RW" width="2" name="MAC_CTRL_MAC7_FLAGS_I1" comment="Flags [Configuration bits] register 7"/>
+ <register addr="50320160" rw_flags="RW" width="2" name="MAC_CTRL_MAC10_FLAGS_I1" comment="Flags [Configuration bits] register 10"/>
+ <register addr="50320164" rw_flags="RW" width="2" name="MAC_CTRL_MAC11_FLAGS_I1" comment="Flags [Configuration bits] register 11 (This replaces some ACTING_AS_AP functionality by splitting it into several programmable bits."/>
+ <register addr="50320168" rw_flags="RW" width="2" name="MAC_CTRL_MAC12_FLAGS_I1" comment="Flags [Configuration bits] register 12."/>
+ <register addr="5032016c" rw_flags="RW" width="2" name="MAC_RX_FILTER_CONFIG_I1" comment="RX filter configuration"/>
+ <register addr="50320170" rw_flags="RW" width="2" name="MAC_MIN_MPDU_LEN_I1" comment="Minimum RX MPDU length. Received MPDUs shorter than this are discarded."/>
+ <register addr="50320174" rw_flags="RW" width="2" name="MAC_MAX_MPDU_LEN_I1" comment="Maximum RX MPDU length. Received MPDUs longer than this are discarded."/>
+ <register addr="50320178" rw_flags="RW" width="2" name="MAC_CCA_CFG_I1" comment="Configures CCA utilisation."/>
+ <register addr="5032017c" rw_flags="RW" width="2" name="MAC_CTRL_RESPONSE_TX_LEVEL_I1" comment="Transmit level for control response frames."/>
+ <register addr="50320180" rw_flags="RW" width="1" name="MAC_CTRL_RESPONSE_TX_ANT_I1" comment="Transmit antenna configuration for control response frames."/>
+ <register addr="50320184" rw_flags="RW" width="2" name="MAC_AC_BK_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_BK EDCA queue."/>
+ <register addr="50320188" rw_flags="RW" width="2" name="MAC_AC_BE_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_BE EDCA queue."/>
+ <register addr="5032018c" rw_flags="RW" width="2" name="MAC_AC_VI_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_VI EDCA queue."/>
+ <register addr="50320190" rw_flags="RW" width="2" name="MAC_AC_VO_TXOP_LIMIT_I1" comment="TXOP limit in units of 32 us for the AC_VO EDCA queue."/>
+ <register addr="50320194" rw_flags="R" width="2" name="MAC_TXOP_TIME_LEFT_I1" comment="The firmware can read from this register the time remaining in the current TXOP, in units of 1 us."/>
+ <register addr="50320198" rw_flags="RW" width="2" name="MAC_EIFS_I1" comment="Programmable EIFS"/>
+ <register addr="5032019c" rw_flags="RW" width="1" name="MAC_SLOT_TIME_US_I1" comment="Programmable slot time in us"/>
+ <register addr="503201a0" rw_flags="RW" width="2" name="MAC_NDP_MCS_I1" comment="Programs MCS used for HT NDP or VHT NDP transmission."/>
+ <register addr="503201a4" rw_flags="RW" width="2" name="MAC_BFER_CFG_I1" comment="Configures beamformer."/>
+ <register addr="503201a8" rw_flags="RW" width="2" name="MAC_BFEE_CFG_I1" comment="Configures beamformee."/>
+ <register addr="503201ac" rw_flags="RW" width="2" name="MAC_MCS_FEEDBACK_CONFIG_I1" comment="MCS feedback configuration"/>
+ <register addr="503201b0" rw_flags="RW" width="4" name="MAC_TID_QSIZE_MAP_I1" comment="Maps one of 16 TIDs to one of four queue sizes, for the purpose of setting the 'Queue Size' field in transmitted QoS frames."/>
+ <register addr="503201b4" rw_flags="RW" width="4" name="MAC_TID_QSIZE_I1" comment="Queue sizes numbers 0, 1, 2 and 3."/>
+ <register addr="503201b8" rw_flags="R" width="4" name="MAC_M_NAV_END_I1" comment="The firmware can read from this register the NAV end time."/>
+ <register addr="503201bc" rw_flags="R" width="4" name="MAC_NAV_BSSID_BYTE3_0_I1" comment="The firmware can read from this register the BSSID associated to the current NAV."/>
+ <register addr="503201c0" rw_flags="R" width="2" name="MAC_NAV_BSSID_BYTE5_4_I1" comment=""/>
+ <register addr="503201c4" rw_flags="R" width="4" name="MAC_TXOPHOLDER_BYTE3_0_I1" comment="The firmware can read from this register the TXOP holder associated to the current NAV."/>
+ <register addr="503201c8" rw_flags="R" width="2" name="MAC_TXOPHOLDER_BYTE5_4_I1" comment=""/>
+ <register addr="503201cc" rw_flags="R" width="1" name="MAC_NAV_SRC_I1" comment="NAV sources. See 802.11-1999 as amended in 802.11-2007."/>
+ <register addr="503201d0" rw_flags="RW" width="4" name="MAC_TX_SIFS_REF_I1" comment="Adjust the timing of Data frame following a CTS-to-self. This is nominally the time between the on-air end of frame to the point when MAC issues PHY RX End signal. This is measured in 25 ns units."/>
+ <register addr="503201d4" rw_flags="RW" width="4" name="MAC_TX_RIFS_REF_I1" comment="Adjust TX timing references to achieve RIFS transmission. This is 25 ns units."/>
+ <register addr="503201d8" rw_flags="RW" width="2" name="MAC_RESPONSE_DELAY_SIFS_I1" comment="Bits 7 down to 0 are programmable time in 25ns units to delay response frames such that SIFS is met. Bit 8 allows timing at the end of HT-MM short GI frames to be measured on 4us symbol boundaries. This affects SIFS timing of short GI frames."/>
+ <register addr="503201dc" rw_flags="RW" width="2" name="MAC_TXEND_LATENCY_I1" comment="The time between the modem sending a 'TX End' signal to the actual on-air end of frame. This is measured in 25 ns units. This is used as an 'off-air' indicator. "/>
+ <register addr="503201e0" rw_flags="RW" width="4" name="MAC_CSTATE_IFS_ADJUST_I1" comment="Adjust IFS timing for in channel state module"/>
+ <register addr="503201e4" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_11B_I1" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+) for 11b. This adjusts the position of the PHY preamble."/>
+ <register addr="503201e8" rw_flags="RW" width="2" name="MAC_PHYIF_SYMB_END_11B_I1" comment="Programmable time that adjust 11b RX latency to meet SIFS. The format is 4.6 unsigned. The integer part is in microseconds. The fractional part is in 25 ns."/>
+ <register addr="503201ec" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_START_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol start time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="503201f0" rw_flags="RW" width="1" name="MAC_PHYIF_SYMB_END_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE (+/-) for OFDM."/>
+ <register addr="503201f4" rw_flags="RW" width="1" name="MAC_PHYIF_STBC_WITH_LDPC_SYMB_END_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the symbol end time in MAC_PHY_INTERFACE for a received frame containing both STBC and LDPC (+/-) for OFDM."/>
+ <register addr="503201f8" rw_flags="RW" width="2" name="MAC_PHYIF_STBC_LDPC_SYMB_END_ADJUST_I1" comment="Programmable time in 25us units that adjusts the symbol end time in MAC_PHY_INTERFACE for STBC or LDPC reception (+/-) for OFDM."/>
+ <register addr="503201fc" rw_flags="RW" width="1" name="MAC_PHYIF_RXSTART_ADJUST_I1" comment="Programmable time in 1us unit that adjusts the RX_START start time in MAC_PHY_INTERFACE."/>
+ <register addr="50320200" rw_flags="RW" width="1" name="MAC_TX_CTSRESPONSE_ADJUST_I1" comment="Programmable time in 25ns units that adjusts the start of the TX of the frame sent at SIFS after a CTS TX or RX."/>
+ <register addr="50320204" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11A_I1" comment="Programmable time in us that the MAC waits for a response in 11a."/>
+ <register addr="50320208" rw_flags="RW" width="2" name="MAC_RESPONSE_TIMEOUT_11B_I1" comment="Programmable time in us that the MAC waits for a response in 11b."/>
+ <register addr="5032020c" rw_flags="RW" width="2" name="MAC_RX_AMPDU_CFG_I1" comment="Receive A-MPDU configuration."/>
+ <register addr="50320210" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_I1" comment="Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop."/>
+ <register addr="50320214" rw_flags="RW" width="2" name="MAC_SEC_CHAN_CLEAR_TIME_CTS_I1" comment="The bottom 10 bits means secondary channel must be free for this amount of time (50ns unit) before it is declared non-busy for CTS response to a RTS signalling TA. Bits [13:10] is a signed number that adjusts the delay between the start of frame and the synchronisation start pulse from the modem."/>
+ <register addr="50320218" rw_flags="RW" width="2" name="MAC_TX_DELAY_FINE_TUNE_I1" comment="Transmit delay fine tune. Provides fine adjustment of inter-frame spacing."/>
+ <register addr="5032021c" rw_flags="RW" width="2" name="MAC_CS_LATENCY_I1" comment="CS latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to stretch CCA status from CS latency to nominal OFDM RX latency."/>
+ <register addr="50320220" rw_flags="RW" width="2" name="MAC_RADIO_SYNC_LATENCY_I1" comment="Radio sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between modem indicates CCA busy to the start of packet pulse."/>
+ <register addr="50320224" rw_flags="RW" width="2" name="MAC_MODEM_SYNC_LATENCY_I1" comment="Modem sync latency in units of 25 ns: time that medium is still marked busy after CS becomes inactive. The purpose of this is to cover the time between OFDM STF sync to the start of packet pulse."/>
+ <register addr="50320228" rw_flags="RW" width="1" name="MAC_DEFAULT_AMPDU_DURATION_I1" comment="This is the duration of an A-MPDU frame exchange when it is the next frame from the frame at the head of a queue."/>
+ <register addr="5032022c" rw_flags="RW" width="4" name="MAC_MAX_ACK_DURATION_I1" comment="Maximum ACK duration for DSSS/CCK and OFDM."/>
+ <register addr="50320230" rw_flags="R" width="4" name="MAC_DOT11_FCS_ERROR_COUNT_I1" comment="Received frame FCS error counter."/>
+ <register addr="50320234" rw_flags="R" width="4" name="MAC_DOT11_FCS_GOOD_COUNT_I1" comment="Received frame FCS good counter."/>
+ <register addr="50320238" rw_flags="R" width="4" name="MAC_DOT11_ERROR_COUNT_I1" comment="Received frame error counter that is NOT a FCS error."/>
+ <register addr="5032023c" rw_flags="R" width="4" name="MAC_BAD_SIG_COUNT_I1" comment="Received frame bad signal counter."/>
+ <register addr="50320240" rw_flags="R" width="4" name="MAC_TX_UNDER_COUNT_I1" comment="TX frames which were corrupted by the accelerator due to TX underflow."/>
+ <register addr="50320244" rw_flags="R" width="4" name="MAC_RX_VHT_MU_UNMATCHED_GID_I1" comment="VHT MU frames where GID does not match."/>
+ <register addr="50320248" rw_flags="R" width="2" name="MAC_AC_BK_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_BK queue, in units of 16 us."/>
+ <register addr="5032024c" rw_flags="R" width="4" name="MAC_DOT11_RX_OCTETS_IN_AMPDUS_I1" comment="Counts of the number of octets received in AMPDUs."/>
+ <register addr="50320250" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDUS_COUNT_I1" comment="Counts of the number of received AMPDUs."/>
+ <register addr="50320254" rw_flags="R" width="2" name="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT_I1" comment="Counts of the number of MPDUs received in AMPDUs."/>
+ <register addr="50320258" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT_I1" comment="Counts the number of length errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="5032025c" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT_I1" comment="Counts the number of start spacing errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50320260" rw_flags="R" width="2" name="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT_I1" comment="Counts the number of VHT single errors in MPDU delimiters found in received AMPDUs."/>
+ <register addr="50320264" rw_flags="R" width="2" name="MAC_AC_BE_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_BE queue, in units of 16 us."/>
+ <register addr="50320268" rw_flags="R" width="2" name="MAC_AC_VI_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_VI queue, in units of 16 us."/>
+ <register addr="5032026c" rw_flags="R" width="2" name="MAC_AC_VO_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_VO queue, in units of 16 us."/>
+ <register addr="50320270" rw_flags="R" width="2" name="MAC_AC_CBR_TIME_SPENT_I1" comment="This register counts the time spent transmitting from the AC_CBR queue, in units of 16 us."/>
+ <register addr="50320274" rw_flags="R" width="2" name="MAC_TXRX_TIME_SPENT_I1" comment="This register counts the time spent transmitting and receiving, in units of 16 us."/>
+ <register addr="50320278" rw_flags="R" width="2" name="MAC_CCA_BUSY_TIME_I1" comment="This register counts the time CCA indicates busy, in units of 16 us."/>
+ <register addr="5032027c" rw_flags="R" width="2" name="MAC_SEC_BUSY_TIME_I1" comment="This register counts the time secondary channel is busy, in units of 16 us."/>
+ <register addr="50320280" rw_flags="R" width="2" name="MAC_SEC40_BUSY_TIME_I1" comment="This register counts the time secondary40 channel is busy, in units of 16 us."/>
+ <register addr="50320284" rw_flags="R" width="2" name="MAC_SEC80_BUSY_TIME_I1" comment="This register counts the time secondary80 channel is busy, in units of 16 us."/>
+ <register addr="50320288" rw_flags="RW" width="2" name="MAC_DEBUG_MUX_SEL_I1" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="5032028c" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_CFG_I1" comment="Multiplexor select for debug bus readable via emulation/ASIC PIOs."/>
+ <register addr="50320290" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_SOURCE_I1" comment="For edge trigger modes, a '1' selects the source. For logic trigger modes, a '1' defines input."/>
+ <register addr="50320294" rw_flags="RW" width="2" name="MAC_DEBUG_TRIG_LEVEL_I1" comment="For logic trigger modes, each bit defines level for logic."/>
+ <register addr="50320298" rw_flags="RW" width="1" name="MAC_DEBUG_SELECT_I1" comment="Select register for MAC debug multiplexer."/>
+ <register addr="5032029c" rw_flags="R" width="2" name="MAC_DEBUG_X00_I1" comment="Debug bus."/>
+ <register addr="503202a0" rw_flags="R" width="2" name="MAC_DEBUG_X01_I1" comment="Debug bus."/>
+ <register addr="503202a4" rw_flags="R" width="2" name="MAC_DEBUG_X02_I1" comment="Debug bus."/>
+ <register addr="503202a8" rw_flags="R" width="2" name="MAC_DEBUG_X03_I1" comment="Debug bus."/>
+ <register addr="503202ac" rw_flags="R" width="2" name="MAC_DEBUG_X04_I1" comment="Debug bus."/>
+ <register addr="503202b0" rw_flags="R" width="2" name="MAC_DEBUG_X05_I1" comment="Debug bus."/>
+ <register addr="503202b4" rw_flags="R" width="2" name="MAC_DEBUG_X06_I1" comment="Debug bus."/>
+ <register addr="503202b8" rw_flags="R" width="2" name="MAC_DEBUG_X07_I1" comment="Debug bus."/>
+ <register addr="503202bc" rw_flags="R" width="2" name="MAC_DEBUG_X08_I1" comment="Debug bus."/>
+ <register addr="503202c0" rw_flags="R" width="2" name="MAC_DEBUG_X09_I1" comment="Debug bus."/>
+ <register addr="503202c4" rw_flags="R" width="2" name="MAC_DEBUG_X0A_I1" comment="Debug bus."/>
+ <register addr="503202c8" rw_flags="R" width="2" name="MAC_DEBUG_X0B_I1" comment="Debug bus."/>
+ <register addr="503202cc" rw_flags="R" width="2" name="MAC_DEBUG_X0C_I1" comment="Debug bus."/>
+ <register addr="503202d0" rw_flags="R" width="2" name="MAC_DEBUG_X0D_I1" comment="Debug bus."/>
+ <register addr="503202d4" rw_flags="R" width="2" name="MAC_DEBUG_X0E_I1" comment="Debug bus."/>
+ <register addr="503202d8" rw_flags="R" width="2" name="MAC_DEBUG_X0F_I1" comment="Debug bus."/>
+ <register addr="503202dc" rw_flags="R" width="2" name="MAC_DEBUG_X10_I1" comment="Debug bus."/>
+ <register addr="503202e0" rw_flags="R" width="2" name="MAC_DEBUG_X11_I1" comment="Debug bus."/>
+ <register addr="503202e4" rw_flags="R" width="2" name="MAC_DEBUG_X12_I1" comment="Debug bus."/>
+ <register addr="503202e8" rw_flags="R" width="2" name="MAC_DEBUG_X13_I1" comment="Debug bus."/>
+ <register addr="503202ec" rw_flags="R" width="2" name="MAC_DEBUG_X14_I1" comment="Debug bus."/>
+ <register addr="503202f0" rw_flags="R" width="2" name="MAC_DEBUG_X15_I1" comment="Debug bus."/>
+ <register addr="503202f4" rw_flags="R" width="2" name="MAC_DEBUG_X16_I1" comment="Debug bus."/>
+ <register addr="503202f8" rw_flags="R" width="2" name="MAC_DEBUG_X17_I1" comment="Debug bus."/>
+ <register addr="503202fc" rw_flags="R" width="2" name="MAC_DEBUG_X18_I1" comment="Debug bus."/>
+ <register addr="50320300" rw_flags="R" width="2" name="MAC_DEBUG_X19_I1" comment="Debug bus."/>
+ <register addr="50320304" rw_flags="R" width="2" name="MAC_DEBUG_X1A_I1" comment="Debug bus."/>
+ <register addr="50320308" rw_flags="R" width="2" name="MAC_DEBUG_X1B_I1" comment="Debug bus."/>
+ <register addr="5032030c" rw_flags="R" width="2" name="MAC_DEBUG_X1C_I1" comment="Debug bus."/>
+ <register addr="50320310" rw_flags="R" width="2" name="MAC_DEBUG_X1D_I1" comment="Debug bus."/>
+ <register addr="50320314" rw_flags="R" width="2" name="MAC_DEBUG_X1E_I1" comment="Debug bus."/>
+ <register addr="50320318" rw_flags="R" width="2" name="MAC_DEBUG_X1F_I1" comment="Debug bus."/>
+ <register addr="5032031c" rw_flags="R" width="2" name="MAC_DEBUG_X20_I1" comment="Debug bus."/>
+ <register addr="50320320" rw_flags="R" width="2" name="MAC_DEBUG_X21_I1" comment="Debug bus."/>
+ <register addr="50320324" rw_flags="R" width="2" name="MAC_DEBUG_X22_I1" comment="Debug bus."/>
+ <register addr="50320328" rw_flags="R" width="2" name="MAC_DEBUG_X23_I1" comment="Debug bus."/>
+ <register addr="5032032c" rw_flags="R" width="2" name="MAC_DEBUG_X24_I1" comment="Debug bus."/>
+ <register addr="50320330" rw_flags="R" width="2" name="MAC_DEBUG_X25_I1" comment="Debug bus."/>
+ <register addr="50320334" rw_flags="R" width="2" name="MAC_DEBUG_X26_I1" comment="Debug bus."/>
+ <register addr="50320338" rw_flags="R" width="2" name="MAC_DEBUG_X27_I1" comment="Debug bus."/>
+ <register addr="5032033c" rw_flags="R" width="2" name="MAC_DEBUG_X28_I1" comment="Debug bus."/>
+ <register addr="50320340" rw_flags="R" width="2" name="MAC_DEBUG_X29_I1" comment="Debug bus."/>
+ <register addr="50320344" rw_flags="R" width="2" name="MAC_DEBUG_X2A_I1" comment="Debug bus."/>
+ <register addr="50320348" rw_flags="R" width="2" name="MAC_DEBUG_X2B_I1" comment="Debug bus."/>
+ <register addr="5032034c" rw_flags="R" width="2" name="MAC_DEBUG_X2C_I1" comment="Debug bus."/>
+ <register addr="50320350" rw_flags="R" width="2" name="MAC_DEBUG_X2D_I1" comment="Debug bus."/>
+ <register addr="50320354" rw_flags="R" width="2" name="MAC_DEBUG_X2E_I1" comment="Debug bus."/>
+ <register addr="50320358" rw_flags="R" width="2" name="MAC_DEBUG_X2F_I1" comment="Debug bus."/>
+ <register addr="5032035c" rw_flags="R" width="2" name="MAC_DEBUG_X30_I1" comment="Debug bus."/>
+ <register addr="50320360" rw_flags="R" width="2" name="MAC_DEBUG_X31_I1" comment="Debug bus."/>
+ <register addr="50320364" rw_flags="R" width="2" name="MAC_DEBUG_X32_I1" comment="Debug bus."/>
+ <register addr="50320368" rw_flags="R" width="2" name="MAC_DEBUG_X33_I1" comment="Debug bus."/>
+ <register addr="5032036c" rw_flags="R" width="2" name="MAC_DEBUG_X34_I1" comment="Debug bus."/>
+ <register addr="50320370" rw_flags="R" width="2" name="MAC_DEBUG_X35_I1" comment="Debug bus."/>
+ <register addr="50320374" rw_flags="R" width="2" name="MAC_DEBUG_X36_I1" comment="Debug bus."/>
+ <register addr="50320378" rw_flags="R" width="2" name="MAC_DEBUG_X37_I1" comment="Debug bus."/>
+ <register addr="5032037c" rw_flags="R" width="1" name="MAC_SM_STATE_PHY_INTERFACE_I1" comment="State of state machine."/>
+ <register addr="50320380" rw_flags="R" width="1" name="MAC_SM_STATE_VALIDATE_MPDU_I1" comment="State of state machine."/>
+ <register addr="50320384" rw_flags="R" width="1" name="MAC_SM_STATE_FILTER_MPDU_I1" comment="State of state machine."/>
+ <register addr="50320388" rw_flags="R" width="1" name="MAC_SM_STATE_DEFRAGMENT_I1" comment="State of state machine."/>
+ <register addr="5032038c" rw_flags="R" width="1" name="MAC_SM_STATE_RX_COORDINATION_I1" comment="State of state machine."/>
+ <register addr="50320390" rw_flags="R" width="1" name="MAC_SM_STATE_CHANNEL_STATE_I1" comment="State of state machine."/>
+ <register addr="50320394" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BE_I1" comment="State of state machine."/>
+ <register addr="50320398" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_BK_I1" comment="State of state machine."/>
+ <register addr="5032039c" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VI_I1" comment="State of state machine."/>
+ <register addr="503203a0" rw_flags="R" width="1" name="MAC_SM_STATE_BACKOFF_VO_I1" comment="State of state machine."/>
+ <register addr="503203a4" rw_flags="R" width="1" name="MAC_SM_STATE_DATA_PUMP_I1" comment="State of state machine."/>
+ <register addr="503203a8" rw_flags="R" width="1" name="MAC_SM_STATE_TX_COORDINATION_I1" comment="State of state machine."/>
+ <register addr="503203ac" rw_flags="R" width="1" name="MAC_SM_STATE_TX_AGGREGATION_I1" comment="State of state machine."/>
+ <register addr="503203b0" rw_flags="R" width="1" name="MAC_SM_STATE_RX_DEAGGREGATION_I1" comment="State of state machine."/>
+ <register addr="503203b4" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMA_I1" comment="Time of last A modem start of packet."/>
+ <register addr="503203b8" rw_flags="R" width="4" name="MAC_RX_LAST_MODEMB_I1" comment="Time of last B modem start of packet."/>
+ <register addr="503203bc" rw_flags="R" width="4" name="PDU_LAST_CBR_REQ_I1" comment="Time of last TX request on the CBR queue."/>
+ <register addr="503203c0" rw_flags="RW" width="4" name="MAC_BA_RX_0_PEER_ADDRESS_LSB_I1" comment="BA RX 0 peer address [31:0]"/>
+ <register addr="503203c4" rw_flags="RW" width="2" name="MAC_BA_RX_0_PEER_ADDRESS_MSB_I1" comment="BA RX 0 peer address [47:32]"/>
+ <register addr="503203c8" rw_flags="RW" width="4" name="MAC_BA_RX_0_CONFIG_I1" comment="BA RX 0 configuration"/>
+ <register addr="503203cc" rw_flags="RW" width="4" name="MAC_BA_RX_1_PEER_ADDRESS_LSB_I1" comment="BA RX 1 peer address [31:0]"/>
+ <register addr="503203d0" rw_flags="RW" width="2" name="MAC_BA_RX_1_PEER_ADDRESS_MSB_I1" comment="BA RX 1 peer address [47:32]"/>
+ <register addr="503203d4" rw_flags="RW" width="4" name="MAC_BA_RX_1_CONFIG_I1" comment="BA RX 1 configuration"/>
+ <register addr="503203d8" rw_flags="RW" width="4" name="MAC_BA_RX_2_PEER_ADDRESS_LSB_I1" comment="BA RX 2 peer address [31:0]"/>
+ <register addr="503203dc" rw_flags="RW" width="2" name="MAC_BA_RX_2_PEER_ADDRESS_MSB_I1" comment="BA RX 2 peer address [47:32]"/>
+ <register addr="503203e0" rw_flags="RW" width="4" name="MAC_BA_RX_2_CONFIG_I1" comment="BA RX 2 configuration"/>
+ <register addr="503203e4" rw_flags="RW" width="4" name="MAC_BA_RX_3_PEER_ADDRESS_LSB_I1" comment="BA RX 3 peer address [31:0]"/>
+ <register addr="503203e8" rw_flags="RW" width="2" name="MAC_BA_RX_3_PEER_ADDRESS_MSB_I1" comment="BA RX 3 peer address [47:32]"/>
+ <register addr="503203ec" rw_flags="RW" width="4" name="MAC_BA_RX_3_CONFIG_I1" comment="BA RX 3 configuration"/>
+ <register addr="503203f0" rw_flags="RW" width="4" name="MAC_BA_RX_4_PEER_ADDRESS_LSB_I1" comment="BA RX 4 peer address [31:0]"/>
+ <register addr="503203f4" rw_flags="RW" width="2" name="MAC_BA_RX_4_PEER_ADDRESS_MSB_I1" comment="BA RX 4 peer address [47:32]"/>
+ <register addr="503203f8" rw_flags="RW" width="4" name="MAC_BA_RX_4_CONFIG_I1" comment="BA RX 4 configuration"/>
+ <register addr="503203fc" rw_flags="RW" width="4" name="MAC_BA_RX_5_PEER_ADDRESS_LSB_I1" comment="BA RX 5 peer address [31:0]"/>
+ <register addr="50320400" rw_flags="RW" width="2" name="MAC_BA_RX_5_PEER_ADDRESS_MSB_I1" comment="BA RX 5 peer address [47:32]"/>
+ <register addr="50320404" rw_flags="RW" width="4" name="MAC_BA_RX_5_CONFIG_I1" comment="BA RX 5 configuration"/>
+ <register addr="50320408" rw_flags="RW" width="4" name="MAC_BA_RX_6_PEER_ADDRESS_LSB_I1" comment="BA RX 6 peer address [31:0]"/>
+ <register addr="5032040c" rw_flags="RW" width="2" name="MAC_BA_RX_6_PEER_ADDRESS_MSB_I1" comment="BA RX 6 peer address [47:32]"/>
+ <register addr="50320410" rw_flags="RW" width="4" name="MAC_BA_RX_6_CONFIG_I1" comment="BA RX 6 configuration"/>
+ <register addr="50320414" rw_flags="RW" width="4" name="MAC_BA_RX_7_PEER_ADDRESS_LSB_I1" comment="BA RX 7 peer address [31:0]"/>
+ <register addr="50320418" rw_flags="RW" width="2" name="MAC_BA_RX_7_PEER_ADDRESS_MSB_I1" comment="BA RX 7 peer address [47:32]"/>
+ <register addr="5032041c" rw_flags="RW" width="4" name="MAC_BA_RX_7_CONFIG_I1" comment="BA RX 7 configuration"/>
+ <register addr="50320420" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_LSB_I1" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [31:0]"/>
+ <register addr="50320424" rw_flags="RW" width="4" name="MAC_BA_RX_CONFIG_BITMAP_MSB_I1" comment="Global bitmap value loaded into every BA RX instance when they are initialised. Can be used for interop recovery. [63:32]"/>
+ <register addr="50320428" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_LSB_I1" comment="Current BA RX bitmap from the selected instance. [31:0]"/>
+ <register addr="5032042c" rw_flags="R" width="4" name="MAC_BA_RX_BITMAP_MSB_I1" comment="Current BA RX bitmap from the selected instance. [61:32]"/>
+ <register addr="50320430" rw_flags="RW" width="1" name="MAC_BA_RX_BITMAP_SELECT_I1" comment="Select which BA RX instance has its bitmap readable on MAC_BA_RX_BITMAP."/>
+ <register addr="50320434" rw_flags="RW" width="1" name="MAC_CHANGE_NAV_SOURCE_I1" comment="NAV Source"/>
+ <register addr="50320438" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_BSSID_LSB_I1" comment="BSSID [31:0]"/>
+ <register addr="5032043c" rw_flags="RW" width="2" name="MAC_CHANGE_NAV_BSSID_MSB_I1" comment="BSSID [47:32]"/>
+ <register addr="50320440" rw_flags="RW" width="4" name="MAC_CHANGE_NAV_END_I1" comment="NAV End"/>
+ <register addr="50320444" rw_flags="RW" width="2" name="MAC_CHANGE_STATE_I1" comment="Change internal states"/>
+ </block>
+ <block name="wl_mac_acc_fast_0" comment="">
+ <register addr="50230000" rw_flags="R" width="4" name="MAC_ACC_STATUS_I0" comment="MAC Accerator status"/>
+ <register addr="50230004" rw_flags="R" width="2" name="MAC_IND_MAC_FLAGS_I0" comment="MAC status register"/>
+ <register addr="50230008" rw_flags="R" width="4" name="MAC_NO_ACK_COUNT_I0" comment="Counts correctly received frames that are not acknowledged because the MAC_IF is short of available receive slots."/>
+ <register addr="5023000c" rw_flags="RW" width="1" name="MAC_PAUSE_TX_QUEUES_I0" comment="Pause Tx queues if they are paused."/>
+ <register addr="50230010" rw_flags="RW" width="1" name="MAC_UNPAUSE_TX_QUEUES_I0" comment="Unpause Tx queues if they are paused."/>
+ <register addr="50230014" rw_flags="R" width="4" name="MAC_TIME_I0" comment="Current time."/>
+ <register addr="50230018" rw_flags="RW" width="4" name="MAC_TIMER_I0" comment="MAC timer can be used by firmware to generate interrupts when the accelerator's time reaches programmable values. This is can be used to achieved timed transmission."/>
+ <register addr="5023001c" rw_flags="RW" width="2" name="MAC_CTRL_MAC_FLAGS_I0" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50230020" rw_flags="RW" width="1" name="MAC_BFEE_FLAGS_I0" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50230024" rw_flags="RW" width="4" name="BFER_MAC_ADDRESS_BYTE3_0_I0" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="50230028" rw_flags="RW" width="2" name="BFER_MAC_ADDRESS_BYTE5_4_I0" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="5023002c" rw_flags="RW" width="4" name="BFEE_MAC_ADDRESS_BYTE3_0_I0" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50230030" rw_flags="RW" width="2" name="BFEE_MAC_ADDRESS_BYTE5_4_I0" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50230034" rw_flags="R" width="1" name="MAC_INT_ERROR_CAUSE_I0" comment="Cause of error in MAC_INT_ERROR"/>
+ <register addr="50230038" rw_flags="R" width="1" name="MAC_INT_TX_DENIED_CAUSE_I0" comment="Cause of error in MAC_INT_TX_DENIED"/>
+ <register addr="5023003c" rw_flags="R" width="4" name="MAC_INT_CAUSE_I0" comment="Interrupt cause register."/>
+ <register addr="50230040" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_LSB_I0" comment="BA TX bitmap bits 31 down to 0"/>
+ <register addr="50230044" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_MSB_I0" comment="BA TX bitmap bits 63 down to 32"/>
+ <register addr="50230048" rw_flags="R" width="4" name="MAC_BA_TX_STATUS_I0" comment="BA TX status information"/>
+ <register addr="5023004c" rw_flags="RW" width="4" name="MAC_INT_MASK_I0" comment="Interrupt mask register."/>
+ <register addr="50230050" rw_flags="RW" width="4" name="MAC_INT_CLEAR_I0" comment="Interrupt clear register"/>
+ <register addr="50230054" rw_flags="RW" width="4" name="MAC_TX_DEADLINE_I0" comment="Sets the transmit deadline with respect to time."/>
+ <register addr="50230058" rw_flags="R" width="4" name="MAC_BE_BK_BKOFF_COUNTER_I0" comment="BE and BK backoff counter"/>
+ <register addr="5023005c" rw_flags="R" width="4" name="MAC_VO_VI_BKOFF_COUNTER_I0" comment="VO and VI backoff counter"/>
+ <register addr="50230060" rw_flags="RW" width="2" name="MAC_BA_TX_MMSS_I0" comment="Sets A-MPDU TX minimum MPDU start spacing in words."/>
+ <register addr="50230064" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[0]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230068" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[1]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023006c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[2]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230070" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[3]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230074" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[4]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230078" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[5]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023007c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[6]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230080" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[7]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230084" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[8]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230088" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[9]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023008c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[10]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230090" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[11]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230094" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[12]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230098" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[13]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023009c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[14]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[15]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[16]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300a8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[17]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300ac" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[18]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[19]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[20]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300b8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[21]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300bc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[22]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[23]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[24]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300c8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[25]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300cc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[26]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[27]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[28]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300d8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[29]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300dc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[30]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[31]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[32]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300e8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[33]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300ec" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[34]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[35]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[36]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300f8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[37]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="502300fc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[38]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230100" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[39]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230104" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[40]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230108" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[41]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023010c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[42]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230110" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[43]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230114" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[44]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230118" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[45]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023011c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[46]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230120" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[47]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230124" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[48]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230128" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[49]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023012c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[50]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230130" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[51]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230134" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[52]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230138" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[53]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023013c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[54]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230140" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[55]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230144" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[56]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230148" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[57]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023014c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[58]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230150" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[59]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230154" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[60]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230158" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[61]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5023015c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[62]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230160" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I0[63]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50230164" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[0]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230168" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[1]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023016c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[2]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230170" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[3]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230174" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[4]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230178" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[5]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023017c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[6]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230180" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[7]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230184" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[8]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230188" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[9]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023018c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[10]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230190" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[11]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230194" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[12]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230198" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[13]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023019c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[14]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[15]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[16]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301a8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[17]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301ac" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[18]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[19]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[20]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301b8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[21]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301bc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[22]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[23]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[24]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301c8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[25]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301cc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[26]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[27]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[28]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301d8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[29]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301dc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[30]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[31]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[32]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301e8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[33]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301ec" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[34]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[35]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[36]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301f8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[37]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="502301fc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[38]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230200" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[39]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230204" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[40]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230208" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[41]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023020c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[42]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230210" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[43]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230214" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[44]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230218" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[45]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023021c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[46]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230220" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[47]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230224" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[48]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230228" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[49]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023022c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[50]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230230" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[51]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230234" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[52]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230238" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[53]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023023c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[54]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230240" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[55]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230244" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[56]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230248" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[57]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023024c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[58]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230250" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[59]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230254" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[60]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230258" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[61]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5023025c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[62]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230260" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I0[63]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50230264" rw_flags="RW" width="2" name="MAC_PDU_CANCEL_I0" comment="PDU cancel bitmap"/>
+ <register addr="50230268" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ADDR_I0" comment="PDU on CBR queue: Start address"/>
+ <register addr="5023026c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ID_LEN_I0" comment="PDU on CBR queue: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230270" rw_flags="RW" width="2" name="MAC_PDU_REQUEST_CBR_TX_RATE_I0" comment="PDU on CBR queue: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230274" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_TX_LEVEL_COEX_I0" comment="PDU on CBR queue: TX level and Coex"/>
+ <register addr="50230278" rw_flags="R" width="1" name="MAC_PDU_CBR_STATUS_I0" comment="CBR status"/>
+ <register addr="5023027c" rw_flags="R" width="1" name="MAC_TX_CBR_STATUS_I0" comment="CBR TX status"/>
+ <register addr="50230280" rw_flags="R" width="1" name="MAC_TX_RESP_STATUS_I0" comment="Resp TX status"/>
+ <register addr="50230284" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[0]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50230288" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[1]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="5023028c" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I0[2]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50230290" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[0]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="50230294" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[0]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230298" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[0]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023029c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[0]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[0]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[1]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="502302ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[1]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[1]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[1]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[1]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I0[2]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="502302c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I0[2]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302c8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I0[2]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302cc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="502302d0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I0[2]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="502302d4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I0[2]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="502302d8" rw_flags="R" width="4" name="MAC_PDU_BK_STATUS_I0" comment="BK status"/>
+ <register addr="502302dc" rw_flags="R" width="4" name="MAC_TX_BK_STATUS_I0" comment="BK TX status from the PHY"/>
+ <register addr="502302e0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[0]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="502302e4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[0]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502302e8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[0]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502302ec" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="502302f0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[0]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="502302f4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[0]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="502302f8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[1]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="502302fc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[1]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230300" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[1]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230304" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50230308" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[1]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="5023030c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[1]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50230310" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I0[2]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="50230314" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I0[2]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230318" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I0[2]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023031c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50230320" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I0[2]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="50230324" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I0[2]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50230328" rw_flags="R" width="4" name="MAC_PDU_BE_STATUS_I0" comment="BE status"/>
+ <register addr="5023032c" rw_flags="R" width="4" name="MAC_TX_BE_STATUS_I0" comment="BE TX status"/>
+ <register addr="50230330" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[0]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50230334" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[0]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230338" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[0]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023033c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230340" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[0]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50230344" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[0]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230348" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[1]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="5023034c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[1]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230350" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[1]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50230354" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230358" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[1]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="5023035c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[1]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230360" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I0[2]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50230364" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I0[2]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230368" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I0[2]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023036c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50230370" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I0[2]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50230374" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I0[2]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50230378" rw_flags="R" width="4" name="MAC_PDU_VI_STATUS_I0" comment="VI status"/>
+ <register addr="5023037c" rw_flags="R" width="4" name="MAC_TX_VI_STATUS_I0" comment="VI TX status"/>
+ <register addr="50230380" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[0]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="50230384" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[0]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50230388" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[0]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5023038c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[0]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="50230390" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[0]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="50230394" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[0]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="50230398" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[1]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="5023039c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[1]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502303a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[1]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502303a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[1]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="502303a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[1]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="502303ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[1]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="502303b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I0[2]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="502303b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I0[2]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="502303b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I0[2]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="502303bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I0[2]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="502303c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I0[2]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="502303c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I0[2]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="502303c8" rw_flags="R" width="4" name="MAC_PDU_VO_STATUS_I0" comment="VO status"/>
+ <register addr="502303cc" rw_flags="R" width="4" name="MAC_TX_VO_STATUS_I0" comment="VO TX status"/>
+ </block>
+ <block name="wl_mac_acc_fast_1" comment="">
+ <register addr="50330000" rw_flags="R" width="4" name="MAC_ACC_STATUS_I1" comment="MAC Accerator status"/>
+ <register addr="50330004" rw_flags="R" width="2" name="MAC_IND_MAC_FLAGS_I1" comment="MAC status register"/>
+ <register addr="50330008" rw_flags="R" width="4" name="MAC_NO_ACK_COUNT_I1" comment="Counts correctly received frames that are not acknowledged because the MAC_IF is short of available receive slots."/>
+ <register addr="5033000c" rw_flags="RW" width="1" name="MAC_PAUSE_TX_QUEUES_I1" comment="Pause Tx queues if they are paused."/>
+ <register addr="50330010" rw_flags="RW" width="1" name="MAC_UNPAUSE_TX_QUEUES_I1" comment="Unpause Tx queues if they are paused."/>
+ <register addr="50330014" rw_flags="R" width="4" name="MAC_TIME_I1" comment="Current time."/>
+ <register addr="50330018" rw_flags="RW" width="4" name="MAC_TIMER_I1" comment="MAC timer can be used by firmware to generate interrupts when the accelerator's time reaches programmable values. This is can be used to achieved timed transmission."/>
+ <register addr="5033001c" rw_flags="RW" width="2" name="MAC_CTRL_MAC_FLAGS_I1" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50330020" rw_flags="RW" width="1" name="MAC_BFEE_FLAGS_I1" comment="Flags [Configuration bits] register 1"/>
+ <register addr="50330024" rw_flags="RW" width="4" name="BFER_MAC_ADDRESS_BYTE3_0_I1" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="50330028" rw_flags="RW" width="2" name="BFER_MAC_ADDRESS_BYTE5_4_I1" comment="The MAC ACC will respond to BF report polls coming from this peer."/>
+ <register addr="5033002c" rw_flags="RW" width="4" name="BFEE_MAC_ADDRESS_BYTE3_0_I1" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50330030" rw_flags="RW" width="2" name="BFEE_MAC_ADDRESS_BYTE5_4_I1" comment="The MAC ACC will tell the PHY to beamform any transmission made to this peer."/>
+ <register addr="50330034" rw_flags="R" width="1" name="MAC_INT_ERROR_CAUSE_I1" comment="Cause of error in MAC_INT_ERROR"/>
+ <register addr="50330038" rw_flags="R" width="1" name="MAC_INT_TX_DENIED_CAUSE_I1" comment="Cause of error in MAC_INT_TX_DENIED"/>
+ <register addr="5033003c" rw_flags="R" width="4" name="MAC_INT_CAUSE_I1" comment="Interrupt cause register."/>
+ <register addr="50330040" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_LSB_I1" comment="BA TX bitmap bits 31 down to 0"/>
+ <register addr="50330044" rw_flags="R" width="4" name="MAC_BA_TX_BITMAP_MSB_I1" comment="BA TX bitmap bits 63 down to 32"/>
+ <register addr="50330048" rw_flags="R" width="4" name="MAC_BA_TX_STATUS_I1" comment="BA TX status information"/>
+ <register addr="5033004c" rw_flags="RW" width="4" name="MAC_INT_MASK_I1" comment="Interrupt mask register."/>
+ <register addr="50330050" rw_flags="RW" width="4" name="MAC_INT_CLEAR_I1" comment="Interrupt clear register"/>
+ <register addr="50330054" rw_flags="RW" width="4" name="MAC_TX_DEADLINE_I1" comment="Sets the transmit deadline with respect to time."/>
+ <register addr="50330058" rw_flags="R" width="4" name="MAC_BE_BK_BKOFF_COUNTER_I1" comment="BE and BK backoff counter"/>
+ <register addr="5033005c" rw_flags="R" width="4" name="MAC_VO_VI_BKOFF_COUNTER_I1" comment="VO and VI backoff counter"/>
+ <register addr="50330060" rw_flags="RW" width="2" name="MAC_BA_TX_MMSS_I1" comment="Sets A-MPDU TX minimum MPDU start spacing in words."/>
+ <register addr="50330064" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[0]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330068" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[1]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033006c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[2]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330070" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[3]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330074" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[4]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330078" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[5]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033007c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[6]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330080" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[7]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330084" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[8]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330088" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[9]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033008c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[10]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330090" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[11]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330094" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[12]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330098" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[13]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033009c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[14]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[15]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[16]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300a8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[17]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300ac" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[18]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[19]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[20]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300b8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[21]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300bc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[22]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[23]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[24]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300c8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[25]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300cc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[26]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[27]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[28]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300d8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[29]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300dc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[30]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[31]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[32]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300e8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[33]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300ec" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[34]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f0" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[35]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f4" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[36]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300f8" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[37]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="503300fc" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[38]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330100" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[39]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330104" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[40]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330108" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[41]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033010c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[42]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330110" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[43]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330114" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[44]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330118" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[45]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033011c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[46]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330120" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[47]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330124" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[48]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330128" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[49]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033012c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[50]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330130" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[51]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330134" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[52]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330138" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[53]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033013c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[54]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330140" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[55]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330144" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[56]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330148" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[57]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033014c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[58]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330150" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[59]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330154" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[60]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330158" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[61]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="5033015c" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[62]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330160" rw_flags="RW" width="2" name="MAC_A_MPDU_TX_LEN_I1[63]" comment="Length (minus FCS) of MPDU in an A-MPDU."/>
+ <register addr="50330164" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[0]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330168" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[1]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033016c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[2]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330170" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[3]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330174" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[4]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330178" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[5]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033017c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[6]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330180" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[7]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330184" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[8]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330188" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[9]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033018c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[10]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330190" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[11]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330194" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[12]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330198" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[13]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033019c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[14]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[15]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[16]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301a8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[17]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301ac" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[18]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[19]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[20]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301b8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[21]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301bc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[22]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[23]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[24]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301c8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[25]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301cc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[26]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[27]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[28]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301d8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[29]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301dc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[30]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[31]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[32]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301e8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[33]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301ec" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[34]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f0" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[35]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f4" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[36]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301f8" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[37]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="503301fc" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[38]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330200" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[39]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330204" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[40]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330208" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[41]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033020c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[42]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330210" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[43]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330214" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[44]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330218" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[45]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033021c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[46]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330220" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[47]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330224" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[48]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330228" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[49]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033022c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[50]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330230" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[51]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330234" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[52]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330238" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[53]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033023c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[54]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330240" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[55]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330244" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[56]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330248" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[57]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033024c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[58]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330250" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[59]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330254" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[60]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330258" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[61]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="5033025c" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[62]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330260" rw_flags="RW" width="4" name="MAC_A_MPDU_TX_ADDR_I1[63]" comment="Start address of MPDU in an A-MPDU."/>
+ <register addr="50330264" rw_flags="RW" width="2" name="MAC_PDU_CANCEL_I1" comment="PDU cancel bitmap"/>
+ <register addr="50330268" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ADDR_I1" comment="PDU on CBR queue: Start address"/>
+ <register addr="5033026c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_ID_LEN_I1" comment="PDU on CBR queue: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330270" rw_flags="RW" width="2" name="MAC_PDU_REQUEST_CBR_TX_RATE_I1" comment="PDU on CBR queue: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330274" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_CBR_TX_LEVEL_COEX_I1" comment="PDU on CBR queue: TX level and Coex"/>
+ <register addr="50330278" rw_flags="R" width="1" name="MAC_PDU_CBR_STATUS_I1" comment="CBR status"/>
+ <register addr="5033027c" rw_flags="R" width="1" name="MAC_TX_CBR_STATUS_I1" comment="CBR TX status"/>
+ <register addr="50330280" rw_flags="R" width="1" name="MAC_TX_RESP_STATUS_I1" comment="Resp TX status"/>
+ <register addr="50330284" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[0]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50330288" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[1]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="5033028c" rw_flags="RW" width="4" name="MAC_PDU_BK_SLOT_BEACON_GEN_TIME_I1[2]" comment="MAC time when the last beacon was generated by firmware."/>
+ <register addr="50330290" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[0]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="50330294" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[0]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330298" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[0]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033029c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[0]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[0]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[1]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="503302ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[1]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[1]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[1]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[1]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ADDR_I1[2]" comment="PDU on BK queue, slot 0: Start address"/>
+ <register addr="503302c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_ID_LEN_I1[2]" comment="PDU on BK queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302c8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_RATE_I1[2]" comment="PDU on BK queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302cc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on BK queue, slot 0: TX level and Coex"/>
+ <register addr="503302d0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_BACKOFF_I1[2]" comment="PDU on BK queue, slot 0: Backoff parameters"/>
+ <register addr="503302d4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BK_SLOT_OPTIONS_I1[2]" comment="PDU on BK queue, slot 0: Options"/>
+ <register addr="503302d8" rw_flags="R" width="4" name="MAC_PDU_BK_STATUS_I1" comment="BK status"/>
+ <register addr="503302dc" rw_flags="R" width="4" name="MAC_TX_BK_STATUS_I1" comment="BK TX status from the PHY"/>
+ <register addr="503302e0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[0]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="503302e4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[0]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503302e8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[0]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503302ec" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="503302f0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[0]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="503302f4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[0]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="503302f8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[1]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="503302fc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[1]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330300" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[1]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330304" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50330308" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[1]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="5033030c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[1]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50330310" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ADDR_I1[2]" comment="PDU on BE queue, slot 0: Start address"/>
+ <register addr="50330314" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_ID_LEN_I1[2]" comment="PDU on BE queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330318" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_RATE_I1[2]" comment="PDU on BE queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033031c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on BE queue, slot 0: TX level and Coex"/>
+ <register addr="50330320" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_BACKOFF_I1[2]" comment="PDU on BE queue, slot 0: Backoff parameters"/>
+ <register addr="50330324" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_BE_SLOT_OPTIONS_I1[2]" comment="PDU on BE queue, slot 0: Options"/>
+ <register addr="50330328" rw_flags="R" width="4" name="MAC_PDU_BE_STATUS_I1" comment="BE status"/>
+ <register addr="5033032c" rw_flags="R" width="4" name="MAC_TX_BE_STATUS_I1" comment="BE TX status"/>
+ <register addr="50330330" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[0]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50330334" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[0]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330338" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[0]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033033c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330340" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[0]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50330344" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[0]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330348" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[1]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="5033034c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[1]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330350" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[1]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="50330354" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330358" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[1]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="5033035c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[1]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330360" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ADDR_I1[2]" comment="PDU on VI queue, slot 0: Start address"/>
+ <register addr="50330364" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_ID_LEN_I1[2]" comment="PDU on VI queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330368" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_RATE_I1[2]" comment="PDU on VI queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033036c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on VI queue, slot 0: TX level and Coex"/>
+ <register addr="50330370" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_BACKOFF_I1[2]" comment="PDU on VI queue, slot 0: Backoff parameters"/>
+ <register addr="50330374" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VI_SLOT_OPTIONS_I1[2]" comment="PDU on VI queue, slot 0: Options"/>
+ <register addr="50330378" rw_flags="R" width="4" name="MAC_PDU_VI_STATUS_I1" comment="VI status"/>
+ <register addr="5033037c" rw_flags="R" width="4" name="MAC_TX_VI_STATUS_I1" comment="VI TX status"/>
+ <register addr="50330380" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[0]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="50330384" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[0]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="50330388" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[0]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="5033038c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[0]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="50330390" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[0]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="50330394" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[0]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="50330398" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[1]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="5033039c" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[1]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503303a0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[1]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503303a4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[1]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="503303a8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[1]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="503303ac" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[1]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="503303b0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ADDR_I1[2]" comment="PDU on VO queue, slot 0: Start address"/>
+ <register addr="503303b4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_ID_LEN_I1[2]" comment="PDU on VO queue, slot 0: VHT Group ID and Partial AID, and Length"/>
+ <register addr="503303b8" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_RATE_I1[2]" comment="PDU on VO queue, slot 0: TX Rate. See MAC_MODULATION_OPTIONS"/>
+ <register addr="503303bc" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_TX_LEVEL_COEX_I1[2]" comment="PDU on VO queue, slot 0: TX level and Coex"/>
+ <register addr="503303c0" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_BACKOFF_I1[2]" comment="PDU on VO queue, slot 0: Backoff parameters"/>
+ <register addr="503303c4" rw_flags="RW" width="4" name="MAC_PDU_REQUEST_VO_SLOT_OPTIONS_I1[2]" comment="PDU on VO queue, slot 0: Options"/>
+ <register addr="503303c8" rw_flags="R" width="4" name="MAC_PDU_VO_STATUS_I1" comment="VO status"/>
+ <register addr="503303cc" rw_flags="R" width="4" name="MAC_TX_VO_STATUS_I1" comment="VO TX status"/>
+ </block>
+ <block name="wl_mac_if_0" comment="">
+ <register addr="50210000" rw_flags="RW" width="1" name="MAC_IF_CONTROL_I0" comment="General control register (state is persistant)"/>
+ <register addr="50210004" rw_flags="RW" width="1" name="MAC_IF_CONTROL_AMNESIC_I0" comment="General control register (state is transitory)"/>
+ <register addr="50210008" rw_flags="R" width="1" name="MAC_IF_STATUS_I0" comment="General status register"/>
+ <register addr="5021000c" rw_flags="RW" width="4" name="MAC_IF_RX_BUFFER_START_I0" comment="Address of start of Receive Buffer. Multiple of 1k. Address = MAC_IF_RX_BUFFER_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210010" rw_flags="RW" width="1" name="MAC_IF_RX_BUFFER_SIZE_I0" comment="Size of Receive Buffer. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210014" rw_flags="R" width="2" name="MAC_IF_RX_BUFFER_GIVE_I0" comment="Receive Buffer Write Pointer (updated only at Receive Dollop boundaries)"/>
+ <register addr="50210018" rw_flags="RW" width="2" name="MAC_IF_RX_BUFFER_TAKE_I0" comment="Receive Buffer Read Pointer"/>
+ <register addr="5021001c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_START_I0" comment="Address of start of Transmit Buffer 0. Multiple of 1k. Address = MAC_IF_TX_BUFFER0_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210020" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER0_SIZE_I0" comment="Size of Transmit Buffer 0. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210024" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_GIVE_I0" comment="Transmit Buffer 0 Write Pointer "/>
+ <register addr="50210028" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER0_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 0. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5021002c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 0 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210030" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_START_I0" comment="Address of start of Transmit Buffer 1. Multiple of 1k. Address = MAC_IF_TX_BUFFER1_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210034" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER1_SIZE_I0" comment="Size of Transmit Buffer 1. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210038" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_GIVE_I0" comment="Transmit Buffer 1 Write Pointer "/>
+ <register addr="5021003c" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER1_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 1. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210040" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 1 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210044" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_START_I0" comment="Address of start of Transmit Buffer 2. Multiple of 1k. Address = MAC_IF_TX_BUFFER2_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210048" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER2_SIZE_I0" comment="Size of Transmit Buffer 2. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="5021004c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_GIVE_I0" comment="Transmit Buffer 2 Write Pointer "/>
+ <register addr="50210050" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER2_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 2. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210054" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 2 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210058" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_START_I0" comment="Address of start of Transmit Buffer 3. Multiple of 1k. Address = MAC_IF_TX_BUFFER3_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="5021005c" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER3_SIZE_I0" comment="Size of Transmit Buffer 3. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210060" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_GIVE_I0" comment="Transmit Buffer 3 Write Pointer "/>
+ <register addr="50210064" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER3_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 3. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50210068" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 3 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="5021006c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_START_I0" comment="Address of start of Transmit Buffer 4. Multiple of 1k. Address = MAC_IF_TX_BUFFER4_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50210070" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER4_SIZE_I0" comment="Size of Transmit Buffer 4. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50210074" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_GIVE_I0" comment="Transmit Buffer 4 Write Pointer "/>
+ <register addr="50210078" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER4_SPACE_I0" comment="Number of bytes of free space in Transmit Buffer 4. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5021007c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_TRIGGER_I0" comment="Generate interrupt when free space in Transmit Buffer 4 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50210080" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_RAW_STATUS_I0" comment="Interrupt Raw Status register. This is a 'sticky' register. The (transient) interrupt sources can (only) set the bits to 1. Bits may be cleared to 0 by writing to MAC_IF_INTERRUPT_CLEAR. When the MAC IF is Disabled, the interrupt sources are prevented from updating INTERRUPT_RAW_STATUS"/>
+ <register addr="50210084" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_STATUS_I0" comment="Interrupt Status register. Value in this register is MAC_IF_INTERRUPT_RAW_STATUS ANDed with MAC_IF_INTERRUPT_ENABLE. If one or more of the bits in this register are 1, then the interrupt output signal from the MAC IF will be asserted"/>
+ <register addr="50210088" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_ENABLE_I0" comment="Interrupt Enable register. Allows the various interrupt sources to be enabled / masked. If masked (i.e. a bit is a 0), then the interrupt source will not cause an interrupt, but the source may still be polled via MAC_IF_INTERRUPT_RAW_STATUS"/>
+ <register addr="5021008c" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_CLEAR_I0" comment="Interrupt Clear register. Writing a 1 to a bit will clear (set to 0) the corresponding bit in MAC_IF_INTERRUPT_RAW_STATUS. Writing a 0 has no effect. The clear only lasts for one clock cycle; there is no need to write a 0 after writing a 1"/>
+ <register addr="50210090" rw_flags="RW" width="2" name="MAC_IF_DEBUG_SELECT_I0" comment="Debug Select"/>
+ <register addr="50210094" rw_flags="R" width="2" name="MAC_IF_DEBUG_STATUS_I0" comment="Debug Status"/>
+ </block>
+ <block name="wl_mac_if_1" comment="">
+ <register addr="50310000" rw_flags="RW" width="1" name="MAC_IF_CONTROL_I1" comment="General control register (state is persistant)"/>
+ <register addr="50310004" rw_flags="RW" width="1" name="MAC_IF_CONTROL_AMNESIC_I1" comment="General control register (state is transitory)"/>
+ <register addr="50310008" rw_flags="R" width="1" name="MAC_IF_STATUS_I1" comment="General status register"/>
+ <register addr="5031000c" rw_flags="RW" width="4" name="MAC_IF_RX_BUFFER_START_I1" comment="Address of start of Receive Buffer. Multiple of 1k. Address = MAC_IF_RX_BUFFER_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310010" rw_flags="RW" width="1" name="MAC_IF_RX_BUFFER_SIZE_I1" comment="Size of Receive Buffer. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310014" rw_flags="R" width="2" name="MAC_IF_RX_BUFFER_GIVE_I1" comment="Receive Buffer Write Pointer (updated only at Receive Dollop boundaries)"/>
+ <register addr="50310018" rw_flags="RW" width="2" name="MAC_IF_RX_BUFFER_TAKE_I1" comment="Receive Buffer Read Pointer"/>
+ <register addr="5031001c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_START_I1" comment="Address of start of Transmit Buffer 0. Multiple of 1k. Address = MAC_IF_TX_BUFFER0_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310020" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER0_SIZE_I1" comment="Size of Transmit Buffer 0. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310024" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_GIVE_I1" comment="Transmit Buffer 0 Write Pointer "/>
+ <register addr="50310028" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER0_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 0. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5031002c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER0_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 0 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310030" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_START_I1" comment="Address of start of Transmit Buffer 1. Multiple of 1k. Address = MAC_IF_TX_BUFFER1_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310034" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER1_SIZE_I1" comment="Size of Transmit Buffer 1. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310038" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_GIVE_I1" comment="Transmit Buffer 1 Write Pointer "/>
+ <register addr="5031003c" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER1_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 1. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310040" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER1_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 1 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310044" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_START_I1" comment="Address of start of Transmit Buffer 2. Multiple of 1k. Address = MAC_IF_TX_BUFFER2_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310048" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER2_SIZE_I1" comment="Size of Transmit Buffer 2. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="5031004c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_GIVE_I1" comment="Transmit Buffer 2 Write Pointer "/>
+ <register addr="50310050" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER2_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 2. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310054" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER2_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 2 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310058" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_START_I1" comment="Address of start of Transmit Buffer 3. Multiple of 1k. Address = MAC_IF_TX_BUFFER3_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="5031005c" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER3_SIZE_I1" comment="Size of Transmit Buffer 3. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310060" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_GIVE_I1" comment="Transmit Buffer 3 Write Pointer "/>
+ <register addr="50310064" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER3_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 3. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="50310068" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER3_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 3 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="5031006c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_START_I1" comment="Address of start of Transmit Buffer 4. Multiple of 1k. Address = MAC_IF_TX_BUFFER4_START*1024. Since MAC IF is connected 'directly' to RAMSW, value of 0x00_0000 =&gt; start of RAMSW"/>
+ <register addr="50310070" rw_flags="RW" width="1" name="MAC_IF_TX_BUFFER4_SIZE_I1" comment="Size of Transmit Buffer 4. Units of 1k bytes. Offset of 1k bytes. 0 =&gt; 1k bytes, 1 =&gt; 2k bytes, 63 =&gt; 64k bytes"/>
+ <register addr="50310074" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_GIVE_I1" comment="Transmit Buffer 4 Write Pointer "/>
+ <register addr="50310078" rw_flags="R" width="4" name="MAC_IF_TX_BUFFER4_SPACE_I1" comment="Number of bytes of free space in Transmit Buffer 4. Two lsb always 0. Note that when a MAC frame is transmitted using RTS/CTS protection, then the MAC ACC will rewind the Transmit Buffer Read Pointer by four words. Thus the value in this register may be sixteen greater than the space actually available"/>
+ <register addr="5031007c" rw_flags="RW" width="4" name="MAC_IF_TX_BUFFER4_TRIGGER_I1" comment="Generate interrupt when free space in Transmit Buffer 4 is greater than or equal to this number. Two lsb ignored and treated as 0"/>
+ <register addr="50310080" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_RAW_STATUS_I1" comment="Interrupt Raw Status register. This is a 'sticky' register. The (transient) interrupt sources can (only) set the bits to 1. Bits may be cleared to 0 by writing to MAC_IF_INTERRUPT_CLEAR. When the MAC IF is Disabled, the interrupt sources are prevented from updating INTERRUPT_RAW_STATUS"/>
+ <register addr="50310084" rw_flags="R" width="2" name="MAC_IF_INTERRUPT_STATUS_I1" comment="Interrupt Status register. Value in this register is MAC_IF_INTERRUPT_RAW_STATUS ANDed with MAC_IF_INTERRUPT_ENABLE. If one or more of the bits in this register are 1, then the interrupt output signal from the MAC IF will be asserted"/>
+ <register addr="50310088" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_ENABLE_I1" comment="Interrupt Enable register. Allows the various interrupt sources to be enabled / masked. If masked (i.e. a bit is a 0), then the interrupt source will not cause an interrupt, but the source may still be polled via MAC_IF_INTERRUPT_RAW_STATUS"/>
+ <register addr="5031008c" rw_flags="RW" width="2" name="MAC_IF_INTERRUPT_CLEAR_I1" comment="Interrupt Clear register. Writing a 1 to a bit will clear (set to 0) the corresponding bit in MAC_IF_INTERRUPT_RAW_STATUS. Writing a 0 has no effect. The clear only lasts for one clock cycle; there is no need to write a 0 after writing a 1"/>
+ <register addr="50310090" rw_flags="RW" width="2" name="MAC_IF_DEBUG_SELECT_I1" comment="Debug Select"/>
+ <register addr="50310094" rw_flags="R" width="2" name="MAC_IF_DEBUG_STATUS_I1" comment="Debug Status"/>
+ </block>
+ <block name="wl_radio" comment="">
+ <register addr="50100000" rw_flags="RW" width="2" name="WL_RADIO_DEBUG_CONTROL" comment="This register controls the selection of debug buses to be driven out of the module."/>
+ <register addr="50100004" rw_flags="RW" width="1" name="WL_RADIO_CONFIG" comment="Miscellaneous config bits"/>
+ <register addr="50100008" rw_flags="RW" width="2" name="WL_RADIO_TEMP_CTRL_CONFIG" comment="Control register for block interfacing to analogue temperature sensor"/>
+ <register addr="5010000c" rw_flags="RW" width="1" name="WL_RADIO_AGC_MIMO_CONFIG" comment="Select the AGC strategy for MIMO"/>
+ <register addr="50100010" rw_flags="RW" width="4" name="WL_RADIO_CLOCK_CONTROL" comment="Enable/disable Radio Clocks"/>
+ <register addr="50100014" rw_flags="RW" width="4" name="WL_RADIO_MISC" comment="This register reserved for miscellaneous tasks."/>
+ </block>
+ <block name="wl_radio_ss_0" comment="">
+ <register addr="50110000" rw_flags="R" width="2" name="WL_RADIO_RX_COMP_AUTO_COEFFS_I0" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the WL_RADIO_RX_COMP_LUT_READ_EN bit in the WL_RADIO_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50110004" rw_flags="R" width="1" name="WL_RADIO_RX_PHASE_COMP_LUT_STATUS_I0" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="50110008" rw_flags="R" width="1" name="WL_RADIO_RX_AMPL_COMP_LUT_STATUS_I0" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="5011000c" rw_flags="R" width="1" name="WL_RADIO_DIG_GAIN_STATUS_I0" comment="This register contains the current gain settings to all digital blocks in the receive chain"/>
+ <register addr="50110010" rw_flags="R" width="2" name="WL_RADIO_CHANNEL_STATUS_I0" comment="This register contains the instantaneous value of the RSSI, CCA and CS of this receive chain"/>
+ <register addr="50110014" rw_flags="RW" width="1" name="WL_RADIO_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50110018" rw_flags="RW" width="1" name="WL_RADIO_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5011001c" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110020" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_RAW_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110024" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50110028" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5011002c" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110030" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_RAW_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110034" rw_flags="R" width="1" name="WL_RADIO_RF_INTS_I0" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50110038" rw_flags="R" width="2" name="WLRF_TEMP_STATUS_I0" comment="This register contains the temperature measurements from the RF chip via speedy"/>
+ <register addr="5011003c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="50110040" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="50110044" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="50110048" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="5011004c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="50110050" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="50110054" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="50110058" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="5011005c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT0_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="50110060" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT1_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110064" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT2_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110068" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT3_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5011006c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT4_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110070" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT5_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110074" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT6_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50110078" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT7_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5011007c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="50110080" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="50110084" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="50110088" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="5011008c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="50110090" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="50110094" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="50110098" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="5011009c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="501100a0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT0_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="501100a4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT1_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100a8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT2_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100ac" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT3_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT4_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT5_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100b8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT6_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100bc" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT7_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501100c0" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="501100c4" rw_flags="R" width="1" name="WL_RADIO_TIMER_TX_SLOT_I0" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="501100c8" rw_flags="R" width="1" name="WL_RADIO_TIMER_RX_SLOT_I0" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="501100cc" rw_flags="R" width="2" name="WL_RADIO_ENABLES_STATUS_I0" comment="This register contains the current values of the Radio Enables, after all masking and multiplexing"/>
+ <register addr="501100d0" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_I0" comment="Default values for radio enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="501100d4" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_MASK_I0" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output."/>
+ <register addr="501100d8" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_TX_TRAIN_MASK_I0" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output. Used only when predistort training is active to allow Rx blocks to be turned on"/>
+ <register addr="501100dc" rw_flags="R" width="2" name="WL_RADIO_DEBUG_STATUS_I0" comment="This read-only register returns the current state of the debug bus within radio control."/>
+ <register addr="501100e0" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG1_I0" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="501100e4" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG2_I0" comment="Configuration bits for the AGC: initial gain settings before first update comes from RF chip"/>
+ <register addr="501100e8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG3_I0" comment="Configuration bits for the AGC: digital gain range definition. Also initial baseband gain until first update arrives from RF chip"/>
+ <register addr="501100ec" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG4_I0" comment="Further configuration bits for the AGC: digital gain settings"/>
+ <register addr="501100f0" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG5_I0" comment="Further configuration bits for the AGC: clipping detection behaviour"/>
+ <register addr="501100f4" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG6_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501100f8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG7_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501100fc" rw_flags="RW" width="1" name="WL_RADIO_AGC_CONFIG8_I0" comment="Further configuration bits for the AGC. Debug select"/>
+ <register addr="50110100" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG9_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50110104" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG10_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50110108" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG11_I0" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="5011010c" rw_flags="RW" width="4" name="WL_RADIO_AGC_TIMEOUT_I0" comment="This register specifies programmable timeouts for the AGC"/>
+ <register addr="50110110" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME_I0" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50110114" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME2_I0" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50110118" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_I0" comment="This register specifies the RSSI target for an OFDM receive burst after decimation."/>
+ <register addr="5011011c" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_I0" comment="This register specifies the RSSI target for a CCK receive burst after decimation."/>
+ <register addr="50110120" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_DELTA_I0" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a OFDM receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50110124" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_DELTA_I0" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a CCK receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50110128" rw_flags="RW" width="4" name="WL_RADIO_CS_CONFIG_I0" comment="This register configures the carrier sense. It is flagged when analogue gain is less than a threshold and digital RSSI is greater than a threshold. The thresholds are set in this register"/>
+ <register addr="5011012c" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG_I0" comment="Coadj general config register"/>
+ <register addr="50110130" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG2_I0" comment="Coadj general config register 2"/>
+ <register addr="50110134" rw_flags="R" width="4" name="WL_RADIO_COADJ_STATUS_I0" comment="Coadj general status register"/>
+ <register addr="50110138" rw_flags="RW" width="2" name="WL_RADIO_COADJ_TIMER_I0" comment="Timer initial value, downcount at core clk rate starts on write"/>
+ <register addr="5011013c" rw_flags="RW" width="1" name="WL_RADIO_COADJ_MEM_ADDR_I0" comment="Coadj Code/Data Mem Address. MSBs=2'b00: DataStore, 2'b10: Core internal regs, 2'b11: Local regs"/>
+ <register addr="50110140" rw_flags="RW" width="4" name="WL_RADIO_COADJ_MEM_WDATA_I0" comment="Coadj Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="50110144" rw_flags="R" width="4" name="WL_RADIO_COADJ_MEM_RDATA_I0" comment="Coadj Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="50110148" rw_flags="RW" width="2" name="WL_RADIO_ZIPPY_TO_RF_FLAGS_I0" comment="Zippy flag data (info and channel) to be sent to RFIC"/>
+ <register addr="5011014c" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_BB_FILTER_I0" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the BBIC"/>
+ <register addr="50110150" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_RF_RESV_I0" comment="Zippy reserved signal for SW data to the RFIC"/>
+ <register addr="50110154" rw_flags="R" width="2" name="WL_RADIO_ZIPPY_TO_BB_FLAGS_I0" comment="Zippy flag data to the BBIC, plus latched Valid and Ack"/>
+ </block>
+ <block name="wl_radio_ss_1" comment="">
+ <register addr="50120000" rw_flags="R" width="2" name="WL_RADIO_RX_COMP_AUTO_COEFFS_I1" comment="The current values of automatic I/Q trims can be read back from this register. The trim values are in sign/magnitude format. The phase trim is in the upper 8 bits and the amplitude trim in the lower 8 bits of this register. By setting the WL_RADIO_RX_COMP_LUT_READ_EN bit in the WL_RADIO_RX_COMP_CONFIG1 register, entries in the compensation table can also be read."/>
+ <register addr="50120004" rw_flags="R" width="1" name="WL_RADIO_RX_PHASE_COMP_LUT_STATUS_I1" comment="This register reads the current phase compensation LUT entry"/>
+ <register addr="50120008" rw_flags="R" width="1" name="WL_RADIO_RX_AMPL_COMP_LUT_STATUS_I1" comment="This register reads the current amplitude compensation LUT entry"/>
+ <register addr="5012000c" rw_flags="R" width="1" name="WL_RADIO_DIG_GAIN_STATUS_I1" comment="This register contains the current gain settings to all digital blocks in the receive chain"/>
+ <register addr="50120010" rw_flags="R" width="2" name="WL_RADIO_CHANNEL_STATUS_I1" comment="This register contains the instantaneous value of the RSSI, CCA and CS of this receive chain"/>
+ <register addr="50120014" rw_flags="RW" width="1" name="WL_RADIO_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50120018" rw_flags="RW" width="1" name="WL_RADIO_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5012001c" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120020" rw_flags="R" width="1" name="WL_RADIO_INT_STATUS_RAW_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120024" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RADIO_INT_MASK."/>
+ <register addr="50120028" rw_flags="RW" width="1" name="WL_RADIO_RF_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="5012002c" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120030" rw_flags="R" width="1" name="WL_RADIO_RF_INT_STATUS_RAW_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120034" rw_flags="R" width="1" name="WL_RADIO_RF_INTS_I1" comment="This register has bits set in it for any interrupt that is currently active. Bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="50120038" rw_flags="R" width="2" name="WLRF_TEMP_STATUS_I1" comment="This register contains the temperature measurements from the RF chip via speedy"/>
+ <register addr="5012003c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="50120040" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="50120044" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="50120048" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="5012004c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="50120050" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="50120054" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="50120058" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="5012005c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT0_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="50120060" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT1_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120064" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT2_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120068" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT3_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5012006c" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT4_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120070" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT5_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120074" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT6_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="50120078" rw_flags="RW" width="1" name="WL_RADIO_TIMER_TX_SLOT7_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="5012007c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_TX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="50120080" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="50120084" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="50120088" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="5012008c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="50120090" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="50120094" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="50120098" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="5012009c" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="501200a0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT0_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="501200a4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT1_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200a8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT2_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200ac" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT3_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b0" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT4_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b4" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT5_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200b8" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT6_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200bc" rw_flags="RW" width="1" name="WL_RADIO_TIMER_RX_SLOT7_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will roll over, increasing the slot delay."/>
+ <register addr="501200c0" rw_flags="RW" width="2" name="WL_RADIO_TIMER_RX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="501200c4" rw_flags="R" width="1" name="WL_RADIO_TIMER_TX_SLOT_I1" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="501200c8" rw_flags="R" width="1" name="WL_RADIO_TIMER_RX_SLOT_I1" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="501200cc" rw_flags="R" width="2" name="WL_RADIO_ENABLES_STATUS_I1" comment="This register contains the current values of the Radio Enables, after all masking and multiplexing"/>
+ <register addr="501200d0" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_I1" comment="Default values for radio enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="501200d4" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_MASK_I1" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output."/>
+ <register addr="501200d8" rw_flags="RW" width="2" name="WL_RADIO_ENABLES_TX_TRAIN_MASK_I1" comment="Selects use of RADIO_ENABLES or timer outputs. A one in a given bit selects the timer output. Used only when predistort training is active to allow Rx blocks to be turned on"/>
+ <register addr="501200dc" rw_flags="R" width="2" name="WL_RADIO_DEBUG_STATUS_I1" comment="This read-only register returns the current state of the debug bus within radio control."/>
+ <register addr="501200e0" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG1_I1" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="501200e4" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG2_I1" comment="Configuration bits for the AGC: initial gain settings before first update comes from RF chip"/>
+ <register addr="501200e8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG3_I1" comment="Configuration bits for the AGC: digital gain range definition. Also initial baseband gain until first update arrives from RF chip"/>
+ <register addr="501200ec" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG4_I1" comment="Further configuration bits for the AGC: digital gain settings"/>
+ <register addr="501200f0" rw_flags="RW" width="2" name="WL_RADIO_AGC_CONFIG5_I1" comment="Further configuration bits for the AGC: clipping detection behaviour"/>
+ <register addr="501200f4" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG6_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501200f8" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG7_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="501200fc" rw_flags="RW" width="1" name="WL_RADIO_AGC_CONFIG8_I1" comment="Further configuration bits for the AGC. Debug select"/>
+ <register addr="50120100" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG9_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50120104" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG10_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="50120108" rw_flags="RW" width="4" name="WL_RADIO_AGC_CONFIG11_I1" comment="Further configuration bits for the AGC: ADC signal size nudge up thresholds"/>
+ <register addr="5012010c" rw_flags="RW" width="4" name="WL_RADIO_AGC_TIMEOUT_I1" comment="This register specifies programmable timeouts for the AGC"/>
+ <register addr="50120110" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME_I1" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50120114" rw_flags="RW" width="4" name="WL_RADIO_AGC_DIG_RSSI_TIME2_I1" comment="This register specifies programmable configurations to measure digital RSSI for different purposes"/>
+ <register addr="50120118" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_I1" comment="This register specifies the RSSI target for an OFDM receive burst after decimation."/>
+ <register addr="5012011c" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_I1" comment="This register specifies the RSSI target for a CCK receive burst after decimation."/>
+ <register addr="50120120" rw_flags="RW" width="4" name="WL_RADIO_AGC_OFDM_RSSI_TARGET_DELTA_I1" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a OFDM receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50120124" rw_flags="RW" width="4" name="WL_RADIO_AGC_CCK_RSSI_TARGET_DELTA_I1" comment="This register specifies the RSSI steps of (Maximum target + 2X dB) and (Minimum target - 2X dB) for a CCK receive. Wheer X can be 1.5 dB or 2 dB depending on WL_RADIO_AGC_MIN_GAIN_STEP_SIZE."/>
+ <register addr="50120128" rw_flags="RW" width="4" name="WL_RADIO_CS_CONFIG_I1" comment="This register configures the carrier sense. It is flagged when analogue gain is less than a threshold and digital RSSI is greater than a threshold. The thresholds are set in this register"/>
+ <register addr="5012012c" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG_I1" comment="Coadj general config register"/>
+ <register addr="50120130" rw_flags="RW" width="4" name="WL_RADIO_COADJ_CONFIG2_I1" comment="Coadj general config register 2"/>
+ <register addr="50120134" rw_flags="R" width="4" name="WL_RADIO_COADJ_STATUS_I1" comment="Coadj general status register"/>
+ <register addr="50120138" rw_flags="RW" width="2" name="WL_RADIO_COADJ_TIMER_I1" comment="Timer initial value, downcount at core clk rate starts on write"/>
+ <register addr="5012013c" rw_flags="RW" width="1" name="WL_RADIO_COADJ_MEM_ADDR_I1" comment="Coadj Code/Data Mem Address. MSBs=2'b00: DataStore, 2'b10: Core internal regs, 2'b11: Local regs"/>
+ <register addr="50120140" rw_flags="RW" width="4" name="WL_RADIO_COADJ_MEM_WDATA_I1" comment="Coadj Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="50120144" rw_flags="R" width="4" name="WL_RADIO_COADJ_MEM_RDATA_I1" comment="Coadj Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="50120148" rw_flags="RW" width="2" name="WL_RADIO_ZIPPY_TO_RF_FLAGS_I1" comment="Zippy flag data (info and channel) to be sent to RFIC"/>
+ <register addr="5012014c" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_BB_FILTER_I1" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the BBIC"/>
+ <register addr="50120150" rw_flags="RW" width="1" name="WL_RADIO_ZIPPY_TO_RF_RESV_I1" comment="Zippy reserved signal for SW data to the RFIC"/>
+ <register addr="50120154" rw_flags="R" width="2" name="WL_RADIO_ZIPPY_TO_BB_FLAGS_I1" comment="Zippy flag data to the BBIC, plus latched Valid and Ack"/>
+ </block>
+ <block name="wl_shared" comment="">
+ <register addr="50600000" rw_flags="RW" width="1" name="WL_DEBUG_SEL" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600004" rw_flags="R" width="2" name="WL_DEBUG_STATUS" comment="Debug data at WLan_pd level"/>
+ <register addr="50600008" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_3_0" comment="Select for WLan_pd level debug mux"/>
+ <register addr="5060000c" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_7_4" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600010" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_11_8" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600014" rw_flags="RW" width="4" name="WL_DEBUG_COMB_POSN_15_12" comment="Select for WLan_pd level debug mux"/>
+ <register addr="50600018" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_0_SEL" comment="Source bus select for intermediate bus 0 (select one of up to 32 busses)"/>
+ <register addr="5060001c" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_1_SEL" comment="Source bus select for intermediate bus 1 (select one of up to 32 busses)"/>
+ <register addr="50600020" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_2_SEL" comment="Source bus select for intermediate bus 2 (select one of up to 32 busses)"/>
+ <register addr="50600024" rw_flags="RW" width="1" name="WL_DEBUG_COMB_BUS_3_SEL" comment="Source bus select for intermediate bus 3 (select one of up to 32 busses)"/>
+ </block>
+ <block name="wl_speedy_0" comment="">
+ <register addr="50130000" rw_flags="RW" width="4" name="WL_SPEEDY_ADDR_CTRL_I0" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="50130004" rw_flags="RW" width="4" name="WL_SPEEDY_WRITE_DATA_I0" comment="Data to write to APB over Speedy"/>
+ <register addr="50130008" rw_flags="R" width="4" name="WL_SPEEDY_READ_DATA_I0" comment="Data read back for APB over Speedy"/>
+ <register addr="5013000c" rw_flags="R" width="1" name="WL_SPEEDY_APB_STATUS_I0" comment="Status of the current APB cycle"/>
+ <register addr="50130010" rw_flags="RW" width="1" name="WL_SPEEDY_ERROR_RECOVERY_I0" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="wl_speedy_1" comment="">
+ <register addr="50140000" rw_flags="RW" width="4" name="WL_SPEEDY_ADDR_CTRL_I1" comment="Address and control flags for a Speedy transaction. Write this register to create an APB cycle on the remote chip (set up the write data first for write cycles)"/>
+ <register addr="50140004" rw_flags="RW" width="4" name="WL_SPEEDY_WRITE_DATA_I1" comment="Data to write to APB over Speedy"/>
+ <register addr="50140008" rw_flags="R" width="4" name="WL_SPEEDY_READ_DATA_I1" comment="Data read back for APB over Speedy"/>
+ <register addr="5014000c" rw_flags="R" width="1" name="WL_SPEEDY_APB_STATUS_I1" comment="Status of the current APB cycle"/>
+ <register addr="50140010" rw_flags="RW" width="1" name="WL_SPEEDY_ERROR_RECOVERY_I1" comment="Write this register to clear a timeout or APB access error that has been triggered by an earlier cycle"/>
+ </block>
+ <block name="xdmac" comment="">
+ <register addr="56300000" rw_flags="RW" width="1" name="XDMAC_RESERVED0" comment="Reserved register."/>
+ <register addr="56300004" rw_flags="RW" width="1" name="XDMAC_RESERVED4" comment="Reserved register."/>
+ <register addr="56300008" rw_flags="RW" width="1" name="XDMAC_RESERVED8" comment="Reserved register."/>
+ <register addr="5630000c" rw_flags="R" width="1" name="XDMAC_INT_TC_STATUS" comment="Transfer Complete Interrupt Status Register."/>
+ <register addr="56300010" rw_flags="W" width="1" name="XDMAC_INT_TC_CLR" comment="Transfer Complete Interrupt Clear Register (Value is not meaningful)"/>
+ <register addr="56300014" rw_flags="RW" width="1" name="XDMAC_INT_TC_MASK" comment="Transfer Complete Interrupt Mask Register (0: Interrupt disabled, 1 : Interrupt enabled)"/>
+ <register addr="56300018" rw_flags="R" width="1" name="XDMAC_ERR_STATUS" comment="Error Status Register"/>
+ <register addr="5630001c" rw_flags="RW" width="1" name="XDMAC_RESERVED1C" comment="Reserved register."/>
+ <register addr="56300020" rw_flags="RW" width="1" name="XDMAC_RESERVED20" comment="Reserved register."/>
+ <register addr="56300024" rw_flags="W" width="1" name="XDMAC_START" comment="DMA Transfer Start (Value is not meaningful). Do NOT start DMA again until the previously started DMA transfer is completed."/>
+ <register addr="56300028" rw_flags="RW" width="1" name="XDMAC_ICG_DISABLE" comment="Internal clock gating is disabled (0 : Clock gating enabled, 1 : Clock gatingdisabled)"/>
+ <register addr="5630002c" rw_flags="RW" width="4" name="XDMAC_CONFIG" comment="Configuration Register"/>
+ <register addr="56300030" rw_flags="RW" width="4" name="XDMAC_LLI_SRC_ADDR" comment="Source Address Register (Linked List Item)"/>
+ <register addr="56300034" rw_flags="RW" width="4" name="XDMAC_LLI_DST_ADDR" comment="Destination Address Register (Linked List Item)"/>
+ <register addr="56300038" rw_flags="RW" width="4" name="XDMAC_LLI_NXT_ADDR" comment="Next Address Register to indicate the next linked list item (Linked List Item)"/>
+ <register addr="5630003c" rw_flags="RW" width="4" name="XDMAC_LLI_CTRL" comment=""/>
+ </block>
+ <block name="zippy_bb" comment="">
+ <register addr="56100000" rw_flags="RW" width="4" name="ZIPPY_BB_ADDR_CTRL" comment="ZIPPY remote register access address and controls. The bottom 16 bits of this register (PSEL and ADDR) are actually the bottom 16 bits of the byte address of the RFIC register to be accessed (from HTML docs for example)"/>
+ <register addr="56100004" rw_flags="RW" width="4" name="ZIPPY_BB_WRITE_DATA" comment="Data to write to remote register over ZIPPY. Only the number of bytes specified in the ZIPPY_BB_WIDTH field are transferred. Unwritten bytes are unchanged, if the destination register is larger than the number of bytes written"/>
+ <register addr="56100008" rw_flags="R" width="4" name="ZIPPY_BB_READ_DATA" comment="Data returned from the remote register over ZIPPY. Only the number of bytes specified in the ZIPPY_BB_WIDTH field are transferred"/>
+ <register addr="5610000c" rw_flags="RW" width="4" name="ZIPPY_BB_TIMEOUTS" comment="Time out control for register read data and write acknowledges (if enabled) to be returned from the RF IC"/>
+ <register addr="56100010" rw_flags="RW" width="2" name="ZIPPY_BB_TRANSPORT" comment="ZIPPY baseband transport configuration. The matching configuration must also be set up in the RF chip"/>
+ <register addr="56100014" rw_flags="RW" width="1" name="ZIPPY_BB_PRIORITY_INC_RATE" comment="Configure the rate at which priority increases for unserviced channels. "/>
+ <register addr="56100018" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS0_CFG" comment="Type 0 (BT) flag frame configuration"/>
+ <register addr="5610001c" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS1_CFG" comment="Type 1 (BT) flag frame configuration"/>
+ <register addr="56100020" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS2_CFG" comment="Type 2 (BT) flag frame configuration"/>
+ <register addr="56100024" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS3_CFG" comment="Type 3 (WLAN) flag frame configuration"/>
+ <register addr="56100028" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS4_CFG" comment="Type 4 (WLAN) flag frame configuration"/>
+ <register addr="5610002c" rw_flags="RW" width="2" name="ZIPPY_BB_FLAGS5_CFG" comment="Type 5 (WLAN) flag frame configuration"/>
+ <register addr="56100030" rw_flags="RW" width="4" name="ZIPPY_BB_DATA_CFG" comment="Address/data frame configuration and write ack mask"/>
+ <register addr="56100034" rw_flags="RW" width="4" name="ZIPPY_BB_INT_EN" comment="Interrupt sources enable."/>
+ <register addr="56100038" rw_flags="R" width="4" name="ZIPPY_BB_INT_STATUS" comment="Status of Interrupt sources."/>
+ <register addr="5610003c" rw_flags="W" width="4" name="ZIPPY_BB_INT_CLEAR" comment="Clear Interrupt Sources by writing a 1 to the register bit."/>
+ <register addr="56100040" rw_flags="R" width="2" name="ZIPPY_BB_APB_STATUS" comment="Status of the RF IC register access"/>
+ <register addr="56100044" rw_flags="R" width="2" name="ZIPPY_BB_DATA_COUNTS" comment="Local BB counters for data from BB to RF and RF to BB. TO be compared with equivalent ones in the RFIC"/>
+ <register addr="56100048" rw_flags="RW" width="1" name="ZIPPY_BB_DEBUG_SEL" comment=""/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_gic subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_gic">
+ <block name="periph_gic" comment="">
+ <register addr="58001000" rw_flags="RW" width="4" name="ICDDCR" comment="Distributor Controller Register"/>
+ <register addr="58001004" rw_flags="R" width="4" name="ICDICTR" comment="Interrupt Controller Type Register"/>
+ <register addr="58001008" rw_flags="R" width="4" name="ICDIIDR" comment="Distributor Implementer Identification Register"/>
+ <register addr="58001100" rw_flags="RW" width="4" name="ICDISER[0]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001104" rw_flags="RW" width="4" name="ICDISER[1]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001108" rw_flags="RW" width="4" name="ICDISER[2]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800110c" rw_flags="RW" width="4" name="ICDISER[3]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001110" rw_flags="RW" width="4" name="ICDISER[4]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001114" rw_flags="RW" width="4" name="ICDISER[5]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001118" rw_flags="RW" width="4" name="ICDISER[6]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800111c" rw_flags="RW" width="4" name="ICDISER[7]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001120" rw_flags="RW" width="4" name="ICDISER[8]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001124" rw_flags="RW" width="4" name="ICDISER[9]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001128" rw_flags="RW" width="4" name="ICDISER[10]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800112c" rw_flags="RW" width="4" name="ICDISER[11]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001130" rw_flags="RW" width="4" name="ICDISER[12]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001134" rw_flags="RW" width="4" name="ICDISER[13]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001138" rw_flags="RW" width="4" name="ICDISER[14]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="5800113c" rw_flags="RW" width="4" name="ICDISER[15]" comment="Interrupt Set-Enable Registers"/>
+ <register addr="58001180" rw_flags="RW" width="4" name="ICDICER[0]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001184" rw_flags="RW" width="4" name="ICDICER[1]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001188" rw_flags="RW" width="4" name="ICDICER[2]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="5800118c" rw_flags="RW" width="4" name="ICDICER[3]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001190" rw_flags="RW" width="4" name="ICDICER[4]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001194" rw_flags="RW" width="4" name="ICDICER[5]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001198" rw_flags="RW" width="4" name="ICDICER[6]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="5800119c" rw_flags="RW" width="4" name="ICDICER[7]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a0" rw_flags="RW" width="4" name="ICDICER[8]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a4" rw_flags="RW" width="4" name="ICDICER[9]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011a8" rw_flags="RW" width="4" name="ICDICER[10]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011ac" rw_flags="RW" width="4" name="ICDICER[11]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b0" rw_flags="RW" width="4" name="ICDICER[12]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b4" rw_flags="RW" width="4" name="ICDICER[13]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011b8" rw_flags="RW" width="4" name="ICDICER[14]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="580011bc" rw_flags="RW" width="4" name="ICDICER[15]" comment="Interrupt Clear-Enable Registers"/>
+ <register addr="58001200" rw_flags="RW" width="4" name="ICDISPR[0]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001204" rw_flags="RW" width="4" name="ICDISPR[1]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001208" rw_flags="RW" width="4" name="ICDISPR[2]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800120c" rw_flags="RW" width="4" name="ICDISPR[3]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001210" rw_flags="RW" width="4" name="ICDISPR[4]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001214" rw_flags="RW" width="4" name="ICDISPR[5]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001218" rw_flags="RW" width="4" name="ICDISPR[6]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800121c" rw_flags="RW" width="4" name="ICDISPR[7]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001220" rw_flags="RW" width="4" name="ICDISPR[8]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001224" rw_flags="RW" width="4" name="ICDISPR[9]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001228" rw_flags="RW" width="4" name="ICDISPR[10]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800122c" rw_flags="RW" width="4" name="ICDISPR[11]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001230" rw_flags="RW" width="4" name="ICDISPR[12]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001234" rw_flags="RW" width="4" name="ICDISPR[13]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001238" rw_flags="RW" width="4" name="ICDISPR[14]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="5800123c" rw_flags="RW" width="4" name="ICDISPR[15]" comment="Interrupt Set-Pending Registers"/>
+ <register addr="58001280" rw_flags="RW" width="4" name="ICDICPR[0]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001284" rw_flags="RW" width="4" name="ICDICPR[1]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001288" rw_flags="RW" width="4" name="ICDICPR[2]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="5800128c" rw_flags="RW" width="4" name="ICDICPR[3]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001290" rw_flags="RW" width="4" name="ICDICPR[4]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001294" rw_flags="RW" width="4" name="ICDICPR[5]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001298" rw_flags="RW" width="4" name="ICDICPR[6]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="5800129c" rw_flags="RW" width="4" name="ICDICPR[7]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a0" rw_flags="RW" width="4" name="ICDICPR[8]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a4" rw_flags="RW" width="4" name="ICDICPR[9]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012a8" rw_flags="RW" width="4" name="ICDICPR[10]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012ac" rw_flags="RW" width="4" name="ICDICPR[11]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b0" rw_flags="RW" width="4" name="ICDICPR[12]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b4" rw_flags="RW" width="4" name="ICDICPR[13]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012b8" rw_flags="RW" width="4" name="ICDICPR[14]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="580012bc" rw_flags="RW" width="4" name="ICDICPR[15]" comment="Interrupt Clear-Pending Registers"/>
+ <register addr="58001300" rw_flags="R" width="4" name="ICDABR[0]" comment="Active Bit Registers"/>
+ <register addr="58001304" rw_flags="R" width="4" name="ICDABR[1]" comment="Active Bit Registers"/>
+ <register addr="58001308" rw_flags="R" width="4" name="ICDABR[2]" comment="Active Bit Registers"/>
+ <register addr="5800130c" rw_flags="R" width="4" name="ICDABR[3]" comment="Active Bit Registers"/>
+ <register addr="58001310" rw_flags="R" width="4" name="ICDABR[4]" comment="Active Bit Registers"/>
+ <register addr="58001314" rw_flags="R" width="4" name="ICDABR[5]" comment="Active Bit Registers"/>
+ <register addr="58001318" rw_flags="R" width="4" name="ICDABR[6]" comment="Active Bit Registers"/>
+ <register addr="5800131c" rw_flags="R" width="4" name="ICDABR[7]" comment="Active Bit Registers"/>
+ <register addr="58001320" rw_flags="R" width="4" name="ICDABR[8]" comment="Active Bit Registers"/>
+ <register addr="58001324" rw_flags="R" width="4" name="ICDABR[9]" comment="Active Bit Registers"/>
+ <register addr="58001328" rw_flags="R" width="4" name="ICDABR[10]" comment="Active Bit Registers"/>
+ <register addr="5800132c" rw_flags="R" width="4" name="ICDABR[11]" comment="Active Bit Registers"/>
+ <register addr="58001330" rw_flags="R" width="4" name="ICDABR[12]" comment="Active Bit Registers"/>
+ <register addr="58001334" rw_flags="R" width="4" name="ICDABR[13]" comment="Active Bit Registers"/>
+ <register addr="58001338" rw_flags="R" width="4" name="ICDABR[14]" comment="Active Bit Registers"/>
+ <register addr="5800133c" rw_flags="R" width="4" name="ICDABR[15]" comment="Active Bit Registers"/>
+ <register addr="58001400" rw_flags="RW" width="4" name="ICDIPR[0]" comment="Interrupt Priority Registers"/>
+ <register addr="58001404" rw_flags="RW" width="4" name="ICDIPR[1]" comment="Interrupt Priority Registers"/>
+ <register addr="58001408" rw_flags="RW" width="4" name="ICDIPR[2]" comment="Interrupt Priority Registers"/>
+ <register addr="5800140c" rw_flags="RW" width="4" name="ICDIPR[3]" comment="Interrupt Priority Registers"/>
+ <register addr="58001410" rw_flags="RW" width="4" name="ICDIPR[4]" comment="Interrupt Priority Registers"/>
+ <register addr="58001414" rw_flags="RW" width="4" name="ICDIPR[5]" comment="Interrupt Priority Registers"/>
+ <register addr="58001418" rw_flags="RW" width="4" name="ICDIPR[6]" comment="Interrupt Priority Registers"/>
+ <register addr="5800141c" rw_flags="RW" width="4" name="ICDIPR[7]" comment="Interrupt Priority Registers"/>
+ <register addr="58001420" rw_flags="RW" width="4" name="ICDIPR[8]" comment="Interrupt Priority Registers"/>
+ <register addr="58001424" rw_flags="RW" width="4" name="ICDIPR[9]" comment="Interrupt Priority Registers"/>
+ <register addr="58001428" rw_flags="RW" width="4" name="ICDIPR[10]" comment="Interrupt Priority Registers"/>
+ <register addr="5800142c" rw_flags="RW" width="4" name="ICDIPR[11]" comment="Interrupt Priority Registers"/>
+ <register addr="58001430" rw_flags="RW" width="4" name="ICDIPR[12]" comment="Interrupt Priority Registers"/>
+ <register addr="58001434" rw_flags="RW" width="4" name="ICDIPR[13]" comment="Interrupt Priority Registers"/>
+ <register addr="58001438" rw_flags="RW" width="4" name="ICDIPR[14]" comment="Interrupt Priority Registers"/>
+ <register addr="5800143c" rw_flags="RW" width="4" name="ICDIPR[15]" comment="Interrupt Priority Registers"/>
+ <register addr="58001440" rw_flags="RW" width="4" name="ICDIPR[16]" comment="Interrupt Priority Registers"/>
+ <register addr="58001444" rw_flags="RW" width="4" name="ICDIPR[17]" comment="Interrupt Priority Registers"/>
+ <register addr="58001448" rw_flags="RW" width="4" name="ICDIPR[18]" comment="Interrupt Priority Registers"/>
+ <register addr="5800144c" rw_flags="RW" width="4" name="ICDIPR[19]" comment="Interrupt Priority Registers"/>
+ <register addr="58001450" rw_flags="RW" width="4" name="ICDIPR[20]" comment="Interrupt Priority Registers"/>
+ <register addr="58001454" rw_flags="RW" width="4" name="ICDIPR[21]" comment="Interrupt Priority Registers"/>
+ <register addr="58001458" rw_flags="RW" width="4" name="ICDIPR[22]" comment="Interrupt Priority Registers"/>
+ <register addr="5800145c" rw_flags="RW" width="4" name="ICDIPR[23]" comment="Interrupt Priority Registers"/>
+ <register addr="58001460" rw_flags="RW" width="4" name="ICDIPR[24]" comment="Interrupt Priority Registers"/>
+ <register addr="58001464" rw_flags="RW" width="4" name="ICDIPR[25]" comment="Interrupt Priority Registers"/>
+ <register addr="58001468" rw_flags="RW" width="4" name="ICDIPR[26]" comment="Interrupt Priority Registers"/>
+ <register addr="5800146c" rw_flags="RW" width="4" name="ICDIPR[27]" comment="Interrupt Priority Registers"/>
+ <register addr="58001470" rw_flags="RW" width="4" name="ICDIPR[28]" comment="Interrupt Priority Registers"/>
+ <register addr="58001474" rw_flags="RW" width="4" name="ICDIPR[29]" comment="Interrupt Priority Registers"/>
+ <register addr="58001478" rw_flags="RW" width="4" name="ICDIPR[30]" comment="Interrupt Priority Registers"/>
+ <register addr="5800147c" rw_flags="RW" width="4" name="ICDIPR[31]" comment="Interrupt Priority Registers"/>
+ <register addr="58001480" rw_flags="RW" width="4" name="ICDIPR[32]" comment="Interrupt Priority Registers"/>
+ <register addr="58001484" rw_flags="RW" width="4" name="ICDIPR[33]" comment="Interrupt Priority Registers"/>
+ <register addr="58001488" rw_flags="RW" width="4" name="ICDIPR[34]" comment="Interrupt Priority Registers"/>
+ <register addr="5800148c" rw_flags="RW" width="4" name="ICDIPR[35]" comment="Interrupt Priority Registers"/>
+ <register addr="58001490" rw_flags="RW" width="4" name="ICDIPR[36]" comment="Interrupt Priority Registers"/>
+ <register addr="58001494" rw_flags="RW" width="4" name="ICDIPR[37]" comment="Interrupt Priority Registers"/>
+ <register addr="58001498" rw_flags="RW" width="4" name="ICDIPR[38]" comment="Interrupt Priority Registers"/>
+ <register addr="5800149c" rw_flags="RW" width="4" name="ICDIPR[39]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a0" rw_flags="RW" width="4" name="ICDIPR[40]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a4" rw_flags="RW" width="4" name="ICDIPR[41]" comment="Interrupt Priority Registers"/>
+ <register addr="580014a8" rw_flags="RW" width="4" name="ICDIPR[42]" comment="Interrupt Priority Registers"/>
+ <register addr="580014ac" rw_flags="RW" width="4" name="ICDIPR[43]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b0" rw_flags="RW" width="4" name="ICDIPR[44]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b4" rw_flags="RW" width="4" name="ICDIPR[45]" comment="Interrupt Priority Registers"/>
+ <register addr="580014b8" rw_flags="RW" width="4" name="ICDIPR[46]" comment="Interrupt Priority Registers"/>
+ <register addr="580014bc" rw_flags="RW" width="4" name="ICDIPR[47]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c0" rw_flags="RW" width="4" name="ICDIPR[48]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c4" rw_flags="RW" width="4" name="ICDIPR[49]" comment="Interrupt Priority Registers"/>
+ <register addr="580014c8" rw_flags="RW" width="4" name="ICDIPR[50]" comment="Interrupt Priority Registers"/>
+ <register addr="580014cc" rw_flags="RW" width="4" name="ICDIPR[51]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d0" rw_flags="RW" width="4" name="ICDIPR[52]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d4" rw_flags="RW" width="4" name="ICDIPR[53]" comment="Interrupt Priority Registers"/>
+ <register addr="580014d8" rw_flags="RW" width="4" name="ICDIPR[54]" comment="Interrupt Priority Registers"/>
+ <register addr="580014dc" rw_flags="RW" width="4" name="ICDIPR[55]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e0" rw_flags="RW" width="4" name="ICDIPR[56]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e4" rw_flags="RW" width="4" name="ICDIPR[57]" comment="Interrupt Priority Registers"/>
+ <register addr="580014e8" rw_flags="RW" width="4" name="ICDIPR[58]" comment="Interrupt Priority Registers"/>
+ <register addr="580014ec" rw_flags="RW" width="4" name="ICDIPR[59]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f0" rw_flags="RW" width="4" name="ICDIPR[60]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f4" rw_flags="RW" width="4" name="ICDIPR[61]" comment="Interrupt Priority Registers"/>
+ <register addr="580014f8" rw_flags="RW" width="4" name="ICDIPR[62]" comment="Interrupt Priority Registers"/>
+ <register addr="580014fc" rw_flags="RW" width="4" name="ICDIPR[63]" comment="Interrupt Priority Registers"/>
+ <register addr="58001800" rw_flags="RW" width="4" name="ICDIPTR[0]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001804" rw_flags="RW" width="4" name="ICDIPTR[1]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001808" rw_flags="RW" width="4" name="ICDIPTR[2]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800180c" rw_flags="RW" width="4" name="ICDIPTR[3]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001810" rw_flags="RW" width="4" name="ICDIPTR[4]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001814" rw_flags="RW" width="4" name="ICDIPTR[5]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001818" rw_flags="RW" width="4" name="ICDIPTR[6]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800181c" rw_flags="RW" width="4" name="ICDIPTR[7]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001820" rw_flags="RW" width="4" name="ICDIPTR[8]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001824" rw_flags="RW" width="4" name="ICDIPTR[9]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001828" rw_flags="RW" width="4" name="ICDIPTR[10]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800182c" rw_flags="RW" width="4" name="ICDIPTR[11]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001830" rw_flags="RW" width="4" name="ICDIPTR[12]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001834" rw_flags="RW" width="4" name="ICDIPTR[13]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001838" rw_flags="RW" width="4" name="ICDIPTR[14]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800183c" rw_flags="RW" width="4" name="ICDIPTR[15]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001840" rw_flags="RW" width="4" name="ICDIPTR[16]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001844" rw_flags="RW" width="4" name="ICDIPTR[17]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001848" rw_flags="RW" width="4" name="ICDIPTR[18]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800184c" rw_flags="RW" width="4" name="ICDIPTR[19]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001850" rw_flags="RW" width="4" name="ICDIPTR[20]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001854" rw_flags="RW" width="4" name="ICDIPTR[21]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001858" rw_flags="RW" width="4" name="ICDIPTR[22]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800185c" rw_flags="RW" width="4" name="ICDIPTR[23]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001860" rw_flags="RW" width="4" name="ICDIPTR[24]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001864" rw_flags="RW" width="4" name="ICDIPTR[25]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001868" rw_flags="RW" width="4" name="ICDIPTR[26]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800186c" rw_flags="RW" width="4" name="ICDIPTR[27]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001870" rw_flags="RW" width="4" name="ICDIPTR[28]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001874" rw_flags="RW" width="4" name="ICDIPTR[29]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001878" rw_flags="RW" width="4" name="ICDIPTR[30]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800187c" rw_flags="RW" width="4" name="ICDIPTR[31]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001880" rw_flags="RW" width="4" name="ICDIPTR[32]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001884" rw_flags="RW" width="4" name="ICDIPTR[33]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001888" rw_flags="RW" width="4" name="ICDIPTR[34]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800188c" rw_flags="RW" width="4" name="ICDIPTR[35]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001890" rw_flags="RW" width="4" name="ICDIPTR[36]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001894" rw_flags="RW" width="4" name="ICDIPTR[37]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001898" rw_flags="RW" width="4" name="ICDIPTR[38]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800189c" rw_flags="RW" width="4" name="ICDIPTR[39]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a0" rw_flags="RW" width="4" name="ICDIPTR[40]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a4" rw_flags="RW" width="4" name="ICDIPTR[41]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018a8" rw_flags="RW" width="4" name="ICDIPTR[42]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018ac" rw_flags="RW" width="4" name="ICDIPTR[43]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b0" rw_flags="RW" width="4" name="ICDIPTR[44]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b4" rw_flags="RW" width="4" name="ICDIPTR[45]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018b8" rw_flags="RW" width="4" name="ICDIPTR[46]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018bc" rw_flags="RW" width="4" name="ICDIPTR[47]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c0" rw_flags="RW" width="4" name="ICDIPTR[48]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c4" rw_flags="RW" width="4" name="ICDIPTR[49]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018c8" rw_flags="RW" width="4" name="ICDIPTR[50]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018cc" rw_flags="RW" width="4" name="ICDIPTR[51]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d0" rw_flags="RW" width="4" name="ICDIPTR[52]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d4" rw_flags="RW" width="4" name="ICDIPTR[53]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018d8" rw_flags="RW" width="4" name="ICDIPTR[54]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018dc" rw_flags="RW" width="4" name="ICDIPTR[55]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e0" rw_flags="RW" width="4" name="ICDIPTR[56]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e4" rw_flags="RW" width="4" name="ICDIPTR[57]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018e8" rw_flags="RW" width="4" name="ICDIPTR[58]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018ec" rw_flags="RW" width="4" name="ICDIPTR[59]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f0" rw_flags="RW" width="4" name="ICDIPTR[60]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f4" rw_flags="RW" width="4" name="ICDIPTR[61]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018f8" rw_flags="RW" width="4" name="ICDIPTR[62]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580018fc" rw_flags="RW" width="4" name="ICDIPTR[63]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001900" rw_flags="RW" width="4" name="ICDIPTR[64]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001904" rw_flags="RW" width="4" name="ICDIPTR[65]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001908" rw_flags="RW" width="4" name="ICDIPTR[66]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800190c" rw_flags="RW" width="4" name="ICDIPTR[67]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001910" rw_flags="RW" width="4" name="ICDIPTR[68]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001914" rw_flags="RW" width="4" name="ICDIPTR[69]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001918" rw_flags="RW" width="4" name="ICDIPTR[70]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800191c" rw_flags="RW" width="4" name="ICDIPTR[71]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001920" rw_flags="RW" width="4" name="ICDIPTR[72]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001924" rw_flags="RW" width="4" name="ICDIPTR[73]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001928" rw_flags="RW" width="4" name="ICDIPTR[74]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800192c" rw_flags="RW" width="4" name="ICDIPTR[75]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001930" rw_flags="RW" width="4" name="ICDIPTR[76]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001934" rw_flags="RW" width="4" name="ICDIPTR[77]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001938" rw_flags="RW" width="4" name="ICDIPTR[78]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800193c" rw_flags="RW" width="4" name="ICDIPTR[79]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001940" rw_flags="RW" width="4" name="ICDIPTR[80]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001944" rw_flags="RW" width="4" name="ICDIPTR[81]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001948" rw_flags="RW" width="4" name="ICDIPTR[82]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800194c" rw_flags="RW" width="4" name="ICDIPTR[83]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001950" rw_flags="RW" width="4" name="ICDIPTR[84]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001954" rw_flags="RW" width="4" name="ICDIPTR[85]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001958" rw_flags="RW" width="4" name="ICDIPTR[86]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800195c" rw_flags="RW" width="4" name="ICDIPTR[87]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001960" rw_flags="RW" width="4" name="ICDIPTR[88]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001964" rw_flags="RW" width="4" name="ICDIPTR[89]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001968" rw_flags="RW" width="4" name="ICDIPTR[90]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800196c" rw_flags="RW" width="4" name="ICDIPTR[91]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001970" rw_flags="RW" width="4" name="ICDIPTR[92]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001974" rw_flags="RW" width="4" name="ICDIPTR[93]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001978" rw_flags="RW" width="4" name="ICDIPTR[94]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800197c" rw_flags="RW" width="4" name="ICDIPTR[95]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001980" rw_flags="RW" width="4" name="ICDIPTR[96]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001984" rw_flags="RW" width="4" name="ICDIPTR[97]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001988" rw_flags="RW" width="4" name="ICDIPTR[98]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800198c" rw_flags="RW" width="4" name="ICDIPTR[99]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001990" rw_flags="RW" width="4" name="ICDIPTR[100]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001994" rw_flags="RW" width="4" name="ICDIPTR[101]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001998" rw_flags="RW" width="4" name="ICDIPTR[102]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="5800199c" rw_flags="RW" width="4" name="ICDIPTR[103]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a0" rw_flags="RW" width="4" name="ICDIPTR[104]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a4" rw_flags="RW" width="4" name="ICDIPTR[105]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019a8" rw_flags="RW" width="4" name="ICDIPTR[106]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019ac" rw_flags="RW" width="4" name="ICDIPTR[107]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b0" rw_flags="RW" width="4" name="ICDIPTR[108]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b4" rw_flags="RW" width="4" name="ICDIPTR[109]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019b8" rw_flags="RW" width="4" name="ICDIPTR[110]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019bc" rw_flags="RW" width="4" name="ICDIPTR[111]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c0" rw_flags="RW" width="4" name="ICDIPTR[112]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c4" rw_flags="RW" width="4" name="ICDIPTR[113]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019c8" rw_flags="RW" width="4" name="ICDIPTR[114]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019cc" rw_flags="RW" width="4" name="ICDIPTR[115]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d0" rw_flags="RW" width="4" name="ICDIPTR[116]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d4" rw_flags="RW" width="4" name="ICDIPTR[117]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019d8" rw_flags="RW" width="4" name="ICDIPTR[118]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019dc" rw_flags="RW" width="4" name="ICDIPTR[119]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e0" rw_flags="RW" width="4" name="ICDIPTR[120]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e4" rw_flags="RW" width="4" name="ICDIPTR[121]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019e8" rw_flags="RW" width="4" name="ICDIPTR[122]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019ec" rw_flags="RW" width="4" name="ICDIPTR[123]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f0" rw_flags="RW" width="4" name="ICDIPTR[124]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f4" rw_flags="RW" width="4" name="ICDIPTR[125]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019f8" rw_flags="RW" width="4" name="ICDIPTR[126]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="580019fc" rw_flags="RW" width="4" name="ICDIPTR[127]" comment="Interrupt Processor Targets Registers"/>
+ <register addr="58001c00" rw_flags="RW" width="4" name="ICDICFR[0]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c04" rw_flags="RW" width="4" name="ICDICFR[1]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c08" rw_flags="RW" width="4" name="ICDICFR[2]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c0c" rw_flags="RW" width="4" name="ICDICFR[3]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c10" rw_flags="RW" width="4" name="ICDICFR[4]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c14" rw_flags="RW" width="4" name="ICDICFR[5]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c18" rw_flags="RW" width="4" name="ICDICFR[6]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c1c" rw_flags="RW" width="4" name="ICDICFR[7]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c20" rw_flags="RW" width="4" name="ICDICFR[8]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c24" rw_flags="RW" width="4" name="ICDICFR[9]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c28" rw_flags="RW" width="4" name="ICDICFR[10]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c2c" rw_flags="RW" width="4" name="ICDICFR[11]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c30" rw_flags="RW" width="4" name="ICDICFR[12]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c34" rw_flags="RW" width="4" name="ICDICFR[13]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c38" rw_flags="RW" width="4" name="ICDICFR[14]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c3c" rw_flags="RW" width="4" name="ICDICFR[15]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c40" rw_flags="RW" width="4" name="ICDICFR[16]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c44" rw_flags="RW" width="4" name="ICDICFR[17]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c48" rw_flags="RW" width="4" name="ICDICFR[18]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c4c" rw_flags="RW" width="4" name="ICDICFR[19]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c50" rw_flags="RW" width="4" name="ICDICFR[20]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c54" rw_flags="RW" width="4" name="ICDICFR[21]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c58" rw_flags="RW" width="4" name="ICDICFR[22]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c5c" rw_flags="RW" width="4" name="ICDICFR[23]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c60" rw_flags="RW" width="4" name="ICDICFR[24]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c64" rw_flags="RW" width="4" name="ICDICFR[25]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c68" rw_flags="RW" width="4" name="ICDICFR[26]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c6c" rw_flags="RW" width="4" name="ICDICFR[27]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c70" rw_flags="RW" width="4" name="ICDICFR[28]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c74" rw_flags="RW" width="4" name="ICDICFR[29]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c78" rw_flags="RW" width="4" name="ICDICFR[30]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001c7c" rw_flags="RW" width="4" name="ICDICFR[31]" comment="Interrupt Configuration Registers"/>
+ <register addr="58001f00" rw_flags="W" width="4" name="ICDSGIR" comment="Software Generated Interrupt Register"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_int_ifc subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_int_ifc">
+ <block name="periph_int_ifc" comment="">
+ <register addr="58000100" rw_flags="RW" width="4" name="ICCICR" comment="CPU Interface Control Register"/>
+ <register addr="58000104" rw_flags="RW" width="4" name="ICCPMR" comment="Interrupt Priority Mask Register"/>
+ <register addr="58000108" rw_flags="RW" width="4" name="ICCBPR" comment="Binary Point Register"/>
+ <register addr="5800010c" rw_flags="R" width="4" name="ICCIAR" comment="Interrupt Acknowledge Register"/>
+ <register addr="58000110" rw_flags="W" width="4" name="ICCEOIR" comment="End Of Interrupt Register"/>
+ <register addr="58000114" rw_flags="R" width="4" name="ICCRPR" comment="Running Priority Register"/>
+ <register addr="58000118" rw_flags="R" width="4" name="ICCHPIR" comment="Highest Pending Interrupt Register"/>
+ <register addr="580001fc" rw_flags="R" width="4" name="ICCIIDR" comment="Highest Pending Interrupt Register"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for periph_scu subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="periph_scu">
+ <block name="periph_scu" comment="">
+ <register addr="58000000" rw_flags="RW" width="4" name="SCU_CONTROL" comment="SCU Control Register - bit 0 is SCU Enable"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for pmu_conf subsystem moredump
+ Chip hash: f568
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="pmu_conf">
+ <block name="pmu_boot" comment="">
+ <register addr="14c60000" rw_flags="RW" width="1" name="BOOT_SOURCE" comment="Boot source 0: rom, 1: CHOP"/>
+ <register addr="14c60004" rw_flags="RW" width="1" name="BOOT_CFG_ACK" comment="Configuration ACK"/>
+ </block>
+ <block name="pmu_remap" comment="">
+ <register addr="14c50000" rw_flags="RW" width="4" name="PROC_RMP_BOOT_ADDR" comment="20 MSbits of offset to be added to processor 32 bit boot address (the processor is typically booting from 0x0). This is the address where the processor starts booting from (from WLBT processor programmers view)"/>
+ <register addr="14c50004" rw_flags="RW" width="1" name="SWEEPER_DBUS_BYPASS" comment="Bypass DBUS Sweeper"/>
+ <register addr="14c50008" rw_flags="RW" width="1" name="SWEEPER_PBUS_BYPASS" comment="Bypass PBUS Sweeper"/>
+ <register addr="14c5000c" rw_flags="RW" width="1" name="MEMCLK_EN" comment="Memory Clock Enable"/>
+ <register addr="14c50010" rw_flags="RW" width="4" name="CHIP_VERSION_ID" comment="Chip version IDs"/>
+ </block>
+ <block name="pmu_tzpc" comment="">
+ <register addr="14c10000" rw_flags="R" width="1" name="TZPC_PROT0STAT" comment="TrustZone status for register banks, aliased to 0x200"/>
+ <register addr="14c10004" rw_flags="W" width="1" name="TZPC_PROT0SET" comment="TrustZone set for register banks, aliased to 0x204"/>
+ <register addr="14c10008" rw_flags="W" width="1" name="TZPC_PROT0CLR" comment="TrustZone clear for register banks, aliased to 0x208"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+(c) SCSC 2015-2016 autogenerated by moredump.py as part of 'drun prep'.
+ Changes made to this file may cause incorrect behaviour and will be lost if it is regenerated.
+
+ XML file defining registers for chip subsystem moredump
+ Chip hash: f12a
+
+
+-->
+
+<subsystem xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.samsung.com Registers.xsd"
+ name="chip">
+ <block name="alwayson_rf" comment="">
+ <register addr="00000000" rw_flags="R" width="2" name="CHIP_VERSION" comment="Chip Version and ID (S610 EVT0=0x00B0, S610 EVT1=0x10B0, S610 EVT1.1=0x11B0, S610 EVT2=0x20B0, S612 EVT0=0x00B1, S612 EVT1=0x10B1, S620 EVT0=0x00B2, S620 EVT0.1=0x01B2)"/>
+ <register addr="00000004" rw_flags="RW" width="2" name="RFIC_CONFIG" comment="Main BT/WL configuration register for RFIC."/>
+ <register addr="00000008" rw_flags="RW" width="1" name="RFIC_PD_CONTROL" comment="RFIC BTWL power domain control from S612 EVT0 onwards."/>
+ <register addr="0000000c" rw_flags="R" width="1" name="RFIC_PD_STATUS" comment="Indicates the status of the switches in the power domain from S612 EVT0 onwards."/>
+ <register addr="00000010" rw_flags="RW" width="2" name="RFIC_BTWL_TO_FM_COEX" comment="BTWL to FM signalling for Coexistence."/>
+ <register addr="00000014" rw_flags="R" width="2" name="RFIC_FM_TO_BTWL_COEX" comment="FM to BTWL signalling for Coexistence."/>
+ <register addr="00000018" rw_flags="R" width="1" name="RFIC_PLL_UNLOCK_STATUS" comment="Set on falling edge of Aux PLL lock indicator when RFIC_CONFIG_PLL_UNLOCK_EN=1."/>
+ <register addr="0000001c" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA0" comment="[ 31: 0] of 128-bit EFUSE write data word."/>
+ <register addr="00000020" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA1" comment="[ 63:32] of 128-bit EFUSE write data word."/>
+ <register addr="00000024" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA2" comment="[ 95:64] of 128-bit EFUSE write data word."/>
+ <register addr="00000028" rw_flags="RW" width="4" name="RFIC_EFUSE_WRITE_DATA3" comment="[127:96] of 128-bit EFUSE write data word."/>
+ <register addr="0000002c" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA0" comment="[ 31: 0] of 128-bit EFUSE read data word."/>
+ <register addr="00000030" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA1" comment="[ 63:32] of 128-bit EFUSE read data word."/>
+ <register addr="00000034" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA2" comment="[ 95:64] of 128-bit EFUSE read data word."/>
+ <register addr="00000038" rw_flags="R" width="4" name="RFIC_EFUSE_READ_DATA3" comment="[127:96] of 128-bit EFUSE read data word."/>
+ <register addr="0000003c" rw_flags="RW" width="1" name="RFIC_EFUSE_START" comment="Writing to this register starts the specified operation setup in RFIC_EFUSE_CONFIG_MODE."/>
+ <register addr="00000040" rw_flags="RW" width="2" name="RFIC_EFUSE_CONFIG" comment="Config word for EFUSE operation."/>
+ <register addr="00000044" rw_flags="R" width="1" name="RFIC_EFUSE_STATUS" comment="Indicates the current EFUSE status."/>
+ <register addr="00000048" rw_flags="RW" width="2" name="RFIC_EFUSE_ORIDE_CTRL" comment="Override control for EFUSE hardware interface - control register. Use RFIC_EFUSE_CONFIG_FSOURCE_EN to enable the programming voltage."/>
+ <register addr="0000004c" rw_flags="RW" width="2" name="RFIC_CLKGEN_ENABLES" comment="Clock enables"/>
+ <register addr="00000050" rw_flags="RW" width="4" name="RFIC_CLKGEN_MISC" comment="Clock controls"/>
+ <register addr="00000054" rw_flags="RW" width="2" name="RFIC_CLKGEN_1632_SKIP_VALUE" comment="Number of 80MHz clks between each skip of 16MHz clock (set to desired_interval-1). 32MHz clock is skipped twice in this period, so this should be an even value or there will be sytematic error"/>
+ <register addr="00000058" rw_flags="RW" width="1" name="RFIC_CLKGEN_SYSTEM_TIME_DIV_RATIO" comment="Divide ratio for system timer (from 80MHz clock)"/>
+ <register addr="0000005c" rw_flags="RW" width="1" name="RFIC_CLKGEN_SYSTEM_TIME_EN" comment="Enable System Timer"/>
+ <register addr="00000060" rw_flags="RW" width="4" name="RFIC_CLKGEN_SYSTEM_TIME_INIT_VAL" comment="Set initial value for System Timer"/>
+ <register addr="00000064" rw_flags="R" width="4" name="RFIC_CLKGEN_SYSTEM_TIME" comment="Current value of System Timer"/>
+ <register addr="00000068" rw_flags="R" width="1" name="AUX_ANA_STATUS0" comment=""/>
+ <register addr="0000006c" rw_flags="RW" width="4" name="AUX_ANA_ENABLES" comment=""/>
+ <register addr="00000070" rw_flags="RW" width="4" name="AUX_ANA_SH_CFG0" comment=""/>
+ <register addr="00000074" rw_flags="RW" width="4" name="AUX_ANA_SH_CFG1" comment=""/>
+ <register addr="00000078" rw_flags="RW" width="2" name="AUX_ANA_SH_CFG2" comment=""/>
+ <register addr="0000007c" rw_flags="RW" width="4" name="AUX_ANA_CFG0" comment=""/>
+ <register addr="00000080" rw_flags="RW" width="4" name="AUX_ANA_SPARES" comment=""/>
+ <register addr="00000084" rw_flags="RW" width="4" name="RFIC_PAD_MUX_CTRL" comment="PIO mux controls for PIO0 to PIO3"/>
+ <register addr="00000088" rw_flags="RW" width="1" name="RFIC_SCAN_MODE_ENABLES" comment="DFT Scan mode configuration register. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="0000008c" rw_flags="RW" width="4" name="RFIC_SCAN_CONFIG" comment="DFT Scan mode configuration register. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000090" rw_flags="RW" width="1" name="RFIC_SCAN_RESERVE_REGS" comment="DFT Scan mode reserve registers. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000094" rw_flags="R" width="2" name="RFIC_SCAN_OBSERVE_REGS" comment="DFT Scan mode observable regsiters. *FIRMWARE DO NOT TOUCH THIS*"/>
+ <register addr="00000098" rw_flags="RW" width="2" name="RFIC_SPARES0" comment="Spare bits."/>
+ <register addr="0000009c" rw_flags="RW" width="2" name="RFIC_SPARES1" comment="Spare bits."/>
+ <register addr="000000a0" rw_flags="R" width="4" name="RFIC_SCSC0" comment="Chris Hunter/Damien Smith"/>
+ <register addr="000000a4" rw_flags="R" width="4" name="RFIC_SCSC1" comment="Michael Cowell/Andy Barnish"/>
+ <register addr="000000a8" rw_flags="R" width="4" name="RFIC_SCSC2" comment="Stelios Staveris/Hayley Bird"/>
+ <register addr="000000ac" rw_flags="R" width="4" name="RFIC_SCSC3" comment="Dave Price/Riccardo Micci"/>
+ </block>
+ <block name="bt_rf" comment="">
+ <register addr="00002000" rw_flags="RW" width="1" name="BT_RF_CONFIG" comment=""/>
+ <register addr="00002004" rw_flags="RW" width="1" name="BT_RF_DEBUG_SEL" comment=""/>
+ <register addr="00002008" rw_flags="RW" width="1" name="BT_RF_ZIPPY_CONFIG" comment=""/>
+ <register addr="0000200c" rw_flags="RW" width="1" name="BT_TX_DEBUG_SEL" comment="Bluetooth Transmit debug mux select"/>
+ <register addr="00002010" rw_flags="RW" width="1" name="BT_TX_INTERFACE_CTRL" comment=""/>
+ <register addr="00002014" rw_flags="RW" width="4" name="BT_TX_MOD_TEST" comment=""/>
+ <register addr="00002018" rw_flags="RW" width="1" name="BT_TX_PATTERN_GEN_CFG" comment=""/>
+ <register addr="0000201c" rw_flags="RW" width="1" name="BT_TX_CTRL_DEBUG_SEL" comment="Bluetooth Transmit Control debug mux select."/>
+ <register addr="00002020" rw_flags="RW" width="4" name="BT_TX_CTRL_CFG" comment="Bluetooth Transmit Control configuration."/>
+ <register addr="00002024" rw_flags="R" width="1" name="BT_TX_CTRL_STATUS" comment="The current Bluetooth Tx radio mode"/>
+ <register addr="00002028" rw_flags="RW" width="1" name="BT_TX_TIMER_CFG" comment="Bluetooth Transmit Radio Timer configuration."/>
+ <register addr="0000202c" rw_flags="R" width="1" name="BT_TX_TIMER_STATUS" comment="Bluetooth Transmit Radio Timer status."/>
+ <register addr="00002030" rw_flags="RW" width="1" name="BT_TX_TIMER_SW_TRIGGERS" comment="Bluetooth Transmit Radio Timer software triggers."/>
+ <register addr="00002034" rw_flags="RW" width="4" name="BT_TX_TIMER_EVENT_TIME" comment="Set the required Tx event time. Used when timing to an event, not used when timing from an event."/>
+ <register addr="00002038" rw_flags="RW" width="1" name="BT_TX_TIMER_DIG_SW_ORIDE" comment="Bluetooth Transmit Radio Timer digital enable software overrides."/>
+ <register addr="0000203c" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_PLL_ABORT" comment="Bluetooth Tx Radio Timer - PLL Abort trigger configuration."/>
+ <register addr="00002040" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_START" comment="Bluetooth Tx Radio Timer - Start trigger configuration."/>
+ <register addr="00002044" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_SW_ABORT" comment="Bluetooth Tx Radio Timer - Software Abort trigger configuration."/>
+ <register addr="00002048" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_DONE" comment="Bluetooth Tx Radio Timer - Done trigger configuration."/>
+ <register addr="0000204c" rw_flags="RW" width="2" name="BT_TX_TIMER_TRIGGER_COEX_ABORT" comment="Bluetooth Tx Radio Timer - Coex Abort trigger configuration."/>
+ <register addr="00002050" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT0_ANA_EN" comment="Transmit slot 0 Analogue Enables"/>
+ <register addr="00002054" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT1_ANA_EN" comment="Transmit slot 1 Analogue Enables"/>
+ <register addr="00002058" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT2_ANA_EN" comment="Transmit slot 2 Analogue Enables"/>
+ <register addr="0000205c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT3_ANA_EN" comment="Transmit slot 3 Analogue Enables"/>
+ <register addr="00002060" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT4_ANA_EN" comment="Transmit slot 4 Analogue Enables"/>
+ <register addr="00002064" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT5_ANA_EN" comment="Transmit slot 5 Analogue Enables"/>
+ <register addr="00002068" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT6_ANA_EN" comment="Transmit slot 6 Analogue Enables"/>
+ <register addr="0000206c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT7_ANA_EN" comment="Transmit slot 7 Analogue Enables"/>
+ <register addr="00002070" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT8_ANA_EN" comment="Transmit slot 8 Analogue Enables"/>
+ <register addr="00002074" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT9_ANA_EN" comment="Transmit slot 9 Analogue Enables"/>
+ <register addr="00002078" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT10_ANA_EN" comment="Transmit slot 10 Analogue Enables"/>
+ <register addr="0000207c" rw_flags="RW" width="4" name="BT_TX_TIMER_SLOT11_ANA_EN" comment="Transmit slot 11 Analogue Enables"/>
+ <register addr="00002080" rw_flags="RW" width="4" name="BT_TX_TIMER_DIG0_EN" comment=""/>
+ <register addr="00002084" rw_flags="RW" width="2" name="BT_TX_TIMER_DIG1_EN" comment=""/>
+ <register addr="00002088" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY0" comment=""/>
+ <register addr="0000208c" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY1" comment=""/>
+ <register addr="00002090" rw_flags="RW" width="4" name="BT_TX_TIMER_DELAY2" comment=""/>
+ <register addr="00002094" rw_flags="RW" width="4" name="BT_TX_CONFIG" comment=""/>
+ <register addr="00002098" rw_flags="RW" width="1" name="BT_TX_BB_RAMP_CONFIG" comment=""/>
+ <register addr="0000209c" rw_flags="RW" width="4" name="BT_TX_SCALE_CONFIG" comment=""/>
+ <register addr="000020a0" rw_flags="RW" width="1" name="BT_TX_MAX_ATT_CONFIG" comment=""/>
+ <register addr="000020a4" rw_flags="RW" width="4" name="BT_TX_GAIN_CONFIG" comment=""/>
+ <register addr="000020a8" rw_flags="R" width="1" name="BT_TX_GAIN" comment=""/>
+ <register addr="000020ac" rw_flags="RW" width="4" name="BT_TX_MR_CONFIG" comment=""/>
+ <register addr="000020b0" rw_flags="RW" width="1" name="BT_TX_MR_MOD_DELAY" comment=""/>
+ <register addr="000020b4" rw_flags="RW" width="4" name="BT_POLAR_CTRL" comment="General control register"/>
+ <register addr="000020b8" rw_flags="RW" width="4" name="BT_POLAR_DATA" comment=""/>
+ <register addr="000020bc" rw_flags="RW" width="4" name="BT_POLAR_MUX" comment="Mux control register"/>
+ <register addr="000020c0" rw_flags="RW" width="4" name="BT_POLAR_QUAD_POLAR_DATA" comment=""/>
+ <register addr="000020c4" rw_flags="RW" width="2" name="BT_POLAR_AA_FIR_CONTROL" comment="FIR filter control for AntiAliasing"/>
+ <register addr="000020c8" rw_flags="RW" width="4" name="BT_POLAR_AA_FIR_TAPS" comment="Upper AntiAliasing FIR filter taps"/>
+ <register addr="000020cc" rw_flags="R" width="2" name="BT_POLAR_DEBUG_STATUS" comment="Connected to sig gen Tone."/>
+ <register addr="000020d0" rw_flags="RW" width="4" name="BT_POLAR_QUAD_POLAR_CONSTS" comment=""/>
+ <register addr="000020d4" rw_flags="RW" width="2" name="BT_POLAR_COMPENSATION_DATA_WRITE" comment="Compensation Y LUT write register"/>
+ <register addr="000020d8" rw_flags="R" width="2" name="BT_POLAR_COMPENSATION_DATA_READ" comment="Compensation Y LUT read register"/>
+ <register addr="000020dc" rw_flags="RW" width="1" name="BT_POLAR_COMPENSATION_ADDR" comment="Compensation Y LUT address register"/>
+ <register addr="000020e0" rw_flags="RW" width="4" name="BT_POLAR_TEST_STIM" comment="Polar Test stimulus"/>
+ <register addr="000020e4" rw_flags="RW" width="4" name="BT_POLAR_IIR_COEFF1_LSW" comment="TX POLAR IIR filter coefficients (Biquad 1)"/>
+ <register addr="000020e8" rw_flags="RW" width="1" name="BT_POLAR_IIR_COEFF1_MSB" comment="TX POLAR IIR filter coefficients (Biquad 1)"/>
+ <register addr="000020ec" rw_flags="RW" width="4" name="BT_POLAR_IIR_COEFF2_LSW" comment="TX POLAR IIR filter coefficients (Biquad 2)"/>
+ <register addr="000020f0" rw_flags="RW" width="1" name="BT_POLAR_IIR_COEFF2_MSB" comment="TX POLAR IIR filter coefficients (Biquad 2)"/>
+ <register addr="000020f4" rw_flags="RW" width="2" name="BT_POLAR_IIR_FILTER_CFG" comment="TX POLAR IIR filter configuration"/>
+ <register addr="000020f8" rw_flags="RW" width="4" name="BT_POLAR_POLAR_QUAD_CORR" comment=""/>
+ <register addr="000020fc" rw_flags="RW" width="2" name="BT_POLAR_POLAR_QUAD_OFFSET" comment="I and Q offset adjustments for Polar to IQ conversion"/>
+ <register addr="00002100" rw_flags="RW" width="4" name="BT_POLAR_POLAR_QUAD_CONSTS" comment=""/>
+ <register addr="00002104" rw_flags="RW" width="4" name="BT_POLAR_SIGGEN_CTRL" comment="Cal Siggen sine wave Ctrl"/>
+ <register addr="00002108" rw_flags="RW" width="1" name="BT_POLAR_INVERT_CTRL" comment="Fallback IQ Inversion control"/>
+ <register addr="0000210c" rw_flags="RW" width="1" name="BT_POLAR_SAMPLE_CTRL" comment="Controls for the BT Polar Sample block"/>
+ <register addr="00002110" rw_flags="RW" width="4" name="BT_TX_FREQ_RESAMPLE_CTRL" comment="Bluetooth Transmit Freq resampling control."/>
+ <register addr="00002114" rw_flags="RW" width="4" name="BT_TX_FREQ_RESAMPLE_TINC" comment="Bluetooth Transmit Freq resampling Tinc 16.16 format (xx.xxxxxxx) signed so 00.1000000 = 0.5, 00.0100000 = 0.25,."/>
+ <register addr="00002118" rw_flags="RW" width="1" name="BT_TX_ANTENNA_ID" comment="Control the default antenna ID selected for BT Tx"/>
+ <register addr="0000211c" rw_flags="RW" width="4" name="BT_TX_SUPP_CTRL" comment="Control BT Tx supplemental antenna switching"/>
+ <register addr="00002120" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[0]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002124" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[1]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002128" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[2]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000212c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[3]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002130" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[4]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002134" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[5]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002138" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[6]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000213c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[7]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002140" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[8]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002144" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[9]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002148" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[10]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000214c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[11]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002150" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[12]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002154" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[13]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002158" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[14]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000215c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[15]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002160" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[16]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002164" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[17]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002168" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[18]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000216c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[19]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002170" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[20]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002174" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[21]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002178" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[22]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000217c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[23]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002180" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[24]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002184" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[25]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002188" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[26]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000218c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[27]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002190" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[28]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002194" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[29]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002198" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[30]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000219c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[31]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[32]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[33]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021a8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[34]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021ac" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[35]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[36]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[37]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021b8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[38]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021bc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[39]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[40]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[41]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021c8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[42]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021cc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[43]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[44]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[45]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021d8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[46]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021dc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[47]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[48]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[49]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021e8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[50]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021ec" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[51]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f0" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[52]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f4" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[53]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021f8" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[54]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000021fc" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[55]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002200" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[56]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002204" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[57]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002208" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[58]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000220c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[59]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002210" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[60]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002214" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[61]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002218" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[62]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000221c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[63]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002220" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[64]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002224" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[65]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002228" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[66]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000222c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[67]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002230" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[68]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002234" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[69]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002238" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[70]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000223c" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[71]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002240" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[72]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002244" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[73]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002248" rw_flags="RW" width="1" name="BT_TX_SUPP_ANTENNA_SEQ[74]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000224c" rw_flags="RW" width="4" name="BT_RF_RX_CFG" comment="Bluetooth Rx configuration."/>
+ <register addr="00002250" rw_flags="RW" width="1" name="BT_RX_INTERFACE_CTRL" comment="Bluetooth Rx Interface control."/>
+ <register addr="00002254" rw_flags="RW" width="1" name="BT_RX_DEBUG_SEL" comment="Bluetooth Rx debug mux select."/>
+ <register addr="00002258" rw_flags="R" width="1" name="BT_RX_LR_CI" comment="Bluetooth Rx Long Range coding indicator."/>
+ <register addr="0000225c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[0]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002260" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[1]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002264" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[2]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002268" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[3]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000226c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[4]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002270" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[5]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002274" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[6]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002278" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[7]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000227c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[8]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002280" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[9]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002284" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[10]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002288" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[11]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000228c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[12]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002290" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[13]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002294" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[14]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002298" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[15]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000229c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[16]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[17]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[18]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022a8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[19]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022ac" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[20]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[21]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[22]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022b8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[23]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022bc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[24]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[25]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[26]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022c8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[27]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022cc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[28]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[29]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[30]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022d8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[31]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022dc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[32]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[33]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[34]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022e8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[35]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022ec" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[36]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f0" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[37]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f4" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[38]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022f8" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[39]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="000022fc" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[40]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002300" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[41]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002304" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[42]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002308" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[43]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000230c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[44]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002310" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[45]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002314" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[46]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002318" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[47]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000231c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[48]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002320" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[49]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002324" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[50]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002328" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[51]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000232c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[52]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002330" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[53]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002334" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[54]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002338" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[55]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000233c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[56]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002340" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[57]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002344" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[58]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002348" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[59]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000234c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[60]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002350" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[61]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002354" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[62]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002358" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[63]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000235c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[64]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002360" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[65]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002364" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[66]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002368" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[67]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000236c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[68]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002370" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[69]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002374" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[70]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002378" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[71]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="0000237c" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[72]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002380" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[73]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002384" rw_flags="RW" width="1" name="BT_RX_SUPP_ANTENNA_SEQ[74]" comment="Sequence of Antenna IDs; each ID must be between 0x0 and 0x7; a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002388" rw_flags="RW" width="1" name="BT_RX_CTRL_DEBUG_SEL" comment="Bluetooth Rx Control debug mux select."/>
+ <register addr="0000238c" rw_flags="R" width="4" name="BT_RX_BDR_SYNC_TIME" comment="The time we found BDR Sync (in relation to RFIC System Time)"/>
+ <register addr="00002390" rw_flags="RW" width="4" name="BT_RX_BDR_SYNC_TIMEOUT_OFFSET" comment="The number of microseconds before the BDR sync timeout is asserted from the point the Rx Digital enable is set (in reference to the RFIC system time)"/>
+ <register addr="00002394" rw_flags="RW" width="4" name="BT_RX_LR_SYNC_TIMEOUT_OFFSET" comment="The number of microseconds before the LR sync timeout is asserted from the point the Rx Digital enable is set (in reference to the RFIC system time)"/>
+ <register addr="00002398" rw_flags="RW" width="2" name="BT_RX_CTRL_CFG" comment="Bluetooth Rx Control configuration."/>
+ <register addr="0000239c" rw_flags="RW" width="4" name="BT_RX_MLE_ESCO_OFFSET" comment="Set to enable EDR3 symbol alignment workaround logic for Java EVT0."/>
+ <register addr="000023a0" rw_flags="RW" width="4" name="BT_RX_MLE_ACL_OFFSET" comment="Set to enable EDR3 symbol alignment workaround logic for Java EVT0."/>
+ <register addr="000023a4" rw_flags="RW" width="4" name="BT_RX_MR_SYNC_TIMING" comment="BT DPSK synchronization timing configuration"/>
+ <register addr="000023a8" rw_flags="RW" width="1" name="BT_RX_TIMER_CFG" comment="Bluetooth Rx Radio Timer configuration."/>
+ <register addr="000023ac" rw_flags="R" width="1" name="BT_RX_TIMER_STATUS" comment="Bluetooth Rx Radio Timer status."/>
+ <register addr="000023b0" rw_flags="RW" width="1" name="BT_RX_TIMER_SW_TRIGGERS" comment="Bluetooth Rx Radio Timer software triggers."/>
+ <register addr="000023b4" rw_flags="RW" width="4" name="BT_RX_TIMER_EVENT_TIME" comment="Set the required Tx event time. Used when timing to an event, not used when timing from an event."/>
+ <register addr="000023b8" rw_flags="RW" width="1" name="BT_RX_TIMER_DIG_SW_ORIDE" comment="Override timer digital outputs, when masked."/>
+ <register addr="000023bc" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_PLL_ABORT" comment="Bluetooth Rx Radio Timer - PLL Abort trigger configuration."/>
+ <register addr="000023c0" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_START" comment="Bluetooth Rx Radio Timer - Start trigger configuration."/>
+ <register addr="000023c4" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_SW_ABORT" comment="Bluetooth Rx Radio Timer - Softwre Abort trigger configuration."/>
+ <register addr="000023c8" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_DONE" comment="Bluetooth Rx Radio Timer - Done trigger configuration."/>
+ <register addr="000023cc" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_SYNC_TIMEOUT" comment="Bluetooth Rx Radio Timer - BDR Sync Timeout trigger configuration."/>
+ <register addr="000023d0" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_COEX_ABORT" comment="Bluetooth Rx Radio Timer - Coex Abort trigger configuration."/>
+ <register addr="000023d4" rw_flags="RW" width="2" name="BT_RX_TIMER_TRIGGER_MLSE_EARLY" comment="Bluetooth Rx Radio Timer - MLSE Early trigger configuration."/>
+ <register addr="000023d8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT0_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023dc" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT1_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e0" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT2_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e4" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT3_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023e8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT4_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023ec" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT5_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f0" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT6_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f4" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT7_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023f8" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT8_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="000023fc" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT9_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002400" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT10_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002404" rw_flags="RW" width="4" name="BT_RX_TIMER_SLOT11_ANA_EN" comment="Receive slot 0 Analogue Enables"/>
+ <register addr="00002408" rw_flags="RW" width="4" name="BT_RX_TIMER_DIG0_EN" comment=""/>
+ <register addr="0000240c" rw_flags="RW" width="2" name="BT_RX_TIMER_DIG1_EN" comment=""/>
+ <register addr="00002410" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY0" comment=""/>
+ <register addr="00002414" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY1" comment=""/>
+ <register addr="00002418" rw_flags="RW" width="4" name="BT_RX_TIMER_DELAY2" comment=""/>
+ <register addr="0000241c" rw_flags="RW" width="4" name="BT_RX_MR_FREQ_CONFIG" comment="BT DPSK demodulator frequency offset in bits [12:0] - Bit 15 when *** cleared *** enables spectrum inversion (change sign of Q channel *** after *** SDDCRS mixer)"/>
+ <register addr="00002420" rw_flags="RW" width="4" name="BT_CAL_ANALYSER_CFG" comment="This register configures the signal analyser"/>
+ <register addr="00002424" rw_flags="R" width="4" name="BT_CAL_ANALYSER_RESULT" comment="This register contains the values generated by the signal analyser, Real = [7:0], Imag = [15:8]"/>
+ <register addr="00002428" rw_flags="RW" width="4" name="BT_RX_DEMOD_CONFIG" comment="BT GFSK demodulator configuration"/>
+ <register addr="0000242c" rw_flags="RW" width="2" name="BT_BDR_FREQ_DISC_CONFIG" comment="Configures GFSK frequency discriminator"/>
+ <register addr="00002430" rw_flags="RW" width="4" name="BT_BDR_FREQ2_CONFIG" comment="Configures GFSK frequency discriminator"/>
+ <register addr="00002434" rw_flags="RW" width="2" name="BT_RX_DEMOD_BDR_DECISION_EQ_CONFIG" comment="Configures the decision-directed BDR equaliser"/>
+ <register addr="00002438" rw_flags="RW" width="1" name="BT_PHASESQUELCH_CONFIG" comment="'Squelch' functionality for frequency discriminator"/>
+ <register addr="0000243c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_CONFIG" comment="Config for and enable for the new RX BDR enhancements provided by MLSE block"/>
+ <register addr="00002440" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_LR_EXP_FREQ_CONFIG" comment="Config for MLSE LR, expected FREQ"/>
+ <register addr="00002444" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_SYNC_CONFIG" comment="MLSE config for the FFT sync block"/>
+ <register addr="00002448" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_SYNC_POWER" comment="New setting for the FFT sync block, false sync optimisations"/>
+ <register addr="0000244c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLSE_LR_SYNC_MIN_POWER" comment="Replace LR synchroniser ECO, creat MIN_POWER reg "/>
+ <register addr="00002450" rw_flags="RW" width="1" name="BT_RX_DEMOD_MLSE_DEBUG" comment="Debug Sel"/>
+ <register addr="00002454" rw_flags="RW" width="2" name="BT_RX_SYNC_CONFIG" comment="Additional Synchroniser config"/>
+ <register addr="00002458" rw_flags="RW" width="4" name="BT_RF_ACCESS_CODE_LAP" comment="Lower address part of BT address to generate access code"/>
+ <register addr="0000245c" rw_flags="RW" width="4" name="BT_RX_WBREE_ACCESS_ADDR" comment="Wibree Access Address. Sync word to seacrhg for in received packets"/>
+ <register addr="00002460" rw_flags="RW" width="2" name="BT_RX_ANT_NET_ADDR" comment="ANT Network Address for Rx Synchroniser"/>
+ <register addr="00002464" rw_flags="RW" width="2" name="BT_RX_LLR_CONFIG" comment="LLR Configuration"/>
+ <register addr="00002468" rw_flags="RW" width="4" name="BT_RF_LLR_TRIGGER_LSW" comment="LLR Access Code to transmit or receive LSW"/>
+ <register addr="0000246c" rw_flags="RW" width="4" name="BT_RF_LLR_TRIGGER_MSW" comment="LLR Access Code to transmit or receive MSW"/>
+ <register addr="00002470" rw_flags="R" width="2" name="BT_RX_SYNC_NUM_ERRORS" comment="Number of bit errors in access code"/>
+ <register addr="00002474" rw_flags="R" width="2" name="BT_RX_FREQ_DISCRIM" comment="BT GFSK frequency discriminator output"/>
+ <register addr="00002478" rw_flags="R" width="2" name="BT_RX_FREQ_ERROR" comment="BT GFSK actual frequency offset output"/>
+ <register addr="0000247c" rw_flags="RW" width="2" name="BT_RX_DEMOD_MLE_CONFIG" comment="Config for and enable for the new RX EDR enhancements provided by MLE block"/>
+ <register addr="00002480" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM00" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002484" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM04" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002488" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM08" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="0000248c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_THCOM12" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002490" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE00" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002494" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE04" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="00002498" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE08" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="0000249c" rw_flags="RW" width="4" name="BT_RX_DEMOD_MLE_HBASE12" comment="Config for EDR enhancements provided by MLE block"/>
+ <register addr="000024a0" rw_flags="RW" width="4" name="BT_RX_MR_SYNC_CONFIG" comment="BT DPSK demodulator synchronization configuration"/>
+ <register addr="000024a4" rw_flags="RW" width="2" name="BT_RX_MR_SAMP_CONFIG" comment="BT DPSK demodulator slicer configuration"/>
+ <register addr="000024a8" rw_flags="RW" width="4" name="BT_RX_MR_EQ_TAPS_LSW" comment="BT DPSK RRC-filter coefficients LSW"/>
+ <register addr="000024ac" rw_flags="RW" width="4" name="BT_RX_MR_EQ_TAPS_MSW" comment="BT DPSK RRC-filter coefficients MSW"/>
+ <register addr="000024b0" rw_flags="R" width="2" name="BT_RX_MR_FREQ" comment=""/>
+ <register addr="000024b4" rw_flags="R" width="1" name="BT_DCRS_ADC_MON_STATUS" comment="ADC power detect output register: Note: BT_DCRS_ADC_MON_SINGLE_SHOT_EN should be set if this register is being used for scanning purposes."/>
+ <register addr="000024b8" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CS_ENABLE" comment="Conditional scan enable (turns on just sincfir and adcproc)"/>
+ <register addr="000024bc" rw_flags="RW" width="1" name="BT_DCRS_CIC_CFG" comment="BT CIC decimator configuration"/>
+ <register addr="000024c0" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_ENABLE" comment="Enables optional ADC domain processing"/>
+ <register addr="000024c4" rw_flags="RW" width="2" name="BT_DCRS_ADC_MON_CONFIG" comment="Optional ADC domain processing configuration"/>
+ <register addr="000024c8" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CONFIG2" comment="Optional ADC domain processing configuration 2"/>
+ <register addr="000024cc" rw_flags="RW" width="1" name="BT_DCRS_ADC_MON_CS_RESET" comment="Rising edge on this signal resets ADC RMS accumulator"/>
+ <register addr="000024d0" rw_flags="R" width="2" name="BT_DCRS_AGCGAIN_MON_AT_SYNC" comment="AGC gain parameters readback to determine gain settings at time of RxSync. Additional fields contain 4 bits recording whether saturation occurred after RxSync."/>
+ <register addr="000024d4" rw_flags="RW" width="4" name="BT_DCRS_AGC_CFG" comment="BT AGC configuration"/>
+ <register addr="000024d8" rw_flags="R" width="1" name="BT_DCRS_AGC_STATUS" comment="Capture some raw Ana sigs"/>
+ <register addr="000024dc" rw_flags="RW" width="1" name="BT_DCRS_AGC_EN_SRC" comment="Configures AGC enable criteria"/>
+ <register addr="000024e0" rw_flags="RW" width="2" name="BT_DCRS_AGC_SW_CTRL" comment="SW override enables"/>
+ <register addr="000024e4" rw_flags="RW" width="4" name="BT_DCRS_AGC_GAIN_STEPS" comment="AGC LNA step values for each saturation indicator"/>
+ <register addr="000024e8" rw_flags="RW" width="4" name="BT_DCRS_AGC_SATRST" comment="Configurable AGC Saturation Indicator resets"/>
+ <register addr="000024ec" rw_flags="RW" width="4" name="BT_DCRS_AGC_CONF1" comment="AGC configuration register 1"/>
+ <register addr="000024f0" rw_flags="RW" width="4" name="BT_DCRS_AGC_CONF2" comment="AGC configuration register 3"/>
+ <register addr="000024f4" rw_flags="RW" width="2" name="BT_DCRS_AGC_EQ_PWR_THR" comment="(Post digital gain) power threshold register for digital gain control"/>
+ <register addr="000024f8" rw_flags="RW" width="4" name="BT_DCRS_AGC_BB_PWR_THR" comment="(Pre and post digital gain) power threshold register for analog gain control"/>
+ <register addr="000024fc" rw_flags="RW" width="1" name="BT_DCRS_AGC_FAST_DIG_CTRL_CFG" comment="(Pre digital gain) power threshold register for fast digital control of the analogue gains"/>
+ <register addr="00002500" rw_flags="R" width="4" name="BT_DCRS_MON" comment="AGC gain parameters readback and Monitor raw saturation detectorors"/>
+ <register addr="00002504" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG0" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002508" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG1" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="0000250c" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG2" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002510" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG3" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002514" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG4" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002518" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG5" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="0000251c" rw_flags="RW" width="4" name="BT_DCRS_BB_EQ_CFG6" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002520" rw_flags="RW" width="2" name="BT_DCRS_BB_EQ_CFG7" comment="BT baseband equalizer filter coefficients"/>
+ <register addr="00002524" rw_flags="RW" width="1" name="BT_DCRS_EQ_CONFIG" comment="BT baseband equalizer configuration"/>
+ <register addr="00002528" rw_flags="RW" width="2" name="BT_DCRS_DBG_CFG" comment="BT debug mux configuration"/>
+ <register addr="0000252c" rw_flags="RW" width="2" name="BT_DCRS_IF_EQ_CFG" comment="BT IF equalizer filter coefficients"/>
+ <register addr="00002530" rw_flags="RW" width="1" name="BT_DCRS_IIR_CONFIG" comment="IIR decimation configuration"/>
+ <register addr="00002534" rw_flags="RW" width="2" name="BT_DCRS_NBIIR_FILTER_CFG" comment="SDDCRS NarrowBand IIR filter configuration"/>
+ <register addr="00002538" rw_flags="RW" width="4" name="BT_DCRS_NBIIR_COEFF1_LSW" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 1) LSW"/>
+ <register addr="0000253c" rw_flags="RW" width="1" name="BT_DCRS_NBIIR_COEFF1_MSB" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 1) MSB"/>
+ <register addr="00002540" rw_flags="RW" width="4" name="BT_DCRS_NBIIR_COEFF2_LSW" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 2) LSW"/>
+ <register addr="00002544" rw_flags="RW" width="1" name="BT_DCRS_NBIIR_COEFF2_MSB" comment="SDDCRS NarrowBand IIR filter coefficients (Biquad 2) MSB"/>
+ <register addr="00002548" rw_flags="RW" width="4" name="BT_DCRS_TINC_CFG" comment="BT resampling ratio configuration - Must be calculated as round((1 - 16*(BT_DCRS_CIC_DEC+1)/fAdc_MHz) * 2^26) - Use floor instead of round if BT_DCRS_PHASE_LOCK is set"/>
+ <register addr="0000254c" rw_flags="RW" width="1" name="BT_DCRS_LINT_CFG" comment="BT linear interpolator configuration"/>
+ <register addr="00002550" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_LNA0" comment=""/>
+ <register addr="00002554" rw_flags="RW" width="2" name="BT_DCRS_PHASECOMP_SHIFTS_LNA1" comment=""/>
+ <register addr="00002558" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_BUF" comment=""/>
+ <register addr="0000255c" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_SHIFTS_MIX0" comment=""/>
+ <register addr="00002560" rw_flags="RW" width="4" name="BT_DCRS_PHASECOMP_DELAYS" comment="Phase compensator delay values"/>
+ <register addr="00002564" rw_flags="RW" width="2" name="BT_DCRS_NOM_IF_BT_CFG" comment="BT nominal IF"/>
+ <register addr="00002568" rw_flags="R" width="2" name="BT_DCRS_FREQ_OFFSET_STATUS" comment=""/>
+ <register addr="0000256c" rw_flags="R" width="4" name="BT_DCRS_BB_PWR_STATUS" comment="Measured baseband power (pre-digital gain)"/>
+ <register addr="00002570" rw_flags="R" width="2" name="BT_DCRS_EQ_PWR_STATUS_AT_SYNC" comment="This is not exactly EqPwr registered at Sync. It is the post-digital gain signal power averaged over the longer period of time used for BbPwr. In order to measure this, we use BbPwr and compensate for the digital gain at Sync. This results in a stabilised RSSI value after digital gain. It also produces a 16-bit result which the XAP can more easily manage than the raw BBPwrAtSync (32 bit)Measured baseband power (post-digital gain) obtained at RxSync, averaged over the longer period of time used for pre-digital gain measurements."/>
+ <register addr="00002574" rw_flags="R" width="2" name="BT_DCRS_EQ_PWR_STATUS" comment="Raw EqPwr"/>
+ <register addr="00002578" rw_flags="RW" width="2" name="BT_DCRS_AGC_PWR_MEAS" comment="AGC power measure configuration"/>
+ <register addr="0000257c" rw_flags="RW" width="1" name="BT_DCRS_SYNCPHASE_CONFIG" comment="Configures phase of clock synchronization buffer"/>
+ <register addr="00002580" rw_flags="R" width="4" name="BT_ANA_STATUS" comment="Miscellaneous readable analogue bits"/>
+ <register addr="00002584" rw_flags="R" width="4" name="BT_ANA_LO_DPLL_TEST_STATUS" comment="This register contains test outputs from the LO"/>
+ <register addr="00002588" rw_flags="R" width="4" name="BT_ANA_LO_DPLL_PM_STATUS" comment="This register contains PM outputs from the LO"/>
+ <register addr="0000258c" rw_flags="RW" width="4" name="BT_ANA_MISC" comment=""/>
+ <register addr="00002590" rw_flags="RW" width="4" name="BT_ANA_STATIC_SPARE" comment="Static spare bits for analogue. Descriptions will be updated based on analogue usage."/>
+ <register addr="00002594" rw_flags="RW" width="4" name="BT_ANA_RXRF" comment=""/>
+ <register addr="00002598" rw_flags="RW" width="4" name="BT_ANA_RXADC" comment=""/>
+ <register addr="0000259c" rw_flags="RW" width="4" name="BT_ANA_TXBB_0" comment=""/>
+ <register addr="000025a0" rw_flags="RW" width="4" name="BT_ANA_TXRF_0" comment=""/>
+ <register addr="000025a4" rw_flags="RW" width="4" name="BT_ANA_TXRF_1" comment=""/>
+ <register addr="000025a8" rw_flags="RW" width="2" name="BT_ANA_TXRF_2" comment=""/>
+ <register addr="000025ac" rw_flags="RW" width="4" name="BT_ANA_LO_CLKREF_ADC" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b0" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_CONF1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b4" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_CONF2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025b8" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_OPEN1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025bc" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_OPEN2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c0" rw_flags="RW" width="4" name="BT_ANA_LO_DCO_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c4" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_CONF1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025c8" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_CONF2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025cc" rw_flags="RW" width="4" name="BT_ANA_LO_DPLL_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d0" rw_flags="RW" width="4" name="BT_ANA_LO_D_FREQ1" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d4" rw_flags="RW" width="4" name="BT_ANA_LO_D_FREQ2" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025d8" rw_flags="RW" width="4" name="BT_ANA_LO_TEST" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025dc" rw_flags="RW" width="4" name="BT_ANA_LO_PLL_RESV" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e0" rw_flags="RW" width="4" name="BT_ANA_LO_PU_DCO_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e4" rw_flags="RW" width="4" name="BT_ANA_LO_PU_TDC_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025e8" rw_flags="RW" width="4" name="BT_ANA_LO_AREG_CONF" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025ec" rw_flags="RW" width="4" name="BT_ANA_LO_TDC_NLMEM" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f0" rw_flags="RW" width="4" name="BT_ANA_LO_TOP" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f4" rw_flags="RW" width="1" name="BT_ANA_LO_MISC" comment="This register is one of the LO configuration registers"/>
+ <register addr="000025f8" rw_flags="RW" width="2" name="BT_ANA_LO_PM_CONF" comment="This register is one of the LO configuration registers for phase modulation (i.e. Stable Modulation Index)."/>
+ <register addr="000025fc" rw_flags="RW" width="4" name="BT_ANA_LO_LOGEN1" comment="This register is one of the WLAN LO configuration registers"/>
+ <register addr="00002600" rw_flags="RW" width="4" name="BT_ANA_LO_LOGEN2" comment="This register is one of the WLAN LO configuration registers"/>
+ <register addr="00002604" rw_flags="R" width="4" name="BT_ANA_DED_STATUS" comment="Miscellaneous readable analogue bits"/>
+ <register addr="00002608" rw_flags="RW" width="1" name="BT_ANA_DED_MISC" comment=""/>
+ <register addr="0000260c" rw_flags="RW" width="4" name="BT_ANA_DED_RXRF_0" comment=""/>
+ <register addr="00002610" rw_flags="RW" width="4" name="BT_ANA_DED_RXRF_1" comment=""/>
+ <register addr="00002614" rw_flags="RW" width="4" name="BT_ANA_DED_TXRF_0" comment=""/>
+ <register addr="00002618" rw_flags="RW" width="1" name="BT_ANA_DEBUG_SEL" comment=""/>
+ <register addr="0000261c" rw_flags="RW" width="2" name="BT_ANAIF_CFG" comment="ADC Digital saturation filter control"/>
+ <register addr="00002620" rw_flags="RW" width="1" name="BT_ANA_LO_SW_STOP" comment="Write 1 to stop the LO"/>
+ <register addr="00002624" rw_flags="RW" width="4" name="BT_ANA_SW_ENABLES" comment="Override value for timer outputs when not controlled by timer"/>
+ <register addr="00002628" rw_flags="RW" width="4" name="BT_ANA_SW_ENABLES_MASK" comment="Selects whether timer outputs or override bits are used for analogue"/>
+ <register addr="0000262c" rw_flags="R" width="4" name="BT_ANA_ENABLES_STATUS" comment="Shows values being driven to analogue interface after timer and masking function is resolved"/>
+ <register addr="00002630" rw_flags="RW" width="4" name="BT_ANA_LNA_ZIN_TRIM_LUT" comment="First 4 locations of LUT used to generate the 2G5 LNA ZinTrim value."/>
+ <register addr="00002634" rw_flags="R" width="1" name="BT_ANT_ID" comment="Currently selected BT antenna ID, a maximum of 8 antennae are supported in this implementation."/>
+ <register addr="00002638" rw_flags="RW" width="2" name="BT_ANT_SEL_CFG" comment="Antenna ID -&gt; FEM_CTRL0 mapping"/>
+ </block>
+ <block name="btwl_common" comment="">
+ <register addr="00001000" rw_flags="RW" width="2" name="AUX_BIST_ADC_CTRL" comment="Control register for auxiliary ADC"/>
+ <register addr="00001004" rw_flags="RW" width="2" name="AUX_BIST_ADC_LEVEL" comment="DAC value driven to auxiliary ADC"/>
+ <register addr="00001008" rw_flags="R" width="2" name="AUX_BIST_ADC_STATUS" comment="Returns the data from auxiliary ADC"/>
+ <register addr="0000100c" rw_flags="RW" width="2" name="BTWL_BIST_ADC_CTRL" comment="Control register for auxiliary ADC"/>
+ <register addr="00001010" rw_flags="RW" width="2" name="BTWL_BIST_ADC_LEVEL" comment="DAC value driven to auxiliary ADC"/>
+ <register addr="00001014" rw_flags="R" width="2" name="BTWL_BIST_ADC_STATUS" comment="Returns the data from auxiliary ADC"/>
+ <register addr="00001018" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_CFG" comment="BTWL Debug Mux Config"/>
+ <register addr="0000101c" rw_flags="RW" width="2" name="RFIC_DEBUG_CFG" comment="BTWL Debug Config"/>
+ <register addr="00001020" rw_flags="RW" width="4" name="RFIC_DEBUG_CFG2" comment="BTWL Debug Config register 2"/>
+ <register addr="00001024" rw_flags="RW" width="4" name="RFIC_DEBUG_CFG3" comment="BTWL Debug Config register 3"/>
+ <register addr="00001028" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG0" comment="Debug Mux for pin"/>
+ <register addr="0000102c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG1" comment="Debug Mux for pin"/>
+ <register addr="00001030" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG2" comment="Debug Mux for pin"/>
+ <register addr="00001034" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG3" comment="Debug Mux for pin"/>
+ <register addr="00001038" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG4" comment="Debug Mux for pin"/>
+ <register addr="0000103c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG5" comment="Debug Mux for pin"/>
+ <register addr="00001040" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG6" comment="Debug Mux for pin"/>
+ <register addr="00001044" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_DBG7" comment="Debug Mux for pin"/>
+ <register addr="00001048" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_RFIC_CTRL1" comment="Debug Mux for pin"/>
+ <register addr="0000104c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_RFIC_CTRL2" comment="Debug Mux for pin"/>
+ <register addr="00001050" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FM_SPDY_S" comment="Debug Mux for pin"/>
+ <register addr="00001054" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM0" comment="Debug Mux for pin"/>
+ <register addr="00001058" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM1" comment="Debug Mux for pin"/>
+ <register addr="0000105c" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM2" comment="Debug Mux for pin"/>
+ <register addr="00001060" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM3" comment="Debug Mux for pin"/>
+ <register addr="00001064" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_FEM4" comment="Debug Mux for pin"/>
+ <register addr="00001068" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_SERIAL0" comment="Serialiser 0 control for Debug"/>
+ <register addr="0000106c" rw_flags="RW" width="4" name="RFIC_DEBUG_MUX_SERIAL1" comment="Serialiser 1 control for Debug"/>
+ <register addr="00001070" rw_flags="RW" width="2" name="RFIC_DEBUG_SERIAL_CFG" comment="Serialiser input config"/>
+ <register addr="00001074" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE0" comment="Serialiser input config"/>
+ <register addr="00001078" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE1" comment="Serialiser input config"/>
+ <register addr="0000107c" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE2" comment="Serialiser input config"/>
+ <register addr="00001080" rw_flags="RW" width="4" name="RFIC_DEBUG_SERIAL_BIT_WISE3" comment="Serialiser input config"/>
+ <register addr="00001084" rw_flags="RW" width="4" name="RFIC_DEBUG_ZIPPY_CFG" comment="Zippy 18-bit Debug input config"/>
+ <register addr="00001088" rw_flags="RW" width="2" name="RFIC_DEBUG_MUX_SERIAL_DATA" comment="Not used"/>
+ <register addr="0000108c" rw_flags="R" width="2" name="RFIC_DEBUG_PAD_SDR_STATUS" comment="Debug Pad Inputs"/>
+ <register addr="00001090" rw_flags="R" width="2" name="RFIC_DEBUG_PAD_DDR_STATUS" comment="Debug Pad DDR Inputs"/>
+ <register addr="00001094" rw_flags="RW" width="1" name="RFIC_BRACKEN_MEM_ADDR" comment="Bracken Code/Data Mem Address"/>
+ <register addr="00001098" rw_flags="RW" width="4" name="RFIC_BRACKEN_MEM_WDATA" comment="Bracken Code/Data Mem Write Data - auto increments address on write"/>
+ <register addr="0000109c" rw_flags="R" width="4" name="RFIC_BRACKEN_MEM_RDATA" comment="Bracken Code/Data Mem Read Data - auto increments address on read"/>
+ <register addr="000010a0" rw_flags="RW" width="2" name="RFIC_BRACKEN_CFG" comment="BTWL Debug Config"/>
+ <register addr="000010a4" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP_MEM_ADDR" comment="Bracken DTCP Mem Address"/>
+ <register addr="000010a8" rw_flags="RW" width="4" name="RFIC_BRACKEN_DTCP_MEM_WDATA" comment="Bracken DTCP Mem Write Data"/>
+ <register addr="000010ac" rw_flags="R" width="4" name="RFIC_BRACKEN_DTCP_MEM_RDATA" comment="Bracken DTCP Mem Read Data"/>
+ <register addr="000010b0" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP0_REG_ADDR" comment="Bracken DTCP0 Regs Address"/>
+ <register addr="000010b4" rw_flags="RW" width="2" name="RFIC_BRACKEN_DTCP0_REG_WDATA" comment="Bracken DTCP0 Regs Write Data"/>
+ <register addr="000010b8" rw_flags="R" width="2" name="RFIC_BRACKEN_DTCP0_REG_RDATA" comment="Bracken DTCP0 Regs Read Data"/>
+ <register addr="000010bc" rw_flags="RW" width="1" name="RFIC_BRACKEN_DTCP1_REG_ADDR" comment="Bracken DTCP1 Regs Address"/>
+ <register addr="000010c0" rw_flags="RW" width="2" name="RFIC_BRACKEN_DTCP1_REG_WDATA" comment="Bracken DTCP1 Regs Write Data"/>
+ <register addr="000010c4" rw_flags="R" width="2" name="RFIC_BRACKEN_DTCP1_REG_RDATA" comment="Bracken DTCP1 Regs Read Data"/>
+ <register addr="000010c8" rw_flags="R" width="2" name="RFIC_DEBUG_STATUS" comment="Main Debug Status register"/>
+ <register addr="000010cc" rw_flags="RW" width="2" name="RFIC_SW_ZIPPY_TO_BB_FLAGS" comment="Zippy flag data (info and channel) to be sent to BBIC"/>
+ <register addr="000010d0" rw_flags="RW" width="1" name="RFIC_SW_ZIPPY_TO_RF_FILTER" comment="Filter bitmap for Zippy channels that cause an interrupt to be raised on traffic to the RFIC"/>
+ <register addr="000010d4" rw_flags="RW" width="1" name="RFIC_SW_ZIPPY_TO_BB_RESV" comment="Zippy reserved signal for SW data to the BBIC"/>
+ <register addr="000010d8" rw_flags="R" width="2" name="RFIC_SW_ZIPPY_TO_RF_FLAGS" comment="Zippy flag data to the RFIC, plus latched Valid and Ack"/>
+ <register addr="000010dc" rw_flags="RW" width="2" name="RFIC_ZIPPY_ORIDE_CFG" comment="Zippy override config"/>
+ <register addr="000010e0" rw_flags="RW" width="4" name="RFIC_ZIPPY_ORIDE_DATA" comment="Zippy override data for Zippy-to-BTWL Flags busses"/>
+ <register addr="000010e4" rw_flags="R" width="2" name="RFIC_ZIPPY_FLAGS_MON" comment="Zippy monitor for BTWL-to-Zippy Flags, bus selected from CFG register"/>
+ <register addr="000010e8" rw_flags="RW" width="2" name="RFIC_BRACKEN_TIMER" comment="Bracken Timer"/>
+ <register addr="000010ec" rw_flags="R" width="4" name="RFIC_PROC_STATUS" comment="Status information for rfic_proc"/>
+ <register addr="000010f0" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_INV0" comment="Optional invert for each BT DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010f4" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_INV1" comment="Optional invert for each BT DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010f8" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV0" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="000010fc" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV1" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001100" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV2" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001104" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_INV3" comment="Optional invert for each WL Path0 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001108" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV0" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="0000110c" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV1" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001110" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV2" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001114" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_INV3" comment="Optional invert for each WL Path1 DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001118" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV0" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="0000111c" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV1" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001120" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV2" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001124" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_INV3" comment="Optional invert for each SH DA dynamic signal, excluding Dynamic Enables from timers"/>
+ <register addr="00001128" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_OFF0" comment="Set to turn off drive of each BT DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000112c" rw_flags="RW" width="4" name="RFIC_MON_BT_DA_OFF1" comment="Set to turn off drive of each BT DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001130" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF0" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001134" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF1" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001138" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF2" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000113c" rw_flags="RW" width="4" name="RFIC_MON_WL_P0_DA_OFF3" comment="Set to turn off drive of each WL Path0 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001140" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF0" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001144" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF1" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001148" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF2" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000114c" rw_flags="RW" width="4" name="RFIC_MON_WL_P1_DA_OFF3" comment="Set to turn off drive of each WL Path1 DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001150" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF0" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001154" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF1" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001158" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF2" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="0000115c" rw_flags="RW" width="4" name="RFIC_MON_COEX_DA_OFF3" comment="Set to turn off drive of each SH DA dynamic signal from core, excluding Dynamic Enables from timers"/>
+ <register addr="00001160" rw_flags="R" width="4" name="RFIC_MON_BT_AD0" comment="Monitor BT AD signals right at the AD interface"/>
+ <register addr="00001164" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD0" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="00001168" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD1" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="0000116c" rw_flags="R" width="4" name="RFIC_MON_WL_P0_AD2" comment="Monitor WL Path0 AD signals right at the AD interface"/>
+ <register addr="00001170" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD0" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ <register addr="00001174" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD1" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ <register addr="00001178" rw_flags="R" width="4" name="RFIC_MON_WL_P1_AD2" comment="Monitor WL Path1 AD signals right at the AD interface"/>
+ </block>
+ <block name="coex_rf_btpath" comment="">
+ <register addr="00006000" rw_flags="RW" width="1" name="COEX_RF_BTP_CFG" comment="Coexistence RFIC configuration."/>
+ <register addr="00006004" rw_flags="RW" width="1" name="COEX_RF_BTP_SW_RESET" comment="Placeholder"/>
+ <register addr="00006008" rw_flags="RW" width="2" name="COEX_RF_BTP_TRAN_CTRL_CFG" comment="Coexistence Transition Control configuration."/>
+ <register addr="0000600c" rw_flags="RW" width="2" name="COEX_RF_BTP_FEC_CFG" comment="BT RF Switch Configurations"/>
+ <register addr="00006010" rw_flags="RW" width="4" name="COEX_RF_BTP_PROT_CHANGE_MODE" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00006014" rw_flags="RW" width="1" name="COEX_RF_BTP_PROT_CFG" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="coex_rf_common" comment="">
+ <register addr="00003000" rw_flags="RW" width="1" name="COEX_RF_CMN_CFG" comment="Coexistence RFIC configuration."/>
+ <register addr="00003004" rw_flags="RW" width="1" name="COEX_RF_CMN_FEM_COMBINE_CFG" comment="Coexistence RFIC configuration."/>
+ </block>
+ <block name="coex_rf_wlpath_0" comment="">
+ <register addr="00004000" rw_flags="RW" width="1" name="COEX_RF_WLP_CFG_I0" comment="Coexistence RFIC configuration."/>
+ <register addr="00004004" rw_flags="RW" width="1" name="COEX_RF_WLP_SW_RESET_I0" comment="Placeholder"/>
+ <register addr="00004008" rw_flags="RW" width="4" name="COEX_RF_WLP_ARB_CFG_I0" comment=""/>
+ <register addr="0000400c" rw_flags="RW" width="4" name="COEX_RF_WLP_TRAN_CTRL_CFG_I0" comment="Coexistence Transition Control configuration."/>
+ <register addr="00004010" rw_flags="RW" width="2" name="COEX_RF_WLP_SHRX_CFG_I0" comment=""/>
+ <register addr="00004014" rw_flags="RW" width="1" name="COEX_RF_WLP_SHTX_CFG_I0" comment="Coexistence Shared Tx Mux configuration."/>
+ <register addr="00004018" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG_I0" comment="2G RF Switch Configurations"/>
+ <register addr="0000401c" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG1_I0" comment="2G RF Switch Configurations"/>
+ <register addr="00004020" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG2_I0" comment="2G RF Switch Configurations"/>
+ <register addr="00004024" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_5G_CFG_I0" comment="5G RF Switch Configurations"/>
+ <register addr="00004028" rw_flags="RW" width="1" name="COEX_RF_WLP_FEC_5G_CFG1_I0" comment="5G RF Switch Configurations"/>
+ <register addr="0000402c" rw_flags="RW" width="4" name="COEX_RF_WLP_PROT_CHANGE_MODE_I0" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00004030" rw_flags="RW" width="1" name="COEX_RF_WLP_PROT_CFG_I0" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="coex_rf_wlpath_1" comment="">
+ <register addr="00005000" rw_flags="RW" width="1" name="COEX_RF_WLP_CFG_I1" comment="Coexistence RFIC configuration."/>
+ <register addr="00005004" rw_flags="RW" width="1" name="COEX_RF_WLP_SW_RESET_I1" comment="Placeholder"/>
+ <register addr="00005008" rw_flags="RW" width="4" name="COEX_RF_WLP_ARB_CFG_I1" comment=""/>
+ <register addr="0000500c" rw_flags="RW" width="4" name="COEX_RF_WLP_TRAN_CTRL_CFG_I1" comment="Coexistence Transition Control configuration."/>
+ <register addr="00005010" rw_flags="RW" width="2" name="COEX_RF_WLP_SHRX_CFG_I1" comment=""/>
+ <register addr="00005014" rw_flags="RW" width="1" name="COEX_RF_WLP_SHTX_CFG_I1" comment="Coexistence Shared Tx Mux configuration."/>
+ <register addr="00005018" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG_I1" comment="2G RF Switch Configurations"/>
+ <register addr="0000501c" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG1_I1" comment="2G RF Switch Configurations"/>
+ <register addr="00005020" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_2G_CFG2_I1" comment="2G RF Switch Configurations"/>
+ <register addr="00005024" rw_flags="RW" width="4" name="COEX_RF_WLP_FEC_5G_CFG_I1" comment="5G RF Switch Configurations"/>
+ <register addr="00005028" rw_flags="RW" width="1" name="COEX_RF_WLP_FEC_5G_CFG1_I1" comment="5G RF Switch Configurations"/>
+ <register addr="0000502c" rw_flags="RW" width="4" name="COEX_RF_WLP_PROT_CHANGE_MODE_I1" comment="Set this to 0xDEADBEEF in order to change the analogue protection. Should clear back to 0 after changing mode."/>
+ <register addr="00005030" rw_flags="RW" width="1" name="COEX_RF_WLP_PROT_CFG_I1" comment="Analogue protection configuration register."/>
+ </block>
+ <block name="rfic_pad_control" comment="">
+ <register addr="00007000" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL2" comment="Control register for pad FEM_CTRL2"/>
+ <register addr="00007004" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL3" comment="Control register for pad FEM_CTRL3"/>
+ <register addr="00007008" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL4" comment="Control register for pad FEM_CTRL4"/>
+ <register addr="0000700c" rw_flags="RW" width="2" name="PAD_CONTROL_RFIC_CTRL0" comment="Control register for pad RFIC_CTRL0"/>
+ <register addr="00007010" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL0" comment="Control register for pad FEM_CTRL0"/>
+ <register addr="00007014" rw_flags="RW" width="1" name="PAD_CONTROL_FEM_CTRL1" comment="Control register for pad FEM_CTRL1"/>
+ <register addr="00007018" rw_flags="RW" width="1" name="PAD_CONTROL_FM_SPDY" comment="Control register for pad FM_SPDY"/>
+ <register addr="0000701c" rw_flags="RW" width="1" name="PAD_CONTROL_RFIC_CTRL2" comment="Control register for pad RFIC_CTRL2"/>
+ <register addr="00007020" rw_flags="RW" width="1" name="PAD_CONTROL_RFIC_CTRL1" comment="Control register for pad RFIC_CTRL1"/>
+ </block>
+ <block name="wl_rf_common" comment="">
+ <register addr="00008000" rw_flags="RW" width="1" name="WLRF_DEBUG0_SEL" comment="WLAN RFIC debug select for output DEBUG1"/>
+ <register addr="00008004" rw_flags="RW" width="1" name="WLRF_DEBUG1_SEL" comment="WLAN RFIC debug select for output DEBUG1"/>
+ <register addr="00008008" rw_flags="RW" width="1" name="WLRF_AIQ_SWAP_CONFIG" comment="Optional AIQ swap controls"/>
+ <register addr="0000800c" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CONFIG" comment="Temperature sensor logic configuration."/>
+ <register addr="00008010" rw_flags="R" width="2" name="WLRF_RADIO_TEMP_INT_STATUS" comment="Status of generated interrupt events."/>
+ <register addr="00008014" rw_flags="W" width="2" name="WLRF_RADIO_TEMP_INT_CLEAR" comment="Clear the status of generated interrupt events."/>
+ <register addr="00008018" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_BITFIELD" comment="Set a bit to 1 to enable checking of that temperature sensor."/>
+ <register addr="0000801c" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[0]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008020" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[0]" comment="Status for the sensor."/>
+ <register addr="00008024" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[0]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008028" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[1]" comment="Mode in which to run the sensor checking."/>
+ <register addr="0000802c" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[1]" comment="Status for the sensor."/>
+ <register addr="00008030" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[1]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008034" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[2]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008038" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[2]" comment="Status for the sensor."/>
+ <register addr="0000803c" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[2]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008040" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[3]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008044" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[3]" comment="Status for the sensor."/>
+ <register addr="00008048" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[3]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="0000804c" rw_flags="RW" width="4" name="WLRF_RADIO_TEMP_CTRL_CONFIG[4]" comment="Mode in which to run the sensor checking."/>
+ <register addr="00008050" rw_flags="R" width="2" name="WLRF_RADIO_TEMP[4]" comment="Status for the sensor."/>
+ <register addr="00008054" rw_flags="RW" width="1" name="WLRF_RADIO_TEMP_CHECK_COUNT[4]" comment="Number of checks to run each time this sensor is selected."/>
+ <register addr="00008058" rw_flags="RW" width="4" name="WL_ANA_PERIPH_CONFIG" comment="This register controls the peripheral block"/>
+ <register addr="0000805c" rw_flags="RW" width="4" name="WL_ANA_PERIPH_CONFIG2" comment=""/>
+ <register addr="00008060" rw_flags="RW" width="1" name="WL_ANA_ABB_RCCAL_CONFIG" comment=""/>
+ <register addr="00008064" rw_flags="RW" width="4" name="WLRF_RADIO_RCCAL_CTRL_CFG1" comment=""/>
+ <register addr="00008068" rw_flags="RW" width="4" name="WLRF_RADIO_RCCAL_CTRL_CFG2" comment=""/>
+ <register addr="0000806c" rw_flags="R" width="2" name="WLRF_RADIO_RCCAL_CTRL_STATUS" comment=""/>
+ </block>
+ <block name="wl_rf_path_0" comment="">
+ <register addr="00009000" rw_flags="RW" width="1" name="WLRF_DEBUG_SELECT_I0" comment="Selects which debug appears on the output of the WLAN block"/>
+ <register addr="00009004" rw_flags="R" width="2" name="WLRF_DEBUG_STATUS_I0" comment="Returns the current value on the debug bus"/>
+ <register addr="00009008" rw_flags="RW" width="1" name="WLRF_RADIO_CONFIG_I0" comment="Miscellaneous config bits"/>
+ <register addr="0000900c" rw_flags="RW" width="4" name="WLRF_ANA_TRIM_TX_I0" comment="This register sets the modulation dependent analogue trims in low power mode and when Ana Tx Test Mode is selected (in WLRF_RADIO_CONFIG register)"/>
+ <register addr="00009010" rw_flags="RW" width="4" name="WLRF_ANA_TX_CCK_TRIM_CONF_I0" comment="CCK modulation dependent analogue trims"/>
+ <register addr="00009014" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM0_TRIM_CONF_I0" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 0"/>
+ <register addr="00009018" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM1_TRIM_CONF_I0" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 1"/>
+ <register addr="0000901c" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG1_I0" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="00009020" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG2_I0" comment="Configuration bits for the AGC: gains ranges definition. valid when AGC is active, and gain not forced."/>
+ <register addr="00009024" rw_flags="RW" width="2" name="WLRF_RADIO_RX_LEVEL_I0" comment="This register contains the value to be sent to the analogue gain stages if the AGC is disabled."/>
+ <register addr="00009028" rw_flags="R" width="2" name="WLRF_RADIO_GAIN_STATUS_I0" comment="This register contains the current gain settings to all blocks in the analogue front end"/>
+ <register addr="0000902c" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_EXT_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, turning off external LNA indication"/>
+ <register addr="00009030" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_WEAK_I0" comment="This register specifies the threshold value for the FE RSSI module, too weak indication (+ 6dB gain change request)"/>
+ <register addr="00009034" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="00009038" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_V_LOUD_I0" comment="This register specifies the threshold value for the FE RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000903c" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_WEAK_I0" comment="This register specifies the threshold value for the ABB RSSI module, too weak indication (+ 2.0dB gain change request)"/>
+ <register addr="00009040" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_LOUD_I0" comment="This register specifies the threshold value for the ABB RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="00009044" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_V_LOUD_I0" comment="This register specifies the threshold value for the ABB RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="00009048" rw_flags="R" width="2" name="WLRF_RADIO_RX_RSSI_I0" comment="This register contains the RSSI of the receive chain. The lower byte is the 8 bit digital RSSI (fixed to 0 since this is a radio-only chip) and the upper byte is the final analogue gain in 3dB steps."/>
+ <register addr="0000904c" rw_flags="R" width="1" name="WLRF_RSSI_FILTERED_STATUS_I0" comment="This register contains the analogue RSSI values for the receive chain, after initial processing in the rssi blocks block."/>
+ <register addr="00009050" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT0_I0" comment="First 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="00009054" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT1_I0" comment="Last 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="00009058" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT0_I0" comment="First 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000905c" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT1_I0" comment="Last 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="00009060" rw_flags="R" width="1" name="WLRF_ANA_TIMER_TX_SLOT_I0" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="00009064" rw_flags="R" width="1" name="WLRF_ANA_TIMER_RX_SLOT_I0" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="00009068" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_I0" comment="Default values for analogue enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="0000906c" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_MASK_I0" comment="Selects use of ANA_ENABLES or timer outputs. A 1 in a given bit selects the timer output."/>
+ <register addr="00009070" rw_flags="RW" width="4" name="WLRF_ANA_TRAINING_ENABLES_MASK_I0" comment="This masks the output of the Tx timer when it is not a DPD training frame. The idea is to be able to remove the extra Rx enables that are required for making DPD training work to improve power consumption on frames that don't need them. It should typically have all the Tx bits set and none of the Rx bits."/>
+ <register addr="00009074" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="00009078" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="0000907c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="00009080" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="00009084" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="00009088" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="0000908c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="00009090" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="00009094" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT0_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="00009098" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT1_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000909c" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT2_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT3_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT4_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090a8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT5_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090ac" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT6_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090b0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT7_DELAY_I0" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090b4" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_TX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="000090b8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT0_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="000090bc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT1_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="000090c0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT2_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="000090c4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT3_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="000090c8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT4_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="000090cc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT5_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="000090d0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT6_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="000090d4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT7_ENABLES_I0" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="000090d8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT0_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="000090dc" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT1_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT2_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT3_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090e8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT4_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090ec" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT5_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT6_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT7_DELAY_I0" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="000090f8" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_RX_SLOT_ON_OFF_LAST_I0" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="000090fc" rw_flags="W" width="1" name="WLRF_INT_CLEAR_I0" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RF_INT_MASK"/>
+ <register addr="00009100" rw_flags="RW" width="1" name="WLRF_INT_MASK_I0" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="00009104" rw_flags="R" width="1" name="WLRF_INT_STATUS_I0" comment="This register has bits set in it for any interrupt that is currently active. In addition 'raw' bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="00009108" rw_flags="RW" width="1" name="WLRF_ANAIF_DEBUG_SEL_I0" comment="WLAN RFIC AnaIf debug select."/>
+ <register addr="0000910c" rw_flags="RW" width="4" name="WLRF_DCOC_CTRL_CONFIG_I0" comment="DCOC controller config"/>
+ <register addr="00009110" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_CONFIG2_I0" comment="DCOC controller config"/>
+ <register addr="00009114" rw_flags="R" width="1" name="WLRF_DCOC_CTRL_STATUS_I0" comment="DCOC controller status."/>
+ <register addr="00009118" rw_flags="RW" width="1" name="WLRF_DCOC_CTRL_LUT_SELECT_I0" comment="Choose the LUT to access, either read or write"/>
+ <register addr="0000911c" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_LUT_WRITE_I0" comment="Write the specified value to the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="00009120" rw_flags="R" width="2" name="WLRF_DCOC_CTRL_LUT_READ_I0" comment="Read the contents of the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="00009124" rw_flags="RW" width="2" name="WLRF_ANA_INT_CFG_I0" comment="Configure source for WL status interrupts"/>
+ <register addr="00009128" rw_flags="R" width="1" name="WLRF_ANA_INT_STATUS_I0" comment="WL Status Interrupt status"/>
+ <register addr="0000912c" rw_flags="R" width="4" name="WLRF_ANA_RAW_INT_STATUS_I0" comment="Raw status from the analogue module - intended for hardware debug"/>
+ <register addr="00009130" rw_flags="RW" width="4" name="WLRF_ANA_AIQ_CFG_I0" comment="Configure AIQ interface"/>
+ <register addr="00009134" rw_flags="R" width="1" name="WLRF_ANA_AIQ_STATUS_I0" comment="Status of AIQ interface."/>
+ <register addr="00009138" rw_flags="RW" width="1" name="WLRF_ANA_SH_LO_EN_I0" comment="Enable LO sharing (with BT). Only has an affect on WIFI0."/>
+ <register addr="0000913c" rw_flags="R" width="4" name="WLRF_ANA_STATUS_I0" comment="Returns the value on the ANA_STATUS bus"/>
+ <register addr="00009140" rw_flags="RW" width="4" name="WL_ANA_2G_LNA_TRIM_LUT_I0" comment="This register defines the LUT used to generate ZIN_TRIM values for 2G5 LNAs"/>
+ <register addr="00009144" rw_flags="RW" width="4" name="WL_ANA_FE_LUT0_I0" comment=""/>
+ <register addr="00009148" rw_flags="RW" width="4" name="WL_ANA_FE_LUT1_I0" comment=""/>
+ <register addr="0000914c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT2_I0" comment=""/>
+ <register addr="00009150" rw_flags="RW" width="4" name="WL_ANA_FE_LUT3_I0" comment=""/>
+ <register addr="00009154" rw_flags="RW" width="4" name="WL_ANA_FE_LUT4_I0" comment=""/>
+ <register addr="00009158" rw_flags="RW" width="4" name="WL_ANA_FE_LUT5_I0" comment=""/>
+ <register addr="0000915c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT6_I0" comment=""/>
+ <register addr="00009160" rw_flags="RW" width="4" name="WL_ANA_FE_LUT7_I0" comment=""/>
+ <register addr="00009164" rw_flags="RW" width="4" name="WL_ANA_FE_LUT8_I0" comment=""/>
+ <register addr="00009168" rw_flags="R" width="4" name="WLRF_ANA_ENABLES_STATUS_I0" comment="This register contains the current values of the Analogue Enables, after all masking and multiplexing."/>
+ <register addr="0000916c" rw_flags="R" width="2" name="WLRF_ANA_RAW_IB_RSSI_STATUS_I0" comment="Raw IB RSSI from analogue."/>
+ <register addr="00009170" rw_flags="R" width="2" name="WLRF_ANA_RAW_ABB_RSSI_STATUS_I0" comment="Raw ABB RSSI from analogue."/>
+ <register addr="00009174" rw_flags="RW" width="1" name="WL_ANA_MISC_I0" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="00009178" rw_flags="RW" width="1" name="WL_ANA_BIAS_EN_I0" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000917c" rw_flags="RW" width="4" name="WL_ANA_TEST_EN_I0" comment="This register controls enabling of test facilities"/>
+ <register addr="00009180" rw_flags="RW" width="1" name="WL_ANA_DCOC_CTRL_I0" comment="This register controls the DC offset compensation block"/>
+ <register addr="00009184" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009188" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG2_I0" comment="This register controls Rx baseband"/>
+ <register addr="0000918c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG3_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009190" rw_flags="RW" width="2" name="WL_ANA_ABB_RX_CONFIG4_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009194" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG5_I0" comment="This register controls Rx baseband"/>
+ <register addr="00009198" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG6_I0" comment="This register controls Rx baseband"/>
+ <register addr="0000919c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_RSSI_CONFIG_I0" comment="This register controls Rx RSSI blocks"/>
+ <register addr="000091a0" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091a4" rw_flags="RW" width="2" name="WL_ANA_ABB_TX_CONFIG2_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091a8" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG3_I0" comment="This register controls Rx baseband"/>
+ <register addr="000091ac" rw_flags="RW" width="4" name="WL_ANA_2G_RX_RF_CONFIG_I0" comment="This register controls the 2G Rx RF block"/>
+ <register addr="000091b0" rw_flags="RW" width="1" name="WL_ANA_2G_RX_LNA_CONFIG_I0" comment="This register controls the 2G Rx LNA block"/>
+ <register addr="000091b4" rw_flags="RW" width="1" name="WL_ANA_5G_RX_LNA_CONFIG_I0" comment="This register controls the 5G Rx LNA block"/>
+ <register addr="000091b8" rw_flags="RW" width="4" name="WL_ANA_5G_RX_MIX_CONFIG_I0" comment="This register controls the 5G Rx mixer block"/>
+ <register addr="000091bc" rw_flags="RW" width="2" name="WL_ANA_RX_RF_MISC_CONFIG_I0" comment="This register controls miscellaneous Rx RF features"/>
+ <register addr="000091c0" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MISC_CONFIG_I0" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="000091c4" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MISC_CONFIG_I0" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="000091c8" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MIX_DRV_CONFIG_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091cc" rw_flags="RW" width="1" name="WL_ANA_TX_2G_MIX_DRV_CONFIG2_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d0" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MIX_DRV_CONFIG_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d4" rw_flags="RW" width="1" name="WL_ANA_TX_5G_MIX_DRV_CONFIG2_I0" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="000091d8" rw_flags="RW" width="2" name="WL_ANA_TX_RF_PA_PROT_CONFIG_I0" comment="This register controls the Tx RF PA and protection blocks"/>
+ <register addr="000091dc" rw_flags="RW" width="4" name="WL_ANA_RESERVED0_I0" comment="Reserved"/>
+ <register addr="000091e0" rw_flags="RW" width="4" name="WL_ANA_RESERVED1_I0" comment="Reserved"/>
+ <register addr="000091e4" rw_flags="RW" width="4" name="WL_ANA_LO_TOP_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091e8" rw_flags="RW" width="4" name="WL_ANA_LO_CLKREF_ADC_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091ec" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091f0" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091f4" rw_flags="RW" width="1" name="WL_ANA_LO_PLL_STOP_I0" comment="This register written to stop the PLL from running"/>
+ <register addr="000091f8" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="000091fc" rw_flags="RW" width="4" name="WL_ANA_LO_PU_TDC_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009200" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009204" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009208" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000920c" rw_flags="RW" width="4" name="WL_ANA_LO_TDC_NLMEM_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009210" rw_flags="RW" width="4" name="WL_ANA_LO_PU_DCO_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009214" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009218" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000921c" rw_flags="RW" width="4" name="WL_ANA_LO_AREG_CONF_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009220" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009224" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009228" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000922c" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG1_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009230" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG2_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009234" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009238" rw_flags="RW" width="4" name="WL_ANA_LO_TEST_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000923c" rw_flags="RW" width="4" name="WL_ANA_LO_PLL_RESV_I0" comment="This register is one of the LO configuration registers"/>
+ <register addr="00009240" rw_flags="R" width="4" name="WL_ANA_LO_DPLL_TEST_STATUS_I0" comment="This register contains test outputs from the LO"/>
+ </block>
+ <block name="wl_rf_path_1" comment="">
+ <register addr="0000a000" rw_flags="RW" width="1" name="WLRF_DEBUG_SELECT_I1" comment="Selects which debug appears on the output of the WLAN block"/>
+ <register addr="0000a004" rw_flags="R" width="2" name="WLRF_DEBUG_STATUS_I1" comment="Returns the current value on the debug bus"/>
+ <register addr="0000a008" rw_flags="RW" width="1" name="WLRF_RADIO_CONFIG_I1" comment="Miscellaneous config bits"/>
+ <register addr="0000a00c" rw_flags="RW" width="4" name="WLRF_ANA_TRIM_TX_I1" comment="This register sets the modulation dependent analogue trims in low power mode and when Ana Tx Test Mode is selected (in WLRF_RADIO_CONFIG register)"/>
+ <register addr="0000a010" rw_flags="RW" width="4" name="WLRF_ANA_TX_CCK_TRIM_CONF_I1" comment="CCK modulation dependent analogue trims"/>
+ <register addr="0000a014" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM0_TRIM_CONF_I1" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 0"/>
+ <register addr="0000a018" rw_flags="RW" width="4" name="WLRF_ANA_TX_OFDM1_TRIM_CONF_I1" comment="OFDM modulation dependent analogue trims when corresponding bit in WL_RADIO_TX_CTRL_ANA_OFDM_SEL is set to 1"/>
+ <register addr="0000a01c" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG1_I1" comment="Miscellaneous config bits for the AGC as follows:"/>
+ <register addr="0000a020" rw_flags="RW" width="4" name="WLRF_RADIO_AGC_CONFIG2_I1" comment="Configuration bits for the AGC: gains ranges definition. valid when AGC is active, and gain not forced."/>
+ <register addr="0000a024" rw_flags="RW" width="2" name="WLRF_RADIO_RX_LEVEL_I1" comment="This register contains the value to be sent to the analogue gain stages if the AGC is disabled."/>
+ <register addr="0000a028" rw_flags="R" width="2" name="WLRF_RADIO_GAIN_STATUS_I1" comment="This register contains the current gain settings to all blocks in the analogue front end"/>
+ <register addr="0000a02c" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_EXT_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, turning off external LNA indication"/>
+ <register addr="0000a030" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_WEAK_I1" comment="This register specifies the threshold value for the FE RSSI module, too weak indication (+ 6dB gain change request)"/>
+ <register addr="0000a034" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="0000a038" rw_flags="RW" width="2" name="WLRF_RADIO_FE_RSSI_THRESH_V_LOUD_I1" comment="This register specifies the threshold value for the FE RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000a03c" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_WEAK_I1" comment="This register specifies the threshold value for the ABB RSSI module, too weak indication (+ 2.0dB gain change request)"/>
+ <register addr="0000a040" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_LOUD_I1" comment="This register specifies the threshold value for the ABB RSSI module, too loud indication (- 6dB gain change request)"/>
+ <register addr="0000a044" rw_flags="RW" width="2" name="WLRF_RADIO_ABB_RSSI_THRESH_V_LOUD_I1" comment="This register specifies the threshold value for the ABB RSSI module, extra loud indication (-12dB gain change request)"/>
+ <register addr="0000a048" rw_flags="R" width="2" name="WLRF_RADIO_RX_RSSI_I1" comment="This register contains the RSSI of the receive chain. The lower byte is the 8 bit digital RSSI (fixed to 0 since this is a radio-only chip) and the upper byte is the final analogue gain in 3dB steps."/>
+ <register addr="0000a04c" rw_flags="R" width="1" name="WLRF_RSSI_FILTERED_STATUS_I1" comment="This register contains the analogue RSSI values for the receive chain, after initial processing in the rssi blocks block."/>
+ <register addr="0000a050" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT0_I1" comment="First 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="0000a054" rw_flags="RW" width="4" name="WLRF_IB_RSSI_LUT1_I1" comment="Last 6 locations of LUT used to generate RSSI values for IB RSSI"/>
+ <register addr="0000a058" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT0_I1" comment="First 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000a05c" rw_flags="RW" width="4" name="WLRF_ABB_RSSI_LUT1_I1" comment="Last 6 locations of LUT used to generate RSSI values for ABB RSSI"/>
+ <register addr="0000a060" rw_flags="R" width="1" name="WLRF_ANA_TIMER_TX_SLOT_I1" comment="This register contains the current slot selected by the Tx timer"/>
+ <register addr="0000a064" rw_flags="R" width="1" name="WLRF_ANA_TIMER_RX_SLOT_I1" comment="This register contains the current slot selected by the Rx timer"/>
+ <register addr="0000a068" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_I1" comment="Default values for analogue enables signals should the mask register select this rather than the timer outputs"/>
+ <register addr="0000a06c" rw_flags="RW" width="4" name="WLRF_ANA_ENABLES_MASK_I1" comment="Selects use of ANA_ENABLES or timer outputs. A 1 in a given bit selects the timer output."/>
+ <register addr="0000a070" rw_flags="RW" width="4" name="WLRF_ANA_TRAINING_ENABLES_MASK_I1" comment="This masks the output of the Tx timer when it is not a DPD training frame. The idea is to be able to remove the extra Rx enables that are required for making DPD training work to improve power consumption on frames that don't need them. It should typically have all the Tx bits set and none of the Rx bits."/>
+ <register addr="0000a074" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 0."/>
+ <register addr="0000a078" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 1."/>
+ <register addr="0000a07c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 2."/>
+ <register addr="0000a080" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 3."/>
+ <register addr="0000a084" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 4."/>
+ <register addr="0000a088" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 5."/>
+ <register addr="0000a08c" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 6."/>
+ <register addr="0000a090" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_TX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for transmit timer slot 7."/>
+ <register addr="0000a094" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT0_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="0000a098" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT1_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a09c" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT2_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT3_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT4_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0a8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT5_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0ac" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT6_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0b0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_TX_SLOT7_DELAY_I1" comment="This register sets the delay from Tx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0b4" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_TX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Tx turn on and off ramps, and the slot jumped to in the case of a Tx abort"/>
+ <register addr="0000a0b8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT0_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 0."/>
+ <register addr="0000a0bc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT1_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 1."/>
+ <register addr="0000a0c0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT2_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 2."/>
+ <register addr="0000a0c4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT3_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 3."/>
+ <register addr="0000a0c8" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT4_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 4."/>
+ <register addr="0000a0cc" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT5_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 5."/>
+ <register addr="0000a0d0" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT6_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 6."/>
+ <register addr="0000a0d4" rw_flags="RW" width="4" name="WLRF_ANA_TIMER_RX_SLOT7_ENABLES_I1" comment="This register sets the radio enables for receive timer slot 7."/>
+ <register addr="0000a0d8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT0_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 0 becoming active in 50ns units"/>
+ <register addr="0000a0dc" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT1_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 1 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT2_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 2 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT3_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 3 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0e8" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT4_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 4 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0ec" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT5_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 5 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f0" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT6_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 6 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f4" rw_flags="RW" width="1" name="WLRF_ANA_TIMER_RX_SLOT7_DELAY_I1" comment="This register sets the delay from Rx timer enable to slot 7 becoming active in 50ns units. NOTE that if the delay is less than the previous slot, the timer will wrap, allowing delays up to 12.8us to be selected."/>
+ <register addr="0000a0f8" rw_flags="RW" width="2" name="WLRF_ANA_TIMER_RX_SLOT_ON_OFF_LAST_I1" comment="This register sets the start and end of Rx turn on and off ramps, and the slot jumped to in the case of an Rx abort"/>
+ <register addr="0000a0fc" rw_flags="W" width="1" name="WLRF_INT_CLEAR_I1" comment="Writing this register clears any interrupts whose corresponding bits are set in the write data. Bit allocations are as for WL_RF_INT_MASK"/>
+ <register addr="0000a100" rw_flags="RW" width="1" name="WLRF_INT_MASK_I1" comment="This register masks events from causing interrupts. Only those interrupts whose mask bit is set will be delivered to the processors"/>
+ <register addr="0000a104" rw_flags="R" width="1" name="WLRF_INT_STATUS_I1" comment="This register has bits set in it for any interrupt that is currently active. In addition 'raw' bits are set for any active interrupt, whether it is masked or not"/>
+ <register addr="0000a108" rw_flags="RW" width="1" name="WLRF_ANAIF_DEBUG_SEL_I1" comment="WLAN RFIC AnaIf debug select."/>
+ <register addr="0000a10c" rw_flags="RW" width="4" name="WLRF_DCOC_CTRL_CONFIG_I1" comment="DCOC controller config"/>
+ <register addr="0000a110" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_CONFIG2_I1" comment="DCOC controller config"/>
+ <register addr="0000a114" rw_flags="R" width="1" name="WLRF_DCOC_CTRL_STATUS_I1" comment="DCOC controller status."/>
+ <register addr="0000a118" rw_flags="RW" width="1" name="WLRF_DCOC_CTRL_LUT_SELECT_I1" comment="Choose the LUT to access, either read or write"/>
+ <register addr="0000a11c" rw_flags="RW" width="2" name="WLRF_DCOC_CTRL_LUT_WRITE_I1" comment="Write the specified value to the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="0000a120" rw_flags="R" width="2" name="WLRF_DCOC_CTRL_LUT_READ_I1" comment="Read the contents of the LUT selected using WLRF_DCOC_CTRL_LUT_SELECT."/>
+ <register addr="0000a124" rw_flags="RW" width="2" name="WLRF_ANA_INT_CFG_I1" comment="Configure source for WL status interrupts"/>
+ <register addr="0000a128" rw_flags="R" width="1" name="WLRF_ANA_INT_STATUS_I1" comment="WL Status Interrupt status"/>
+ <register addr="0000a12c" rw_flags="R" width="4" name="WLRF_ANA_RAW_INT_STATUS_I1" comment="Raw status from the analogue module - intended for hardware debug"/>
+ <register addr="0000a130" rw_flags="RW" width="4" name="WLRF_ANA_AIQ_CFG_I1" comment="Configure AIQ interface"/>
+ <register addr="0000a134" rw_flags="R" width="1" name="WLRF_ANA_AIQ_STATUS_I1" comment="Status of AIQ interface."/>
+ <register addr="0000a138" rw_flags="RW" width="1" name="WLRF_ANA_SH_LO_EN_I1" comment="Enable LO sharing (with BT). Only has an affect on WIFI0."/>
+ <register addr="0000a13c" rw_flags="R" width="4" name="WLRF_ANA_STATUS_I1" comment="Returns the value on the ANA_STATUS bus"/>
+ <register addr="0000a140" rw_flags="RW" width="4" name="WL_ANA_2G_LNA_TRIM_LUT_I1" comment="This register defines the LUT used to generate ZIN_TRIM values for 2G5 LNAs"/>
+ <register addr="0000a144" rw_flags="RW" width="4" name="WL_ANA_FE_LUT0_I1" comment=""/>
+ <register addr="0000a148" rw_flags="RW" width="4" name="WL_ANA_FE_LUT1_I1" comment=""/>
+ <register addr="0000a14c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT2_I1" comment=""/>
+ <register addr="0000a150" rw_flags="RW" width="4" name="WL_ANA_FE_LUT3_I1" comment=""/>
+ <register addr="0000a154" rw_flags="RW" width="4" name="WL_ANA_FE_LUT4_I1" comment=""/>
+ <register addr="0000a158" rw_flags="RW" width="4" name="WL_ANA_FE_LUT5_I1" comment=""/>
+ <register addr="0000a15c" rw_flags="RW" width="4" name="WL_ANA_FE_LUT6_I1" comment=""/>
+ <register addr="0000a160" rw_flags="RW" width="4" name="WL_ANA_FE_LUT7_I1" comment=""/>
+ <register addr="0000a164" rw_flags="RW" width="4" name="WL_ANA_FE_LUT8_I1" comment=""/>
+ <register addr="0000a168" rw_flags="R" width="4" name="WLRF_ANA_ENABLES_STATUS_I1" comment="This register contains the current values of the Analogue Enables, after all masking and multiplexing."/>
+ <register addr="0000a16c" rw_flags="R" width="2" name="WLRF_ANA_RAW_IB_RSSI_STATUS_I1" comment="Raw IB RSSI from analogue."/>
+ <register addr="0000a170" rw_flags="R" width="2" name="WLRF_ANA_RAW_ABB_RSSI_STATUS_I1" comment="Raw ABB RSSI from analogue."/>
+ <register addr="0000a174" rw_flags="RW" width="1" name="WL_ANA_MISC_I1" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000a178" rw_flags="RW" width="1" name="WL_ANA_BIAS_EN_I1" comment="This register controls enabling of bias blocks within WLAN analogue"/>
+ <register addr="0000a17c" rw_flags="RW" width="4" name="WL_ANA_TEST_EN_I1" comment="This register controls enabling of test facilities"/>
+ <register addr="0000a180" rw_flags="RW" width="1" name="WL_ANA_DCOC_CTRL_I1" comment="This register controls the DC offset compensation block"/>
+ <register addr="0000a184" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a188" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG2_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a18c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG3_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a190" rw_flags="RW" width="2" name="WL_ANA_ABB_RX_CONFIG4_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a194" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG5_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a198" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_CONFIG6_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a19c" rw_flags="RW" width="4" name="WL_ANA_ABB_RX_RSSI_CONFIG_I1" comment="This register controls Rx RSSI blocks"/>
+ <register addr="0000a1a0" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1a4" rw_flags="RW" width="2" name="WL_ANA_ABB_TX_CONFIG2_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1a8" rw_flags="RW" width="4" name="WL_ANA_ABB_TX_CONFIG3_I1" comment="This register controls Rx baseband"/>
+ <register addr="0000a1ac" rw_flags="RW" width="4" name="WL_ANA_2G_RX_RF_CONFIG_I1" comment="This register controls the 2G Rx RF block"/>
+ <register addr="0000a1b0" rw_flags="RW" width="1" name="WL_ANA_2G_RX_LNA_CONFIG_I1" comment="This register controls the 2G Rx LNA block"/>
+ <register addr="0000a1b4" rw_flags="RW" width="1" name="WL_ANA_5G_RX_LNA_CONFIG_I1" comment="This register controls the 5G Rx LNA block"/>
+ <register addr="0000a1b8" rw_flags="RW" width="4" name="WL_ANA_5G_RX_MIX_CONFIG_I1" comment="This register controls the 5G Rx mixer block"/>
+ <register addr="0000a1bc" rw_flags="RW" width="2" name="WL_ANA_RX_RF_MISC_CONFIG_I1" comment="This register controls miscellaneous Rx RF features"/>
+ <register addr="0000a1c0" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MISC_CONFIG_I1" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="0000a1c4" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MISC_CONFIG_I1" comment="This register controls miscellaneous Tx RF features"/>
+ <register addr="0000a1c8" rw_flags="RW" width="4" name="WL_ANA_TX_2G_MIX_DRV_CONFIG_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1cc" rw_flags="RW" width="1" name="WL_ANA_TX_2G_MIX_DRV_CONFIG2_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d0" rw_flags="RW" width="4" name="WL_ANA_TX_5G_MIX_DRV_CONFIG_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d4" rw_flags="RW" width="1" name="WL_ANA_TX_5G_MIX_DRV_CONFIG2_I1" comment="This register controls the Tx RF mixer and driver blocks"/>
+ <register addr="0000a1d8" rw_flags="RW" width="2" name="WL_ANA_TX_RF_PA_PROT_CONFIG_I1" comment="This register controls the Tx RF PA and protection blocks"/>
+ <register addr="0000a1dc" rw_flags="RW" width="4" name="WL_ANA_RESERVED0_I1" comment="Reserved"/>
+ <register addr="0000a1e0" rw_flags="RW" width="4" name="WL_ANA_RESERVED1_I1" comment="Reserved"/>
+ <register addr="0000a1e4" rw_flags="RW" width="4" name="WL_ANA_LO_TOP_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1e8" rw_flags="RW" width="4" name="WL_ANA_LO_CLKREF_ADC_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1ec" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1f0" rw_flags="RW" width="4" name="WL_ANA_LO_D_FREQ2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1f4" rw_flags="RW" width="1" name="WL_ANA_LO_PLL_STOP_I1" comment="This register written to stop the PLL from running"/>
+ <register addr="0000a1f8" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a1fc" rw_flags="RW" width="4" name="WL_ANA_LO_PU_TDC_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a200" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a204" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_CONF2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a208" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_CONF2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a20c" rw_flags="RW" width="4" name="WL_ANA_LO_TDC_NLMEM_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a210" rw_flags="RW" width="4" name="WL_ANA_LO_PU_DCO_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a214" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a218" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_OPEN2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a21c" rw_flags="RW" width="4" name="WL_ANA_LO_AREG_CONF_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a220" rw_flags="RW" width="4" name="WL_ANA_LO_DCO_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a224" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a228" rw_flags="RW" width="4" name="WL_ANA_LO_LOGEN2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a22c" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG1_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a230" rw_flags="RW" width="4" name="WL_ANA_LO_LDOREG_CFG2_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a234" rw_flags="RW" width="4" name="WL_ANA_LO_DPLL_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a238" rw_flags="RW" width="4" name="WL_ANA_LO_TEST_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a23c" rw_flags="RW" width="4" name="WL_ANA_LO_PLL_RESV_I1" comment="This register is one of the LO configuration registers"/>
+ <register addr="0000a240" rw_flags="R" width="4" name="WL_ANA_LO_DPLL_TEST_STATUS_I1" comment="This register contains test outputs from the LO"/>
+ </block>
+ <block name="zippy_rf" comment="">
+ <register addr="0000b000" rw_flags="RW" width="2" name="ZIPPY_RF_TRANSPORT" comment="ZIPPY transport configuration."/>
+ <register addr="0000b004" rw_flags="RW" width="1" name="ZIPPY_RF_PRIORITY_INC_RATE" comment="Configure the rate at which priority increases for unserviced channels. "/>
+ <register addr="0000b008" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS0_CFG" comment="Configure flags0 interface"/>
+ <register addr="0000b00c" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS1_CFG" comment="Configure flags1 interface"/>
+ <register addr="0000b010" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS2_CFG" comment="Configure flags2 interface"/>
+ <register addr="0000b014" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS3_CFG" comment="Configure flags3 interface"/>
+ <register addr="0000b018" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS4_CFG" comment="Configure flags4 interface"/>
+ <register addr="0000b01c" rw_flags="RW" width="2" name="ZIPPY_RF_FLAGS5_CFG" comment="Configure flags5 interface"/>
+ <register addr="0000b020" rw_flags="RW" width="4" name="ZIPPY_RF_DATA_CFG" comment="Configure register access options"/>
+ <register addr="0000b024" rw_flags="RW" width="1" name="ZIPPY_RF_INT_EN" comment="Enable interrupt sources."/>
+ <register addr="0000b028" rw_flags="R" width="1" name="ZIPPY_RF_INT_STATUS" comment="Status of interrupt sources."/>
+ <register addr="0000b02c" rw_flags="W" width="1" name="ZIPPY_RF_INT_CLEAR" comment="Clear interrupt Sources by writing a 1 to the register bit."/>
+ <register addr="0000b030" rw_flags="R" width="2" name="ZIPPY_RF_DATA_COUNTS" comment="Local RF counters for data from BB to RF and RF to BB. TO be compared with equivalent ones in the RFIC"/>
+ </block>
+</subsystem>
--- /dev/null
+<?xml version="1.0"?>
+<?xml-stylesheet type="text/xsl" href="SamsungWifiHip.xsl"?>
+<!-- Copyright Samsung Electronics Co. Limited 2019. All Rights Reserved. -->
+<!-- WARNING! Do not directly edit this file. -->
+<!-- This file was generated on 2019-11-29 11:41 by merge_saps.py version 1.6.1 -->
+<!-- Field name backward compatibility=True -->
+<!-- Data_References instead of firmware_references=False -->
+<!-- Add additional type definitions=False -->
+<!-- Add spare fields=False -->
+<!-- Add spare signals=False -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_control_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_data_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_debug_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_test_sap.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_all_saps.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_test_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_debug_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_data_sap.xml' -->
+<!-- Included FILE resource '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_types.xml' in '/var/jenkins/csi.fw_release_helper_JUL19/build/fw/wlan/mac/../common/hostio/hip_fapi_control_sap.xml' -->
+<definitions xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="./hip.xsd">
+ <resource name="CONST"/>
+ <resource name="FILE"/>
+ <resource name="HEADER"/>
+ <resource name="INCLUDE"/>
+ <resource name="PRIMITIVE"/>
+ <resource data_ref="true" discriminant="Signal_Id" name="SIGNAL" spare="true"/>
+ <resource name="TYPE"/>
+ <type name="ACL_Policy" resource="TYPE" size="16">
+ <value name="BlackList" value="0x0000"/>
+ <value name="WhiteList" value="0x0001"/>
+ </type>
+ <type name="AC_Priority" resource="TYPE" size="16">
+ <field name="AC_VO_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_VI_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_BK_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ <field name="AC_BE_Priority">
+ <type>Per_AC_Priority</type>
+ </field>
+ </type>
+ <type name="APF_Filter_Mode" resource="TYPE" size="16">
+ <value name="Disabled" value="0x0000"/>
+ <value name="Suspend" value="0x0001"/>
+ <value name="Active" value="0x0002"/>
+ </type>
+ <type name="Action" resource="TYPE" size="16">
+ <value name="start" value="0x0001"/>
+ <value name="stop" value="0x0000"/>
+ </type>
+ <type name="Air_Power" resource="TYPE" size="16">
+ <!-- air power in the lower 8 bits -->
+ <field name="quarter_dBm">
+ <type>Air_Power_dBm</type>
+ </field>
+ <!-- power type in the upper 8 bits -->
+ <field name="type">
+ <type>Type_Of_Air_Power</type>
+ </field>
+ </type>
+ <type name="Air_Power_dBm" resource="TYPE" signed="true" size="8"/>
+ <type name="Association_Id" resource="TYPE" size="16"/>
+ <type name="Authentication_Type" resource="TYPE" size="16">
+ <value name="Open_System" value="0x0000"/>
+ <value name="Shared_Key" value="0x0001"/>
+ <value name="SAE" value="0x0003"/>
+ <value name="LEAP" value="0x0080"/>
+ </type>
+ <type name="Band" resource="TYPE" size="16">
+ <value name="Auto" value="0x0000"/>
+ <value name="5GHz" value="0x0001"/>
+ <value name="2_4GHz" value="0x0002"/>
+ </type>
+ <type name="Bandwidth" resource="TYPE" size="2" subsidiary="true">
+ <value name="20_MHz" value="0x0"/>
+ <value name="40_MHz" value="0x1"/>
+ <value name="80_MHz" value="0x2"/>
+ <value name="160_MHz" value="0x3"/>
+ </type>
+ <type name="Beacon_Periods" resource="TYPE" size="16"/>
+ <type name="BlockAck_Parameters" resource="TYPE" size="16">
+ <field name="Buffer_Size">
+ <type>Buffer_Size</type>
+ </field>
+ <field name="TID">
+ <type>TID</type>
+ </field>
+ <field name="BlockAck_Policy">
+ <type>BlockAck_Policy</type>
+ </field>
+ <field name="AMSDU_Supported">
+ <type>Usage</type>
+ </field>
+ </type>
+ <type name="BlockAck_Policy" resource="TYPE" size="1" subsidiary="true">
+ <value name="Immediate_BlockAck" value="0x1"/>
+ <value name="Delayed_BlockAck" value="0x0"/>
+ </type>
+ <type name="Boolean" resource="TYPE" size="16">
+ <value abbr="f" name="False" value="0x0000"/>
+ <value abbr="t" name="True" value="0x0001"/>
+ </type>
+ <type name="Buffer_Size" resource="TYPE" size="10" subsidiary="true"/>
+ <type name="Bulk_Data_Descriptor" resource="TYPE" size="16">
+ <value name="Inline" value="0x0000"/>
+ <value name="Smapper" value="0x0001"/>
+ </type>
+ <type flags="true" name="CW_Start_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="scan_channel" value="0x0001"/>
+ </type>
+ <type name="CW_Type" resource="TYPE" size="16">
+ <value name="sine" value="0x0000"/>
+ <value name="ramp" value="0x0001"/>
+ <value name="two_tone" value="0x0002"/>
+ <value name="dc" value="0x0003"/>
+ <value name="prn" value="0x0004"/>
+ </type>
+ <type name="Capability_Information" resource="TYPE" size="16"/>
+ <type name="Category_Mask" resource="TYPE" size="32"/>
+ <type name="Channel_Bandwidth" resource="TYPE" size="8" subsidiary="true">
+ <value name="bandwidth_20MHz" value="0x00"/>
+ <value name="bandwidth_40MHz" value="0x01"/>
+ <value name="bandwidth_80MHz" value="0x02"/>
+ <value name="bandwidth_160MHz" value="0x03"/>
+ </type>
+ <type name="Channel_Frequency" resource="TYPE" size="16"/>
+ <type name="Channel_Info" resource="TYPE" size="16">
+ <!-- channel bandwidth in the lower 8 bits -->
+ <field name="Channel_Width">
+ <type>Channel_Bandwidth</type>
+ </field>
+ <!-- primary channel position in the upper 8 bits -->
+ <field name="Primary_Channel_Position">
+ <type>Primary_Channel_Position</type>
+ </field>
+ </type>
+ <type name="Channel_Information" resource="TYPE" size="16">
+ <field name="Primary_Channel_Position">
+ <type>Primary_Channel_Position</type>
+ </field>
+ <field name="Channel_Width">
+ <type>Channel_Width</type>
+ </field>
+ </type>
+ <type name="Channel_Width" resource="TYPE" size="8" subsidiary="true"/>
+ <type name="Cipher_Suite_Selector" resource="TYPE" size="32">
+ <mask mask="ff-ff-ff-ff" name="group_cipher_suite" value="00-0f-ac-00"/>
+ <mask mask="ff-ff-ff-ff" name="wep_40" value="00-0f-ac-01"/>
+ <mask mask="ff-ff-ff-ff" name="tkip" value="00-0f-ac-02"/>
+ <mask mask="ff-ff-ff-ff" name="ccmp_128" value="00-0f-ac-04"/>
+ <mask mask="ff-ff-ff-ff" name="wep-104" value="00-0f-ac-05"/>
+ <mask mask="ff-ff-ff-ff" name="bip_cmac_128" value="00-0f-ac-06"/>
+ <mask mask="ff-ff-ff-ff" name="gcmp_128" value="00-0f-ac-08"/>
+ <mask mask="ff-ff-ff-ff" name="gcmp_256" value="00-0f-ac-09"/>
+ <mask mask="ff-ff-ff-ff" name="ccmp_256" value="00-0f-ac-10"/>
+ <mask mask="ff-ff-ff-ff" name="bip_gmac_128" value="00-0f-ac-11"/>
+ <mask mask="ff-ff-ff-ff" name="bip_gmac_256" value="00-0f-ac-12"/>
+ <mask mask="ff-ff-ff-ff" name="bip_cmac_256" value="00-0f-ac-13"/>
+ <mask mask="ff-ff-ff-ff" name="wpi-sms4" value="00-14-72-01"/>
+ </type>
+ <type name="Client_Tag" resource="TYPE" size="16"/>
+ <type name="Connection_type" resource="TYPE" size="16">
+ <value name="Wlan_Infrastructure" value="0x0000"/>
+ <value name="P2p_Operation" value="0x0001"/>
+ <value name="Nan_Further_Service_Slot" value="0x0004"/>
+ <value name="Wlan_Ranging" value="0x0005"/>
+ </type>
+ <type name="Counter32" resource="TYPE" size="32"/>
+ <type name="Counters_List" resource="TYPE">
+ <!-- "num_counts" 32 bit counters will be placed in the counts buffer in the same order
+ as requested in WLANLITE_RX_READ.request.
+ Only returns counters for rates recognised; will stop at first invalid rate. -->
+ <field name="num_counts">
+ <type>uint16</type>
+ </field>
+ <field blocklength="num_counts" name="counts">
+ <type>uint32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_FAULT.indication" name="DEBUG_FAULT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="FaultId">
+ <type>Natural16</type>
+ </field>
+ <field name="Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Arg">
+ <type>Natural32</type>
+ </field>
+ <field name="Cpu">
+ <type>Natural16</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.confirm" name="DEBUG_GENERIC.confirm" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.indication" name="DEBUG_GENERIC.indication" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_GENERIC.request" name="DEBUG_GENERIC.request" resource="SIGNAL">
+ <field bulktype="Data_Block" name="Debug_Variable">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_REPORT.indication" name="DEBUG_PKT_GEN_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Received_Packets">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Received_Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Kbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Free_Kbytes">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_REPORT.request" name="DEBUG_PKT_GEN_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_START.request" name="DEBUG_PKT_GEN_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Size">
+ <type>Natural16</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="IPv4_Destination_Address">
+ <type>IPv4_Address</type>
+ </field>
+ <field name="Packets_Per_Interrupt">
+ <type>Natural16</type>
+ </field>
+ <field name="Use_Streaming">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_GEN_STOP.request" name="DEBUG_PKT_GEN_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_REPORT.indication" name="DEBUG_PKT_SINK_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Received_Packets">
+ <type>Counter32</type>
+ </field>
+ <field name="Received_Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Kbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Free_Kbytes">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_REPORT.request" name="DEBUG_PKT_SINK_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_START.request" name="DEBUG_PKT_SINK_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_PKT_SINK_STOP.request" name="DEBUG_PKT_SINK_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="End_Point">
+ <type>Natural16</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.confirm" name="DEBUG_SPARE1.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.request" name="DEBUG_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE1.response" name="DEBUG_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.confirm" name="DEBUG_SPARE2.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.indication" name="DEBUG_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.request" name="DEBUG_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE2.response" name="DEBUG_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.confirm" name="DEBUG_SPARE3.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.indication" name="DEBUG_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.request" name="DEBUG_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE3.response" name="DEBUG_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_SPARE4.indication" name="DEBUG_SPARE4.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_WORD12.indication" name="DEBUG_WORD12.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Module_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Module_Sub_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field array="12" name="Debug_Words">
+ <type>Natural16</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="DEBUG_WORDS.indication" name="DEBUG_WORDS.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Module_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Module_Sub_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Timestamp">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Sequence_number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="DFS_Regulatory" resource="TYPE" size="16">
+ <value name="Unknown" value="0x0000"/>
+ <value name="FCC" value="0x0001"/>
+ <value name="ETSI" value="0x0002"/>
+ <value name="JAPAN" value="0x0003"/>
+ <value name="GLOBAL" value="0x0004"/>
+ <value name="CHINA" value="0x0006"/>
+ </type>
+ <type name="Data_Block" resource="TYPE">
+ <!-- (Max Omnicli buffer size is 4K octets) -->
+ <field hidden="true" name="data_len">
+ <type>uint16</type>
+ </field>
+ <field blocklength="data_len" name="data">
+ <type>uint16</type>
+ </field>
+ </type>
+ <type name="Data_Length" resource="TYPE" size="16" subsidiary="true"/>
+ <type name="Data_Rate" resource="TYPE" size="16">
+ <!-- The format of the rate field for 11abgn/ac is:
+ Bit fields: 15..13 12..10 9..7 6 5..0
+ <mode> <bandwidth> <NSS> <SGI> <rate>
+ The format changes slightly for 11ax rates:
+ Bit fields: 15..13 12..10 9..7 6 5..4 3..0
+ <mode> <bandwidth> <NSS> <DCM> <GI> <rate>
+ Where:
+ - mode is one of:
+ 0 - 11b and <rate> is the 11b Mbps data rate rounded down
+ 1 - 11ag and <rate> is the 11a/11g Mbps data rate rounded down
+ 2 - 11n and <rate> is the HT MCS index (0..32)
+ 3 - 11ac and <rate> is the VHT MCS index (0..11)
+ 4 - 11ax and <rate> is the HE MCS index (0..11)
+ 7 - misc_count and <rate> selects non-rate counters (WLANLITE_RX_READ only)
+ - bandwidth is one of:
+ 0 - 20MHz
+ 1 - 40MHz
+ 2 - 80MHz
+ 3 - 160MHz/80+80MHz
+ - NSS is the number of spatial streams(1..8) - 1 and only applies to HT/VHT/HE rates.
+ - SGI(short guard interval) flag only applies to HT/VHT rates.
+ - DCM(dual carrier modulation) flag only applies to HE rates(MCSs 0, 1, 3 and 4 only)
+ - GI(guard interval) only applies to HE rates and is one of:
+ 0 - 0.8 us
+ 1 - 1.6 us
+ 2 - 3.2 us.
+ These values are also used to pick which rate counters we would like
+ to read in the WLANLITE_RX_READ request. -->
+ <value name="11b20_1mbps" value="0x0001"/>
+ <value name="11b20_2mbps" value="0x0002"/>
+ <value name="11b20_5m5bps" value="0x0005"/>
+ <value name="11b20_11mbps" value="0x000b"/>
+ <value name="11a20_6mbps" value="0x2006"/>
+ <value name="11a20_9mbps" value="0x2009"/>
+ <value name="11a20_12mbps" value="0x200c"/>
+ <value name="11a20_18mbps" value="0x2012"/>
+ <value name="11a20_24mbps" value="0x2018"/>
+ <value name="11a20_36mbps" value="0x2024"/>
+ <value name="11a20_48mbps" value="0x2030"/>
+ <value name="11a20_54mbps" value="0x2036"/>
+ <value name="11n20_6m5bps" value="0x4000"/>
+ <value name="11n20_13mbps" value="0x4001"/>
+ <value name="11n20_19m5bps" value="0x4002"/>
+ <value name="11n20_26mbps" value="0x4003"/>
+ <value name="11n20_39mbps" value="0x4004"/>
+ <value name="11n20_52mbps" value="0x4005"/>
+ <value name="11n20_58m5bps" value="0x4006"/>
+ <value name="11n20_65mbps" value="0x4007"/>
+ <value name="11n20_7m2bps_sgi" value="0x4040"/>
+ <value name="11n20_14m4bps_sgi" value="0x4041"/>
+ <value name="11n20_21m7bps_sgi" value="0x4042"/>
+ <value name="11n20_28m9bps_sgi" value="0x4043"/>
+ <value name="11n20_43m3bps_sgi" value="0x4044"/>
+ <value name="11n20_57m8bps_sgi" value="0x4045"/>
+ <value name="11n20_65mbps_sgi" value="0x4046"/>
+ <value name="11n20_72m2bps_sgi" value="0x4047"/>
+ <value name="11n20_13mbps_nss2" value="0x4088"/>
+ <value name="11n20_26mbps_nss2" value="0x4089"/>
+ <value name="11n20_39mbps_nss2" value="0x408a"/>
+ <value name="11n20_52mbps_nss2" value="0x408b"/>
+ <value name="11n20_78mbps_nss2" value="0x408c"/>
+ <value name="11n20_104mbps_nss2" value="0x408d"/>
+ <value name="11n20_117mbps_nss2" value="0x408e"/>
+ <value name="11n20_130mbps_nss2" value="0x408f"/>
+ <value name="11n20_14m4bps_sgi_nss2" value="0x40c8"/>
+ <value name="11n20_28m9bps_sgi_nss2" value="0x40c9"/>
+ <value name="11n20_43m3bps_sgi_nss2" value="0x40ca"/>
+ <value name="11n20_57m8bps_sgi_nss2" value="0x40cb"/>
+ <value name="11n20_86m7bps_sgi_nss2" value="0x40cc"/>
+ <value name="11n20_115m6bps_sgi_nss2" value="0x40cd"/>
+ <value name="11n20_130mbps_sgi_nss2" value="0x40ce"/>
+ <value name="11n20_144m4bps_sgi_nss2" value="0x40cf"/>
+ <value name="11n40_13m5bps" value="0x4400"/>
+ <value name="11n40_27mbps" value="0x4401"/>
+ <value name="11n40_40m5bps" value="0x4402"/>
+ <value name="11n40_54mbps" value="0x4403"/>
+ <value name="11n40_81mbps" value="0x4404"/>
+ <value name="11n40_108mbps" value="0x4405"/>
+ <value name="11n40_121m5bps" value="0x4406"/>
+ <value name="11n40_135mbps" value="0x4407"/>
+ <value name="11n40_6mbps" value="0x4420"/>
+ <value name="11n40_15mbps_sgi" value="0x4440"/>
+ <value name="11n40_30mbps_sgi" value="0x4441"/>
+ <value name="11n40_45mbps_sgi" value="0x4442"/>
+ <value name="11n40_60mbps_sgi" value="0x4443"/>
+ <value name="11n40_90mbps_sgi" value="0x4444"/>
+ <value name="11n40_120mbps_sgi" value="0x4445"/>
+ <value name="11n40_135mbps_sgi" value="0x4446"/>
+ <value name="11n40_150mbps_sgi" value="0x4447"/>
+ <value name="11n40_6m7bps_sgi" value="0x4460"/>
+ <value name="11n40_27mbps_nss2" value="0x4488"/>
+ <value name="11n40_54mbps_nss2" value="0x4489"/>
+ <value name="11n40_81mbps_nss2" value="0x448a"/>
+ <value name="11n40_108mbps_nss2" value="0x448b"/>
+ <value name="11n40_162mbps_nss2" value="0x448c"/>
+ <value name="11n40_216mbps_nss2" value="0x448d"/>
+ <value name="11n40_243mbps_nss2" value="0x448e"/>
+ <value name="11n40_270mbps_nss2" value="0x448f"/>
+ <value name="11n40_30mbps_sgi_nss2" value="0x44c8"/>
+ <value name="11n40_60mbps_sgi_nss2" value="0x44c9"/>
+ <value name="11n40_90mbps_sgi_nss2" value="0x44ca"/>
+ <value name="11n40_120mbps_sgi_nss2" value="0x44cb"/>
+ <value name="11n40_180mbps_sgi_nss2" value="0x44cc"/>
+ <value name="11n40_240mbps_sgi_nss2" value="0x44cd"/>
+ <value name="11n40_270mbps_sgi_nss2" value="0x44ce"/>
+ <value name="11n40_300mbps_sgi_nss2" value="0x44cf"/>
+ <value name="11ac20_6m5bps" value="0x6000"/>
+ <value name="11ac20_13mbps" value="0x6001"/>
+ <value name="11ac20_19m5bps" value="0x6002"/>
+ <value name="11ac20_26mbps" value="0x6003"/>
+ <value name="11ac20_39mbps" value="0x6004"/>
+ <value name="11ac20_52mbps" value="0x6005"/>
+ <value name="11ac20_58m5bps" value="0x6006"/>
+ <value name="11ac20_65mbps" value="0x6007"/>
+ <value name="11ac20_78mbps" value="0x6008"/>
+ <value name="11ac20_97m5bps" value="0x600a"/>
+ <value name="11ac20_7m2bps_sgi" value="0x6040"/>
+ <value name="11ac20_14m4bps_sgi" value="0x6041"/>
+ <value name="11ac20_21m7bps_sgi" value="0x6042"/>
+ <value name="11ac20_28m9bps_sgi" value="0x6043"/>
+ <value name="11ac20_43m3bps_sgi" value="0x6044"/>
+ <value name="11ac20_57m8bps_sgi" value="0x6045"/>
+ <value name="11ac20_65mbps_sgi" value="0x6046"/>
+ <value name="11ac20_72m2bps_sgi" value="0x6047"/>
+ <value name="11ac20_86m7bps_sgi" value="0x6048"/>
+ <value name="11ac20_108m3bps_sgi" value="0x604a"/>
+ <value name="11ac20_13mbps_nss2" value="0x6080"/>
+ <value name="11ac20_26mbps_nss2" value="0x6081"/>
+ <value name="11ac20_39mbps_nss2" value="0x6082"/>
+ <value name="11ac20_52mbps_nss2" value="0x6083"/>
+ <value name="11ac20_78mbps_nss2" value="0x6084"/>
+ <value name="11ac20_104mbps_nss2" value="0x6085"/>
+ <value name="11ac20_117mbps_nss2" value="0x6086"/>
+ <value name="11ac20_130mbps_nss2" value="0x6087"/>
+ <value name="11ac20_156mbps_nss2" value="0x6088"/>
+ <value name="11ac20_195mbps_nss2" value="0x608a"/>
+ <value name="11ac20_14m4bps_sgi_nss2" value="0x60c0"/>
+ <value name="11ac20_28m9bps_sgi_nss2" value="0x60c1"/>
+ <value name="11ac20_43m3bps_sgi_nss2" value="0x60c2"/>
+ <value name="11ac20_57m8bps_sgi_nss2" value="0x60c3"/>
+ <value name="11ac20_86m7bps_sgi_nss2" value="0x60c4"/>
+ <value name="11ac20_115m6bps_sgi_nss2" value="0x60c5"/>
+ <value name="11ac20_130mbps_sgi_nss2" value="0x60c6"/>
+ <value name="11ac20_144m4bps_sgi_nss2" value="0x60c7"/>
+ <value name="11ac20_173m3bps_sgi_nss2" value="0x60c8"/>
+ <value name="11ac20_216m7bps_sgi_nss2" value="0x60ca"/>
+ <value name="11ac40_13m5bps" value="0x6400"/>
+ <value name="11ac40_27mbps" value="0x6401"/>
+ <value name="11ac40_40m5bps" value="0x6402"/>
+ <value name="11ac40_54mbps" value="0x6403"/>
+ <value name="11ac40_81mbps" value="0x6404"/>
+ <value name="11ac40_108mbps" value="0x6405"/>
+ <value name="11ac40_121m5bps" value="0x6406"/>
+ <value name="11ac40_135mbps" value="0x6407"/>
+ <value name="11ac40_162mbps" value="0x6408"/>
+ <value name="11ac40_180mbps" value="0x6409"/>
+ <value name="11ac40_202m5bps" value="0x640a"/>
+ <value name="11ac40_225mbps" value="0x640b"/>
+ <value name="11ac40_15mbps_sgi" value="0x6440"/>
+ <value name="11ac40_30mbps_sgi" value="0x6441"/>
+ <value name="11ac40_45mbps_sgi" value="0x6442"/>
+ <value name="11ac40_60mbps_sgi" value="0x6443"/>
+ <value name="11ac40_90mbps_sgi" value="0x6444"/>
+ <value name="11ac40_120mbps_sgi" value="0x6445"/>
+ <value name="11ac40_135mbps_sgi" value="0x6446"/>
+ <value name="11ac40_150mbps_sgi" value="0x6447"/>
+ <value name="11ac40_180mbps_sgi" value="0x6448"/>
+ <value name="11ac40_200mbps_sgi" value="0x6449"/>
+ <value name="11ac40_225mbps_sgi" value="0x644a"/>
+ <value name="11ac40_250mbps_sgi" value="0x644b"/>
+ <value name="11ac40_27mbps_nss2" value="0x6480"/>
+ <value name="11ac40_54mbps_nss2" value="0x6481"/>
+ <value name="11ac40_81mbps_nss2" value="0x6482"/>
+ <value name="11ac40_108mbps_nss2" value="0x6483"/>
+ <value name="11ac40_162mbps_nss2" value="0x6484"/>
+ <value name="11ac40_216mbps_nss2" value="0x6485"/>
+ <value name="11ac40_243mbps_nss2" value="0x6486"/>
+ <value name="11ac40_270mbps_nss2" value="0x6487"/>
+ <value name="11ac40_324mbps_nss2" value="0x6488"/>
+ <value name="11ac40_360mbps_nss2" value="0x6489"/>
+ <value name="11ac40_405mbps_nss2" value="0x648a"/>
+ <value name="11ac40_450mbps_nss2" value="0x648b"/>
+ <value name="11ac40_30mbps_sgi_nss2" value="0x64c0"/>
+ <value name="11ac40_60mbps_sgi_nss2" value="0x64c1"/>
+ <value name="11ac40_90mbps_sgi_nss2" value="0x64c2"/>
+ <value name="11ac40_120mbps_sgi_nss2" value="0x64c3"/>
+ <value name="11ac40_180mbps_sgi_nss2" value="0x64c4"/>
+ <value name="11ac40_240mbps_sgi_nss2" value="0x64c5"/>
+ <value name="11ac40_270mbps_sgi_nss2" value="0x64c6"/>
+ <value name="11ac40_300mbps_sgi_nss2" value="0x64c7"/>
+ <value name="11ac40_360mbps_sgi_nss2" value="0x64c8"/>
+ <value name="11ac40_400mbps_sgi_nss2" value="0x64c9"/>
+ <value name="11ac40_450mbps_sgi_nss2" value="0x64ca"/>
+ <value name="11ac40_500mbps_sgi_nss2" value="0x64cb"/>
+ <value name="11ac80_29m3bps" value="0x6800"/>
+ <value name="11ac80_58m5bps" value="0x6801"/>
+ <value name="11ac80_87m8bps" value="0x6802"/>
+ <value name="11ac80_117mbps" value="0x6803"/>
+ <value name="11ac80_175m5bps" value="0x6804"/>
+ <value name="11ac80_234mbps" value="0x6805"/>
+ <value name="11ac80_263m3bps" value="0x6806"/>
+ <value name="11ac80_292m5bps" value="0x6807"/>
+ <value name="11ac80_351mbps" value="0x6808"/>
+ <value name="11ac80_390mbps" value="0x6809"/>
+ <value name="11ac80_438m8bps" value="0x680a"/>
+ <value name="11ac80_487m5bps" value="0x680b"/>
+ <value name="11ac80_32m5bps_sgi" value="0x6840"/>
+ <value name="11ac80_65mbps_sgi" value="0x6841"/>
+ <value name="11ac80_97m5bps_sgi" value="0x6842"/>
+ <value name="11ac80_130mbps_sgi" value="0x6843"/>
+ <value name="11ac80_195mbps_sgi" value="0x6844"/>
+ <value name="11ac80_260mbps_sgi" value="0x6845"/>
+ <value name="11ac80_292m5bps_sgi" value="0x6846"/>
+ <value name="11ac80_325mbps_sgi" value="0x6847"/>
+ <value name="11ac80_390mbps_sgi" value="0x6848"/>
+ <value name="11ac80_433m3bps_sgi" value="0x6849"/>
+ <value name="11ac80_487m5bps_sgi" value="0x684a"/>
+ <value name="11ac80_541m7bps_sgi" value="0x684b"/>
+ <value name="11ac80_58m5bps_nss2" value="0x6880"/>
+ <value name="11ac80_117mbps_nss2" value="0x6881"/>
+ <value name="11ac80_175m5bps_nss2" value="0x6882"/>
+ <value name="11ac80_234mbps_nss2" value="0x6883"/>
+ <value name="11ac80_351mbps_nss2" value="0x6884"/>
+ <value name="11ac80_468mbps_nss2" value="0x6885"/>
+ <value name="11ac80_526m5bps_nss2" value="0x6886"/>
+ <value name="11ac80_585mbps_nss2" value="0x6887"/>
+ <value name="11ac80_702mbps_nss2" value="0x6888"/>
+ <value name="11ac80_780mbps_nss2" value="0x6889"/>
+ <value name="11ac80_877m5bps_nss2" value="0x688a"/>
+ <value name="11ac80_975mbps_nss2" value="0x688b"/>
+ <value name="11ac80_65mbps_sgi_nss2" value="0x68c0"/>
+ <value name="11ac80_130mbps_sgi_nss2" value="0x68c1"/>
+ <value name="11ac80_195mbps_sgi_nss2" value="0x68c2"/>
+ <value name="11ac80_260mbps_sgi_nss2" value="0x68c3"/>
+ <value name="11ac80_390mbps_sgi_nss2" value="0x68c4"/>
+ <value name="11ac80_520mbps_sgi_nss2" value="0x68c5"/>
+ <value name="11ac80_585mbps_sgi_nss2" value="0x68c6"/>
+ <value name="11ac80_650mbps_sgi_nss2" value="0x68c7"/>
+ <value name="11ac80_780mbps_sgi_nss2" value="0x68c8"/>
+ <value name="11ac80_866m7bps_sgi_nss2" value="0x68c9"/>
+ <value name="11ac80_975mbps_sgi_nss2" value="0x68ca"/>
+ <value name="11ac80_1083m3bps_sgi_nss2" value="0x68cb"/>
+ <!-- 11ac 80+80 and 160MHz rates. -->
+ <value name="11ac160_58m5bps" value="0x6c00"/>
+ <value name="11ac160_117mbps" value="0x6c01"/>
+ <value name="11ac160_175m5bps" value="0x6c02"/>
+ <value name="11ac160_234mbps" value="0x6c03"/>
+ <value name="11ac160_351mbps" value="0x6c04"/>
+ <value name="11ac160_468mbps" value="0x6c05"/>
+ <value name="11ac160_526m5bps" value="0x6c06"/>
+ <value name="11ac160_585mbps" value="0x6c07"/>
+ <value name="11ac160_702mbps" value="0x6c08"/>
+ <value name="11ac160_780mbps" value="0x6c09"/>
+ <value name="11ac160_877m5bps" value="0x6c0a"/>
+ <value name="11ac160_975mbps" value="0x6c0b"/>
+ <value name="11ac160_65mbps_sgi" value="0x6c40"/>
+ <value name="11ac160_130mbps_sgi" value="0x6c41"/>
+ <value name="11ac160_195mbps_sgi" value="0x6c42"/>
+ <value name="11ac160_260mbps_sgi" value="0x6c43"/>
+ <value name="11ac160_390mbps_sgi" value="0x6c44"/>
+ <value name="11ac160_520mbps_sgi" value="0x6c45"/>
+ <value name="11ac160_585mbps_sgi" value="0x6c46"/>
+ <value name="11ac160_650mbps_sgi" value="0x6c47"/>
+ <value name="11ac160_780mbps_sgi" value="0x6c48"/>
+ <value name="11ac160_866m7bps_sgi" value="0x6c49"/>
+ <value name="11ac160_975mbps_sgi" value="0x6c4a"/>
+ <value name="11ac160_1083m3bps_sgi" value="0x6c4b"/>
+ <value name="11ac160_117mbps_nss2" value="0x6c80"/>
+ <value name="11ac160_234mbps_nss2" value="0x6c81"/>
+ <value name="11ac160_351mbps_nss2" value="0x6c82"/>
+ <value name="11ac160_468mbps_nss2" value="0x6c83"/>
+ <value name="11ac160_702mbps_nss2" value="0x6c84"/>
+ <value name="11ac160_936mbps_nss2" value="0x6c85"/>
+ <value name="11ac160_1053mbps_nss2" value="0x6c86"/>
+ <value name="11ac160_1170mbps_nss2" value="0x6c87"/>
+ <value name="11ac160_1404mbps_nss2" value="0x6c88"/>
+ <value name="11ac160_1560mbps_nss2" value="0x6c89"/>
+ <value name="11ac160_1755mbps_nss2" value="0x6c8a"/>
+ <value name="11ac160_1950mbps_nss2" value="0x6c8b"/>
+ <value name="11ac160_130mbps_sgi_nss2" value="0x6cc0"/>
+ <value name="11ac160_260mbps_sgi_nss2" value="0x6cc1"/>
+ <value name="11ac160_390mbps_sgi_nss2" value="0x6cc2"/>
+ <value name="11ac160_520mbps_sgi_nss2" value="0x6cc3"/>
+ <value name="11ac160_780mbps_sgi_nss2" value="0x6cc4"/>
+ <value name="11ac160_1040mbps_sgi_nss2" value="0x6cc5"/>
+ <value name="11ac160_1170mbps_sgi_nss2" value="0x6cc6"/>
+ <value name="11ac160_1300mbps_sgi_nss2" value="0x6cc7"/>
+ <value name="11ac160_1560mbps_sgi_nss2" value="0x6cc8"/>
+ <value name="11ac160_1733m3bps_sgi_nss2" value="0x6cc9"/>
+ <value name="11ac160_1950mbps_sgi_nss2" value="0x6cca"/>
+ <value name="11ac160_2166m7bps_sgi_nss2" value="0x6ccb"/>
+ <!-- 11ax 20MHz NSS=1, GI=0.8us -->
+ <value name="11ax20_4m3bps_1gi_dcm" value="0x8040"/>
+ <value name="11ax20_8m6bps_1gi" value="0x8000"/>
+ <value name="11ax20_8m6bps_1gi_dcm" value="0x8041"/>
+ <value name="11ax20_17m2bps_1gi" value="0x8001"/>
+ <value name="11ax20_25m8bps_1gi" value="0x8002"/>
+ <value name="11ax20_17m2bps_1gi_dcm" value="0x8043"/>
+ <value name="11ax20_34m4bps_1gi" value="0x8003"/>
+ <value name="11ax20_25m8bps_1gi_dcm" value="0x8044"/>
+ <value name="11ax20_51m6bps_1gi" value="0x8004"/>
+ <value name="11ax20_68m8bps_1gi" value="0x8005"/>
+ <value name="11ax20_77m4bps_1gi" value="0x8006"/>
+ <value name="11ax20_86mbps_1gi" value="0x8007"/>
+ <value name="11ax20_103m2bps_1gi" value="0x8008"/>
+ <value name="11ax20_114m7bps_1gi" value="0x8009"/>
+ <value name="11ax20_129mbps_1gi" value="0x800a"/>
+ <value name="11ax20_143m4bps_1gi" value="0x800b"/>
+ <!-- 11ax 20MHz NSS=1, GI=1.6us -->
+ <value name="11ax20_4mbps_2gi_dcm" value="0x8050"/>
+ <value name="11ax20_8m1bps_2gi" value="0x8010"/>
+ <value name="11ax20_8m1bps_2gi_dcm" value="0x8051"/>
+ <value name="11ax20_16m3bps_2gi" value="0x8011"/>
+ <value name="11ax20_24m4bps_2gi" value="0x8012"/>
+ <value name="11ax20_16m3bps_2gi_dcm" value="0x8053"/>
+ <value name="11ax20_32m5bps_2gi" value="0x8013"/>
+ <value name="11ax20_24m4bps_2gi_dcm" value="0x8054"/>
+ <value name="11ax20_48m8bps_2gi" value="0x8014"/>
+ <value name="11ax20_65mbps_2gi" value="0x8015"/>
+ <value name="11ax20_73m1bps_2gi" value="0x8016"/>
+ <value name="11ax20_81m3bps_2gi" value="0x8017"/>
+ <value name="11ax20_97m5bps_2gi" value="0x8018"/>
+ <value name="11ax20_108m3bps_2gi" value="0x8019"/>
+ <value name="11ax20_121m9bps_2gi" value="0x801a"/>
+ <value name="11ax20_135m4bps_2gi" value="0x801b"/>
+ <!-- 11ax 20MHz NSS=1, GI=3.2us -->
+ <value name="11ax20_3m6bps_4gi_dcm" value="0x8060"/>
+ <value name="11ax20_7m3bps_4gi" value="0x8020"/>
+ <value name="11ax20_7m3bps_4gi_dcm" value="0x8061"/>
+ <value name="11ax20_14m6bps_4gi" value="0x8021"/>
+ <value name="11ax20_21m9bps_4gi" value="0x8022"/>
+ <value name="11ax20_14m6bps_4gi_dcm" value="0x8063"/>
+ <value name="11ax20_29m3bps_4gi" value="0x8023"/>
+ <value name="11ax20_21m9bps_4gi_dcm" value="0x8064"/>
+ <value name="11ax20_43m9bps_4gi" value="0x8024"/>
+ <value name="11ax20_58m5bps_4gi" value="0x8025"/>
+ <value name="11ax20_65m8bps_4gi" value="0x8026"/>
+ <value name="11ax20_73m1bps_4gi" value="0x8027"/>
+ <value name="11ax20_87m8bps_4gi" value="0x8028"/>
+ <value name="11ax20_97m5bps_4gi" value="0x8029"/>
+ <value name="11ax20_109m7bps_4gi" value="0x802a"/>
+ <value name="11ax20_121m9bps_4gi" value="0x802b"/>
+ <!-- 11ax 20MHz NSS=2, GI=0.8us -->
+ <value name="11ax20_8m6bps_1gi_nss2_dcm" value="0x80c0"/>
+ <value name="11ax20_17m2bps_1gi_nss2" value="0x8080"/>
+ <value name="11ax20_17m2bps_1gi_nss2_dcm" value="0x80c1"/>
+ <value name="11ax20_34m4bps_1gi_nss2" value="0x8081"/>
+ <value name="11ax20_51m6bps_1gi_nss2" value="0x8082"/>
+ <value name="11ax20_34m4bps_1gi_nss2_dcm" value="0x80c3"/>
+ <value name="11ax20_68m8bps_1gi_nss2" value="0x8083"/>
+ <value name="11ax20_51m6bps_1gi_nss2_dcm" value="0x80c4"/>
+ <value name="11ax20_103m2bps_1gi_nss2" value="0x8084"/>
+ <value name="11ax20_137m6bps_1gi_nss2" value="0x8085"/>
+ <value name="11ax20_154m9bps_1gi_nss2" value="0x8086"/>
+ <value name="11ax20_172m1bps_1gi_nss2" value="0x8087"/>
+ <value name="11ax20_206m5bps_1gi_nss2" value="0x8088"/>
+ <value name="11ax20_229m4bps_1gi_nss2" value="0x8089"/>
+ <value name="11ax20_258m1bps_1gi_nss2" value="0x808a"/>
+ <value name="11ax20_286m8bps_1gi_nss2" value="0x808b"/>
+ <!-- 11ax 20MHz NSS=2, GI=1.6us -->
+ <value name="11ax20_8m1bps_2gi_nss2_dcm" value="0x80d0"/>
+ <value name="11ax20_16m3bps_2gi_nss2" value="0x8090"/>
+ <value name="11ax20_16m3bps_2gi_nss2_dcm" value="0x80d1"/>
+ <value name="11ax20_32m5bps_2gi_nss2" value="0x8091"/>
+ <value name="11ax20_48m8bps_2gi_nss2" value="0x8092"/>
+ <value name="11ax20_32m5bps_2gi_nss2_dcm" value="0x80d3"/>
+ <value name="11ax20_65mbps_2gi_nss2" value="0x8093"/>
+ <value name="11ax20_48m8bps_2gi_nss2_dcm" value="0x80d4"/>
+ <value name="11ax20_97m5bps_2gi_nss2" value="0x8094"/>
+ <value name="11ax20_130mbps_2gi_nss2" value="0x8095"/>
+ <value name="11ax20_146m3bps_2gi_nss2" value="0x8096"/>
+ <value name="11ax20_162m5bps_2gi_nss2" value="0x8097"/>
+ <value name="11ax20_195mbps_2gi_nss2" value="0x8098"/>
+ <value name="11ax20_216m7bps_2gi_nss2" value="0x8099"/>
+ <value name="11ax20_243m8bps_2gi_nss2" value="0x809a"/>
+ <value name="11ax20_270m8bps_2gi_nss2" value="0x809b"/>
+ <!-- 11ax 20MHz NSS=2, GI=3.2us -->
+ <value name="11ax20_7m3bps_4gi_nss2_dcm" value="0x80e0"/>
+ <value name="11ax20_14m6bps_4gi_nss2" value="0x80a0"/>
+ <value name="11ax20_14m6bps_4gi_nss2_dcm" value="0x80e1"/>
+ <value name="11ax20_29m3bps_4gi_nss2" value="0x80a1"/>
+ <value name="11ax20_43m9bps_4gi_nss2" value="0x80a2"/>
+ <value name="11ax20_29m3bps_4gi_nss2_dcm" value="0x80e3"/>
+ <value name="11ax20_58m5bps_4gi_nss2" value="0x80a3"/>
+ <value name="11ax20_43m9bps_4gi_nss2_dcm" value="0x80e4"/>
+ <value name="11ax20_87m8bps_4gi_nss2" value="0x80a4"/>
+ <value name="11ax20_117mbps_4gi_nss2" value="0x80a5"/>
+ <value name="11ax20_131m6bps_4gi_nss2" value="0x80a6"/>
+ <value name="11ax20_146m3bps_4gi_nss2" value="0x80a7"/>
+ <value name="11ax20_175m5bps_4gi_nss2" value="0x80a8"/>
+ <value name="11ax20_195mbps_4gi_nss2" value="0x80a9"/>
+ <value name="11ax20_219m4bps_4gi_nss2" value="0x80aa"/>
+ <value name="11ax20_243m8bps_4gi_nss2" value="0x80ab"/>
+ <!-- 11ax 40MHz NSS=1, GI=0.8us -->
+ <value name="11ax40_8m6bps_1gi_dcm" value="0x8440"/>
+ <value name="11ax40_17m2bps_1gi" value="0x8400"/>
+ <value name="11ax40_17m2bps_1gi_dcm" value="0x8441"/>
+ <value name="11ax40_34m4bps_1gi" value="0x8401"/>
+ <value name="11ax40_51m6bps_1gi" value="0x8402"/>
+ <value name="11ax40_34m4bps_1gi_dcm" value="0x8443"/>
+ <value name="11ax40_68m8bps_1gi" value="0x8403"/>
+ <value name="11ax40_51m6bps_1gi_dcm" value="0x8444"/>
+ <value name="11ax40_103m2bps_1gi" value="0x8404"/>
+ <value name="11ax40_137m6bps_1gi" value="0x8405"/>
+ <value name="11ax40_154m9bps_1gi" value="0x8406"/>
+ <value name="11ax40_172m1bps_1gi" value="0x8407"/>
+ <value name="11ax40_206m5bps_1gi" value="0x8408"/>
+ <value name="11ax40_229m4bps_1gi" value="0x8409"/>
+ <value name="11ax40_258m1bps_1gi" value="0x840a"/>
+ <value name="11ax40_286m8bps_1gi" value="0x840b"/>
+ <!-- 11ax 40MHz NSS=1, GI=1.6us -->
+ <value name="11ax40_8m1bps_2gi_dcm" value="0x8450"/>
+ <value name="11ax40_16m3bps_2gi" value="0x8410"/>
+ <value name="11ax40_16m3bps_2gi_dcm" value="0x8451"/>
+ <value name="11ax40_32m5bps_2gi" value="0x8411"/>
+ <value name="11ax40_48m8bps_2gi" value="0x8412"/>
+ <value name="11ax40_32m5bps_2gi_dcm" value="0x8453"/>
+ <value name="11ax40_65mbps_2gi" value="0x8413"/>
+ <value name="11ax40_48m8bps_2gi_dcm" value="0x8454"/>
+ <value name="11ax40_97m5bps_2gi" value="0x8414"/>
+ <value name="11ax40_130mbps_2gi" value="0x8415"/>
+ <value name="11ax40_146m3bps_2gi" value="0x8416"/>
+ <value name="11ax40_162m5bps_2gi" value="0x8417"/>
+ <value name="11ax40_195mbps_2gi" value="0x8418"/>
+ <value name="11ax40_216m7bps_2gi" value="0x8419"/>
+ <value name="11ax40_243m8bps_2gi" value="0x841a"/>
+ <value name="11ax40_270m8bps_2gi" value="0x841b"/>
+ <!-- 11ax 40MHz NSS=1, GI=3.2us -->
+ <value name="11ax40_7m3bps_4gi_dcm" value="0x8460"/>
+ <value name="11ax40_14m6bps_4gi" value="0x8420"/>
+ <value name="11ax40_14m6bps_4gi_dcm" value="0x8461"/>
+ <value name="11ax40_29m3bps_4gi" value="0x8421"/>
+ <value name="11ax40_43m9bps_4gi" value="0x8422"/>
+ <value name="11ax40_29m3bps_4gi_dcm" value="0x8463"/>
+ <value name="11ax40_58m5bps_4gi" value="0x8423"/>
+ <value name="11ax40_43m9bps_4gi_dcm" value="0x8464"/>
+ <value name="11ax40_87m8bps_4gi" value="0x8424"/>
+ <value name="11ax40_117mbps_4gi" value="0x8425"/>
+ <value name="11ax40_131m6bps_4gi" value="0x8426"/>
+ <value name="11ax40_146m3bps_4gi" value="0x8427"/>
+ <value name="11ax40_175m5bps_4gi" value="0x8428"/>
+ <value name="11ax40_195mbps_4gi" value="0x8429"/>
+ <value name="11ax40_219m4bps_4gi" value="0x842a"/>
+ <value name="11ax40_243m8bps_4gi" value="0x842b"/>
+ <!-- 11ax 40MHz NSS=2, GI=0.8us -->
+ <value name="11ax40_17m2bps_1gi_nss2_dcm" value="0x84c0"/>
+ <value name="11ax40_34m4bps_1gi_nss2" value="0x8480"/>
+ <value name="11ax40_34m4bps_1gi_nss2_dcm" value="0x84c1"/>
+ <value name="11ax40_68m8bps_1gi_nss2" value="0x8481"/>
+ <value name="11ax40_103m2bps_1gi_nss2" value="0x8482"/>
+ <value name="11ax40_68m8bps_1gi_nss2_dcm" value="0x84c3"/>
+ <value name="11ax40_137m6bps_1gi_nss2" value="0x8483"/>
+ <value name="11ax40_103m2bps_1gi_nss2_dcm" value="0x84c4"/>
+ <value name="11ax40_206m5bps_1gi_nss2" value="0x8484"/>
+ <value name="11ax40_275m3bps_1gi_nss2" value="0x8485"/>
+ <value name="11ax40_309m7bps_1gi_nss2" value="0x8486"/>
+ <value name="11ax40_344m1bps_1gi_nss2" value="0x8487"/>
+ <value name="11ax40_412m9bps_1gi_nss2" value="0x8488"/>
+ <value name="11ax40_458m8bps_1gi_nss2" value="0x8489"/>
+ <value name="11ax40_516m2bps_1gi_nss2" value="0x848a"/>
+ <value name="11ax40_573m5bps_1gi_nss2" value="0x848b"/>
+ <!-- 11ax 40MHz NSS=2, GI=1.6us -->
+ <value name="11ax40_16m3bps_2gi_nss2_dcm" value="0x84d0"/>
+ <value name="11ax40_32m5bps_2gi_nss2" value="0x8490"/>
+ <value name="11ax40_32m5bps_2gi_nss2_dcm" value="0x84d1"/>
+ <value name="11ax40_65mbps_2gi_nss2" value="0x8491"/>
+ <value name="11ax40_97m5bps_2gi_nss2" value="0x8492"/>
+ <value name="11ax40_65mbps_2gi_nss2_dcm" value="0x84d3"/>
+ <value name="11ax40_130mbps_2gi_nss2" value="0x8493"/>
+ <value name="11ax40_97m5bps_2gi_nss2_dcm" value="0x84d4"/>
+ <value name="11ax40_195mbps_2gi_nss2" value="0x8494"/>
+ <value name="11ax40_260mbps_2gi_nss2" value="0x8495"/>
+ <value name="11ax40_292m5bps_2gi_nss2" value="0x8496"/>
+ <value name="11ax40_325mbps_2gi_nss2" value="0x8497"/>
+ <value name="11ax40_390mbps_2gi_nss2" value="0x8498"/>
+ <value name="11ax40_433m3bps_2gi_nss2" value="0x8499"/>
+ <value name="11ax40_487m5bps_2gi_nss2" value="0x849a"/>
+ <value name="11ax40_541m7bps_2gi_nss2" value="0x849b"/>
+ <!-- 11ax 40MHz NSS=2, GI=3.2us -->
+ <value name="11ax40_14m6bps_4gi_nss2_dcm" value="0x84e0"/>
+ <value name="11ax40_29m3bps_4gi_nss2" value="0x84a0"/>
+ <value name="11ax40_29m3bps_4gi_nss2_dcm" value="0x84e1"/>
+ <value name="11ax40_58m5bps_4gi_nss2" value="0x84a1"/>
+ <value name="11ax40_87m8bps_4gi_nss2" value="0x84a2"/>
+ <value name="11ax40_58m5bps_4gi_nss2_dcm" value="0x84e3"/>
+ <value name="11ax40_117mbps_4gi_nss2" value="0x84a3"/>
+ <value name="11ax40_87m8bps_4gi_nss2_dcm" value="0x84e4"/>
+ <value name="11ax40_175m5bps_4gi_nss2" value="0x84a4"/>
+ <value name="11ax40_234mbps_4gi_nss2" value="0x84a5"/>
+ <value name="11ax40_263m3bps_4gi_nss2" value="0x84a6"/>
+ <value name="11ax40_292m5bps_4gi_nss2" value="0x84a7"/>
+ <value name="11ax40_351mbps_4gi_nss2" value="0x84a8"/>
+ <value name="11ax40_390mbps_4gi_nss2" value="0x84a9"/>
+ <value name="11ax40_438m8bps_4gi_nss2" value="0x84aa"/>
+ <value name="11ax40_487m5bps_4gi_nss2" value="0x84ab"/>
+ <!-- 11ax 80MHz NSS=1, GI=0.8us -->
+ <value name="11ax80_18mbps_1gi_dcm" value="0x8840"/>
+ <value name="11ax80_36mbps_1gi" value="0x8800"/>
+ <value name="11ax80_36mbps_1gi_dcm" value="0x8841"/>
+ <value name="11ax80_72m1bps_1gi" value="0x8801"/>
+ <value name="11ax80_108m1bps_1gi" value="0x8802"/>
+ <value name="11ax80_72m1bps_1gi_dcm" value="0x8843"/>
+ <value name="11ax80_144m1bps_1gi" value="0x8803"/>
+ <value name="11ax80_108m1bps_1gi_dcm" value="0x8844"/>
+ <value name="11ax80_216m2bps_1gi" value="0x8804"/>
+ <value name="11ax80_288m2bps_1gi" value="0x8805"/>
+ <value name="11ax80_324m3bps_1gi" value="0x8806"/>
+ <value name="11ax80_360m3bps_1gi" value="0x8807"/>
+ <value name="11ax80_432m4bps_1gi" value="0x8808"/>
+ <value name="11ax80_480m4bps_1gi" value="0x8809"/>
+ <value name="11ax80_540m4bps_1gi" value="0x880a"/>
+ <value name="11ax80_600m4bps_1gi" value="0x880b"/>
+ <!-- 11ax 80MHz NSS=1, GI=1.6us -->
+ <value name="11ax80_17mbps_2gi_dcm" value="0x8850"/>
+ <value name="11ax80_34mbps_2gi" value="0x8810"/>
+ <value name="11ax80_34mbps_2gi_dcm" value="0x8851"/>
+ <value name="11ax80_68m1bps_2gi" value="0x8811"/>
+ <value name="11ax80_102m1bps_2gi" value="0x8812"/>
+ <value name="11ax80_68m1bps_2gi_dcm" value="0x8853"/>
+ <value name="11ax80_136m1bps_2gi" value="0x8813"/>
+ <value name="11ax80_102m1bps_2gi_dcm" value="0x8854"/>
+ <value name="11ax80_204m2bps_2gi" value="0x8814"/>
+ <value name="11ax80_272m2bps_2gi" value="0x8815"/>
+ <value name="11ax80_306m3bps_2gi" value="0x8816"/>
+ <value name="11ax80_340m3bps_2gi" value="0x8817"/>
+ <value name="11ax80_408m3bps_2gi" value="0x8818"/>
+ <value name="11ax80_453m7bps_2gi" value="0x8819"/>
+ <value name="11ax80_510m4bps_2gi" value="0x881a"/>
+ <value name="11ax80_567m1bps_2gi" value="0x881b"/>
+ <!-- 11ax 80MHz NSS=1, GI=3.2us -->
+ <value name="11ax80_15m3bps_4gi_dcm" value="0x8860"/>
+ <value name="11ax80_30m6bps_4gi" value="0x8820"/>
+ <value name="11ax80_30m6bps_4gi_dcm" value="0x8861"/>
+ <value name="11ax80_61m3bps_4gi" value="0x8821"/>
+ <value name="11ax80_91m9bps_4gi" value="0x8822"/>
+ <value name="11ax80_61m3bps_4gi_dcm" value="0x8863"/>
+ <value name="11ax80_122m5bps_4gi" value="0x8823"/>
+ <value name="11ax80_91m9bps_4gi_dcm" value="0x8864"/>
+ <value name="11ax80_183m8bps_4gi" value="0x8824"/>
+ <value name="11ax80_245mbps_4gi" value="0x8825"/>
+ <value name="11ax80_275m6bps_4gi" value="0x8826"/>
+ <value name="11ax80_306m3bps_4gi" value="0x8827"/>
+ <value name="11ax80_367m5bps_4gi" value="0x8828"/>
+ <value name="11ax80_408m3bps_4gi" value="0x8829"/>
+ <value name="11ax80_459m4bps_4gi" value="0x882a"/>
+ <value name="11ax80_510m4bps_4gi" value="0x882b"/>
+ <!-- 11ax 80MHz NSS=2, GI=0.8us -->
+ <value name="11ax80_36mbps_1gi_nss2_dcm" value="0x88c0"/>
+ <value name="11ax80_72m1bps_1gi_nss2" value="0x8880"/>
+ <value name="11ax80_72m1bps_1gi_nss2_dcm" value="0x88c1"/>
+ <value name="11ax80_144m1bps_1gi_nss2" value="0x8881"/>
+ <value name="11ax80_216m2bps_1gi_nss2" value="0x8882"/>
+ <value name="11ax80_144m1bps_1gi_nss2_dcm" value="0x88c3"/>
+ <value name="11ax80_288m2bps_1gi_nss2" value="0x8883"/>
+ <value name="11ax80_216m2bps_1gi_nss2_dcm" value="0x88c4"/>
+ <value name="11ax80_432m4bps_1gi_nss2" value="0x8884"/>
+ <value name="11ax80_576m5bps_1gi_nss2" value="0x8885"/>
+ <value name="11ax80_648m5bps_1gi_nss2" value="0x8886"/>
+ <value name="11ax80_720m6bps_1gi_nss2" value="0x8887"/>
+ <value name="11ax80_864m7bps_1gi_nss2" value="0x8888"/>
+ <value name="11ax80_960m7bps_1gi_nss2" value="0x8889"/>
+ <value name="11ax80_1080m9bps_1gi_nss2" value="0x888a"/>
+ <value name="11ax80_1201mbps_1gi_nss2" value="0x888b"/>
+ <!-- 11ax 80MHz NSS=2, GI=1.6us -->
+ <value name="11ax80_34mbps_2gi_nss2_dcm" value="0x88d0"/>
+ <value name="11ax80_68m1bps_2gi_nss2" value="0x8890"/>
+ <value name="11ax80_68m1bps_2gi_nss2_dcm" value="0x88d1"/>
+ <value name="11ax80_136m1bps_2gi_nss2" value="0x8891"/>
+ <value name="11ax80_204m2bps_2gi_nss2" value="0x8892"/>
+ <value name="11ax80_136m1bps_2gi_nss2_dcm" value="0x88d3"/>
+ <value name="11ax80_272m2bps_2gi_nss2" value="0x8893"/>
+ <value name="11ax80_204m2bps_2gi_nss2_dcm" value="0x88d4"/>
+ <value name="11ax80_408m3bps_2gi_nss2" value="0x8894"/>
+ <value name="11ax80_544m4bps_2gi_nss2" value="0x8895"/>
+ <value name="11ax80_612m5bps_2gi_nss2" value="0x8896"/>
+ <value name="11ax80_680m6bps_2gi_nss2" value="0x8897"/>
+ <value name="11ax80_816m7bps_2gi_nss2" value="0x8898"/>
+ <value name="11ax80_907m4bps_2gi_nss2" value="0x8899"/>
+ <value name="11ax80_1020m8bps_2gi_nss2" value="0x889a"/>
+ <value name="11ax80_1134m3bps_2gi_nss2" value="0x889b"/>
+ <!-- 11ax 80MHz NSS=2, GI=3.2us -->
+ <value name="11ax80_30m6bps_4gi_nss2_dcm" value="0x88e0"/>
+ <value name="11ax80_61m3bps_4gi_nss2" value="0x88a0"/>
+ <value name="11ax80_61m3bps_4gi_nss2_dcm" value="0x88e1"/>
+ <value name="11ax80_122m5bps_4gi_nss2" value="0x88a1"/>
+ <value name="11ax80_183m8bps_4gi_nss2" value="0x88a2"/>
+ <value name="11ax80_122m5bps_4gi_nss2_dcm" value="0x88e3"/>
+ <value name="11ax80_245mbps_4gi_nss2" value="0x88a3"/>
+ <value name="11ax80_183m8bps_4gi_nss2_dcm" value="0x88e4"/>
+ <value name="11ax80_367m5bp_4gi_nss2" value="0x88a4"/>
+ <value name="11ax80_490mbps_4gi_nss2" value="0x88a5"/>
+ <value name="11ax80_551m3bps_4gi_nss2" value="0x88a6"/>
+ <value name="11ax80_612m5bps_4gi_nss2" value="0x88a7"/>
+ <value name="11ax80_735mbps_4gi_nss2" value="0x88a8"/>
+ <value name="11ax80_816m6bps_4gi_nss2" value="0x88a9"/>
+ <value name="11ax80_918m8bps_4gi_nss2" value="0x88aa"/>
+ <value name="11ax80_1020m8bps_4gi_nss2" value="0x88ab"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=0.8us -->
+ <value name="11ax160_36mbps_1gi_dcm" value="0x8c40"/>
+ <value name="11ax160_72m1bps_1gi" value="0x8c00"/>
+ <value name="11ax160_72m1bps_1gi_dcm" value="0x8c41"/>
+ <value name="11ax160_144m1bps_1gi" value="0x8c01"/>
+ <value name="11ax160_216m2bps_1gi" value="0x8c02"/>
+ <value name="11ax160_144m1bps_1gi_dcm" value="0x8c43"/>
+ <value name="11ax160_288m2bps_1gi" value="0x8c03"/>
+ <value name="11ax160_216m2bps_1gi_dcm" value="0x8c44"/>
+ <value name="11ax160_432m4bps_1gi" value="0x8c04"/>
+ <value name="11ax160_576m5bps_1gi" value="0x8c05"/>
+ <value name="11ax160_648m5bps_1gi" value="0x8c06"/>
+ <value name="11ax160_720m6bps_1gi" value="0x8c07"/>
+ <value name="11ax160_864m7bps_1gi" value="0x8c08"/>
+ <value name="11ax160_960m7bps_1gi" value="0x8c09"/>
+ <value name="11ax160_1080m9bps_1gi" value="0x8c0a"/>
+ <value name="11ax160_1201mbps_1gi" value="0x8c0b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=1.6us -->
+ <value name="11ax160_34mbps_2gi_dcm" value="0x8c50"/>
+ <value name="11ax160_68m1bps_2gi" value="0x8c10"/>
+ <value name="11ax160_68m1bps_2gi_dcm" value="0x8c51"/>
+ <value name="11ax160_136m1bps_2gi" value="0x8c11"/>
+ <value name="11ax160_204m2bps_2gi" value="0x8c12"/>
+ <value name="11ax160_136m1bps_2gi_dcm" value="0x8c53"/>
+ <value name="11ax160_272m2bps_2gi" value="0x8c13"/>
+ <value name="11ax160_204m2bps_2gi_dcm" value="0x8c54"/>
+ <value name="11ax160_408m3bps_2gi" value="0x8c14"/>
+ <value name="11ax160_544m4bps_2gi" value="0x8c15"/>
+ <value name="11ax160_612m5bps_2gi" value="0x8c16"/>
+ <value name="11ax160_680m6bps_2gi" value="0x8c17"/>
+ <value name="11ax160_816m7bps_2gi" value="0x8c18"/>
+ <value name="11ax160_907m4bps_2gi" value="0x8c19"/>
+ <value name="11ax160_1020m8bps_2gi" value="0x8c1a"/>
+ <value name="11ax160_1134m2bps_2gi" value="0x8c1b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=1, GI=3.2us -->
+ <value name="11ax160_30m6bps_4gi_dcm" value="0x8c60"/>
+ <value name="11ax160_61m3bps_4gi" value="0x8c20"/>
+ <value name="11ax160_61m3bps_4gi_dcm" value="0x8c61"/>
+ <value name="11ax160_122m5bps_4gi" value="0x8c21"/>
+ <value name="11ax160_183m8bps_4gi" value="0x8c22"/>
+ <value name="11ax160_122m5bps_4gi_dcm" value="0x8c63"/>
+ <value name="11ax160_245mbps_4gi" value="0x8c23"/>
+ <value name="11ax160_183m8bps_4gi_dcm" value="0x8c64"/>
+ <value name="11ax160_367m5bps_4gi" value="0x8c24"/>
+ <value name="11ax160_490mbps_4gi" value="0x8c25"/>
+ <value name="11ax160_551m3bps_4gi" value="0x8c26"/>
+ <value name="11ax160_612m5bps_4gi" value="0x8c27"/>
+ <value name="11ax160_735mbps_4gi" value="0x8c28"/>
+ <value name="11ax160_816m6bps_4gi" value="0x8c29"/>
+ <value name="11ax160_918m8bps_4gi" value="0x8c2a"/>
+ <value name="11ax160_1020m8bps_4gi" value="0x8c2b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=0.8us -->
+ <value name="11ax160_72m1bps_1gi_nss2_dcm" value="0x8cc0"/>
+ <value name="11ax160_144m1bps_1gi_nss2" value="0x8c80"/>
+ <value name="11ax160_144m1bps_1gi_nss2_dcm" value="0x8cc1"/>
+ <value name="11ax160_288m2bps_1gi_nss2" value="0x8c81"/>
+ <value name="11ax160_432m4bps_1gi_nss2" value="0x8c82"/>
+ <value name="11ax160_288m2bps_1gi_nss2_dcm" value="0x8cc3"/>
+ <value name="11ax160_576m5bps_1gi_nss2" value="0x8c83"/>
+ <value name="11ax160_432m4bps_1gi_nss2_dcm" value="0x8cc4"/>
+ <value name="11ax160_864m7bps_1gi_nss2" value="0x8c84"/>
+ <value name="11ax160_1152m9bps_1gi_nss2" value="0x8c85"/>
+ <value name="11ax160_1297m1bps_1gi_nss2" value="0x8c86"/>
+ <value name="11ax160_1441m2bps_1gi_nss2" value="0x8c87"/>
+ <value name="11ax160_1729m4bps_1gi_nss2" value="0x8c88"/>
+ <value name="11ax160_1921m5bps_1gi_nss2" value="0x8c89"/>
+ <value name="11ax160_2161m8bps_1gi_nss2" value="0x8c8a"/>
+ <value name="11ax160_2401m9bps_1gi_nss2" value="0x8c8b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=1.6us -->
+ <value name="11ax160_68m1bps_2gi_nss2_dcm" value="0x8cd0"/>
+ <value name="11ax160_136m1bps_2gi_nss2" value="0x8c90"/>
+ <value name="11ax160_136m1bps_2gi_nss2_dcm" value="0x8cd1"/>
+ <value name="11ax160_272m2bps_2gi_nss2" value="0x8c91"/>
+ <value name="11ax160_408m3bps_2gi_nss2" value="0x8c92"/>
+ <value name="11ax160_272m2bps_2gi_nss2_dcm" value="0x8cd3"/>
+ <value name="11ax160_544m4bps_2gi_nss2" value="0x8c93"/>
+ <value name="11ax160_408m3bps_2gi_nss2_dcm" value="0x8cd4"/>
+ <value name="11ax160_816m7bps_2gi_nss2" value="0x8c94"/>
+ <value name="11ax160_1088m9bps_2gi_nss2" value="0x8c95"/>
+ <value name="11ax160_1225mbps_2gi_nss2" value="0x8c96"/>
+ <value name="11ax160_1361m1bps_2gi_nss2" value="0x8c97"/>
+ <value name="11ax160_1633m3bps_2gi_nss2" value="0x8c98"/>
+ <value name="11ax160_1814m8bps_2gi_nss2" value="0x8c99"/>
+ <value name="11ax160_2041m7bps_2gi_nss2" value="0x8c9a"/>
+ <value name="11ax160_2268m5bps_2gi_nss2" value="0x8c9b"/>
+ <!-- 11ax 160MHz and 80+80MHz NSS=2, GI=3.2us -->
+ <value name="11ax160_61m3bps_4gi_nss2_dcm" value="0x8ce0"/>
+ <value name="11ax160_122m5bps_4gi_nss2" value="0x8ca0"/>
+ <value name="11ax160_122m5bps_4gi_nss2_dcm" value="0x8ce1"/>
+ <value name="11ax160_245mbps_4gi_nss2" value="0x8ca1"/>
+ <value name="11ax160_367m5bps_4gi_nss2" value="0x8ca2"/>
+ <value name="11ax160_245mbps_4gi_nss2_dcm" value="0x8ce3"/>
+ <value name="11ax160_490mbps_4gi_nss2" value="0x8ca3"/>
+ <value name="11ax160_367m5bps_4gi_nss2_dcm" value="0x8ce4"/>
+ <value name="11ax160_735mbps_4gi_nss2" value="0x8ca4"/>
+ <value name="11ax160_980mbps_4gi_nss2" value="0x8ca5"/>
+ <value name="11ax160_1102m5bps_4gi_nss2" value="0x8ca6"/>
+ <value name="11ax160_1225mbps_4gi_nss2" value="0x8ca7"/>
+ <value name="11ax160_1470mbps_4gi_nss2" value="0x8ca8"/>
+ <value name="11ax160_1633m3bps_4gi_nss2" value="0x8ca9"/>
+ <value name="11ax160_1837m5bps_4gi_nss2" value="0x8caa"/>
+ <value name="11ax160_2041m6bps_4gi_nss2" value="0x8cab"/>
+ <!-- These values are not rates and are only applicable when
+ using WLANLITE_RX_READ to read miscellaneous counters. -->
+ <value name="ctr_total" value="0xe000"/>
+ <value name="ctr_no_error" value="0xe001"/>
+ <value name="ctr_crc_error" value="0xe002"/>
+ <value name="ctr_bad_signal" value="0xe003"/>
+ <value name="ctr_stbc" value="0xe004"/>
+ <value name="ctr_duplicate" value="0xe005"/>
+ <value name="ctr_error" value="0xe006"/>
+ <value name="ctr_ldpc" value="0xe007"/>
+ <value name="ctr_beamformed" value="0xe008"/>
+ </type>
+ <type name="Data_Reference" resource="TYPE" size="32">
+ <field name="Slot_Number">
+ <type>Slot_Number</type>
+ </field>
+ <field name="Data_Length">
+ <type>Data_Length</type>
+ </field>
+ </type>
+ <type name="Data_Unit_Descriptor" resource="TYPE" size="16">
+ <value name="IEEE802_11_Frame" value="0x0000"/>
+ <value name="IEEE802_3_Frame" value="0x0001"/>
+ <value name="AMSDU_subframe" value="0x0002"/>
+ <value name="AMSDU" value="0x0003"/>
+ <value name="TCP_ACK" value="0x0004"/>
+ </type>
+ <type name="Decibels" resource="TYPE" signed="true" size="16"/>
+ <type name="Device_Role" resource="TYPE" size="16">
+ <value name="Infrastructure_Station" value="0x0001"/>
+ <value name="P2p_GO" value="0x0002"/>
+ <value name="P2p_Device" value="0x0003"/>
+ <value name="P2p_Client" value="0x0004"/>
+ </type>
+ <type name="Device_State" resource="TYPE" size="16">
+ <value name="idle" value="0"/>
+ <value name="rx_running" value="1"/>
+ <value name="tx_running" value="2"/>
+ <value name="cw_running" value="3"/>
+ <value name="bist_running" value="4"/>
+ </type>
+ <type name="Direction" resource="TYPE" size="16">
+ <value name="Transmit" value="0x0000"/>
+ <value name="Receive" value="0x0001"/>
+ </type>
+ <type name="Edge_Of_Band" resource="TYPE" size="16"/>
+ <type name="End_Point" resource="TYPE" size="16">
+ <value name="Hostio" value="0x0001"/>
+ <value name="DPLP" value="0x0002"/>
+ </type>
+ <type name="Event" resource="TYPE" size="16">
+ <value name="WIFI_EVENT_ASSOCIATION_REQUESTED" value="0x0000"/>
+ <value name="WIFI_EVENT_AUTH_COMPLETE" value="0x0001"/>
+ <value name="WIFI_EVENT_ASSOC_COMPLETE" value="0x0002"/>
+ <value name="WIFI_EVENT_FW_AUTH_STARTED" value="0x0003"/>
+ <value name="WIFI_EVENT_FW_ASSOC_STARTED" value="0x0004"/>
+ <value name="WIFI_EVENT_FW_RE_ASSOC_STARTED" value="0x0005"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_REQUESTED" value="0x0006"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_RESULT_FOUND" value="0x0007"/>
+ <value name="WIFI_EVENT_DRIVER_SCAN_COMPLETE" value="0x0008"/>
+ <value name="WIFI_EVENT_G_SCAN_STARTED" value="0x0009"/>
+ <value name="WIFI_EVENT_G_SCAN_COMPLETE" value="0x000a"/>
+ <value name="WIFI_EVENT_DISASSOCIATION_REQUESTED" value="0x000b"/>
+ <value name="WIFI_EVENT_RE_ASSOCIATION_REQUESTED" value="0x000c"/>
+ <value name="WIFI_EVENT_ROAM_REQUESTED" value="0x000d"/>
+ <value name="WIFI_EVENT_BEACON_RECEIVED" value="0x000e"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_STARTED" value="0x000f"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_COMPLETE" value="0x0010"/>
+ <value name="WIFI_EVENT_ROAM_SEARCH_STARTED" value="0x0011"/>
+ <value name="WIFI_EVENT_ROAM_SEARCH_STOPPED" value="0x0012"/>
+ <value name="WIFI_EVENT_CHANNEL_SWITCH_ANOUNCEMENT" value="0x0014"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_START" value="0x0015"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_STOP" value="0x0016"/>
+ <value name="WIFI_EVENT_DRIVER_EAPOL_FRAME_TRANSMIT_REQUESTED" value="0x0017"/>
+ <value name="WIFI_EVENT_FW_EAPOL_FRAME_RECEIVED" value="0x0018"/>
+ <value name="WIFI_EVENT_DRIVER_EAPOL_FRAME_RECEIVED" value="0x001a"/>
+ <value name="WIFI_EVENT_BLOCK_ACK_NEGOTIATION_COMPLETE" value="0x001b"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCO_START" value="0x001c"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCO_STOP" value="0x001d"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCAN_START" value="0x001e"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_SCAN_STOP" value="0x001f"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_HID_START" value="0x0020"/>
+ <value name="WIFI_EVENT_BT_COEX_BT_HID_STOP" value="0x0021"/>
+ <value name="WIFI_EVENT_ROAM_AUTH_STARTED" value="0x0022"/>
+ <value name="WIFI_EVENT_ROAM_AUTH_COMPLETE" value="0x0023"/>
+ <value name="WIFI_EVENT_ROAM_ASSOC_STARTED" value="0x0024"/>
+ <value name="WIFI_EVENT_ROAM_ASSOC_COMPLETE" value="0x0025"/>
+ <value name="WIFI_EVENT_G_SCAN_STOP" value="0x0026"/>
+ <value name="WIFI_EVENT_G_SCAN_CYCLE_STARTED" value="0x0027"/>
+ <value name="WIFI_EVENT_G_SCAN_CYCLE_COMPLETED" value="0x0028"/>
+ <value name="WIFI_EVENT_G_SCAN_BUCKET_STARTED" value="0x0029"/>
+ <value name="WIFI_EVENT_G_SCAN_BUCKET_COMPLETED" value="0x002a"/>
+ <value name="WIFI_EVENT_G_SCAN_RESULTS_AVAILABLE" value="0x002b"/>
+ <value name="WIFI_EVENT_G_SCAN_CAPABILITIES" value="0x002c"/>
+ <value name="WIFI_EVENT_ROAM_CANDIDATE_FOUND" value="0x002d"/>
+ <value name="WIFI_EVENT_ROAM_SCAN_CONFIG" value="0x002e"/>
+ <value name="WIFI_EVENT_AUTH_TIMEOUT" value="0x002f"/>
+ <value name="WIFI_EVENT_ASSOC_TIMEOUT" value="0x0030"/>
+ <value name="WIFI_EVENT_MEM_ALLOC_FAILURE" value="0x0031"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_ADD" value="0x0032"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_REMOVE" value="0x0033"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_NETWORK_FOUND" value="0x0034"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_REQUESTED" value="0x0035"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_RESULT_FOUND" value="0x0036"/>
+ <value name="WIFI_EVENT_DRIVER_PNO_SCAN_COMPLETE" value="0x0037"/>
+ <value name="WIFI_EVENT_BLACKOUT_START" value="0x0064"/>
+ <value name="WIFI_EVENT_BLACKOUT_STOP" value="0x0065"/>
+ <value name="WIFI_EVENT_NAN_PUBLISH_TERMINATED" value="0x0100"/>
+ <value name="WIFI_EVENT_NAN_SUBSCRIBE_TERMINATED" value="0x0101"/>
+ <value name="WIFI_EVENT_NAN_MATCH_EXPIRED" value="0x0102"/>
+ <value name="WIFI_EVENT_NAN_ADDRESS_CHANGED" value="0x0103"/>
+ <value name="WIFI_EVENT_NAN_CLUSTER_STARTED" value="0x0104"/>
+ <value name="WIFI_EVENT_NAN_CLUSTER_JOINED" value="0x0105"/>
+ <value name="WiFI_EVENT_NAN_TRANSMIT_FOLLOWUP" value="0x0106"/>
+ </type>
+ <type name="HT" resource="TYPE" size="2" subsidiary="true">
+ <value name="Non_HT_Rate" value="0x1"/>
+ <value name="HT_Rate" value="0x2"/>
+ <value name="VHT_Rate" value="0x3"/>
+ </type>
+ <type name="Hidden_Ssid" resource="TYPE" size="16">
+ <value name="Not_Hidden" value="0x0000"/>
+ <value name="Hidden_Zero_Length" value="0x0001"/>
+ <value name="Hidden_Zero_Data" value="0x0002"/>
+ </type>
+ <type name="Host_State" resource="TYPE" size="16"/>
+ <type name="IPv4_Address" resource="TYPE" size="32"/>
+ <type name="Key_Type" resource="TYPE" size="16">
+ <value name="Group" value="0x0000"/>
+ <value name="Pairwise" value="0x0001"/>
+ <value name="WEP" value="0x0002"/>
+ <value name="IGTK" value="0x0003"/>
+ <value name="PMK" value="0x0004"/>
+ <value name="First_Illegal" value="0x0005"/>
+ </type>
+ <type name="MAC_Address" resource="TYPE" size="48">
+ <mask mask="ff-ff-ff-ff-ff-ff" name="broadcast" value="ff-ff-ff-ff-ff-ff"/>
+ </type>
+ <type dvalue="MA_BLOCKACK.indication" name="MA_BLOCKACK.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_QSTA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="BlockAck_Parameter_Set">
+ <type>BlockAck_Parameters</type>
+ </field>
+ <field name="Direction">
+ <type>Direction</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.confirm" name="MA_SPARE1.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.indication" name="MA_SPARE1.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.request" name="MA_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE1.response" name="MA_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.confirm" name="MA_SPARE2.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.indication" name="MA_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.request" name="MA_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE2.response" name="MA_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.confirm" name="MA_SPARE3.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.indication" name="MA_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.request" name="MA_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_SPARE3.response" name="MA_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.confirm" name="MA_UNITDATA.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Transmission_Status">
+ <type>Transmission_Status</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.indication" name="MA_UNITDATA.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Sequence_Number">
+ <type>Sequence_Number</type>
+ </field>
+ <field name="Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Proprieraty_Information_Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Bulk_Data_Descriptor">
+ <type>Bulk_Data_Descriptor</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MA_UNITDATA.request" name="MA_UNITDATA.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Bulk_Data_Descriptor">
+ <type>Bulk_Data_Descriptor</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_AC_PRIORITY_UPDATE.indication" name="MLME_AC_PRIORITY_UPDATE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="AC_Priority">
+ <type>AC_Priority</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_INFO_ELEMENTS.confirm" name="MLME_ADD_INFO_ELEMENTS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_INFO_ELEMENTS.request" name="MLME_ADD_INFO_ELEMENTS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Purpose">
+ <type>Purpose_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_RANGE.confirm" name="MLME_ADD_RANGE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_RANGE.request" name="MLME_ADD_RANGE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_SCAN.confirm" name="MLME_ADD_SCAN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_SCAN.request" name="MLME_ADD_SCAN.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Scan_Type">
+ <type>Scan_Type</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Report_Mode_Bitmap">
+ <type>Report_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_VIF.confirm" name="MLME_ADD_VIF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ADD_VIF.request" name="MLME_ADD_VIF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Virtual_Interface_Type">
+ <type>VIF_Type</type>
+ </field>
+ <field name="Device_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ARP_DETECT.confirm" name="MLME_ARP_DETECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ARP_DETECT.request" name="MLME_ARP_DETECT.request" resource="SIGNAL">
+ <field name="IP_Address">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="ARP_Detect_Action">
+ <type>Action</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_BEACON_REPORTING_EVENT.indication" name="MLME_BEACON_REPORTING_EVENT.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Abort_Reason">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCH.confirm" name="MLME_CHANNEL_SWITCH.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCH.request" name="MLME_CHANNEL_SWITCH.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CHANNEL_SWITCHED.indication" name="MLME_CHANNEL_SWITCHED.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.confirm" name="MLME_CONNECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.indication" name="MLME_CONNECT.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.request" name="MLME_CONNECT.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Authentication_Type">
+ <type>Authentication_Type</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECT.response" name="MLME_CONNECT.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECTED.indication" name="MLME_CONNECTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_CONNECTED.response" name="MLME_CONNECTED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_RANGE.confirm" name="MLME_DEL_RANGE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="RTT_ID">
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_RANGE.request" name="MLME_DEL_RANGE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
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+ <field name="Entries">
+ <type>Natural16</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_SCAN.confirm" name="MLME_DEL_SCAN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
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+ <field name="Result_Code">
+ <type>Result_Code</type>
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+ <field name="Scan_Id">
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_SCAN.request" name="MLME_DEL_SCAN.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
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+ <field name="Scan_Id">
+ <type>Scan_Id</type>
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+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_TRAFFIC_PARAMETERS.confirm" name="MLME_DEL_TRAFFIC_PARAMETERS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
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+ <type>Natural32</type>
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+ <type>Natural32</type>
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+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_TRAFFIC_PARAMETERS.request" name="MLME_DEL_TRAFFIC_PARAMETERS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="User_Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_VIF.confirm" name="MLME_DEL_VIF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DEL_VIF.request" name="MLME_DEL_VIF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
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+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
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+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.confirm" name="MLME_DISCONNECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.indication" name="MLME_DISCONNECT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECT.request" name="MLME_DISCONNECT.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_DISCONNECTED.indication" name="MLME_DISCONNECTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_EVENT_LOG.indication" name="MLME_EVENT_LOG.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Event">
+ <type>Event</type>
+ </field>
+ <field name="Timestamp">
+ <type>TSF_Time</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FORWARD_BEACON.confirm" name="MLME_FORWARD_BEACON.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FORWARD_BEACON.request" name="MLME_FORWARD_BEACON.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="WIPS_Action">
+ <type>Action</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_FRAME_TRANSMISSION.indication" name="MLME_FRAME_TRANSMISSION.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Transmission_Status">
+ <type>Transmission_Status</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET.confirm" name="MLME_GET.confirm" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Element" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET.request" name="MLME_GET.request" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Identifier" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET_KEY_SEQUENCE.confirm" name="MLME_GET_KEY_SEQUENCE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field array="8" name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_GET_KEY_SEQUENCE.request" name="MLME_GET_KEY_SEQUENCE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_HOST_STATE.confirm" name="MLME_HOST_STATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_HOST_STATE.request" name="MLME_HOST_STATE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_State">
+ <type>Host_State</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_INSTALL_APF.confirm" name="MLME_INSTALL_APF.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_INSTALL_APF.request" name="MLME_INSTALL_APF.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Filter_Mode">
+ <type>APF_Filter_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_LISTEN_END.indication" name="MLME_LISTEN_END.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MIC_FAILURE.indication" name="MLME_MIC_FAILURE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field array="8" name="Key_Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MONITOR_RSSI.confirm" name="MLME_MONITOR_RSSI.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_MONITOR_RSSI.request" name="MLME_MONITOR_RSSI.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Low_RSSI_Threshold">
+ <type>Decibels</type>
+ </field>
+ <field name="High_RSSI_Threshold">
+ <type>Decibels</type>
+ </field>
+ <field name="RSSI_monitoring_enabled">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_CONFIG.confirm" name="MLME_NAN_CONFIG.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_CONFIG.request" name="MLME_NAN_CONFIG.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NAN_Operation_Control_Flags">
+ <type>NANOperControl_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_EVENT.indication" name="MLME_NAN_EVENT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Event">
+ <type>Event</type>
+ </field>
+ <field name="Identifier">
+ <type>Natural16</type>
+ </field>
+ <field name="Address_or_Identifier">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.confirm" name="MLME_NAN_FOLLOWUP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.indication" name="MLME_NAN_FOLLOWUP.indication" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NAN_Management_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_FOLLOWUP.request" name="MLME_NAN_FOLLOWUP.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_PUBLISH.confirm" name="MLME_NAN_PUBLISH.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_PUBLISH.request" name="MLME_NAN_PUBLISH.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SERVICE.indication" name="MLME_NAN_SERVICE.indication" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Ranging_Measurement">
+ <type>Natural32</type>
+ </field>
+ <field name="rangingIndicationType">
+ <type>Ranging_Ind_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_START.confirm" name="MLME_NAN_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_START.request" name="MLME_NAN_START.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NAN_Operation_Control_Flags">
+ <type>NANOperControl_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SUBSCRIBE.confirm" name="MLME_NAN_SUBSCRIBE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NAN_SUBSCRIBE.request" name="MLME_NAN_SUBSCRIBE.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NAN_SDF_Flags">
+ <type>NANSDF_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.confirm" name="MLME_NDP_REQUEST.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.indication" name="MLME_NDP_REQUEST.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUEST.request" name="MLME_NDP_REQUEST.request" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Match_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_REQUESTED.indication" name="MLME_NDP_REQUESTED.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Session_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NAN_Management_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Security_Required">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.confirm" name="MLME_NDP_RESPONSE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.indication" name="MLME_NDP_RESPONSE.indication" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Peer_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_RESPONSE.request" name="MLME_NDP_RESPONSE.request" resource="SIGNAL">
+ <field name="NAN_TLVs">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.confirm" name="MLME_NDP_TERMINATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.indication" name="MLME_NDP_TERMINATE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATE.request" name="MLME_NDP_TERMINATE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_NDP_TERMINATED.indication" name="MLME_NDP_TERMINATED.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="NDL_VIF_index">
+ <type>Natural16</type>
+ </field>
+ <field name="Local_NDP_Interface_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_POWERMGT.confirm" name="MLME_POWERMGT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_POWERMGT.request" name="MLME_POWERMGT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Power_Management_Mode">
+ <type>Power_Management_Mode</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_PROCEDURE_STARTED.indication" name="MLME_PROCEDURE_STARTED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Procedure_Type">
+ <type>Procedure_Type</type>
+ </field>
+ <field name="Association_Identifier">
+ <type>Association_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RANGE.indication" name="MLME_RANGE.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Entries">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RANGE_DONE.indication" name="MLME_RANGE_DONE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RTT_ID">
+ <type>RTT_ID</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_READ_APF.confirm" name="MLME_READ_APF.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_READ_APF.request" name="MLME_READ_APF.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.confirm" name="MLME_REASSOCIATE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.indication" name="MLME_REASSOCIATE.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.request" name="MLME_REASSOCIATE.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REASSOCIATE.response" name="MLME_REASSOCIATE.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RECEIVED_FRAME.indication" name="MLME_RECEIVED_FRAME.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REGISTER_ACTION_FRAME.confirm" name="MLME_REGISTER_ACTION_FRAME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_REGISTER_ACTION_FRAME.request" name="MLME_REGISTER_ACTION_FRAME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Action_Frame_Category_Bitmap_active">
+ <type>Category_Mask</type>
+ </field>
+ <field name="Action_Frame_Category_Bitmap_suspended">
+ <type>Category_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RESET_DWELL_TIME.confirm" name="MLME_RESET_DWELL_TIME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RESET_DWELL_TIME.request" name="MLME_RESET_DWELL_TIME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.confirm" name="MLME_ROAM.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.indication" name="MLME_ROAM.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAM.request" name="MLME_ROAM.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAMED.indication" name="MLME_ROAMED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Temporal_Keys_Required">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_ROAMED.response" name="MLME_ROAMED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_RSSI_REPORT.indication" name="MLME_RSSI_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SCAN.indication" name="MLME_SCAN.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="HotListed_AP">
+ <type>Boolean</type>
+ </field>
+ <field name="PreferredNetwork_AP">
+ <type>Boolean</type>
+ </field>
+ <field name="ANQP_Elements_Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Network_Block_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SCAN_DONE.indication" name="MLME_SCAN_DONE.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field default="0" hidden="true" name="Virtual_Interface_Index" suppress="true">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Scan_Id">
+ <type>Scan_Id</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SEND_FRAME.confirm" name="MLME_SEND_FRAME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SEND_FRAME.request" name="MLME_SEND_FRAME.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Host_Tag">
+ <type>Client_Tag</type>
+ </field>
+ <field name="Data_Unit_Descriptor">
+ <type>Data_Unit_Descriptor</type>
+ </field>
+ <field name="Message_Type">
+ <type>Message_Type</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Dwell_Time">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Period">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET.confirm" name="MLME_SET.confirm" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Status" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET.request" name="MLME_SET.request" resource="SIGNAL" vldata_encoded="true">
+ <field name="MIB_Variable_Element" vldata_encoded="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SETKEYS.confirm" name="MLME_SETKEYS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SETKEYS.request" name="MLME_SETKEYS.request" resource="SIGNAL">
+ <field name="Key">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Length">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Id">
+ <type>Natural16</type>
+ </field>
+ <field name="Key_Type">
+ <type>Key_Type</type>
+ </field>
+ <field name="Address">
+ <type>MAC_Address</type>
+ </field>
+ <field array="8" name="Sequence_Number">
+ <type>Natural16</type>
+ </field>
+ <field name="Cipher_Suite_Selector">
+ <type>Cipher_Suite_Selector</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ACL.confirm" name="MLME_SET_ACL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ACL.request" name="MLME_SET_ACL.request" resource="SIGNAL">
+ <field name="Access_Control_List">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Entries">
+ <type>Natural16</type>
+ </field>
+ <field name="ACL_Policy">
+ <type>ACL_Policy</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_BAND.confirm" name="MLME_SET_BAND.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_BAND.request" name="MLME_SET_BAND.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Band">
+ <type>Band</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CACHED_CHANNELS.confirm" name="MLME_SET_CACHED_CHANNELS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CACHED_CHANNELS.request" name="MLME_SET_CACHED_CHANNELS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CHANNEL.confirm" name="MLME_SET_CHANNEL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CHANNEL.request" name="MLME_SET_CHANNEL.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Availability_Duration">
+ <type>Time_Units</type>
+ </field>
+ <field name="Availability_Interval">
+ <type>Time_Units</type>
+ </field>
+ <field name="Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_COUNTRY.confirm" name="MLME_SET_COUNTRY.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_COUNTRY.request" name="MLME_SET_COUNTRY.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Country_Code">
+ <type>Natural16</type>
+ </field>
+ <field name="DFS_Regulatory_Domain">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CTWINDOW.confirm" name="MLME_SET_CTWINDOW.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_CTWINDOW.request" name="MLME_SET_CTWINDOW.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="CTWindow">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_IP_ADDRESS.confirm" name="MLME_SET_IP_ADDRESS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_IP_ADDRESS.request" name="MLME_SET_IP_ADDRESS.request" resource="SIGNAL">
+ <field name="IP_Address">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="IP_Version">
+ <type>Natural16</type>
+ </field>
+ <field name="Multicast_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NOA.confirm" name="MLME_SET_NOA.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NOA.request" name="MLME_SET_NOA.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Request_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="NoA_Count">
+ <type>Natural16</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NUM_ANTENNAS.confirm" name="MLME_SET_NUM_ANTENNAS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_NUM_ANTENNAS.request" name="MLME_SET_NUM_ANTENNAS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Number_of_Antennas">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PACKET_FILTER.confirm" name="MLME_SET_PACKET_FILTER.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PACKET_FILTER.request" name="MLME_SET_PACKET_FILTER.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PMK.confirm" name="MLME_SET_PMK.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PMK.request" name="MLME_SET_PMK.request" resource="SIGNAL">
+ <field name="PMK">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PNO_LIST.confirm" name="MLME_SET_PNO_LIST.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_PNO_LIST.request" name="MLME_SET_PNO_LIST.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ROAMING_TYPE.confirm" name="MLME_SET_ROAMING_TYPE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_ROAMING_TYPE.request" name="MLME_SET_ROAMING_TYPE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Roaming_Type">
+ <type>Roaming_Type</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_TRAFFIC_PARAMETERS.confirm" name="MLME_SET_TRAFFIC_PARAMETERS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_TRAFFIC_PARAMETERS.request" name="MLME_SET_TRAFFIC_PARAMETERS.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="User_Priority">
+ <type>Priority</type>
+ </field>
+ <field name="Medium_Time">
+ <type>Natural16</type>
+ </field>
+ <field name="Minimum_Data_Rate">
+ <type>Rate</type>
+ </field>
+ <field name="Peer_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_WHITELIST_SSID.confirm" name="MLME_SET_WHITELIST_SSID.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SET_WHITELIST_SSID.request" name="MLME_SET_WHITELIST_SSID.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE2.response" name="MLME_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE3.indication" name="MLME_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE3.response" name="MLME_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.confirm" name="MLME_SPARE4.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.indication" name="MLME_SPARE4.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.request" name="MLME_SPARE4.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE4.response" name="MLME_SPARE4.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.confirm" name="MLME_SPARE5.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.indication" name="MLME_SPARE5.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE5.request" name="MLME_SPARE5.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE6.confirm" name="MLME_SPARE6.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SPARE6.request" name="MLME_SPARE6.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START.confirm" name="MLME_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START.request" name="MLME_START.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Beacon_Period">
+ <type>Time_Units</type>
+ </field>
+ <field name="DTIM_Period">
+ <type>Beacon_Periods</type>
+ </field>
+ <field name="Capability_Information">
+ <type>Capability_Information</type>
+ </field>
+ <field name="Authentication_Type">
+ <type>Authentication_Type</type>
+ </field>
+ <field name="Hidden_SSID">
+ <type>Hidden_Ssid</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START_LINK_STATISTICS.confirm" name="MLME_START_LINK_STATISTICS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_START_LINK_STATISTICS.request" name="MLME_START_LINK_STATISTICS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Mpdu_Size_Threshold">
+ <type>Natural16</type>
+ </field>
+ <field name="Aggressive_statistics_gathering_enabled">
+ <type>Boolean</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_STOP_LINK_STATISTICS.confirm" name="MLME_STOP_LINK_STATISTICS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_STOP_LINK_STATISTICS.request" name="MLME_STOP_LINK_STATISTICS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Statistics_Stop_Bitmap">
+ <type>StatsStop_Mask</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SYNCHRONISED.indication" name="MLME_SYNCHRONISED.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="RSSI">
+ <type>Decibels</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_SYNCHRONISED.response" name="MLME_SYNCHRONISED.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="BSSID">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_ACTION.confirm" name="MLME_TDLS_ACTION.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_ACTION.request" name="MLME_TDLS_ACTION.request" resource="SIGNAL">
+ <field name="Information_Elements">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="TDLS_Action">
+ <type>TDLS_Action</type>
+ </field>
+ <field name="Channel_Frequency">
+ <type>Channel_Frequency</type>
+ </field>
+ <field name="Channel_Information">
+ <type>Channel_Information</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_PEER.indication" name="MLME_TDLS_PEER.indication" resource="SIGNAL">
+ <field name="Frame">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_STA_Address">
+ <type>MAC_Address</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="TDLS_Event">
+ <type>TDLS_Event</type>
+ </field>
+ <field name="Reason_Code">
+ <type>Reason_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_TDLS_PEER.response" name="MLME_TDLS_PEER.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Peer_Index">
+ <type>Peer_Index</type>
+ </field>
+ <field name="TDLS_Event">
+ <type>TDLS_Event</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_UNSET_CHANNEL.confirm" name="MLME_UNSET_CHANNEL.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="MLME_UNSET_CHANNEL.request" name="MLME_UNSET_CHANNEL.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="Message_Type" resource="TYPE" size="16">
+ <value name="EAP_Message" value="0x0001"/>
+ <value name="EAPOL_Key_M123" value="0x0002"/>
+ <value name="EAPOL_Key_M4" value="0x0003"/>
+ <value name="ARP" value="0x0004"/>
+ <value name="DHCP" value="0x0005"/>
+ <value name="Neighbor_Discovery" value="0x0006"/>
+ <value name="WAI_Message" value="0x0007"/>
+ <value name="Any_Other" value="0x0008"/>
+ <value name="IEEE80211_Action" value="0x0010"/>
+ <value name="IEEE80211_Mgmt" value="0x0011"/>
+ </type>
+ <type name="Microseconds16" resource="TYPE" size="16"/>
+ <type name="Microseconds32" resource="TYPE" size="32"/>
+ <type name="Mode" resource="TYPE" size="16">
+ <value name="Source" value="0x0001"/>
+ <value name="Sink" value="0x0002"/>
+ <value name="Loopback" value="0x0003"/>
+ </type>
+ <type name="NANOperControl_Mask" resource="TYPE" size="16"/>
+ <type name="NANSDF_Mask" resource="TYPE" size="16"/>
+ <type name="NAN_Availability_Duration" resource="TYPE" size="8">
+ <value name="16ms" value="0x00"/>
+ <value name="32ms" value="0x01"/>
+ <value name="64ms" value="0x02"/>
+ </type>
+ <type name="NAN_Availability_Interval" resource="TYPE" size="32"/>
+ <type name="NAN_Operation_Control" resource="TYPE" size="16">
+ <value name="MAC_Address_Event" value="0x0002"/>
+ <value name="Start_Cluster_Event" value="0x0004"/>
+ <value name="Joined_Cluster_Event" value="0x0008"/>
+ </type>
+ <type name="NAN_SDF_Control" resource="TYPE" size="16">
+ <value name="Publish_End_Event" value="0x0001"/>
+ <value name="Subscribe_End_Event" value="0x0002"/>
+ <value name="Match_expired_Event" value="0x0004"/>
+ <value name="Received_FollowUp_Event" value="0x0008"/>
+ <value name="Followup_Transmit_Status" value="0x0010"/>
+ </type>
+ <type name="Natural16" resource="TYPE" size="16"/>
+ <type name="Natural32" resource="TYPE" size="32"/>
+ <type name="Natural8" resource="TYPE" size="8"/>
+ <type name="Packet_Filter_Mask" resource="TYPE" size="8"/>
+ <type abbr="PFM" name="Packet_Filter_Mode" resource="TYPE" size="8">
+ <value abbr="out" name="Opt_Out" value="0x01"/>
+ <value abbr="in" name="Opt_In" value="0x02"/>
+ <value abbr="outs" name="Opt_Out_Sleep" value="0x04"/>
+ <value abbr="ins" name="Opt_In_Sleep" value="0x08"/>
+ </type>
+ <type abbr="PID" name="Peer_Index" resource="TYPE" size="16"/>
+ <type name="Per_AC_Priority" resource="TYPE" size="4" subsidiary="true"/>
+ <type name="Picoseconds16" resource="TYPE" size="16"/>
+ <type name="Picoseconds32" resource="TYPE" size="32"/>
+ <type name="Pmalloc_Area" resource="TYPE" size="16">
+ <value name="Pmalloc_Stats" value="0x0000"/>
+ <value name="Pmalloc_Fsm_Stats" value="0x0001"/>
+ <value name="Hostio_Sig_Sizes" value="0x0002"/>
+ </type>
+ <type abbr="PMM" name="Power_Management_Mode" resource="TYPE" size="16">
+ <value name="Active_Mode" value="0x0000"/>
+ <value name="Power_Save" value="0x0001"/>
+ </type>
+ <type name="Primary_Channel_Position" resource="TYPE" size="8" subsidiary="true">
+ <!-- This definition must match the one in station_types.xml -->
+ <!-- For Primary channel in 40M we use: -->
+ <!-- p0 for: |***|___| -->
+ <!-- p1 for: |___|***| -->
+ <!-- For 20MHz channel in 80M we use: -->
+ <!-- p0 for: |***___|______| -->
+ <!-- p1 for: |___***|______| -->
+ <!-- p2 for: |______|***___| -->
+ <!-- p3 for: |______|___***| -->
+ <!-- For 20MHz channel in 160M we use: -->
+ <!-- p0 for: |***_________|____________| -->
+ <!-- p1 for: |___***______|____________| -->
+ <!-- p2 for: |______***___|____________| -->
+ <!-- p3 for: |_________***|____________| -->
+ <!-- p4 for: |____________|***_________| -->
+ <!-- p5 for: |____________|___***______| -->
+ <!-- p6 for: |____________|______***___| -->
+ <!-- p7 for: |____________|_________***| -->
+ <value name="p0" value="0x00"/>
+ <value name="p1" value="0x01"/>
+ <value name="p2" value="0x02"/>
+ <value name="p3" value="0x03"/>
+ <value name="p4" value="0x04"/>
+ <value name="p5" value="0x05"/>
+ <value name="p6" value="0x06"/>
+ <value name="p7" value="0x07"/>
+ <value name="Not_Applicable" value="0x08"/>
+ </type>
+ <type name="Priority" resource="TYPE" size="16">
+ <value abbr="u0" name="QoS_UP0" value="0x0000"/>
+ <value abbr="u1" name="QoS_UP1" value="0x0001"/>
+ <value abbr="u2" name="QoS_UP2" value="0x0002"/>
+ <value abbr="u3" name="QoS_UP3" value="0x0003"/>
+ <value abbr="u4" name="QoS_UP4" value="0x0004"/>
+ <value abbr="u5" name="QoS_UP5" value="0x0005"/>
+ <value abbr="u6" name="QoS_UP6" value="0x0006"/>
+ <value abbr="u7" name="QoS_UP7" value="0x0007"/>
+ <value abbr="co" name="Contention" value="0x8000"/>
+ </type>
+ <type name="Procedure_Type" resource="TYPE" size="16">
+ <value name="Unknown" value="0x0000"/>
+ <value name="Connection_Started" value="0x0001"/>
+ <value name="Device_Discovered" value="0x0002"/>
+ <value name="Roaming_Started" value="0x0003"/>
+ </type>
+ <type name="Process" resource="TYPE" size="12" subsidiary="true"/>
+ <type name="Process_Id" resource="TYPE" size="16">
+ <field name="Process">
+ <type>Process</type>
+ </field>
+ <field array="2" name="Sender_Bit">
+ <type>Sender_Bit</type>
+ </field>
+ <field name="Processor">
+ <type>Processor</type>
+ </field>
+ </type>
+ <type name="Processor" resource="TYPE" size="2" subsidiary="true">
+ <value name="Default" value="0x0"/>
+ <value name="ChipCPU" value="0x1"/>
+ <value name="HostCPU" value="0x3"/>
+ </type>
+ <type name="Protocol" resource="TYPE" size="16">
+ <value name="UDP" value="0x0001"/>
+ <value name="TCP" value="0x0002"/>
+ </type>
+ <type name="Purpose" resource="TYPE" size="16">
+ <value name="Beacon" value="0x0001"/>
+ <value name="Probe_Response" value="0x0002"/>
+ <value name="Association_Response" value="0x0004"/>
+ <value name="Local" value="0x0008"/>
+ <value name="Association_Request" value="0x0010"/>
+ <value name="Probe_Request" value="0x0020"/>
+ </type>
+ <type name="Purpose_Mask" resource="TYPE" size="16"/>
+ <type dvalue="RADIO_LOGGING.confirm" name="RADIO_LOGGING.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="RADIO_LOGGING.indication" name="RADIO_LOGGING.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Just to make sure we have received all data out of the chip -->
+ <field name="Sequence_Number">
+ <type>Natural32</type>
+ </field>
+ <!-- Whether more data will come -->
+ <field name="More_Data">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="RADIO_LOGGING.request" name="RADIO_LOGGING.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <!-- This field holds both the capture format and the capture source as follows:
+ <capture-format-31-to-16> <capture-source-15-to-0>
+ The radio Logging block can sample different parts of the transmit or receive
+ chain and the capture source will determine which part to sample.
+ The capture format defines the data format of captured data. -->
+ <field name="Logging_Source">
+ <type>Natural32</type>
+ </field>
+ <!-- This field selects the log frequency. Currently supported
+ 0 = 80 Mhz,
+ 1 = 40 MHz,
+ 2 = 20 MHz. -->
+ <field name="Logging_Frequency">
+ <type>Natural32</type>
+ </field>
+ <field name="Capture_stream">
+ <type>Natural32</type>
+ </field>
+ <!-- This field holds both the start and stop triggers as follows:
+ <start-trigger-31-to-16> <stop-trigger-15-to-0>
+ Triggers can be either hardware or software based.
+ Not all triggers are supported by all chips. -->
+ <field name="Trigger_Mode">
+ <type>Natural32</type>
+ </field>
+ <!-- Delay before or after trigger, depends on trigger mode.
+ Held in bottom 16 bits only. The units also depend on trigger mode -->
+ <field name="Delay">
+ <type>Natural32</type>
+ </field>
+ <!-- The size of the logging buffer to be allocated. -->
+ <field name="Buffer_Size">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="RTT_Bandwidth" resource="TYPE" size="16">
+ <value name="20MHz" value="0x0004"/>
+ <value name="40MHz" value="0x0008"/>
+ <value name="80MHz" value="0x0010"/>
+ <value name="160MHz" value="0x0020"/>
+ </type>
+ <type name="RTT_ID" resource="TYPE" size="16"/>
+ <type name="RTT_Preamble" resource="TYPE" size="16">
+ <value name="Legacy" value="0x0001"/>
+ <value name="HT" value="0x0002"/>
+ <value name="VHT" value="0x0004"/>
+ </type>
+ <type name="RTT_Status" resource="TYPE" size="16">
+ <value name="Success" value="0x0000"/>
+ <value name="Unspecified_failure" value="0x0001"/>
+ <value name="Fail_No_Response" value="0x0002"/>
+ <value name="Fail_Rejected" value="0x0003"/>
+ <value name="Fail_Not_Scheduled" value="0x0004"/>
+ <value name="Fail_Timeout" value="0x0005"/>
+ <value name="Fail_Incorrect_channel" value="0x0006"/>
+ <value name="Fail_FTM_Not_Supported" value="0x0007"/>
+ <value name="Fail_Measurement_Aborted" value="0x0008"/>
+ <value name="Fail_Invalid_Time_Stamp" value="0x0009"/>
+ <value name="Fail_No_FTM_Received" value="0x000a"/>
+ <value name="Fail_Burst_Not_Scheduled" value="0x000b"/>
+ <value name="Fail_Busy_try_later" value="0x000c"/>
+ <value name="Fail_Invalid_request" value="0x000d"/>
+ <value name="Fail_FTM_Parameter_Override" value="0x000f"/>
+ </type>
+ <type name="RTT_Type" resource="TYPE" size="16">
+ <value name="One_sided" value="0x0001"/>
+ <value name="Two_sided" value="0x0002"/>
+ </type>
+ <type flags="true" name="Radio_Bitmap" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="radio_0" value="0x0001"/>
+ <value name="radio_1" value="0x0002"/>
+ </type>
+ <type name="Ranging_Ind_Type" resource="TYPE" size="16">
+ <value name="Continuous_Indication" value="0x0001"/>
+ <value name="Ingress" value="0x0002"/>
+ <value name="Egress" value="0x0004"/>
+ </type>
+ <type name="Rate" resource="TYPE" size="16">
+ <field name="HT">
+ <type>HT</type>
+ </field>
+ <field name="Short_Preamble">
+ <type>Usage</type>
+ </field>
+ <field name="LDPC">
+ <type>Usage</type>
+ </field>
+ <field name="STBC">
+ <type>Usage</type>
+ </field>
+ <field name="Bandwidth">
+ <type>Bandwidth</type>
+ </field>
+ <field name="Short_GI">
+ <type>Usage</type>
+ </field>
+ <field name="Greenfield">
+ <type>Usage</type>
+ </field>
+ <field name="Rate_Value">
+ <type>Rate_Value</type>
+ </field>
+ </type>
+ <type name="Rate_Value" resource="TYPE" size="7" subsidiary="true"/>
+ <type name="Rates_List" resource="TYPE">
+ <!-- "num_rates" rates of interest in the rates array, encoded as in Data_Rate. -->
+ <field hidden="true" name="num_rates">
+ <type>uint16</type>
+ </field>
+ <field blocklength="num_rates" name="rates">
+ <type>Data_Rate</type>
+ </field>
+ </type>
+ <type name="Raw_Power" resource="TYPE" signed="true" size="16"/>
+ <type name="Reason_Code" resource="TYPE" size="16">
+ <value name="Reserved" value="0x0000"/>
+ <value name="Unspecified_Reason" value="0x0001"/>
+ <value name="Deauthenticated_Invalid_authentication" value="0x0002"/>
+ <value name="Deauthenticated_Leaving" value="0x0003"/>
+ <value name="Deauthenticated_no_more_stations" value="0x0005"/>
+ <value name="Deauthenticated_invalid_class_2_frame" value="0x0006"/>
+ <value name="Deauthenticated_invalid_class_3_frame" value="0x0007"/>
+ <value name="Deauthenticated_Reason_invalid_IE" value="0x000d"/>
+ <value name="Deauthenticated_4_Way_Handshake_Timeout" value="0x000f"/>
+ <value name="Deauthenticated_Group_ Handshake_Timeout" value="0x0010"/>
+ <value name="Deauthenticated_Handshake_Element_Mismatch" value="0x0011"/>
+ <value name="Deauthenticated_Reason_Invalid_RSNE" value="0x0014"/>
+ <value name="Deauthenticated_802_1_X_Auth_Failed" value="0x0017"/>
+ <value name="TDLS_Peer_Unreachable" value="0x0019"/>
+ <value name="TDLS_Teardown_Unspecified_Reason" value="0x001a"/>
+ <value name="QoS_Unspecified_Reason" value="0x0020"/>
+ <value name="QoS_Excessive_Not_Ack" value="0x0022"/>
+ <value name="QoS_TXOP_Limit_Exceeded" value="0x0023"/>
+ <value name="QSTA_Leaving" value="0x0024"/>
+ <value name="End" value="0x0025"/>
+ <value name="Unknown" value="0x0026"/>
+ <value name="Timeout" value="0x0027"/>
+ <value name="Keep_Alive_Failure" value="0x0028"/>
+ <value name="Start" value="0x0029"/>
+ <value name="Deauthenticated_Reason_invalid_PMKID" value="0x0031"/>
+ <value name="Invalid_Pmkid" value="0x0049"/>
+ <value name="Synchronisation_Loss" value="0x8003"/>
+ <value name="Security_Required" value="0x8004"/>
+ <value name="Roaming_failure_link_loss_no_candidate" value="0x8005"/>
+ <value name="Hotspot_max_client_reached" value="0x8006"/>
+ <value name="Channel_Switch_Failure" value="0x8007"/>
+ <value name="Reporting_Aborted_Scanning" value="0x8008"/>
+ <value name="Reporting_Aborted_Roaming" value="0x8009"/>
+ <value name="NAN_Service_Terminated_Timeout" value="0x9001"/>
+ <value name="NAN_Service_Terminated_User_Request" value="0x9002"/>
+ <value name="NAN_Service_Terminated_Count_Reached" value="0x9003"/>
+ <value name="NAN_Service_Terminated_Discovery_Shutdown" value="0x9004"/>
+ <value name="NAN_Transmit_Followup_Success" value="0x9006"/>
+ <value name="NAN_Transmit_Followup_Failure" value="0x9007"/>
+ <value name="NDP_Accepted" value="0x9008"/>
+ <value name="NDP_Rejected" value="0x9009"/>
+ </type>
+ <type name="Report_Mode" resource="TYPE" size="16">
+ <value name="Reserved" value="0x0001"/>
+ <!-- Buffer_full is deprecated-->
+ <value name="End_of_Scan_cycle" value="0x0002"/>
+ <value name="Real_Time" value="0x0004"/>
+ <value name="No_Batch" value="0x0008"/>
+ </type>
+ <type abbr="RC" name="Result_Code" resource="TYPE" size="16">
+ <value name="Success" value="0x0000"/>
+ <value name="Unspecified_Failure" value="0x0001"/>
+ <value name="Invalid_Parameters" value="0x0026"/>
+ <value name="Rejected_Invalid_IE" value="0x0028"/>
+ <value name="Not_Allowed" value="0x0030"/>
+ <value name="Not_Present" value="0x0031"/>
+ <value name="Transmission_Failure" value="0x004f"/>
+ <value name="Too_Many_Simultaneous_Requests" value="0x8001"/>
+ <value name="BSS_Already_Started_Or_Joined" value="0x8002"/>
+ <value name="Not_Supported" value="0x8003"/>
+ <value name="Invalid_State" value="0x8004"/>
+ <value name="Insufficient_Resource" value="0x8006"/>
+ <value name="Invalid_Virtual_Interface_Index" value="0x800a"/>
+ <value name="Host_Request_Success" value="0x800b"/>
+ <value name="Host_Request_Failed" value="0x800c"/>
+ <value name="Invalid_Frequency" value="0x800e"/>
+ <value name="Probe_Timeout" value="0x800f"/>
+ <value name="Auth_Timeout" value="0x8010"/>
+ <value name="Assoc_Timeout" value="0x8011"/>
+ <value name="Assoc_Abort" value="0x8012"/>
+ <value name="Auth_No_Ack" value="0x8013"/>
+ <value name="Assoc_No_Ack" value="0x8014"/>
+ <value name="Auth_Failed_Code" value="0x8100"/>
+ <value name="Assoc_Failed_Code" value="0x8200"/>
+ <value name="Invalid_TLV_Value" value="0x9000"/>
+ <value name="NAN_Protocol_Failure" value="0x9001"/>
+ <value name="NAN_Invalid_Session_ID" value="0x9002"/>
+ <value name="NAN_Invalid_Requestor_Instance_ID" value="0x9003"/>
+ <value name="Unsupported_Concurrency" value="0x9004"/>
+ <value name="NAN_Invalid_NDP_ID" value="0x9005"/>
+ <value name="NAN_Invalid_Match_ID" value="0x9006"/>
+ <value name="NAN_No_OTA_Ack" value="0x9007"/>
+ <value name="NAN_Invalid_Availability" value="0x9008"/>
+ <value name="NAN_Immutable_Unacceptable" value="0x9009"/>
+ <value name="NAN_Rejected_Security_Policy" value="0x900a"/>
+ <value name="NDP_Rejected" value="0x900b"/>
+ <value name="NDL_Unacceptable" value="0x900c"/>
+ <value name="NDL_Failed_Schedule" value="0x900d"/>
+ </type>
+ <type name="Roaming_Type" resource="TYPE" size="16">
+ <value name="Legacy" value="0x0000"/>
+ <value name="NCHO" value="0x0001"/>
+ </type>
+ <type name="Rule_Flag" resource="TYPE" size="16">
+ <value name="NO_IR" value="0x0001"/>
+ <value name="DFS" value="0x0002"/>
+ <value name="NO_OFDM" value="0x0004"/>
+ <value name="NO_INDOOR" value="0x0008"/>
+ <value name="NO_OUTDOOR" value="0x0010"/>
+ </type>
+ <type flags="true" name="Rx_Start_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="scan_channel" value="0x0001"/>
+ <value name="filtering" value="0x0002"/>
+ <!-- Setting the 'beamforming' flag will automaticaly set the 'ack' flag too,
+ as we need to use the transmitter. -->
+ <value name="beamforming" value="0x0004"/>
+ <!-- The radio is normally turned on for Rx only. However, if the 'ack' flag
+ is set it will be turned on for Tx as well. This allows unicast MPDUs
+ to be acked. -->
+ <value name="ack" value="0x0008"/>
+ <value name="lp_mode" value="0x0010"/>
+ <value name="chan_rssi" value="0x0020"/>
+ <value name="disable_external_lna" value="0x0040"/>
+ </type>
+ <type name="Scan_Id" resource="TYPE" size="16"/>
+ <type name="Scan_Policy" resource="TYPE" size="8">
+ <value name="Passive" value="0x01"/>
+ <value name="Test_Mode" value="0x02"/>
+ <value name="Any_RA" value="0x04"/>
+ <value name="2_4GHz" value="0x08"/>
+ <value name="5GHz" value="0x10"/>
+ <value name="Non_DFS" value="0x20"/>
+ <value name="DFS" value="0x40"/>
+ <value name="On_Channel" value="0x80"/>
+ </type>
+ <type name="Scan_Type" resource="TYPE" size="16">
+ <value name="Initial_Scan" value="0x0001"/>
+ <value name="Full_Scan" value="0x0002"/>
+ <value name="Scheduled_Scan" value="0x0003"/>
+ <value name="P2P_Scan_Full" value="0x0004"/>
+ <value name="P2P_Scan_Social" value="0x0005"/>
+ <value name="OBSS_Scan" value="0x0006"/>
+ <value name="AP_Auto_Channel_Selection" value="0x0007"/>
+ <value name="GScan" value="0x0009"/>
+ <!-- FW internal values -->
+ <value name="Measurement_Scan" value="0x000a"/>
+ <value name="Soft_Cached_Roaming_Scan" value="0x000b"/>
+ <value name="Soft_All_Roaming_Scan" value="0x000c"/>
+ <value name="Hard_Cached_Roaming_Scan" value="0x000d"/>
+ <value name="Hard_All_Roaming_Scan" value="0x000e"/>
+ <value name="OBSS_Scan_Internal" value="0x000f"/>
+ <value name="NAN_Scan" value="0x0010"/>
+ <value name="FTM_Neighbour_Scan" value="0x0011"/>
+ <value name="First_Illegal" value="0x0012"/>
+ </type>
+ <type name="Sender_Bit" resource="TYPE" size="1" subsidiary="true"/>
+ <type name="Sequence_Number" resource="TYPE" size="16">
+ <field name="TDLS">
+ <type>Usage</type>
+ </field>
+ <field array="3" name="Zero_Bit">
+ <type>Zero_Bit</type>
+ </field>
+ <field name="Sequence_Number_Value">
+ <type>Sequence_Number_Value</type>
+ </field>
+ </type>
+ <type name="Sequence_Number_Value" resource="TYPE" size="12" subsidiary="true"/>
+ <type abbr="Sig" name="Signal_Id" resource="TYPE" size="16">
+ <value name="MA_UNITDATA.request" value="0x1000"/>
+ <value name="MA_SPARE1.request" value="0x1002"/>
+ <value name="MA_SPARE2.request" value="0x1003"/>
+ <value name="MA_SPARE3.request" value="0x1004"/>
+ <value name="MA_UNITDATA.confirm" value="0x1100"/>
+ <value name="MA_SPARE1.confirm" value="0x1102"/>
+ <value name="MA_SPARE2.confirm" value="0x1103"/>
+ <value name="MA_SPARE3.confirm" value="0x1104"/>
+ <value name="MA_SPARE1.response" value="0x1200"/>
+ <value name="MA_SPARE2.response" value="0x1201"/>
+ <value name="MA_SPARE3.response" value="0x1202"/>
+ <value name="MA_UNITDATA.indication" value="0x1300"/>
+ <value name="MA_BLOCKACK.indication" value="0x1301"/>
+ <value name="MA_SPARE1.indication" value="0x1302"/>
+ <value name="MA_SPARE2.indication" value="0x1303"/>
+ <value name="MA_SPARE3.indication" value="0x1304"/>
+ <value name="MLME_GET.request" value="0x2001"/>
+ <value name="MLME_SET.request" value="0x2002"/>
+ <value name="MLME_POWERMGT.request" value="0x2003"/>
+ <value name="MLME_ADD_INFO_ELEMENTS.request" value="0x2004"/>
+ <value name="MLME_ADD_SCAN.request" value="0x2005"/>
+ <value name="MLME_DEL_SCAN.request" value="0x2006"/>
+ <value name="MLME_ADD_VIF.request" value="0x2007"/>
+ <value name="MLME_DEL_VIF.request" value="0x2008"/>
+ <value name="MLME_START.request" value="0x2009"/>
+ <value name="MLME_SET_CHANNEL.request" value="0x200a"/>
+ <value name="MLME_CONNECT.request" value="0x200b"/>
+ <value name="MLME_REASSOCIATE.request" value="0x200c"/>
+ <value name="MLME_ROAM.request" value="0x200d"/>
+ <value name="MLME_DISCONNECT.request" value="0x200e"/>
+ <value name="MLME_REGISTER_ACTION_FRAME.request" value="0x200f"/>
+ <value name="MLME_SEND_FRAME.request" value="0x2010"/>
+ <value name="MLME_RESET_DWELL_TIME.request" value="0x2011"/>
+ <value name="MLME_SET_TRAFFIC_PARAMETERS.request" value="0x2012"/>
+ <value name="MLME_DEL_TRAFFIC_PARAMETERS.request" value="0x2013"/>
+ <value name="MLME_SET_PACKET_FILTER.request" value="0x2014"/>
+ <value name="MLME_SET_IP_ADDRESS.request" value="0x2015"/>
+ <value name="MLME_SET_ACL.request" value="0x2016"/>
+ <value name="MLME_SETKEYS.request" value="0x2018"/>
+ <value name="MLME_GET_KEY_SEQUENCE.request" value="0x201a"/>
+ <value name="MLME_SET_PMK.request" value="0x201c"/>
+ <value name="MLME_SET_CACHED_CHANNELS.request" value="0x201f"/>
+ <value name="MLME_SET_WHITELIST_SSID.request" value="0x2020"/>
+ <value name="MLME_TDLS_ACTION.request" value="0x2021"/>
+ <value name="MLME_CHANNEL_SWITCH.request" value="0x2022"/>
+ <value name="MLME_MONITOR_RSSI.request" value="0x2023"/>
+ <value name="MLME_START_LINK_STATISTICS.request" value="0x2024"/>
+ <value name="MLME_STOP_LINK_STATISTICS.request" value="0x2025"/>
+ <value name="MLME_SET_PNO_LIST.request" value="0x2027"/>
+ <value name="MLME_HOST_STATE.request" value="0x2028"/>
+ <value name="MLME_ADD_RANGE.request" value="0x2029"/>
+ <value name="MLME_DEL_RANGE.request" value="0x202a"/>
+ <value name="MLME_SET_NOA.request" value="0x202b"/>
+ <value name="MLME_SET_CTWINDOW.request" value="0x202c"/>
+ <value name="MLME_NAN_START.request" value="0x202d"/>
+ <value name="MLME_NAN_CONFIG.request" value="0x202e"/>
+ <value name="MLME_NAN_PUBLISH.request" value="0x202f"/>
+ <value name="MLME_NAN_SUBSCRIBE.request" value="0x2030"/>
+ <value name="MLME_NAN_FOLLOWUP.request" value="0x2031"/>
+ <value name="MLME_UNSET_CHANNEL.request" value="0x2032"/>
+ <value name="MLME_SET_COUNTRY.request" value="0x2033"/>
+ <value name="MLME_FORWARD_BEACON.request" value="0x2034"/>
+ <value name="MLME_NDP_REQUEST.request" value="0x2035"/>
+ <value name="MLME_NDP_RESPONSE.request" value="0x2036"/>
+ <value name="MLME_NDP_TERMINATE.request" value="0x2037"/>
+ <value name="MLME_SPARE4.request" value="0x203a"/>
+ <value name="MLME_SPARE5.request" value="0x203b"/>
+ <value name="MLME_SPARE6.request" value="0x203c"/>
+ <value name="MLME_INSTALL_APF.request" value="0x203d"/>
+ <value name="MLME_READ_APF.request" value="0x203e"/>
+ <value name="MLME_SET_NUM_ANTENNAS.request" value="0x203f"/>
+ <value name="MLME_ARP_DETECT.request" value="0x2040"/>
+ <value name="MLME_SET_ROAMING_TYPE.request" value="0x2041"/>
+ <value name="MLME_SET_BAND.request" value="0x2042"/>
+ <value name="MLME_GET.confirm" value="0x2101"/>
+ <value name="MLME_SET.confirm" value="0x2102"/>
+ <value name="MLME_POWERMGT.confirm" value="0x2103"/>
+ <value name="MLME_ADD_INFO_ELEMENTS.confirm" value="0x2104"/>
+ <value name="MLME_ADD_SCAN.confirm" value="0x2105"/>
+ <value name="MLME_DEL_SCAN.confirm" value="0x2106"/>
+ <value name="MLME_ADD_VIF.confirm" value="0x2107"/>
+ <value name="MLME_DEL_VIF.confirm" value="0x2108"/>
+ <value name="MLME_START.confirm" value="0x2109"/>
+ <value name="MLME_SET_CHANNEL.confirm" value="0x210a"/>
+ <value name="MLME_CONNECT.confirm" value="0x210b"/>
+ <value name="MLME_REASSOCIATE.confirm" value="0x210c"/>
+ <value name="MLME_ROAM.confirm" value="0x210d"/>
+ <value name="MLME_DISCONNECT.confirm" value="0x210e"/>
+ <value name="MLME_REGISTER_ACTION_FRAME.confirm" value="0x210f"/>
+ <value name="MLME_SEND_FRAME.confirm" value="0x2110"/>
+ <value name="MLME_RESET_DWELL_TIME.confirm" value="0x2111"/>
+ <value name="MLME_SET_TRAFFIC_PARAMETERS.confirm" value="0x2112"/>
+ <value name="MLME_DEL_TRAFFIC_PARAMETERS.confirm" value="0x2113"/>
+ <value name="MLME_SET_PACKET_FILTER.confirm" value="0x2114"/>
+ <value name="MLME_SET_IP_ADDRESS.confirm" value="0x2115"/>
+ <value name="MLME_SET_ACL.confirm" value="0x2116"/>
+ <value name="MLME_SETKEYS.confirm" value="0x2118"/>
+ <value name="MLME_GET_KEY_SEQUENCE.confirm" value="0x211a"/>
+ <value name="MLME_SET_PMK.confirm" value="0x211c"/>
+ <value name="MLME_SET_CACHED_CHANNELS.confirm" value="0x211f"/>
+ <value name="MLME_SET_WHITELIST_SSID.confirm" value="0x2120"/>
+ <value name="MLME_TDLS_ACTION.confirm" value="0x2121"/>
+ <value name="MLME_CHANNEL_SWITCH.confirm" value="0x2122"/>
+ <value name="MLME_MONITOR_RSSI.confirm" value="0x2123"/>
+ <value name="MLME_START_LINK_STATISTICS.confirm" value="0x2124"/>
+ <value name="MLME_STOP_LINK_STATISTICS.confirm" value="0x2125"/>
+ <value name="MLME_SET_PNO_LIST.confirm" value="0x2127"/>
+ <value name="MLME_HOST_STATE.confirm" value="0x2128"/>
+ <value name="MLME_ADD_RANGE.confirm" value="0x2129"/>
+ <value name="MLME_DEL_RANGE.confirm" value="0x212a"/>
+ <value name="MLME_SET_NOA.confirm" value="0x212b"/>
+ <value name="MLME_SET_CTWINDOW.confirm" value="0x212c"/>
+ <value name="MLME_NAN_START.confirm" value="0x212d"/>
+ <value name="MLME_NAN_CONFIG.confirm" value="0x212e"/>
+ <value name="MLME_NAN_PUBLISH.confirm" value="0x212f"/>
+ <value name="MLME_NAN_SUBSCRIBE.confirm" value="0x2130"/>
+ <value name="MLME_NAN_FOLLOWUP.confirm" value="0x2131"/>
+ <value name="MLME_UNSET_CHANNEL.confirm" value="0x2132"/>
+ <value name="MLME_SET_COUNTRY.confirm" value="0x2133"/>
+ <value name="MLME_FORWARD_BEACON.confirm" value="0x2134"/>
+ <value name="MLME_NDP_REQUEST.confirm" value="0x2135"/>
+ <value name="MLME_NDP_RESPONSE.confirm" value="0x2136"/>
+ <value name="MLME_NDP_TERMINATE.confirm" value="0x2137"/>
+ <value name="MLME_SPARE4.confirm" value="0x213a"/>
+ <value name="MLME_SPARE5.confirm" value="0x213b"/>
+ <value name="MLME_SPARE6.confirm" value="0x213c"/>
+ <value name="MLME_INSTALL_APF.confirm" value="0x213d"/>
+ <value name="MLME_READ_APF.confirm" value="0x213e"/>
+ <value name="MLME_SET_NUM_ANTENNAS.confirm" value="0x213f"/>
+ <value name="MLME_ARP_DETECT.confirm" value="0x2140"/>
+ <value name="MLME_SET_ROAMING_TYPE.confirm" value="0x2141"/>
+ <value name="MLME_SET_BAND.confirm" value="0x2142"/>
+ <value name="MLME_CONNECT.response" value="0x2200"/>
+ <value name="MLME_CONNECTED.response" value="0x2201"/>
+ <value name="MLME_REASSOCIATE.response" value="0x2202"/>
+ <value name="MLME_ROAMED.response" value="0x2203"/>
+ <value name="MLME_TDLS_PEER.response" value="0x2204"/>
+ <value name="MLME_SYNCHRONISED.response" value="0x2205"/>
+ <value name="MLME_SPARE2.response" value="0x2206"/>
+ <value name="MLME_SPARE3.response" value="0x2207"/>
+ <value name="MLME_SPARE4.response" value="0x2208"/>
+ <value name="MLME_SCAN.indication" value="0x2300"/>
+ <value name="MLME_SCAN_DONE.indication" value="0x2301"/>
+ <value name="MLME_LISTEN_END.indication" value="0x2302"/>
+ <value name="MLME_CONNECT.indication" value="0x2303"/>
+ <value name="MLME_CONNECTED.indication" value="0x2304"/>
+ <value name="MLME_REASSOCIATE.indication" value="0x2305"/>
+ <value name="MLME_ROAM.indication" value="0x2306"/>
+ <value name="MLME_ROAMED.indication" value="0x2307"/>
+ <value name="MLME_DISCONNECT.indication" value="0x2308"/>
+ <value name="MLME_DISCONNECTED.indication" value="0x2309"/>
+ <value name="MLME_PROCEDURE_STARTED.indication" value="0x230a"/>
+ <value name="MLME_MIC_FAILURE.indication" value="0x230b"/>
+ <value name="MLME_FRAME_TRANSMISSION.indication" value="0x230c"/>
+ <value name="MLME_RECEIVED_FRAME.indication" value="0x230d"/>
+ <value name="MLME_TDLS_PEER.indication" value="0x230f"/>
+ <value name="MLME_RSSI_REPORT.indication" value="0x2312"/>
+ <value name="MLME_AC_PRIORITY_UPDATE.indication" value="0x2313"/>
+ <value name="MLME_RANGE.indication" value="0x2314"/>
+ <value name="MLME_RANGE_DONE.indication" value="0x2315"/>
+ <value name="MLME_EVENT_LOG.indication" value="0x2316"/>
+ <value name="MLME_NAN_EVENT.indication" value="0x2317"/>
+ <value name="MLME_NAN_SERVICE.indication" value="0x2318"/>
+ <value name="MLME_NAN_FOLLOWUP.indication" value="0x2319"/>
+ <value name="MLME_CHANNEL_SWITCHED.indication" value="0x231a"/>
+ <value name="MLME_SYNCHRONISED.indication" value="0x231b"/>
+ <value name="MLME_BEACON_REPORTING_EVENT.indication" value="0x231c"/>
+ <value name="MLME_SPARE3.indication" value="0x231d"/>
+ <value name="MLME_SPARE4.indication" value="0x231e"/>
+ <value name="MLME_NDP_REQUEST.indication" value="0x231f"/>
+ <value name="MLME_NDP_REQUESTED.indication" value="0x2320"/>
+ <value name="MLME_NDP_RESPONSE.indication" value="0x2321"/>
+ <value name="MLME_NDP_TERMINATE.indication" value="0x2322"/>
+ <value name="MLME_NDP_TERMINATED.indication" value="0x2323"/>
+ <value name="MLME_SPARE5.indication" value="0x2324"/>
+ <value name="DEBUG_SPARE1.request" value="0x8000"/>
+ <value name="DEBUG_SPARE2.request" value="0x8001"/>
+ <value name="DEBUG_SPARE3.request" value="0x8002"/>
+ <value name="DEBUG_SPARE1.confirm" value="0x8100"/>
+ <value name="DEBUG_SPARE2.confirm" value="0x8101"/>
+ <value name="DEBUG_SPARE3.confirm" value="0x8102"/>
+ <value name="DEBUG_SPARE1.response" value="0x8200"/>
+ <value name="DEBUG_SPARE2.response" value="0x8201"/>
+ <value name="DEBUG_SPARE3.response" value="0x8202"/>
+ <value name="DEBUG_WORD12.indication" value="0x8301"/>
+ <value name="DEBUG_FAULT.indication" value="0x8302"/>
+ <value name="DEBUG_WORDS.indication" value="0x8303"/>
+ <value name="DEBUG_SPARE2.indication" value="0x8304"/>
+ <value name="DEBUG_SPARE3.indication" value="0x8305"/>
+ <value name="DEBUG_SPARE4.indication" value="0x8306"/>
+ <value name="TEST_BLOCK_REQUESTS.request" value="0x9000"/>
+ <value name="TEST_PANIC.request" value="0x9001"/>
+ <value name="TEST_SUSPEND.request" value="0x9002"/>
+ <value name="TEST_RESUME.request" value="0x9003"/>
+ <value name="RADIO_LOGGING.request" value="0x9004"/>
+ <value abbr="cw" name="WLANLITE_CW_START.request" value="0x9005"/>
+ <value abbr="cws" name="WLANLITE_CW_STOP.request" value="0x9006"/>
+ <value abbr="txset" name="WLANLITE_TX_SET_PARAMS.request" value="0x9007"/>
+ <value abbr="tx" name="WLANLITE_TX_START.request" value="0x9008"/>
+ <value abbr="txr" name="WLANLITE_TX_READ.request" value="0x9009"/>
+ <value abbr="txs" name="WLANLITE_TX_STOP.request" value="0x900a"/>
+ <value abbr="rx" name="WLANLITE_RX_START.request" value="0x900b"/>
+ <value abbr="rxr" name="WLANLITE_RX_READ.request" value="0x900c"/>
+ <value abbr="rxs" name="WLANLITE_RX_STOP.request" value="0x900d"/>
+ <value abbr="status" name="WLANLITE_STATUS.request" value="0x900e"/>
+ <value name="TEST_PMALLOC.request" value="0x900f"/>
+ <value name="TEST_CONFIGURE_MONITOR_MODE.request" value="0x9010"/>
+ <value name="TEST_CHECK_FW_ALIVE.request" value="0x9012"/>
+ <value abbr="dg" name="DEBUG_GENERIC.request" value="0x9013"/>
+ <value name="DEBUG_PKT_SINK_START.request" value="0x9014"/>
+ <value name="DEBUG_PKT_SINK_STOP.request" value="0x9015"/>
+ <value name="DEBUG_PKT_SINK_REPORT.request" value="0x9016"/>
+ <value name="DEBUG_PKT_GEN_START.request" value="0x9017"/>
+ <value name="DEBUG_PKT_GEN_STOP.request" value="0x9018"/>
+ <value name="DEBUG_PKT_GEN_REPORT.request" value="0x9019"/>
+ <value abbr="rs" name="WLANLITE_RADIO_SELECT.request" value="0x901a"/>
+ <value name="TEST_HIP_TESTER_START.request" value="0x901b"/>
+ <value name="TEST_HIP_TESTER_STOP.request" value="0x901c"/>
+ <value name="TEST_HIP_TESTER_SET_PARAMS.request" value="0x901d"/>
+ <value name="TEST_HIP_TESTER_REPORT.request" value="0x901e"/>
+ <value abbr="bgtxg" name="TEST_BIST_GET_TX_GAIN.request" value="0x901f"/>
+ <value name="TEST_SPARE1.request" value="0x9020"/>
+ <value name="TEST_SPARE2.request" value="0x9021"/>
+ <value name="TEST_SPARE3.request" value="0x9022"/>
+ <value name="RADIO_LOGGING.confirm" value="0x9100"/>
+ <value name="WLANLITE_CW_START.confirm" value="0x9101"/>
+ <value name="WLANLITE_TX_SET_PARAMS.confirm" value="0x9102"/>
+ <value name="WLANLITE_CW_STOP.confirm" value="0x9103"/>
+ <value name="WLANLITE_TX_START.confirm" value="0x9104"/>
+ <value name="WLANLITE_TX_READ.confirm" value="0x9105"/>
+ <value name="WLANLITE_TX_STOP.confirm" value="0x9106"/>
+ <value name="WLANLITE_RX_START.confirm" value="0x9107"/>
+ <value name="WLANLITE_RX_READ.confirm" value="0x9108"/>
+ <value name="WLANLITE_RX_STOP.confirm" value="0x9109"/>
+ <value name="WLANLITE_STATUS.confirm" value="0x910a"/>
+ <value name="TEST_PMALLOC.confirm" value="0x910b"/>
+ <value name="TEST_CONFIGURE_MONITOR_MODE.confirm" value="0x910c"/>
+ <value name="TEST_CHECK_FW_ALIVE.confirm" value="0x910e"/>
+ <value name="TEST_SUSPEND.confirm" value="0x910f"/>
+ <value name="TEST_RESUME.confirm" value="0x9110"/>
+ <value name="DEBUG_GENERIC.confirm" value="0x9111"/>
+ <value name="WLANLITE_RADIO_SELECT.confirm" value="0x9112"/>
+ <value name="TEST_HIP_TESTER_START.confirm" value="0x9113"/>
+ <value name="TEST_HIP_TESTER_STOP.confirm" value="0x9114"/>
+ <value name="TEST_HIP_TESTER_SET_PARAMS.confirm" value="0x9115"/>
+ <value name="TEST_BIST_GET_TX_GAIN.confirm" value="0x9116"/>
+ <value name="TEST_SPARE1.confirm" value="0x9117"/>
+ <value name="TEST_SPARE2.confirm" value="0x9118"/>
+ <value name="TEST_SPARE3.confirm" value="0x9119"/>
+ <value name="TEST_SPARE1.response" value="0x9200"/>
+ <value name="TEST_SPARE2.response" value="0x9201"/>
+ <value name="TEST_SPARE3.response" value="0x9202"/>
+ <value name="RADIO_LOGGING.indication" value="0x9300"/>
+ <value name="DEBUG_GENERIC.indication" value="0x9301"/>
+ <value name="DEBUG_PKT_SINK_REPORT.indication" value="0x9302"/>
+ <value name="DEBUG_PKT_GEN_REPORT.indication" value="0x9303"/>
+ <value name="TEST_HIP_TESTER_REPORT.indication" value="0x9304"/>
+ <value name="TEST_SPARE1.indication" value="0x9305"/>
+ <value name="TEST_SPARE2.indication" value="0x9306"/>
+ <value name="TEST_SPARE3.indication" value="0x9307"/>
+ </type>
+ <type name="Signal_Primitive" resource="PRIMITIVE">
+ <field name="Signal_Primitive_Header">
+ <type>Signal_Primitive_Header</type>
+ </field>
+ <field discriminant="&Signal_Primitive_Header.Signal_Id" name="Signal">
+ <resource>SIGNAL</resource>
+ </field>
+ </type>
+ <type name="Signal_Primitive_Header" resource="HEADER">
+ <field name="Signal_Id">
+ <type>Signal_Id</type>
+ </field>
+ <field default="0" name="Receiver_Process_Id" suppress="true">
+ <type>Process_Id</type>
+ </field>
+ <field default="0xc001" name="Sender_Process_Id" suppress="true">
+ <type>Process_Id</type>
+ </field>
+ </type>
+ <type name="Slot_Number" resource="TYPE" size="16" subsidiary="true"/>
+ <type name="StatsStop_Bitmap" resource="TYPE" size="16">
+ <value name="Stats_Radio" value="0x0001"/>
+ <value name="Stats_Radio_CCA" value="0x0002"/>
+ <value name="Stats_Radio_Channels" value="0x0004"/>
+ <value name="Stats_Radio_Scan" value="0x0008"/>
+ <value name="Stats_Iface" value="0x0010"/>
+ <value name="Stats_Iface_Txrate" value="0x0020"/>
+ <value name="Stats_Iface_AC" value="0x0040"/>
+ <value name="Stats_Iface_Contension" value="0x0080"/>
+ </type>
+ <type name="StatsStop_Mask" resource="TYPE" size="16"/>
+ <type name="TDLS_Action" resource="TYPE" size="16">
+ <value name="Discovery" value="0x0000"/>
+ <value name="Setup" value="0x0001"/>
+ <value name="Teardown" value="0x0002"/>
+ </type>
+ <type name="TDLS_Event" resource="TYPE" size="16">
+ <value name="Connected" value="0x0001"/>
+ <value name="Disconnected" value="0x0002"/>
+ <value name="Discovered" value="0x0003"/>
+ </type>
+ <type dvalue="TEST_BIST_GET_TX_GAIN.confirm" name="TEST_BIST_GET_TX_GAIN.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- Measured gain between TX, DPD Loopback and RX ABB using signal analyser -->
+ <field name="gain">
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_BIST_GET_TX_GAIN.request" name="TEST_BIST_GET_TX_GAIN.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="tx_gain">
+ <!-- How much gain to put in TX -->
+ <type>uint16</type>
+ </field>
+ <field name="rx_gain">
+ <!-- How much gain to put in RX -->
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_BLOCK_REQUESTS.request" name="TEST_BLOCK_REQUESTS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CHECK_FW_ALIVE.confirm" name="TEST_CHECK_FW_ALIVE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CHECK_FW_ALIVE.request" name="TEST_CHECK_FW_ALIVE.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CONFIGURE_MONITOR_MODE.confirm" name="TEST_CONFIGURE_MONITOR_MODE.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_CONFIGURE_MONITOR_MODE.request" name="TEST_CONFIGURE_MONITOR_MODE.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_REPORT.indication" name="TEST_HIP_TESTER_REPORT.indication" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Mbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Tester_Reserved_1">
+ <type>Natural32</type>
+ </field>
+ <field name="Tester_Reserved_2">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_REPORT.request" name="TEST_HIP_TESTER_REPORT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Report_Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_SET_PARAMS.confirm" name="TEST_HIP_TESTER_SET_PARAMS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_SET_PARAMS.request" name="TEST_HIP_TESTER_SET_PARAMS.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_START.confirm" name="TEST_HIP_TESTER_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_START.request" name="TEST_HIP_TESTER_START.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Mode">
+ <type>Mode</type>
+ </field>
+ <field name="End_Point">
+ <type>End_Point</type>
+ </field>
+ <field name="Protocol">
+ <type>Protocol</type>
+ </field>
+ <field name="Interval">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Packets_Per_Interval">
+ <type>Natural16</type>
+ </field>
+ <field name="Packets_Size">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_STOP.confirm" name="TEST_HIP_TESTER_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Duration">
+ <type>Microseconds32</type>
+ </field>
+ <field name="Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Failed_Count">
+ <type>Counter32</type>
+ </field>
+ <field name="Octets">
+ <type>Counter32</type>
+ </field>
+ <field name="Mbps">
+ <type>Natural32</type>
+ </field>
+ <field name="Idle_Ratio">
+ <type>Natural16</type>
+ </field>
+ <field name="Int_Latency">
+ <type>Natural16</type>
+ </field>
+ <field name="Tester_Reserved_1">
+ <type>Natural32</type>
+ </field>
+ <field name="Tester_Reserved_2">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_HIP_TESTER_STOP.request" name="TEST_HIP_TESTER_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Stream_ID">
+ <type>Natural16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PANIC.request" name="TEST_PANIC.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PMALLOC.confirm" name="TEST_PMALLOC.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_PMALLOC.request" name="TEST_PMALLOC.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Alloc_Area">
+ <type>Pmalloc_Area</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_RESUME.confirm" name="TEST_RESUME.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_RESUME.request" name="TEST_RESUME.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.confirm" name="TEST_SPARE1.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.indication" name="TEST_SPARE1.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.request" name="TEST_SPARE1.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE1.response" name="TEST_SPARE1.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.confirm" name="TEST_SPARE2.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.indication" name="TEST_SPARE2.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.request" name="TEST_SPARE2.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE2.response" name="TEST_SPARE2.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.confirm" name="TEST_SPARE3.confirm" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.indication" name="TEST_SPARE3.indication" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.request" name="TEST_SPARE3.request" resource="SIGNAL">
+ <field name="Data">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SPARE3.response" name="TEST_SPARE3.response" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SUSPEND.confirm" name="TEST_SUSPEND.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="TEST_SUSPEND.request" name="TEST_SUSPEND.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Virtual_Interface_Index">
+ <type>VIF_Index</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="TID" resource="TYPE" size="4" subsidiary="true"/>
+ <type name="TSF_Time" resource="TYPE" size="64"/>
+ <type name="Time_Units" resource="TYPE" size="16"/>
+ <type abbr="TX" name="Transmission_Status" resource="TYPE" size="16">
+ <value name="Successful" value="0x0000"/>
+ <value name="Retry_Limit" value="0x0001"/>
+ <value name="Tx_Lifetime" value="0x0002"/>
+ <value name="Excessive_Data_Length" value="0x0004"/>
+ <value name="No_BSS" value="0x0003"/>
+ <value name="Unavailable_Key_Mapping" value="0x0005"/>
+ <value name="Unspecified_failure" value="0x0006"/>
+ </type>
+ <type name="Tx_Data_Type" resource="TYPE" size="16">
+ <!-- Specify payload or frame content -->
+ <value name="data_word" value="0x0000"/>
+ <value name="data_random" value="0x0001"/>
+ </type>
+ <type name="Tx_HE_Mode" resource="TYPE" size="16">
+ <!-- 11ax HE mode -->
+ <value name="he_su" value="0x0000"/>
+ <value name="he_er_su" value="0x0001"/>
+ <value name="he_er_su_10mhz" value="0x0002"/>
+ <value name="he_mu_tb_standalone" value="0x0003"/>
+ <value name="he_mu_tb" value="0x0004"/>
+ </type>
+ <type flags="true" name="Tx_Read_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <value name="frame_counting" value="0x0001"/>
+ <value name="thermal_cutout" value="0x0002"/>
+ </type>
+ <type flags="true" name="Tx_Set_Params_Flags" resource="TYPE" size="16">
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ <!-- Set the 'ack' flag to wait for an ack after each frame(unicast MPDUs only) -->
+ <value name="ack" value="0x0001"/>
+ <value name="duplicate_80" value="0x0002"/>
+ <value name="duplicate_40" value="0x0004"/>
+ <value name="deafen_rx" value="0x0008"/>
+ <!-- Enable carrier sense -->
+ <value name="cs" value="0x0010"/>
+ <value name="scan_channel" value="0x0020"/>
+ <value name="short_preamble" value="0x0040"/>
+ <value name="disable_scrambler" value="0x0080"/>
+ <value name="ldpc" value="0x0100"/>
+ <value name="stbc" value="0x0200"/>
+ <value name="disable_spreader" value="0x0400"/>
+ <value name="greenfield_preamble" value="0x0800"/>
+ <value name="rx_low_power" value="0x1000"/>
+ <value name="ibss_frames" value="0x2000"/>
+ <!-- Setting the 'beamforming' flag will automaticaly set the 'ibss_frames' flag too,
+ as we need to specify MAC addresses. -->
+ <value name="beamforming" value="0x4000"/>
+ <value name="disable_external_lna" value="0x8000"/>
+ </type>
+ <type flags="true" name="Tx_Set_Params_Flags2" resource="TYPE" size="16">
+ <!-- enums are limited to 16 bits, so we use a 2nd flag field -->
+ <!-- These are bit combinations to be OR-d together -->
+ <value name="none" value="0x0000"/>
+ </type>
+ <type name="Type_Of_Air_Power" resource="TYPE" size="8" subsidiary="true">
+ <!-- Form of air power. This definition must be the same as the Air_Power_Type in station_types.xml -->
+ <value name="eirp" value="0x00"/>
+ <value name="tpo" value="0x01"/>
+ <value name="raw" value="0x02"/>
+ </type>
+ <type name="Usage" resource="TYPE" size="1" subsidiary="true">
+ <value name="Use" value="0x1"/>
+ <value name="No_Use" value="0x0"/>
+ </type>
+ <type name="VIF_Index" resource="TYPE" size="16"/>
+ <type name="VIF_Range" resource="TYPE" size="16">
+ <value name="VIF_Index_Min" value="0x0001"/>
+ <value name="VIF_Index_Max" value="0x000f"/>
+ </type>
+ <type name="VIF_Type" resource="TYPE" size="16">
+ <value name="Unsynchronised" value="0x0000"/>
+ <value name="Station" value="0x0002"/>
+ <value name="AP" value="0x0003"/>
+ <value name="Wlanlite" value="0x0004"/>
+ <value name="NAN" value="0x0005"/>
+ <value name="Discovery" value="0x0006"/>
+ <value name="Preconnect" value="0x0007"/>
+ <value name="Monitor" value="0x0010"/>
+ <!-- FW internal values -->
+ <value name="Scan" value="0x0020"/>
+ <value name="Offchannel" value="0x0021"/>
+ <value name="Range" value="0x0022"/>
+ </type>
+ <type dvalue="WLANLITE_CW_START.confirm" name="WLANLITE_CW_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_START.request" name="WLANLITE_CW_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="power">
+ <!-- Type of power and also the power in quarter dBm -->
+ <type>Air_Power</type>
+ </field>
+ <field name="flags">
+ <type>CW_Start_Flags</type>
+ </field>
+ <field name="type">
+ <type>CW_Type</type>
+ </field>
+ <field name="amplitude">
+ <type>uint16</type>
+ </field>
+ <field name="freq1">
+ <!-- Frequency offset in kHz(range +/-80000)-->
+ <type>int32</type>
+ </field>
+ <field name="freq2">
+ <!-- Frequency offset in kHz(range +/-80000)-->
+ <type>int32</type>
+ </field>
+ <field name="phase">
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_STOP.confirm" name="WLANLITE_CW_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_CW_STOP.request" name="WLANLITE_CW_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RADIO_SELECT.confirm" name="WLANLITE_RADIO_SELECT.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RADIO_SELECT.request" name="WLANLITE_RADIO_SELECT.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Radio_Bitmap">
+ <type>Radio_Bitmap</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_READ.confirm" name="WLANLITE_RX_READ.confirm" resource="SIGNAL">
+ <field bulktype="Counters_List" name="Counters_Data_Ref">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- Misc values read. (The rate counters are put in the bulk data due to size) -->
+ <field name="freq_offset_cur">
+ <type>int32</type>
+ </field>
+ <field name="freq_offset_avg">
+ <type>int32</type>
+ </field>
+ <field name="rssi_cur">
+ <type>int16</type>
+ </field>
+ <field name="rssi_avg">
+ <type>int16</type>
+ </field>
+ <field name="rssi_min">
+ <type>int16</type>
+ </field>
+ <field name="rssi_max">
+ <type>int16</type>
+ </field>
+ <field name="snr_cur">
+ <type>int16</type>
+ </field>
+ <field name="snr_avg">
+ <type>int16</type>
+ </field>
+ <field name="snr_min">
+ <type>int16</type>
+ </field>
+ <field name="snr_max">
+ <type>int16</type>
+ </field>
+ <field name="interval">
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_READ.request" name="WLANLITE_RX_READ.request" resource="SIGNAL">
+ <field bulktype="Rates_List" name="Rates_Data_Ref">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Rates to request counts for are held in bulk data due to size -->
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_START.confirm" name="WLANLITE_RX_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_START.request" name="WLANLITE_RX_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="channel_information">
+ <type>Channel_Info</type>
+ </field>
+ <field name="flags">
+ <type>Rx_Start_Flags</type>
+ </field>
+ <field name="mac_addr">
+ <!-- Defines the station MAC address. If the filtering flag is set,
+ unicast frames will be discarded if they don't match this address -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="0xfebefebefebe" name="bssid" suppress="true">
+ <!-- Only used if 'beamforming' flag set -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="1" name="aid" suppress="true">
+ <!-- Association ID, only used if 'beamforming' flag set -->
+ <type>uint16</type>
+ </field>
+ <field default="0" name="num_mpdus_per_ampdu" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field default="2" name="regulatory_domain" suppress="true">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_STOP.confirm" name="WLANLITE_RX_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_RX_STOP.request" name="WLANLITE_RX_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_STATUS.confirm" name="WLANLITE_STATUS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Device_State">
+ <type>Device_State</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_STATUS.request" name="WLANLITE_STATUS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_READ.confirm" name="WLANLITE_TX_READ.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <!-- data read -->
+ <field name="flags">
+ <type>Tx_Read_Flags</type>
+ </field>
+ <field name="ctr_frames_left_to_send">
+ <!-- Valid only if 'frame_counting' flag set -->
+ <type>uint32</type>
+ </field>
+ <field name="transmission_back_off">
+ <!-- Accumulated backoff time in microseconds since last read -->
+ <type>uint32</type>
+ </field>
+ <field name="wanted_power_target">
+ <type>Raw_Power</type>
+ </field>
+ <field name="final_power_target">
+ <type>Raw_Power</type>
+ </field>
+ <field name="oob_constraint">
+ <type>Raw_Power</type>
+ </field>
+ <field name="last_trim_pa_temperature">
+ <type>int16</type>
+ </field>
+ <field name="current_pa_temperature">
+ <type>int16</type>
+ </field>
+ <field name="last_trim_ambient_temperature">
+ <type>int16</type>
+ </field>
+ <field name="current_ambient_temperature">
+ <type>int16</type>
+ </field>
+ <field name="temp_power_adjust">
+ <type>Raw_Power</type>
+ </field>
+ <field name="ctr_frames_success">
+ <!-- Indicates number of frames successfully transmitted.
+ For unicast MPDUs with ack, indicates number of
+ frames that have been acked. -->
+ <type>uint32</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_READ.request" name="WLANLITE_TX_READ.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_SET_PARAMS.confirm" name="WLANLITE_TX_SET_PARAMS.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_SET_PARAMS.request" name="WLANLITE_TX_SET_PARAMS.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <!-- Separate from tx_start to allow key settings to be changed whilst the radio is switched on -->
+ <field name="freq">
+ <!-- Frequency in MHz -->
+ <type>uint16</type>
+ </field>
+ <field name="rate">
+ <type>Data_Rate</type>
+ </field>
+ <field name="channel_information">
+ <type>Channel_Info</type>
+ </field>
+ <field name="power">
+ <!-- Type of power and also the power in quarter dBm -->
+ <type>Air_Power</type>
+ </field>
+ <field name="length">
+ <!-- If 'ibss_frames' or 'beamforming' flags are set, specifies the payload length
+ in bytes. If a flag is not set, specifies the frame length in bytes not counting FCS. -->
+ <type>uint16</type>
+ </field>
+ <field name="interval">
+ <!-- Interval between adding an entry to the transmit queue in microseconds -->
+ <type>uint32</type>
+ </field>
+ <field name="flags">
+ <type>Tx_Set_Params_Flags</type>
+ </field>
+ <field default="1" name="aid" suppress="true">
+ <!-- Association ID, only used if 'beamforming' flag set -->
+ <type>uint16</type>
+ </field>
+ <field default="0x00ff" name="distance_to_band_edge_half_mhz" suppress="true">
+ <!-- This parameter is no longer supported -->
+ <type>uint16</type>
+ </field>
+ <field default="2" name="regulatory_domain" suppress="true">
+ <type>DFS_Regulatory</type>
+ </field>
+ <field default="0" name="flags2" suppress="true">
+ <type>Tx_Set_Params_Flags2</type>
+ </field>
+ <field default="0" name="he_mode" suppress="true">
+ <type>Tx_HE_Mode</type>
+ </field>
+ <field default="0" name="he_ru_allocation" suppress="true">
+ <!-- Applies to non-triggered multi-user(HE_MU) mode only.
+ Bits 0 to 6 specify the Resouce Unit(RU) allocation, as per a trigger frame.
+ Bit 7 specifies the 80 MHz channel(0 = primary, 1 = secondary) and applies
+ to 80+80/160 MHz channels only. -->
+ <type>uint8</type>
+ </field>
+ <field default="0" name="he_ltf" suppress="true">
+ <!-- Specifies the HE-LTF type(0 = auto select, 1 = x1, 2 = x2 and 4 = x4)
+ Note, only certain combinations of GI and HE-LTF are valid for a given HE mode. -->
+ <type>uint8</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_START.confirm" name="WLANLITE_TX_START.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_START.request" name="WLANLITE_TX_START.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="num_frames_to_send">
+ <type>uint32</type>
+ </field>
+ <field name="data_type">
+ <type>Tx_Data_Type</type>
+ </field>
+ <field name="data_param">
+ <type>uint16</type>
+ </field>
+ <field name="dest_addr">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field name="src_addr">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field name="bssid">
+ <!-- Only used if 'ibss_frames' or 'beamforming' flags set in tx_set_params -->
+ <type>MAC_Address</type>
+ </field>
+ <field default="0" name="num_mpdus_per_ampdu" suppress="true">
+ <type>uint16</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_STOP.confirm" name="WLANLITE_TX_STOP.confirm" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Result_Code">
+ <type>Result_Code</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type dvalue="WLANLITE_TX_STOP.request" name="WLANLITE_TX_STOP.request" resource="SIGNAL">
+ <field hidden="true" name="Data" suppress="true">
+ <type>Data_Reference</type>
+ </field>
+ <field name="Spare1" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare2" suppress="true">
+ <type>Natural32</type>
+ </field>
+ <field name="Spare3" suppress="true">
+ <type>Natural32</type>
+ </field>
+ </type>
+ <type name="Zero_Bit" resource="TYPE" size="1" subsidiary="true"/>
+ <type name="ePNO_Policy" resource="TYPE" size="16">
+ <value name="Hidden" value="0x0001"/>
+ <value name="A_Band" value="0x0002"/>
+ <value name="G_Band" value="0x0004"/>
+ <value name="Strict_Match" value="0x0008"/>
+ <value name="Same_Network" value="0x0010"/>
+ <value name="Auth_Open" value="0x0100"/>
+ <value name="Auth_PSK" value="0x0200"/>
+ <value name="Auth_EAPOL" value="0x0400"/>
+ </type>
+ <type name="hipVersions" resource="CONST" size="16">
+ <value name="TEST_SAP_VERSION" value="0x0e00"/>
+ <value name="TEST_SAP_ENG_VERSION" value="0x0013"/>
+ <value name="DATA_SAP_VERSION" value="0x0e01"/>
+ <value name="DATA_SAP_ENG_VERSION" value="0x0001"/>
+ <value name="DEBUG_SAP_VERSION" value="0x0d03"/>
+ <value name="DEBUG_SAP_ENG_VERSION" value="0x0001"/>
+ <value name="CONTROL_SAP_VERSION" value="0x0e03"/>
+ <value name="CONTROL_SAP_ENG_VERSION" value="0x000a"/>
+ </type>
+ <type name="int16" resource="TYPE" signed="true" size="16"/>
+ <type name="int32" resource="TYPE" signed="true" size="32"/>
+ <type name="uint16" resource="TYPE" size="16"/>
+ <type name="uint32" resource="TYPE" size="32"/>
+ <type name="uint8" resource="TYPE" size="8"/>
+</definitions>
--- /dev/null
+2019-11-29 11:41 lemandXXdXX_wlanlite_hardmac_ram_gcc_integrated univ3 498054414 adm-swbld@camspugrd169@e89799f1c2@HEAD (no branch)
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>
+<metadata_list xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="HydraMeta.xsd">
+ <metadata version="498054414" subsystem_name="wlan" subsystem_layer="fw" subsystem_id="2">
+ <source_control id="$Id$" time="$DateTime$" change="$Change$" author="$Author$" />
+ <enum_def enum_name="unifiCSROnlyMIBShield">
+ <enum_entry enum_label="open" enum_value="1" />
+ <enum_entry enum_label="warn" enum_value="2" />
+ <enum_entry enum_label="guard" enum_value="3" />
+ <enum_entry enum_label="alarm" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiExternalFastClockRequest">
+ <enum_entry enum_label="no_clock_request" enum_value="0" />
+ <enum_entry enum_label="totem_pole" enum_value="1" />
+ <enum_entry enum_label="inverted_totem_pole" enum_value="2" />
+ <enum_entry enum_label="open_drain" enum_value="3" />
+ <enum_entry enum_label="open_source" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiMLMEFaultReportLevel">
+ <enum_entry enum_label="none" enum_value="0" />
+ <enum_entry enum_label="detailed" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakeMode">
+ <enum_entry enum_label="wake_none" enum_value="1" />
+ <enum_entry enum_label="wake_pulse" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakePolarity">
+ <enum_entry enum_label="positive" enum_value="0" />
+ <enum_entry enum_label="negative" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiPioHostWakeZeal">
+ <enum_entry enum_label="wake_normal" enum_value="0" />
+ <enum_entry enum_label="wake_always" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiUartPios">
+ <enum_entry enum_label="no_pios" enum_value="1" />
+ <enum_entry enum_label="tx_rx_only" enum_value="2" />
+ <enum_entry enum_label="tx_rx_rts_cts" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRateStatsIndex">
+ <enum_entry enum_label="rate_1m" enum_value="1" />
+ <enum_entry enum_label="rate_2m" enum_value="2" />
+ <enum_entry enum_label="rate_5m5" enum_value="3" />
+ <enum_entry enum_label="rate_6m" enum_value="4" />
+ <enum_entry enum_label="rate_9m" enum_value="5" />
+ <enum_entry enum_label="rate_11m" enum_value="6" />
+ <enum_entry enum_label="rate_12m" enum_value="7" />
+ <enum_entry enum_label="rate_18m" enum_value="8" />
+ <enum_entry enum_label="rate_24m" enum_value="9" />
+ <enum_entry enum_label="rate_36m" enum_value="10" />
+ <enum_entry enum_label="rate_48m" enum_value="11" />
+ <enum_entry enum_label="rate_54m" enum_value="12" />
+ </enum_def>
+ <enum_def enum_name="unifiThroughputDebugIndex">
+ <enum_entry enum_label="no_ack_count" enum_value="1" />
+ <enum_entry enum_label="good_fcs_count" enum_value="2" />
+ <enum_entry enum_label="bad_fcs_count" enum_value="3" />
+ <enum_entry enum_label="missed_ba_count" enum_value="4" />
+ <enum_entry enum_label="missed_ack_count" enum_value="5" />
+ <enum_entry enum_label="ba_agg_below_quarter" enum_value="6" />
+ <enum_entry enum_label="ba_agg_above_quarter" enum_value="7" />
+ <enum_entry enum_label="mpdus_total_transmitted_on_air" enum_value="8" />
+ <enum_entry enum_label="mpdus_successfully_transmitted" enum_value="9" />
+ <enum_entry enum_label="mpdus_failed_transmit" enum_value="10" />
+ <enum_entry enum_label="laa_rate_decrease_counter" enum_value="11" />
+ <enum_entry enum_label="laa_rate_increase_counter" enum_value="12" />
+ <enum_entry enum_label="dplane_paused_counter" enum_value="13" />
+ <enum_entry enum_label="dplane_resumed_counter" enum_value="14" />
+ <enum_entry enum_label="rf_on_counter" enum_value="15" />
+ <enum_entry enum_label="rf_off_counter" enum_value="16" />
+ <enum_entry enum_label="dplp_free_resources_cb_counter" enum_value="17" />
+ <enum_entry enum_label="lowest_fh_resources" enum_value="18" />
+ <enum_entry enum_label="highest_th_resources" enum_value="19" />
+ <enum_entry enum_label="scan_started_counter" enum_value="20" />
+ <enum_entry enum_label="outstanding_fh_mbulk" enum_value="21" />
+ <enum_entry enum_label="outstanding_th_mbulk" enum_value="22" />
+ <enum_entry enum_label="cpu_usage" enum_value="23" />
+ <enum_entry enum_label="coex_collisions" enum_value="24" />
+ <enum_entry enum_label="mac_bad_sig_count" enum_value="25" />
+ <enum_entry enum_label="tx_under_flow" enum_value="26" />
+ <enum_entry enum_label="change_power_req_count" enum_value="27" />
+ <enum_entry enum_label="rx_mpdus_in_ampdus" enum_value="28" />
+ <enum_entry enum_label="rx_mpdus" enum_value="29" />
+ <enum_entry enum_label="rx_error_count" enum_value="30" />
+ <enum_entry enum_label="rx_ampdus" enum_value="31" />
+ <enum_entry enum_label="protection_error_count" enum_value="32" />
+ <enum_entry enum_label="ba_missed_cts_count" enum_value="33" />
+ <enum_entry enum_label="ppdu_tx" enum_value="34" />
+ <enum_entry enum_label="ba_received" enum_value="35" />
+ <enum_entry enum_label="ba_timeout" enum_value="36" />
+ <enum_entry enum_label="ba_aggregation_below_bursting" enum_value="37" />
+ <enum_entry enum_label="ba_aggregation_above_bursting" enum_value="38" />
+ <enum_entry enum_label="ba_aggregation_cannot_burst" enum_value="39" />
+ <enum_entry enum_label="ba_aggregation_can_burst" enum_value="40" />
+ <enum_entry enum_label="nanny_retrim_request_count" enum_value="41" />
+ <enum_entry enum_label="rx_ppdus_mu" enum_value="42" />
+ <enum_entry enum_label="rx_ppdus_su" enum_value="43" />
+ <enum_entry enum_label="ba_received_prot" enum_value="44" />
+ <enum_entry enum_label="ba_received_noprot" enum_value="45" />
+ <enum_entry enum_label="ba_missing_prot" enum_value="46" />
+ <enum_entry enum_label="ba_missing_noprot" enum_value="47" />
+ <enum_entry enum_label="mpdu_succ_prot" enum_value="48" />
+ <enum_entry enum_label="mpdu_succ_noprot" enum_value="49" />
+ <enum_entry enum_label="mpdu_fail_prot" enum_value="50" />
+ <enum_entry enum_label="mpdu_fail_noprot" enum_value="51" />
+ <enum_entry enum_label="mpdus_in_ampdus" enum_value="52" />
+ <!-- throughput_debug_index_last SHOULD be the last, and have same value as the last one above. -->
+ <enum_entry enum_label="throughput_debug_index_last" enum_value="52" />
+ </enum_def>
+ <enum_def enum_name="unifiReadHardwareCounterIndex">
+ <enum_entry enum_label="MAC_DOT11_FCS_ERROR_COUNT" enum_value="1" />
+ <enum_entry enum_label="MAC_DOT11_FCS_GOOD_COUNT" enum_value="2" />
+ <enum_entry enum_label="MAC_BAD_SIG_COUNT" enum_value="3" />
+ <enum_entry enum_label="MAC_TX_UNDER_COUNT" enum_value="4" />
+ <enum_entry enum_label="MAC_NO_ACK_COUNT" enum_value="5" />
+ <enum_entry enum_label="MAC_DOT11_RX_OCTETS_IN_AMPDUS" enum_value="6" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDUS_COUNT" enum_value="7" />
+ <enum_entry enum_label="MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT" enum_value="8" />
+ <!-- MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT exists only on Night and Sockeye. -->
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT" enum_value="9" />
+ <!-- MAC_DOT11_ERROR_COUNT exists only on Sockeye and Rock. -->
+ <enum_entry enum_label="MAC_DOT11_ERROR_COUNT" enum_value="10" />
+ <!-- MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT, MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT
+ and MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT exist only on Rock. -->
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_LEN_ERR_COUNT" enum_value="11" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_SPACING_ERR_COUNT" enum_value="12" />
+ <enum_entry enum_label="MAC_DOT11_RX_AMPDU_DELIM_SINGLE_ERR_COUNT" enum_value="13" />
+ <enum_entry enum_label="dphp_mac_acc_off" enum_value="14" />
+ <enum_entry enum_label="dphp_dynamic_restart" enum_value="15" />
+ <!-- lower_mac_index_last SHOULD be the last, and have same value as the last one above. -->
+ <enum_entry enum_label="lower_mac_index_last" enum_value="15" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioTXSettingsIndex">
+ <enum_entry enum_label="OFDM0_PRE_GAIN" enum_value="1" />
+ <enum_entry enum_label="OFDM1_PRE_GAIN" enum_value="2" />
+ <enum_entry enum_label="CCK_PRE_GAIN" enum_value="3" />
+ <enum_entry enum_label="TR_PRE_GAIN" enum_value="4" />
+ <enum_entry enum_label="OFDM0_FIR_GAIN" enum_value="5" />
+ <enum_entry enum_label="OFDM1_FIR_GAIN" enum_value="6" />
+ <enum_entry enum_label="CCK_FIR_GAIN" enum_value="7" />
+ <enum_entry enum_label="OFDM0_FW_BK_DELAY" enum_value="8" />
+ <enum_entry enum_label="OFDM0_RX_BB1" enum_value="9" />
+ <enum_entry enum_label="OFDM0_RX_BB2" enum_value="10" />
+ <enum_entry enum_label="LOOPBACK_ATTEN" enum_value="11" />
+ <enum_entry enum_label="OFDM0_FIR_COEFF" enum_value="12" />
+ <enum_entry enum_label="DRV_BIAS" enum_value="13" />
+ <enum_entry enum_label="PA_BIAS" enum_value="14" />
+ <enum_entry enum_label="CCK_V2I_GAIN" enum_value="15" />
+ <enum_entry enum_label="CCK_DRV_GAIN" enum_value="16" />
+ <enum_entry enum_label="CCK_MIX_GAIN" enum_value="17" />
+ <enum_entry enum_label="CCK_PA_GAIN" enum_value="18" />
+ <enum_entry enum_label="OFDM0_V2I_GAIN" enum_value="19" />
+ <enum_entry enum_label="OFDM0_DRV_GAIN" enum_value="20" />
+ <enum_entry enum_label="OFDM0_MIX_GAIN" enum_value="21" />
+ <enum_entry enum_label="OFDM0_PA_GAIN" enum_value="22" />
+ <enum_entry enum_label="OFDM1_V2I_GAIN" enum_value="23" />
+ <enum_entry enum_label="OFDM1_DRV_GAIN" enum_value="24" />
+ <enum_entry enum_label="OFDM1_MIX_GAIN" enum_value="25" />
+ <enum_entry enum_label="OFDM1_PA_GAIN" enum_value="26" />
+ <enum_entry enum_label="PAPR_EN" enum_value="27" />
+ <enum_entry enum_label="PAPR_THRESHOLD" enum_value="28" />
+ <enum_entry enum_label="MIX_FTRIM" enum_value="29" />
+ <enum_entry enum_label="DRV_FTRIM" enum_value="30" />
+ <enum_entry enum_label="PA_FTRIM" enum_value="31" />
+ <enum_entry enum_label="CCK_V2I_DCTRIM_I" enum_value="32" />
+ <enum_entry enum_label="CCK_V2I_DCTRIM_Q" enum_value="33" />
+ <enum_entry enum_label="OFDM0_V2I_DCTRIM_I" enum_value="34" />
+ <enum_entry enum_label="OFDM0_V2I_DCTRIM_Q" enum_value="35" />
+ <enum_entry enum_label="OFDM1_V2I_DCTRIM_I" enum_value="36" />
+ <enum_entry enum_label="OFDM1_V2I_DCTRIM_Q" enum_value="37" />
+ <enum_entry enum_label="MIX_DCTRIM_I" enum_value="38" />
+ <enum_entry enum_label="MIX_DCTRIM_Q" enum_value="39" />
+ <enum_entry enum_label="IMAGE_SCALE_I" enum_value="40" />
+ <enum_entry enum_label="IMAGE_SCALE_Q" enum_value="41" />
+ <enum_entry enum_label="IMAGE_PHASE_COMP" enum_value="42" />
+ <enum_entry enum_label="FREQ" enum_value="43" />
+ <enum_entry enum_label="BW" enum_value="44" />
+ <enum_entry enum_label="MODE" enum_value="45" />
+ <enum_entry enum_label="IS_SCAN" enum_value="46" />
+ <enum_entry enum_label="OFDM1_V2I_CARRIER_LEAKAGE_SA" enum_value="47" />
+ <enum_entry enum_label="OFDM0_ADAPT_QUALITY" enum_value="48" />
+ <enum_entry enum_label="OFDM1_ADAPT_QUALITY" enum_value="49" />
+ <enum_entry enum_label="CCK_ADAPT_QUALITY" enum_value="50" />
+ <!--><enum_entry enum_label="TR_ADAPT_QUALITY" enum_value="51" /><-->
+ <enum_entry enum_label="IMAGE_SCALE_SA" enum_value="52" />
+ <enum_entry enum_label="OFDM1_RX_BB1" enum_value="53" />
+ <enum_entry enum_label="OFDM1_RX_BB2" enum_value="54" />
+ <enum_entry enum_label="CCK_RX_BB1" enum_value="55" />
+ <enum_entry enum_label="CCK_RX_BB2" enum_value="56" />
+ <enum_entry enum_label="OFDM1_FW_BK_DELAY" enum_value="57" />
+ <enum_entry enum_label="CCK_FW_BK_DELAY" enum_value="58" />
+ <enum_entry enum_label="OFDM1_FIR_COEFF" enum_value="59" />
+ <enum_entry enum_label="CCK_FIR_COEFF" enum_value="60" />
+ <enum_entry enum_label="OFDM0_LOOPBACK_PHASE" enum_value="61" />
+ <enum_entry enum_label="OFDM1_LOOPBACK_PHASE" enum_value="62" />
+ <enum_entry enum_label="CCK_LOOPBACK_PHASE" enum_value="63" />
+ <enum_entry enum_label="TX_IQ_DELAY" enum_value="64" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioRXSettingsIndex">
+ <enum_entry enum_label="WL_RADIO_CHANNEL_STATUS" enum_value="1" />
+ <enum_entry enum_label="RX_DC_ADJUST" enum_value="2" />
+ <enum_entry enum_label="FD_RX_COMP" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRadioCCADebugTableIndex">
+ <enum_entry enum_label="GAIN_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="1" />
+ <enum_entry enum_label="RSSI_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="2" />
+ <enum_entry enum_label="GAIN_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="3" />
+ <enum_entry enum_label="RSSI_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="4" />
+ <enum_entry enum_label="GAIN_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="5" />
+ <enum_entry enum_label="RSSI_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="6" />
+ <enum_entry enum_label="GAIN_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="7" />
+ <enum_entry enum_label="RSSI_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="8" />
+ </enum_def>
+ <enum_def enum_name="unifiNarrowbandCCADebugTableIndex">
+ <enum_entry enum_label="CS_MODE" enum_value="1" />
+ <enum_entry enum_label="PRI_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="2" />
+ <enum_entry enum_label="SEC_THRESH_NORMAL_POWER_EXT_LNA_DISABLED" enum_value="3" />
+ <enum_entry enum_label="PRI_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="4" />
+ <enum_entry enum_label="SEC_THRESH_LOW_POWER_EXT_LNA_DISABLED" enum_value="5" />
+ <enum_entry enum_label="PRI_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="6" />
+ <enum_entry enum_label="SEC_THRESH_NORMAL_POWER_EXT_LNA_ENABLED" enum_value="7" />
+ <enum_entry enum_label="PRI_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="8" />
+ <enum_entry enum_label="SEC_THRESH_LOW_POWER_EXT_LNA_ENABLED" enum_value="9" />
+ </enum_def>
+ <enum_def enum_name="unifiEnabledTrims">
+ <enum_entry enum_label="TRIM_RX_ABB" enum_value="0x000000001" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_TX_ABB" enum_value="0x000000002" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_WBRSSI" enum_value="0x000000004" /> <!-- pre-hopper only -->
+ <enum_entry enum_label="TRIM_RX_ABB_80" enum_value="0x000000008" /> <!-- not used -->
+ <enum_entry enum_label="TRIM_RX_DC_QUICK" enum_value="0x000000010" />
+ <enum_entry enum_label="TRIM_RX_DC" enum_value="0x000000020" />
+ <enum_entry enum_label="TRIM_TX_DCO_PCAL" enum_value="0x000000040" />
+ <enum_entry enum_label="TRIM_TX_POWER" enum_value="0x000000080" />
+ <enum_entry enum_label="TRIM_TX_CARRIER_IMG" enum_value="0x000000100" />
+ <!--enum_entry enum_label="" enum_value="0x000000200" /-->
+ <!--enum_entry enum_label="" enum_value="0x000000400" /-->
+ <enum_entry enum_label="TRIM_TX_DPD" enum_value="0x000000800" />
+ <enum_entry enum_label="TRIM_RX_IQ_COMP" enum_value="0x000001000" /> <!-- Leman + S620 D01 onwards -->
+ </enum_def>
+ <enum_def enum_name="unifiAccessClassIndex">
+ <enum_entry enum_label="AC_BK" enum_value="1" />
+ <enum_entry enum_label="AC_BE" enum_value="2" />
+ <enum_entry enum_label="AC_VI" enum_value="3" />
+ <enum_entry enum_label="AC_VO" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiHardwarePlatform">
+ <enum_entry enum_label="PLATFORM_NOT_SET" enum_value ="0" />
+ <enum_entry enum_label="T20" enum_value="2" />
+ <enum_entry enum_label="LASSEN_SMDK" enum_value="17" />
+ <enum_entry enum_label="LEMAN_S620_SMDK" enum_value="18" />
+ <enum_entry enum_label="LASSEN_UNIV" enum_value="19" />
+ <enum_entry enum_label="LEMAN_S612_SMDK" enum_value="21" />
+ <enum_entry enum_label="LASSEN_A5_REV02_2017_07" enum_value="23" />
+ <enum_entry enum_label="LASSEN_A7_REV01_2017_07" enum_value="24" />
+ <enum_entry enum_label="LASSEN_J3NEO_2017_08" enum_value="25" />
+ <enum_entry enum_label="LASSEN_J3TOP" enum_value="26" />
+ <enum_entry enum_label="LASSEN_J7TOP" enum_value="27" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO" enum_value="28" />
+ <enum_entry enum_label="LEMAN_S620_UNIV" enum_value="31" />
+ <enum_entry enum_label="LASSEN_A530D" enum_value="33" />
+ <enum_entry enum_label="LEMAN_S620_WING_DUALFEM" enum_value="35" />
+ <enum_entry enum_label="LASSEN_A6_SMA600_2018_04" enum_value="36" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO_SISO" enum_value="39" />
+ <enum_entry enum_label="LEMAN_S620_ROBUSTA2_DUALFEM" enum_value="40" />
+ <enum_entry enum_label="LEMAN_S620_ROBUSTA2_NOFEM" enum_value="41" />
+ <enum_entry enum_label="LEMAN_S620_A50" enum_value="43" />
+ <enum_entry enum_label="LEMAN_S620_A50_DUALFEM" enum_value="44" />
+ <enum_entry enum_label="LEMAN_S620_TROIKA_DUALFEM" enum_value="45" />
+ <enum_entry enum_label="LEMAN_S620_A50_MIMO" enum_value="46" />
+ <enum_entry enum_label="NACHO_S612_SMDK" enum_value="47" />
+ <enum_entry enum_label="NEUS_S620_SMDK" enum_value="48" />
+ <enum_entry enum_label="NEUS_S621_SMDK" enum_value="49" />
+ <enum_entry enum_label="LEMAN_S620_MAESTRO_VOLCANO" enum_value="50" />
+ <enum_entry enum_label="LEMAN_S620_A505Y" enum_value="51" />
+ <enum_entry enum_label="LEMAN_S620_A505N_DUALFEM" enum_value="52" />
+ <enum_entry enum_label="LEMAN_S620_FLEXI" enum_value="53" />
+ <enum_entry enum_label="LEMAN_S620_SHINE_F9T_DUALFEM" enum_value="54" />
+ <enum_entry enum_label="LEMAN_S620_M307F" enum_value="55" />
+ <enum_entry enum_label="LEMAN_S620_V_TD1904_DUALFEM" enum_value="56" />
+ <enum_entry enum_label="NEUS_S620_ERD" enum_value="57" />
+ <enum_entry enum_label="NEUS_S620_V_TD1905_DUALFEM" enum_value="58" />
+ <enum_entry enum_label="LEMAN_S620_A507FN_DUALFEM" enum_value="59" />
+ <enum_entry enum_label="NEUS_S620_L_RACER_DUALFEM" enum_value="61" />
+ <enum_entry enum_label="NEUS_S620_ERD_REV0" enum_value="62" />
+ <enum_entry enum_label="LEMAN_S620_A515FM" enum_value="63" />
+ <enum_entry enum_label="NACHO_S612_ERD" enum_value="64" />
+ <enum_entry enum_label="NEUS_S620_A71" enum_value="65" />
+ <enum_entry enum_label="NEUS_S620_ERD_VOLCANO" enum_value="66" />
+ <enum_entry enum_label="NEUS_S620_V_TD1905_DUALFEMSKY" enum_value="67" />
+ <enum_entry enum_label="NEUS_S620_A71_PRE" enum_value="68" />
+ <enum_entry enum_label="NACHO_S612_A31_UNIV" enum_value="69" />
+ <enum_entry enum_label="NACHO_S612_A31" enum_value="70" />
+ <enum_entry enum_label="LASSEN_A305FN_GLOBAL" enum_value="71" />
+ <enum_entry enum_label="NEUS_S620_ERD_VOLCANO_SISO" enum_value="72" />
+ <enum_entry enum_label="NEUS_S620_V_PD1938_DUALFEM" enum_value="73" />
+ <enum_entry enum_label="NEUS_S620_V_PD1949_DUALFEM" enum_value="74" />
+ <enum_entry enum_label="LASSEN_TAB_A4_S_2019_09" enum_value="75" />
+ <enum_entry enum_label="NEUS_S621_ERD_DUALFEM" enum_value="76" />
+ <enum_entry enum_label="NEUS_S621_ERD_DUALSWITCH" enum_value="77" />
+ <enum_entry enum_label="LEMAN_S620_G715FN_DUALFEM" enum_value="78" />
+ <enum_entry enum_label="LEMAN_S620_A515U_DUALFEM" enum_value="79" />
+ <enum_entry enum_label="LEMAN_S620_P615_MIMO" enum_value="80" />
+ <enum_entry enum_label="NEUS_S620_A716U_DUALFEM" enum_value="81" />
+ <enum_entry enum_label="LEMAN_S620_G715U_DUALFEM" enum_value="82" />
+ </enum_def>
+ <enum_def enum_name="unifiDebugModulesIndex">
+ <!-- MODULE_IDS_RESERVED is used to tell apart compressed debug words. -->
+ <enum_entry enum_label="MODULE_IDS_COMPRESSED_DEBUG" enum_value="0" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SCAN" enum_value="1" />
+ <enum_entry enum_label="MODULE_IDS_FAULTS" enum_value="2" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CME" enum_value="3" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CONMGR" enum_value="4" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MIB" enum_value="5" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MPDU_ROUTER" enum_value="6" />
+ <enum_entry enum_label="MODULE_IDS_MLME_REQUESTS" enum_value="7" />
+ <enum_entry enum_label="MODULE_IDS_MLME_VIFCTRL" enum_value="8" />
+ <enum_entry enum_label="MODULE_IDS_MLME_CONNECT" enum_value="9" />
+ <enum_entry enum_label="MODULE_IDS_MLME_DEVICE" enum_value="10" />
+ <enum_entry enum_label="MODULE_IDS_RICE" enum_value="11" />
+ <enum_entry enum_label="MODULE_IDS_RICE_SAP" enum_value="12" />
+ <enum_entry enum_label="MODULE_IDS_WLANLITE" enum_value="13" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_SCHDL" enum_value="14" />
+ <enum_entry enum_label="MODULE_IDS_PMALLOC" enum_value="15" />
+ <enum_entry enum_label="MODULE_IDS_CME_MGMT" enum_value="16" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_DPLANE" enum_value="17" />
+ <enum_entry enum_label="MODULE_IDS_MLME_BA" enum_value="18" />
+ <enum_entry enum_label="MODULE_IDS_MLME_DEPRECATED" enum_value="19" />
+ <enum_entry enum_label="MODULE_IDS_MLME_AP" enum_value="20" />
+ <enum_entry enum_label="MODULE_IDS_MLME_REGULATORY" enum_value="21" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NAN" enum_value="22" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO" enum_value="23" />
+ <enum_entry enum_label="MODULE_IDS_MLME_ROAMING" enum_value="24" />
+ <enum_entry enum_label="MODULE_IDS_DATAPLANE" enum_value="25" />
+ <enum_entry enum_label="MODULE_IDS_VACANT1" enum_value="26" />
+ <enum_entry enum_label="MODULE_IDS_VACANT2" enum_value="27" />
+ <enum_entry enum_label="MODULE_IDS_CRYPTO" enum_value="28" />
+ <!-- COEX Note: DEBUG_COEX level should NOT exceed level 3 COEX task deinit has debugs defined at lvl4 which is aimed for Software testing (SWAT) only -->
+ <enum_entry enum_label="MODULE_IDS_COEX" enum_value="29" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_PS" enum_value="30" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_BLACKOUT" enum_value="31" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SA_QUERY" enum_value="32" />
+ <enum_entry enum_label="MODULE_IDS_MLME_OFFCHANNEL" enum_value="33" />
+ <enum_entry enum_label="MODULE_IDS_MLME_MEASUREMENTS" enum_value="34" />
+ <enum_entry enum_label="MODULE_IDS_MLME_TDLS" enum_value="35" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_BEACON" enum_value="36" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_VIF" enum_value="37" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_OXYGEN" enum_value="38" /> <!-- DEPRECATED -->
+ <enum_entry enum_label="MODULE_IDS_MACRAME_CALIBRATION" enum_value="39" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME" enum_value="40" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_TX" enum_value="41" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_COEX" enum_value="42" />
+ <enum_entry enum_label="MODULE_IDS_MLME" enum_value="43" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_RADIO" enum_value="44" />
+ <enum_entry enum_label="MODULE_IDS_MIB" enum_value="45" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_FILTER" enum_value="46" />
+ <enum_entry enum_label="MODULE_IDS_HALMAC" enum_value="47" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_CORE" enum_value="48" />
+ <enum_entry enum_label="MODULE_IDS_RICE_RSSI" enum_value="49" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_API_MLME" enum_value="50" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_IDLE_AP" enum_value="51" />
+ <enum_entry enum_label="MODULE_IDS_MLME_API_MACRAME" enum_value="52" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SECURITY" enum_value="53" />
+ <enum_entry enum_label="MODULE_IDS_MLME_TXPOWER" enum_value="54" />
+ <enum_entry enum_label="MODULE_IDS_PACKET_FILTER" enum_value="55" />
+ <enum_entry enum_label="MODULE_IDS_MLME_WIFI_LOGGER" enum_value="56" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_STATION" enum_value="57" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_DPD" enum_value="58" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_POW" enum_value="59" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_TX_IQ" enum_value="60" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_RX" enum_value="61" />
+ <enum_entry enum_label="MODULE_IDS_BIST" enum_value="62" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FRAME" enum_value="63" />
+ <enum_entry enum_label="MODULE_IDS_MLME_IE" enum_value="64" />
+ <enum_entry enum_label="MODULE_IDS_HALRADIO_COEX_FEM" enum_value="65" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FTM" enum_value="66" />
+ <enum_entry enum_label="MODULE_IDS_SMAPPER" enum_value="67" />
+ <enum_entry enum_label="MODULE_IDS_MLME_API_DPLANE" enum_value="68" />
+ <enum_entry enum_label="MODULE_IDS_MLME_FTM_RESP" enum_value="69" />
+ <enum_entry enum_label="MODULE_IDS_MLME_SCAN_CHANNEL" enum_value="70" />
+ <enum_entry enum_label="MODULE_IDS_LMIF" enum_value="71" />
+ <enum_entry enum_label="MODULE_IDS_MLME_BASF" enum_value="72" />
+ <enum_entry enum_label="MODULE_IDS_APF" enum_value="73" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NDM" enum_value="74" />
+ <enum_entry enum_label="MODULE_IDS_MLME_NAM" enum_value="75" />
+ <enum_entry enum_label="MODULE_IDS_MACRAME_IDLE_STA" enum_value="76" />
+ <enum_entry enum_label="MODULE_LAST_ID" enum_value="77" />
+ </enum_def>
+ <enum_def enum_name="unifiSubSystemsIndex">
+ <enum_entry enum_label="SUBSYSTEM_IDS_COEX" enum_value="1" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_COMMON" enum_value="2" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_DPLANE" enum_value="3" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_MACRAME" enum_value="4" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_MLME" enum_value="5" />
+ <enum_entry enum_label="SUBSYSTEM_IDS_RADIO" enum_value="6" />
+ <enum_entry enum_label="SUBSYSTEM_LAST_ID" enum_value="7" />
+ </enum_def>
+ <enum_def enum_name="unifiBandTableIndex">
+ <enum_entry enum_label="BAND_2G" enum_value="1" />
+ <enum_entry enum_label="BAND_5G" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiBWTableIndex">
+ <enum_entry enum_label="BW20" enum_value="1" />
+ <enum_entry enum_label="BW40" enum_value="2" />
+ <enum_entry enum_label="BW80" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiSisoMimoTableIndex">
+ <enum_entry enum_label="SINGLE_RADIO" enum_value="1" />
+ <enum_entry enum_label="MIMO" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiDpdDebugTableIndex">
+ <enum_entry enum_label="LUT_QUALITY_THRESHOLD" enum_value="1" />
+ <enum_entry enum_label="LUT_RETRIM_LIMIT" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiMacBusyTimeTableIndex">
+ <enum_entry enum_label="PRI20" enum_value="1" />
+ <enum_entry enum_label="SEC20" enum_value="2" />
+ <enum_entry enum_label="SEC40" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamRssiFactorTableIndex">
+ <enum_entry enum_label="RSSI_NEG_55" enum_value="1" />
+ <enum_entry enum_label="RSSI_NEG_60" enum_value="2" />
+ <enum_entry enum_label="RSSI_NEG_70" enum_value="3" />
+ <enum_entry enum_label="RSSI_NEG_80" enum_value="4" />
+ <enum_entry enum_label="RSSI_NEG_90" enum_value="5" />
+ <enum_entry enum_label="RSSI_NEG_127" enum_value="6" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamCUFactorTableIndex">
+ <enum_entry enum_label="CU_LOW_2G" enum_value="1" />
+ <enum_entry enum_label="CU_MID_2G" enum_value="2" />
+ <enum_entry enum_label="CU_HIGH_2G" enum_value="3" />
+ <enum_entry enum_label="CU_LOW_5G" enum_value="4" />
+ <enum_entry enum_label="CU_MID_5G" enum_value="5" />
+ <enum_entry enum_label="CU_HIGH_5G" enum_value="6" />
+ </enum_def>
+ <enum_def enum_name="unifiWifiLogger">
+ <enum_entry enum_label="Disabled" enum_value="0" />
+ <enum_entry enum_label="Partial" enum_value="1" />
+ <enum_entry enum_label="Full" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiAntennaMode">
+ <enum_entry enum_label="SISO" enum_value="0" />
+ <enum_entry enum_label="MIMO_2x2" enum_value="1" />
+ <enum_entry enum_label="MIMO_3x3" enum_value="2" />
+ <enum_entry enum_label="MIMO_4x4" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiRoamingAKM">
+ <enum_entry enum_label="AKM_None" enum_value="0" />
+ <enum_entry enum_label="AKM_OKC" enum_value="1" />
+ <enum_entry enum_label="AKM_FT_1X" enum_value="2" />
+ <enum_entry enum_label="AKM_PSK" enum_value="3" />
+ <enum_entry enum_label="AKM_FT_PSK" enum_value="4" />
+ <enum_entry enum_label="AKM_PMKSA_Caching" enum_value="5" />
+ <enum_entry enum_label="AKM_SAE" enum_value="6" />
+ <enum_entry enum_label="AKM_FT_SAE" enum_value="7" />
+ </enum_def>
+ <enum_def enum_name="unifiOperatingClassTableIndex">
+ <enum_entry enum_label="Operating_Class_Global" enum_value="1" />
+ <enum_entry enum_label="Operating_Class_Europe" enum_value="2" />
+ <enum_entry enum_label="Operating_Class_US" enum_value="3" />
+ <enum_entry enum_label="Operating_Class_Japan" enum_value="4" />
+ </enum_def>
+ <enum_def enum_name="unifiTestTxPowerBitfield">
+ <enum_entry enum_label="TXPOWER_REGULATORY" enum_value="0x0001" />
+ <enum_entry enum_label="TXPOWER_USER" enum_value="0x0002" />
+ <enum_entry enum_label="TXPOWER_NETWORK" enum_value="0x0004" />
+ <enum_entry enum_label="TXPOWER_SAR" enum_value="0x0008" />
+ <enum_entry enum_label="TXPOWER_NOCELL" enum_value="0x0010" />
+ <enum_entry enum_label="TXPOWER_GRIP" enum_value="0x0020" />
+ <enum_entry enum_label="TXPOWER_TPC" enum_value="0x0040" />
+ <enum_entry enum_label="TXPOWER_LTE_COEX" enum_value="0x0080" />
+ <enum_entry enum_label="TXPOWER_RICE_MIN_POWER" enum_value="0x0100" />
+ <enum_entry enum_label="TXPOWER_RICE_MAX_POWER" enum_value="0x0200" />
+ </enum_def>
+ <enum_def enum_name="unifiLteSignalsBitField">
+ <enum_entry enum_label="MWS_STATUS" enum_value="0x00001" />
+ <enum_entry enum_label="MWS_FRAME_SYNC" enum_value="0x00002" />
+ <enum_entry enum_label="MWS_TX" enum_value="0x00004" />
+ <enum_entry enum_label="MWS_DRX" enum_value="0x00008" />
+ <enum_entry enum_label="MWS_TX_LEVEL" enum_value="0x00010" />
+ <enum_entry enum_label="MWS_RX_LEVEL" enum_value="0x00020" />
+ <enum_entry enum_label="MWS_MEASUREMENT_GAP" enum_value="0x00040" />
+ </enum_def>
+ <enum_def enum_name="unifiFrameTXCountersTableIndexEnum">
+ <!-- Index = 1 Tx Good Count - shall be incremented for each data and management packet successfully transmitted. -->
+ <!-- Index = 2 Tx Bad Count - shall be incremented for each data and management packet that fails due to either
+ Tx_lifetime, max_retry or unspecified failure -->
+ <!-- Index = 3 Tx Retry Count - shall be incremented for each data and management packet that is transmitted
+ successfully but retried at least once -->
+ <enum_entry enum_label="tx_good" enum_value="1" />
+ <enum_entry enum_label="tx_bad" enum_value="2" />
+ <enum_entry enum_label="tx_retry" enum_value="3" />
+ </enum_def>
+ <enum_def enum_name="unifiFrameRXCountersTableIndexEnum">
+ <!-- Index = 1 Rx Good Count - shall be incremented for each data and management packet successfully received -->
+ <enum_entry enum_label="rx_good" enum_value="1" />
+ </enum_def>
+ <enum_def enum_name="unifiModuleMemoryManagerFieldIndexEnum">
+ <enum_entry enum_label="priority" enum_value="1" />
+ <enum_entry enum_label="size" enum_value="2" />
+ </enum_def>
+ <enum_def enum_name="unifiScanFlags">
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_EARLY_CHANNEL_EXIT" enum_value="0x0001" />
+ <enum_entry enum_label="SCAN_FLAG_DISABLE_SCAN" enum_value="0x0002" />
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_NCHO" enum_value="0x0004" />
+ <enum_entry enum_label="SCAN_FLAG_ENABLE_MAC_RANDOMIZATION" enum_value="0x0008" />
+ </enum_def>
+ <config_element name="unifiConnectionTypeTableIndex" psid="0">
+ <description_user>Index by modulation, 11b, 11g, 11n, 11ac</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="unifiDefaultCountryIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index - To Be Removed when unifiDefaultCountry is split into two MIBs. </description_user>
+ </config_element>
+ <config_element name="unifiQueueStatsIndex" psid="0">
+ <type>integer</type>
+ <range_min>0</range_min><range_max>15</range_max>
+ <description_user>Index for unifiQueueStatsIdTable</description_user>
+ </config_element>
+ <config_element name="dot11RSNAConfigIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="dot11RSNAStatsIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>6</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBeamformingPhaseSTS" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiPrivateOnlyPatchIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRateStatsIndex" psid="0">
+ <type>unifiRateStatsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiThroughputDebugIndex" psid="0">
+ <type>unifiThroughputDebugIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiPeerIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>10</range_max>
+ <description_user>Index for unifiPeerIdTable</description_user>
+ </config_element>
+ <config_element name="unifiReadHardwareCounterIndex" psid="0">
+ <type>unifiReadHardwareCounterIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTXSettingsIndex" psid="0">
+ <type>unifiRadioTXSettingsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioRXSettingsIndex" psid="0">
+ <type>unifiRadioRXSettingsIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioCCADebugTableIndex" psid="0">
+ <type>unifiRadioCCADebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiNarrowbandCCADebugTableIndex" psid="0">
+ <type>unifiNarrowbandCCADebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiReadRegIndex" psid="0">
+ <type>integer</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiMacInstanceIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>8</range_max>
+ <description_user>mac instance index. Note that there is an offset of 1 so that mac_instance == 0 matches unifiMacInstanceIndex == 1</description_user>
+ </config_element>
+ <config_element name="unifiRadioInstanceIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>8</range_max>
+ <description_user>Radio instance index. Note that there is an offset of 1 so that radio_instance == 0 matches unifiRadioInstanceIndex == 1</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutRadioIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>2</range_max>
+ <description_user>radio id</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutGroupIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>group index</description_user>
+ </config_element>
+ <config_element name="unifiLoadDpdLutTemperatureIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <description_user>temperature index</description_user>
+ </config_element>
+ <config_element name="unifiRadioCCAThresholdsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTxIqDelayTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiAgcThresholdsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxGainSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioTXPowerOverrideTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>2</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerDetectorResponseTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxDetectorTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxDetectorFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOpenLoopTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOpenLoopFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdTemperatureCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdFrequencyCompensationTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxFtrimSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiStaticDpdGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxGainStepSettingsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDpdPredistortGainsTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerTrimConfigTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLossTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRxExternalGainTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDebugControlTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>32</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiTxOOBConstraintTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>Index for unifiTxOOBConstraintTable</description_user>
+ </config_element>
+ <config_element name="unifiTxPowerAdjustTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDPDTrainPacketConfigIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>255</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRegulatoryTableIndex" psid="0">
+ <description_user>Index for unifiRegulatoryTable</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiPeerid" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiOperatingClassIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiScanParametersIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>integer</type>
+ <range_min>1</range_min><range_max>500</range_max>
+ </config_element>
+ <config_element name="unifiAccessClassIndex" psid="0">
+ <type>unifiAccessClassIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiSisoMimoTableIndex" psid="0">
+ <type>unifiSisoMimoTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDpdDebugTableIndex" psid="0">
+ <type>unifiDpdDebugTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRadioIndex" psid="0">
+ <type>integer</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBandTableIndex" psid="0">
+ <type>unifiBandTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiBWTableIndex" psid="0">
+ <type>unifiBWTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiMacBusyTimeTableIndex" psid="0">
+ <type>unifiMacBusyTimeTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiDebugModulesIndex" psid="0">
+ <type>unifiDebugModulesIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRoamRssiFactorTableIndex" psid="0">
+ <type>unifiRoamRssiFactorTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiRoamCUFactorTableIndex" psid="0">
+ <type>unifiRoamCUFactorTableIndex</type>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="unifiSarModeTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>int16</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameTXCountersTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>unifiFrameTXCountersTableIndexEnum</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameRXCountersTableIndex" psid="0">
+ <description_user>table index</description_user>
+ <type>unifiFrameRXCountersTableIndexEnum</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11ACKFailureCount" psid="148">
+ <description_user>This counter shall increment when an ACK is not received when expected.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11FCSErrorCount" psid="151">
+ <description_user>This counter shall increment when an FCS error is detected in a received MPDU.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11FragmentationThreshold" psid="124">
+ <description_user>Current maximum size, in octets, of the MPDU that may be delivered to the security encapsulation. This maximum size does not apply when an MSDU is transmitted using an HT-immediate or HTdelayed Block Ack agreement, or when an MSDU or MMPDU is carried in an AMPDU that does not contain a VHT single MPDU. Fields added to the frame by security encapsulation are not counted against the limit specified. Except as described above, an MSDU or MMPDU is fragmented when the resulting frame has an individual address in the Address1 field, and the length of the frame is larger than this threshold, excluding security encapsulation fields. The default value is the lesser of 11500 or the aMPDUMaxLength or the aPSDUMaxLength of the attached PHY and the value never exceeds the lesser of 11500 or the aMPDUMaxLength or the aPSDUMaxLength of the attached PHY.</description_user>
+ <type>uint16</type>
+ <range_min>256</range_min><range_max>11500</range_max><default>3000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11LongRetryLimit" psid="123">
+ <description_user>Maximum number of transmission attempts of a frame, the length of which is greater than dot11RTSThreshold, that shall be made before a failure condition is indicated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>4</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11MulticastReceivedFrameCount" psid="150">
+ <description_user>This counter shall increment when a MSDU is received with the multicast bit set in the destination MAC address.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsCCMPDecryptErrors" psid="437">
+ <description_user>The number of received MPDUs discarded by the CCMP decryption algorithm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsCCMPReplays" psid="436">
+ <description_user>The number of received CCMP MPDUs discarded by the replay mechanism.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsRobustMgmtCCMPReplays" psid="441">
+ <description_user>The number of received Robust Management frame MPDUs discarded due to CCMP replay errors</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsSTAAddress" psid="430">
+ <description_user>The MAC address of the STA to which the statistics in this conceptual row belong.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPICVErrors" psid="433">
+ <description_user>Counts the number of TKIP ICV errors encountered when decrypting packets for the STA.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPLocalMICFailures" psid="434">
+ <description_user>Counts the number of MIC failures encountered when checking the integrity of packets received from the STA at this entity.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPRemoteMICFailures" psid="435">
+ <description_user>Counts the number of MIC failures encountered by the STA identified by dot11RSNAStatsSTAAddress and reported back to this entity.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RSNAStatsTKIPReplays" psid="438">
+ <description_user>Counts the number of TKIP replay errors detected.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>dot11RSNAStatsTable</table_name>
+ <function type="get" function_name="mibrsnastatsget"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RTSSuccessCount" psid="146">
+ <description_user>This counter shall increment when a CTS is received in response to an RTS.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11RTSThreshold" psid="121">
+ <description_user>Size of an MPDU, below which an RTS/CTS handshake shall not be performed, except as RTS/CTS is used as a cross modulation protection mechanism as defined in 9.10. An RTS/CTS handshake shall be performed at the beginning of any frame exchange sequence where the MPDU is of type Data or Management, the MPDU has an individual address in the Address1 field, and the length of the MPDU is greater than this threshold. (For additional details, refer to Table 21 in 9.7.) Setting larger than the maximum MSDU size shall have the effect of turning off the RTS/CTS handshake for frames of Data or Management type transmitted by this STA. Setting to zero shall have the effect of turning on the RTS/CTS handshake for all frames of Data or Management type transmitted by this STA.</description_user>
+ <type>uint32</type>
+ <units>octet</units>
+ <range_min>0</range_min><range_max>65536</range_max><default>65536</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11ShortRetryLimit" psid="122">
+ <description_user>Maximum number of transmission attempts of a frame, the length of which is less than or equal to dot11RTSThreshold, that shall be made before a failure condition is indicated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>32</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11WEPUndecryptableCount" psid="153">
+ <description_user>This counter shall increment when a frame is received with the WEP subfield of the Frame Control field set to one and the WEPOn value for the key mapped to the transmitter's MAC address indicates that the frame should not have been encrypted or that frame is discarded due to the receiving STA not implementing the privacy option.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="dot11manufacturerProductVersion" psid="183">
+ <description_user>Printable string used to identify the manufacturer's product version of the resource.</description_user>
+ <description_internal>This string is generated automatically by the build process. It contains the time and date that the build was made, the release configuration used (which itself incorporates the target chip family and variant, whether it is a flash or RAM build, and the host interface), the unique build number, and details of the user account and machine used to produce the build.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>300</range_max>
+ <function type="get" function_name="mibgetfirmwareproductversion"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPSDServicePeriodTimeout" psid="2515">
+ <description_user>During Unscheduled Automated Power Save Delivery (U-APSD), UniFi may trigger a service period in order to fetch data from the access point. The service period is normally terminated by a frame from the access point with the EOSP (End Of Service Period) flag set, at which point UniFi returns to sleep. However, if the access point is temporarily inaccessible, UniFi would stay awake indefinitely. Specifies a timeout starting from the point where the trigger frame has been sent. If the timeout expires and no data has been received from the access point, UniFi will behave as if the service period had been ended normally and return to sleep. This timeout takes precedence over unifiPowerSaveExtraListenTime if both would otherwise be applicable.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>20000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLegacyPsPollTimeout" psid="2520">
+ <description_user>Time we try to stay awake after sending a PS-POLL to receive data.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>15000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiBasicCapabilities" psid="2030">
+ <description_user>The 16-bit field follows the coding of IEEE 802.11 Capability Information.</description_user>
+ <type>uint16</type>
+ <default>0x1730</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11AssociationSAQueryMaximumTimeout" psid="100">
+ <description_user>Timeout (in TUs) before giving up on a Peer that has not responded to a SA Query frame.</description_user>
+ <type>uint32</type>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>1000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRfTestModeActivated" psid="5054">
+ <description_user>Test only: Set to true when running in RF Test mode. Setting this MIB key to true prevents setting mandatory HT MCS Rates.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11AssociationSAQueryRetryTimeout" psid="101">
+ <description_user>Timeout (in TUs) before trying a Query Request frame.</description_user>
+ <type>uint32</type>
+ <range_max>4294967295</range_max><default>201</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- Tx Power Control -->
+ <config_element name="unifiTestTxPowerEnable" psid="6032">
+ <description_user>Test only: Bitfield to enable Control Plane Tx Power processing. </description_user>
+ <type>uint16</type>
+ <default>0x03DD</default>
+ <nature>hardware</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiUserSetTxpowerLevel" psid="6021">
+ <description_user>Test only: Maximum User Set Tx Power (quarter dBm). Enable it in unifiTestTxPowerEnable.</description_user>
+ <type>int16</type>
+ <default>127</default>
+ <function_list>
+ <function type="set" function_name="mlmeusersettxpowerlevel"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNoCellMaxPower" psid="8017">
+ <description_user>Max power values for included channels (quarter dBm).</description_user>
+ <type>int16</type>
+ <table_name>unifiNoCellTable</table_name>
+ <default_list>
+ <default index1="1"> 28 </default> <!-- 802.11b -->
+ <default index1="2"> 28 </default> <!-- 802.11g -->
+ <default index1="3"> 20 </default> <!-- 802.11n -->
+ <default index1="4"> 20 </default> <!-- 802.11ac -->
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNoCellIncludedChannels" psid="8018">
+ <description_user>Channels applicable. Defined in a uint64 represented by the octet string.
+ First byte of the octet string maps to LSB. Bit 0 maps to channel 1. Mapping defined in ChannelisationRules.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max><default>{ 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSarBackoff" psid="6026">
+ <description_user>Max power values per band per index(quarter dBm).</description_user>
+ <type>int16</type>
+ <table_name>unifiSarBackoffTable</table_name>
+ <default_list>
+ <default index1="1" index2="1">60</default>
+ <default index1="1" index2="2">52</default>
+ <default index1="2" index2="1">59</default>
+ <default index1="2" index2="2">51</default>
+ <default index1="3" index2="1">58</default>
+ <default index1="3" index2="2">50</default>
+ <default index1="4" index2="1">57</default>
+ <default index1="4" index2="2">49</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPowerIsGrip" psid="6016">
+ <description_user>Is using Grip power cap instead of SAR cap.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTPCMaxPowerRSSIThreshold" psid="6022">
+ <description_user>Below the (dBm) threshold, switch to the max power allowed by regulatory, if it has been previously reduced due to unifiTPCMinPowerRSSIThreshold.</description_user>
+ <type>int16</type>
+ <default>-55</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPowerRSSIThreshold" psid="6023">
+ <description_user>Above the (dBm) threshold, switch to the minimum hardware supported - capped by unifiTPCMinPower2G/unifiTPCMinPower5G. A Zero value reverts the power to a default state.</description_user>
+ <type>int16</type>
+ <default>-45</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower2G" psid="6024">
+ <description_user>Minimum power for 2.4GHz SISO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower2GMIMO" psid="6011">
+ <description_user>Minimum power for 2.4GHz MIMO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower5G" psid="6025">
+ <description_user>Minimum power for 5 GHz SISO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>40</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCMinPower5GMIMO" psid="6012">
+ <description_user>Minimum power for 5 GHz MIMO interface when RSSI is above unifiTPCMinPowerRSSIThreshold (quarter dbm). Should be greater than dot11PowerCapabilityMinImplemented.</description_user>
+ <type>int16</type>
+ <default>52</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCUseAfterConnectRsp" psid="6027">
+ <description_user>Use TPC only after MlmeConnect_Rsp has been received from the Host i.e. not during initial connection exchanges (EAPOL/DHCP operation) as RSSI readings might be inaccurate.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexMaxPowerRSSIThreshold" psid="6033">
+ <description_user>Below this (dBm) threshold, switch to max power allowed by regulatory, if it has been previously reduced due to unifiTPCMinPowerRSSIThreshold.</description_user>
+ <type>int16</type>
+ <default>-55</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexMinPowerRSSIThreshold" psid="6034">
+ <description_user>Above this(dBm) threshold, switch to minimum hardware supported - capped by unifiTPCMinPower2G/unifiTPCMinPower5G. Zero reverts the power to its default state.</description_user>
+ <type>int16</type>
+ <default>-45</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLteCoexPowerReduction" psid="6035">
+ <description_user>When LTE Coex Power Reduction provisions are met, impose a power cap of the regulatory domain less the amount specified by this MIB (quarter dB)</description_user>
+ <range_min>0</range_min><range_max>127</range_max><default>24</default>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateBbbTxFilterConfig" psid="4071">
+ <description_user>entry is written directly to the BBB_TX_FILTER_CONFIG register. Only the lower eight bits of this register are implemented . Bits 0-3 are the 'Tx Gain', bits 6-8 are the 'Tx Delay'. This register should only be changed by an expert.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <default>0x17</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRXTHROUGHPUTLOW" psid="4150">
+ <description_user> Lower threshold for number of bytes received in a second - default value based on 300Mbps </description_user>
+ <is_internal>true</is_internal>
+ <type>uint32</type>
+ <default>37500000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRXTHROUGHPUTHIGH" psid="4151">
+ <description_user> Upper threshold for number of bytes received in a second - default value based on 400Mbps </description_user>
+ <is_internal>true</is_internal>
+ <type>uint32</type>
+ <default>50000000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="deprecated_unifiWapiQosMask" psid="4130">
+ <description_user>Forces the WAPI encryption hardware use the QoS mask specified.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <default>15</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyMIBShield" psid="4001">
+ <description_user>Each element of the MIB has a set of read/write access constraints that may be applied when the element is accessed by the host. For most elements the constants are derived from their MAX-ACCESS clauses. unifiCSROnlyMIBShield controls the access mechanism. If this entry is set to 'warn', when the host makes an inappropriate access to a MIB variable (e.g., writing to a 'read-only' entry) then the firmware attempts to send a warning message to the host, but access is allowed to the MIB variable. If this entry is set to 'guard' then inappropriate accesses from the host are prevented. If this entry is set to 'alarm' then inappropriate accesses from the host are prevented and the firmware attempts to send warning messages to the host. If this entry is set to 'open' then no access constraints are applied and now warnings issued. Note that certain MIB entries have further protection schemes. In particular, the
+ MIB prevents the host from reading some security keys (WEP keys, etc.).</description_user>
+ <is_internal>true</is_internal>
+ <access_rights>not_accessible</access_rights>
+ <type>unifiCSROnlyMIBShield</type>
+ <default>2</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPsPollThreshold" psid="4179">
+ <type>uint16</type>
+ <description_user>PS Poll threshold. When Unifi chip is configured for normal power save mode and when access point does not respond to PS-Poll requests, then a fault will be generated on non-zero PS Poll threshold indicating mode has been switched from power save to fast power save. Ignored PS Poll count is given as the fault argument.</description_user>
+ <default>30</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPostEBRTWindow" psid="4173">
+ <description_user>Minimum time after the expected beacon reception time that UniFi will continue to listen for the beacon in an infrastructure BSS before timing out. Reducing this value can reduce UniFi power consumption when using low power modes, however a value which is too small may cause beacons to be missed, requiring the radio to remain on for longer periods to ensure reception of the subsequent beacon.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>2000</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyPowerCalDelay" psid="4078">
+ <description_user>Delay applied at each step of the power calibration routine used with an external PA.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPreEBRTWindow" psid="4171">
+ <description_user>Latest time before the expected beacon reception time that UniFi will turn on its radio in order to receive the beacon. Reducing this value can reduce UniFi power consumption when using low power modes, however a value which is too small may cause beacons to be missed, requiring the radio to remain on for longer periods to ensure reception of the subsequent beacon.</description_user>
+ <is_internal>true</is_internal>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>100</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCExtThresh" psid="4077">
+ <description_user>Signal level at which external LNA will be used for AGC purposes.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-25</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCFrontEndGain" psid="4075">
+ <description_user>Gain of the path between chip and antenna when LNA is on.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPrivateSWAGCFrontEndLoss" psid="4076">
+ <description_user>Loss of the path between chip and antenna when LNA is off.</description_user>
+ <is_internal>true</is_internal>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiChipVersion" psid="2022">
+ <description_user>Numeric identifier for the UniFi silicon revision (as returned by the GBL_CHIP_VERSION hardware register). Other than being different for each design variant (but not for alternative packaging options), the particular values returned do not have any significance.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCrystalFrequencyTrim" psid="2141">
+ <description_user>The IEEE 802.11 standard requires a frequency accuracy of either +/- 20 ppm or +/- 25 ppm depending on the physical layer being used. If UniFi's frequency reference is a crystal then this attribute should be used to tweak the oscillating frequency to compensate for design- or device-specific variations. Each step change trims the frequency by approximately 2 ppm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>63</range_max><default>31</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDTIMWaitTimeout" psid="2529">
+ <description_user>If UniFi is in power save and receives a Traffic Indication Map from its associated access point with a DTIM indication, it will wait a maximum time given by this attribute for succeeding broadcast or multicast traffic, or until it receives such traffic with the 'more data' flag clear. Any reception of broadcast or multicast traffic with the 'more data' flag set, or any reception of unicast data, resets the timeout. The timeout can be turned off by setting the value to zero; in that case UniFi will remain awake indefinitely waiting for broadcast or multicast data. Otherwise, the value should be larger than that of unifiPowerSaveExtraListenTime.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>50000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiOutputRadioInfoToKernelLog" psid="2239">
+ <description_user>Print messages about the radio status to the Android Kernel Log. See document SC-508266-TC.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugKeepRadioOn" psid="2545">
+ <description_user>Keep the radio on. For debug purposes only. Setting the value to FALSE means radio on/off functionality will behave normally. Note that setting this value to TRUE will automatically disable dorm. The intention is *not* for this value to be changed at runtime.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceFixedDurationSchedule" psid="2546">
+ <description_user>For schedules with fixed duration e.g. scan, unsync VIF, the schedule will be forced after this time to avoid VIF starving </description_user>
+ <units>TU</units>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAUsesOneAntennaWhenIdle" psid="2274">
+ <description_user>Allow the platform to downgrade antenna usage for STA VIFs to 1 if the VIF is idle. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAUsesMultiAntennasDuringConnect" psid="2275">
+ <description_user>Allow the platform to use multiple antennas for STA VIFs during the connect phase. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAPUsesOneAntennaWhenPeersIdle" psid="2276">
+ <description_user>Allow the platform to downgrade antenna usage for AP VIFs when all connected peers are idle. Only valid for multi-radio platforms.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="deprecated_unifiUpdateAntennaCapabilitiesWhenScanning" psid="2277">
+ <description_user>Specify whether antenna scan activities will be allowed to cause an update of VIF capability. Only valid for multi-radio platforms. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPreferredAntennaBitmap" psid="2278">
+ <description_user>Specify the preferred antenna(s) to use. A value of 0 means that the FW will decide on the antenna(s) to use. Only valid for multi-radio platforms.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMaxConcurrentMACs" psid="2279">
+ <description_user>Specify the maximum number of MACs that may be used for the platform. For multi-MAC platforms that value *could* be greater than 1. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMaxNumAntennaToUse" psid="2025">
+ <description_user>Specify the maximum number of antenna that will be used for each band. Lower 8 bits = 2GHz, Higher 8 bits = 5Ghz. Limited by maximum supported by underlying hardware. WARNING: Changing this value after system start-up will have no effect.</description_user>
+ <type>uint16</type>
+ <default>0x0202</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableTwoSimultaneousPassiveScansSameBand" psid="2047">
+ <description_user>Enable two passive scans to be simultaneously scheduled on two distinct channels at the same.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableFlexiMacWatchdog" psid="5200">
+ <description_user>Bitmap controlling watchdog configuration for fleximac. Setting bit to 1 will enable watchdog for MAC represented by bit position </description_user>
+ <type>uint16</type>
+ <default>0x0000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiEnableDorm" psid="2142">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enable Dorm (deep sleep). When disabled, WLAN will not switch the radio power domain on/off *and* it will always veto deep sleep. Setting the value to TRUE means dorm functionality will behave normally. The intention is *not* for this value to be changed at runtime.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTogglePowerDomain" psid="2522">
+ <description_user>Toggle WLAN power domain when entering dorm mode (deep sleep). When entering deep sleep and this value it true, then the WLAN power domain is disabled for the deep sleep duration. When false, the power domain is left turned on. This is to work around issues with WLAN rx, and is considered temporary until the root cause is found and fixed.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDiscardedFrameCount" psid="2214">
+ <description_user>This is a counter that indicates the number of data and management frames that have been processed by the UniFi hardware but were discarded before being processed by the firmware. It does not include frames not processed by the hardware because they were not addressed to the local device, nor does it include frames discarded by the firmware in the course of normal MAC processing (which include, for example, frames in an appropriate encryption state and multicast frames not requested by the host). Typically this counter indicates lost data frames for which there was no buffer space; however, other cases may cause the counter to increment, such as receiving a retransmitted frame that was already successfully processed. Hence this counter should not be treated as a reliable guide to lost frames. The counter wraps to 0 after 65535.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibpktcntget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCurrentTSFTime" psid="2218">
+ <description_user>Get TSF time (last 32 bits) for the specified VIF. VIF index can't be 0 as that is treated as global VIF For station VIF - Correct BSS TSF wil only be reported after MLME-CONNECT.indication(success) indication to host. Note that if MAC Hardware is switched off then TSF returned is estimated value</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <function_list>
+ <function type="get" function_name="mibtsftime" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOffchannelScheduleTimeout" psid="2079">
+ <description_user>Maximum timeout in ms the Offchannel FSM will wait until the complete dwell time is scheduled</description_user>
+ <type>uint16</type>
+ <default>1000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExtendedCapabilities" psid="2031">
+ <description_user>Extended capabilities. Bit field definition and coding follows IEEE 802.11 Extended Capability Information Element, with spare subfields for capabilities that are independent from chip/firmware implementation.</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>9</range_max><default>{ 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x40, 0x80 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExtendedCapabilitiesDisabled" psid="2036">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Suppress extended capabilities IE being sent in the association request. Please note that this may fix IOP issues with Aruba APs in WMMAC. Singed Decimal</description_user>
+ <type>boolean</type><format>signed_decimal</format><default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiExternalClockDetect" psid="2146">
+ <description_user>If UniFi is running with an external fast clock source, i.e. unifiExternalFastClockRequest is set, it is common for this clock to be shared with other devices. Setting to true causes UniFi to detect when the clock is present (presumably in response to a request from another device), and to perform any pending activities at that time rather than requesting the clock again some time later. This is likely to reduce overall system power consumption by reducing the total time that the clock needs to be active.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiExternalFastClockRequest" psid="2149">
+ <description_user>It is possible to supply UniFi with an external fast reference clock, as an alternative to using a crystal. If such a clock is used then it is only required when UniFi is active. A signal can be output on PIO[2] or if the version of UniFi in use is the UF602x or later, any PIO may be used (see unifiExternalFastClockRequestPIO) to indicate when UniFi requires a fast clock. Setting makes this signal become active and determines the type of signal output. 0 - No clock request. 1 - Non inverted, totem pole. 2 - Inverted, totem pole. 3 - Open drain. 4 - Open source.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiExternalFastClockRequest</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiExternalFastClockRequestPIO" psid="2158">
+ <description_user>If an external fast reference clock is being supplied to UniFi as an alternative to a crystal (see unifiExternalFastClockRequest) and the version of UniFi in use is the UF602x or later, any PIO may be used as the external fast clock request output from UniFi. key determines the PIO to use.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>15</range_max><default>9</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTXAmsduHWCapability" psid="2223">
+ <description_user>Returns 0 if A-MSDU size limited to 4K. Returns 1 is A-MSDU size is limited to 8K. This value is chip specific and limited by HW. </description_user>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTXAmsduSubframeCountMax" psid="2224">
+ <description_user>Defines the maximum number of A-MSDU sub-frames per A-MSDU. A value of 1 indicates A-MSDU aggregation has been disabled</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>3</default>
+ <range_min>1</range_min>
+ <range_max>4</range_max>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest1" psid="4154">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest2" psid="4155">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest3" psid="4156">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDplaneTest4" psid="4157">
+ <description_user>Dplane test mib to read and write uint32</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeout" psid="2500">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified.</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>400000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeOutSmall" psid="2501">
+ <description_user>UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified. The unifiFastPowerSaveTimeOutSmall aims to improve the power consumption by setting a lower bound for the Fast Power Save Timeout. If set with a value above unifiFastPowerSaveTimeOut it will default to unifiFastPowerSaveTimeOut.</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>50000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFastPowerSaveTimeOutAggressive" psid="2494">
+ <description_user>UniFi implements a proprietary power management mode called Fast Power Save that balances network performance against power consumption. In this mode UniFi delays entering power save mode until it detects that there has been no exchange of data for the duration of time specified. The unifiFastPowerSaveTimeOutAggressive aims to improve the power consumption by setting a aggressive time when channel is not busy for the Fast Power Save Timeout. If set with a value above unifiFastPowerSaveTimeOut it will default to unifiFastPowerSaveTimeOut. Setting it to zero disables the feature</description_user>
+ <units>µs</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>20000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRameDplaneOperationTimeout" psid="2544">
+ <description_user>Timeout for requests sent from MACRAME to Data Plane. Any value below 1000ms will be capped at 1000ms.</description_user>
+ <units>milliseconds</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <default>1000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiVifIdleMonitorTime" psid="2509">
+ <description_user>In Fast Power Save mode, the STA will decide whether it is idle based on monitoring its traffic class. If the traffic class is continuously "occasional" for equal or longer than the specified value (in seconds), then the VIF is marked as idle. Traffic class monitoring is based on the interval specified in the "unifiExitPowerSavePeriod" MIB</description_user>
+ <units>second</units>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <range_max>1800</range_max><default>1</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiFirmwareBuildID" psid="2021">
+ <description_user>Numeric build identifier for this firmware build. This should normally be displayed in decimal. The textual build identifier is available via the standard dot11manufacturerProductVersion MIB attribute.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function type="get" function_name="mibgetfirmwarebuildid"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFirmwarePatchBuildID" psid="2023">
+ <description_user>Numeric build identifier for the patch set that has been applied to this firmware image. This should normally be displayed in decimal. For a patched ROM build there will be two build identifiers, the first will correspond to the base ROM image, the second will correspond to the patch set that has been applied.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function type="get" function_name="mibgetfirmwarebuildid"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDisallowSchedRelinquish" psid="2543">
+ <description_user>When enabled the VIFs will not relinquish their assigned schedules when they have nothing left to do.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMLMESTAKeepAliveTimeout" psid="2502">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>30</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEAPKeepAliveTimeout" psid="2503">
+ <description_user>Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEGOKeepAliveTimeout" psid="2504">
+ <description_user>Timeout before disconnecting in seconds. 0 = Disabled. Capped to greater than 6 seconds.</description_user>
+ <type>uint16</type>
+ <range_max>2147</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMESTAKeepAliveTimeoutCheck" psid="2485">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEAPKeepAliveTimeoutCheck" psid="2486">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEGOKeepAliveTimeoutCheck" psid="2487">
+ <description_user>DO NOT SET TO A VALUE HIGHER THAN THE TIMEOUT. How long before keepalive timeout to start polling, in seconds. </description_user>
+ <type>uint16</type>
+ <range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- End of Keep Alive MIBs -->
+ <config_element name="unifiSTARouterAdvertisementMinimumIntervalToForward" psid="2505">
+ <description_user>STA Mode: Minimum interval to forward Router Advertisement frames to Host. Minimum value = 60 secs.</description_user>
+ <type>uint32</type>
+ <range_min>60</range_min><range_max>4294967285</range_max><default>60</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- End of Router Advertisement Rate Reduction MIBs -->
+ <config_element name="unifiFragmentationDuration" psid="2524">
+ <description_user>A limit on transmission time for a data frame. If the data payload would take longer than unifiFragmentationDuration to transmit, UniFi will attempt to fragment the frame to ensure that the data portion of each fragment is within the limit. The limit imposed by the fragmentation threshold is also respected, and no more than 16 fragments may be generated. If the value is zero no limit is imposed. The value may be changed dynamically during connections. Note that the limit is a guideline and may not always be respected. In particular, the data rate is finalised after fragmentation in order to ensure responsiveness to conditions, the calculation is not performed to high accuracy, and octets added during encryption are not included in the duration calculation.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMLMEScanMaxAerials" psid="2607">
+ <description_user>Limit the number of Aerials that Scan will use.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelRule" psid="2003">
+ <description_user>Rules for channel scanners.</description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>4</range_max><default>{ 0x00, 0x01, 0x00, 0x01 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelMaxScanTime" psid="2001">
+ <description_user>Test only: overrides max_scan_time. 0 indicates not used.</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanChannelProbeInterval" psid="2002">
+ <description_user>Test only: overrides probe interval. 0 indicates not used.</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanDeltaRSSIThreshold" psid="2010">
+ <description_user>Magnitude of the change in RSSI for which a scan result will be issued. In dB.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>20</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanHighRSSIThreshold" psid="2008">
+ <description_user>Minimum RSSI, in dB, for a scan indication to be kept.</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-90</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanMaximumResults" psid="2015">
+ <description_user>Max number of scan results, per sps, which will be stored before the oldest result is discarded, irrespective of its age. The value 0 specifies no maximum.</description_user>
+ <type>uint16</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanContinueIfMoreThanXAps" psid="5410">
+ <description_user>Part of Scan Algorithm: Keep scanning on a channel with lots of APs.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanStopIfLessThanXNewAps" psid="5411">
+ <description_user>Part of Scan Algorithm: Stop scanning on a channel if less than X NEW APs are seen.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiScanMultiVifActivated" psid="5412">
+ <description_user>Part of Scan Algorithm: Activate support for Multi Vif channel times.</description_user>
+ <type>boolean</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiScanNewAlgorithmActivated" psid="5413">
+ <description_user>Part of Scan Algorithm: Activate support for the new algorithm. </description_user>
+ <type>boolean</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiMLMEScanStopIfLessThanXFrames" psid="2088">
+ <description_user>Stop scanning on a channel if less than X Beacons or Probe Responses are received.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiAPAssociationTimeout" psid="2089">
+ <description_user>SoftAP: Permitted time for a station to complete associatation with FW acting as AP in milliseconds.</description_user>
+ <type>uint16</type>
+ <default>2000</default>
+ <nature>software</nature><module>mlme</module><!-- ap -->
+ </config_element>
+ <config_element name="unifiBSSMaxIdlePeriodActivated" psid="2508">
+ <description_user>If set STA will configure keep-alive with options specified in a received BSS max idle period IE</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBSSMaxIdlePeriod" psid="2488">
+ <description_user>BSS Idle MAX Period. Used to cap the value coming from BSS Max Idle Period IE, in seconds</description_user>
+ <type>uint16</type>
+ <units>second</units>
+ <range_max>300</range_max><default>300</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDmsActivated" psid="2513">
+ <description_user>Activate Directed Multicast Service (DMS)</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEStationInactivityTimeOut" psid="2098">
+ <description_user>Timeout, in seconds, for instigating ConnectonFailure procedures. Setting it to less than 3 seconds may result in frequent disconnection or roaming with the AP.
+ Disable with Zero. Values lower than INACTIVITY_MINIMUM_TIMEOUT becomes INACTIVITY_MINIMUM_TIMEOUT.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMECliInactivityTimeOut" psid="2099">
+ <description_user>Timeout, in seconds, for instigating ConnectonFailure procedures. Zero value disables the feature. Any value written lower than INACTIVITY_MINIMUM_TIMEOUT becomes INACTIVITY_MINIMUM_TIMEOUT.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEStationInitialKickTimeOut" psid="2100">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Timeout, in milliseconds, for sending the AP a NULL frame to kick off the EAPOL exchange.</description_user>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMLMEDataReferenceTimeout" psid="2005">
+ <description_user>Maximum time, in TU, allowed for the data in data references corresponding to MLME primitives to be made available to the firmware. The special value 0 specifies an infinite timeout.</description_user>
+ <description_internal>Note that the default has to be sufficient to allow for any MLME-SET.request used to set a different value! The value 65535 is reserved for future internal expansion (infinite timeout).</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_max>65534</range_max><default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPowerManagementDelayTimeout" psid="2514">
+ <description_user>When UniFi enters power save mode it signals the new state by setting the power management bit in the frame control field of a NULL frame. It then remains active for the period since the previous unicast reception, or since the transmission of the NULL frame, whichever is later. This entry controls the maximum time during which UniFi will continue to listen for data. This allows any buffered data on a remote device to be cleared. Specifies an upper limit on the timeout. UniFi internally implements a proprietary algorithm to adapt the timeout depending upon the situation.This is used by firmware when current station VIF is only station VIF which can be scheduled</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>30000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiConcurrentPowerManagementDelayTimeout" psid="2516">
+ <description_user>When UniFi enters power save mode it signals the new state by setting the power management bit in the frame control field of a NULL frame. It then remains active for the period since the previous unicast reception, or since the transmission of the NULL frame, whichever is later. This entry controls the maximum time during which UniFi will continue to listen for data. This allows any buffered data on a remote device to be cleared. This is same as unifiPowerManagementDelayTimeout but this value is considered only when we are doing multivif operations and other VIFs are waiting to be scheduled.Note that firmware automatically chooses one of unifiPowerManagementDelayTimeout and unifiConcurrentPowerManagementDelayTimeout depending upon the current situation.It is sensible to set unifiPowerManagementDelayTimeout to be always more thanunifiConcurrentPowerManagementDelayTimeout.</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>10000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDisableLegacyPowerSave" psid="2510">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: This affects Station VIF power save behaviour.
+ Setting it to true will disable legacy power save (i.e. we wil use fast power save to retrieve data)
+ Note that actually disables full power save mode (i.e sending trigger to retrieve frames which will be PS-POLL for legacy and QOS-NULL for UAPSD)</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugForceActive" psid="2511">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Force station power save mode to be active (when scheduled).
+ VIF scheduling, coex and other non-VIF specific reasons could still force power save on the VIF.
+ Applies to all VIFs of type station (includes P2P client).
+ Changes to the mib will only get applied after next host/mlme power management request.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMIFOffAllowed" psid="2271">
+ <description_user> Allow MIF to be turned off. If set to TRUE, it will prevent MIF to be turned off while WLAN is running. Disabling the mib will prevent to enter idle mode lite or idle mode medium </description_user>
+ <type>boolean</type>
+ <default>true</default>
+ </config_element>
+ <config_element name="unifiAPIdleModeEnabled" psid="2497">
+ <description_user>Enables AP Idle mode which can transmit beacons in MIFLess mode, if softAP is active, and there has been no activity for a time.
+ This mib has priority over unifiIdleModeLiteEnabled. If unifiAPIdleEnabled is enabled, Idle Mode Lite won't be activated.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdleModeLiteEnabled" psid="2526">
+ <description_user>Enables Idle Mode Lite, if softAP is active, and there has been no activity for a time.
+ Idle mode lite should not be active if host has sent a command to change key.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdleModeEnabled" psid="2527">
+ <description_user>Enables Idle Mode, if single vif station is active or there is no vif, and there has been no activity for a time.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSTAIdleModeEnabled" psid="2493">
+ <description_user>Enables STA Idle mode, if single vif station is active and there has been no activity for a time.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMacrameDebugStats" psid="2215">
+ <description_user>MACRAME debug stats readout key. Use set to write a debug readout, then read the same key to get the actual readout.</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="false"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiARPDetectActivated" psid="2246">
+ <description_user>Activate feature support for Enhanced ARP Detect. This is required by Volcano.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRttCapabilities" psid="5300">
+ <description_user>RTT capabilities of the chip. see SC-506960-SW.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <default>{ 0x01, 0x01, 0x01, 0x01, 0x00, 0x07, 0x1c, 0x32 }</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFtmMinDeltaFrames" psid="5301">
+ <description_user>Default minimum time between consecutive FTM frames in units of 100 us. </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmPerBurst" psid="5302">
+ <description_user>Requested FTM frames per burst. </description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>31</range_max><default>4</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmBurstDuration" psid="5303">
+ <description_user>indicates the duration of a burst instance, values 0, 1, 12-14 are reserved,
+ [2..11], the burst duration is defined as (250 x 2)^(N-2), and 15 means "no preference". </description_user>
+ <type>uint16</type>
+ <range_min>2</range_min><range_max>11</range_max><default>6</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmNumOfBurstsExponent" psid="5304">
+ <description_user>The number of burst instances is 2^(Number of Bursts Exponent), value 15 means "no preference". </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>14</range_max><default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmASAPModeActivated" psid="5305">
+ <description_user>Activate support for ASAP mode in FTM</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmResponderActivated" psid="5306">
+ <description_user>Activate support for FTM Responder</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultSessionEstablishmentTimeout" psid="5307">
+ <description_user>Default timeout for session estabishmant in units of ms. </description_user>
+ <type>uint16</type><range_min>10</range_min><range_max>100</range_max>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultGapBetweenBursts" psid="5309">
+ <description_user>Interval between consecutive Bursts. In units of ms. </description_user>
+ <type>uint16</type><range_min>5</range_min><range_max>50</range_max>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultTriggerDelay" psid="5310">
+ <description_user>Delay to account for differences in time between Initiator and Responder at start of the Burst. In units of ms. </description_user>
+ <type>uint16</type><range_min>0</range_min><range_max>100</range_max>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDefaultEndBurstDelay" psid="5311">
+ <description_user>Delay to account for differences in time between Initiator and Responder at the end of the Burst. In units of ms. </description_user>
+ <type>uint16</type><range_min>0</range_min><range_max>100</range_max>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmRequestValidationEnabled" psid="5312">
+ <description_user>Enable Validation for FTM Add Range request RTT_Configs</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmResponseValidationEnabled" psid="5313">
+ <description_user>Enable Validation for FTM Response</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmUseResponseParameters" psid="5314">
+ <description_user>Use Response burst parameters for burst</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmInitialResponseTimeout" psid="5315">
+ <description_user>Default timeout for FtmInitialResponse in units of ms. </description_user>
+ <type>uint16</type><range_min>10</range_min><range_max>100</range_max>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmDSPInpBW" psid="5320">
+ <description_user>Input BW parameter to fed into DSP </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmOFDMCutOffset" psid="5321">
+ <description_user>Input OFDM cut offset to DSP </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFtmMeanAroundCluster" psid="5322">
+ <description_user>Whether to get simple mean or mean around cluster</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANActivated" psid="6080">
+ <description_user>Activate Neighbour Aware Networking (NAN)</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANBeaconCapabilities" psid="6081">
+ <description_user>The 16-bit field follows the coding of IEEE 802.11 Capability Information.</description_user>
+ <type>uint16</type>
+ <default>0x0620</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentClusters" psid="6082">
+ <description_user>Maximum number of concurrent NAN clusters supported.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentPublishes" psid="6083">
+ <description_user>Maximum number of concurrent NAN Publish instances supported.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxConcurrentSubscribes" psid="6084">
+ <description_user>Maximum number of concurrent NAN Subscribe instances supported.</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxServiceNameLength" psid="6085">
+ <description_user>Maximum Service Name Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxMatchFilterLength" psid="6086">
+ <description_user>Maximum Match Filter Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxTotalMatchFilterLength" psid="6087">
+ <description_user>Maximum Total Match Filter Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxServiceSpecificInfoLength" psid="6088">
+ <description_user>Maximum Service Specific Info Length.</description_user>
+ <type>uint16</type>
+ <default>255</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxVSADataLength" psid="6089">
+ <description_user>Maximum Vendor Specific Attribute Data Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxMeshDataLength" psid="6090">
+ <description_user>Maximum Mesh Data Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxNDIInterfaces" psid="6091">
+ <description_user>Maximum NDI Interfaces. Note: This does not affect number of NDL Vifs supported by FW as they are hard coded.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxNDPSessions" psid="6092">
+ <description_user>Maximum NDP Sessions.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMaxAppInfoLength" psid="6093">
+ <description_user>Maximum App Info Length.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMatchExpirationTime" psid="6094">
+ <description_user>Time limit in which Mlme will expire a match for discovered service.</description_user>
+ <type>uint16</type>
+ <units>seconds</units>
+ <default>60</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANDefaultScanDwellTime" psid="6095">
+ <description_user>The default value of scan swell time in ms for each band.</description_user>
+ <units>milliseconds</units>
+ <type>uint16</type>
+ <table_name>unifiNANDefaultScanDwellTimeTable</table_name>
+ <default_list>
+ <default index1="1">200</default>
+ <default index1="2">200</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANDefaultScanPeriod" psid="6096">
+ <description_user>The default value of scan period in seconds for each band.</description_user>
+ <units>seconds</units>
+ <type>uint16</type>
+ <table_name>unifiNANDefaultScanPeriodTable</table_name>
+ <default_list>
+ <default index1="1">20</default>
+ <default index1="2">20</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNANMaxChannelSwitchTime" psid="6097">
+ <description_user>Maximum Channel Switch Time.</description_user>
+ <type>uint16</type>
+ <default>5000</default>
+ <units>microseconds</units>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiNANMacRandomisationActivated" psid="6098">
+ <description_user>Enabling Mac Address Randomisation for NMI address.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- PSID Range 6080-6099 Reserved for NAN -->
+ <!-- <config_element name="ReservedForNAN" psid="6098"> -->
+ <!-- <config_element name="ReservedForNAN" psid="6099"> -->
+ <!-- PSID Range 6080-6099 Reserved for NAN -->
+
+ <config_element name="unifiLowPowerRxConfig" psid="6018">
+ <description_user>Enables low power radio RX for idle STA and AP VIFs respectively.
+ Setting/clearing bit 0 enables/disabled LP RX for (all) STA/Cli VIFs.
+ Setting/clearing bit 1 enables/disabled LP RX for AP/GO VIFs.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiStationActivityIdleTime" psid="2512">
+ <description_user>Time since last station activity when it can be considered to be idle. Only used in SoftAP mode when determining if all connected stations are idle (not active).</description_user>
+ <type>uint32</type>
+ <units>milliseconds</units>
+ <default>500</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiApBeaconMaxDrift" psid="2507">
+ <description_user>The maximum drift in microseconds we will allow for each beacon sent when we're trying to move it to get a 50% duty cycle between GO and STA in multiple VIF scenario. We'll delay our TX beacon by a maximum of this value until we reach our target TBTT. We have 3 possible cases for this value: a) ap_beacon_max_drift = 0x0000 - Feature disabled b) ap_beacon_max_drift between 0x0001 and 0xFFFE - Each time we transmit the beacon we'll move it a little bit forward but never more than this. (Not implemented yet) c) ap_beacon_max_drift = 0xFFFF - Move the beacon to the desired position in one shot.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>0xFFFF</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMacBeaconTimeout" psid="2270">
+ <description_user>The maximum time in microseconds we want to stall TX data when expecting a beacon at EBRT time as a station.</description_user>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>128</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSIMaxAveragingPeriod" psid="2210">
+ <description_user>Limits the period over which the value of unifiRSSI is averaged. If no more than unifiRSSIMinReceivedFrames frames have been received in the period, then the value of unifiRSSI is reset to the value of the next measurement and the rolling average is restarted. This ensures that the value is timely (although possibly poorly averaged) when little data is being received.</description_user>
+ <units>TU</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min>
+ <default>3000</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSIMinReceivedFrames" psid="2211">
+ <description_user>See the description of unifiRSSIMaxAveragingPeriod for how the combination of attributes is used.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min>
+ <default>2</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiCSROnlyEIFSDuration" psid="2362">
+ <description_user>Specifies time that is used for EIFS. A value of 0 causes the build in value to be used.</description_user>
+ <access_rights>read_only</access_rights>
+ <units>µs</units>
+ <type>uint16</type>
+ <default>12</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceChannelBW" psid="2370">
+ <description_user>Test only: Force channel bandwidth to specified value.
+ This can also be used to allow emulator/silicon back to back connection to communicate at bandwidth other than default (20 MHz)
+ Setting it to 0 uses the default bandwidth as selected by firmware. The change will be applied at next radio state change opportunity
+ channel_bw_20_mhz = 20,
+ channel_bw_40_mhz = 40,
+ channel_bw_80_mhz = 80
+ </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIqDebugEnabled" psid="2375">
+ <description_user>Send IQ capture data to host for IQ debug</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSwToHwQueueStats" psid="2250">
+ <description_user>The timing statistics of packets being queued between SW-HW</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiQueueStatsIdTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibqueuestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiHostToSwQueueStats" psid="2251">
+ <description_user>The timing statistics of packets being queued between HOST-SW</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiQueueStatsIdTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibqueuestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiQueueStatsEnable" psid="2252">
+ <description_user>Enables recording timing statistics of packets being queued between HOST-SW-HW</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRate" psid="2212">
+ <description_user>The rate corresponding to the current table entry. The value is rounded to the nearest number of units where necessary. Most rates do not require rounding, but when short guard interval is in effect the rates are no longer multiples of the base unit. Note that there may be two occurrences of the value 130: the first corresponds to MCS index 7, and the second, if present, to MCS index 6 with short guard interval.</description_user>
+ <description_internal>Get the rate for rate statistics table entry index.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <units>500 kbps</units>
+ <table_name>unifiRateStatsTable</table_name>
+ <function type="get" function_name="mibuint16get"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRxSuccessCount" psid="2206">
+ <description_user>The number of successful receptions of complete management and data frames at the rate indexed by unifiRateStatsIndex.This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsTxSuccessCount" psid="2207">
+ <description_user>The number of successful (acknowledged) unicast transmissions of complete data or management frames the rate indexed by unifiRateStatsIndex. This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRateStatsRTSErrorCount" psid="2358">
+ <description_user>The number of successive RTS failures.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRateStatsTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibratestatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTxDataConfirm" psid="2253">
+ <description_user>Allows to request on a per access class basis that an MA_UNITDATA.confirm be generated after each packet transfer. The default value is applied for all ACs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <table_name>unifiAcTxConfirmTable</table_name>
+ <function_list>
+ <function type="set" function_name="mibtxdatacfmset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiTxDataRate" psid="2208">
+ <description_user>The bit rate currently in use for transmissions of unicast data frames; On an infrastructure BSS, this is the data rate used in communicating with the associated access point, if there is none, an error is returned</description_user>
+ <description_internal>Request is made per-VIF. Rate is read from station records</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibtxdatarateget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLastBssTxDataRate" psid="2213">
+ <description_user>Last BSS Tx DataRate. See unifiTxDataRate description.</description_user>
+ <type>uint32</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRxDataRate" psid="2196">
+ <description_user>The bit rate of the last received frame on this VIF.</description_user>
+ <description_internal>Request is made per-VIF and only support for STA VIF type.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibrxdatarateget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiNoAckActivationCount" psid="2240">
+ <description_user>The number of frames that are discarded due to HW No-ack activated during test.
+ This number will wrap to zero after the range is exceeded.</description_user>
+ <description_internal>Number of discarded frames when HW No-ack is activated during test.</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRxFcsErrorCount" psid="2241">
+ <description_user>The number of received frames that are discarded due to bad FCS (CRC).
+ This number will wrap to zero after the range is exceeded.</description_user>
+ <description_internal>Number of discarded received frames due to bad FCS (CRC) as detected by the HW. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiReadReg" psid="8051">
+ <description_user>Read value from a register and return it.</description_user>
+ <description_internal> Register access function. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiReadRegTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibreadreg"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiReadHardwareCounter" psid="5087">
+ <description_user>Read a value from a hardware packet counter for a specific radio_id and return it. The firmware will convert the radio_id to the associated mac_instance.</description_user>
+ <description_internal> Hardware counter access function. </description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiReadHardwareCounterTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibreadhardwarecounter"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiHwTxTimeout" psid="2205">
+ <description_user>Maximum time in milliseconds for a frame to be queued in the hardware/DPIF.</description_user>
+ <type>uint16</type>
+ <units>milliseconds</units>
+ <default>512</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSwTxTimeout" psid="2204">
+ <description_user>Maximum time in seconds for a frame to be queued in firmware, ready to be sent, but not yet actually pumped to hardware.</description_user>
+ <type>uint16</type>
+ <units>second</units>
+ <default>5</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiSNR" psid="2202">
+ <description_user>Provides a running average of the Signal to Noise Ratio (dB) for packets received by UniFi's radio.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <function type="get" function_name="mibgetsnr" is_for_vif="true"></function>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLastBssSNR" psid="2203">
+ <description_user>Last BSS SNR. See unifiSNR description.</description_user>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSNRExtraOffsetCCK" psid="2209">
+ <description_user>This offset is added to SNR values received at 802.11b data rates. This accounts for differences in the RF pathway between 802.11b and 802.11g demodulators. The offset applies to values of unifiSNR as well as SNR values in scan indications. Not used in 5GHz mode.</description_user>
+ <units>dB</units>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <default>8</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiScanMaxProbeTransmitLifetime" psid="2531">
+ <description_user>In TU. If non-zero, used during active scans as the maximum lifetime for probe requests. It is the elapsed time after the initial transmission at which further attempts to transmit the probe are terminated.</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>64</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiProbeResponseLifetime" psid="2533"><!-- ap -->
+ <description_user>Lifetime of proberesponse frame in unit of ms.</description_user>
+ <type>uint16</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiProbeResponseLifetimeP2P" psid="2600">
+ <description_user>Lifetime of proberesponse frame in unit of ms for P2P.</description_user>
+ <type>uint16</type>
+ <default>500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiProbeResponseMaxRetry" psid="2534">
+ <description_user>Number of retries of probe response frame.</description_user>
+ <type>uint16</type>
+ <default>5</default>
+ <range_max>255</range_max>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiPowerSaveTransitionPacketThreshold" psid="2532">
+ <description_user>Golden Certification MIB don't delete, change PSID or name:If VIF has this many packets queued/transmitted/received in last unifiFastPowerSaveTransitionPeriod then firmware may decide to come out of aggressive power save mode. This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiTrafficAnalysisPeriod and unifiAggressivePowerSaveTransitionPeriod.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiTrafficAnalysisPeriod" psid="2535">
+ <description_user>Period in TUs over which firmware counts number of packet transmitted/queued/received to make decisions like coming out of aggressive power save mode or setting up BlockAck. This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiPowerSaveTransitionPacketThreshold, unifiAggressivePowerSaveTransitionPeriod and unifiTrafficThresholdToSetupBA.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>200</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAggressivePowerSaveTransitionPeriod" psid="2536">
+ <description_user>Defines how many unifiExitPowerSavePeriod firmware should wait in which VIF had received/transmitted/queued less than unifiPowerSaveTransitionPacketThreshold packets - before entering aggressive power save mode (when not in aggressive power save mode) This is applicable to STA/CLI and AP/GO VIFs. Note that this is only a guideline. Firmware internal factors may override this MIB. Also see unifiPowerSaveTransitionPacketThreshold and unifiTrafficAnalysisPeriod.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>5</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiActiveTimeAfterMoreBit" psid="2537">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: After seeing the "more" bit set in a message from the AP, the STA will goto active mode for this duration of time. After this time, traffic information is evaluated to determine whether the STA should stay active or go to powersave. Setting this value to 0 means that the described functionality is disabled.</description_user>
+ <type>uint32</type>
+ <units>TU</units>
+ <default>30</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiMAXVifScheduleDuration" psid="2541">
+ <description_user>Default time for which a non-scan VIF can be scheduled. Applies to multiVIF scenario. Internal firmware logic or BSS state (e.g. NOA) may cut short the schedule.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>50</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiVifLongIntervalTime" psid="2542">
+ <description_user>When the scheduler expects a VIF to schedule for time longer than this parameter (specified in TUs), then the VIF may come out of powersave. Only valid for STA VIFs.</description_user>
+ <type>uint16</type>
+ <units>TU</units>
+ <default>60</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiUartConfigure" psid="2110">
+ <description_user>UART configuration using the values of the other unifiUart* attributes. The value supplied for this attribute is ignored.</description_user>
+ <is_internal>true</is_internal>
+ <type>uint16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiUartPios" psid="2111">
+ <description_user>Specification of which PIOs should be connected to the UART. Currently defined values are: 1 - UART not used; all PIOs are available for other uses. 2 - Data transmit and receive connected to PIO[12] and PIO[14] respectively. No hardware handshaking lines. 3 - Data and handshaking lines connected to PIO[12:15].</description_user>
+ <is_internal>true</is_internal>
+ <type>unifiUartPios</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiWatchdogTimeout" psid="2152">
+ <description_user>Maximum time the background may be busy or locked out for. If this time is exceeded, UniFi will reset. If this key is set to 65535 then the watchdog will be disabled.</description_user>
+ <units>ms</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <range_min>1</range_min><default>1500</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLoggerEnabled" psid="2320">
+ <description_user>Enable reporting of the following events for Android logging:
+ - firmware connectivity events
+ - fate of management frames sent by the host through the MLME SAP
+ It can take the following values:
+ - 0: reporting for non mandetory triggers disabled. EAPOL, security, btm frames and roam triggers are reported.
+ - 1: partial reporting is enabled. Beacons frames will not be reported.
+ - 2: full reporting is enabled. Beacons frames are included.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiWifiLogger</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiLoggerMaxDelayedEvents" psid="6124">
+ <description_user>Maximum number of events to keep when host is suspended.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMaPacketFateEnabled" psid="2321">
+ <description_user>Enable reporting of the fate of the TX packets sent by the host.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRameUpdateMibs" psid="2547">
+ <description_user>Deprecated</description_user>
+ <type>boolean</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiForceShortSlotTime" psid="5080">
+ <description_user>If set to true, forces FW to use short slot times for all VIFs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRSSI" psid="2200">
+ <description_user>Running average of the Received Signal Strength Indication (RSSI) for packets received by UniFi's radio. The value should only be treated as an indication of the signal strength; it is not an accurate measurement. The result is only meaningful if the unifiRxExternalGain attribute is set to the correct calibration value. If UniFi is part of a BSS, only frames originating from devices in the BSS are reported (so far as this can be determined). The average is reset when UniFi joins or starts a BSS or is reset.</description_user>
+ <description_internal>Use the lack of a (default) value to signal to rame that the RSSI hasn't been calibrated, and thus calls to mibgetrssi() will return FALSE. </description_internal>
+ <units>dBm</units>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <function type="get" function_name="mibgetrssi" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLastBssRSSI" psid="2201">
+ <description_user>Last BSS RSSI. See unifiRSSI description.</description_user>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerBandwidth" psid="2094">
+ <description_user>The bandwidth used with peer station prior it disconnects</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentPeerNss" psid="2095">
+ <description_user>The number of spatial streams used with peer station prior it disconnects: BIG DATA</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerTxDataRate" psid="2096">
+ <description_user>The tx rate that was used for transmissions prior disconnection</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRSSI" psid="2097">
+ <description_user>The recorded RSSI from peer station prior it disconnects</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRxRetryCount" psid="2198">
+ <description_user>The number of retry packets from peer station</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPeerRxMulticastCount" psid="2199">
+ <description_user>The number of multicast and broadcast packets received from peer station</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>unifiPeerIdTable</table_name>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiAgcThresholds" psid="5095">
+ <description_user>AGC Thresholds settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiAgcThresholdsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxSettings" psid="5031">
+ <description_user>Hardware specific transmitter settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxSettingsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxGainSettings" psid="5032">
+ <description_user>Hardware specific transmitter gain settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxGainSettingsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPowerDetectorResponse" psid="5055">
+ <description_user>Hardware specific transmitter detector response settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxPowerDetectorResponseTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDetectorTemperatureCompensation" psid="5056">
+ <description_user>Hardware specific transmitter detector temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxDetectorTemperatureCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDetectorFrequencyCompensation" psid="5057">
+ <description_user>Hardware specific transmitter detector frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxDetectorFrequencyCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOpenLoopTemperatureCompensation" psid="5058">
+ <description_user>Hardware specific transmitter open-loop temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOpenLoopTemperatureCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOpenLoopFrequencyCompensation" psid="5059">
+ <description_user>Hardware specific transmitter open-loop frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOpenLoopFrequencyCompensationTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdTemperatureCompensation" psid="5066">
+ <description_user>Hardware specific transmitter PA gain for DPD temperature compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxPaGainDpdTemperatureCompensationTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPaGainDpdFrequencyCompensation" psid="5067">
+ <description_user>Hardware specific transmitter PA gain for DPD frequency compensation settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxPaGainDpdFrequencyCompensationTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxFtrimSettings" psid="2372">
+ <description_user>Hardware specific transmitter frequency compensation settings</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxFtrimSettingsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxGainStepSettings" psid="5081">
+ <description_user>Hardware specific transmitter gain step settings.
+ 2G settings before 5G. Increasing order within band.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiTxGainStepSettingsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxOfdmSelect" psid="5060">
+ <description_user>Hardware specific transmitter OFDM selection settings</description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>8</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxDigGain" psid="5061">
+ <description_user>Specify gain specific modulation power optimisation.</description_user>
+ <type>octet_string</type>
+ <range_min>16</range_min><range_max>48</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiStaticDpdGain" psid="5097">
+ <description_user>Specify modulation specifc gains for static dpd optimisation.</description_user>
+ <type>octet_string</type>
+ <range_min>11</range_min><range_max>27</range_max>
+ <table_name>unifiStaticDpdGainTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiChipTemperature" psid="5062">
+ <description_user>Read the chip temperature as seen by WLAN radio firmware.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <units>celcius</units>
+ <function type="get" function_name="mibint16get"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="UnifiBatteryVoltage" psid="5063">
+ <description_user>Battery voltage</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <units>millivolt</units>
+ <function type="get" function_name="mibuint16get"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiLoadDpdLut" psid="2255">
+ <description_user>Write a static DPD LUT to the FW, read DPD LUT from hardware</description_user>
+ <description_internal>the set function writes static dpd lut values from hcf into firmware, the get function reads from hardware</description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiOverrideDpdLut" psid="2258">
+ <description_user>Write a DPD LUT directly to the HW</description_user>
+ <description_internal>Used for Matlab characterisation by writing a previously calculated and (possibly) smoothed LUT to the HW. The primary need for this is because writing the LUT directly in Matlab is very slow and hence impractical for any characterisation work. </description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiLoadDpdLutPerRadio" psid="2280">
+ <description_user>Write a static DPD LUT to the FW, read DPD LUT from hardware (for devices that support multiple radios)</description_user>
+ <description_internal>the set function writes static dpd lut values from hcf into firmware, the get function reads from hardware</description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTablePerRadio</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiOverrideDpdLutPerRadio" psid="2281">
+ <description_user>Write a DPD LUT directly to the HW (for devices that support multiple radios)</description_user>
+ <description_internal>Used for Matlab characterisation by writing a previously calculated and (possibly) smoothed LUT to the HW. The primary need for this is because writing the LUT directly in Matlab is very slow and hence impractical for any characterisation work. </description_internal>
+ <type>octet_string</type>
+ <range_min>147</range_min><range_max>147</range_max>
+ <function_list>
+ <function type="set" function_name="mibricedpdlutset"></function>
+ </function_list>
+ <table_name>unifiLoadDpdLutTablePerRadio</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdPredistortGains" psid="2257">
+ <description_user>DPD pre-distort gains. Takes a range of frequencies, where
+ f_min <= f_channel < f_max.
+ The format is [freq_min_msb, freq_min_lsb, freq_max_msb, freq_max_lsb,
+ DPD policy bitmap, bandwidth_bitmap, power_trim_enable,
+ OFDM0_gain, OFDM1_gain, CCK_gain, TR_gain,
+ CCK PSAT gain, OFDM PSAT gain].</description_user>
+ <type>octet_string</type>
+ <range_min>14</range_min><range_max>14</range_max>
+ <table_name>unifiDpdPredistortGainsTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdMasterSwitch" psid="2256">
+ <description_user>Enables Digital Pre-Distortion</description_user>
+ <description_internal>Bitmask of DPD features to enable for testing, requires d01_d01 or later. </description_internal>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCCAMasterSwitch" psid="5102">
+ <description_user>Enables CCA</description_user>
+ <description_internal>Bitmask of CCA features to enable. Note MIB is not live, value will get loaded to hardware after radio is switched on. The least significant word is for config of ETSI regulatory domain 80Mhz p0 and p4, the other word is for all other configurations.</description_internal>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmacconfiggenericset" is_for_vif="false"></function>
+ </function_list>
+ <default>0x00540050</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxSyncCCACfg" psid="5103">
+ <description_user>Configures CCA per 20 MHz sub-band.</description_user>
+ <description_internal>Configure to take into account the CCA of each 20M subband for the primary channel.</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiFleximacCcaEdEnable" psid="5116">
+ <description_user>Enable/disable CCA-ED in Fleximac.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiMacCCABusyTime" psid="5104">
+ <description_user>Counts the time CCA indicates busy</description_user>
+ <description_internal>This register counts the time CCA indicates busy (for pri20/sec20 and sec40), in units of 16 us.</description_internal>
+ <table_name>unifiMacBusyTimeTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiMacSecChanClearTime" psid="5105">
+ <description_user>Configures PIFS</description_user>
+ <description_internal>Secondary Channel must be free for this amount of time (50ns unit) before it is declared non-busy for starting a Txop. Related to PIFS.</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmacconfiggenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmacconfiggenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdDebug" psid="5106">
+ <description_user>Debug MIBs for DPD</description_user>
+ <table_name>unifiDpdDebugTable</table_name>
+ <default_list>
+ <default index1="1"> 170 </default> <!-- LUT_QUALITY_THRESHOLD = 0xaa = 170 -->
+ <default index1="2"> 3 </default> <!-- LUT_RETRIM_LIMIT = 3 -->
+ </default_list>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <type>uint32</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCCACSThresh" psid="5101">
+ <description_user>Configures CCA CS thresholds.</description_user>
+ <description_internal>Configures CCA CS (packet sync) thresholds. Indexed by siso/mimo.</description_internal>
+ <table_name>unifiCCACSThreshTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemgenericget" is_for_vif="false"></function>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCoexDebugOverrideBt" psid="2425">
+ <description_user>Enables overriding of all BT activities by WLAN. </description_user>
+ <description_internal>When this MIB is set then no macrame blackouts are registered for any BT activities
+ and also WLAN trumps all BT activities at the HW CDL arbitration level. This MIB should be enabled only for debugging
+ purposes. This MIB will only have an effect when its either compiled into the FW image or is configured at WLAN boot via
+ an hcf file.
+ </description_internal>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiTxPowerTrimConfig" psid="5072">
+ <description_user>Hardware specific transmitter power trim settings</description_user>
+ <description_internal>Configuration settings for the TX power trim.
+ The format is [rf_chip_bitmap_lso, rf_chip_bitmap_mso
+ radio_id, band,
+ pcal_ofdm0_to_cck_mso, pcal_ofdm0_to_cck_lso,
+ pcal_ofdm0_to_ofdm1_mso, pcal_ofdm0_to_ofdm1_lso,
+ pcal_20_to_80_mso, pcal_20_to_80_lso,
+ pcal_20_to_40_mso, pcal_20_to_40_lso,
+ psat_dig_gain, psat_v2i_gain, psat_mix_gain, psat_drv_gain, psat_pa_gain,
+ psat_power_ref_mso, psat_power_ref_lso,
+ psat_drv_bias, psat_pa_bias,
+ max_adjust_up_mso, max_adjust_up_lso,
+ max_adjust_down_mso, max_adjust_down_lso].</description_internal>
+ <type>octet_string</type>
+ <range_min>25</range_min><range_max>25</range_max>
+ <table_name>unifiTxPowerTrimConfigTable</table_name>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxPowerTrimCommonConfig" psid="2374">
+ <description_user>Common transmitter power trim settings</description_user>
+ <description_internal>Common configuration settings for the TX power trim</description_internal>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiClearRadioTrimCache" psid="5088">
+ <description_user>Clears the radio trim cache. The parameter is ignored.</description_user>
+ <description_internal>Invalidates all entries in the trim cache. </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNannyTemperatureReportDelta" psid="5109">
+ <description_user>A temperature difference, in degrees Celsius, above which the nanny process will generate a temperature update debug word </description_user>
+ <description_internal>This delta will be used in NANNY</description_internal>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ </config_element>
+ <config_element name="unifiNannyTemperatureReportInterval" psid="5110">
+ <description_user>A report interval in milliseconds where temperature is checked</description_user>
+ <description_internal>This interval will be used in NANNY</description_internal>
+ <type>uint16</type>
+ <default>200</default>
+ <nature>software</nature>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ </config_element>
+ <config_element name="unifiLteMailbox" psid="2430">
+ <description_user>Set modem status to simulate lte status updates. See SC-505775-SP for API description.
+ Defined as array of uint32 represented by the octet string
+ FOR TEST PURPOSES ONLY
+ </description_user>
+ <description_internal>This MIB simulates writing to mailbox for LTE signalling. Used for test purposes only.
+ First byte of the octet string maps to LSB of the first uint32 in the array.
+ First 4 octets maps to 32 bits in register-0 of SC-505775-SP section 3.
+ And so on.
+ The size of this MIB allows for the 9 32bit registers to be mimicked and, optionally, the 10th word (the checksum).
+ The checksum is not validated by wlan fw, so it is not necessary for WLAN cats/unit tests to populate this field.
+ And example for Band40 is
+ { 0x05, 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA8, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
+ </description_internal>
+ <type>octet_string</type>
+ <range_min>36</range_min><range_max>40</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteMwsSignal" psid="2431">
+ <description_user>Set modem status to simulate lte status updates. See SC-505775-SP for API description. See unifiLteSignalsBitField for enum bitmap.
+ FOR TEST PURPOSES ONLY
+ </description_user>
+ <description_internal> Bitmap of LTE signals.
+ </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltemwssignal" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableChannelAvoidance" psid="2432">
+ <description_user>Enables channel avoidance scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the channel avoidance scheme is enabled in softAP/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnablePowerBackoff" psid="2433">
+ <description_user>Enables power backoff scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the power backoff scheme is enabled in STA/AP/CLI/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableTimeDomain" psid="2434">
+ <description_user>Enables TDD scheme for LTE Coex </description_user>
+ <description_internal>When this MIB is enabled the time domain scheme is enabled in STA/AP/CLI/GO
+ mode to mitigate interference from LTE Modem.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteEnableLteCoex" psid="2435">
+ <description_user>Enables LTE Coex support </description_user>
+ <description_internal>When this MIB is enabled WLAN registers for LTE signals with common code.
+ </description_internal>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffChannels" psid="2436">
+ <description_user>Defines channels to which power backoff shall be applied when LTE operating on Band40.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to which power backoff shall be applied when LTE operating
+ on Band40 when LTE Power Back feature is enabled. The first octet is the first channel in a range of channels. The second octet
+ is the upper channel of this range. EG { 0x01, 0x07 } describes the range from channel 1 to channel 7.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x01, 0x02 }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpLow" psid="2437">
+ <description_user>WLAN Power Reduction shall be applied when RSRP of LTE operating on band 40 falls below this level</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <default>-100</default>
+ <range_min>-140</range_min><range_max>-77</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpHigh" psid="2438">
+ <description_user>WLAN Power Reduction shall be restored when RSRP of LTE operating on band 40 climbs above this level</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <default>-95</default>
+ <range_min>-140</range_min><range_max>-77</range_max>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40PowerBackoffRsrpAveragingAlpha" psid="2439">
+ <description_user>Weighting applied when calculaing the average RSRP when considering Power Back Off
+ Specifies the percentage weighting (alpha) to give to the most recent value when calculating the moving average.
+ ma_new = alpha * new_sample + (1-alpha) * ma_old.</description_user>
+ <units>percentage</units>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetChannel" psid="2440">
+ <description_user>Enables LTE Coex support </description_user>
+ <description_internal>When this MIB is enabled WLAN registers for LTE signals with common code.
+ </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetchannel" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetPowerBackoff" psid="2441">
+ <description_user>MIB to force WLAN Power Backoff for LTE COEX testing purposes</description_user>
+ <description_internal>Setting this MIB shall cause power backoff to be asserted in MLME.on the specified channel_mask
+ Note the power reduction applied is specified by unifiLteCoexPowerReduction as per normal operation</description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetpowerbackoff" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteSetTddDebugMode" psid="2442">
+ <description_user>MIB to enable LTE TDD COEX simulation for testing purposes</description_user>
+ <description_internal>Setting this MIB shall cause coex module to simulate periodic MWS_FRAME_SYNC signalling in various modes,
+ for the purpose of testing LTE/WLAN Time Domain Coex functionality. The debug module shall also use CDL hardware to interfere
+ with WLAN Tx and Rx operation to approximate impact of LTE on WLAN.
+ Mode (0): disabled.
+ Mode (1): no drift in frame sync simulated </description_internal>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibltesetltetdddebugmode" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand40AvoidChannels" psid="2443">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 40 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 40 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x01, 0x05 } describes the range from channel 1 to channel 5.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 40.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x01, 0x05 }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand41AvoidChannels" psid="2444">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 41 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 41 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x04, 0x0D } describes the range from channel 4 to channel 13.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 41.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x04, 0x0D }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiLteBand7AvoidChannels" psid="2445">
+ <description_user>MIB to define WLAN channels to avoid when LTE Band 7 in use.</description_user>
+ <description_internal>This MIB defines the range of WLAN channels to avoid when LTE Band 41 is in use and LTE Channel Avoidance
+ feature is enabled. The first octet is the first channel in a range of channels to avoid. The second octet is the upper channel
+ of this range. EG { 0x09, 0x0D } describes the range from channel 9 to channel 13.
+ Setting this MIB to { 0x00, 0x00 } will disable channel avoidance for LTE Band 41.</description_internal>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>2</range_max><default>{ 0x09, 0x0D }</default>
+ <nature>software</nature><module>coex</module>
+ </config_element>
+ <config_element name="unifiRxAgcControl" psid="4079">
+ <description_user>Override the AGC by adjusting the Rx minimum and maximum gains of each stage.
+ Set requests write the values to a static structure in
+ mac/hal/halradio/halradio_agc.c. The saved values are written
+ to the Jar register WLRF_RADIO_AGC_CONFIG2 and to the Night registers
+ WL_RADIO_AGC_CONFIG2 and WL_RADIO_AGC_CONFIG3. The saved values are also
+ used to configure the AGC whenever halradio_agc_setup() is called.
+ Get requests read the values from the static structure in
+ mac/hal/halradio/halradio_agc.c.
+ AGC enables are not altered. Fixed gain may be tested by setting the
+ minimums and maximums to the same value.
+
+ Version.
+ octet 0 - Version number for this mib.
+ Gain values. Default in brackets.
+ octet 1 - 5G LNA minimum gain (0).
+ octet 2 - 5G LNA maximum gain (4).
+ octet 3 - 2G LNA minimum gain (0).
+ octet 4 - 2G LNA maximum gain (5).
+ octet 5 - Mixer minimum gain (0).
+ octet 6 - Mixer maximum gain (2).
+ octet 7 - ABB minimum gain (0).
+ octet 8 - ABB maximum gain (27).
+ octet 9 - Digital minimum gain (0).
+ octet 10 - Digital maximum gain (7).
+
+ For Rock / Hopper the saved values are written to the
+ Hopper register WLRF_RADIO_AGC_CONFIG2_I0, WLRF_RADIO_AGC_CONFIG2_I1
+ and Rock registers WL_RADIO_AGC_CONFIG3_I0, WL_RADIO_AGC_CONFIG3_I1
+
+ Version.
+ octet 0 - Version number for this mib.
+ Gain values. Default in brackets.
+ octet 1 - 5G FE minimum gain (1).
+ octet 2 - 5G FE maximum gain (8).
+ octet 3 - 2G FE minimum gain (0).
+ octet 4 - 2G FE maximum gain (8).
+ octet 5 - ABB minimum gain (0).
+ octet 6 - ABB maximum gain (8).
+ octet 7 - Digital minimum gain (0).
+ octet 8 - Digital maximum gain (17).</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>11</range_max>
+ <function_list>
+ <function type="get" function_name="mibbmsgget" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLossFrequency" psid="5033">
+ <description_user>The corresponding set of frequency values for TxAntennaConnectionLossTable</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaConnectionLossTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaConnectionLoss" psid="5034">
+ <description_user>The set of Antenna Connection Loss value (qdB), which is used for TPO/EIRP conversion</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaConnectionLossTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGainFrequency" psid="5035">
+ <description_user>The corresponding set of frequency values for TxAntennaMaxGain</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaMaxGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTxAntennaMaxGain" psid="5036">
+ <description_user>The set of Antenna Max Gain value (qdB), which is used for TPO/EIRP conversion</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiTxAntennaMaxGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxExternalGainFrequency" psid="5037">
+ <description_user>The set of RSSI offset value</description_user>
+ <type>uint16</type>
+ <range_min>3940</range_min><range_max>12000</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxExternalGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxExternalGain" psid="5038">
+ <description_user>The table giving frequency-dependent RSSI offset value</description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxExternalGainTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxRssiAdjustments" psid="5115">
+ <description_user>
+ Provides platform dependent rssi adjustments. Octet string (length 4), each octet
+ represents a signed 8 bit value in units of quarter dB.
+ octet[0] = always_adjust (applied unconditionally in all cases)
+ octet[1] = low_power_adjust (applied in low_power mode only)
+ octet[2] = ext_lna_on_adjust (applied only if we have a FEM and the external LNA is enabled)
+ octet[3] = ext_lna_off_adjust (applied only if we have a FEM and the external LNA is disabled)
+ </description_user>
+ <type>octet_string</type>
+ <range_min>4</range_min><range_max>4</range_max>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <table_name>unifiRxRssiAdjustmentsTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDisableLNABypass" psid="5118">
+ <description_user>
+ Prevents the use of the LNA bypass. Can be set at any time, but takes effect the next time the radio is
+ turned on from off.
+ Set a bit to 1 to disable the LNA bypass in that configuration.
+ B0 2.4G Radio 0
+ B1 2.4G Radio 1
+ B2 2.4G Radio 2
+ B3 2.4G Radio 3
+ B4 5G Radio 0
+ B5 5G Radio 1
+ B6 5G Radio 2
+ B7 5G Radio 3
+ </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiSableContainerSizeConfiguration" psid="5000">
+ <description_user>Sable Container Size Configuration
+ Sable WLAN reserved memory size is determined by the host. Sable TLV containers are allocated from this WLAN reserved area.
+ Each container has different requirement on its size. For example, frame logging or IQ capture would be very greedy, requesting
+ most of available memroy. But some just need fixed size, but not large. To cope with such requirements, each container size is
+ configured with the following rules:
+ 1. To allocate a certain percentage of the whole wlan reserved area, put the percentage in hex format. For example, 0x28(=40)
+ means 40% of reserved area will be assigned. The number 0x64(=100) is specially treated that all remaining space will be
+ assigned after all the other containers are first served.
+ 2. To request (n * 2048) bytes, put (100 + n) value in hex format. For example, 0x96 (= 150) means 50 * 2048 = 102400 bytes.
+ Here are the list of containers:
+ - octet 0 - WTLV_CONTAINER_ID_DPLANE_FRAME_LOG
+ </description_user>
+ <type>octet_string</type><range_min>3</range_min><range_max>3</range_max><default> {0x64} </default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogMode" psid="5001">
+ <description_user>Sable Frame Logging mode
+ - 0: disable frame logging
+ - 1: enable frame logging always, regardless of CPU resource state
+ - 2: dynamically enable frame logging base on CPU resource. If CPU too busy, frame logging is disabled.
+ Logging is enabled when CPU resource gets recovered.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max>
+ <default>2</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogmodeset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogCpuThresPercent" psid="5002">
+ <description_user>CPU target in percent. When CPU usage is higher than this target,
+ frame logging will be disabled by firmware. Firmware will check if CPU resource is recovered
+ every 1 second. If CPU resource recovered, then frame logging is re-enabled.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <default>95</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogcputhresset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSableFrameLogCpuOverheadPercent" psid="5003">
+ <description_user>Expected CPU overhead introduced by frame logging.
+ </description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <default>3</default>
+ <function_list>
+ <function type="set" function_name="mibsableframelogcpuoverheadset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCurrentTxpowerLevel" psid="6020">
+ <description_user>Maximum air power for the VIF. Values are expressed in 0.25 dBm units.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <default>0</default>
+ <function type="get" function_name="mibint16get" is_for_vif="true"></function>
+ <units>qdBm</units>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugInstantDelivery" psid="6069">
+ <description_user>Instant delivery control of the debug messages when set to true. Note: will not allow the host to suspend when set to True.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibdebuginstantdeliveryset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugEnable" psid="6071">
+ <description_user>Debug to host state. Debug is either is sent to the host or it isn't.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mibdebugenableset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiDebugModuleControl" psid="5029">
+ <description_user>Debug Module levels for all modules.
+ Module debug level is used to filter debug messages sent to the host.
+ Only 6 levels of debug per module are available:
+ a. -1 No debug created.
+ b. 0 Debug if compiled in. Should not cause Buffer Full in normal testing.
+ c. 1 - 3 Levels to allow sensible setting of the .hcf file while running specific tests or debugging
+ d. 4 Debug will harm normal execution due to excessive levels or processing time required. Only used in emergency debugging.
+ Additional control for FSM transition and FSM signals logging is provided.
+
+ Debug module level and 2 boolean flags are encoded within a uint16:
+ Function | Is sending FSM signals | Is sending FSM transitions | Is sending FSM Timers | Reserved | Module level (signed int)
+ ----------+--------------------------+------------------------------+--------------------------+------------+---------------------------
+ Bits | 15 | 14 | 13 | 12 - 8 | 7 - 0
+
+ Note: 0x00FF disables any debug for a module
+ 0xE004 enables all debug for a module</description_user>
+ <type>uint16</type>
+ <table_name>unifiDebugConfigTable</table_name>
+ <default_list>
+ <!-- To find the module see unifiDebugModulesIndex -->
+ <!-- Please don't add comments that hint what the index is. -->
+ <default index1="1"> 0xE003 </default>
+ <default index1="2"> 0xE000 </default>
+ <default index1="3"> 0x00FF </default>
+ <default index1="4"> 0xE004 </default>
+ <default index1="5"> 0x00FF </default>
+ <default index1="6"> 0xE000 </default>
+ <default index1="7"> 0xE004 </default>
+ <default index1="8"> 0xE004 </default>
+ <default index1="9"> 0x00FF </default>
+ <default index1="10"> 0x00FF </default>
+ <default index1="11"> 0x0001 </default>
+ <default index1="12"> 0x00FF </default>
+ <default index1="13"> 0x00FF </default>
+ <default index1="14"> 0xE000 </default>
+ <default index1="15"> 0x00FF </default>
+ <default index1="16"> 0x00FF </default>
+ <default index1="17"> 0x0001 </default>
+ <default index1="18"> 0xE004 </default>
+ <default index1="19"> 0xE004 </default>
+ <default index1="20"> 0xE000 </default>
+ <default index1="21"> 0xE004 </default>
+ <default index1="22"> 0xE004 </default>
+ <default index1="23"> 0x0000 </default>
+ <default index1="24"> 0xE004 </default>
+ <default index1="25"> 0x0001 </default>
+ <default index1="26"> 0x00FF </default>
+ <default index1="27"> 0x00FF </default>
+ <default index1="28"> 0xE004 </default>
+ <default index1="29"> 0x0001 </default>
+ <default index1="30"> 0x0001 </default>
+ <default index1="31"> 0xE000 </default>
+ <default index1="32"> 0x00FF </default>
+ <default index1="33"> 0x00FF </default>
+ <default index1="34"> 0x00FF </default>
+ <default index1="35"> 0xE001 </default>
+ <default index1="36"> 0x0000 </default>
+ <default index1="37"> 0xE004 </default>
+ <default index1="38"> 0x00FF </default>
+ <default index1="39"> 0x0004 </default>
+ <default index1="40"> 0x00FF </default>
+ <default index1="41"> 0x0000 </default>
+ <default index1="42"> 0x00FF </default>
+ <default index1="43"> 0xE004 </default>
+ <default index1="44"> 0xE004 </default>
+ <default index1="45"> 0xE000 </default>
+ <default index1="46"> 0x00FF </default>
+ <default index1="47"> 0x00FF </default>
+ <default index1="48"> 0x0000 </default>
+ <default index1="49"> 0x0000 </default>
+ <default index1="50"> 0x0001 </default>
+ <default index1="51"> 0xE001 </default>
+ <default index1="52"> 0x000F </default>
+ <default index1="53"> 0xE004 </default>
+ <default index1="54"> 0xE004 </default>
+ <default index1="55"> 0x0004 </default>
+ <default index1="56"> 0x0004 </default>
+ <default index1="57"> 0x00FF </default>
+ <default index1="58"> 0x0000 </default>
+ <default index1="59"> 0x0000 </default>
+ <default index1="60"> 0x0000 </default>
+ <default index1="61"> 0x0000 </default>
+ <default index1="62"> 0xE001 </default>
+ <default index1="63"> 0x00FF </default>
+ <default index1="64"> 0x0001 </default>
+ <default index1="65"> 0x00FF </default>
+ <default index1="66"> 0xE004 </default>
+ <default index1="67"> 0xE00F </default>
+ <default index1="68"> 0x000F </default>
+ <default index1="69"> 0xE004 </default>
+ <default index1="70"> 0xE004 </default>
+ <default index1="71"> 0x00FF </default>
+ <default index1="72"> 0xE004 </default>
+ <default index1="73"> 0x0004 </default>
+ <default index1="74"> 0xE004 </default>
+ <default index1="75"> 0xE004 </default>
+ <default index1="76"> 0x0000 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFaultEnable" psid="5027">
+ <description_user> Send Fault to host state. </description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mibfaultenableset" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSubSystemsIndex" psid="0">
+ <type>integer</type>
+ <description_user>Subsystems index</description_user>
+ </config_element>
+ <config_element name="unifiModuleMemoryManagerFieldIndexEnum" psid="0">
+ <type>integer</type>
+ <description_user>Module memory manager configuration (priority and size)</description_user>
+ </config_element>
+ <config_element name="unifiFaultSubSystemControl" psid="5028">
+ <description_user>Fault levels for WLAN SubSystems.
+ Fault level is used to filter faults sent to the host.
+ 4 levels of faults per subsystem are available (FAILURE_LEVEL_T):
+ a. 0 ERROR
+ b. 1 WARNING
+ c. 2 INFO_1
+ d. 3 INFO_2
+
+ Modifying Fault Levels at run time:
+ 1. Set the fault level for the subsystems in unifiFaultConfigTable
+ 2. Set unifiFaultEnable
+
+ NOTE: If fault level of a subsystem is configured to ERROR, all the faults within that subsystem configured to ERROR will only be issued to host,
+ faults with WARNING, INFO_1 and INFO_2 level will be converted to debug message
+
+ If fault level of a subsystem is configured to WARNING, all the faults within that subsystem configured to ERROR and WARNING will be issued to host,
+ faults with INFO_1 and INFO_2 level will be converted to debug message
+ </description_user>
+ <type>uint16</type>
+ <table_name>unifiFaultConfigTable</table_name>
+ <default_list>
+ <!-- To find the SubSystems Index see unifiSubSystemsIndex -->
+ <default index1="1"> 0x0001 </default>
+ <default index1="2"> 0x0001 </default>
+ <default index1="3"> 0x0001 </default>
+ <default index1="4"> 0x0001 </default>
+ <default index1="5"> 0x0001 </default>
+ <default index1="6"> 0x0001 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPanicSubSystemControl" psid="5026">
+ <description_user>PANIC levels for WLAN SubSystems.
+ Panic level is used to filter Panic sent to the host.
+ 4 levels of Panic per subsystem are available (FAILURE_LEVEL_T):
+ a. 0 FATAL - Always reported to host
+ b. 1 ERROR
+ c. 2 WARNING
+ d. 3 DEBUG
+
+ NOTE: If Panic level of a subsystem is configured to FATAL, all the Panics within that subsystem configured to FATAL will be effective,
+ panics with ERROR, WARNING and Debug level will be converted to faults.
+
+ If Panic level of a subsystem is configured to WARNING, all the panics within that subsystem configured to FATAL, ERROR and WARNING will be issued to host,
+ panics with Debug level will be converted to faults.
+ </description_user>
+ <type>uint16</type>
+ <table_name>unifiPanicConfigTable</table_name>
+ <default_list>
+ <!-- To find the SubSystems Index see unifiSubSystemsIndex -->
+ <default index1="1"> 0x0001 </default>
+ <default index1="2"> 0x0001 </default>
+ <default index1="3"> 0x0001 </default>
+ <default index1="4"> 0x0000 </default>
+ <default index1="5"> 0x0001 </default>
+ <default index1="6"> 0x0001 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- unifiTxOOBConstraintTable Transmit out-of-band regulatory constraint table -->
+ <config_element name="unifiTxOOBConstraints" psid="5064">
+ <description_user>OOB constraints table.
+ | octects | description |
+ |---------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+ | 0 | DPD applicability bitmask: 0 = no DPD, 1 = dynamic DPD, 2 = static DPD, 3 = applies to both static and dynamic DPD |
+ | 1-2 | Bitmask indicating which regulatory domains this rule applies to FCC=bit0, ETSI=bit1, JAPAN=bit2 |
+ | 3-4 | Bitmask indicating which band edges this rule applies to RICE_BAND_EDGE_ISM_24G_LOWER = bit 0, RICE_BAND_EDGE_ISM_24G_UPPER = bit 1, RICE_BAND_EDGE_U_NII_1_LOWER = bit 2, RICE_BAND_EDGE_U_NII_1_UPPER = bit 3, RICE_BAND_EDGE_U_NII_2_LOWER = bit 4, RICE_BAND_EDGE_U_NII_2_UPPER = bit 5, RICE_BAND_EDGE_U_NII_2E_LOWER = bit 6, RICE_BAND_EDGE_U_NII_2E_UPPER = bit 7, RICE_BAND_EDGE_U_NII_3_LOWER = bit 8, RICE_BAND_EDGE_U_NII_3_UPPER = bit 9 |
+ | 5 | Bitmask indicating which modulation types this rule applies to (LSB/b0=DSSS/CCK, b1= OFDM0 modulation group, b2= OFDM1 modulation group) |
+ | 6 | Bitmask indicating which channel bandwidths this rule applies to (LSB/b0=20MHz, b1=40MHz, b2=80MHz) |
+ | 7 | Minimum distance to nearest band edge in 500 kHz units for which this constraint becomes is applicable. |
+ | 8 | Maximum power (EIRP) for this particular constraint - specified in units of quarter dBm. |
+ | 9-32 | Spectral shaping configuration to be used for this particular constraint. The value is specific to the radio hardware and should only be altered under advice from the IC supplier. |
+ | 33-56| Tx DPD Spectral shaping configuration to be used for this particular constraint. The value is specific to the radio hardware and should only be altered under advice from the IC supplier. |
+ |</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiTxOOBConstraintTable</table_name>
+ <nature>hardware</nature>
+ </config_element>
+ <!-- end of unifiTxOOBConstraintTable -->
+ <!-- unifiRegDomVersion Regulatory domain version. -->
+ <config_element name="unifiRegDomVersion" psid="8019">
+ <description_user>Regulatory domain version encoded into 2 bytes, major version as MSB and minor version as LSB</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature>
+
+ <default>0x0107</default>
+ </config_element>
+ <!-- unifiRegulatoryTable Regulatory information for all countries. -->
+ <!-- Columns -->
+ <config_element name="unifiRegulatoryParameters" psid="8011">
+ <description_user>Regulatory parameters.
+ Each row of the table contains the regulatory rules for one country:
+ octet 0 - first character of alpha2 code for country
+ octet 1 - second character of alpha2 code for country
+ octet 2 - regulatory domain for the country
+ Followed by the rules for the country, numbered 0..n in this description
+ octet 7n+3 - LSB start frequency octet
+ 7n+4 - MSB start frequency octet
+ 7n+5 - LSB end frequency octet
+ 7n+6 - MSB end frequency octet
+ 7n+7 - maximum bandwidth octet
+ 7n+8 - maximum power octet
+ 7n+9 - rule flags</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>73</range_max>
+ <table_name>unifiRegulatoryTable</table_name>
+ <default_list>
+
+ <default index1="1">{0x30,0x30,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x99,0x09,0xB2,0x09,0x28,0x14,0x01,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="2">{0x58,0x58,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="3">{0x41,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0x50,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="4">{0x41,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="5">{0x41,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="6">{0x41,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="7">{0x41,0x49,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="8">{0x41,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="9">{0x41,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x12,0x00}</default>
+ <default index1="10">{0x41,0x4E,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="11">{0x41,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="12">{0x41,0x51,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="13">{0x41,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="14">{0x41,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="15">{0x41,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="16">{0x41,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x12,
+ 0x5E,0x15,0xE0,0x15,0x50,0x1E,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x1E,0x02,
+ 0x5D,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="17">{0x41,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x5D,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="18">{0x41,0x58,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="19">{0x41,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x12,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x12,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="20">{0x42,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="21">{0x42,0x42,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="22">{0x42,0x44,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="23">{0x42,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="24">{0x42,0x46,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="25">{0x42,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x5D,0x16,0xF3,0x16,0x50,0x0E,0x00}</default>
+ <default index1="26">{0x42,0x48,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x14,0x14,0x12,
+ 0x67,0x16,0xCB,0x16,0x14,0x14,0x00}</default>
+ <default index1="27">{0x42,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="28">{0x42,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x14,0x00}</default>
+ <default index1="29">{0x42,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="30">{0x42,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="31">{0x42,0x4E,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="32">{0x42,0x4F,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x1E,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x10}</default>
+ <default index1="33">{0x42,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="34">{0x42,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="35">{0x42,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="36">{0x42,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="37">{0x42,0x57,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="38">{0x42,0x59,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x4E,0x16,0x28,0x1B,0x02}</default>
+ <default index1="39">{0x42,0x5A,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="40">{0x43,0x41,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xE0,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="41">{0x43,0x43,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="42">{0x43,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="43">{0x43,0x46,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0x28,0x18,0x02}</default>
+ <default index1="44">{0x43,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="45">{0x43,0x48,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="46">{0x43,0x49,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="47">{0x43,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="48">{0x43,0x4C,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="49">{0x43,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="50">{0x43,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="51">{0x43,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="52">{0x43,0x52,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="53">{0x43,0x55,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="54">{0x43,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="55">{0x43,0x58,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0xA0,0x1B,0x02,
+ 0x12,0x16,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="56">{0x43,0x59,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="57">{0x43,0x5A,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="58">{0x44,0x45,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="59">{0x44,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="60">{0x44,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="61">{0x44,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="62">{0x44,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="63">{0x44,0x5A,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x26,0x16,0xA0,0x1E,0x02}</default>
+ <default index1="64">{0x45,0x43,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="65">{0x45,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="66">{0x45,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02}</default>
+ <default index1="67">{0x45,0x48,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02}</default>
+ <default index1="68">{0x45,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="69">{0x45,0x53,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="70">{0x45,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="71">{0x46,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="72">{0x46,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="73">{0x46,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="74">{0x46,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="75">{0x46,0x4D,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="76">{0x46,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="77">{0x46,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="78">{0x47,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="79">{0x47,0x42,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="80">{0x47,0x44,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="81">{0x47,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x12,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="82">{0x47,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="83">{0x47,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="84">{0x47,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="85">{0x47,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="86">{0x47,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="87">{0x47,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="88">{0x47,0x4E,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="89">{0x47,0x50,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="90">{0x47,0x51,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="91">{0x47,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="92">{0x47,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="93">{0x47,0x54,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="94">{0x47,0x55,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="95">{0x47,0x57,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="96">{0x47,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="97">{0x48,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="98">{0x48,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="99">{0x48,0x4E,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="100">{0x48,0x52,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x5D,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="101">{0x48,0x54,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="102">{0x48,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="103">{0x49,0x44,0x03,
+ 0x62,0x09,0xB2,0x09,0x14,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x14,0x17,0x00}</default>
+ <default index1="104">{0x49,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="105">{0x49,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x12,
+ 0x72,0x15,0x62,0x16,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x17,0x01}</default>
+ <default index1="106">{0x49,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="107">{0x49,0x4E,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="108">{0x49,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="109">{0x49,0x51,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="110">{0x49,0x52,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="111">{0x49,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="112">{0x49,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="113">{0x4A,0x45,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="114">{0x4A,0x4D,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="115">{0x4A,0x4F,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x17,0x00}</default>
+ <default index1="116">{0x4A,0x50,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0xAA,0x09,0xBE,0x09,0x14,0x14,0x04,
+ 0x2E,0x13,0x7E,0x13,0x28,0x17,0x00,
+ 0xA6,0x13,0xE2,0x13,0x28,0x17,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02}</default>
+ <default index1="117">{0x4B,0x45,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x28,0x17,0x00}</default>
+ <default index1="118">{0x4B,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="119">{0x4B,0x48,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1B,0x00}</default>
+ <default index1="120">{0x4B,0x49,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="121">{0x4B,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="122">{0x4B,0x4E,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="123">{0x4B,0x50,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="124">{0x4B,0x52,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x5D,0x16,0xDA,0x16,0x50,0x1E,0x00}</default>
+ <default index1="125">{0x4B,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="126">{0x4B,0x59,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="127">{0x4B,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x4E,0x16,0x50,0x14,0x02}</default>
+ <default index1="128">{0x4C,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="129">{0x4C,0x42,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="130">{0x4C,0x43,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="131">{0x4C,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="132">{0x4C,0x4B,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x14,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="133">{0x4C,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="134">{0x4C,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="135">{0x4C,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="136">{0x4C,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="137">{0x4C,0x56,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="138">{0x4C,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="139">{0x4D,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12}</default>
+ <default index1="140">{0x4D,0x43,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="141">{0x4D,0x44,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="142">{0x4D,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="143">{0x4D,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="144">{0x4D,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="145">{0x4D,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="146">{0x4D,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="147">{0x4D,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="148">{0x4D,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x4E,0x16,0x50,0x1E,0x02}</default>
+ <default index1="149">{0x4D,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="150">{0x4D,0x4F,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x17,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="151">{0x4D,0x50,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="152">{0x4D,0x51,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="153">{0x4D,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="154">{0x4D,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="155">{0x4D,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="156">{0x4D,0x55,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="157">{0x4D,0x56,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5D,0x16,0xDA,0x16,0x50,0x14,0x00}</default>
+ <default index1="158">{0x4D,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
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+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="159">{0x4D,0x58,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x18,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="160">{0x4D,0x59,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x12,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x18,0x00}</default>
+ <default index1="161">{0x4D,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="162">{0x4E,0x41,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="163">{0x4E,0x43,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="164">{0x4E,0x45,0x00,
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+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="165">{0x4E,0x46,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="166">{0x4E,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="167">{0x4E,0x49,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="168">{0x4E,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="169">{0x4E,0x4F,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="170">{0x4E,0x50,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x14,0x00}</default>
+ <default index1="171">{0x4E,0x52,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="172">{0x4E,0x55,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="173">{0x4E,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="174">{0x4F,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="175">{0x50,0x41,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="176">{0x50,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="177">{0x50,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="178">{0x50,0x47,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="179">{0x50,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="180">{0x50,0x4B,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="181">{0x50,0x4C,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="182">{0x50,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="183">{0x50,0x4E,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="184">{0x50,0x52,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="185">{0x50,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="186">{0x50,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="187">{0x50,0x57,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="188">{0x50,0x59,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="189">{0x51,0x41,0x03,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x5E,0x15,0x62,0x16,0xA0,0x1B,0x12,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x12}</default>
+ <default index1="190">{0x52,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="191">{0x52,0x4F,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="192">{0x52,0x53,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0xE6,0x14,0x28,0x17,0x10,
+ 0x5E,0x15,0x5D,0x16,0x14,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="193">{0x52,0x55,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x12,0x16,0x62,0x16,0x50,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="194">{0x52,0x57,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x18,0x02}</default>
+ <default index1="195">{0x53,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x0E,0x00}</default>
+ <default index1="196">{0x53,0x42,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="197">{0x53,0x43,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="198">{0x53,0x44,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="199">{0x53,0x45,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="200">{0x53,0x47,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="201">{0x53,0x48,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="202">{0x53,0x49,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="203">{0x53,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="204">{0x53,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="205">{0x53,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="206">{0x53,0x4D,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="207">{0x53,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02}</default>
+ <default index1="208">{0x53,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="209">{0x53,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="210">{0x53,0x53,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="211">{0x53,0x54,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="212">{0x53,0x56,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x14,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x14,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x14,0x1E,0x00}</default>
+ <default index1="213">{0x53,0x58,0x00,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="214">{0x53,0x59,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="215">{0x53,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
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+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="216">{0x54,0x43,0x01,
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+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="217">{0x54,0x44,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ <default index1="218">{0x54,0x46,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="219">{0x54,0x47,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0x28,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="220">{0x54,0x48,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="221">{0x54,0x4A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="222">{0x54,0x4B,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="223">{0x54,0x4C,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="224">{0x54,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02}</default>
+ <default index1="225">{0x54,0x4E,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0xD6,0x15,0x50,0x14,0x02}</default>
+ <default index1="226">{0x54,0x4F,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="227">{0x54,0x52,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="228">{0x54,0x54,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="229">{0x54,0x56,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00}</default>
+ <default index1="230">{0x54,0x57,0x01,
+ 0x60,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xE6,0x14,0x50,0x17,0x02,
+ 0x5E,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xDA,0x16,0x50,0x1E,0x00}</default>
+ <default index1="231">{0x54,0x5A,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="232">{0x55,0x41,0x02,
+ 0x60,0x09,0xB3,0x09,0x28,0x14,0x00,
+ 0x1E,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xE6,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x26,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="233">{0x55,0x47,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xB7,0x16,0x50,0x1E,0x00}</default>
+ <default index1="234">{0x55,0x4D,0x00,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="235">{0x55,0x53,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="236">{0x55,0x59,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="237">{0x55,0x5A,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02}</default>
+ <default index1="238">{0x56,0x41,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="239">{0x56,0x43,0x02,
+ 0x62,0x09,0xA8,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="240">{0x56,0x45,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x17,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x17,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="241">{0x56,0x47,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="242">{0x56,0x49,0x01,
+ 0x62,0x09,0xA8,0x09,0x28,0x1E,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x18,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="243">{0x56,0x4E,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0x50,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="244">{0x56,0x55,0x01,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x11,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x18,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x18,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1E,0x00}</default>
+ <default index1="245">{0x57,0x46,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x1B,0x00}</default>
+ <default index1="246">{0x57,0x53,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x28,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x28,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0x28,0x1B,0x02,
+ 0x67,0x16,0xA3,0x16,0x28,0x1B,0x00}</default>
+ <default index1="247">{0x58,0x4B,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="248">{0x59,0x45,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="249">{0x59,0x54,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="250">{0x5A,0x41,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x10,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x12,
+ 0x72,0x15,0x62,0x16,0xA0,0x1E,0x00,
+ 0x67,0x16,0xCB,0x16,0x50,0x0E,0x00}</default>
+ <default index1="251">{0x5A,0x4D,0x00,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x62,0x16,0xA0,0x14,0x02,
+ 0x67,0x16,0xCB,0x16,0x50,0x14,0x00}</default>
+ <default index1="252">{0x5A,0x57,0x02,
+ 0x62,0x09,0xB2,0x09,0x28,0x14,0x00,
+ 0x32,0x14,0x82,0x14,0x50,0x14,0x00,
+ 0x82,0x14,0xD2,0x14,0x50,0x14,0x02,
+ 0x72,0x15,0x4E,0x16,0xA0,0x1B,0x02}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- end of unifiRegulatoryTable -->
+ <!-- Operating Class information for all countries. -->
+ <config_element name="unifiOperatingClassTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>200</range_max>
+ <description_user>Index for unifiOperatingClassTable</description_user>
+ </config_element>
+ <config_element name="unifiOperatingClassParamters" psid="8015">
+ <description_user>Supported Operating Class parameters.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>1</range_min><range_max>73</range_max>
+ <table_name>unifiOperatingClassTable</table_name>
+ <default_list>
+ <default index1="1">{0x51,0x53,0x54,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7A,0x7B,0x7C,0x7D,0x7E,0x7F,0x80}</default> <!-- Global -->
+ <default index1="2">{0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x11,0x80}</default> <!-- Europe -->
+ <default index1="3">{0x01,0x02,0x03,0x04,0x05,0x0C,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F,0x20,0x21,0x80}</default> <!-- US -->
+ <default index1="4">{0x01,0x1E,0x20,0x21,0x22,0x24,0x25,0x27,0x29,0x2A,0x2C,0x38,0x39,0x3A,0x80}</default> <!-- Japan -->
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- end of unifiOperatingClassTable -->
+ <config_element name="unifiScanParametersTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>20</range_max>
+ <description_user>Index for unifiScanParametersTable. Index is a Scan_Type as defined in FAPI. </description_user>
+ </config_element>
+ <config_element name="unifiScanParameters" psid="2154">
+ <description_user>Scan parameters.
+ Each row of the table contains 2 entries for a scan: first entry when there is 0 registered VIFs, second - when there is 1 or more registered VIFs.
+ Entry has the following structure:
+ octet 0 - Scan priority (uint8)
+ octet 1 - Scan Flags (uint8) (see unifiScanFlags)
+ bit 0 - Enable Early Channel Exit (bool)
+ bit 1 - Disable Scan (bool)
+ bit 2 - Enable NCHO (bool)
+ bit 3 - Enable MAC Randomization (bool)
+ octet 2 ~ 3 - Probe Interval in Time Units (uint16)
+ octet 4 ~ 5 - Max Active Channel Time in Time Units (uint16)
+ octet 6 ~ 7 - Max Passive Channel Time in Time Units (uint16)
+ octet 8 - Scan Policy (uint8)
+ Size of each entry is 9 octets, row size is 18 octets. A Time Units value specifies a time interval as a multiple of TU (1024 us).</description_user>
+ <type>octet_string</type>
+ <range_min>18</range_min><range_max>18</range_max>
+ <table_name>unifiScanParametersTable</table_name>
+ <default_list>
+ <!-- Initial scan
+ 0 VIFS: 6 flags 24TU 58TU 102TU
+ >= 1 VIFS (no such thing as initial scan with >= 1 VIFS):
+ 6 flags 24TU 58TU 102TU -->
+ <default index1="1">{ 0x06, 0x09, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Full scan
+ 0 VIFS: 6 flags 68TU 146TU 117TU
+ >= 1 VIFS: 6 flags 24TU 58TU 102TU -->
+ <default index1="2">{ 0x06, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Scheduled scan
+ 0 VIFS: 2 flags 68TU 146TU 117TU
+ = 1 VIFS: 2 flags 24TU 58TU 102TU -->
+ <default index1="3">{ 0x02, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x02, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- P2P full scan
+ 0 VIFS: 6 flags 24TU 68TU 102TU
+ >= 1 VIFS: 6 flags 24TU 50TU 102TU -->
+ <default index1="4">{ 0x06, 0x09, 0x18,0x00, 0x44,0x00, 0x66,0x00, 0x00,
+ 0x06, 0x01, 0x18,0x00, 0x32,0x00, 0x66,0x00, 0x00}</default>
+ <!-- P2P social scan
+ 0 VIFS: 6 flags 24TU 68TU N/A
+ >= 1 VIFS: 6 flags 24TU 50TU N/A -->
+ <default index1="5">{ 0x06, 0x08, 0x18,0x00, 0x44,0x00, 0x00,0x00, 0x00,
+ 0x06, 0x00, 0x18,0x00, 0x32,0x00, 0x00,0x00, 0x00}</default>
+ <!-- OBSS scan
+ 0 VIFS: 4 flags 24TU 58TU N/A
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="6">{ 0x04, 0x09, 0x18,0x00, 0x3A,0x00, 0x00,0x00, 0x00,
+ 0x04, 0x01, 0x18,0x00, 0x3A,0x00, 0x00,0x00, 0x00}</default>
+ <!-- AP Auto Channel Selection scan
+ 0 VIFS: 4 flags 24TU 39TU N/A
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="7">{ 0x04, 0x09, 0x18,0x00, 0x27,0x00, 0x00,0x00, 0x00,
+ 0x04, 0x01, 0x18,0x00, 0x27,0x00, 0x00,0x00, 0x00}</default>
+ <!-- PNO scan
+ 0 VIFS: 0 flags 68TU 146TU 117TU
+ >= 1 VIFS (no scan with >= 1 VIFS):-->
+ <default index1="8">{ 0x00, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x00, 0x01, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00}</default>
+ <!-- GSCAN
+ 0 VIFS: 2 flags 68TU 146TU 117TU
+ >= 1 VIFS: 2 flags 24TU 58TU 102TU -->
+ <default index1="9">{ 0x02, 0x09, 0x44,0x00, 0x92,0x00, 0x75,0x00, 0x00,
+ 0x02, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x00}</default>
+ <!-- Measurement scan
+ 0 VIFS (no scan with 0 VIFS):
+ >= 1 VIFS: 3 flags 24TU 58TU 102TU -->
+ <default index1="10">{0x03, 0x09, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x80,
+ 0x03, 0x01, 0x18,0x00, 0x3A,0x00, 0x66,0x00, 0x80}</default>
+ <!-- Soft Cached Roaming scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU Any_RA -->
+ <default index1="11">{0x04, 0x0C, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04,
+ 0x04, 0x04, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Soft All Roaming scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU Any_RA -->
+ <default index1="12">{0x04, 0x09, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04,
+ 0x04, 0x01, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Hard Cached Roaming scan
+ 0 VIFS NA: 8 flags 39TU 98TU 117TU
+ >= 1 VIFS: 8 flags 39TU 98TU 117TU Any_RA -->
+ <default index1="13">{0x08, 0x08, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04,
+ 0x08, 0x00, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04}</default>
+ <!-- Hard All Roaming scan
+ 0 VIFS NA: 8 flags 39TU 98TU 117TU
+ >= 1 VIFS: 8 flags 39TU 98TU 117TU Any_RA -->
+ <default index1="14">{0x08, 0x08, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04,
+ 0x08, 0x00, 0x27,0x00, 0x62,0x00, 0x75,0x00, 0x04}</default>
+ <!-- OBSS Internal scan
+ 0 VIFS NA: 3 flags 5TU 20TU 100TU
+ >= 1 VIFS 3 flags 5TU 20TU 100TU -->
+ <default index1="15">{0x03, 0x09, 0x05,0x00, 0x14,0x00, 0x64,0x00, 0x00,
+ 0x03, 0x01, 0x05,0x00, 0x14,0x00, 0x64,0x00, 0x00}</default>
+ <!-- NAN scan
+ 0 VIFS NA: 3 flags N/A N/A 200TU
+ >= 1 VIFS: 3 flags N/A N/A 200TU Passive -->
+ <default index1="16">{0x03, 0x08, 0x00,0x00, 0x00,0x00, 0xC8,0x00, 0x01,
+ 0x03, 0x00, 0x00,0x00, 0x00,0x00, 0xC8,0x00, 0x01}</default>
+ <!-- FTM Neighbour scan
+ 0 VIFS NA: 4 flags 27TU 68TU 117TU
+ >= 1 VIFS: 4 flags 27TU 68TU 117TU -->
+ <default index1="17">{0x04, 0x08, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x00,
+ 0x04, 0x00, 0x1B,0x00, 0x44,0x00, 0x75,0x00, 0x00}</default>
+ <!-- Dummy Entry -->
+ <default index1="18">{0x00, 0x09, 0x02,0x03, 0x04,0x05, 0x06,0x07, 0x08,
+ 0x09, 0x08, 0x07,0x06, 0x05,0x04, 0x03,0x02, 0x01}</default> </default_list>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="dot11TDLSPeerUAPSDBufferSTAActivated" psid="2587">
+ <description_user>Activate TDLS peer U-APSD.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11TDLSPeerUAPSDIndicationWindow" psid="53">
+ <description_user>The minimum time after the last TPU SP, before a RAME_TPU_SP indication can be issued.</description_user>
+ <type>uint16</type>
+ <units>beacon intervals</units>
+ <default>1</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="dot11TDLSDiscoveryRequestWindow" psid="2565">
+ <description_user>Time to gate Discovery Request frame (in DTIM intervals) after transmitting a Discovery Request frame.</description_user>
+ <type>uint32</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="dot11TDLSResponseTimeout" psid="2566">
+ <description_user>If a valid Setup Response frame is not received within (seconds),
+ the initiator STA shall terminate the setup procedure and discard any Setup Response frames.</description_user>
+ <type>uint32</type>
+ <default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsActivated" psid="2558">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Activate TDLS.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsInP2pActivated" psid="2556">
+ <description_user>Activate TDLS in P2P.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsWiderBandwidthProhibited" psid="2569">
+ <description_user>Wider bandwidth prohibited flag.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTPThresholdPktSecs" psid="2559">
+ <description_user>Used for "throughput_threshold_pktsecs" of RAME-MLME-ENABLE-PEER-TRAFFIC-REPORTING.request.</description_user>
+ <type>uint32</type>
+ <default>100</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsRssiThreshold" psid="2560">
+ <description_user>FW initiated TDLS Discovery/Setup procedure.
+ If the RSSI of a received TDLS Discovery Response frame is greater than this value, initiate the TDLS Setup procedure.</description_user>
+ <type>int16</type>
+ <default>-75</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTPMonitorSecs" psid="2562">
+ <description_user>Measurement period for recording the number of packets sent to a peer over a TDLS link.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsKeyLifeTimeInterval" psid="2577">
+ <description_user>Build the Key Lifetime Interval in the TDLS Setup Request frame.</description_user>
+ <type>uint32</type>
+ <default>0x000FFFFF</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTdlsTeardownFrameTxTimeout" psid="2578">
+ <description_user>Allowed time in milliseconds for a Teardown frame to be transmitted.</description_user>
+ <type>uint16</type>
+ <default>500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiWifiSharingActivated" psid="2580">
+ <description_user>Activate WiFi Sharing feature</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiWiFiSharing5GHzChannel" psid="2582">
+ <description_user>Applicable 5GHz Primary Channels mask. Defined in a uint64 represented by the octet string.
+ First byte of the octet string maps to LSB. Bits 0-13 representing 2.4G channels are always set to 0. Mapping defined in ChannelisationRules; i.e. Bit 14 maps to channel 36.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max><default>{ 0x00, 0xC0, 0xFF, 0xFF, 0x7F, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiWifiSharingChannelSwitchCount" psid="2583"><!-- ap --><!-- sta -->
+ <description_user>Channel switch announcement count which will be used in the Channel announcement IE when using wifi sharing</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <range_min>3</range_min><range_max>10</range_max>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiChannelAnnouncementCount" psid="2584"><!-- ap -->
+ <description_user>Channel switch announcement count which will be used in the Channel announcement IE</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiStaChannelSwitchSlowApActivated" psid="2601">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: ChanelSwitch: Activate waiting for a slow AP.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApMaxTime" psid="2604">
+ <description_user>ChannelSwitch delay for Slow APs. In Seconds.</description_user>
+ <type>uint32</type>
+ <default>70</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApPollInterval" psid="2605">
+ <description_user>ChannelSwitch polling interval for Slow APs. In Seconds.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaChannelSwitchSlowApProcedureTimeoutIncrement" psid="2606">
+ <description_user>ChannelSwitch procedure timeout increment for Slow APs. In Seconds.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiRATestStoredSA" psid="2585">
+ <description_user>Test only: Source address of router contained in virtural router advertisement packet, specified in chapter '6.2 Forward Received RA frame to Host' in SC-506393-TE</description_user>
+ <type>octet_string</type>
+ <default>0x00000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRATestStoreFrame" psid="2586">
+ <description_user>Test only: Virtual router advertisement packet. Specified in chapter '6.2 Forward Received RA frame to Host' in SC-506393-TE</description_user>
+ <type>octet_string</type>
+ <default>0x00000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSupportedChannels" psid="8012">
+ <description_user>Supported 20MHz channel centre frequency grouped in sub-bands. For each sub-band: starting channel number, followed by number of channels</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>20</range_max><default> {0x01,0x0d,0x24,0x04,0x34,0x04,0x64,0x0c,0x95,0x05} </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDefaultCountry" psid="8013">
+ <description_user>Hosts sets the Default Code. </description_user>
+ <type>octet_string</type>
+ <range_min>3</range_min><range_max>3</range_max>
+ <function_list>
+ <function type="set" function_name="mibdefaultcountryupdate" is_for_vif="false"></function>
+ </function_list>
+ <table_name>unifiDefaultCountryTable</table_name>
+ <!-- <default>{0x30, 0x30, 0x20}</default> World-->
+ <!-- <default>{0x55, 0x53, 0x20}</default> US-->
+ <!-- <default>{0x4B, 0x52, 0x20}</default> KR-->
+ <default_list>
+ <!-- Default country code. -->
+ <default index1="1">{ 0x30, 0x30, 0x20 } </default>
+ <!-- Only here because MIB Table with one row is not permitted. -->
+ <default index1="2">{ 0x00, 0x01, 0x02 } </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDefaultCountryWithoutCH12CH13" psid="8020">
+ <description_user>Update the default country code to ensure CH12 and CH13 are not used.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCountryList" psid="8014">
+ <description_user>Defines the ordered list of countries present in unifiRegulatoryTable. Each country is coded as 2 ASCII characters. If unifiRegulatoryTable is modified, such as a country is either added, deleted or its relative location is modified, has to be updated as well.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>270</range_max>
+ <default>
+
+{ 0x30, 0x30, 0x58, 0x58, 0x41, 0x44, 0x41, 0x45, 0x41, 0x46, 0x41, 0x47, 0x41, 0x49, 0x41, 0x4c, 0x41, 0x4d, 0x41, 0x4e, 0x41, 0x4f, 0x41, 0x51, 0x41, 0x52, 0x41, 0x53, 0x41, 0x54, 0x41, 0x55, 0x41, 0x57, 0x41, 0x58, 0x41, 0x5a, 0x42, 0x41, 0x42, 0x42, 0x42, 0x44, 0x42, 0x45, 0x42, 0x46, 0x42, 0x47, 0x42, 0x48, 0x42, 0x49, 0x42, 0x4a, 0x42, 0x4c, 0x42, 0x4d, 0x42, 0x4e, 0x42, 0x4f, 0x42, 0x52, 0x42, 0x53, 0x42, 0x54, 0x42, 0x56, 0x42, 0x57, 0x42, 0x59, 0x42, 0x5a, 0x43, 0x41, 0x43, 0x43, 0x43, 0x44, 0x43, 0x46, 0x43, 0x47, 0x43, 0x48, 0x43, 0x49, 0x43, 0x4b, 0x43, 0x4c, 0x43, 0x4d, 0x43, 0x4e, 0x43, 0x4f, 0x43, 0x52, 0x43, 0x55, 0x43, 0x56, 0x43, 0x58, 0x43, 0x59, 0x43, 0x5a, 0x44, 0x45, 0x44, 0x4a, 0x44, 0x4b, 0x44, 0x4d, 0x44, 0x4f, 0x44, 0x5a, 0x45, 0x43, 0x45, 0x45, 0x45, 0x47, 0x45, 0x48, 0x45, 0x52, 0x45, 0x53, 0x45, 0x54, 0x46, 0x49, 0x46, 0x4a, 0x46, 0x4b, 0x46, 0x4c, 0x46, 0x4d, 0x46, 0x4f, 0x46, 0x52, 0x47, 0x41, 0x47, 0x42, 0x47, 0x44, 0x47, 0x45, 0x47, 0x46, 0x47, 0x47, 0x47, 0x48, 0x47, 0x49, 0x47, 0x4c, 0x47, 0x4d, 0x47, 0x4e, 0x47, 0x50, 0x47, 0x51, 0x47, 0x52, 0x47, 0x53, 0x47, 0x54, 0x47, 0x55, 0x47, 0x57, 0x47, 0x59, 0x48, 0x4b, 0x48, 0x4d, 0x48, 0x4e, 0x48, 0x52, 0x48, 0x54, 0x48, 0x55, 0x49, 0x44, 0x49, 0x45, 0x49, 0x4c, 0x49, 0x4d, 0x49, 0x4e, 0x49, 0x4f, 0x49, 0x51, 0x49, 0x52, 0x49, 0x53, 0x49, 0x54, 0x4a, 0x45, 0x4a, 0x4d, 0x4a, 0x4f, 0x4a, 0x50, 0x4b, 0x45, 0x4b, 0x47, 0x4b, 0x48, 0x4b, 0x49, 0x4b, 0x4d, 0x4b, 0x4e, 0x4b, 0x50, 0x4b, 0x52, 0x4b, 0x57, 0x4b, 0x59, 0x4b, 0x5a, 0x4c, 0x41, 0x4c, 0x42, 0x4c, 0x43, 0x4c, 0x49, 0x4c, 0x4b, 0x4c, 0x52, 0x4c, 0x53, 0x4c, 0x54, 0x4c, 0x55, 0x4c, 0x56, 0x4c, 0x59, 0x4d, 0x41, 0x4d, 0x43, 0x4d, 0x44, 0x4d, 0x45, 0x4d, 0x46, 0x4d, 0x47, 0x4d, 0x48, 0x4d, 0x4b, 0x4d, 0x4c, 0x4d, 0x4d, 0x4d, 0x4e, 0x4d, 0x4f, 0x4d, 0x50, 0x4d, 0x51, 0x4d, 0x52, 0x4d, 0x53, 0x4d, 0x54, 0x4d, 0x55, 0x4d, 0x56, 0x4d, 0x57, 0x4d, 0x58, 0x4d, 0x59, 0x4d, 0x5a, 0x4e, 0x41, 0x4e, 0x43, 0x4e, 0x45, 0x4e, 0x46, 0x4e, 0x47, 0x4e, 0x49, 0x4e, 0x4c, 0x4e, 0x4f, 0x4e, 0x50, 0x4e, 0x52, 0x4e, 0x55, 0x4e, 0x5a, 0x4f, 0x4d, 0x50, 0x41, 0x50, 0x45, 0x50, 0x46, 0x50, 0x47, 0x50, 0x48, 0x50, 0x4b, 0x50, 0x4c, 0x50, 0x4d, 0x50, 0x4e, 0x50, 0x52, 0x50, 0x53, 0x50, 0x54, 0x50, 0x57, 0x50, 0x59, 0x51, 0x41, 0x52, 0x45, 0x52, 0x4f, 0x52, 0x53, 0x52, 0x55, 0x52, 0x57, 0x53, 0x41, 0x53, 0x42, 0x53, 0x43, 0x53, 0x44, 0x53, 0x45, 0x53, 0x47, 0x53, 0x48, 0x53, 0x49, 0x53, 0x4a, 0x53, 0x4b, 0x53, 0x4c, 0x53, 0x4d, 0x53, 0x4e, 0x53, 0x4f, 0x53, 0x52, 0x53, 0x53, 0x53, 0x54, 0x53, 0x56, 0x53, 0x58, 0x53, 0x59, 0x53, 0x5a, 0x54, 0x43, 0x54, 0x44, 0x54, 0x46, 0x54, 0x47, 0x54, 0x48, 0x54, 0x4a, 0x54, 0x4b, 0x54, 0x4c, 0x54, 0x4d, 0x54, 0x4e, 0x54, 0x4f, 0x54, 0x52, 0x54, 0x54, 0x54, 0x56, 0x54, 0x57, 0x54, 0x5a, 0x55, 0x41, 0x55, 0x47, 0x55, 0x4d, 0x55, 0x53, 0x55, 0x59, 0x55, 0x5a, 0x56, 0x41, 0x56, 0x43, 0x56, 0x45, 0x56, 0x47, 0x56, 0x49, 0x56, 0x4e, 0x56, 0x55, 0x57, 0x46, 0x57, 0x53, 0x58, 0x4b, 0x59, 0x45, 0x59, 0x54, 0x5a, 0x41, 0x5a, 0x4d, 0x5a, 0x57 }
+ </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVifCountry" psid="8016">
+ <description_user>Per VIf: Each VIF updates its Country Code for the Host to read</description_user>
+ <type>octet_string</type>
+ <function_list>
+ <function type="get" function_name="mibosget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiStationQosInfo" psid="2517">
+ <description_user>QoS capability for a non-AP Station, and is encoded as per IEEE 802.11 QoS Capability.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBeaconSkippingControl" psid="2521">
+ <description_user>Control beacon skipping behaviour within firmware with bit flags. 1 defines enabled,
+ with 0 showing the case disabled. If beacon skipping is enabled, further determine if DTIM beacons can
+ be skipped, or only non-DTIM beacons. The following applies:
+ bit 0: station skipping on host suspend
+ bit 1: station skipping on host awake
+ bit 2: station skipping on LCD on
+ bit 3: station skipping with multivif
+ bit 4: station skipping with BT active.
+ bit 8: station skip dtim on host suspend
+ bit 9: station skip dtim on host awake
+ bit 10: station skip dtim on LCD on
+ bit 11: station skip dtim on multivif
+ bit 12: station skip dtim with BT active
+ bit 16: p2p-gc skipping on host suspend
+ bit 17: p2p-gc skipping on host awake
+ bit 18: p2p-gc skipping on LCD on
+ bit 19: p2p-gc skipping with multivif
+ bit 20: p2p-gc skipping with BT active
+ bit 24: p2p-gc skip dtim on host suspend
+ bit 25: p2p-gc skip dtim on host awake
+ bit 26: p2p-gc skip dtim on LCD on
+ bit 27: p2p-gc skip dtim on multivif
+ bit 28: p2p-gc skip dtim with BT active
+ </description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00010103</default>
+ <type>uint32</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenIntervalSkippingDTIM" psid="2518">
+ <description_user>Listen interval of beacons when in single-vif power saving mode,receiving DTIMs is enabled and idle mode disabled.
+ No DTIMs are skipped during MVIF operation. A maximum of the listen interval beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for STA VIF, connected to an AP. For P2P group client intervals, refer to unifiP2PListenIntervalSkippingDTIM, PSID=2523.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x000A89AA</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiP2PListenIntervalSkippingDTIM" psid="2523">
+ <description_user>Listen interval of beacons when in single-vif, P2P client power saving mode,receiving DTIMs and idle mode disabled.
+ No DTIMs are skipped during MVIF operation. A maximum of (listen interval - 1) beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for P2P group client. For STA connected to an AP, refer to unifiListenIntervalSkippingDTIM, PSID=2518.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00000002</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdlemodeListenIntervalSkippingDTIM" psid="2495">
+ <description_user>Listen interval of beacons when in single-vif power saving mode, receiving DTIMs is enabled and idle mode enabled.
+ No DTIMs are skipped during MVIF operation. A maximum of the listen interval beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for STA VIF, connected to an AP. For P2P group client intervals, refer to unifiIdlemodeP2PListenIntervalSkippingDTIM, PSID=2496.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00054645</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiIdlemodeP2PListenIntervalSkippingDTIM" psid="2496">
+ <description_user>Listen interval of beacons when in single-vif, P2P client power saving mode,receiving DTIMs and idle mode enabled.
+ No DTIMs are skipped during MVIF operation. A maximum of (listen interval - 1) beacons are skipped, which may be less than the number of DTIMs that can be skipped.
+ The value is a lookup table for DTIM counts. Each 4bits, in LSB order, represent DTIM1, DTIM2, DTIM3, DTIM4, DTIM5, (unused).
+ This key is only used for P2P group client. For STA connected to an AP, refer to unifiIdlemodeListenIntervalSkippingDTIM, PSID=2495.</description_user>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>0x00000002</default>
+ <units>DTIM intervals</units>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenIntervalMaxTime" psid="2530">
+ <description_user>Maximum number length of time, in Time Units (1TU = 1024us), that can be used as a beacon listen interval. This will limit how many beacons maybe skipped, and affects
+ the DTIM beacon skipping count; DTIM skipping (if enabled) will be such that skipped count = (unifiListenIntervalMaxTime / DTIM_period).</description_user>
+ <range_min>0</range_min><range_max>65535</range_max><default>1000</default>
+ <units>TU</units>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiListenInterval" psid="2519">
+ <description_user>Association request listen interval parameter in beacon intervals. Not used for any other purpose.</description_user>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBeaconsReceivedPercentage" psid="2245">
+ <description_user>Percentage of beacons received, calculated as received / expected. The percentage is scaled to an integer value between 0 (0%) and 1000 (100%).</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiHtCapabilities" psid="2032">
+ <description_user>Only applies to 2G connections. HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0xef, 0x0a, 0x17, 0xff, 0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHtCapabilities5G" psid="2026">
+ <description_user>This should only be set to 0. It is only required if 5G and 2G require different capabilities. Has the same format as unifiHtCapabilities. Any non-zero values must be set in HTF files only. HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHtCapabilitiesSoftAp" psid="2028">
+ <description_user>HT capabilities of the chip. See SC-503520-SP for further details. NOTE: Greenfield has been disabled due to interoperability issues wuth SGI.</description_user>
+ <type>octet_string</type>
+ <range_min>21</range_min><range_max>21</range_max><default>{ 0xef, 0x0a, 0x17, 0xff, 0xff, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVhtCapabilities" psid="2540">
+ <description_user>Only applies to 2G connections. VHT capabilities of the chip. see SC-503520-SP.</description_user>
+ <type>octet_string</type>
+ <range_min>12</range_min><range_max>12</range_max><default>{ 0xb1, 0x7a, 0x11, 0x03, 0xfa, 0xff, 0x00, 0x00, 0xfa, 0xff, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiVhtCapabilities5G" psid="2027">
+ <description_user>This should only be set to 0. It is only required if 5G and 2G require different capabilities. Has the same format as unifiVhtCapabilities. Any non-zero values must be set in HTF files only. VHT capabilities of the chip. see SC-503520-SP.</description_user>
+ <type>octet_string</type>
+ <range_min>12</range_min><range_max>12</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseTimeOut" psid="2080"><!-- ap --><!-- conmgr -->
+ <description_user>Timeout, in TU, to wait for a frame(Auth, Assoc, ReAssoc) after Rame replies to a send frame request</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>500</range_max><default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseCfmTxLifetimeTimeOut" psid="2084">
+ <description_user>Timeout, in TU, to wait to retry a frame (Auth, Assoc, ReAssoc) after TX Cfm trasnmission_status = TxLifetime.</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFrameResponseCfmFailureTimeOut" psid="2085">
+ <description_user>Timeout, in TU, to wait to retry a frame (Auth, Assoc, ReAssoc) after TX Cfm trasnmission_status != Successful | TxLifetime.</description_user>
+ <type>uint16</type>
+ <default>40</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiConnectionFailureTimeout" psid="2081">
+ <description_user>Timeout, in TU, for a frame retry before giving up.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>20000</range_max><default>10000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiConnectingProbeTimeout" psid="2082">
+ <description_user>How long, in TU, to wait for a ProbeRsp when syncronising before resending a ProbeReq</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDisconnectTimeout" psid="2083"><!-- ap --><!-- conmgr -->
+ <description_user>Timeout, in milliseconds, to perform a disconnect or disconnect all STAs (triggered by MLME_DISCONNECT-REQ or MLME_DISCONNECT-REQ 00:00:00:00:00:00) before responding with MLME-DISCONNECT-IND and aborting the disconnection attempt. This is particulary important when a SoftAP is attempting to disconnect associated stations which might have "silently" left the ESS.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>3000</range_max><default>1500</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiForceActiveDuration" psid="2086">
+ <description_user>How long, in milliseconds, the firmware temporarily extends PowerSave for STA as a workaround for wonky APs such as D-link.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>1000</range_max><default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaTxEnableTid" psid="2221">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Configure Block Ack TX on a per-TID basis. Bit mask is two bits per TID (B1 = autosetup, B0 = enable).</description_user>
+ <type>uint32</type>
+ <!--
+ B1 = auto-setup BA TX
+ B0 = enable BA TX
+
+ P15 .. P7 P6 P5 P4 P3 P2 P1 P0
+ 00 00 00 01 01 01 01 01 11 = 0x557
+ -->
+ <default>0x0557</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaRxEnableTid" psid="2219">
+ <description_user>Configure Block Ack RX on a per-TID basis. Bit mask is two bits per TID (B1 = Not Used, B0 = enable).</description_user>
+ <type>uint32</type>
+ <!--
+ B0 = enable BA RX
+
+ P15 .. P7 P6 P5 P4 P3 P2 P1 P0
+ 00 00 01 01 01 01 01 01 01 = 0x1555
+ -->
+ <default>0x1555</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaConfig" psid="2225">
+ <description_user>Block Ack Configuration. It is composed of A-MSDU supported, TX MPDU per A-MPDU, RX Buffer size, TX Buffer size and Block Ack Timeout. </description_user>
+ <!--
+ a_msdu_supported = (bool) BA_MIB_A_MSDU_IN_A_MPDU_SUPPORTED_POS & BA_MIB_A_MSDU_IN_A_MPDU_SUPPORTED_MASK);
+ rx_buffer_size = (uint8) BA_MIB_RX_BUFFER_SIZE_POS & BA_MIB_RX_BUFFER_SIZE_MASK);
+ timeout = (uint16) BA_MIB_TIMEOUT_POS & BA_MIB_TIMEOUT_MASK << 8);
+ -->
+ <type>uint32</type>
+ <default>0x3fff01</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBaTxMaxNumber" psid="2226">
+ <description_user>Block Ack Configuration. Maximum number of BAs. Limited by HW. </description_user>
+ <type>uint16</type>
+ <default>0x10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMoveBKtoBE" psid="2227">
+ <description_user> Deprecated. Golden Certification MIB don't delete, change PSID or name </description_user>
+ <access_rights>read_write</access_rights>
+ <type>boolean</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiSupportedDataRates" psid="2041">
+ <description_user>Defines the supported non-HT data rates. It is encoded as N+1 octets where the first octet is N and the subsequent octets each describe a single supported rate.</description_user>
+ <access_rights>read_only</access_rights>
+ <units>500 kbps</units>
+ <type>octet_string</type>
+ <range_min>2</range_min><range_max>16</range_max><default>{ 0x02, 0x04, 0x0b, 0x0c, 0x12, 0x16, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c }
+ </default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDualBandConcurrency" psid="6123">
+ <description_user>Identify whether the chip supports dualband concurrency or not (RSDB vs. VSDB). Set in the respective platform htf file.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiApOlbcDuration" psid="2076">
+ <description_user>How long, in milliseconds, the AP enables reception of BEACON frames to perform Overlapping Legacy BSS Condition(OLBC). If set to 0 then OLBC is disabled.</description_user>
+ <type>uint16</type>
+ <default>300</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiApOlbcInterval" psid="2077">
+ <description_user>How long, in milliseconds, between periods of receiving BEACON frames to perform Overlapping Legacy BSS Condition(OLBC). This value MUST exceed the OBLC duration MIB unifiApOlbcDuration. If set to 0 then OLBC is disabled.</description_user>
+ <type>uint16</type>
+ <default>2000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiDNSSupportActivated" psid="2078">
+ <description_user>This MIB activates support for transmitting DNS frame via MLME.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMaxClient" psid="2550">
+ <description_user>Restricts the maximum number of associated STAs for SoftAP.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>10</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiPMFAssociationComebackTimeDelta" psid="6050">
+ <description_user>Timeout interval, in TU, for the TimeOut IE in the SA Query request frame. </description_user>
+ <type>uint32</type>
+ <default>1100</default>
+ <nature>software</nature><module>mlme</module><!-- ap -->
+ </config_element>
+ <config_element name="unifiDefaultDwellTime" psid="2538">
+ <description_user>Dwell time, in TU, for frames that need a response but have no dwell time associated</description_user>
+ <type>uint16</type>
+ <default>50</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <!-- GO protection during scan -->
+ <config_element name="unifiGOScanAbsenceDuration" psid="2548">
+ <description_user>Duration of the Absence time to use when protecting P2PGO VIFs from scan operations. A value of 0 disables the feature.</description_user>
+ <default>7</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiGOScanAbsencePeriod" psid="2549">
+ <description_user>Period of the Absence/Presence times cycles to use when protecting P2PGO VIFs from scan operations.</description_user>
+ <default>14</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <!-- AP protection during scan -->
+ <config_element name="unifiAPScanAbsenceDuration" psid="2480">
+ <description_user>Duration of the Absence time to use when protecting AP VIFs from scan operations. A value of 0 disables the feature.</description_user>
+ <default>7</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiAPScanAbsencePeriod" psid="2481">
+ <description_user>Period of the Absence/Presence times cycles to use when protecting AP VIFs from scan operations.</description_user>
+ <default>14</default>
+ <units>beacon intervals</units>
+ <type>uint16</type>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <!-- VHT Activation Control Elements -->
+ <config_element name="unifiVhtActivated" psid="2045">
+ <description_user>Activate VHT mode.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of VHT Activation Control Elements -->
+ <config_element name="unifiTqamActivated" psid="2235">
+ <description_user>Activate Vendor VHT IE for 256-QAM mode on 2.4GHz.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of TQAM / Vendor VHT IE -->
+ <!-- HT Activation Control Elements -->
+ <config_element name="unifiHtActivated" psid="2046">
+ <description_user>Activate HT mode.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <!-- end of HT Activation Control Elements -->
+ <config_element name="unifiWipsActivated" psid="5050">
+ <description_user>Activate Wips.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiSoftAp40MHzOn24G" psid="2029">
+ <description_user>Enables 40MHz operation on 2.4GHz band for SoftAP.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifi24G40MHZChannels" psid="2035">
+ <description_user>Enables 40Mz wide channels in the 2.4G band for STA.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxUsingLdpcActivated" psid="5030">
+ <description_user>LDPC will be used to code packets, for transmit only. If disabled, chip will not send LDPC coded packets even if peer supports it. To advertise reception of LDPC coded packets,enable bit 0 of unifiHtCapabilities, and bit 4 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI20Activated" psid="5040">
+ <description_user>SGI 20MHz will be used to code packets for transmit only. If disabled, chip will not send SGI 20MHz packets even if peer supports it. To advertise reception of SGI 20MHz packets, enable bit 5 of unifiHtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI40Activated" psid="5041">
+ <description_user>SGI 40MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 40MHz packets even if peer supports it. To advertise reception of SGI 40MHz packets, enable bit 6 of unifiHtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI80Activated" psid="5042">
+ <description_user>SGI 80MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 80MHz packets even if peer supports it. To advertise reception of SGI 80MHz packets, enable bit 5 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTxSGI160Activated" psid="5043">
+ <description_user>SGI 160/80+80MHz will be used to code packets, for transmit only. If disabled, chip will not send SGI 160/80+80MHz packets even if peer supports it. To advertise reception of SGI 160/80+80MHz packets, enable bit 6 of unifiVhtCapabilities.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacAddressRandomisation" psid="5044">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enabling Mac Address Randomisation to be applied for Probe Requests when scanning.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacAddressRandomisationMask" psid="5047">
+ <description_user>FW randomises MAC Address bits that have a corresponding bit set to 0 in the MAC Mask for Probe Requests. This excludes U/L and I/G bits which will be set to Local and Individual respectively.</description_user>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>6</range_max><default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiMacSequenceNumberRandomisationActivated" psid="2020">
+ <description_user>Enabling Sequence Number Randomisation to be applied for Probe Requests when scanning. Note: Randomisation only happens, if mac address gets randomised.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <!-- Start of roaming-relevant MIBs -->
+ <config_element name="unifiRoamingActivated" psid="2049">
+ <description_user>Activate Roaming functionality</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiScanTrigger" psid="2050">
+ <description_user>The RSSI value, in dBm, below which roaming scan shall start. </description_user>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max><default>-75</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiScanNoCandidateDeltaTrigger" psid="2064">
+ <description_user>The value, in dBm, by which unifiRoamRssiScanTrigger is lowered when no roaming candidates are found. </description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <range_min>1</range_min><range_max>255</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamDeltaTrigger" psid="2051">
+ <description_user>Hysteresis value, in dBm, for UnifiRoamRssiScanTrigger and unifiRoamCUScanTrigger. i.e.: If the current AP RSSI is greater than UnifiRoamRssiScanTrigger + UnifiRoamRssiDeltaTrigger, soft roaming scan can be terminated.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>255</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCachedChannelScanPeriod" psid="2052">
+ <description_user>The scan period for cached channels background roaming (microseconds)</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>20000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="UnifiRoamTrackingScanPeriod" psid="2299">
+ <description_user>The scan period for tracking not yet suitable candidate(s)(microseconds)</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>5000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamConnectionQualityCheckWaitAfterConnect" psid="2506">
+ <description_user>The amount of time a STA will wait after connection before starting to check the MLME-installed connection quality trigger thresholds</description_user>
+ <type>uint16</type>
+ <units>ms</units>
+ <default>200</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRoamScanBand" psid="2055">
+ <description_user>Indicates whether only intra-band or all-band should be used for roaming scan. 2 - Roaming across band 1 - Roaming within band</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>2</range_max><default>2</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamFullChannelScanFrequency" psid="2058">
+ <description_user>Every how many cached channel scans run a full channel scan. </description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>9</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamMode" psid="2060">
+ <description_user>Enable/Disable host resume when roaming. 0: Wake up the host all the time. 1: Only wakeup the host if the AP is not white-listed. 2: Don't wake up the host.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max><default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamEAPTimeout" psid="2065">
+ <description_user>Timeout, in ms, for receiving the first EAP/EAPOL frame from the AP during roaming</description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <default>200</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRSSIBoost" psid="2298">
+ <description_user>The value in dBm of the RSSI boost for each band</description_user>
+ <type>int16</type>
+ <table_name>unifiRoamRSSIBoostTable</table_name>
+ <default_list>
+ <default index1="1">0</default>
+ <default index1="2">0</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCuLocal" psid="2300">
+ <description_user>Channel utilisation for the STA VIF, value 255=100% channel utilisation. - used for roaming</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>255</range_max><default>0</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRoamCUScanNoCandidateDeltaTrigger" psid="2301">
+ <description_user>The delta, in percentage points, to apply to unifiRoamCUScanTrigger when no candidate found during first cycle of cached channel soft scan, triggered by channel utilization.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>15</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamAPSelectDeltaFactor" psid="2302">
+ <description_user>How much higher, in percentage points, does a candidate's score needs to be in order be considered an eligible candidate? A "0" value renders all candidates eligible. Please note this applies only to soft roams.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>20</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUWeight" psid="2303">
+ <description_user>Weight of CUfactor, in percentage points, in AP selection algorithm.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>35</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUFactor" psid="2295">
+ <description_user>Bi dimensional octet string table for allocating CUfactor to CU values. First index is the radio band, and the second will be CU table entry.
+ The tables define the maximum CU value to which the values do apply(MAX CU), an OFFSET and an A value for the equation:
+ CUfactor = OFFSET - A*(CU)/10
+ </description_user>
+ <type>octet_string</type>
+ <table_name>unifiRoamCUFactorTable</table_name>
+ <default_list>
+ <default index1="1">{0x09, 0x64, 0x00}</default>
+ <default index1="2">{0x45, 0x6F, 0x0D}</default>
+ <default index1="3">{0x65, 0x14, 0x00}</default>
+ <default index1="4">{0x1D, 0x64, 0x00}</default>
+ <default index1="5">{0x4F, 0x94, 0x10}</default>
+ <default index1="6">{0x65, 0x14, 0x00}</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiweight" psid="2305">
+ <description_user>Weight of RSSI factor, in percentage points, in AP selection algorithm.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>65</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamRssiFactor" psid="2306">
+ <description_user>Table allocating RSSIfactor to RSSI values range.</description_user>
+ <type>octet_string</type>
+ <table_name>unifiRoamRssiFactorTable</table_name>
+ <default_list>
+ <default index1="1">{0xC9, 0x64, 0x00, 0x00}</default>
+ <default index1="2">{0xC4, 0x5A, 0x02, 0x3C}</default>
+ <default index1="3">{0xBA, 0x3C, 0x03, 0x46}</default>
+ <default index1="4">{0xB0, 0x14, 0x04, 0x50}</default>
+ <default index1="5">{0xA6, 0x00, 0x02, 0x5A}</default>
+ <default index1="6">{0x81, 0x00, 0x00, 0x00}</default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRSSICURoamScanTrigger" psid="2307">
+ <description_user>The current channel Averaged RSSI value below which a soft roaming scan shall initially start, providing high channel utilisation (see unifiRoamCUScanTrigger). This is a table indexed by frequency band.</description_user>
+ <type>int16</type>
+ <table_name>unifiRSSICURoamScanTriggerTable</table_name>
+ <default_list>
+ <default index1="1"> -60 </default>
+ <default index1="2"> -70 </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamCUScanTrigger" psid="2308">
+ <description_user>BSS Load / Channel Utilisation doesn't need to be monitored more than every 10th Beacons. This is a table indexed by frequency band.</description_user>
+ <type>uint16</type>
+ <table_name>unifiRoamCUScanTriggerTable</table_name>
+ <default_list>
+ <default index1="1"> 70 </default>
+ <default index1="2"> 70 </default>
+ </default_list>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamBSSLoadMonitoringFrequency" psid="2309">
+ <description_user>How often, in reveived beacons, should the BSS load be monitored? - used for roaming</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamEapolTimeout" psid="2314">
+ <description_user>Maximum time, in seconds, allowed for an offloaded Eapol (4 way handshake).</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>100</range_max><default>10</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamDeauthReason" psid="2294">
+ <description_user>A deauthentication reason for which the STA will trigger a roaming scan rather than disconnect directly.</description_user>
+ <type>uint16</type>
+ <default>3</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamBlacklistSize" psid="2310">
+ <description_user>Do not remove! Read by the host! And then passed up to the framework.</description_user>
+ <type>uint16</type>
+ <units>entries</units>
+ <range_min>0</range_min><range_max>100</range_max><default>5</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+
+ <config_element name="unifiRoamScanControl" psid="2067">
+ <description_user>NCHO: Enable MCD NCHO feature.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module><!-- scan --><!-- roam -->
+ </config_element>
+ <config_element name="unifiRoamDfsScanMode" psid="2068">
+ <description_user>NCHO: For certification and Host use only.</description_user>
+ <type>uint16</type>
+ <range_min>0</range_min><range_max>2</range_max><default>1</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiFullRoamScanPeriod" psid="2053">
+ <description_user>NCHO: For certification and Host use only.</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><default>30000000</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamScanMaxActiveChannelTime" psid="2057">
+ <description_user>NCHO: Name confusion for Host compatibility.</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><default>120</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanNProbe" psid="2072">
+ <description_user>NCHO: The number of ProbeRequest frames per channel. </description_user>
+ <type>uint16</type><default>2</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanHomeTime" psid="2069">
+ <description_user>NCHO: The time, in TU, to spend NOT scanning during a HomeAway scan.</description_user>
+ <type>uint16</type>
+ <range_min>40</range_min><default>45</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <config_element name="unifiRoamScanHomeAwayTime" psid="2070">
+ <description_user>NCHO: The time, in TU, to spend scanning during a HomeAway scan.</description_user>
+ <type>uint16</type>
+ <range_min>40</range_min><default>100</default>
+ <nature>software</nature><module>mlme</module><!-- scan -->
+ </config_element>
+ <!-- End of roaming-relevant MIBs -->
+
+ <!-- Start of EDCA cw(min/max), aifs config param -->
+ <config_element name="unifiOverrideEDCAParamActivated" psid="2155">
+ <description_user>Activate override of STA edca config parameters with unifiOverrideEDCAParam.
+ default: True - for volcano, and False - for others
+ </description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParam" psid="2156">
+ <description_user>EDCA Parameters to be used if unifiOverrideEDCAParamActivated is true, indexed by unifiAccessClassIndex
+ octet 0 - AIFSN
+ octet 1 - [7:4] ECW MAX [3:0] ECW MIN
+ octet 2 ~ 3 - TXOP[7:0] TXOP[15:8] in 32 usec units for both non-HT and HT connections.
+ </description_user>
+ <access_rights>read_write</access_rights>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <table_name>unifiOverrideEDCAParamTable</table_name>
+ <default_list>
+ <default index1="1">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="2">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="3">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ <default index1="4">{ 0x0, 0x32, 0x0, 0x0 }</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- End of EDCA cw(min/max), aifs config param -->
+
+ <config_element name="unifiSetFixedAMPDUAggregationSize" psid="4152">
+ <description_user>A non 0 value defines the max number of mpdus that a ampdu can have. A 0 value tells FW to manage the aggregation size.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+
+ <!-- mibs for LAA -->
+ <config_element name="unifiRaaTxHostRate" psid="4148">
+ <description_user>Fixed TX rate set by Host. Ideally this should be done by the driver. 0 means "host did not specified any rate".</description_user>
+ <type>uint32</type>
+ <function_list>
+ <function type="set" function_name="mibuint32set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint32get" is_for_vif="false" ></function>
+ </function_list>
+ <!-- <default>16385</default> 11b 1M long preamble -->
+ <!-- <default>32774</default> 11n MCS6 -->
+ <!-- <default>32775</default> 11n MCS7 -->
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiWMMStallEnable" psid="4139">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: Enable workaround stall WMM traffic if the admitted time has been used up, used for certtification.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="unifiLaaNssSpeculationIntervalSlotTime" psid="2330">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for spatial streams.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>300</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaNssSpeculationIntervalSlotMaxNum" psid="2331">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for spatial stream.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>5</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaBwSpeculationIntervalSlotTime" psid="2332">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for bandwidth.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>300</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaBwSpeculationIntervalSlotMaxNum" psid="2333">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for bandwidth.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>8</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaMcsSpeculationIntervalSlotTime" psid="2334">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for MCS or rate index.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaMcsSpeculationIntervalSlotMaxNum" psid="2335">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for MCS or rate index.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>10</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaGiSpeculationIntervalSlotTime" psid="2336">
+ <description_user>For Link Adaptation Algorithm. It defines the repeatable amount of time, in ms, that
+ firmware will start to send speculation frames for guard interval.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiLaaGiSpeculationIntervalSlotMaxNum" psid="2337">
+ <description_user>For Link Adaptation Algorithm. It defines the maximum number of speculation time slot
+ for guard interval.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>50</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="unifiLaaProtectionConfigOverride" psid="2356">
+ <description_user>Overrides the default Protection configuration.
+ Only valid flags are DPIF_PEER_INFO_PROTECTION_TXOP_AMPDU and DPIF_PEER_INFO_PROTECTION_ALLOWED.
+ Default allows protection code to work out the rules based on VIF configuration.
+ If DPIF_PEER_INFO_PROTECTION_ALLOWED is unset, all protection, for this vif, is disabled.
+ If DPIF_PEER_INFO_PROTECTION_TXOP_AMPDU is unset then, for the specified vif, the first A-MPDU in the TxOp is no longer protected.</description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="true" ></function>
+ </function_list>
+ <default>6</default>
+ <nature>software</nature>
+ </config_element>
+
+ <config_element name="UnifiLaaTxDiversityBeamformEnabled" psid="2350">
+ <description_user>For Link Adaptation Algorithm. It is used to enable or disable TX beamformer
+ functionality.</description_user>
+ <type>boolean</type>
+ <function_list>
+ <function type="set" function_name="mibboolset" is_for_vif="false" ></function>
+ <function type="get" function_name="mibboolget" is_for_vif="false" ></function>
+ </function_list>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="UnifiLaaTxDiversityBeamformMinMcs" psid="2351">
+ <description_user>For Link Adaptation Algorithm. TX Beamform is applied
+ when MCS is same or larger than this threshold value.
+ </description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>2</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="UnifiLaaTxDiversityFixMode" psid="2352">
+ <description_user>For Link Adaptation Algorithm. It is used to fix TX diversity mode.
+ With two antennas available and only one spatial stream used, then one of the
+ following modes can be selected:
+ - 0 : Not fixed. Tx diversity mode is automatically selected by LAA.
+ - 1 : CDD fixed mode
+ - 2 : Beamforming fixed mode
+ - 3 : STBC fixed mode
+ </description_user>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ </function_list>
+ <default>0</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- LAA end -->
+ <!-- mibs for Fallback -->
+ <config_element name="unifiFallbackShortFrameRetryDistribution" psid="4149">
+ <description_user>Configure the retry distribution for fallback for short frames
+ octet 0 - Number of retries for starting rate.
+ octet 1 - Number of retries for next rate.
+ octet 2 - Number of retries for next rate.
+ octet 3 - Number of retries for next rate.
+ octet 4 - Number of retries for next rate.
+ octet 5 - Number of retries for last rate.
+ If 0 is written to an entry then the retries for that rate will be the short retry limit minus the sum
+ of the retries for each rate above that entry (e.g. 15 - 5). Therefore, this should always be the value for octet 4.
+ Also, when the starting rate has short guard enabled, the number of retries in octet 1 will be used and
+ for the next rate in the fallback table (same MCS value, but with sgi disabled) octet 0 number of retries will
+ be used.</description_user>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>5</range_max><default>{0x3, 0x2, 0x2, 0x2, 0x1, 0x0}</default>
+ <function_list>
+ <function type="get" function_name="mibdplanefallbackget" is_for_vif="false" ></function>
+ <function type="set" function_name="mibdplanefallbackset" is_for_vif="false" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- mibs for Fallback end -->
+ <!-- mibs for Dplane debug -->
+ <config_element name="unifiDPlaneDebug" psid="6073">
+ <description_user>Bit mask for turning on individual debug entities in
+ the data_plane that if enabled effect throughput. See DPLP_DEBUG_ENTITIES_T in dplane_dplp_debug.h for bits.
+ Default of 0x203 means dplp, ampdu and metadata logs are enabled.</description_user>
+ <type>uint32</type>
+ <default>0x203</default>
+ <function_list>
+ <function type="get" function_name="mibdplanedebugmaskget" is_for_vif="true" ></function>
+ <function type="set" function_name="mibdplanedebugmaskset" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- mibs for Dplane debug -->
+ <config_element name="unifiThroughputDebug" psid="2254">
+ <description_user>is used to access throughput related counters that can help diagnose throughput problems.
+ The index of the MIB will access different counters, as described in SC-506328-DD.
+ Setting any index for a VIF to any value, clears all DPLP debug stats for the MAC instance used by the VIF.
+ This is useful mainly for debugging LAA or small scale throughput issues that require short term
+ collection of the statistics.</description_user>
+ <type>uint16</type>
+ <table_name>unifiThroughputDebugTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibthroughputdiagnosticsget" is_for_vif="true" ></function>
+ <function type="set" function_name="mibthroughputdiagnosticsset" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiThroughputDebugReportInterval" psid="4153">
+ <description_user>dataplane reports throughput diag report every this interval in msec.
+ 0 means to disable this report.
+ </description_user>
+ <type>uint16</type>
+ <default>1000</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false" ></function>
+ <function type="set" function_name="mibuint16set" is_for_vif="false" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- MIBs for Host Frame Statistics -->
+ <config_element name="unifiFrameTXCounters" psid="2327">
+ <description_user>Frame TX Counters used by the host. These are required by MCD.</description_user>
+ <type>uint32</type>
+ <table_name>unifiFrameTXCountersTable</table_name>
+ <function_list>
+ <function type="get" function_name="mib_frameTXcounters_get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiFrameRXCounters" psid="2326">
+ <description_user>Frame RX Counters used by the host. These are required by MCD. </description_user>
+ <type>uint32</type>
+ <table_name>unifiFrameRXCountersTable</table_name>
+ <function_list>
+ <function type="get" function_name="mib_frameRXcounters_get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiEnableMgmtTxPacketStats" psid="2249">
+ <description_user>Consider management packets for TX stats counters</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <function_list>
+ <function type="set" function_name="mib_mgmt_tx_packet_stats_set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiARPDetectResponseCounter" psid="2247">
+ <description_user>Counter used to track ARP Response frame for Enhanced ARP Detect. This is required by Volcano. </description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function type="get" function_name="mibuint16get" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <!-- MIBs for Link Layer Statistics -->
+ <config_element name="unifiBeaconReceived" psid="2228">
+ <description_user>Access point beacon received count from connected AP</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRadioLpRxRssiThresholdLower" psid="6028">
+ <description_user>The lower RSSI threshold for switching between low power rx and normal rx.
+ If the RSSI avg of received frames is lower than this value for a VIF, then that VIF will vote against using low-power radio RX.
+ Low power rx could negatively influence the receiver sensitivity.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-75</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRadioLpRxRssiThresholdUpper" psid="6029">
+ <description_user>The upper RSSI threshold for switching between low power rx and normal rx.
+ If the RSSI avg of received frames is higher than this value for a VIF, then that VIF will vote in favour of using low-power radio RX.
+ Low power RX could negatively influence the receiver sensitivity.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-65</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiUnsyncVifLnaEnabled" psid="6010">
+ <description_user>Enable or disable use of the LNA for unsynchronised VIFs.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlEnabled" psid="6013">
+ <description_user>Enable dynamic switching of the LNA based on RSSI for synchronised VIFs.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlRssiThresholdLower" psid="6014">
+ <description_user>The lower RSSI threshold for dynamic switching of the LNA.
+ If the RSSI avg of received frames is lower than this value for all scheduled VIFs, then the external LNA will be enabled.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-40</default>
+ <nature>hardware</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiLnaControlRssiThresholdUpper" psid="6015">
+ <description_user>The upper RSSI threshold for dynamic switching of the LNA.
+ If the RSSI avg of received frames is higher than this value for all scheduled VIFs, then the external LNA will be disabled.</description_user>
+ <type>int16</type>
+ <units>dBm</units>
+ <range_min>-128</range_min><range_max>127</range_max><default>-30</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiACRetries" psid="2229">
+ <description_user>It represents the number of retransmitted frames under each ac priority
+ (indexed by unifiAccessClassIndex). This number will wrap to zero after the range is exceeded.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiAcTxConfirmTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioOnTime" psid="2230">
+ <description_user>msecs the radio is awake (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioTxTime" psid="2231">
+ <description_user>msecs the radio is transmitting (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioRxTime" psid="2232">
+ <description_user>msecs the radio is in active receive (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioScanTime" psid="2233">
+ <description_user>msecs the radio is awake due to all scan (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiRadioOnTimeNan" psid="2236">
+ <description_user>msecs the radio is awake due to NAN operations (32 bits number accruing over time). On multi-radio platforms an index to the radio instance is required</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <table_name>unifiRadioIDTable</table_name>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiPSLeakyAP" psid="2234">
+ <description_user>indicate that this AP typically leaks packets beyond the guard time (5msecs).</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibllsstatsget" is_for_vif="true" ></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <!-- End of MIBs for Link Layer Statistics -->
+ <config_element name="unifiRadioMeasurementActivated" psid="2043">
+ <description_user>When TRUE Radio Measurements are supported.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRadioMeasurementCapabilities" psid="2044">
+ <description_user>RM Enabled capabilities of the chip. See SC-503520-SP for further details.</description_user>
+ <type>octet_string</type>
+ <range_min>5</range_min><range_max>5</range_max><default>{ 0x73, 0x00, 0x00, 0x00, 0x04 }</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiOverrideDefaultBETXOP" psid="2365">
+ <description_user>Golden Certification MIB don't delete, change PSID or name: When set to non-zero value then this will override the BE TXOP for 11g (in 32 usec units) to the value specified here.</description_user>
+ <type>uint16</type>
+ <default>78</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiOverrideDefaultBETXOPForHT" psid="2364">
+ <description_user>When set to non-zero value then this will override the BE TXOP for 11n and higher modulations (in 32 usec units) to the value specified here.</description_user>
+ <type>uint16</type>
+ <default>171</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiRXABBTrimSettings" psid="2366">
+ <description_user>Various settings to change RX ABB filter trim behavior.</description_user>
+ <type>uint32</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTrimsEnable" psid="2367">
+ <description_user>A bitmap for enabling/disabling trims at runtime. Check unifiEnabledTrims enum for description of the possible values.</description_user>
+ <type>uint32</type>
+ <default>0x0ff5</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioCCAThresholds" psid="2368">
+ <description_user>The wideband CCA ED thresholds so that the CCA-ED triggers at the regulatory value of -62 dBm.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiRadioCCAThresholdsTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0x03, 0x07, 0x03, 0x03, 0x00, 0x16, 0x00, 0x30, 0x00, 0x16, 0x00, 0x30 }</default>
+ <default index1="2">{ 0x02, 0x03, 0x07, 0x03, 0x03, 0x00, 0x16, 0x00, 0x30, 0x00, 0x16, 0x00, 0x30 }</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTxIqDelay" psid="5117">
+ <description_user>The differential delay applied between I and Q paths in Tx.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiRadioTxIqDelayTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0xff, 0xff, 0xff, 0x00}</default>
+ <default index1="2">{ 0x02, 0xff, 0xff, 0xff, 0x00}</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNarrowbandCCAThresholds" psid="5099">
+ <description_user>The narrowband CCA ED thresholds so that the CCA-ED triggers at the regulatory value of -62 dBm.</description_user>
+ <type>octet_string</type>
+ <range_min>0</range_min><range_max>255</range_max>
+ <function type="set" function_name="mibhalmacmodemchangeparams" is_for_vif="false"></function>
+ <table_name>unifiRadioCCAThresholdsTable</table_name>
+ <default_list>
+ <!-- A bug (SSB-37420) in the mib code means that if you want to use default octet strings in a table -->
+ <!-- you need to specify at least two rows, so here we just provide two identical rows. -->
+ <default index1="1">{ 0x01, 0x03, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03 }</default>
+ <default index1="2">{ 0x02, 0x03, 0x06, 0x03, 0x01, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x1f, 0x23, 0x03 }</default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+
+ <config_element name="unifiHardwarePlatform" psid="2369">
+ <description_user>Hardware platform. This is necessary so we can apply tweaks to specific revisions, even though they might be running the same baseband and RF chip combination. Check unifiHardwarePlatform enum for description of the possible values.</description_user>
+ <type>unifiHardwarePlatform</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDPDTrainingDuration" psid="2371">
+ <description_user>Duration of DPD training (in ms).</description_user>
+ <type>uint16</type>
+ <default>10</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDPDTrainPacketConfig" psid="2373">
+ <description_user>
+This MIB allows the dummy packets training bandwidth and rates to be overriden. Tipically the bandwidth would be the same as the channel bandwidth (for example 80 MHz packets for an 80 Mhz channel) and rates MCS1 and MCS5. With this MIB you can set, for example, an 80 MHz channel to be trained using 20 MHz bandwidth (centered or not) with MCS2 and MCS7 packets. The MIB index dictates what channel bandwidth the configuration is for (1 for 20 MHz, 2 for 40 MHz and so on). The format is:
+ - octet 0: train bandwidth (this basically follows the rice_channel_bw_t enum).
+ - octet 1: train primary channel position
+ - octet 2-3: OFDM 0 rate
+ - octet 4-5: OFDM 1 rate
+ - octet 6-7: CCK rate (unused)
+The rates are encoded in host(FAPI) format, see SC-506179, section 4.41.
+ </description_user>
+ <access_rights>read_write</access_rights>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <function type="set" function_name="mibricechangefsmparams" is_for_vif="false"></function>
+ <table_name>unifiDPDTrainPacketConfigTable</table_name>
+ <default_list>
+ <!-- 20 MHz: Train on 20 MHz bandwidth, using 11n20_13mbps (MCS1) and 11n20_52mbps (MCS5) -->
+ <default index1="1"> {0x00, 0x00, 0x80, 0x01, 0x80, 0x05, 0x00, 0x00} </default>
+ <!-- 40 MHz: Train on 40/20 MHz bandwidth, using 11n40_27mbps (MCS1) and 11n20_52mbps (MCS5) -->
+ <default index1="2"> {0x01, 0x00, 0x82, 0x01, 0x80, 0x05, 0x00, 0x00} </default>
+ <!-- 80 MHz: Train on 40 MHz bandwidth, using 11n40_27mbps (MCS1) and 11n40_108mbps (MCS5) -->
+ <default index1="3"> {0x01, 0x00, 0x82, 0x01, 0x82, 0x05, 0x00, 0x00} </default>
+ </default_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiCurrentBssChannelFrequency" psid="2318">
+ <description_user>Centre frequency for the connected channel</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentBssBandwidth" psid="2317">
+ <description_user>Current bandwidth the STA is operating on
+ channel_bw_20_mhz = 20,
+ channel_bw_40_mhz = 40,
+ channel_bw_80_mhz = 80,
+ channel_bw_160_mhz = 160</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiCurrentBssNss" psid="2312">
+ <description_user>Specifies current AP antenna mode: BIG DATA
+ 0 = SISO,
+ 1 = MIMO (2x2),
+ 2 = MIMO (3x3),
+ 3 = MIMO (4x4)</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiAntennaMode</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiStaVifLinkNss" psid="2324">
+ <description_user>STA Vif (Not P2P) while connected to an AP and does not apply to TDLS links. Specifies the max number of NSS that the link can use
+ 0 = SISO,
+ 1 = MIMO (2x2),
+ 2 = MIMO (3x3),
+ 3 = MIMO (4x4)</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiAntennaMode</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiAPMimoUsed" psid="2313">
+ <description_user>AP uses MU-MIMO</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiHostNumAntennaControlActivated" psid="2091">
+ <description_user>Host has a control of number of antenna to use</description_user>
+ <access_rights>read_only</access_rights>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamingCount" psid="2315">
+ <description_user>Number of roams</description_user>
+ <type>uint16</type>
+ <access_rights>read_only</access_rights>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiRoamingAKM" psid="2316">
+ <description_user>specifies current AKM
+ 0 = None
+ 1 = OKC
+ 2 = FT (FT_1X)
+ 3 = PSK
+ 4 = FT_PSK
+ 5 = PMKSA Caching</description_user>
+ <access_rights>read_only</access_rights>
+ <type>unifiRoamingAKM</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTPCEnabled" psid="6019">
+ <description_user> Deprecated. Golden Certification MIB don't delete, change PSID or name </description_user>
+ <type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTestTspecHack" psid="6060">
+ <description_user>Test only: Hack to allow in-house tspec testing</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTestTspecHackValue" psid="6061">
+ <description_user>Test only: Saved dialog number of tspec request action frame from the Host</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiTestScanNoMedium" psid="6122">
+ <description_user>Test only: Stop Scan from using the Medium to allow thruput testing.</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature><module>mlme</module>
+ </config_element>
+ <config_element name="unifiBlockScanAfterNumSchedVif" psid="2272">
+ <description_user>Block Scan requests from having medium time after a specified amount of sync VIFs are schedulable. A value of 0 disables the functionality.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibuint16set" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+
+ <!-- ******************************************************************************************* -->
+ <config_element name="hutsReadWriteDataElementInt32" psid="6100">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int32 type.</description_user>
+ <type>uint32</type>
+ <range_min>0</range_min><range_max>4294967295</range_max><default>1000</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteDataElementBoolean" psid="6101">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of boolean type.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteDataElementOctetString" psid="6102">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of octet string type.</description_user>
+ <type>octet_string</type>
+ <range_min>9</range_min><range_max>9</range_max>
+ <default>{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteTableInt16Row" psid="6103">
+ <description_user>Reserved for HUTS tests - Data element read/write entry table of int16 type.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int16</type>
+ <range_min>-32768</range_min><range_max>32767</range_max>
+ <table_name>hutsReadWriteTableInt16IdTable</table_name>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteTableOctetStringRow" psid="6104">
+ <description_user>Reserved for HUTS tests - Data element read/write entry table of octet string type.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>73</range_max>
+ <table_name>hutsReadWriteTableOctetStringTable</table_name>
+ <default_list>
+ <!-- Row 1 -->
+ <default index1="1">{0x53,0x54,0x70,0x73,0x74,0x75,0x7A,0x7B,0x7C,
+ 0x7D,0x7E,0x7F,0x80,0x81,0x82}</default>
+ <!-- Row 2 -->
+ <default index1="2">{0x01,0x02,0x03,0x05,0x06,0x07,0x08,0x09,0x0A,0x10,
+ 0x11,0x80,0x81,0x82}</default>
+ <!-- Row 3 -->
+ <default index1="3">{0x01,0x03,0x05,0x16,0x17,0x19,0x1A,0x1B,0x1C,0x1E,
+ 0x1F,0x20,0x21,0x80,0x81,0x82}</default>
+ <!-- Tow 4 -->
+ <default index1="4">{0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x24,0x25,
+ 0x26,0x29,0x2A,0x2B,0x3A,0x80,0x81,0x82}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteRemoteProcedureCallInt32" psid="6105">
+ <description_user>Reserved for HUTS tests - Remote Procedure call read/write entry of int32 type.</description_user>
+ <type>uint32</type>
+ <default>0x000A0001</default>
+ <function_list>
+ <function type="get" function_name="mibuint32get" is_for_vif="true"></function>
+ <function type="set" function_name="mibuint32set" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteRemoteProcedureCallOctetString" psid="6107">
+ <description_user>Reserved for HUTS tests - Remote Procedure call read/write entry of octet string type.</description_user>
+ <type>octet_string</type>
+ <range_min>144</range_min><range_max>144</range_max>
+ <function_list>
+ <function type="get" function_name="miboctetstringget"></function>
+ <function type="set" function_name="miboctetstringset"></function>
+ </function_list>
+ <table_name>hutsReadWriteRPCTableOctetStringTable</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIInt16" psid="6108">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int16 type via internal API.</description_user>
+ <default>-55</default>
+ <type>int16</type>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIUint16" psid="6109">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of unsigned int16 type via internal API.</description_user>
+ <type>uint16</type>
+ <default>0x0730</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIUint32" psid="6110">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of unsigned int32 type via internal API.</description_user>
+ <units>µs</units>
+ <type>uint32</type>
+ <range_max>2147483647</range_max><default>30000</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIInt64" psid="6111">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of int64 type via internal API.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <function_list>
+ <function type="get" function_name="mibtsftime" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIBoolean" psid="6112">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of boolean type via internal API.</description_user>
+ <type>boolean</type>
+ <default>true</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIOctetString" psid="6113">
+ <description_user>Reserved for HUTS tests - Data element read/write entry of octet string type via internal API.</description_user>
+ <type>octet_string</type>
+ <range_min>8</range_min><range_max>8</range_max>
+ <default>{ 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- Index -->
+ <config_element name="hutsReadWriteTableInt16" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteTableOctetString" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteRPCTableOctetStringTableIndex0" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteRPCTableOctetStringTableIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixedSizeTableIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableindex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeysindex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKeysIndex" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>4</range_max>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>1</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyIndex2" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>6</range_max>
+ <description_user>table index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyIndex1" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>3</range_max>
+ <description_user>group index</description_user>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyIndex2" psid="0">
+ <type>integer</type>
+ <range_min>1</range_min><range_max>3</range_max>
+ <description_user>temperature index</description_user>
+ </config_element>
+ <!-- Columns -->
+ <config_element name="hutsReadWriteInternalAPIFixedSizeTableRow" psid="6114">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <type>int16</type>
+ <range_min>0</range_min><range_max>100</range_max>
+ <table_name>hutsReadWriteInternalAPIFixedSizeTable</table_name>
+ <default_list>
+ <default index1="1"> 80 </default>
+ <default index1="2"> 80 </default>
+ <default index1="3"> 80 </default>
+ <default index1="4"> 80 </default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableRow" psid="6115">
+ <description_user>Reserved for HUTS tests - Variable size table rows of octet string type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>73</range_max>
+ <table_name>hutsReadWriteInternalAPIVarSizeTable</table_name>
+ <default_list>
+ <!-- Row 1 -->
+ <default index1="1">{0x53,0x54,0x70,0x73,0x74,0x75,0x7A,0x7B,0x7C,
+ 0x7D,0x7E,0x7F,0x80,0x81,0x82}</default>
+ <!-- Row 2 -->
+ <default index1="2">{0x01,0x02,0x03,0x05,0x06,0x07,0x08,0x09,0x0A,0x10,
+ 0x11,0x80,0x81,0x82}</default>
+ <!-- Row 3 -->
+ <default index1="3">{0x01,0x03,0x05,0x16,0x17,0x19,0x1A,0x1B,0x1C,0x1E,
+ 0x1F,0x20,0x21,0x80,0x81,0x82}</default>
+ <!-- Row 4 -->
+ <default index1="4">{0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x24,0x25,
+ 0x26,0x29,0x2A,0x2B,0x3A,0x80,0x81,0x82}</default>
+ </default_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKey1Row" psid="6116">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeys</table_name>
+ <function_list>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKey2Row" psid="6117">
+ <description_user>Reserved for HUTS tests - Fixed size table rows of int16 type via internal API</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeys</table_name>
+ <function_list>
+ <function type="get" function_name="mibhutsint16get" is_for_vif="true"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKey1Row" psid="6118">
+ <description_user>The values stored in hutsReadWriteInternalAPIFixVarSizeTableKeys</description_user>
+ <type>uint32</type>
+ <table_name>hutsReadWriteInternalAPIFixVarSizeTableKeys</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixVarSizeTableKey2Row" psid="6119">
+ <description_user>The values stored in hutsReadWriteInternalAPIFixVarSizeTableKeys</description_user>
+ <type>octet_string</type>
+ <table_name>hutsReadWriteInternalAPIFixVarSizeTableKeys</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIFixSizeTableKeyRow" psid="6120">
+ <description_user>The number of received MPDUs discarded by the CCMP decryption algorithm.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>int64</type>
+ <range_min>0</range_min><range_max>4294967295</range_max>
+ <table_name>hutsReadWriteInternalAPIFixSizeTableKeyRowTable</table_name>
+ <function type="get" function_name="mibtsftime"></function>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="hutsReadWriteInternalAPIVarSizeTableKeyRow" psid="6121">
+ <description_user>Write a DPD LUT entry</description_user>
+ <type>octet_string</type>
+ <range_min>144</range_min><range_max>144</range_max>
+ <function_list>
+ <function type="get" function_name="miboctetstringget"></function>
+ <function type="set" function_name="miboctetstringset"></function>
+ </function_list>
+ <table_name>hutsReadWriteInternalAPIVarSizeTableKeyTable</table_name>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiCUMeasurementInterval" psid="2311">
+ <description_user>The interval in ms to perform the channel usage update</description_user>
+ <type>uint32</type>
+ <range_min>1</range_min><range_max>1000</range_max><default>500</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiChannelBusyThreshold" psid="2018">
+ <description_user>The threshold in percentage of CCA busy time when a channel would be considered busy</description_user>
+ <type>uint16</type>
+ <range_min>1</range_min><range_max>100</range_max><default>25</default>
+ <nature>software</nature><module>macrame</module>
+ </config_element>
+ <config_element name="unifiDebugDisableRadioNannyActions" psid="5082">
+ <description_user>Bitmap to disable the radio nanny actions. B0==radio 0, B1==radio 1</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxCckModemSensitivity" psid="5083">
+ <description_user>Specify values of CCK modem sensitivity for scan, normal and low
+ sensitivity.</description_user>
+ <description_internal>Enables sensitivity thresholds to be updated. Default values are
+ written into modem_settings in halmac_modem_radio_config.c when
+ the structure is initialised.
+ The string of 6 octets is assigned as follows:
+ 0: cck_sync, scan sensitivity.
+ 1: cck_sync, normal sensitivity.
+ 2: cck_sync, low sensitivity.
+ 3: cck_cca, scan sensitivity.
+ 4: cck_cca, normal sensitivity.
+ 5: cck_cca, low sensitivity.
+ </description_internal>
+ <type>octet_string</type>
+ <range_min>6</range_min><range_max>6</range_max>
+ <function type="set" function_name="mibhalmacmodemgenericset"></function>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDpdPerBandwidth" psid="5084">
+ <description_user>Bitmask to enable Digital Pre-Distortion per bandwidth</description_user>
+ <description_internal>Enables DPD per bandwidth per band</description_internal>
+ <type>uint16</type>
+ <default>63</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiBBVersion" psid="5085">
+ <description_user>Baseband chip version number determined by reading BBIC version</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiIQBufferSize" psid="5098">
+ <description_user>Buffer Size for IQ capture to allow CATs to read it.</description_user>
+ <description_internal>Returns the buffer size in bytes for current device</description_internal>
+ <access_rights>read_only</access_rights>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRFVersion" psid="5086">
+ <description_user>RF chip version number determined by reading RFIC version</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTXSettingsRead" psid="5089">
+ <description_user>Read value from Tx settings.</description_user>
+ <description_internal> Read TX debug settings. </description_internal>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioTXSettingsTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRXSettingsRead" psid="5096">
+ <description_user>Read value from Rx settings.</description_user>
+ <description_internal> Read RX debug settings. </description_internal>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioRXSettingsTable</table_name>
+ <type>octet_string</type>
+ <function_list>
+ <function type="get" function_name="mibbmsgget"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioCCADebug" psid="5100">
+ <description_user>Read values from Radio CCA settings.</description_user>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiRadioCCADebugTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibriceuint32get"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNarrowbandCCADebug" psid="5107">
+ <description_user>Read values from Radio CCA settings.</description_user>
+ <access_rights>read_only</access_rights>
+ <table_name>unifiNarrowbandCCADebugTable</table_name>
+ <type>uint32</type>
+ <function_list>
+ <function type="get" function_name="mibhalmacmodemnarrowbandcca"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRxDcocDebug" psid="5112">
+ <description_user>RX DCOC debug testing. Allows user to override LUT index IQ values in combination with unifiRadioRxDcocDebugIqValue. This MIB enables the feature.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false" ></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioRxDcocDebugIqValue" psid="5111">
+ <description_user>RX DCOC debug testing. Allows user to override LUT index IQ values in combination with unifiRadioRxDcocDebug. This MIB sets IQ value that all LUT index Is and Qs get set to.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false" ></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiNannyRetrimDpdMod" psid="5113">
+ <description_user>Bitmap to selectively enable nanny retrim of DPD per modulation. B0==OFDM0, B1==OFDM1, B2==CCK</description_user>
+ <type>uint16</type>
+ <default>2</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDisableDpdSubIteration" psid="5114">
+ <description_user>For Engineering debug use only.</description_user>
+ <description_internal>When set "true" this MIB disables the use of sub-iterations within the DPD trim. This "feature" is intended for debug purposes only, e.g. for stepping through code. In normal usage, sub-iterations should remain enabled. This is achieved by leaving this mib set to "false" (default state).</description_internal>
+ <type>boolean</type>
+ <default>false</default>
+ <function_list>
+ <function type="set" function_name="mibricechangenonfsmparams" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxPriEnergyDetThreshold" psid="5093">
+ <description_user>OBSOLETE. Energy detection threshold for primary 20MHz channel.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxSecEnergyDetThreshold" psid="5094">
+ <description_user>OBSOLETE. Energy detection threshold for secondary 20MHz channel.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiTrafficThresholdToSetupBA" psid="2222">
+ <description_user>Sets the default Threshold (as packet count) to setup BA agreement per TID.</description_user>
+ <type>uint32</type>
+ <default>100</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiModemSgiOffset" psid="5090">
+ <description_user>Overwrite SGI sampling offset. Indexed by Band and Bandwidth. Defaults currently defined in fw.</description_user>
+ <table_name>unifiModemSgiOffsetTable</table_name>
+ <type>uint16</type>
+ <function_list>
+ <function type="set" function_name="mibhalmacmodemgenericset" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRxRadioCsMode" psid="5092">
+ <description_user>OBSOLETE. Configures RX Radio CS detection for 80MHz bandwidth.</description_user>
+ <type>uint16</type>
+ <default>0</default>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiRadioTxPowerOverride" psid="5091">
+ <description_user>Option in radio code to override the power requested by the upper layer</description_user>
+ <access_rights>read_write</access_rights>
+ <type>int16</type>
+ <range_min>-128</range_min><range_max>127</range_max>
+ <table_name>unifiRadioTxPowerOverrideTable</table_name>
+ <function_list>
+ <function type="set" function_name="mibricegenericset" is_for_vif="false"></function>
+ <function type="get" function_name="mibint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>hardware</nature>
+ </config_element>
+ <config_element name="unifiDebugSVCModeStackHighWaterMark" psid="5010">
+ <description_user>Read the SVC mode stack high water mark in bytes</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <function_list>
+ <function type="get" function_name="mibuint16get" is_for_vif="false"></function>
+ </function_list>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFActivated" psid="2650">
+ <description_user>It is used to enable or disable Android Packet Filter(APF).</description_user>
+ <type>boolean</type>
+ <default>false</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFVersion" psid="2651">
+ <description_user>APF version currently supported by the FW.</description_user>
+ <type>uint16</type>
+ <default>4</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFMaxSize" psid="2652">
+ <description_user>Max size in bytes supported by FW per VIF. Includes both program len and data len.</description_user>
+ <access_rights>read_only</access_rights>
+ <type>uint16</type>
+ <default>1024</default>
+ <nature>software</nature>
+ </config_element>
+ <config_element name="unifiAPFActiveModeEnabled" psid="2653">
+ <description_user>Indicates if APF is supported in host active mode. Applicable to only group addressed frames.</description_user>
+ <type>uint16</type>
+ <default>1</default>
+ <nature>software</nature>
+ </config_element>
+ <!-- ******************************************************************************************* -->
+ <config_element name="unifiRoamSoftRoamingEnabled" psid="2054">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanMaxNumberOfProbeSets" psid="2087">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanMaximumAge" psid="2014">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEAutonomousScanNoisy" psid="2016">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEScanProbeInterval" psid="2007">
+ <description_user>Deprecated.</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsBasicHtMcsSet" psid="2563">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsBasicVhtMcsSet" psid="2564">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <config_element name="dot11TDLSChannelSwitchActivated" psid="2567">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsDesignForTestMode" psid="2568">
+ <description_user>Deprecated</description_user><type>uint32</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiTdlsMaximumRetry" psid="2561">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiMLMEConnectionTimeOut" psid="2000">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxNumberOfPeriodicScans" psid="2260">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxRSSISampleSize" psid="2261">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxHotlistAPs" psid="2262">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxSignificantWifiChangeAPs" psid="2263">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiGoogleMaxBssidHistoryEntries" psid="2264">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiRsnCapabilities" psid="2034">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiFtmDefaultGapBeforeFirstBurstPerResponder" psid="5308">
+ <description_user>Deprecated</description_user><type>uint16</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParamBEEnable" psid="5024">
+ <description_user>Deprecated</description_user><type>boolean</type><nature>software</nature>
+ </config_element>
+ <config_element name="unifiOverrideEDCAParamBE" psid="5023">
+ <description_user>Deprecated</description_user><type>octet_string</type><nature>software</nature>
+ </config_element>
+ <!-- ******************************************************************************************* -->
+ <config_table table_name="dot11RSNAStatsTable" num_indices="2">
+ <description_user>This table maintains per-STA statistics in an RSN. The entry with dot11RSNAStatsSTAAddress set to FF-FF-FF-FF-FF-FF shall contain statistics for broadcast/multicast traffic.</description_user>
+ <index1 name="dot11RSNAConfigIndex" />
+ <index2 name="dot11RSNAStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiQueueStatsIdTable" num_indices="1">
+ <description_user>Conceptual table for timing of queue transfers HOST-SW-HW</description_user>
+ <index1 name="unifiQueueStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiRateStatsTable" num_indices="1">
+ <description_user>Conceptual table for transmit/receive rate statistics.</description_user>
+ <index1 name="unifiRateStatsIndex" />
+ </config_table>
+ <config_table table_name="unifiThroughputDebugTable" num_indices="1">
+ <description_user>Conceptual table for throughput diagnostics counters.</description_user>
+ <index1 name="unifiThroughputDebugIndex" />
+ </config_table>
+ <config_table table_name="unifiReadRegTable" num_indices="1">
+ <description_user>Conceptual table for reading registers.</description_user>
+ <index1 name="unifiReadHardwareCounterIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTXSettingsTable" num_indices="2">
+ <description_user>Conceptual table for tx settings.</description_user>
+ <index1 name="unifiMacInstanceIndex" />
+ <index2 name="unifiRadioTXSettingsIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioRXSettingsTable" num_indices="2">
+ <description_user>Conceptual table for rx settings.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiRadioRXSettingsIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioCCADebugTable" num_indices="2">
+ <description_user>Conceptual table for radio CCA settings.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiRadioCCADebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNarrowbandCCADebugTable" num_indices="1">
+ <description_user>Conceptual table for narrowband CCA settings.</description_user>
+ <index2 name="unifiNarrowbandCCADebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiReadHardwareCounterTable" num_indices="2">
+ <description_user>Conceptual table for reading hardware packet counters. First index is the radio_id, second index is the counter to be read.</description_user>
+ <index1 name="unifiRadioInstanceIndex" />
+ <index2 name="unifiReadHardwareCounterIndex" />
+ </config_table>
+ <config_table table_name="unifiLoadDpdLutTable" num_indices="2">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiLoadDpdLutGroupIndex" />
+ <index2 name="unifiLoadDpdLutTemperatureIndex" />
+ </config_table>
+ <config_table table_name="unifiLoadDpdLutTablePerRadio" num_indices="3">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiLoadDpdLutRadioIndex" />
+ <index2 name="unifiLoadDpdLutGroupIndex" />
+ <index3 name="unifiLoadDpdLutTemperatureIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioCCAThresholdsTable" num_indices="1">
+ <description_user>This table contains hardware specific CCA Thresholds settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiRadioCCAThresholdsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTxIqDelayTable" num_indices="1">
+ <description_user>This table contains information for TX IQ differential path delays.</description_user>
+ <index1 name="unifiRadioTxIqDelayTableIndex" />
+ </config_table>
+ <config_table table_name="unifiAgcThresholdsTable" num_indices="1">
+ <description_user>This table contains hardware specific AGC Thresholds settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiAgcThresholdsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiTxSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxGainSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter gain settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <index1 name="unifiTxGainSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioTxPowerOverrideTable" num_indices="1">
+ <description_user>Table for the power override settings via RICE</description_user>
+ <index1 name="unifiRadioTXPowerOverrideTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerDetectorResponseTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table defines the response of the power detectors(2G5/5G) in the external FEM. The detectors are sampled via the BIST ADC. The reference temperature and frequencies for this table are implicitly defined by the related temperature and frequency compensation tables. </description_internal>
+ <index1 name="unifiTxPowerDetectorResponseTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxDetectorTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate detector measurements for temperature. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxDetectorTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxDetectorFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate detector measurements for frequency. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxDetectorTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOpenLoopTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path gains for self-heating between transmit power calibrations. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxOpenLoopTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOpenLoopFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path gains across frequency between transmit power calibrations. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxOpenLoopFrequencyCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPaGainDpdTemperatureCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to open-loop compensate forward path PA gains when calculating DPD hot and cold LUTs for self-heating. The reference temperature for temperature compensation is implicitly defined by the temperature at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxPaGainDpdTemperatureCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPaGainDpdFrequencyCompensationTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to compensate forward path PA gains when calculating DPD hot and cold LUTs across frequency. The reference frequency for frequency compensation is implicitly defined by the frequency at which the (interpolated) table values return zero correction.</description_internal>
+ <index1 name="unifiTxPaGainDpdFrequencyCompensationTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxFtrimSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to frequency compensate forward path.</description_internal>
+ <index1 name="unifiTxFtrimSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiStaticDpdGainTable" num_indices="1">
+ <description_user>This table contains hardware specific digital gain settings for use with static dpd. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table contains hardware specific digital gain settings for use with static dpd.</description_internal>
+ <index1 name="unifiStaticDpdGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxGainStepSettingsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to set the gain steps (v2i, mix, drv, pa) of the forward path.</description_internal>
+ <index1 name="unifiTxGainStepSettingsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDpdPredistortGainsTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal>This table is used to set DPD digital pre-distort gains of the forward path.</description_internal>
+ <index1 name="unifiDpdPredistortGainsTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerTrimConfigTable" num_indices="1">
+ <description_user>This table contains hardware specific transmitter settings. Entries in this table should only be altered after advice from Applications Support.</description_user>
+ <description_internal> This table is used to set psat, biases and adjustment ranges of the forward path during power trim.</description_internal>
+ <index1 name="unifiTxPowerTrimConfigTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxAntennaConnectionLossTable" num_indices="1">
+ <description_user>The table giving the frequency-dependent connection loss value, which is used as conversion factors for raw tx power at connector</description_user>
+ <index1 name="unifiTxAntennaConnectionLossTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxAntennaMaxGainTable" num_indices="1">
+ <description_user>The table giving the frequency-dependent antenna max gain value, which is used as conversion factors for raw tx power at connector</description_user>
+ <index1 name="unifiTxAntennaMaxGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRxExternalGainTable" num_indices="1">
+ <description_user>The table giving frequency-dependent RSSI offset value</description_user>
+ <index1 name="unifiRxExternalGainTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxOOBConstraintTable" num_indices="1">
+ <description_user>Table containing settings necessary to ensure the IC observes transmit out-of-band regulatory constraints when operating near band edges.</description_user>
+ <index1 name="unifiTxOOBConstraintTableIndex" />
+ </config_table>
+ <config_table table_name="unifiTxPowerAdjustTable" num_indices="1">
+ <description_user>This table allows you to adjust absolute transmit power in a frequency and/or temperature dependant manner. The table allows you to specify datapoints in quarter dB based on frequency and temperature. The firmware will then perform a 2D interpolation to perform the right adjustment for the current frequency and temperature.</description_user>
+ <index1 name="unifiTxPowerAdjustTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDebugControlTable" num_indices="1">
+ <description_user>The table is used to control various debug settings on a per module basis</description_user>
+ <index1 name="unifiDebugControlTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRegulatoryTable" num_indices="1">
+ <description_user>This table holds the regulatory information for all countries.</description_user>
+ <index1 name="unifiRegulatoryTableIndex" />
+ </config_table>
+ <config_table table_name="unifiPeerIdTable" num_indices="1">
+ <description_user>Conceptual table for peer information at disconnect (Bandwith, Nss, RSSI, Tx data rate), index by Pid.</description_user>
+ <index1 name="unifiPeerid" />
+ </config_table>
+ <config_table table_name="unifiOperatingClassTable" num_indices="1">
+ <description_user>Operating Class table</description_user>
+ <index1 name="unifiOperatingClassTableIndex" />
+ </config_table>
+ <config_table table_name="unifiScanParametersTable" num_indices="1">
+ <description_user>Scan Parameters table</description_user>
+ <index1 name="unifiScanParametersTableIndex" />
+ </config_table>
+ <config_table table_name="unifiSarBackoffTable" num_indices="2">
+ <description_user>Sar Power Cap Parameters table</description_user>
+ <index1 name="unifiSarModeTableIndex" />
+ <index2 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiCCACSThreshTable" num_indices="1">
+ <description_user>CCA CS threshold parameters table</description_user>
+ <index1 name="unifiSisoMimoTableIndex" />
+ </config_table>
+ <config_table table_name="unifiDpdDebugTable" num_indices="1">
+ <description_user>DPD Debug MIBS</description_user>
+ <index1 name="unifiDpdDebugTableIndex" />
+ </config_table>
+ <config_table table_name="unifiMacBusyTimeTable" num_indices="2">
+ <description_user>unifiMacBusyTime table</description_user>
+ <index1 name="unifiMacInstanceIndex" />
+ <index2 name="unifiMacBusyTimeTableIndex" />
+ </config_table>
+ <config_table table_name="unifiModemSgiOffsetTable" num_indices="2">
+ <description_user>SGI sample offset parameters table</description_user>
+ <index1 name="unifiBandTableIndex" />
+ <index2 name="unifiBWTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNoCellTable" num_indices="1">
+ <description_user>NoCell Power Cap Parameters table</description_user>
+ <index1 name="unifiConnectionTypeTableIndex" />
+ </config_table>
+ <config_table table_name="unifiAcTxConfirmTable" num_indices="1">
+ <description_user>Conceptual table for requesting Tx confirm, index by Access Class.</description_user>
+ <index1 name="unifiAccessClassIndex" />
+ </config_table>
+ <config_table table_name="unifiDefaultCountryTable" num_indices="1">
+ <description_user>Table of country codes.</description_user>
+ <index1 name="unifiDefaultCountryIndex" />
+ </config_table>
+ <config_table table_name="unifiDebugConfigTable" num_indices="1">
+ <description_user>Debug modules table</description_user>
+ <index1 name="unifiDebugModulesIndex" />
+ </config_table>
+ <config_table table_name="unifiFaultConfigTable" num_indices="1">
+ <description_user>Subsystems' Fault config table</description_user>
+ <index1 name="unifiSubSystemsIndex" />
+ </config_table>
+ <config_table table_name="unifiPanicConfigTable" num_indices="1">
+ <description_user>Subsystems' Panic config table</description_user>
+ <index1 name="unifiSubSystemsIndex" />
+ </config_table>
+ <config_table table_name="unifiRSSICURoamScanTriggerTable" num_indices="1">
+ <description_user>Table indexed by frequency band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamCUScanTriggerTable" num_indices="1">
+ <description_user>Table indexed by frequency band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamRssiFactorTable" num_indices="1">
+ <description_user>Table allocating RSSIfactor to RSSI values range</description_user>
+ <index1 name="unifiRoamRssiFactorTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamCUFactorTable" num_indices="1">
+ <description_user>Table allocating CUfactor to Channel Utilization values range.</description_user>
+ <index1 name="unifiRoamCUFactorTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRoamRSSIBoostTable" num_indices="1">
+ <description_user>Table allocating a RSSI boost to each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiRadioIDTable" num_indices="1">
+ <description_user>Table indexed by radio ID</description_user>
+ <index1 name="unifiRadioIndex" />
+ </config_table>
+ <config_table table_name="unifiOverrideEDCAParamTable" num_indices="1">
+ <description_user>Conceptual table for overriding EDCA Parameters broadcast by the AP, index by Access Class.</description_user>
+ <index1 name="unifiAccessClassIndex"/>
+ </config_table>
+ <config_table table_name="unifiRxRssiAdjustmentsTable" num_indices="2">
+ <description_user>Table for rssi adjustments. First index is the radio_id, second index is band.</description_user>
+ <index1 name="unifiRadioIndex" />
+ <index2 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNANDefaultScanDwellTimeTable" num_indices="1">
+ <description_user>Table allocating a default scan dwell time for each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+ <config_table table_name="unifiNANDefaultScanPeriodTable" num_indices="1">
+ <description_user>Table allocating a default scan period for each band</description_user>
+ <index1 name="unifiBandTableIndex" />
+ </config_table>
+
+ <!-- ******************************************************************************************* -->
+ <config_table table_name="hutsReadWriteTableInt16IdTable" num_indices="1">
+ <description_user>Specific table for uint16</description_user>
+ <index1 name="hutsReadWriteTableInt16" />
+ </config_table>
+ <config_table table_name="hutsReadWriteTableOctetStringTable" num_indices="1">
+ <description_user>Specific table for octet string</description_user>
+ <index1 name="hutsReadWriteTableOctetString" />
+ </config_table>
+ <config_table table_name="hutsReadWriteRPCTableOctetStringTable" num_indices="2">
+ <description_user>Specific table for RPC of octet string</description_user>
+ <index1 name="hutsReadWriteRPCTableOctetStringTableIndex0" />
+ <index2 name="hutsReadWriteRPCTableOctetStringTableIndex1" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixedSizeTable" num_indices="1">
+ <description_user>Specific table of fixed size for internal API test</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixedSizeTableIndex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIVarSizeTable" num_indices="1">
+ <description_user>Specific table of variable size for internal API test</description_user>
+ <index1 name="hutsReadWriteInternalAPIVarSizeTableindex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixSizeTableKeys" num_indices="1">
+ <description_user>Conceptual table for timing of queue transfers HOST-SW-HW</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixSizeTableKeysindex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixVarSizeTableKeys" num_indices="1">
+ <description_user>Table of integers for use by patches.</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixVarSizeTableKeysIndex" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIFixSizeTableKeyRowTable" num_indices="2">
+ <description_user>xxxxxxxx</description_user>
+ <index1 name="hutsReadWriteInternalAPIFixSizeTableKeyIndex1" />
+ <index2 name="hutsReadWriteInternalAPIFixSizeTableKeyIndex2" />
+ </config_table>
+ <config_table table_name="hutsReadWriteInternalAPIVarSizeTableKeyTable" num_indices="2">
+ <description_user>xxxxxxxx</description_user>
+ <index1 name="hutsReadWriteInternalAPIVarSizeTableKeyIndex1" />
+ <index2 name="hutsReadWriteInternalAPIVarSizeTableKeyIndex2" />
+ </config_table>
+ <config_table table_name="unifiDPDTrainPacketConfigTable" num_indices="1">
+ <description_user> This table contains DPD train configuration.</description_user>
+ <index1 name="unifiDPDTrainPacketConfigIndex" />
+ </config_table>
+ <config_table table_name="unifiFrameTXCountersTable" num_indices="1">
+ <description_user> This table contains TX Counters.</description_user>
+ <index1 name="unifiFrameTXCountersTableIndex" />
+ </config_table>
+ <config_table table_name="unifiFrameRXCountersTable" num_indices="1">
+ <description_user> This table contains RX Counters.</description_user>
+ <index1 name="unifiFrameRXCountersTableIndex" />
+ </config_table>
+ <!-- ******************************************************************************************* -->
+ </metadata>
+</metadata_list>
--- /dev/null
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+9100 RadioLogging_confirm
+9101 WlanliteCwStart_confirm
+9102 WlanliteTxSetParams_confirm
+9103 WlanliteCwStop_confirm
+9104 WlanliteTxStart_confirm
+9105 WlanliteTxRead_confirm
+9106 WlanliteTxStop_confirm
+9107 WlanliteRxStart_confirm
+9108 WlanliteRxRead_confirm
+9109 WlanliteRxStop_confirm
+910a WlanliteStatus_confirm
+910b TestPmalloc_confirm
+910c TestConfigureMonitorMode_confirm
+910e TestCheckFwAlive_confirm
+910f TestSuspend_confirm
+9110 TestResume_confirm
+9111 DebugGeneric_confirm
+9112 WlanliteRadioSelect_confirm
+9113 TestHipTesterStart_confirm
+9114 TestHipTesterStop_confirm
+9115 TestHipTesterSetParams_confirm
+9116 TestBistGetTxGain_confirm
+9117 TestSpare1_confirm
+9118 TestSpare2_confirm
+9119 TestSpare3_confirm
+911a TestSpareSignal1_confirm
+911b TestSpareSignal2_confirm
+911c TestSpareSignal3_confirm
+9200 TestSpare1_response
+9201 TestSpare2_response
+9202 TestSpare3_response
+9203 TestSpareSignal1_response
+9204 TestSpareSignal2_response
+9205 TestSpareSignal3_response
+9300 RadioLogging_indication
+9301 DebugGeneric_indication
+9302 DebugPktSinkReport_indication
+9303 DebugPktGenReport_indication
+9304 TestHipTesterReport_indication
+9305 TestSpare1_indication
+9306 TestSpare2_indication
+9307 TestSpare3_indication
+9308 TestSpareSignal1_indication
+9309 TestSpareSignal2_indication
+930a TestSpareSignal3_indication
+a202 WlanliteRadioCalibration_indication
+a203 WlanliteReserveRadioForCalibration_indication
+a204 WlanliteReserveRadioForCalibration_response
+a205 WlanliteRadioCalibrationDone_indication
+a206 WlanliteRadioCalibrationDone_response
+a207 WlanliteTxTimer_indication
+a252 RiceChangeFsmParams_request
+a253 RiceInitialise_request
+a254 RiceInitialise_confirm
+a255 RiceChangeRadioState_request
+a256 RiceChangeRadioState_confirm
+a257 RiceRadioDpdDone_response
+a258 RiceRadioLog_request
+a259 RicePhyEventLog_request
+a25a RiceRadioNudgeNannyTimer_request
+a25b RiceRadioEvaluateNanny_request
+a25c RiceRadioEvaluateNanny_confirm
+a25d RiceReserveRadioForCalibration_indication
+a25e RiceRadioCalibrationDone_indication
+a25f RiceAbortRadioCalibration_request
+a260 RiceReserveRadioForCalibration_response
+a261 RiceNannyTimer_indication
+a262 RiceSwitchOnTimer_indication
+a263 RiceRadioLogTimer_indication
+a264 RiceRadioDeinit_indication
+a422 RameMsgDelba_confirm
+a423 RameMsgRadioOffDplpOff_indication
+a424 RameMsgRadioOnDplpOn_indication
+a425 RameMsgRadioSwitchChannelDplpOff_indication
+a426 RameMsgRxActivityOccurred_indication
+a427 RameMsgDplpVifDelete_confirm
+a428 RameMsgVifCheckClear_indication
+a429 RameMsgVifAnnounceAvailability_indication
+a42a RameMsgPsUpdate_indication
+a42b RameMsgTdlsPeerSp_indication
+a42c RameMsgTdlsPsUpdate_indication
+a42d RameMsgNullAnnounceFrameProcessed_indication
+a42e RameMsgPersistentFrameProcessed_indication
+a42f RameMsgCtsAnnounceFrameProcessed_indication
+a430 RameMsgFrameRx_indication
+a431 RameMsgMm_confirm
+a432 RameMsgPsServTriggered_indication
+a433 RameMsgPsServEnd_indication
+a434 RameMsgSpuriousMorebit_indication
+a435 RameMsgMcastServiceEnd_indication
+a436 RameMsgBeaconTxFinished_indication
+a437 RameMsgNanSdfCallback_confirm
+a438 RameMsgPsPollTxFinished_indication
+a439 RameMsgPeerPsStateUpdate_indication
+a43a RameMsgSendNullFrame_request
+a43b RameMsgBaTxError_indication
+a43c RameMsgPauseResumeDplp_confirm
+a43d RameMsgDpdFrameProcessed_indication
+a43e RameMsgFrameTxFinished_indication
+a43f RameMsgStaKeepaliveTxFinished_indication
+a440 RameMsgRadioReady_indication
+a4c2 RameRiceRadioSetupDone_indication
+a4c3 RameRiceRadioCalib_request
+a4c4 RameRiceRadioCalibDone_indication
+a4c5 RameRiceRadioChangeStateDone_confirm
+a4c6 RameRiceRadioChangeStateOffDone_confirm
+a4d2 RameRadioChangeState_request
+a4d3 RameRadioOff_request
+a4d4 RameRadioPerformDpd_request
+pid 8
+4000 rice_radio_fsm[0] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4001 rice_radio_fsm[1] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4002 rice_mgr_fsm 0008 not_initialised initialising idle changing_state trimming retrimming dpd nanny
+4003 macrame_radio_ctl[0] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4004 macrame_radio_ctl[1] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4005 wlanlite_conn_fsm[0] 0008 Idle Rx_Running Tx_Running Cw_Running BIST_Running Tx_Pausing Tx_Paused Tx_Stopped
+4006 wlanlite_conn_fsm[1] 0008 Idle Rx_Running Tx_Running Cw_Running BIST_Running Tx_Pausing Tx_Paused Tx_Stopped
+4007 wlanlite_mgr_fsm 0004 Idle Do_Conn_Cmd Radio_Trim Radio_Retrim
+faultid 596
+2000 DPLANE_RX_PDU_LOST
+2001 DPLANE_RECEIVED_FRAME_FROM_OWN_MAC_ADDR
+2002 DPLANE_ENCPTION_NO_KEY_FOUND
+2003 DPLP_MPDU_LOST
+2004 DPLANE_PROTECTION
+2005 DPLANE_FALLBACK_CREATE_TBL
+2006 DPLANE_MIB
+2007 DPLANE_RX_RESOURCE_LOW
+2008 DPLANE_BLOCK_ACK_REQ_UNKNOWN_STA
+2009 DPLANE_BLOCK_ACK_REQ_NOT_COMPRESSED
+200a DPLANE_BLOCK_ACK_REQ_NO_STREAM
+200b DPLANE_BLOCK_ACK_REQ_STALE_BUNS
+200c DPLANE_BLOCK_ACK_REQ_WRONG_DEST
+200d DPLANE_BLOCK_ACK_RX_NO_MATCH
+200e DPLANE_BLOCK_ACK_MISSING
+200f DPLANE_NO_KEY_FOR_PMF
+2010 DPLANE_BFMEE_UNSUPPORTED_VIF_TYPE
+2011 DPLANE_BFMEE_TOO_MANY_INTERFACES
+2012 DPLANE_BFMEE_UNKNOWN_MODULATION
+2013 DPLANE_BFMEE_UNDERFLOW
+2014 DPLANE_FBMEE_UNKNOWN_MAC_STATUS
+2015 DPLANE_BFMEE_BAD_STATE_TRANSITION
+2016 DPLANE_MM_CONFIRM_ASOC_REQ
+2017 DPLANE_MM_CONFIRM_ASOC_RSP
+2018 DPLANE_MM_CONFIRM_REASOC_REQ
+2019 DPLANE_MM_CONFIRM_REASOC_RSP
+201a DPLANE_MM_CONFIRM_PROBE_REQ
+201b DPLANE_MM_CONFIRM_PROBE_RSP
+201c DPLANE_MM_CONFIRM_MGMT6
+201d DPLANE_MM_CONFIRM_MGMT7
+201e DPLANE_MM_CONFIRM_BEACON
+201f DPLANE_MM_CONFIRM_ATIM
+2020 DPLANE_MM_CONFIRM_DISASOC
+2021 DPLANE_MM_CONFIRM_AUTH
+2022 DPLANE_MM_CONFIRM_DEAUTH
+2023 DPLANE_MM_CONFIRM_ACTION
+2024 DPLANE_MM_CONFIRM_MGMT14
+2025 DPLANE_MM_CONFIRM_MGMT15
+2026 DPLANE_MM_CONFIRM_NOT_MGMT
+2027 DPLANE_UNKNOWN_DUD_REQUEST_TYPE
+2028 DPLANE_MA_PACKET_REQ_WARN
+2029 DPLANE_UNABLE_TO_MALLOC
+202a DPLANE_LINK_ADAPT_PDU_RETRIES_TOO_HIGH
+202b DPLANE_IQ_CAPTURE_TOO_MANY_REQUESTS
+202c DPLANE_FILTER_FWCALLBACK_NO_MEM
+202d DPLANE_PPDU_STATS_DROPPED
+202e DPLANE_REPLAY_NULL_KEY
+202f DPLANE_REPLAY_SUSPECTED_ATTACK
+2030 DPLANE_BEAMFORMER
+2031 DPLANE_BEAMFORMER_INVALID_PEER
+2032 DPLANE_FRAG_SEQ_FOR_PATCH_NOT_FOUND
+2033 DPLANE_FAILED_TO_ALLOCATE_AMSDU_TCM
+2034 DPLANE_BFEE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2035 DPLANE_RX_ACT_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2036 DPLANE_MSG_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2037 DPLANE_RATE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2038 DPLANE_CANCEL_NO_RESP
+2039 DPLANE_FRAME_TX_DPIF_DEST_Q_FULL
+203a DPLANE_FRAME_TX_PPDU_CREATE_FAILED
+203b DPLANE_FRAME_TX_MPDU_LIST_CREATE_FAILED
+203c DPLANE_FRAME_TX_UNSPECIFIED_FAILURE
+203d DPLANE_DEADLINE_STOP_REQUESTED_WITH_ONE_ACTIVE
+203e DPLANE_DEADLINE_CANNOT_CREATE
+203f DPLANE_DEADLINE_TX_TIMED_REQUESTED_WHILE_ONE_ACTIVE
+2040 DPLANE_PROTECTION_5g_11b
+2041 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2042 DPLP_PPDU_ALLOC_FAILED
+2043 DPLANE_LAA_LOWER_SPECULATED_RATE
+2044 DPLP_Q_SLOT_PPDU_STATUS_UNEXPECTED
+2045 FAILED_TO_FORWARD_TO_MACRAME
+2046 DPLANE_DEADLINE_STOP_REQUESTED_IN_PAST
+2047 DPLANE_UNABLE_TO_RESUME_MAC
+2049 DPLANE_BFEE_INVALID_PEER
+2050 DPLANE_BFER_INVALID_PEER
+2051 DPLANE_RX_FTM_FAILURE
+2200 DPHP_DMA_NONRECOVERABLE_TIMEOUT
+2201 DPHP_SLOT_STUCK_LOCKUP
+2202 DPHP_SLOT_CANCEL_LOCKUP
+2300 RAME_RATES
+2301 RAME_INVALID_BO_ID
+2302 RAME_ENCRYPTION_KEY
+2303 RAME_INCOMPATIBLE_REG_DOMAINS
+2304 RAME_INVALID_BA
+2305 RAME_INVALID_BAINFO
+2306 RAME_CHANGE_MODE_PS_TO_FPS
+2307 RAME_INVALID_GO_BEACON_DRIFT_VALUE
+2308 RAME_INVALID_SET_PEER_CHANNEL_REQUEST
+2309 RAME_INVALID_SCHED_REQUEST
+230a RAME_COEX_BLACKOUT_ATTACH_INVALID_VIF
+230b RAME_ENCRYPTION_KEYFIND_FAIL
+230c RAME_SET_QOS_INVALID_STA
+230d RAME_MLME_TX_FRAME_REQUEST_WITH_NULL_MBULK
+230e RAME_STA_DOUBLE_ADD
+230f RAME_SCHDL_UNEXPECTED_RESUME_REQUEST
+2310 RAME_SCHDL_UNEXPECTED_SIGNAL
+2311 RAME_COEX_BLACKOUT_ATTACH_FAILED
+2312 RAME_MLME_FRAME_DISCARDED
+2313 RAME_UNEXPECTED_SIGNAL
+2314 RAME_COEX_IDLE_EXIT_FORCED
+2315 RAME_RADIO_UNEXPECTED_SIGNAL
+2316 RAME_EARLIEST_TOO_LATE
+2317 RAME_USING_FORCED_CHANNEL_BW
+2318 RAME_NO_CCK_MODEM
+2319 RAME_BEACON_TX_SW_DEADLINE_MISSED
+231a RAME_RADIOMAC_SWITCH_FAILED
+231b RAME_RADIOMAC_SWITCH_OFF_FAILED
+231c RAME_IQ_RESOURCE_UNAVAILABLE
+231d RAME_IQ_INVALID_PARAM
+231e RAME_INVALID_ANTENNA_CONFIG
+231f SCHDL_UNEXPECTED_START_IND
+2320 RAME_FTM_INVALID_DFE_CONFIG
+2321 RAME_FTM_INVALID_BANDWIDTH_CONFIG
+2322 RAME_CALIB_UNEXPECTED_SIGNAL
+2323 RAME_SCAN_BLOCKED_BY_NUM_VIFS
+2500 MLME_WIFI_LOGGER_JAMMER_LIKELY_PRESENT
+2501 MLME_WIFI_LOGGER_NO_MEM
+2510 MLME_AP_CONNECTED_RSP_UNEXPECTED
+2511 MLME_AP_DISCARDED_DISCONNECTION_FRAME
+2512 MLME_AP_UNHANDLED_MM_FRAME_IND
+2513 MLME_AP_PMKID_COULD_NOT_BE_COMPUTED
+2514 MLME_AP_PROVIDED_PMKIDS_ARE_INVALID
+2515 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD
+2516 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD_WRONG_STATE
+2517 MLME_AP_SA_QUERY_IND_NO_PEER_RECORD
+2530 MLME_BA_EXTRA_DELETE_CONFIRM
+2531 MLME_BA_TX_RES_POLICY_INVALID
+2532 MLME_BA_NO_PEER_FOUND
+2533 MLME_BA_TX_ADD_NOT_ALLOWED_NAN_TOO_MANY
+2534 MLME_BA_RX_ADD_REJECTED_MIB
+2535 MLME_BA_RX_ADD_REJECTED_RAME
+2536 MLME_BA_RX_ADD_REJECTED_HT
+2537 MLME_BA_RX_SPAREA
+2538 MLME_BA_RX_ADD_INVALID_REQ
+2539 MLME_BA_TX_ADD_NOT_ALLOWED_MIB
+253a MLME_BA_TX_ADD_NOT_ALLOWED_TOO_MANY
+253b MLME_BA_TX_ADD_NOT_ALLOWED_HT
+253c MLME_BA_TX_ADD_INVALID_REQ
+253d MLME_BA_TX_ADD_WITHOUT_PEER
+253e MLME_BA_TX_RES_MACRAME_BLOCKED
+253f MLME_BA_TX_RES_PID_MISMATCH
+2550 MLME_CONMGR_AP_REJECTED_US
+2551 MLME_CONMGR_CONNECTION_ATTEMPT_ABORTED
+2553 MLME_CONMGR_ASSOC_VERIFICATION_FAILED
+2556 MLME_CONMGR_FAILED_TO_SEND_ASSOC
+2559 MLME_CONMGR_MBULK_ALLOC_FAILURE
+255a MLME_CONMGR_TIMEOUT
+255b MLME_CONMGR_TX_OR_TIMEOUT
+2570 MLME_FRAME_BSSID_NOT_INDIVIDUAL
+2571 MLME_FRAME_BUILD_INCR_MBULK_ALLOC_FAILED
+2572 MLME_FRAME_BUILD_INCR_NULL_FRAME
+2573 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_SUBTYPE
+2574 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_TYPE
+2575 MLME_FRAME_DATA_GET_PRI_INVALID_SUBTYPE
+2576 MLME_FRAME_DATA_GET_PRI_INVALID_TYPE
+2577 MLME_FRAME_DATA_PACKET_NULL_PTR
+2578 MLME_FRAME_FAILED_VALIDATION_CODE
+2579 MLME_FRAME_GET_BSSID_UNEXPECTED_DS
+257a MLME_FRAME_GET_DA_UNEXPECTED_DS
+257b MLME_FRAME_GET_SA_UNEXPECTED_DS
+257c MLME_FRAME_HEADER_INVALID_TYPE
+257d MLME_FRAME_ICMP6_CHECKSUM_MALLOC_ERR
+257e MLME_FRAME_MBULK_SIZE_NOT_ENOUGH
+257f MLME_FRAME_RM_RM_REPORT_INVALID_ELEMENTS
+2580 MLME_FRAME_RM_RM_REPORT_NO_MEASUREMENT_REPORT
+2581 MLME_FRAME_TDLS_GET_ACTION_OFFSET_INVALID_SUBTYPE
+2582 MLME_FRAME_TDLS_GET_ELEMENT_OFFSET_INVALID_ACTION
+2583 MLME_FRAME_UNEXPECTED_MGT_FRAME
+2584 MLME_FRAME_ALLOC_FAILED
+2585 MLME_FRAME_CRITICAL_PARAM_IE_LENGTH_ERROR
+2586 MLME_FRAME_NAN_SDF_WITH_NO_PAYLOAD
+25a0 MLME_IE_RSN_INVALID_LENGTH
+25a1 MLME_IE_COUNTRY_INVALID_LENGTH_OUT_OF_RANGE
+25a2 MLME_IE_COUNTRY_INVALID_LENGTH_PADDING
+25a3 MLME_IE_RATE_INVALID_RATE_1
+25a4 MLME_IE_RATE_INVALID_RATE_2
+25a5 MLME_IE_RATE_INVALID_RATE_3
+25a6 MLME_IE_RSN_INVALID_AKM_COUNT
+25a7 MLME_IE_RSN_INVALID_CAPS_LENGTH
+25a8 MLME_IE_RSN_INVALID_PAIRWISE_COUNT
+25a9 MLME_IE_RSN_NO_AKM_SUITE
+25aa MLME_IE_CRITICAL_PARAM_LENGTH_ERROR
+25ab MLME_IE_RSN_INVALID_PMKID_COUNT
+25ac MLME_IE_RSN_INVALID_VERSION
+25ad MLME_IE_RSN_INVALID_PMF_SETTINGS
+25ae MLME_IE_RSN_CORRUPT_AKM_SUITE
+25af MLME_IE_RSN_INVALID_PARWISE_CIPHER_COUNT
+25b1 MLME_IE_RSN_INVALID_GROUP_CIPHER_SIZE
+25b2 MLME_IE_RSN_NO_PAIRWISE_CIPHER_SUITE
+25c0 MLME_MEASUREMENTS_MBULK_ALLOC_FAILURE
+25c1 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_FAIL
+25c2 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_LEAK
+25c3 MLME_MEASUREMENTS_MBULK_RM_BEACON_REQUEST_LEAK
+25c4 MLME_MEASUREMENTS_MBULK_RM_LM_REPORT_FAIL
+25c5 MLME_MEASUREMENTS_MBULK_SCAN_IES_ALLOC_FAIL
+25d0 MLME_MPDU_ROUTER_INVALID_FRAME_DISCARDED
+25d1 MLME_MPDU_ROUTER_REGISTER_INVALID_NO_BUFFER_MEMORY
+25e0 MLME_NAN_CONFIG_TLV_DOES_NOT_EXIST
+25e1 MLME_NAN_INVALID_MAC_ADDR_RANDOMISATION_INTERVAL
+25e2 MLME_NAN_INVALID_MASTER_PREFERENCE_VALUE
+25e3 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_2
+25e4 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_1
+25e5 MLME_NAN_MBULK_SCAN_IES_ALLOC_FAIL
+25e6 MLME_NAN_PUBLISH_NODE_ALLOC_FAILURE
+25e7 MLME_NAN_INVALID_SERVICE_DESCRIPTOR
+25e8 MLME_NAN_MATCH_NODE_ALLOC_FAILURE
+25e9 MLME_NAN_INVALID_BAND_CONFIG
+25ea MLME_NAN_UNEXPECTED_AMR_UPDATE_FLAGS
+2600 MLME_REGULATORY_20_MHZ_CHANNEL_WIDTH_NOT_FOUND
+2601 MLME_REGULATORY_BAD_CHANNEL_CENTRE_FREQUENCY
+2602 MLME_REGULATORY_COUNTRY_NOT_FOUND_USE_WORLD
+2603 MLME_REGULATORY_DEFAULT_CASE_SHOULD_NOT_HAPPEN
+2604 MLME_REGULATORY_FAILED_TO_MATCH_COUNTRY_CODE_FOR_EVALUATED_IDX
+2605 MLME_REGULATORY_SET_COUNTRY_REQ_IS_INVALID_USE_WORLD
+2607 MLME_REGULATORY_OPERATING_CLASS_TABLE_READ_FAILURE
+2608 MLME_REGULATORY_NO_MEM
+2610 MLME_REQUESTS_VIF_INCOMPATIBLE_FOR_SINGAL
+2611 MLME_REQUESTS_MIB_MBULK_GET_CFM_ALLOC_FAIL
+2612 MLME_REQUESTS_MIB_MBULK_SET_CFM_ALLOC_FAIL
+2613 MLME_REQUESTS_MISSING_MANDATORY_MBULK
+2614 MLME_REQUESTS_NO_DESTINATION_FOR_VIF_IN_SIGNAL
+2615 MLME_REQUESTS_SPURIOUS_MBULK_IN_SIGNAL
+2620 MLME_ROAMING_MBULK_SCAN_IES_ALLOC_FAIL
+2621 MLME_ROAMING_MBULK_CANDIDATE_ALLOC_FAIL
+2630 MLME_SA_QUERY_NO_PEER_RECORD
+2631 MLME_SA_QUERY_NO_BUFFER_IN_FRAME_INDICATION
+2642 MLME_SCAN_DESC_LIST_AP_THRESHOLD_DIFFERS
+2643 MLME_SCAN_DESC_LIST_IE_INVALID_LENGTH
+2644 MLME_SCAN_DESC_LIST_RSSI_THRESHOLD_INVALID
+2648 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_SPS
+264e MLME_SCAN_ERROR_IN_GET_NEXT_CHANNEL
+264f MLME_SCAN_SPAREB
+2655 MLME_SCAN_IGNORING_SCHED_IND
+2656 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_LISTS
+2658 MLME_SCAN_MORE_THAN_ONE_PRIORITY_PAUSE
+2659 MLME_SCAN_NO_CHANNELS_SCANNED
+265a MLME_SCAN_NO_MEDIUM_ENABLED_TEST_USE_ONLY_1
+265b MLME_SCAN_NO_MEMORY_FOR_SCAN_FRAME_DETAILS
+265c MLME_SCAN_ADD_INVALID_NO_CHANNELS
+265d MLME_SCAN_NO_MEM_FOR_LOST_AP_DATA_REF
+265e MLME_SCAN_NO_MEM_FOR_SIGNIFICANT_CHANGE_DATA_REF
+265f MLME_SCAN_NO_MEDIUM_TEST_MODE
+2660 MLME_SCAN_SPAREC
+2661 MLME_SCAN_UNPAUSE_WHEN_NOT_PAUSED
+2662 MLME_SCAN_UNSUPPORTED_CHANNEL
+2664 MLME_SCAN_VERIFICATION_DEVICE_ADDRESS_INVALID
+2665 MLME_SCAN_VERIFICATION_DUPLICATED_WILDCARD_SSID
+2666 MLME_SCAN_VERIFICATION_SCAN_ID_INVALID
+2667 MLME_SCAN_VERIFICATION_IES_TOO_LONG
+2668 MLME_SCAN_VERIFICATION_IE_BUFFER_CORRUPT
+266a MLME_SCAN_VERIFICATION_IE_MISSING_BSSID_IE
+266b MLME_SCAN_VERIFICATION_IE_NOT_RECOGNISED
+266c MLME_SCAN_VERIFICATION_IE_NO_CHANNEL_OR_BSSID_LIST
+266d MLME_SCAN_VERIFICATION_IE_NO_SCAN_TIMING
+266e MLME_SCAN_VERIFICATION_IE_TO_SMALL
+2670 MLME_SCAN_VERIFICATION_INVALID_CHANNEL_COUNT
+2671 MLME_SCAN_VERIFICATION_INVALID_POLICY
+2672 MLME_SCAN_VERIFICATION_INVALID_POLICY_1
+2673 MLME_SCAN_VERIFICATION_INVALID_POLICY_2
+2674 MLME_SCAN_VERIFICATION_INVALID_REPORT_BITMAP
+2675 MLME_SCAN_VERIFICATION_INVALID_SCAN_TYPE
+2676 MLME_SCAN_VERIFICATION_MULTIPLE_CHANNEL_LISTS
+2677 MLME_SCAN_VERIFICATION_NEIGHBOUR_DL_IE_INVALID
+2678 MLME_SCAN_VERIFICATION_SSID_FILTER_IE_INVALID_LENGTH
+2679 MLME_SCAN_VERIFICATION_SSID_IE_INVALID_LENGTH
+267a MLME_SCAN_VERIFICATION_TIMING_IE_INVALID
+267b MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_1
+267c MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_2
+267d MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_3
+267e MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_4
+267f MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_5
+2680 MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_6
+2681 MLME_SCAN_VERIFICATION_NCHO_SCAN
+2682 MLME_SCAN_DISABLED_IN_SPS
+2683 MLME_SCAN_CALLBACK_INVALID
+2684 MLME_SCAN_VERIFICATION_SSID_DESCRIPTOR_INVALID_LENGTH
+26a0 MLME_SECURITY_EAPOL_NO_PEER_FOUND
+26a1 MLME_SECURITY_EAPOL_UNEXPECTED_SECURITY_SUITE
+26a2 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK
+26a3 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_LEN
+26a4 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_1
+26a5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_LEN
+26a6 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_UNWRAP_FAILURE
+26a7 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R0KHID
+26a8 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R1KH_ID
+26a9 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_1
+26aa MLME_SECURITY_FT_AUTH_VALIDATION_MDE_BAD_MDID
+26ab MLME_SECURITY_FT_AUTH_VALIDATION_MIC_CMP_FAILURE
+26ac MLME_SECURITY_FT_AUTH_VALIDATION_NO_FTE
+26ad MLME_SECURITY_FT_AUTH_VALIDATION_NO_MDE
+26ae MLME_SECURITY_FT_AUTH_VALIDATION_NO_RSN
+26b0 MLME_SECURITY_MBULK_ALLOC_FAILURE
+26b1 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_1
+26b2 MLME_SECURITY_NO_MEM_FOR_ANONCE
+26b3 MLME_SECURITY_WRONG_EAPOL_TYPE
+26b4 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_2
+26b5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_2
+26b6 MLME_SECURITY_FT_UNKNOWN_MIC_LEN
+26b7 MLME_SECURITY_M3_PROCESSING_FAILURE
+26bf MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_2
+26d0 MLME_TDLS_SPAREA
+26d1 MLME_TDLS_DISCOVERY_REQUEST_LINKID_INVALID
+26d2 MLME_TDLS_DISCOVERY_REQUEST_NOT_ALLOWED
+26d3 MLME_TDLS_DISCOVERY_RESPONSE_DIALOG_TOKEN_INVALID
+26d4 MLME_TDLS_DISCOVERY_RESPONSE_LINKID_INVALID
+26d5 MLME_TDLS_DISCOVERY_RESPONSE_UNEXPECTED
+26d6 MLME_TDLS_IS_NOT_ACTIVATED
+26d7 MLME_TDLS_LINK_IS_NOT_ESTABLISHED
+26d8 MLME_TDLS_LINK_IS_NULL
+26d9 MLME_TDLS_NO_FREE_SLOT
+26da MLME_TDLS_PEER_NOT_FOUND_1
+26db MLME_TDLS_PEER_NOT_FOUND_2
+26dc MLME_TDLS_RAME_CFM_PEER_NOT_FOUND
+26dd MLME_TDLS_SETUP_CONFIRM_DIALOG_INVALID
+26de MLME_TDLS_SETUP_CONFIRM_LINKID_INVALID
+26df MLME_TDLS_SETUP_CONFIRM_REJECTED
+26e0 MLME_TDLS_SETUP_CONFIRM_TPK_INVALID
+26e1 MLME_TDLS_SETUP_CONFIRM_WRONG_STATE
+26e2 MLME_TDLS_SETUP_REQUEST_DISCARDED_CONFIRM
+26e3 MLME_TDLS_SETUP_REQUEST_MAX_LINKS
+26e4 MLME_TDLS_SETUP_REQUEST_SETUP_IN_PROGRESS
+26e5 MLME_TDLS_SETUP_RESPONSE_INVALID
+26e6 MLME_TDLS_SETUP_RESPONSE_SECURITY_INVALID
+26e7 MLME_TDLS_SETUP_RESPONSE_WRONG_STATE
+26e8 MLME_TDLS_UNKNOWN_ACTION_TYPE
+26ea MLME_TDLS_TERMINATE_ADDRESS_UNKNOWN
+2700 RADIO_WL_RX_COMP
+2701 RADIO_RX_DCOC_TIMEOUT
+2702 RADIO_DPD_GAIN_ALIGN_PATH_ZERO
+2703 RADIO_BAD_BB_SAMPLE_OFFSET_SHORT_GI
+2704 RADIO_RECALIBRATE
+2705 RADIO_UNKNOWN_PLATFORM
+2707 RADIO_UNSUPPORTED_PLATFORM_FEATURE
+2708 RADIO_PAPR_CONFIG
+2709 RADIO_INVALID_MODULATION_TYPE
+270a RADIO_LOGGER_HW_FAIL
+270b RADIO_SIGNANAL_TOO_MANY_SAMPLES_READ
+270c RADIO_INVALID_RADIO_IDENTIFIER
+270d RADIO_VCO_LOCK_FAILED
+270e RADIO_ADC_CONVERT
+270f RADIO_DPD_LOOPBACK_SIGNAL_SUSPECT
+2710 RADIO_INVALID_FIR_COEFFICIENT
+2711 RADIO_INCOMPATIBLE_REG_DOMAINS
+2712 RADIO_RICE_FREQ_OUTSIDE_KNOWN_BANDS
+2713 RADIO_RICE_PACKET_WHEN_MODEM_DISCONNECTED
+2714 RADIO_RICE_FREQUENCY_OFFSET_TOO_BIG
+2715 RADIO_SETUP_FAILED
+2716 RADIO_ESTIMATES
+2717 RADIO_INVALID_RSSI
+2718 RADIO_POWER_OVERRIDDEN
+2719 RADIO_DPD_LOOPBACK_FIR_GAIN
+271a RADIO_SPIKE_REMOVED_FROM_DPD_LUT
+271b RADIO_SIGNAL_ANALYSER_16_BIT_OVERFLOW
+271c RADIO_IQ_CAPTURE_FREE_RAMSW_INFO
+271d RADIO_DPD_SUSPECT_LUT
+271e RADIO_SA_ZERO_AS_DIVISOR
+271f RADIO_DPD_BAD_LUT_QUALITY
+2720 RADIO_LOGGER_BAD_CAPTURE
+2721 RADIO_RUN_OUT_TRIM_TIME_DPD
+2722 RADIO_XDMAC_MEMCPY_FAIL
+2723 RADIO_RX_AAB_FTRIM
+2724 RADIO_WBRSSI_FAILED
+2725 RADIO_TX_POWER_DIGITAL_SERVO
+2726 RADIO_VALUE_BELOW_MIN_SETTING
+2727 RADIO_VALUE_ABOVE_MAX_SETTING
+2728 RADIO_NO_SUITABLE_SETTING
+2729 RADIO_TX_POWER_DIGITAL_LIMIT
+272a RADIO_BAD_POWER_TABLE_CONFIG
+272b RADIO_BAD_TX_SETTINGS
+272c RADIO_BAD_ANTENNA_GAIN_SETTINGS
+272d RADIO_BAD_IREF_TRIM
+272e RADIO_AGC_SETTING_OUT_OF_RANGE
+272f RADIO_DPD_LOOPBACK_ABB_GAIN
+2730 RADIO_DPD_CALC_LOOPBACK_BROKEN_RX
+2731 RADIO_CHIP_DOES_NOT_SUPPORT_RX_IQ_CONFIG
+2732 RADIO_RX_IQ_TRIM_RADIO_ISSUE
+2733 RADIO_RX_IQ_TRIM_NUMERIC_ISSUE
+2734 RADIO_DPD_LOOPBACK_RESTART_ALIGN
+2735 RADIO_INADEQUATE_TRIM_TIME
+2736 RADIO_CHAN_RSSI_MEASUREMENT_ERROR
+2737 RADIO_DPD_CALC_LOOPBACK_CORRELATION
+2738 RADIO_INADEQUATE_TRIM_RANGE
+2739 RADIO_BAD_RSSI_PDOLLOP_RSSI_LIN_IS_ZERO
+273a RADIO_LARGE_RX_DCOC_OFFSET_TRIM_VALUE
+273b RADIO_DPD_IQ_CAPTURE_FAILURE
+273c RADIO_INDICATE_FW_SIGANAL_USAGE
+273d RADIO_RX_DCOC_RF_AGC_MAX_GAINS_TIMEOUT
+273e RADIO_RX_DCOC_RF_MAXIMUM_RETRIES
+273f RADIO_TX_POWER_PRE_GAIN_TOO_LOW
+2740 RADIO_TX_POWER_TRIM_FAILED
+2741 RADIO_IQ_TRIM_NOT_CONVERGING
+2742 RADIO_BAD_CONFIG_FOR_FLEXIMAC_POWER_TRIM
+2743 RADIO_INVALID_RSSI_ADJUSTMENTS
+2744 RADIO_INVALID_FEC_CONFIG
+2745 RADIO_TRIM_PASS_EXCEEDED_SCO_LIMIT
+2746 RADIO_SIG_AN_LOCKED_UP
+2747 RADIO_PA_SAT_READING_LOW
+2748 RADIO_PHY_FLEXIMAC_ST_TOO_LONG
+2749 RADIO_INVALID_PER_CH_TRIM_ITERATION
+274a RADIO_BAD_TX_IQ_DIFFERENTIAL_DELAY
+274b RADIO_UNEXPECTED_FLEXIMAC_STATE
+274c RADIO_EXCESS_RX_IQ_COMP_MEAS_VARIATION
+274d RADIO_TX_PARAMETER_OUT_OF_RANGE
+2800 TEST_WLANLITE_AMPDU_TOO_LONG
+2801 TEST_WLANLITE_INVALID_RATE
+2802 TEST_WLANLITE_MAC_BAND_MAPPING_NOT_UNIQUE
+2803 TEST_WLANLITE_BEAMFORMER
+2804 TEST_WLANLITE_INVALID_BANDWIDTH
+2805 TEST_WLANLITE_CHANNEL_RSSI_MEASUREMENT_FAILED
+2806 BIST_LOW_LOOPBACK_GAIN
+2807 BIST_BROKEN_LOOPBACK
+2808 TEST_MICRAME_TX_BAD_PPDU_STATE
+2809 RADIO_RX_IQ_TRIM_FAILED_AFTER_RETRIES
+2900 COEX_DEBUG_OVERRIDE_BT_ENABLED
+2901 COEX_INIT_FAILED
+2902 COEX_WRONG_IMPOSED_MIN_RATE
+2903 COEX_MAC_CREATE_BLACKOUT_FAILED
+2904 COEX_VIF_UPDATE_TIMING
+2905 COEX_VIF_TIMING_BAD_NOA_OFFSET
+2906 COEX_MODEM_CC_BAND_UNKNOWN
+2907 COEX_MODEM_CDMA_BAND_UNKNOWN
+2a00 COMMON_FSM_LEAKY_SIGNAL_DISCARDED
+2a01 COMMON_FSM_ERROR_PROCESSING_SIGNAL
+2a02 COMMON_FSM_UNEXPECTED_TERMINATED_FSM
+2a10 COMMON_MIB_WRITE
+2a11 COMMON_MIB_READ
+2a12 COMMON_MIB_REQ_VAL_ABSENT
+2a13 COMMON_MIB_TYPE_CLASH
+2a14 COMMON_MIB_RAM_CORRUPT
+2a15 COMMON_MIB_DUFF_INDEX_COUNT
+2a16 COMMON_MIB_ROM_CORRUPT
+2a17 COMMON_MIB_INVALID_INDEX
+2a18 COMMON_MIB_LIMIT
+2a19 COMMON_MIB_RAM_REC_CORRUPT
+2a1a COMMON_MIB_ASSERT_FAIL
+2a1b COMMON_MIB_TAB_INDEX
+2a1c COMMON_MIB_READ_WARNING
+2a1d COMMON_MIB_WRITE_WARNING
+2a1e COMMON_MIB_NON_EXISTENT_VIF_INDEX
+2a30 COMMON_STA_DATA_CREATE_RECORD
+2a31 COMMON_STA_DATA_CREATE_RECORD_INIT_CALLS_DELAYED
+2a40 COMMON_RATE_BAD_RATE_TX
+2a50 COMMON_DORM_INVALID_ENTITY
+2a60 COMMON_DEBUG_INIT
+2a70 COMMON_HIP_BAD_SIGNAL_PROCESS_ID
+2a80 COMMON_HOSTIO_KICK_UNMASK_TO_HOST_INT
+2a81 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a90 COMMON_VLDATA_TOO_BIG
+2a91 COMMON_VLDATA_WRONG_FORMAT
+2a92 COMMON_VLDATA_NEGATIVE_UNSIGNED_VALUE
+2a93 COMMON_VLDATA_OVERFLOW
+2a94 COMMON_VIF_WRONG_TYPE
+2aa0 COMMON_FAULT_INIT
+2ab0 COMMON_PANIC_SUBSYSTEM_LEVEL
+2c00 MLME_VIFCTRL_ACTIVE_PROCESSING_TIME_NOT_RECEIVED
+2c01 MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_AUTH_TYPE
+2c02 MLME_VIFCTRL_ARP_EXTRACT_ARP_INFO_INVALID_ETH_TYPE
+2c03 MLME_VIFCTRL_ARP_EXTRACT_NDP_INFO_INVALID_ETH_TYPE
+2c04 MLME_VIFCTRL_ARP_OFFLOAD_INVALID_ARP_FRAME
+2c05 MLME_VIFCTRL_ARP_OFFLOAD_IP4_ADDR_UNSET
+2c06 MLME_VIFCTRL_BAD_BEACON_1
+2c07 MLME_VIFCTRL_CHANNEL_SWITCH_REQ_CHANNEL_VALIDATION_FAILED
+2c08 MLME_VIFCTRL_PEER_NOT_FOUND_2
+2c09 MLME_VIFCTRL_CONNECT_REQ_INFO_BSSID_IS_GROUP_ADDRESS
+2c0a MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_CHANNEL_CONFIG
+2c0b MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_RSN_IE
+2c0c MLME_VIFCTRL_CONNECT_REQ_INFO_NO_SSID_IE
+2c0d MLME_VIFCTRL_CONNECT_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c0e MLME_VIFCTRL_ECSA_IS_NOT_STARTED
+2c0f MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_HOST_PID
+2c10 MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_TAG
+2c11 MLME_VIFCTRL_FRAME_BAD_TAG_INDEX
+2c12 MLME_VIFCTRL_INVALID_PMF
+2c13 MLME_VIFCTRL_KEEPALIVE_IP4_ADDR_UNSET
+2c14 MLME_VIFCTRL_BAD_BEACON_2
+2c15 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED
+2c16 MLME_VIFCTRL_NAN_START_REQ_INFO_INVALID_TLV
+2c18 MLME_VIFCTRL_NAN_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c19 MLME_VIFCTRL_NDP_OFFLOAD_INVALID_ICMP6_FRAME
+2c1a MLME_VIFCTRL_NDP_OFFLOAD_INVALID_NDP_NS_FRAME
+2c1b MLME_VIFCTRL_NOA_SCHEDULE_INCOMPLETE
+2c1c MLME_VIFCTRL_NOA_SCHEDULE_INVALID
+2c1d MLME_VIFCTRL_NO_MEM_FOR_WMM
+2c1f MLME_VIFCTRL_NO_VALID_RATES_INTERSECTION
+2c20 MLME_VIFCTRL_OBSS_CANT_ALLOC_SCAN_IES
+2c21 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_INVALID
+2c22 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_DFS_OR_NOR_IR
+2c23 MLME_VIFCTRL_OFFCHANNEL_SPARE
+2c24 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_PARAMETERS
+2c25 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_VIF
+2c26 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_TOO_MANY_SIMULTANEOUS_REQUESTS
+2c27 MLME_VIFCTRL_OLBC_DURATION_TIMEOUT_INVALID
+2c28 MLME_VIFCTRL_UNKNOWN_AP
+2c29 MLME_VIFCTRL_PEER_NOT_FOUND_1
+2c2a MLME_VIFCTRL_PEER_NOT_FOUND_3
+2c2b MLME_VIFCTRL_PEER_NOT_FOUND_4
+2c2c MLME_VIFCTRL_PEER_NOT_FOUND_5
+2c2d MLME_VIFCTRL_PEER_NOT_FOUND_6
+2c2e MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_BLACKOUT_LIST_FULL
+2c2f MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_1
+2c30 MLME_VIFCTRL_RAME_DEL_NOA_IND_FAILED_TO_MATCH
+2c32 MLME_VIFCTRL_RA_PKT_VALIDATION_FAILED
+2c33 MLME_VIFCTRL_SECURITY
+2c34 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_CHANNEL
+2c35 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_COUNT
+2c36 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_DURATION
+2c37 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_INTERVAL
+2c38 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_P2P_IE
+2c39 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_WSC_IE
+2c3b MLME_VIFCTRL_SET_CHANNEL_FAILURE_REGULATORY
+2c3c MLME_VIFCTRL_SET_IP_ADDR_INVALID_VERSION
+2c3e MLME_VIFCTRL_START_REQ_INFO_COUNTRY_MISMATCH
+2c3f MLME_VIFCTRL_START_REQ_INFO_INVALID_AUTH_TYPE
+2c40 MLME_VIFCTRL_START_REQ_INFO_INVALID_BEACON_PERIOD
+2c41 MLME_VIFCTRL_START_REQ_INFO_INVALID_BSSID
+2c42 MLME_VIFCTRL_START_REQ_INFO_INVALID_CHANNEL
+2c43 MLME_VIFCTRL_START_REQ_NO_VALID_CHANNEL_IS_FOUND
+2c45 MLME_VIFCTRL_START_REQ_INFO_INVALID_DTIM_PERIOD
+2c46 MLME_VIFCTRL_START_REQ_INFO_INVALID_IE_LIST
+2c48 MLME_VIFCTRL_START_REQ_INFO_MULTIPLE_SECURITY_IES
+2c49 MLME_VIFCTRL_START_REQ_INFO_NO_RATES_IE
+2c4a MLME_VIFCTRL_START_REQ_INFO_NO_SSID_IE
+2c4b MLME_VIFCTRL_START_REQ_INFO_P2P_NO_PROBE_RSP_IES
+2c4c MLME_VIFCTRL_START_REQ_INFO_VENDOR_IE_PRESENT
+2c4d MLME_VIFCTRL_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c4e MLME_VIFCTRL_START_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c4f MLME_VIFCTRL_STATION_INACTIVITY_PEER_NOT_FOUND
+2c50 MLME_VIFCTRL_TOO_MANY_QUIET_ELEMENTS
+2c51 MLME_VIFCTRL_SPAREB
+2c52 MLME_VIFCTRL_UNABLE_TO_USE_CHAN_FROM_BEACON
+2c53 MLME_VIFCTRL_UNEXPECTED_IP_VER
+2c54 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_1
+2c55 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_2
+2c56 MLME_VIFCTRL_WIFISHARING_INVALID_CHANNEL
+2c57 MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_2
+2c58 MLME_VIFCTRL_CHANNEL_SWITCH_BAD_CHANNEL
+2c59 MLME_VIFCTRL_CHANNEL_SWITCH_WIFISHARING_NOT_ALLOWED
+2c5a MLME_VIFCTRL_UNEXPECTED_QE_DEL_REQ
+2c60 MLME_VIFCTRL_AP_NO_CHANNEL_FOUND
+2c61 MLME_VIFCTRL_STA_CHANNEL_NOT_FOUND
+2c62 MLME_VIFCTRL_EDCA_OVERRIDE_FAILED
+2c63 MLME_VIFCTRL_READ_APF_MBULK_ALLOC_FAIL
+2c70 MLME_CHANNELISATION_LTE_COEX_NO_CHANNEL_FOUND
+2c71 MLME_MBULK_NOT_ENOUGH_HEADROOM
+2c72 MLME_STATION_RECORD_DOES_NOT_EXIST
+2c73 MLME_UTILS_FORCE_ACTIVE_IDEMPOTENT_FALSE
+2c74 MLME_UTILS_FORCE_ACTIVE_OUT_OF_RANGE
+2c75 MLME_UTILS_NON_STATION_POWERMGT
+2c76 MLME_INVALID_SIGNAL_DISCARDED
+2c77 MLME_UTILS_MBULK_CLONE_OUT_OF_MEM
+2c90 MLME_TXPOWER
+2c91 MLME_TXPOWER_SAR_INIT
+2c92 MLME_TXPOWER_NO_CELL_INIT
+2c93 MLME_TXPOWER_NO_CELL_INIT_INCLUDED_CHANNELS
+2c94 MLME_TXPOWER_POWER_CAP_BELOW_MIN
+2c95 MLME_TXPOWER_11AC_TPC_NO_ENV_WITH_RM
+2ca0 MLME_FTM_CREATE_RESPONDER_ENTRY
+2ca1 MLME_FTM_INVALID_PARAMETERS
+2ca2 MLME_FTM_INVALID_RANGE_REQ
+2ca3 MLME_FTM_MBULK_SCAN_IES_ALLOC_FAIL
+2ca4 MLME_FTM_SCAN_UNKNOWN_RESPONDER
+2ca5 MLME_FTM_SCAN_NO_RESPONDER_FOUND
+2ca6 MLME_FTM_DEL_UNKNOWN_RESPONDER
+2ca7 MLME_FTM_CREATE_RTT_RECORD
+2ca8 MLME_FTM_RTT_CONF_NO_RESPONDERS
+2ca9 MLME_FTM_RTT_CONF_TOO_MANY_RESPONDERS
+2caa MLME_FTM_RTT_CONF_DUPLICATE_PEER
+2cab MLME_FTM_RTT_CONF_BURST_PERIODS_CONFLICT
+2cac MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_SHORT
+2cad MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_LONG
+2cae MLME_FTM_RTT_CONF_INVALID_RTT_TYPE
+2caf MLME_FTM_RTT_CONF_INVALID_CHANNEL_FREQ
+2cb0 MLME_FTM_RTT_CONF_INVALID_BURST_PERIOD
+2cb1 MLME_FTM_RTT_CONF_INVALID_BURSTS_EXPONENT
+2cb2 MLME_FTM_RTT_CONF_INVALID_FRAMES_PER_BURST
+2cb3 MLME_FTM_RTT_CONF_INVALID_BURST_DURATION
+2cb4 MLME_FTM_RTT_CONF_TOO_MANY_FRAMES_IN_BURST
+2cb5 MLME_FTM_PARAMETER_OVERRIDE_BURST_EXPONENT
+2cb6 MLME_FTM_PARAMETER_OVERRIDE_BURST_DURATION
+2cb7 MLME_FTM_PARAMETER_OVERRIDE_BURST_MIN_DELTA
+2cb8 MLME_FTM_PARAMETER_OVERRIDE_ASAP_MDOE
+2cb9 MLME_FTM_PARAMETER_OVERRIDE_FTM_PER_BURST
+2cba MLME_FTM_PARAMETER_OVERRIDE_BANDWIDTH
+2cbb MLME_FTM_PARAMETER_OVERRIDE_INTERVAL
+2cbc MLME_FTM_REQUEST_VALIDATION_DISABLED
+2cbd MLME_FTM_RESPONSE_VALIDATION_DISABLED
+2cbe MLME_FTM_CREATE_RTT_RECORD_DUPLICATED
+2cbf MLME_FTM_RTT_RECORD_NOT_FOUND
+2cc0 MLME_FTM_BURST_PARAMETERS_NOT_EXIST
+2cc1 MLME_FTM_PARAMETER_OVERRIDE_START_TIME
+2cc2 MLME_FTM_RTT_CONF_INVALID_BURST_INTERVAL
+2cc3 MLME_FTM_RTT_MEASUREMENT_UNSUCCESSFUL
+2cc4 MLME_FTM_RTT_T3_T2_INVALID
+2cc5 MLME_FTM_RTT_T4_T1_INVALID
+2cc6 MLME_FTM_RTT_T4_T1_IS_LESS_THAN_T3_T2
+2cd0 MLME_NDM_UNEXPECTED_FRAME
+2ce0 MLME_NAM_NDC_SCHEDULE_NOT_POSSIBLE
+panicid 722
+2000 DPLP_FRAG_GENERIC
+2001 DPLP_FRAG_WRONG_LEN
+2002 DPLP_FRAG_FREE_DU
+2003 DPLP_FRAG_IS_LAST_FRAME_FRAG
+2004 DPLP_FRAG_IS_INCONSISTENT
+2010 DPLP_FALLBACK_GENERIC
+2011 DPLP_FALLBACK_INVALID_MIB_SIZE
+2013 DPLP_FALLBACK_INVALID_MODULATION
+2014 DPLP_FALLBACK_MAX_ENTRIES_IS_ZERO
+2016 DPLP_FALLBACK_FAILED_TO_ALLOCATE_LINK_INFO
+2017 DPLP_FALLBACK_TBL_LENGTH_OUT_OF_BOUNDS
+2018 DPLP_FALLBACK_RATE_INDEX_OUT_OF_BOUNDS
+2020 DPLP_ENC_HNDL_GENERIC
+2021 DPLP_ENC_HNDL_WRONG_ENC_TYPE
+2022 DPLP_ENC_HNDL_MBULK_NULL
+2023 DPLP_ENC_HNDL_KEYC_NULL
+2024 DPLP_ENC_HNDL_NO_ROOM_LEFT
+2025 DPLP_ENC_HNDL_LIST_EMPTY
+2026 DPLP_ENC_HNDL_NO_KEY_FOUND
+2027 DPLP_ENC_HNDL_ENC_INFO_ALLOC_FAIL
+2028 DPLP_ENC_HNDL_NO_FRAMES_QUEUED_TO_DPHP
+2029 DPLP_ENC_HNDL_WAPI_CRYPTOSW_INVALID
+202a DPLP_ENC_HNDL_MBULK_IS_CHAINED
+2030 DPLP_CTRL_MGRL_GENERIC
+2031 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSING
+2032 DPLP_CTRL_MGR_DP_STATE_NOT_RESUMING
+2033 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSED
+2034 DPLP_CTRL_MGR_NEW_CMD_ALLOC_FAIL
+2035 DPLP_CTRL_MGR_CMD_TIMEOUT
+2040 DPLP_LINK_ADAPT_GENERIC
+2041 DPLP_LINK_ADAPT_RATE_UNSUPPORTED
+2042 DPLP_LINK_ADAPT_RATE_INDEX_OUT_OF_BOUNDS
+2043 DPLP_LINK_ADAPT_RATE_MIN_BA_RATE_WRONG
+2044 DPLP_LINK_ADAPT_SELECTED_RATE_INVALID
+2045 DPLP_LINK_ADAPT_FALLBACK_TABLE_IS_NULL
+2047 DPLP_LINK_ADAPT_NUM_RETRIES_IS_WRONG
+2050 DPLP_EXT_API_GENERIC
+2051 DPLP_EXT_API_DU_IS_NOT_RXENTRY
+2052 DPLP_EXT_API_DU_IS_NOT_TXENTRY
+2053 DPLP_EXT_API_RESOURCE_HANDLE_NOT_CALLED_FROM_CB
+2054 DPLP_EXT_API_WRONG_AMSDU_LEN
+2055 DPLP_EXT_API_WRONG_SIGNAL_BUFFER_SIZE
+2057 DPLP_EXT_API_MSG_CANNOT_QUEUE_BEACON
+2058 DPLP_EXT_API_DU_HAS_WRONG_STATE
+205a DPLP_EXT_API_INVALID_PID
+205b DPLP_EXT_API_INVALID_PAUSE_TYPE
+205c DPLP_EXT_API_STA_RECORD_DOES_NOT_EXIST
+205d DPLP_EXT_API_STA_RECORD_ALREADY_CLEARING
+205e DPLP_EXT_API_MLME_CALLBACK_ALREADY_SET
+205f DPLP_EXT_API_INVALID_MAC
+2060 DPLP_RX_GENERIC
+2061 DPLP_RX_VIF_IS_SCAN
+2062 DPLP_RX_FRAG_COUNT_WRONG_FOR_AMPDU
+2063 DPLP_RX_SEQ_DIFF_GREATER_THAN_WIN_SIZE
+2064 DPLP_RX_DPLP_INTERNAL_ERROR
+2065 DPLP_RX_CORRUPT_MBULK
+2066 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2067 DPLP_RX_FORWARD_CHAINED_TO_CTRLPLANE
+2068 DPLP_RX_MISSING_DRAM
+2070 DPLP_STATION_GENERIC
+2071 DPLP_STATION_TX_UP_IS_UNMAPPED
+2072 DPLP_STATION_FRAME_ALREADY_COUNTED
+2073 DPLP_STATION_TOO_MANY_QUEUED_FRAMES
+2074 DPLP_STATION_FRAME_IS_NOT_COUNTED
+2075 DPLP_STATION_NO_QUEUED_FRAME
+2076 DPLP_STATION_FRAME_HAS_NO_TXQUEUE
+2077 DPLP_STATION_FRAME_NOT_READY_TO_QUEUE
+2078 DPLP_STATION_RATE_INVALID
+207a DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_HIGH_IMPORTANCE
+207b DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_AMDPU
+207c DPLP_STATION_TXENTRY_HAS_NO_BAINFO
+207d DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_MULTICAST
+207e DPLP_STATION_DPLP_IN_WRONG_STATE
+207f DPLP_STATION_CLEAR_MUST_BE_TOTAL_PAUSED
+2080 DPLP_STATION_CLEAR_MUST_BE_NOTHING_QUEUED
+2081 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_SF_NOT_NULL
+2082 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_LF_NOT_NULL
+2083 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_COUNT_NOT_ZERO
+2090 DPLP_AMPDU_MGR_GENERIC
+2091 DPLP_AMPDU_MGR_MALLOC_FAIL
+2092 DPLP_AMPDU_MGR_TX_QUEUE_HEAD_OR_TAIL_NULL
+2093 DPLP_AMPDU_MGR_DU_NOT_READY_TO_SEND
+2094 DPLP_AMPDU_MGR_AMPDU_TXENTRY_LIST_NOT_FOUND
+2095 DPLP_AMPDU_MGR_TOO_MANY_FRAMES_WAITING_TO_TX
+2096 DPLP_AMPDU_MGR_TX_ENTRY_HAS_NO_BAINFO
+2097 DPLP_AMPDU_MGR_TX_ENTRY_HAS_INVALID_RATE
+2098 DPLP_AMPDU_LINK_INFO_IS_NULL
+2099 DPLP_AMPDU_AMSDU_OVERSIZE
+209a DPLP_AMPDU_AMSDU_NOT_SUPPORTED
+209b DPLP_AMPDU_MGR_RX_BA
+209c DPLP_AMPDU_MGR_FREE_PPDU_STILL_IN_DPHP
+209d DPLP_AMPDU_MGR_CFMS_COUNT
+209e DPLP_AMPDU_MGR_CANNOT_CANCEL_PPDU
+209f DPLP_AMPDU_MGR_CANCEL_COUNT
+20a0 DPLP_HW_GENERIC
+20a1 DPLP_HW_VIF_IS_NOT_SCHEDULED
+20a2 DPLP_HW_MBULK_HAS_NO_SIGNAL
+20a3 DPLP_HW_MBULK_HAS_REFCOUNT_OR_LEN
+20a4 DPLP_HW_UNEXPECTED_DU_STATE
+20a5 DPLP_HW_TXENTRY_IS_DATAFRAME
+20a9 DPLP_HW_UNEXPECTED_VIF_ID
+20aa DPLP_HW_TXENTRY_STILL_COUNTED
+20b0 DPLP_MPDU_LOAD_GENERIC
+20b1 DPLP_MPDU_LOAD_NODE_ELEMENT_NOT_NULL
+20b2 DPLP_MPDU_LOAD_PPDU_NOT_FOUND
+20b3 DPLP_MPDU_LOAD_NOT_A_TRIGGERED_QUEUE
+20b4 DPLP_MPDU_LOAD_CANCELLING_NULL_PPDU
+20b5 DPLP_MPDU_LOAD_UNICAST_IS_PAUSING
+20b6 DPLP_MPDU_LOAD_TXENTRY_NOT_FOUND
+20b7 DPLP_MPDU_LOAD_NO_MORE_TRIGGERED_Q_LEFT
+20b8 DPLP_MPDU_LOAD_FRAME_NOT_QUEUED
+20b9 DPLP_MPDU_LOAD_COUNT_NOT_ZERO
+20ba DPLP_MPDU_LOAD_DPLANE_NOT_RUNNING
+20c0 DPLP_QUEUE_GENERIC
+20c1 DPLP_QUEUE_WRONG_DU_STATE
+20c2 DPLP_QUEUE_TX_QUEUE_NOT_EMPTY
+20c3 DPLP_QUEUE_MAC_AC_IS_WRONG
+20c4 DPLP_QUEUE_FRAME_WITHOUT_TX_QUEUE
+20c5 DPLP_QUEUE_LIST_ELEMENT_IS_WRONG
+20c6 DPLP_QUEUE_MBULK_NOT_LARGE_ENOUGH
+20c7 DPLP_QUEUE_UNKNOWN_REQUEST_TYPE
+20c8 DPLP_QUEUE_DOUBLE_DEQUEUE
+20c9 DPLP_QUEUE_TX_QUEUE_EMPTY
+20ca DPLP_QUEUE_DEBUG_BEACON_SW_TIMEOUT
+20cb DPLP_QUEUE_DEBUG_AMSDU_ERROR
+20cc DPLP_QUEUE_INVALID_DU
+20d0 DPLP_FROM_HOST_HARD
+20e0 DPLP_TIMER_SCHEDULE_WHEN_PAUSED
+20f0 DPLP_ANTENNA_MODE_INVALID_BITMAP
+2100 DPLP_DPLP_IMM_UNIMPLEMENTED
+2110 DPLP_DPIF_GENERIC
+2111 DPLP_DPIF_BAD_OPERATION
+2112 DPLP_DPIF_RESOURCE_LOW
+2113 DPLP_DPIF_RESOURCE_INDEX_ERROR
+2114 DPLP_DPIF_BFEE
+2115 DPLP_DPIF_PEER_INFO
+2116 DPLP_DPIF_INTERRUPT_SANITY
+2117 DPLP_DPIF_INVALID_BSS_INDEX
+2120 DPLP_PEER_MGT_GENERIC
+2121 DPLP_PEER_MGT_FRAMES_NOT_CANCELLED
+2130 DPLP_BEAMFORMER_GENERIC
+2131 DPLP_BEAMFORMER_UNEXPECTED_NDPA
+2140 DPLP_DEADLINE_GENERIC
+2141 DPLP_DEADLINE_STOP_DEADLINE_NOT_FOUND
+2142 DPLP_DEADLINE_VIF_DEADLINE_NOT_FOUND
+2143 DPLP_DEADLINE_ACTIVE_DEADLINE_IS_NULL
+2144 DPLP_DEADLINE_DPIF_Q_NUM_NOT_FOUND
+2145 DPLP_DEADLINE_UNABLE_TO_CANCEL_DLINE
+2150 DPLP_PROTECTION_GENERIC
+2151 DPLP_PROTECTION_RATE_INDEX_OUT_OF_BOUNDS
+2160 DPLP_VIF_GENERIC
+2200 DPHP_BA_GENERIC
+2201 DPHP_BA_RESERVE_NON_AMPDU
+2202 DPHP_BA_LOAD_NON_AMPDU
+2203 DPHP_BA_LOAD_RESERVE_FAILED
+2210 DPHP_COORD_GENERIC
+2211 DPHP_COORD_BAD_RESET
+2212 DPHP_COORD_BAD_RESET_STAGE2
+2213 DPHP_COORD_INVALID_BK_CLEAR
+2214 DPHP_COORD_PPDU_LIST_DAMAGED
+2215 DPHP_COORD_NOT_MARKED_CANCEL
+2216 DPHP_COORD_INVALID_PPDU_STATE
+2217 DPHP_COORD_INVALID_DPHP_STATE
+2218 DPHP_COORD_Q_EMPTY
+2220 DPHP_DEADLINE_GENERIC
+2221 DPHP_DEADLINE_BK_NOT_EMPTY
+2222 DPHP_DEADLINE_BAD_DEADLINE
+2223 DPHP_DEADLINE_IS_NULL
+2224 DPHP_DEADLINE_BAD_Q_MASK
+2225 DPHP_DEADLINE_ILLEGAL_PPDU
+2226 DPHP_DEADLINE_ALREADY_ACTIVE
+2227 DPHP_DEADLINE_INVALID_TYPE
+2228 DPHP_DEADLINE_NO_INSTALLED_DEADLINE
+2230 DPHP_RX_GENERIC
+2231 DPHP_RX_NO_DRAM
+2232 DPHP_RX_TRUNCATED_DOLLOP
+2233 DPHP_RX_SANITY
+2234 DPHP_RX_NO_PRECEDING_MPDU
+2235 DPHP_RX_BAD_DOLLOP
+2236 DPHP_RX_GIVE_BEHIND_TAKE
+2240 DPHP_DMA_GENERIC
+2241 DPHP_DMA_RX_ORDER
+2242 DPHP_DMA_UNEVEN_ALIGN
+2243 DPHP_DMA_INVALID_ENC_TYPE
+2244 DPHP_DMA_NO_SPACE
+2245 DPHP_DMA_TX_FRAME_TOO_LONG
+2246 DPHP_DMA_PLINE_FULL
+2247 DPHP_DMA_PLINE_EMPTY
+2248 DPHP_DMA_PLINE_INVALID
+2249 DPHP_DMA_INVALID_TFER_ALERT
+224a DPHP_DMA_MBULK_CHAIN_ERROR
+224b DPHP_DMA_INVALID_PAUSE_STATE
+224c DPHP_DMA_SG_LIST_FULL
+224d DPHP_DMA_BAD_SAVED_RX_STATE
+2250 DPHP_RESET_GENERIC
+2251 DPHP_RESET_BAD_STATE_REQUEST
+2252 DPHP_RESET_RX_NOT_IDLE
+2253 DPHP_RESET_DMA_NOT_IDLE
+2254 DPHP_RESET_BAD_WDOG_STATE
+2255 DPHP_RESET_HW_IDLE_FAIL
+2256 DPHP_INIT_BAD_MAC_REGS_ADDR_START
+2257 DPHP_INIT_BAD_MAC_INSTANCE_NUM
+2258 DPHP_MAC_FAILED_TO_START
+2260 DPHP_INT_GENERIC
+2261 DPHP_INT_UNHANDLED
+2262 DPHP_INT_MAC_ERROR
+2263 DPHP_INT_DMA_ALERT_RECURSION
+2264 DPHP_INT_BAD_DMA_TFER_STATE
+2265 DPHP_INT_DMA_TFER_FAIL
+2266 MAC_ACC_BAD_TX_RATE
+2267 MAC_ACC_BAD_PROT_RATE
+2268 DPHP_INT_XDMA_TFER_FAIL
+2269 DPHP_XDMA_TFER_FAIL
+226a DPHP_XDMA_TFER_CHAINED_MBULK_FAIL
+226b DPHP_XDMA_TFER_CHUNK_MBULKS_FAIL
+226c DPHP_FLEXIMAC_PANIC
+226d DPHP_CAPTURE_IQ_SAMPLES_LOST
+226e DPHP_CAPTURE_DONE
+226f DPHP_PHYDMA_DOUBLE_REGISTER
+2270 DPHP_TX_GENERIC
+2271 DPHP_TX_UNDERFLOW
+2272 DPHP_TX_BUFFER_INCORRECT
+2280 DPHP_SLOT_GENERIC
+2281 DPHP_SLOT_EXPECTED_AMPDU
+2282 DPHP_SLOT_NULL_PPDU
+2283 DPHP_SLOT_DMA_INCOMPLETE
+2284 DPHP_SLOT_QUEUEING_FAIL
+2285 DPHP_SLOT_BAD_CANCEL_REQ
+2286 DPHP_SLOT_TIMED_TX_Q_PAUSED
+2287 DPHP_SLOT_DMA_DATA_INVALID
+2288 DPHP_SLOT_INVALID_STATE
+2289 DPHP_SLOT_INVALID_PDU_STATUS
+228a DPHP_SLOT_UNEXPECTED_CFM
+228b DPHP_SLOT_MPDU_INDEX_OUT_OF_BOUNDS
+228c DPHP_SLOT_UNEXPECTED_DYN_RESTART
+228d DPHP_SLOT_BAD_COMMAND
+2290 DPHP_CONFIG_GENERIC
+2291 DPHP_CONFIG_BAD_EDCA_Q
+2292 DPHP_CONFIG_BAD_EDCA_CONFIG
+2293 DPHP_CONFIG_MISSING_PROT_TABLE
+2294 DPHP_CONFIG_RAMSW_SIZE_INVALID
+22a0 DPHP_DPIF_GENERIC
+22a1 DPHP_DPIF_BAD_DEADLINE_CANCEL
+22a2 DPHP_DPIF_INVALID_ECW
+22a3 DPHP_DPIF_INVALID_BURST
+22a4 DPHP_DPIF_BAD_RX_CHAIN_CALC
+22a5 DPHP_DPIF_BAD_RX_TYPE
+22a6 DPHP_DPIF_PEER_INFO
+22a7 DPHP_DPIF_UNXPECTED_AMPDU
+22a8 DPIF_LINK_INFO_INC_REF_COUNT_WHEN_MAX
+22a9 DPIF_LINK_INFO_DEC_REF_COUNT_WHEN_ZERO
+22aa DPIF_LINK_INFO_ASSIGN_TO_TX_ENTRY_Q_NULL
+22ab DPIF_MBULK_DATA_WRONG_CACHELINE
+22ac DPIF_BAD_ENC_KEY
+22ad DPIF_UNEXPECTED_REQUEST_CANCEL
+22b0 DPHP_TCM_GENERIC
+22b1 DPHP_TCM_ALLOC_SIZE_MISMATCH
+22b2 DPHP_TCM_POOL_EMPTY
+22b3 DPHP_TCM_BAD_FREE
+22b4 DPHP_TCM_INIT_INSUFFICIENT_SPACE
+22b5 DPHP_TCM_POOL_SIZE
+22b6 DPHP_TCM_INIT_FAIL
+22b7 TCM_INIT_POOL_IN_USE
+22c0 DPHP_BAD_MIF_STATE
+22d0 DPHP_BA_TX_GENERIC
+22d1 DPHP_BA_TX_UNEXPECTED_CFM_STATE
+22d2 DPHP_BA_TX_PPDU_AT_Q_HEAD_DOES_NOT_MATCH
+22d3 DPHP_BA_TX_DEINT_OUTSTANDING_AMPDUS
+22d4 DPHP_BA_TX_DEINT_OUTSTANDING_BA_TX_AGRS
+22d5 DPHP_BA_TX_AMPDU_ALREADY_CONFIRMED
+22d6 DPHP_BA_TX_PPDU_COUNT_VALUE_INCORRECT
+22d7 DPHP_BA_TX_UNEXPECTED_PANIC_SIGNAL
+22d8 DPHP_BA_TX_BA_WINDOW_NOT_EMPTY
+22d9 DPHP_BA_TX_AMPDU_DEQUEUED_INCORRECTLY
+22da DPHP_BA_TX_AMPDU_NOT_FOUND
+22e0 DPHP_WATCHDOG_GENERIC
+22e1 DPHP_UNHANDLED_LOCKUP
+22f0 DPHP_BEAMFORMER_INVALID_NDPA
+22f1 DPHP_BEAMFORMEE_GENERIC
+2300 MACRAME_VIF_CREATE_NULL_SCANVIF
+2301 MACRAME_VIF_DEREGISTER_QUEUED_TX_FRAMES
+2302 MACRAME_VIF_DELETE_STATION_ASSOCIATED
+2303 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_STATE
+2304 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_PS_STATE
+2305 MACRAME_VIF_CLEAR_INVALID_SCHED_STATE
+2308 MACRAME_VIF_DESCHED_REG_REQ_INVALID_PS_STATE
+230a MACRAME_VIF_SW_DONE_VIF_NOT_SCHEDULED
+230c MACRAME_VIF_CTS_PROCESSED_NULL_DU
+230d MACRAME_VIF_DEREGISTER_NO_REG_VIF
+230e MACRAME_VIF_DEREGISTER_INVALID_SCHED_STATE
+230f MACRAME_VIF_SCHED_MISSED_INVALID_START_TIME
+2311 MACRAME_VIF_INDEX_OUT_OF_RANGE
+2313 MACRAME_VIF_CANCEL_NULL_ENTRY
+2315 MACRAME_VIF_IS_NULL
+2316 MACRAME_VIF_INVALID_TRAFFIC_STATISTICS
+2320 MACRAME_STATION_ADD_NULL_RECORD
+2323 MACRAME_STATION_SET_CONNECT_NULL_RECORD
+2326 MACRAME_STATION_RESET_STA_RECORD_WITH_ENC_KEY
+2340 MACRAME_SCHED_UPDATE_DURATION_HIST_VIF_NOT_SCHEDULED
+2342 MACRAME_SCHED_QUERY_BO_INVALID_BO_TIMES
+2343 MACRAME_SCHED_RESCHEDULE_ALREADY_ACTIVE
+2344 MACRAME_SCHED_SCHED_INVALID_VIF
+2345 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_VIF
+2346 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_STATE
+2347 MACRAME_SCHED_SCHED_IND_INVALID_VIF
+2348 MACRAME_SCHED_RADIO_DONE_INVALID_STATE
+2349 MACRAME_SCHED_BO_UPDATE_INVALID_VIX
+234a MACRAME_SCHED_DESCHED_NOW_NOT_SCEDULED
+234b MACRAME_SCHED_NEAREST_SCHED_TIME_INVALID_STATE
+234c MACRAME_SCHED_COULD_NOT_INSTANTIATE_FSM
+234d MACRAME_SCHED_INVALID_FSM_PID
+234e MACRAME_SCHED_INVALID_RADIO_BM
+234f MACRAME_SCHED_INVALID_PAUSE_REASON
+2350 MACRAME_SCHED_INVALID_INDEX
+2351 MACRAME_SCHED_INVALID_INTERFACE
+2352 MACRAME_SCHED_INVALID_SCHDL_FSM
+2361 MACRAME_TX_MM_REQUEST_INVALID_VIF
+2362 MACRAME_TX_ADDING_NULL_ENTRY_TO_BUFFER
+2363 MACRAME_TX_SENDING_NULL_ENTRY_FROM_BUFFER
+2364 MACRAME_TX_DISCARDING_NULL_ENTRY_FROM_BUFFER
+2366 MACRAME_TX_DISCARD_NULL_PTR_TO_ENTRY
+2367 MACRAME_TX_CANCEL_NULL_PTR_TO_ENTRY
+2368 MACRAME_TX_CANCEL_NULL_TXENTRY
+2369 MACRAME_TX_NO_PSPOLL
+2382 MACRAME_BEACON_MISSED_BEACON_NOT_SCHEDULED_VIF
+2384 MACRAME_BEACON_UPDATE_WAKEUP_VIF_NOT_STA
+2386 MACRAME_BEACON_TX_CLEAR_INVALID_VIF_TYPE
+2387 MACRAME_BEACON_TX_LOAD_HANDLER_INVALID_VIF_TYPE
+2388 MACRAME_BEACON_TX_LOAD_HANDLER_READONLY_FRAME
+2389 MACRAME_BEACON_TX_FINISHED_INVALID_VIF
+238a MACRAME_BEACON_RX_SCHEDULE_TOO_FAR_IN_THE_FUTURE
+238c MACRAME_BEACON_TX_SHEDULE_REQUEST_IN_THE_PAST
+238d MACRAME_BEACON_TX_GET_NEXT_TIME_INVALID_VIF_TYPE
+238e MACRAME_BEACON_TX_AP_WRITE_PVB_INPUT_CHECK
+238f MACRAME_BEACON_TX_AP_UPDATE_NEEDED_NON_AP_VIF
+2390 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_SCHEDULED_VIF
+2391 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_AP_VIF
+2392 MACRAME_BEACON_TX_AP_SEND_BEACON_NOT_FOUND
+2394 MACRAME_BEACON_TX_AP_CLEAR_BEACON_IN_DPLP
+2395 MACRAME_BEACON_TX_ECSA_COUNT_REACHED_ZERO
+239a MACRAME_BEACON_CALC_SLEEP_PERIODS
+239b MACRAME_BEACON_TBTT_EBRT_INVALID_VIF
+239c MACRAME_BEACON_TBTT_EBRT_INVALID_LISTEN_START
+239e MACRAME_BEACON_TX_TXENTRY_IS_NULL
+23a2 MACRAME_PS_COMMON_PS_CHECK_INVALID_VIF
+23a3 MACRAME_PS_COMMON_ANNOUNCE_PROCESSED_NULL_DU
+23a4 MACRAME_PS_COMMON_SEND_PSNULL_NULL_ERROR
+23a6 MACRAME_PS_COMMON_POPULATE_PSNULL_VIF_NOT_SCHEDULED
+23a7 MACRAME_PS_LEGACY_PSPOLL_CFM_NULL_DU
+23a8 MACRAME_PS_LEGACY_PSPOLL_CFM_NON_STA_VIF
+23a9 MACRAME_PS_UAPSD_ENQUEUE_TRIGGER_VIF_NOT_SCHEDULED
+23c0 MACRAME_BLACKOUT_CMM_INVALID_NUM_BO
+23c1 MACRAME_BLACKOUT_CHIP_INVALID_NUM_BO
+23c2 MACRAME_BLACKOUT_P2P_INVALID_VIF_TYPE_NOA
+23c3 MACRAME_BLACKOUT_P2P_SET_CTW_FAIL
+23c4 MACRAME_BLACKOUT_NOT_REGISTERED
+23c5 MACRAME_BLACKOUT_P2P_SCAN_NOA_NOT_UPDATED
+23c6 MACRAME_BLACKOUT_AP_SCAN_QUIET_COUNT_NOT_UPDATED
+23e2 MACRAME_FSM_ADD_BO_INVALID_TYPE
+23e3 MACRAME_FSM_ADD_BO_UNDEFINED_TYPE
+23e4 MACRAME_FSM_ADD_BO_QUIET_INVALID_ID
+23e5 MACRAME_FSM_ADD_BO_LOCAL_INVALID_ID
+23e6 MACRAME_FSM_DEL_BO_INVALID_TYPE
+23e7 MACRAME_FSM_DEL_BO_UNDEFINED_TYPE
+23e8 MACRAME_FSM_DEL_BO_QUIET_INVALID_ID
+23e9 MACRAME_FSM_DEL_BO_LOCAL_INVALID_ID
+2400 MACRAME_TIMER_UNSCHEDULABLE_VIF_MULTICAST
+2401 MACRAME_TIMER_UNSCHEDULABLE_VIF_FAST_PS
+2402 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_DELAY
+2403 MACRAME_TIMER_UNSCHEDULABLE_VIF_CHECK_CLEAR
+2404 MACRAME_TIMER_UNSCHEDULABLE_VIF_MOREBIT
+2405 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_CHECK
+2406 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_TIMER
+2407 MACRAME_TIMER_UNSCHEDULABLE_VIF_TDLS
+240a MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_TX
+240b MACRAME_TIMER_DPLANE_OPERATION_TIMEOUT
+240c MACRAME_TIMER_RADIOMAC_SWITCH_TIMEOUT
+240d MACRAME_TIMER_BT_LO_ACCESS_GRANT_TIMEOUT
+240e MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_RX
+2420 MACRAME_COEX_BLACKOUT_ATTACH_USPBO_FAILED
+2421 MACRAME_COEX_BLACKOUT_ATTACH_VIF_FAILED
+2422 MACRAME_COEX_BLACKOUT_ATTACH_INVALID_HANDLE
+2423 MACRAME_COEX_BLACKOUT_UPDATE_INVALID_HANDLE
+2424 MACRAME_COEX_BLACKOUT_DESTROY_INVALID_HANDLE
+2425 MACRAME_COEX_BLACKOUT_DETACH_INVALID_HANDLE
+2426 MACRAME_COEX_BLACKOUT_MASK_INVALID_HANDLE
+2427 MACRAME_COEX_BLACKOUT_UNMASK_INVALID_HANDLE
+2428 MACRAME_COEX_VIF_GET_NEXT_DTIM_TIME_INVALID_VIF
+2429 MACRAME_COEX_VIF_GET_CLEAR_TIME_INVALID_VIF
+242a MACRAME_COEX_NEGATIVE_MAX_CLEAR_TIMEOUT
+2431 MACRAME_MLME_API_ALLOW_BEACONS_NON_AP_VIF
+2434 MACRAME_MLME_API_SET_BSS_INVALID_VIF
+2435 MACRAME_MLME_API_SET_BSS_NO_AP
+2436 MACRAME_MLME_API_SET_INFO_SCAN_VIF
+2437 MACRAME_MLME_API_CONFIG_QUEUE_SCAN_VIF
+2438 MACRAME_MLME_API_SET_BSS_UNMATCHED_VIF_TYPES
+2439 MACRAME_MLME_API_INVALID_VIF
+243a MACRAME_MLME_API_NOT_STATION_OWNER
+243b MACRAME_MLME_API_STATION_CLEAR_RECORD_NOT_FOUND
+243c MACRAME_MLME_API_STATION_PAUSE_RECORD_NOT_FOUND
+243d MACRAME_MLME_API_STATION_UNPAUSE_RECORD_NOT_FOUND
+2441 MACRAME_BA_MGR_REMOVE_BA_NULL_INFO
+2442 MACRAME_BA_MGR_REMOVE_BA_HWINFO
+2443 MACRAME_BA_MGR_QUEUE_HEAD_NULL
+2444 MACRAME_BA_MGR_QUEUE_TAIL_NULL
+2445 MACRAME_BA_MGR_DELBA_RX_BAINSTANCE_NULL
+2446 MACRAME_BA_MGR_FIND_BA_INVALID_TPRI
+2447 MACRAME_BA_MGR_DELBA_INVALID_DIR
+2448 MACRAME_BA_MGR_ADDBA_ZERO_BUF_SIZE
+2449 MACRAME_BA_MGR_ADDBA_STA_RECORD_NULL
+244a MACRAME_BA_MGR_ADD_BA_RX_AGREEMENT
+2450 MACRAME_KEY_MALLOC_FAILED
+2451 MACRAME_RADIO_INIT_DONE_INVALID_STATE
+2452 MACRAME_RADIO_STATE_CHANGE_ON_NO_DESCRIPTORS
+2453 MACRAME_RADIO_OFF_INVALID_STATE
+2454 MACRAME_RADIO_DPD_NO_RATES
+2455 MACRAME_RADIO_INVALID_STATE
+2456 MACRAME_RADIO_COULD_NOT_INSTANTIATE_FSM
+2457 MACRAME_RADIO_INVALID_BITMAP
+2458 MACRAME_RADIO_ILLEGAL_SWITCH_REQUEST
+2459 MACRAME_MODEM_INVALID_DFE_CONFIG
+245a MACRAME_RADIOMAC_TOO_MANY_REQUESTS
+245b MACRAME_MODEM_CONFLICTING_DFE_CONFIG
+245c MACRAME_RADIOMAC_MAC0_UNAVAILABLE
+245d MACRAME_RADIO_DUMMY_FRAME_DPD_NOT_SUPPORTED
+2480 MACRAME_DPLANE_MACRAME_NULL_POINTER
+2490 MACRAME_VIF_PAUSE_RESUME_NOT_ENOUGH_MEMORY_FOR_REQUEST
+2491 MACRAME_VIF_NAN_ELAPSED_TIME_GREATER_THAN_DW0_PERIOD
+2492 MACRAME_VIF_NAN_INSUFFICINET_OCTETS
+2493 MACRAME_VIF_NAN_NO_SLOTS_FOUND
+24a0 MACRAME_IDLE_AP_INVALID_VIF
+24ff MACRAME_LAST_ID
+2500 MLME_RAME_GET_KA_INTERVAL_INVALID_DATA
+2501 MLME_FSM_PID_ALREADY_IN_USE_1
+2502 MLME_AP_NO_CURRENT_STA
+2503 MLME_FSM_PID_ALREADY_IN_USE_2
+2504 MLME_FSM_PID_ALREADY_IN_USE_3
+2505 MLME_FSM_PID_ALREADY_IN_USE_4
+2506 MLME_FSM_PID_ALREADY_IN_USE_5
+2507 MLME_FSM_PID_ALREADY_IN_USE_6
+2508 MLME_FSM_PID_ALREADY_IN_USE_7
+2509 MLME_FSM_PID_ALREADY_IN_USE_8
+250a MLME_FSM_PID_ALREADY_IN_USE_9
+250b MLME_FSM_PID_ALREADY_IN_USE_10
+250c MLME_AP_DISCONNECT_NO_STATION_RECORD
+250e MLME_AP_UNEXPECTED_FRAME_TYPE
+250f MLME_AP_UNEXPECTED_FRAME_SUBTYPE
+2510 MLME_REG_MIB_READ_FAIL
+2511 MLME_REG_MIB_READ_FAIL_2
+2512 MLME_REG_MIB_COUNTRY_CODE_FAIL
+2513 MLME_REG_MIB_WORLD_DOMAIN_COUNTRY_CODE_FAIL
+2514 MLME_REG_IS_NULL
+2520 MLME_CONMGR_MLME_SYNCHRONISED_RSP_INVALID
+2530 MLME_STA_RECORD_ADD_1
+2531 MLME_STA_RECORD_DELETE
+2532 MLME_DATA_SAVE_UNKNOWN_KEY_TYPE
+2533 MLME_STA_RECORD_ADD_2
+2534 MLME_STA_RECORD_PAUSE
+2535 MLME_STA_RECORD_RESUME
+2536 MLME_STA_RECORD_MOVE
+2537 MLME_DATA_NO_AVAILABLE_VIF
+2538 MLME_DATA_ADD_VIF_FAILED_1
+2539 MLME_DATA_ADD_VIF_FAILED_3
+253a MLME_DATA_ADD_VIF_FAILED_4
+253b MLME_STA_RECORD_CLEAR
+253c MLME_STA_RECORDS_EXIST
+253d MLME_STA_RECORD_DELETE_WRONG_OWNER
+2560 MLME_MEASUREMENTS_FRAME_SZ_WRONG
+2580 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_WITH_VIX
+2581 MLME_REQUESTS_TEST_PANIC
+2582 MLME_REQUESTS_INVALID_STATE_IN_ADD_VIF
+2583 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_NULL_VIX
+25a0 MLME_ROAMING_IES_SZ_WRONG
+25a1 MLME_ROAMING_LOGGING_IE_SZ_WRONG
+25c2 MLME_SCAN_INTERNAL_DATA_CORRUPTED
+25c3 MLME_SCAN_NO_SCANNERS
+25c4 MLME_SCAN_PID_TO_INSTANCE_FAILED
+25c5 MLME_SCAN_MIB_FAIL
+25c6 MLME_SCAN_CHANNEL_ZERO_FREQ
+25d0 MLME_TDLS_INVALID_DTIM_PERIOD
+25d1 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_1
+25d2 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_2
+25d3 MLME_TDLS_INVALID_TERMINATE_LINK
+25d4 MLME_TDLS_INVALID_TERMINATE_LINK_SETUP
+25d5 MLME_TDLS_INVALID_CONFIRM
+25d6 MLME_TDLS_MAX_SLOTS_EXCEEDED
+25e0 MLME_VIFCTRL_DMS_IES_SZ_WRONG_1
+25e1 MLME_VIFCTRL_DMS_IES_SZ_WRONG_2
+25e2 MLME_VIFCTRL_DMS_IES_SZ_WRONG_3
+25e3 MLME_VIFCTRL_DMS_IES_SZ_WRONG_4
+25e4 MLME_VIFCTRL_DMS_IES_SZ_WRONG_5
+25e5 MLME_VIFCTRL_DMS_IES_SZ_WRONG_6
+25e6 MLME_VIFCTRL_DMS_IES_SZ_WRONG_7
+25e7 MLME_VIFCTRL_CHANNEL_SWITCH_NO_STA_RECORD
+25e8 MLME_VIFCTRL_TEARDOWN_BITMAP_OVERFLOW
+25e9 MLME_VIFCTRL_SEND_FRAME_INVALID_CHANNEL_FREQ
+25ea MLME_VIFCTRL_OBSS_SCAN_IES_SIZE_WRONG
+25eb MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_1
+25ec MLME_VIFCTRL_PACKET_FILTER_IES_TOO_LONG
+25ed MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_MODE
+25f0 MLME_SECURITY_EAPOL_PEER_NOT_FOUND
+25f1 MLME_SECURITY_FILTER_OVERFLOW
+25f2 MLME_SECURITY_EAPOL_REPLY_TYPE_INVALID
+2600 MLME_VIFCTRL_FILTER_OVERFLOW_1
+2601 MLME_VIFCTRL_FILTER_OVERFLOW_2
+2602 MLME_VIFCTRL_FILTER_OVERFLOW_3
+2603 MLME_VIFCTRL_FILTER_OVERFLOW_4
+2604 MLME_VIFCTRL_FILTER_OVERFLOW_5
+2605 MLME_VIFCTRL_FILTER_OVERFLOW_6
+2606 MLME_VIFCTRL_FILTER_OVERFLOW_7
+2607 MLME_VIFCTRL_FILTER_OVERFLOW_8
+2608 MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_2
+2610 MLME_MBULK_IS_NULL
+2611 MLME_MBULK_ADDRESS_IS_NULL
+2620 MLME_MPDU_VIX_REGISTRATION_FAILED_1
+2621 MLME_MPDU_VIX_REGISTRATION_FAILED_2
+2630 MLME_FRAMES_FRAME_SZ_WRONG
+2631 MLME_FRAMES_INVALID_FRAME_TYPE_1
+2632 MLME_FRAMES_INVALID_FRAME_TYPE_2
+2633 MLME_FRAME_ADDR_DS_MODE_UNSUPPORTED
+2634 MLME_FRAME_APPEND_OOB
+2635 MLME_FRAME_EAPOL_INVALID_FRAME_TYPE
+2636 MLME_FRAME_BUILD_INC_SZ_MISMATCH
+2640 MLME_NAN_SCAN_IES_SIZE_WRONG
+2641 MLME_NAN_FRAME_SZ_WRONG_1
+2642 MLME_NAN_INVALID_NAN_FRAME
+2643 MLME_NAN_INITIAL_CHANNEL_CFG_FAILED
+2644 MLME_NAN_NUM_OF_SDA_OVERFLOW
+2645 MLME_NAN_SDF_WITH_NO_PAYLOAD
+2646 MLME_NAN_RAME_MM_CFM_NOT_RECEIVED
+2647 MLME_NAN_INVALID_CLUSTER_MERGE_STATE
+2649 MLME_NAN_FRAME_SZ_WRONG_3
+264a MLME_NAN_FRAME_SZ_WRONG_4
+264c MLME_NAN_FRAME_SZ_WRONG_6
+264e MLME_FSM_PID_ALREADY_IN_USE_11
+2650 MLME_API_STATION_RECORD_DOES_NOT_EXIST_1
+2651 MLME_API_STATION_RECORD_DOES_NOT_EXIST_2
+2652 MLME_API_STATION_RECORD_DOES_NOT_EXIST_3
+2653 MLME_API_INVALID_VIF
+2660 MLME_FTM_SCAN_IES_SIZE_WRONG
+2700 RADIO_RICE_RADIO_SETUP_FAILED
+2701 RADIO_RICE_ALREADY_SETUP
+2702 RADIO_RICE_BAD_CLOCK_FREQ
+2703 RADIO_RICE_IMM_ERROR
+2704 RADIO_RICE_RICE_ERROR
+2705 RADIO_RICE_MGR_FSM_ERROR
+2706 RADIO_RICE_RADIO_FSM_ERROR
+2707 RADIO_RICE_ILLEGAL_RECONFIGURE
+2708 RADIO_RICE_CONNECTION_CLASH
+2709 RADIO_RICE_FSM_CHANGE_PARAMS
+270a RADIO_RICE_FSM_INADEQUATE_TIME
+270b RADIO_RICE_BAD_ANTENNA_GAIN_SETTINGS
+2710 RADIO_HAL_BAD_FREQ_COMP_TABLE_TYPE
+2711 RADIO_HAL_BAD_TEMP_COMP_TABLE_TYPE
+2712 RADIO_HAL_BAD_SIG_GEN_WAVEFORM_TYPE
+2713 RADIO_HAL_BAD_SIG_GEN_LOCATION_TYPE
+2714 RADIO_HAL_UNKNOWN_TX_TRIM_TYPE
+2715 RADIO_HAL_UNKNOWN_TX_LOOPBACK_TYPE
+2716 RADIO_HAL_BAD_CONFIGURATION
+2717 RADIO_HAL_BAD_PATH_MUX_CONFIGURATION
+2718 RADIO_HAL_PATH_MUX_SETUP_FAILED
+2719 RADIO_HAL_PATH_MUX_MAP_INDETERMINATE
+271a RADIO_HAL_INTERNAL
+271b RADIO_HAL_INVALID_RADIO_ID
+271c RADIO_HAL_BAD_RAMSW_REC
+271d RADIO_NOT_ENOUGH_SRAM_FOR_PLAYBACK_SIGNAL
+271e RADIO_PLAYBACK_FAILED
+271f RADIO_TOO_MANY_DPD_TRIM_FAILURES
+2720 RADIO_MIB_ERROR
+2721 RADIO_HAL_BAD_RAMSW_PLAY
+2722 RADIO_PHASE_COMPUTATION
+2723 RADIO_DPD_CALC_LOOPBACK_FAILED
+2724 RADIO_ILLEGAL_COMPLEX_DIVISION
+2725 RADIO_DPD_ALIGN_CAPTURE_FAIL
+2726 RADIO_HAL_BAD_CAPTURE_POINT_TX_RX_DEF
+2727 RADIO_TRIM_SETUP_ERROR
+2728 RADIO_NULL_REG_CACHE_PTR
+2729 RADIO_NULL_PTR
+272a RADIO_ILLEGAL_DIVISION
+272b RADIO_DEINIT_ALREADY_IN_PROGRESS
+272c RADIO_BAD_RF_CB_STATE
+272d RADIO_DPD_UNDEFINED_TRIM_STEP
+272e RADIO_RF_RX_DCOC_NULL_POINTER
+272f RADIO_REGISTER_LOG_VERIFY_FAIL
+2730 RADIO_INVALID_CALL_IN_IMM
+2731 RADIO_INVALID_CALL_IN_DPD_TRAIN
+2732 RADIO_UNKNOWN_BAND
+2733 RADIO_HAL_TOO_MANY_TX_GAIN_STEPS
+2734 RADIO_VCO_LOCK_FAILED
+2735 RADIO_PHY_FLEXIMAC_ST_INCONSISTENT
+2736 PA_SAT_IS_NULL
+2737 LARK_D00_INVALID_5G_FREQ
+2780 RADIO_HALMAC_FAILED_TO_INSTALL_MIB
+2781 RADIO_HALMAC_FAILED_TO_FIND_ROW
+2800 TEST_UNUSED
+2801 TEST_DPHPADPT_RX_OUT_OF_MBULKS
+2802 TEST_DPHPADPT_RX_UNEXPECTED_MPDU
+2803 TEST_DPHPADPT_RX_TOO_MANY_MPDUS_IN_AMPDU
+2810 TEST_MICRAME_BAD_RADIO_REQUEST
+2811 TEST_MICRAME_TX_QUEUE_EMPTY
+2812 TEST_MICRAME_TX_QUEUE_FULL
+2813 TEST_MICRAME_TX_NO_MEM_FOR_CANCEL
+2814 TEST_MICRAME_TX_BAD_PPDU_STATE
+2815 TEST_MICRAME_TX_BAD_MPDU_COUNT
+2816 TEST_MICRAME_TX_BAD_SLOT_STATE
+2817 TEST_MICRAME_TX_BAD_SLOT_COUNT
+2818 TEST_MICRAME_TX_BAD_MPDU_LEN
+2820 TEST_WLANLITE_MGR_FSM_ERROR
+2821 TEST_WLANLITE_LOAD_FRAME_PPDU_ALLOC
+2822 TEST_WLANLITE_INVALID_RADIO_ID
+2823 TEST_WLANLITE_INVALID_MAC_ID
+2824 TEST_WLANLITE_INVALID_RADIO_BITMAP
+2825 TEST_WLANLITE_BEAMFORMER
+2826 TEST_WLANLITE_CONN_FSM_ERROR
+2827 TEST_WLANLITE_DPHP_HW_LOCKUP
+2900 COEX_API_PERIODIC_EVENT_INVALID_ENTRY
+2910 COEX_STRAT_INIT_FAILURE
+2940 COEX_MAC_KA_BO_FAILURE
+2950 COEX_RAME_BAD_VIX
+2960 COEX_FLEXIMAC_INT_UNHANDLED
+2970 COEX_FLEXIMAC_INVALID_SEQ_NUM
+29ff COEX_LAST
+2a00 LOWER_MAC
+2a01 COMMON_HOSTIO_GENERIC
+2a02 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a03 COMMON_HOSTIO_VIRT_GENERIC
+2a04 COMMON_HOSTIO_VIRT_WLANLITE
+2a10 COMMON_PMALLOC_OUT_OF_MEMORY
+2a11 COMMON_PMALLOC_INVALID_MEMORY_CONFIG
+2a12 COMMON_PMALLOC_INVALID_POINTER
+2a13 COMMON_PMALLOC_MEMORY_EXHAUSTION
+2a20 COMMON_DEBUG_DWORD12_INVALID_PTR
+2a21 COMMON_DEBUG_DWORD12_SANITY_FAIL
+2a22 COMMON_DEBUG_SAP_TOO_LARGE_ALLOC_SZ
+2a23 COMMON_DEBUG_NOT_ALLOWED
+2a30 COMMON_SERVICE_FOS_RES_NOT_CLEANED
+2a31 COMMON_SERVICE_START_FAILED
+2a32 COMMON_SERVICE_STOP_FAILED
+2a33 COMMON_SERVICE_FOS_TASK_NOT_SCHEDULED
+2a34 COMMON_SERVICE_TOO_MANY_NON_RTOS_IRQ
+2a40 COMMON_FAULT_NOT_ALLOWED
+2a50 COMMON_HW_ILLEGAL_RESPONSE_RATE
+2a51 COMMON_RSA_OUT_OF_RANGE
+2a52 COMMON_LMIF_MAC_CONFIG_GENERIC
+2a60 COMMON_FSM_ALLOCATION_FAILURE
+2a61 COMMON_FSM_INVALID_SIGNAL
+2a62 COMMON_FSM_INVALID_PRIORITY
+2a63 COMMON_FSM_FAILURE
+2a64 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESS
+2a65 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESSOR
+2a66 COMMON_FSM_SIGNAL_TO_ENV
+2a67 COMMON_FSM_EMPTY_TIMER_LIST
+2a68 COMMON_FSM_LAST_NEXT_NOT_NULL
+2a69 COMMON_FSM_LAST_IS_NULL
+2a6a COMMON_FSM_CHANGE_NOT_ALLOWED_IN_INTERRUPT_CONTEXT
+2a6b COMMON_FSM_INVALID_PID
+2a6c COMMON_FSM_DATA_NOT_READY
+2a6d COMMON_FSM_INVALID_RADIO_ID_TO_PID
+2a6e COMMON_FSM_INVALID_SCHDL_ID_TO_PID
+2a6f COMMON_FSM_TOO_MANY_SAVED_OR_FORWARD_EVENTS
+2a70 COMMON_UTILS_DATA_UNIT
+2a71 COMMON_UTILS_MAKE_FRAME
+2a72 COMMON_UTILS_LINKED_LIST
+2a80 COMMON_MIB_ROM_CORRUPT
+2a81 COMMON_MIB_OVERRIDE
+2a82 COMMON_MIB_GETACTOS
+2aa0 COMMON_SHARED_DATA_VIF_INVALID_ACCESS
+2aa1 COMMON_SHARED_DATA_VIF_STA_INVALID_ACCESS
+2aa2 COMMON_SHARED_DATA_VIF_AP_INVALID_ACCESS
+2aa3 COMMON_SHARED_DATA_VIF_NAN_INVALID_ACCESS
+2aa4 COMMON_SHARED_DATA_VIF_SCAN_INVALID_ACCESS
+2aa5 COMMON_SHARED_DATA_STA_INVALID_ACCESS
+2aa6 COMMON_SHARED_DATA_MISSING_CALLBACK
+2aa7 COMMON_SHARED_DATA_VIF_FTM_INVALID_ACCESS
+2aa8 COMMON_SHARED_DATA_DU_INVALID_ACCESS
+2aa9 COMMON_SHARED_DATA_CALLBACKS_ALREADY_TRIGGERED
+2aaa COMMON_SHARED_DATA_VIF_FTM_INVALID_BW
+2ab0 COMMON_PACKET_FILTER_GENERIC
+2ab1 COMMON_PACKET_FILTER_INVALID_PID
+2ab2 COMMON_PACKET_FILTER_LIST_HEAD_IS_NOT_NULL
+2ab3 COMMON_PACKET_FILTER_NOT_ALL_FILTERS_DELETED
+2ab4 COMMON_PACKET_FILTER_INVALID_PARAMETERS
+2ab5 COMMON_PACKET_FILTER_INSUFFICIENT_RESOURCE
+2ac0 COMMON_SMAPPER_GENERIC
+2ad0 COMMON_MBULK_GENERIC
+2ad1 COMMON_MBULK_CHAIN_ALREADY_HEAD_SET
+2ad2 COMMON_MBULK_CHAIN_CANNOT_RECLAIM_AS_USED
+2ad3 COMMON_MBULK_CHAIN_EXPECTED
+2ad4 COMMON_MBULK_CHAIN_WRITE_LEN_TOO_LARGE
+2ad5 COMMON_MBULK_DAT_AT_OFFSET_OUTSIDE_DATA
+2ad6 COMMON_MBULK_DAT_MOVE_OUTSIDE_DATA
+2ad7 COMMON_MBULK_DAT_MOVE_IS_READ_ONLY
+2ad8 COMMON_MBULK_DAT_ACCESS_NOT_ALLOWED
+2ad9 COMMON_MBULK_INVALID_POOL
+2ada COMMON_MBULK_MBULK_FREE_BUT_CHAINED
+2adb COMMON_MBULK_MSIGNAL_FREE_NO_SIGNAL
+2adc COMMON_MBULK_MSIGNAL_FREE_UNDER_DELIVERY
+2add COMMON_MBULK_POOL_CHECK_SANITY_FAILURE
+2ade COMMON_MBULK_INCORRECT_REFCNT
+2adf COMMON_MBULK_POOL_GET_FREE_OUTSIDE_POOL_MEMORY
+2ae0 COMMON_MBULK_POOL_GET_FREE_WRONG_OFFSET
+2ae1 COMMON_MBULK_POOL_NOT_4K_ALIGNED
+2ae2 COMMON_MBULK_POOL_PUT_AT_WRONG_OFFSET
+2ae3 COMMON_MBULK_POOL_PUT_NONE_IN_USE
+2ae4 COMMON_MBULK_POOL_PUT_OUTSIDE_POOL_MEMORY
+2ae5 COMMON_MBULK_RESIZE_EXCEEDS_DATA_BUFSIZ
+2ae6 COMMON_MBULK_SEG_DUPLICATE_RW
+2ae7 COMMON_MBULK_SEG_GENERIC_FREE_IN_OUTBOUND
+2ae8 COMMON_MBULK_SEG_GENERIC_FREE_NO_RETURN_TO_HOST
+2ae9 COMMON_MBULK_SEG_GENERIC_FREE_NOT_IN_USE
+2aea COMMON_MBULK_SEG_GENERIC_FREE_PTR_OUTSIDE_POOLS
+2aeb COMMON_MBULK_SEG_GENERIC_FREE_UNDER_DELIVERY
+2aec COMMON_MBULK_MULTIPLE_USERS
+2aed COMMON_MBULK_TOO_LARGE_SIZE_REQUESTED
+2aee COMMON_MBULK_TRIM_EXCEEDS_ACTUAL_DATA_LEN
+2aef COMMON_MBULK_SMAPPER_OP_NOT_SUPPORTED
+2af0 COMMON_GENERIC_EDP
+2af1 COMMON_GENERIC_RESET
+2af2 COMMON_CACHE_UNALIGNED_ADDR
+2af3 COMMON_MBULK_SMAPPER_FREE_NON_SMAPPER_MBULK
+2af4 COMMON_FSMLITE_GENERIC
+2aff COMMON_PLACEHOLDER_PLACEHOLDER_MAX
+mibkey 543
+0000 MIBKEY_NULL
+0001 DOT11RSNASTATSSTAADDRESS
+03ef UNIFIAPOLBCINTERVAL
+03f9 UNIFIDNSSUPPORTACTIVATED
+0401 UNIFIOFFCHANNELSCHEDULETIMEOUT
+040b UNIFIFRAMERESPONSETIMEOUT
+0069 DOT11RSNASTATSROBUSTMGMTCCMPREPLAYS
+041b UNIFICONNECTIONFAILURETIMEOUT
+042b UNIFICONNECTINGPROBETIMEOUT
+0439 UNIFIDISCONNECTTIMEOUT
+0449 UNIFIFRAMERESPONSECFMTXLIFETIMETIMEOUT
+0451 UNIFIFRAMERESPONSECFMFAILURETIMEOUT
+0459 UNIFIFORCEACTIVEDURATION
+0469 UNIFIMLMESCANMAXNUMBEROFPROBESETS
+046f UNIFIMLMESCANSTOPIFLESSTHANXFRAMES
+0477 UNIFIAPASSOCIATIONTIMEOUT
+0481 UNIFIHOSTNUMANTENNACONTROLACTIVATED
+0489 UNIFIMLMESTATIONINACTIVITYTIMEOUT
+0491 UNIFIMLMECLIINACTIVITYTIMEOUT
+0499 UNIFIMLMESTATIONINITIALKICKTIMEOUT
+04a1 UNIFIUARTCONFIGURE
+04a7 UNIFIUARTPIOS
+04ad UNIFICRYSTALFREQUENCYTRIM
+04b7 UNIFIENABLEDORM
+0079 DOT11TDLSPEERUAPSDINDICATIONWINDOW
+04bf UNIFIEXTERNALCLOCKDETECT
+04c7 UNIFIEXTERNALFASTCLOCKREQUEST
+04cf UNIFIWATCHDOGTIMEOUT
+04db UNIFIOVERRIDEEDCAPARAMACTIVATED
+04e3 UNIFIEXTERNALFASTCLOCKREQUESTPIO
+04ed UNIFIRXDATARATE
+04f5 UNIFIRSSI
+04fd UNIFILASTBSSRSSI
+0503 UNIFISNR
+0081 DOT11ASSOCIATIONSAQUERYMAXIMUMTIMEOUT
+050b UNIFILASTBSSSNR
+0511 UNIFISWTXTIMEOUT
+0519 UNIFIHWTXTIMEOUT
+0523 UNIFITXDATARATE
+052b UNIFISNREXTRAOFFSETCCK
+0533 UNIFIRSSIMAXAVERAGINGPERIOD
+053f UNIFIRSSIMINRECEIVEDFRAMES
+0549 UNIFILASTBSSTXDATARATE
+054f UNIFIDISCARDEDFRAMECOUNT
+0557 UNIFIMACRAMEDEBUGSTATS
+0561 UNIFICURRENTTSFTIME
+0569 UNIFIBARXENABLETID
+0573 UNIFIBATXENABLETID
+057d UNIFITRAFFICTHRESHOLDTOSETUPBA
+0587 UNIFIDPLANETXAMSDUHWCAPABILITY
+058f UNIFIDPLANETXAMSDUSUBFRAMECOUNTMAX
+059f UNIFIBACONFIG
+05ab UNIFIBATXMAXNUMBER
+05b3 UNIFIMOVEBKTOBE
+05b9 UNIFIBEACONRECEIVED
+0093 DOT11ASSOCIATIONSAQUERYRETRYTIMEOUT
+05c1 UNIFIPSLEAKYAP
+05cb UNIFITQAMACTIVATED
+05d3 UNIFIOUTPUTRADIOINFOTOKERNELLOG
+05db UNIFINOACKACTIVATIONCOUNT
+05e3 UNIFIRXFCSERRORCOUNT
+05eb UNIFIBEACONSRECEIVEDPERCENTAGE
+05f7 UNIFIARPDETECTACTIVATED
+05ff UNIFIARPDETECTRESPONSECOUNTER
+0609 UNIFIENABLEMGMTTXPACKETSTATS
+0613 UNIFIQUEUESTATSENABLE
+061d UNIFIDPDMASTERSWITCH
+0629 UNIFIGOOGLEMAXNUMBEROFPERIODICSCANS
+062f UNIFIGOOGLEMAXRSSISAMPLESIZE
+0635 UNIFIGOOGLEMAXHOTLISTAPS
+063b UNIFIGOOGLEMAXSIGNIFICANTWIFICHANGEAPS
+0641 UNIFIGOOGLEMAXBSSIDHISTORYENTRIES
+0647 UNIFIMACBEACONTIMEOUT
+0651 UNIFIMIFOFFALLOWED
+0659 UNIFIBLOCKSCANAFTERNUMSCHEDVIF
+00a3 DOT11RTSTHRESHOLD
+0663 UNIFISTAUSESONEANTENNAWHENIDLE
+066b UNIFISTAUSESMULTIANTENNASDURINGCONNECT
+0673 UNIFIAPUSESONEANTENNAWHENPEERSIDLE
+067d DEPRECATED_UNIFIUPDATEANTENNACAPABILITIESWHENSCANNING
+0685 UNIFIPREFERREDANTENNABITMAP
+068f UNIFIMAXCONCURRENTMACS
+0697 UNIFIROAMDEAUTHREASON
+069f UNIFIROAMTRACKINGSCANPERIOD
+426f UNIFIROAMCUFACTOR
+429f UNIFIROAMCUSCANTRIGGER
+42ad UNIFIROAMRSSIBOOST
+42b9 UNIFIROAMRSSIFACTOR
+06ad UNIFIROAMCULOCAL
+42ef UNIFIRXEXTERNALGAINFREQUENCY
+42ff UNIFIRXEXTERNALGAIN
+430d UNIFIRXRSSIADJUSTMENTS
+4319 UNIFISARBACKOFF
+433f UNIFISCANPARAMETERS
+06bb UNIFIROAMCUSCANNOCANDIDATEDELTATRIGGER
+06c9 UNIFIROAMAPSELECTDELTAFACTOR
+06d7 UNIFIROAMCUWEIGHT
+44d5 UNIFISTATICDPDGAIN
+44e1 UNIFITHROUGHPUTDEBUG
+44eb UNIFITXANTENNACONNECTIONLOSSFREQUENCY
+06e5 UNIFIROAMRSSIWEIGHT
+44fb UNIFITXANTENNACONNECTIONLOSS
+4509 UNIFITXANTENNAMAXGAINFREQUENCY
+4519 UNIFITXANTENNAMAXGAIN
+4527 UNIFITXDETECTORFREQUENCYCOMPENSATION
+4535 UNIFITXDETECTORTEMPERATURECOMPENSATION
+4543 UNIFITXFTRIMSETTINGS
+4551 UNIFITXGAINSETTINGS
+455f UNIFITXGAINSTEPSETTINGS
+456d UNIFITXOOBCONSTRAINTS
+457b UNIFITXOPENLOOPFREQUENCYCOMPENSATION
+06f3 UNIFIROAMBSSLOADMONITORINGFREQUENCY
+4589 UNIFITXOPENLOOPTEMPERATURECOMPENSATION
+4597 UNIFITXPAGAINDPDFREQUENCYCOMPENSATION
+45a5 UNIFITXPAGAINDPDTEMPERATURECOMPENSATION
+45b3 UNIFITXPOWERDETECTORRESPONSE
+45c1 UNIFITXPOWERTRIMCONFIG
+45cd UNIFITXSETTINGS
+0701 UNIFIROAMBLACKLISTSIZE
+070f UNIFICUMEASUREMENTINTERVAL
+071f UNIFICURRENTBSSNSS
+0727 UNIFIAPMIMOUSED
+072f UNIFIROAMEAPOLTIMEOUT
+00b9 DOT11SHORTRETRYLIMIT
+073d UNIFIROAMINGCOUNT
+0745 UNIFIROAMINGAKM
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+0753 UNIFICURRENTBSSCHANNELFREQUENCY
+0759 UNIFILOGGERENABLED
+0761 UNIFIMAPACKETFATEENABLED
+076b UNIFISTAVIFLINKNSS
+0773 UNIFILAANSSSPECULATIONINTERVALSLOTTIME
+0781 UNIFILAANSSSPECULATIONINTERVALSLOTMAXNUM
+078d UNIFILAABWSPECULATIONINTERVALSLOTTIME
+079b UNIFILAABWSPECULATIONINTERVALSLOTMAXNUM
+07a7 UNIFILAAMCSSPECULATIONINTERVALSLOTTIME
+07b5 UNIFILAAMCSSPECULATIONINTERVALSLOTMAXNUM
+07c1 UNIFILAAGISPECULATIONINTERVALSLOTTIME
+07cf UNIFILAAGISPECULATIONINTERVALSLOTMAXNUM
+07db UNIFILAATXDIVERSITYBEAMFORMENABLED
+07e7 UNIFILAATXDIVERSITYBEAMFORMMINMCS
+00cb DOT11LONGRETRYLIMIT
+07f3 UNIFILAATXDIVERSITYFIXMODE
+07ff UNIFILAAPROTECTIONCONFIGOVERRIDE
+0809 UNIFICSRONLYEIFSDURATION
+0811 UNIFIOVERRIDEDEFAULTBETXOPFORHT
+081b UNIFIOVERRIDEDEFAULTBETXOP
+0825 UNIFIRXABBTRIMSETTINGS
+082d UNIFIRADIOTRIMSENABLE
+0839 UNIFIHARDWAREPLATFORM
+0841 UNIFIFORCECHANNELBW
+084b UNIFIDPDTRAININGDURATION
+0855 UNIFITXPOWERTRIMCOMMONCONFIG
+0863 UNIFIIQDEBUGENABLED
+086b UNIFICOEXDEBUGOVERRIDEBT
+0873 UNIFILTEMAILBOX
+087d UNIFILTEMWSSIGNAL
+0885 UNIFILTEENABLECHANNELAVOIDANCE
+088d UNIFILTEENABLEPOWERBACKOFF
+0895 UNIFILTEENABLETIMEDOMAIN
+089d UNIFILTEENABLELTECOEX
+00dd DOT11FRAGMENTATIONTHRESHOLD
+08a5 UNIFILTEBAND40POWERBACKOFFCHANNELS
+08b5 UNIFILTEBAND40POWERBACKOFFRSRPLOW
+08c5 UNIFILTEBAND40POWERBACKOFFRSRPHIGH
+08d5 UNIFILTEBAND40POWERBACKOFFRSRPAVERAGINGALPHA
+08dd UNIFILTESETCHANNEL
+08e5 UNIFILTESETPOWERBACKOFF
+08ed UNIFILTESETTDDDEBUGMODE
+08f5 UNIFILTEBAND40AVOIDCHANNELS
+0905 UNIFILTEBAND41AVOIDCHANNELS
+0915 UNIFILTEBAND7AVOIDCHANNELS
+0925 UNIFIAPSCANABSENCEDURATION
+092d UNIFIAPSCANABSENCEPERIOD
+0935 UNIFIMLMESTAKEEPALIVETIMEOUTCHECK
+0941 UNIFIMLMEAPKEEPALIVETIMEOUTCHECK
+094d UNIFIMLMEGOKEEPALIVETIMEOUTCHECK
+0959 UNIFIBSSMAXIDLEPERIOD
+0967 UNIFISTAIDLEMODEENABLED
+0971 UNIFIFASTPOWERSAVETIMEOUTAGGRESSIVE
+00f3 DOT11RTSSUCCESSCOUNT
+0981 UNIFIIDLEMODELISTENINTERVALSKIPPINGDTIM
+0997 UNIFIIDLEMODEP2PLISTENINTERVALSKIPPINGDTIM
+09a9 UNIFIAPIDLEMODEENABLED
+09b3 UNIFIFASTPOWERSAVETIMEOUT
+0019 DOT11RSNASTATSTKIPLOCALMICFAILURES
+09c5 UNIFIFASTPOWERSAVETIMEOUTSMALL
+09d5 UNIFIMLMESTAKEEPALIVETIMEOUT
+09e1 UNIFIMLMEAPKEEPALIVETIMEOUT
+09ed UNIFIMLMEGOKEEPALIVETIMEOUT
+09f9 UNIFISTAROUTERADVERTISEMENTMINIMUMINTERVALTOFORWARD
+0a09 UNIFIROAMCONNECTIONQUALITYCHECKWAITAFTERCONNECT
+0a13 UNIFIAPBEACONMAXDRIFT
+0a1d UNIFIBSSMAXIDLEPERIODACTIVATED
+0103 DOT11ACKFAILURECOUNT
+0a25 UNIFIVIFIDLEMONITORTIME
+0a31 UNIFIDISABLELEGACYPOWERSAVE
+0a39 UNIFIDEBUGFORCEACTIVE
+0a41 UNIFISTATIONACTIVITYIDLETIME
+0a4b UNIFIDMSACTIVATED
+0a53 UNIFIPOWERMANAGEMENTDELAYTIMEOUT
+0a63 UNIFIAPSDSERVICEPERIODTIMEOUT
+0a71 UNIFICONCURRENTPOWERMANAGEMENTDELAYTIMEOUT
+0a81 UNIFISTATIONQOSINFO
+0a89 UNIFILISTENINTERVALSKIPPINGDTIM
+0a9f UNIFILISTENINTERVAL
+0aad UNIFILEGACYPSPOLLTIMEOUT
+0abb UNIFIBEACONSKIPPINGCONTROL
+0113 DOT11MULTICASTRECEIVEDFRAMECOUNT
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+2430 unifiLteMailbox
+2431 unifiLteMwsSignal
+2432 unifiLteEnableChannelAvoidance
+2433 unifiLteEnablePowerBackoff
+2434 unifiLteEnableTimeDomain
+2435 unifiLteEnableLteCoex
+2436 unifiLteBand40PowerBackoffChannels
+2437 unifiLteBand40PowerBackoffRsrpLow
+2438 unifiLteBand40PowerBackoffRsrpHigh
+2439 unifiLteBand40PowerBackoffRsrpAveragingAlpha
+2440 unifiLteSetChannel
+2441 unifiLteSetPowerBackoff
+2442 unifiLteSetTddDebugMode
+2443 unifiLteBand40AvoidChannels
+2444 unifiLteBand41AvoidChannels
+2445 unifiLteBand7AvoidChannels
+2480 unifiAPScanAbsenceDuration
+2481 unifiAPScanAbsencePeriod
+2485 unifiMLMESTAKeepAliveTimeoutCheck
+2486 unifiMLMEAPKeepAliveTimeoutCheck
+2487 unifiMLMEGOKeepAliveTimeoutCheck
+2488 unifiBSSMaxIdlePeriod
+2493 unifiSTAIdleModeEnabled
+2494 unifiFastPowerSaveTimeOutAggressive
+2495 unifiIdlemodeListenIntervalSkippingDTIM
+2496 unifiIdlemodeP2PListenIntervalSkippingDTIM
+2497 unifiAPIdleModeEnabled
+2500 unifiFastPowerSaveTimeout
+2501 unifiFastPowerSaveTimeOutSmall
+2502 unifiMLMESTAKeepAliveTimeout
+2503 unifiMLMEAPKeepAliveTimeout
+2504 unifiMLMEGOKeepAliveTimeout
+2505 unifiSTARouterAdvertisementMinimumIntervalToForward
+2506 unifiRoamConnectionQualityCheckWaitAfterConnect
+2507 unifiApBeaconMaxDrift
+2508 unifiBSSMaxIdlePeriodActivated
+2509 unifiVifIdleMonitorTime
+2510 unifiDisableLegacyPowerSave
+2511 unifiDebugForceActive
+2512 unifiStationActivityIdleTime
+2513 unifiDmsActivated
+2514 unifiPowerManagementDelayTimeout
+2515 unifiAPSDServicePeriodTimeout
+2516 unifiConcurrentPowerManagementDelayTimeout
+2517 unifiStationQosInfo
+2518 unifiListenIntervalSkippingDTIM
+2519 unifiListenInterval
+2520 unifiLegacyPsPollTimeout
+2521 unifiBeaconSkippingControl
+2522 unifiTogglePowerDomain
+2523 unifiP2PListenIntervalSkippingDTIM
+2524 unifiFragmentationDuration
+2526 unifiIdleModeLiteEnabled
+2527 unifiIdleModeEnabled
+2529 unifiDTIMWaitTimeout
+2530 unifiListenIntervalMaxTime
+2531 unifiScanMaxProbeTransmitLifetime
+2532 unifiPowerSaveTransitionPacketThreshold
+2533 unifiProbeResponseLifetime
+2534 unifiProbeResponseMaxRetry
+2535 unifiTrafficAnalysisPeriod
+2536 unifiAggressivePowerSaveTransitionPeriod
+2537 unifiActiveTimeAfterMoreBit
+2538 unifiDefaultDwellTime
+2540 unifiVhtCapabilities
+2541 unifiMAXVifScheduleDuration
+2542 unifiVifLongIntervalTime
+2543 unifiDisallowSchedRelinquish
+2544 unifiRameDplaneOperationTimeout
+2545 unifiDebugKeepRadioOn
+2546 unifiForceFixedDurationSchedule
+2547 unifiRameUpdateMibs
+2548 unifiGOScanAbsenceDuration
+2549 unifiGOScanAbsencePeriod
+2550 unifiMaxClient
+2556 unifiTdlsInP2pActivated
+2558 unifiTdlsActivated
+2559 unifiTdlsTPThresholdPktSecs
+2560 unifiTdlsRssiThreshold
+2561 unifiTdlsMaximumRetry
+2562 unifiTdlsTPMonitorSecs
+2563 unifiTdlsBasicHtMcsSet
+2564 unifiTdlsBasicVhtMcsSet
+2565 dot11TDLSDiscoveryRequestWindow
+2566 dot11TDLSResponseTimeout
+2567 dot11TDLSChannelSwitchActivated
+2568 unifiTdlsDesignForTestMode
+2569 unifiTdlsWiderBandwidthProhibited
+2577 unifiTdlsKeyLifeTimeInterval
+2578 unifiTdlsTeardownFrameTxTimeout
+2580 unifiWifiSharingActivated
+2582 unifiWiFiSharing5GHzChannel
+2583 unifiWifiSharingChannelSwitchCount
+2584 unifiChannelAnnouncementCount
+2585 unifiRATestStoredSA
+2586 unifiRATestStoreFrame
+2587 dot11TDLSPeerUAPSDBufferSTAActivated
+2600 unifiProbeResponseLifetimeP2P
+2601 unifiStaChannelSwitchSlowApActivated
+2604 unifiStaChannelSwitchSlowApMaxTime
+2605 unifiStaChannelSwitchSlowApPollInterval
+2606 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+2607 unifiMLMEScanMaxAerials
+2650 unifiAPFActivated
+2651 unifiAPFVersion
+2652 unifiAPFMaxSize
+2653 unifiAPFActiveModeEnabled
+4001 unifiCSROnlyMIBShield
+4071 unifiPrivateBbbTxFilterConfig
+4075 unifiPrivateSWAGCFrontEndGain
+4076 unifiPrivateSWAGCFrontEndLoss
+4077 unifiPrivateSWAGCExtThresh
+4078 unifiCSROnlyPowerCalDelay
+4079 unifiRxAgcControl
+4130 deprecated_unifiWapiQosMask
+4139 unifiWMMStallEnable
+4148 unifiRaaTxHostRate
+4149 unifiFallbackShortFrameRetryDistribution
+4150 unifiRXTHROUGHPUTLOW
+4151 unifiRXTHROUGHPUTHIGH
+4152 unifiSetFixedAMPDUAggregationSize
+4153 unifiThroughputDebugReportInterval
+4154 unifiDplaneTest1
+4155 unifiDplaneTest2
+4156 unifiDplaneTest3
+4157 unifiDplaneTest4
+4171 unifiPreEBRTWindow
+4173 unifiPostEBRTWindow
+4179 unifiPsPollThreshold
+430 dot11RSNAStatsSTAAddress
+433 dot11RSNAStatsTKIPICVErrors
+434 dot11RSNAStatsTKIPLocalMICFailures
+435 dot11RSNAStatsTKIPRemoteMICFailures
+436 dot11RSNAStatsCCMPReplays
+437 dot11RSNAStatsCCMPDecryptErrors
+438 dot11RSNAStatsTKIPReplays
+441 dot11RSNAStatsRobustMgmtCCMPReplays
+5000 unifiSableContainerSizeConfiguration
+5001 unifiSableFrameLogMode
+5002 unifiSableFrameLogCpuThresPercent
+5003 unifiSableFrameLogCpuOverheadPercent
+5010 unifiDebugSVCModeStackHighWaterMark
+5023 unifiOverrideEDCAParamBE
+5024 unifiOverrideEDCAParamBEEnable
+5026 unifiPanicSubSystemControl
+5027 unifiFaultEnable
+5028 unifiFaultSubSystemControl
+5029 unifiDebugModuleControl
+5030 unifiTxUsingLdpcActivated
+5031 unifiTxSettings
+5032 unifiTxGainSettings
+5033 unifiTxAntennaConnectionLossFrequency
+5034 unifiTxAntennaConnectionLoss
+5035 unifiTxAntennaMaxGainFrequency
+5036 unifiTxAntennaMaxGain
+5037 unifiRxExternalGainFrequency
+5038 unifiRxExternalGain
+5040 unifiTxSGI20Activated
+5041 unifiTxSGI40Activated
+5042 unifiTxSGI80Activated
+5043 unifiTxSGI160Activated
+5044 unifiMacAddressRandomisation
+5047 unifiMacAddressRandomisationMask
+5050 unifiWipsActivated
+5054 unifiRfTestModeActivated
+5055 unifiTxPowerDetectorResponse
+5056 unifiTxDetectorTemperatureCompensation
+5057 unifiTxDetectorFrequencyCompensation
+5058 unifiTxOpenLoopTemperatureCompensation
+5059 unifiTxOpenLoopFrequencyCompensation
+5060 unifiTxOfdmSelect
+5061 unifiTxDigGain
+5062 unifiChipTemperature
+5063 UnifiBatteryVoltage
+5064 unifiTxOOBConstraints
+5066 unifiTxPaGainDpdTemperatureCompensation
+5067 unifiTxPaGainDpdFrequencyCompensation
+5072 unifiTxPowerTrimConfig
+5080 unifiForceShortSlotTime
+5081 unifiTxGainStepSettings
+5082 unifiDebugDisableRadioNannyActions
+5083 unifiRxCckModemSensitivity
+5084 unifiDpdPerBandwidth
+5085 unifiBBVersion
+5086 unifiRFVersion
+5087 unifiReadHardwareCounter
+5088 unifiClearRadioTrimCache
+5089 unifiRadioTXSettingsRead
+5090 unifiModemSgiOffset
+5091 unifiRadioTxPowerOverride
+5092 unifiRxRadioCsMode
+5093 unifiRxPriEnergyDetThreshold
+5094 unifiRxSecEnergyDetThreshold
+5095 unifiAgcThresholds
+5096 unifiRadioRXSettingsRead
+5097 unifiStaticDpdGain
+5098 unifiIQBufferSize
+5099 unifiNarrowbandCCAThresholds
+5100 unifiRadioCCADebug
+5101 unifiCCACSThresh
+5102 unifiCCAMasterSwitch
+5103 unifiRxSyncCCACfg
+5104 unifiMacCCABusyTime
+5105 unifiMacSecChanClearTime
+5106 unifiDpdDebug
+5107 unifiNarrowbandCCADebug
+5109 unifiNannyTemperatureReportDelta
+5110 unifiNannyTemperatureReportInterval
+5111 unifiRadioRxDcocDebugIqValue
+5112 unifiRadioRxDcocDebug
+5113 unifiNannyRetrimDpdMod
+5114 unifiDisableDpdSubIteration
+5115 unifiRxRssiAdjustments
+5116 unifiFleximacCcaEdEnable
+5117 unifiRadioTxIqDelay
+5118 unifiDisableLNABypass
+5200 unifiEnableFlexiMacWatchdog
+53 dot11TDLSPeerUAPSDIndicationWindow
+5300 unifiRttCapabilities
+5301 unifiFtmMinDeltaFrames
+5302 unifiFtmPerBurst
+5303 unifiFtmBurstDuration
+5304 unifiFtmNumOfBurstsExponent
+5305 unifiFtmASAPModeActivated
+5306 unifiFtmResponderActivated
+5307 unifiFtmDefaultSessionEstablishmentTimeout
+5308 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+5309 unifiFtmDefaultGapBetweenBursts
+5310 unifiFtmDefaultTriggerDelay
+5311 unifiFtmDefaultEndBurstDelay
+5312 unifiFtmRequestValidationEnabled
+5313 unifiFtmResponseValidationEnabled
+5314 unifiFtmUseResponseParameters
+5315 unifiFtmInitialResponseTimeout
+5320 unifiFtmDSPInpBW
+5321 unifiFtmOFDMCutOffset
+5322 unifiFtmMeanAroundCluster
+5410 unifiMLMEScanContinueIfMoreThanXAps
+5411 unifiMLMEScanStopIfLessThanXNewAps
+5412 unifiScanMultiVifActivated
+5413 unifiScanNewAlgorithmActivated
+6010 unifiUnsyncVifLnaEnabled
+6011 unifiTPCMinPower2GMIMO
+6012 unifiTPCMinPower5GMIMO
+6013 unifiLnaControlEnabled
+6014 unifiLnaControlRssiThresholdLower
+6015 unifiLnaControlRssiThresholdUpper
+6016 unifiPowerIsGrip
+6018 unifiLowPowerRxConfig
+6019 unifiTPCEnabled
+6020 unifiCurrentTxpowerLevel
+6021 unifiUserSetTxpowerLevel
+6022 unifiTPCMaxPowerRSSIThreshold
+6023 unifiTPCMinPowerRSSIThreshold
+6024 unifiTPCMinPower2G
+6025 unifiTPCMinPower5G
+6026 unifiSarBackoff
+6027 unifiTPCUseAfterConnectRsp
+6028 unifiRadioLpRxRssiThresholdLower
+6029 unifiRadioLpRxRssiThresholdUpper
+6032 unifiTestTxPowerEnable
+6033 unifiLteCoexMaxPowerRSSIThreshold
+6034 unifiLteCoexMinPowerRSSIThreshold
+6035 unifiLteCoexPowerReduction
+6050 unifiPMFAssociationComebackTimeDelta
+6060 unifiTestTspecHack
+6061 unifiTestTspecHackValue
+6069 unifiDebugInstantDelivery
+6071 unifiDebugEnable
+6073 unifiDPlaneDebug
+6080 unifiNANActivated
+6081 unifiNANBeaconCapabilities
+6082 unifiNANMaxConcurrentClusters
+6083 unifiNANMaxConcurrentPublishes
+6084 unifiNANMaxConcurrentSubscribes
+6085 unifiNANMaxServiceNameLength
+6086 unifiNANMaxMatchFilterLength
+6087 unifiNANMaxTotalMatchFilterLength
+6088 unifiNANMaxServiceSpecificInfoLength
+6089 unifiNANMaxVSADataLength
+6090 unifiNANMaxMeshDataLength
+6091 unifiNANMaxNDIInterfaces
+6092 unifiNANMaxNDPSessions
+6093 unifiNANMaxAppInfoLength
+6094 unifiNANMatchExpirationTime
+6095 unifiNANDefaultScanDwellTime
+6096 unifiNANDefaultScanPeriod
+6097 unifiNANMaxChannelSwitchTime
+6098 unifiNANMacRandomisationActivated
+6100 hutsReadWriteDataElementInt32
+6101 hutsReadWriteDataElementBoolean
+6102 hutsReadWriteDataElementOctetString
+6103 hutsReadWriteTableInt16Row
+6104 hutsReadWriteTableOctetStringRow
+6105 hutsReadWriteRemoteProcedureCallInt32
+6107 hutsReadWriteRemoteProcedureCallOctetString
+6108 hutsReadWriteInternalAPIInt16
+6109 hutsReadWriteInternalAPIUint16
+6110 hutsReadWriteInternalAPIUint32
+6111 hutsReadWriteInternalAPIInt64
+6112 hutsReadWriteInternalAPIBoolean
+6113 hutsReadWriteInternalAPIOctetString
+6114 hutsReadWriteInternalAPIFixedSizeTableRow
+6115 hutsReadWriteInternalAPIVarSizeTableRow
+6116 hutsReadWriteInternalAPIFixSizeTableKey1Row
+6117 hutsReadWriteInternalAPIFixSizeTableKey2Row
+6118 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+6119 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+6120 hutsReadWriteInternalAPIFixSizeTableKeyRow
+6121 hutsReadWriteInternalAPIVarSizeTableKeyRow
+6122 unifiTestScanNoMedium
+6123 unifiDualBandConcurrency
+6124 unifiLoggerMaxDelayedEvents
+8011 unifiRegulatoryParameters
+8012 unifiSupportedChannels
+8013 unifiDefaultCountry
+8014 unifiCountryList
+8015 unifiOperatingClassParamters
+8016 unifiVifCountry
+8017 unifiNoCellMaxPower
+8018 unifiNoCellIncludedChannels
+8019 unifiRegDomVersion
+8020 unifiDefaultCountryWithoutCH12CH13
+8051 unifiReadReg
+# Generated From ../common/mib/mib.xml
+debug_ids 77
+0000 COMPRESSED_DEBUG
+0001 MLME_SCAN
+0002 FAULTS
+0003 MLME_CME
+0004 MLME_CONMGR
+0005 MLME_MIB
+0006 MLME_MPDU_ROUTER
+0007 MLME_REQUESTS
+0008 MLME_VIFCTRL
+0009 MLME_CONNECT
+000a MLME_DEVICE
+000b RICE
+000c RICE_SAP
+000d WLANLITE
+000e MACRAME_SCHDL
+000f PMALLOC
+0010 CME_MGMT
+0011 MACRAME_API_DPLANE
+0012 MLME_BA
+0013 MLME_DEPRECATED
+0014 MLME_AP
+0015 MLME_REGULATORY
+0016 MLME_NAN
+0017 HALRADIO
+0018 MLME_ROAMING
+0019 DATAPLANE
+001a VACANT1
+001b VACANT2
+001c CRYPTO
+001d COEX
+001e MACRAME_PS
+001f MACRAME_BLACKOUT
+0020 MLME_SA_QUERY
+0021 MLME_OFFCHANNEL
+0022 MLME_MEASUREMENTS
+0023 MLME_TDLS
+0024 MACRAME_BEACON
+0025 MACRAME_VIF
+0026 MACRAME_OXYGEN
+0027 MACRAME_CALIBRATION
+0028 MACRAME
+0029 MACRAME_TX
+002a MACRAME_API_COEX
+002b MLME
+002c MACRAME_RADIO
+002d MIB
+002e MACRAME_FILTER
+002f HALMAC
+0030 HALRADIO_CORE
+0031 RICE_RSSI
+0032 MACRAME_API_MLME
+0033 MACRAME_IDLE_AP
+0034 MLME_API_MACRAME
+0035 MLME_SECURITY
+0036 MLME_TXPOWER
+0037 PACKET_FILTER
+0038 MLME_WIFI_LOGGER
+0039 MACRAME_STATION
+003a HALRADIO_TX_DPD
+003b HALRADIO_TX_POW
+003c HALRADIO_TX_IQ
+003d HALRADIO_RX
+003e BIST
+003f MLME_FRAME
+0040 MLME_IE
+0041 HALRADIO_COEX_FEM
+0042 MLME_FTM
+0043 SMAPPER
+0044 MLME_API_DPLANE
+0045 MLME_FTM_RESP
+0046 MLME_SCAN_CHANNEL
+0047 LMIF
+0048 MLME_BASF
+0049 APF
+004a MLME_NDM
+004b MLME_NAM
+004c MACRAME_IDLE_STA
+# Generated From pmalloc/pmalloc_debug.xml
+trace_def 6
+000f 0000 PMALLOC_STATS 000a p1size p1blocks p1allocated p1max_allocated p1overflows p2size p2blocks p2allocated p2max_allocated p2overflows
+000f 0001 PMALLOC_MEM_SIZE 0003 pmalloc_begin pmalloc_end size
+000f 0002 PMALLOC_FSM_SIZE 0003 entry blocks size
+000f 0003 PMALLOC_FSM_CONTEXT_SIZE 0002 size count
+000f 0004 PMALLOC_HOSTIO_SIG_SIZE 000c s1id s1size s2id s2size s3id s3size s4id s4size s5id s5size s6id s6size
+000f 0005 PMALLOC_FSM_DATA_SIZE 0002 pid size
+# Generated From pmalloc/pmalloc_debug.xml
+trace_types 9
+PMALLOC_MEM_SIZE.pmalloc_begin Natural32
+PMALLOC_MEM_SIZE.pmalloc_end Natural32
+PMALLOC_MEM_SIZE.size Natural32
+PMALLOC_HOSTIO_SIG_SIZE.s1id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s2id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s3id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s4id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s5id SignalId
+PMALLOC_HOSTIO_SIG_SIZE.s6id SignalId
+# Generated From hal/halmac/halmac_debug.xml
+trace_def 3
+002f 0000 HALMAC_CCK_SENS_CONF 0006 sync_ratio_scan sync_ratio_normal sync_ratio_low cca_ratio_scan cca_ratio_normal cca_ratio_low
+002f 0001 HALMAC_CCK_SENS_WRITE 0007 sync_ratio_scan sync_ratio_normal sync_ratio_low cca_ratio_scan cca_ratio_normal cca_ratio_low mode_select
+002f 0002 HALMAC_MODEM_PATH_MAP_CONFIG 0003 frequency radio_bm modem_id
+# Generated From hal/halmac/halmac_debug.xml
+# Generated From hal/halradio/halradio_tx_dpd_debug.xml
+trace_def 30
+003a 0000 HALRADIO_TX_DPD_FIR_GAINS 0003 ofdm0_gain ofdm1_gain cck_gain
+003a 0001 HALRADIO_TX_DPD_ALIGN_SIGNAL 000b group temp index val1 val2 val3 sample triangle phase tr_sig_i tr_sig_q
+003a 0002 HALRADIO_TX_DPD_LUT_WRITE 0009 group temp index real real_8MSB real_LSB_array_32 imag imag_8MSB imag_LSB_array_32
+003a 0003 HALRADIO_TX_DPD_LUT_READ 0009 sub_iteration lut_type lut_grp lut_temp lut_lower_bound lut_upper_bound channel_bandwidth adapt_qual lut
+003a 0005 HALRADIO_TX_DPD_ALIGN 0007 sum_msw sum_lsw max_msw max_lsw d xcorr_octant spare
+003a 0006 HALRADIO_TX_DPD_TEMP 0003 pre_train_pa_temp post_train_pa_temp group
+003a 0007 HALRADIO_TX_DPD_LUT_BOUNDS 0006 OFDM0_low_bound OFDM0_high_bound OFDM1_low_bound OFDM1_high_bound CCK_low_bound CCK_high_bound
+003a 0008 HALRADIO_TX_DPD_FIXED_GAIN 0005 halradio_db halradio_gain dpd_gain msbs lsbs
+003a 0009 HALRADIO_TX_DPD_ADAPT_FIR 0005 coeff0 coeff1 coeff2 coeff3 group
+003a 000a HALRADIO_TX_DPD_ALIGN_2 0005 dpd_trim_step restart dpd_loopback_atten dpd_rx_bb1 dpd_rx_bb2
+003a 000b HALRADIO_TX_DPD_SPARE_1
+003a 000c HALRADIO_TX_DPD_CURVE_FIT 0007 sum_x sum_x2 sum_y sum_y2 sum_xy m_8_8 c
+003a 000d HALRADIO_TX_DPD_SPARE_2
+003a 000e HALRADIO_TX_DPD_UB 0004 mod_group pre_gain index_max_mag pregain_ub_index
+003a 000f HALRADIO_TX_DPD_LUT_CLEAN_CAUSE 0006 mod_group index i_full_path i_direct_path q_full_path q_direct_path
+003a 0010 HALRADIO_TX_DPD_LUT_CLEAN_COEFFS 000c i_index_m2 i_index_m1 i_index_old i_index_p1 i_index_p2 q_index_m2 q_index_m1 q_index_old q_index_p1 q_index_p2 i_index_new q_index_new
+003a 0011 HALRADIO_TX_DPD_LUT_REPAIR 0008 offset overflow min_real max_real ave_real min_mag max_mag ave_mag
+003a 0012 HALRADIO_TX_DPD_QUALITY 0005 dpd_trim_step quality quality_threshold failures max_attempts
+003a 0013 HALRADIO_TX_DPD_LOAD_ADAPT_FIR 0009 source_coeff0 source_coeff1 source_coeff2 source_coeff3 hw_coeff0 hw_coeff1 hw_coeff2 hw_coeff3 group
+003a 0014 HALRADIO_TX_DPD_RX_ABB_GAIN 0004 MAX_DPD_RX_BB rx_abb_gain rx_abb_MSBs rx_abb_2LSBs
+003a 0015 HALRADIO_TX_DPD_CALC_LOOPBACK_FAILED 0006 dpd_trim_step frequency_half_MHz bandwidth power_quarter_dBm attempt err_code
+003a 0016 HALRADIO_TX_DPD_TRAIN_TIME 0005 dpd_trim_step iteration sub_iteration time_to_train tag
+003a 0017 HALRADIO_TX_DPD_LOOPBACK_PHASE 0006 group sub_iteration phase_cache_OFDM0 phase_cache_OFDM1 phase_cache_CCK phase_calc_new
+003a 0018 HALRADIO_TX_DPD_DRV_PA_BIAS 0006 mod target_power align_drv_bias align_pa_bias train_drv_bias train_pa_bias
+003a 0019 HALRADIO_TX_DPD_ALIGN_3 0008 dpd_trim_step coarse_delay fine_delay sum_coeffs initial_gain fir_gain ratio xcorr_octant
+003a 001a HALRADIO_TX_DPD_ALIGN_SETTINGS 0008 dig_gain pre_gain v2i_gain mix_gain drv_gain pa_gain drv_bias pa_bias
+003a 001b HALRADIO_TX_DPD_ALIGN_SETTINGS2 0006 fir_gain delay lut_coeff0_mag phase rx_abb_gain dpd_loopback_atten
+003a 001c HALRADIO_TX_DPD_TRAIN_SETTINGS 0008 dig_gain pre_gain v2i_gain mix_gain drv_gain pa_gain drv_bias pa_bias
+003a 001d HALRADIO_TX_DPD_TRAIN_SETTINGS2 0006 fir_gain delay lut_coeff0_mag phase rx_abb_gain dpd_loopback_atten
+003a 001e HALRADIO_TX_DPD_BAD_LUT 0003 lut_sum_mag_sq lut_sum_mag_sq_thr good_lut_flag
+# Generated From hal/halradio/halradio_tx_dpd_debug.xml
+trace_types 74
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.fir_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.delay Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.phase Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.rx_abb_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS2.dpd_loopback_atten Natural8
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_m2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_m1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_old Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_p1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_p2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_m2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_m1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_old Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_p1 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_p2 Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.i_index_new Natural16s
+HALRADIO_TX_DPD_LUT_CLEAN_COEFFS.q_index_new Natural16s
+HALRADIO_TX_DPD_BAD_LUT.lut_sum_mag_sq Natural32
+HALRADIO_TX_DPD_BAD_LUT.lut_sum_mag_sq_thr Natural32
+HALRADIO_TX_DPD_BAD_LUT.good_lut_flag Boolean
+HALRADIO_TX_DPD_ALIGN_SIGNAL.tr_sig_i Natural16s
+HALRADIO_TX_DPD_ALIGN_SIGNAL.tr_sig_q Natural16s
+HALRADIO_TX_DPD_FIXED_GAIN.halradio_gain Natural32
+HALRADIO_TX_DPD_ALIGN.sum_msw Natural32
+HALRADIO_TX_DPD_ALIGN.sum_lsw Natural32
+HALRADIO_TX_DPD_ALIGN.max_msw Natural32
+HALRADIO_TX_DPD_ALIGN.max_lsw Natural32
+HALRADIO_TX_DPD_LUT_READ.sub_iteration Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_type Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_grp Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_temp Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_lower_bound Natural8
+HALRADIO_TX_DPD_LUT_READ.lut_upper_bound Natural8
+HALRADIO_TX_DPD_LUT_READ.channel_bandwidth Natural8
+HALRADIO_TX_DPD_LUT_READ.adapt_qual Natural32
+HALRADIO_TX_DPD_LUT_READ.lut MBULK
+HALRADIO_TX_DPD_ALIGN_SETTINGS.dig_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pre_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.v2i_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.mix_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.drv_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pa_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.drv_bias Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS.pa_bias Natural8
+HALRADIO_TX_DPD_CALC_LOOPBACK_FAILED.power_quarter_dBm Natural16s
+HALRADIO_TX_DPD_DRV_PA_BIAS.target_power Natural16s
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.fir_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.delay Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.phase Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.rx_abb_gain Natural8
+HALRADIO_TX_DPD_ALIGN_SETTINGS2.dpd_loopback_atten Natural8
+HALRADIO_TX_DPD_LUT_REPAIR.offset Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.min_real Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.max_real Natural16s
+HALRADIO_TX_DPD_LUT_REPAIR.ave_real Natural16s
+HALRADIO_TX_DPD_TRAIN_SETTINGS.dig_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pre_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.v2i_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.mix_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.drv_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pa_gain Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.drv_bias Natural8
+HALRADIO_TX_DPD_TRAIN_SETTINGS.pa_bias Natural8
+HALRADIO_TX_DPD_CURVE_FIT.sum_x Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_x2 Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_y Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_y2 Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.sum_xy Natural32s
+HALRADIO_TX_DPD_CURVE_FIT.m_8_8 Natural16s
+HALRADIO_TX_DPD_CURVE_FIT.c Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.real Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.real_LSB_array_32 Natural32
+HALRADIO_TX_DPD_LUT_WRITE.imag Natural16s
+HALRADIO_TX_DPD_LUT_WRITE.imag_LSB_array_32 Natural32
+# Generated From hal/halradio/halradio_core_debug.xml
+trace_def 4
+0030 0000 HALRADIO_CORE_FAULT_HELPER 000b fault_id fault_arg helper_0 helper_1 helper_2 helper_3 helper_4 helper_5 helper_6 helper_7 helper_8
+0030 0001 HALRADIO_CORE_SPARE_1
+0030 0002 HALRADIO_CORE_DPD_MASTER 0002 dpd_master_switch dpd_master_switch_mask
+0030 0003 HALRADIO_CORE_ENABLED_TRIMS 0003 enabled_trims disallowed_per_chan_trims initial_pending
+# Generated From hal/halradio/halradio_core_debug.xml
+trace_types 5
+HALRADIO_CORE_ENABLED_TRIMS.enabled_trims Natural32
+HALRADIO_CORE_ENABLED_TRIMS.disallowed_per_chan_trims Natural32
+HALRADIO_CORE_ENABLED_TRIMS.initial_pending Natural32
+HALRADIO_CORE_DPD_MASTER.dpd_master_switch Natural32
+HALRADIO_CORE_DPD_MASTER.dpd_master_switch_mask Natural32
+# Generated From hal/halradio/halradio_rx_debug.xml
+trace_def 26
+003d 0000 HALRADIO_RX_WBRSSI_OFFSET 0001 settle
+003d 0001 HALRADIO_RX_WBRSSI_PLOT 000a y_0_1 y_2_3 y_4_5 y_6_7 y_8_9 y_10_11 y_12_13 y_14_15 restrim_best_index zero_best_offset
+003d 0002 HALRADIO_RX_DC_TIME 0001 time_us
+003d 0003 HALRADIO_RX_WBRSSI_DC 0003 best_index best_reading best_offset
+003d 0004 HALRADIO_RX_WBRSSI_IREF 0001 iref_trim
+003d 0005 HALRADIO_RX_DCOC_LUT 0009 index_gains rx_dc_adj_i rx_dc_adj_q sig_anal_l_iq sig_anal_h_iq adc_l_i_0 adc_l_q_0 adc_h_i_0 adc_h_q_0
+003d 0006 HALRADIO_RX_DCOC_BB_GAINS 000b index_gains abb1_gain abb2_0_i abb2_0_q abb2_1_i abb2_1_q abb2_2_i abb2_2_q abb2_3_i abb2_3_q shift
+003d 0007 HALRADIO_RX_GAINS_ENABLES 000a ana_enables_status_h ana_enables_status_l ana_enables_h ana_enables_l ana_enables_mask_h ana_enables_mask_l agc_config2_h agc_config2_l rx_level gain_status
+003d 0008 HALRADIO_RX_DCOC_LUT_ENT 000c lut_i_0__6_12 lut_q_0__6_12 lut_i_1__7_13 lut_q_1__7_13 lut_i_2__8_14 lut_q_2__8_14 lut_i_3__9_15 lut_q_3__9_15 lut_i_4_10_16 lut_q_4_10_16 lut_i_5_11_17 lut_q_5_11_17
+003d 0009 HALRADIO_RX_DCOC_LUT_32 0007 index rx_dc_adj_i rx_dc_adj_q sig_anal_l_i sig_anal_l_q sig_anal_h_i sig_anal_h_q
+003d 000a HALRADIO_RX_DCOC_BB_GAINS_32 0004 index abb sig_anal_i sig_anal_q
+003d 000b HALRADIO_RX_RCCAL 0001 rccal_value
+003d 000c HALRADIO_RX_IQ_COMP_RES0 000b tap0_real_mant tap0_imag_mant tap1_real_mant tap1_imag_mant tap2_real_mant tap2_imag_mant tap3_real_mant tap3_imag_mant tap4_real_mant tap4_imag_mant shift
+003d 000d HALRADIO_RX_IQ_COMP_RES1 000a mag_0_1_mant mag_2_3_mant mag_4_5_mant mag_6_7_mant mag_8_9_mant mag_10_11_mant mag_12_13_mant mag_14_15_mant shift bandwidth
+003d 000e HALRADIO_RX_IQ_COMP_INTERMEDIATE0 0003 iteration radio_id bw
+003d 000f HALRADIO_RX_IQ_COMP_INTERMEDIATE1 0006 fundamental_real fundamental_imag image_real image_imag rejection_real rejection_imag
+003d 0010 HALRADIO_RX_IQ_COMP_INTERMEDIATE2 0006 mat_element_real mat_element_imag product_real product_imag accum_real accum_imag
+003d 0011 HALRADIO_RX_IQ_COMP_LO_LOCK 0001 dummy
+003d 0012 HALRADIO_RX_IQ_COMP_DEBUG1 0004 fundamental_real fundamental_imag iteration fundamental_magn
+003d 0013 HALRADIO_RX_IQ_COMP_DEBUG2 0004 magn_val_np1 magn_val_n iteration step_size
+003d 0014 HALRADIO_RX_DCOC_RF_AGC_GAINS 0004 time deadline fe_gain bb_gain
+003d 0015 HALRADIO_RX_DCOC_LUT_SUMMARY 000c lut_i_low_0 lut_q_low_0 lut_i_low_1 lut_q_low_1 lut_i_mid_0 lut_q_mid_0 lut_i_mid_1 lut_q_mid_1 lut_i_high_0 lut_q_high_0 lut_i_high_1 lut_q_high_1
+003d 0016 HALRADIO_RX_DCOC_EXTRA_SWEEP_IQ 000b lut_index i_0 q_0 i_1 q_1 i_2_trim q_2_trim i_3 q_3 i_4 q_4
+003d 0017 HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I 0006 lut_index sa_i_0 sa_i_1 sa_i_2_trim sa_i_3 sa_i_4
+003d 0018 HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q 0006 lut_index sa_q_0 sa_q_1 sa_q_2_trim sa_q_3 sa_q_4
+003d 0019 HALRADIO_RX_WBRSSI_OFFSET_RES 0002 offset rtrim
+# Generated From hal/halradio/halradio_rx_debug.xml
+trace_types 52
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_real Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_imag Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG1.iteration Natural32
+HALRADIO_RX_IQ_COMP_DEBUG1.fundamental_magn Natural32
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.fundamental_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.fundamental_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.image_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.image_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.rejection_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE1.rejection_imag Natural32s
+HALRADIO_RX_DCOC_RF_AGC_GAINS.fe_gain Natural32s
+HALRADIO_RX_DCOC_RF_AGC_GAINS.bb_gain Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_IQ.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_0 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_1 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_2_trim Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_3 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_I.sa_i_4 Natural32s
+HALRADIO_RX_IQ_COMP_LO_LOCK.dummy Natural32s
+HALRADIO_RX_IQ_COMP_DEBUG2.magn_val_np1 Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.magn_val_n Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.iteration Natural32
+HALRADIO_RX_IQ_COMP_DEBUG2.step_size Natural32
+HALRADIO_RX_IQ_COMP_RES0.tap0_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap0_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap1_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap1_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap2_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap2_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap3_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap3_imag_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap4_real_mant Natural16s
+HALRADIO_RX_IQ_COMP_RES0.tap4_imag_mant Natural16s
+HALRADIO_RX_DCOC_BB_GAINS_32.sig_anal_i Natural32s
+HALRADIO_RX_DCOC_BB_GAINS_32.sig_anal_q Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.lut_index Natural8
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_0 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_1 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_2_trim Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_3 Natural32s
+HALRADIO_RX_DCOC_EXTRA_SWEEP_SA_Q.sa_q_4 Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_l_i Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_l_q Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_h_i Natural32s
+HALRADIO_RX_DCOC_LUT_32.sig_anal_h_q Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.mat_element_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.mat_element_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.product_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.product_imag Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.accum_real Natural32s
+HALRADIO_RX_IQ_COMP_INTERMEDIATE2.accum_imag Natural32s
+# Generated From hal/halradio/halradio_tx_iq_debug.xml
+trace_def 20
+003c 0000 HALRADIO_TX_IQ_DCOC_SEARCH_1 000a packiq_0 sa_0 packiq_1 sa_1 packiq_2 sa_2 packiq_3 sa_3 packiq_4 sa_4
+003c 0001 HALRADIO_TX_IQ_DCOC_SEARCH_2 000a packiq_5 sa_5 packiq_6 sa_6 packiq_7 sa_7 packiq_8 sa_8 mixer amplitude
+003c 0002 HALRADIO_TX_IQ_DCOC_SA_POWER_RES 0006 iteration start_time sa_low_power sa_high_pwr_cck sa_high_pwr_ofdm0 sa_high_pwr_ofdm1
+003c 0003 HALRADIO_TX_IQ_SEARCH 000a seq trim_0_i trim_0_q sa_0 trim_1_i trim_1_q sa_1 trim_2_i trim_2_q sa_2
+003c 0004 HALRADIO_TX_IQ_INADEQUATE_RANGE 0006 itrim max_iq_offset_i min_iq_offset_i qtrim max_iq_offset_q min_iq_offset_q
+003c 0005 HALRADIO_TX_IQ_IM_SEARCH_RES 0005 iteration start_time scale angle sa
+003c 0006 HALRADIO_TX_IQ_DCOC_INFO 0003 event avg_v2i_cck_i avg_v2i_cck_q
+003c 0007 HALRADIO_TX_IQ_DCOC_PCAL_SEARCH 0002 band gain
+003c 0008 HALRADIO_TX_IQ_DCOC_PCAL_RES 0005 time a_i a_q v2i_gain mix_gain
+003c 0009 HALRADIO_TX_IQ_DCOC_PCAL_SET 0004 band gain trim_conf0 trim_conf1
+003c 000a HALRADIO_TX_IQ_SWEEP 000b i_search q_search sa_minus_4 sa_minus_3 sa_minus_2 sa_minus_1 sa_zero sa_plus_1 sa_plus_2 sa_plus_3 sa_plus_4
+003c 000b HALRADIO_TX_IQ_DCOC_SEARCH_RES2 0008 iteration start_time mix_i mix_q mix_sa dig_i dig_q dig_sa
+003c 000c HALRADIO_TX_IQ_DCOC_FINAL_PASSES 000b current_i current_q last_i last_q count min_i min_q max_i max_q max_range max_min_ratio
+003c 000d HALRADIO_TX_IQ_DCOC_RESTART_MAX 0001 restart_count
+003c 000e HALRADIO_TX_IQ_RAMP 0002 new_amplitude maxval
+003c 000f HALRADIO_TX_IMG_PAIR 0003 freq scale angle
+003c 0010 HALRADIO_TX_IQ_GAINS 0005 index v2i_gain mix_gain drv_gain pa_gain
+003c 0011 HALRADIO_TX_V2I_OFFSET_RES 0004 index i q sa
+003c 0012 HALRADIO_TX_IQ_CL_NANNY_TRIG 0003 event trim_temperature current_temperature
+003c 0013 HALRADIO_TX_IQ_DCOC_V2I_OFF_RES 000a iteration start_time v2i_off_low_power_i v2i_off_low_power_q v2i_off_sa_high_pwr_cck_i v2i_off_sa_high_pwr_cck_q v2i_off_sa_high_pwr_ofdm0_i v2i_off_sa_high_pwr_ofdm0_q v2i_off_sa_high_pwr_ofdm1_i v2i_off_sa_high_pwr_ofdm1_q
+# Generated From hal/halradio/halradio_tx_iq_debug.xml
+trace_types 46
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.current_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.current_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.last_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.last_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.min_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.min_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_i Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_q Natural16s
+HALRADIO_TX_IQ_DCOC_FINAL_PASSES.max_range Natural16s
+HALRADIO_TX_IQ_GAINS.index Natural8
+HALRADIO_TX_IMG_PAIR.freq Natural16s
+HALRADIO_TX_IMG_PAIR.scale Natural16s
+HALRADIO_TX_IMG_PAIR.angle Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_low_power_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_low_power_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_cck_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_cck_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm0_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm0_q Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm1_i Natural16s
+HALRADIO_TX_IQ_DCOC_V2I_OFF_RES.v2i_off_sa_high_pwr_ofdm1_q Natural16s
+HALRADIO_TX_V2I_OFFSET_RES.index Natural8
+HALRADIO_TX_V2I_OFFSET_RES.i Natural16s
+HALRADIO_TX_V2I_OFFSET_RES.q Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.itrim Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.max_iq_offset_i Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.min_iq_offset_i Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.qtrim Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.max_iq_offset_q Natural16s
+HALRADIO_TX_IQ_INADEQUATE_RANGE.min_iq_offset_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_0_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_0_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_1_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_1_q Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_2_i Natural16s
+HALRADIO_TX_IQ_SEARCH.trim_2_q Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.mix_i Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.mix_q Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.dig_i Natural16s
+HALRADIO_TX_IQ_DCOC_SEARCH_RES2.dig_q Natural16s
+HALRADIO_TX_IQ_DCOC_PCAL_RES.a_i Natural16s
+HALRADIO_TX_IQ_DCOC_PCAL_RES.a_q Natural16s
+HALRADIO_TX_IQ_IM_SEARCH_RES.scale Natural16s
+HALRADIO_TX_IQ_IM_SEARCH_RES.angle Natural16s
+HALRADIO_TX_IQ_SWEEP.i_search Natural16s
+HALRADIO_TX_IQ_SWEEP.q_search Natural16s
+# Generated From hal/halradio/halradio_tx_pow_debug.xml
+trace_def 24
+003b 0000 HALRADIO_TX_POW_GAIN_SEARCH 0007 adc_ref adc_reading dig_gain count sensor raw_temperature raw_average_temp
+003b 0001 HALRADIO_TX_POW_PSAT_RES 0007 sa_saturation sa_reduced_gain dig_gain pre_dist_gain measured_gain ratio ref_power
+003b 0002 HALRADIO_TX_POW_SDPD 000b lo_ref_meas lo_corrected ratio cck_reference cck_calculated ofdm0_reference ofdm0_calculated ofdm1_reference ofdm1_calculated temperature temp_comp_gain
+003b 0003 HALRADIO_TX_POW_TEMP 0004 sensor initial after_lo final
+003b 0004 HALRADIO_TX_POW_SCALE 0008 sa_low_ref siganal_power_step target_power requested_power corner_power_ref gain sa_target power_ref
+003b 0005 HALRADIO_TX_POW_GAIN_STEP 0006 target_adc adc_reading gain_index best_index best_error best_adc
+003b 0006 HALRADIO_TX_POW_TARGETS 0007 sa_saturation target_power_1 target_adc_1 target_power_2 target_adc_2 target_power_3 target_adc_3
+003b 0007 HALRADIO_TX_POW_GAIN_SWEEP_COMMON 0005 adc_ref dig_gain_ref mod sensor Frequency
+003b 0008 HALRADIO_TX_POW_CAL 0007 target_power_qdb max_power_at_connector_qdb_CCK target_power_CCK max_power_at_connector_qdb_OFDM_0 target_power_OFDM_0 max_power_at_connector_qdb_OFDM_1 target_power_OFDM_1
+003b 0009 HALRADIO_TX_POW_DIG_TRIM 0005 count DIG_SERVO_COUNT_THRESHOLD dig_gain adc_reading target_adc
+003b 000a HALRADIO_TX_POW_RESULT 0009 mod adc_reading target_adc dig_gain v2i_gain mix_gain drv_gain pa_gain count
+003b 000b HALRADIO_TX_POW_GAIN_SWEEP 000b dig_gain adc_0 adc_1 adc_2 adc_3 adc_4 adc_5 adc_6 adc_7 raw_temperature raw_average_temp
+003b 000c HALRADIO_TX_POW_FTRIM_SET 0006 channel_freq nearest_freq best_distance mixer driver pa
+003b 000d HALRADIO_TX_POW_MOD_GRP 0006 mac_acc_mod_opt mod_group rate mod_index mod_mask tx_ofdm_sel
+003b 000e HALRADIO_TX_POW_MIMO_BFER 0008 modulation power_limit target_power mimo_backoff_dB bfer_backoff_dB dig_gain dig_gain_mimo dig_gain_bfer
+003b 000f HALRADIO_TX_POW_DIG_RANGE 0004 band modulation pre_dist_gain_ref pre_dist_gain
+003b 0010 HALRADIO_TX_POW_NANNY_TRIG 0003 event trim_temperature current_temperature
+003b 0011 HALRADIO_TX_POW_SETTINGS 0009 gain_index v2i_gain drv_gain mix_gain pa_gain pre_gain sig_amp adc_reading power
+003b 0012 HALRADIO_TX_POW_DIG_CALC 0004 pre_dist_ref pre_dist_calc target_adc adc_reading
+003b 0013 HALRADIO_TX_POW_PICKED 000a mod adc_reading target_adc dig_gain v2i_gain mix_gain drv_gain pa_gain index dig_gain_ref
+003b 0014 HALRADIO_TX_POW_TARGET_CAL 0008 cl_freq_comp ol_freq_comp cl_temp_comp ol_temp_comp target_power_cap max_power_uplift temp_oob_limit target_power
+003b 0015 HALRADIO_TX_POW_TEMP2 0003 after_cck after_ofdm0 after_ofdm1
+003b 0016 HALRADIO_TX_POW_GAIN_STEP_ADC 0009 base_idx adc_idx_0 adc_idx_1 adc_idx_2 adc_idx_3 adc_idx_4 adc_idx_5 adc_idx_6 adc_idx_7
+003b 0017 HALRADIO_TX_POW_GAIN_STEP_POWER 0009 base_idx dbm_idx_0 dbm_idx_1 dbm_idx_2 dbm_idx_3 dbm_idx_4 dbm_idx_5 dbm_idx_6 dbm_idx_7
+# Generated From hal/halradio/halradio_tx_pow_debug.xml
+trace_types 27
+HALRADIO_TX_POW_SETTINGS.power Natural16s
+HALRADIO_TX_POW_PICKED.index Natural8
+HALRADIO_TX_POW_SDPD.temp_comp_gain Natural32
+HALRADIO_TX_POW_PSAT_RES.ref_power Natural16s
+HALRADIO_TX_POW_MIMO_BFER.power_limit Natural16s
+HALRADIO_TX_POW_MIMO_BFER.target_power Natural16s
+HALRADIO_TX_POW_MIMO_BFER.mimo_backoff_dB Natural16s
+HALRADIO_TX_POW_MIMO_BFER.bfer_backoff_dB Natural16s
+HALRADIO_TX_POW_SCALE.gain Natural32
+HALRADIO_TX_POW_MOD_GRP.mac_acc_mod_opt Natural32
+HALRADIO_TX_POW_MOD_GRP.mod_mask Natural32
+HALRADIO_TX_POW_MOD_GRP.tx_ofdm_sel Natural32
+HALRADIO_TX_POW_TARGET_CAL.cl_freq_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.ol_freq_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.cl_temp_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.ol_temp_comp Natural16s
+HALRADIO_TX_POW_TARGET_CAL.target_power_cap Natural16s
+HALRADIO_TX_POW_TARGET_CAL.max_power_uplift Natural16s
+HALRADIO_TX_POW_TARGET_CAL.temp_oob_limit Natural16s
+HALRADIO_TX_POW_TARGET_CAL.target_power Natural16s
+HALRADIO_TX_POW_CAL.target_power_qdb Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_CCK Natural16s
+HALRADIO_TX_POW_CAL.target_power_CCK Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_OFDM_0 Natural16s
+HALRADIO_TX_POW_CAL.target_power_OFDM_0 Natural16s
+HALRADIO_TX_POW_CAL.max_power_at_connector_qdb_OFDM_1 Natural16s
+HALRADIO_TX_POW_CAL.target_power_OFDM_1 Natural16s
+# Generated From hal/halradio/halradio_coex_fem_debug.xml
+trace_def 2
+0041 0000 HALRADIO_COEX_FEM_COEX_REGS 0006 COEX_RF_CFG COEX_RF_FEC_2G_CFG COEX_RF_FEC_2G_CFG1 COEX_RF_FEC_5G_CFG RFIC_PAD_MUX_CTRL WL_ANA_TX_5G_MISC_CONFIG
+0041 0001 HALRADIO_COEX_FEM_MILDRED_REGS 0002 MILDRED_SBUF MILDRED_SCON
+# Generated From hal/halradio/halradio_coex_fem_debug.xml
+trace_types 5
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_2G_CFG Natural32
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_2G_CFG1 Natural32
+HALRADIO_COEX_FEM_COEX_REGS.COEX_RF_FEC_5G_CFG Natural32
+HALRADIO_COEX_FEM_COEX_REGS.RFIC_PAD_MUX_CTRL Natural32
+HALRADIO_COEX_FEM_COEX_REGS.WL_ANA_TX_5G_MISC_CONFIG Natural32
+# Generated From hal/halradio/halradio_debug.xml
+trace_def 28
+0017 0000 HALRADIO_LOGEN_SEARCH 000c dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10 dbg_11
+0017 0001 HALRADIO_LOGEN_RESULT 0007 time temperature frequency trp_fcal trp_acal buf_fcal buf_acal
+0017 0002 HALRADIO_PLL_LOCK_INFO 0003 time_for_locking temperature_at_lock frequency
+0017 0004 HALRADIO_SIGANAL_OUT 0008 itone qtone isample qsample rc ic mag phase
+0017 0005 HALRADIO_GET_TEMP 0001 raw_temperature
+0017 0006 HALRADIO_ABB_FILTER_TRIM_SEARCH 000c freq dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10
+0017 0007 HALRADIO_ABB_FILTER_TRIM_RESULT 0008 time target10 target20 target40 ftrim_10 ftrim_20 ftrim_40 bw_ftrim_tx_30
+0017 0008 HALRADIO_TX_ABB_FILTER_TRIM_SET 0006 bandwidth wb_en small_r_80m small_c_80m dac_ftrim filt_ftrim
+0017 0009 HALRADIO_TX_ABB_FILTER_TRIM_RES 0007 time bw filter noise ref target ftrim
+0017 000a HALRADIO_SPEEDY_HDR 0002 n n_mod_NLOG
+0017 000b HALRADIO_SPEEDY_ROW 000c CTRL_MSW_0 CTRL_LSW_0 DATA_MSW_0 DATA_LSW_0 CTRL_MSW_1 CTRL_LSW_1 DATA_MSW_1 DATA_LSW_1 CTRL_MSW_2 CTRL_LSW_2 DATA_MSW_2 DATA_LSW_2
+0017 000c HALRADIO_TEMP_UPDATE 0005 sensor inst_temp_c avg_temp_c measure_timestamp temp_measurement_context
+0017 000d HALRADIO_GENERIC_12 000c dbg_0 dbg_1 dbg_2 dbg_3 dbg_4 dbg_5 dbg_6 dbg_7 dbg_8 dbg_9 dbg_10 dbg_11
+0017 000e HALRADIO_BIST_ADC_READ 000c bist_adc_01 bist_adc_02 bist_adc_03 bist_adc_04 bist_adc_05 bist_adc_06 bist_adc_07 bist_adc_08 bist_adc_09 bist_adc_10 bist_adc_11 bist_adc_12
+0017 000f HALRADIO_SIGANAL_MIN_MAX 0004 sa_max_positive sa_min_negative fault_count total_readings
+0017 0010 HALRADIO_PATH_MAP_CONFIG 0003 new_map modem_id is_mimo
+0017 0011 HALRADIO_PATH_MAP_ROUTING 0004 dfe_id wlr_id pcr_id radio_id
+0017 0012 HALRADIO_TDC 0002 derived_checksum expected_checksum
+0017 0013 HALRADIO_LOAD_PLAYBACK 0005 tag memcmp_result dest src size_bytes
+0017 0014 HALRADIO_RADIOLOG_RAMS 0004 tag buf_start buf_end buf_size
+0017 0015 HALRADIO_LOCK_DURATION 0002 duration locked
+0017 0016 HALRADIO_STAGE 0002 step duration
+0017 0017 HALRADIO_TRIM_TIMINGS 0008 trim_in_progress trim_step iteration sub_iteration time_marker spare0 spare1 spare2
+0017 0018 HALRADIO_CHAN_RSSI_PER_CAPTURE 0007 rx_fe_gain_index rx_bb_gain_index lna_gain_index mix_gain_index rssi_log gain_correction_dB chan_rssi_dBm
+0017 0019 HALRADIO_REG_LOG 0002 tag address
+0017 001a HALRADIO_TX_DPD_NANNY_TRIG 0004 temp_last temp_cur context nanny_bm
+0017 001b HALRADIO_FEM_CONTROL 0005 client band disable lna_client_disable_mask ext_lna_enabled
+0017 001c HALRADIO_FLEXIMAC_STATE_TIMES 0003 actual_delay_us max_delay_us new_state
+# Generated From hal/halradio/halradio_debug.xml
+trace_types 34
+HALRADIO_SIGANAL_OUT.itone Natural16s
+HALRADIO_SIGANAL_OUT.qtone Natural16s
+HALRADIO_SIGANAL_OUT.isample Natural16s
+HALRADIO_SIGANAL_OUT.qsample Natural16s
+HALRADIO_SIGANAL_OUT.rc Natural32s
+HALRADIO_SIGANAL_OUT.ic Natural32s
+HALRADIO_SIGANAL_OUT.mag Natural32
+HALRADIO_LOAD_PLAYBACK.memcmp_result Natural16s
+HALRADIO_LOAD_PLAYBACK.dest Natural32
+HALRADIO_LOAD_PLAYBACK.src Natural32
+HALRADIO_TEMP_UPDATE.inst_temp_c Natural16s
+HALRADIO_TEMP_UPDATE.avg_temp_c Natural16s
+HALRADIO_TEMP_UPDATE.measure_timestamp Natural32
+HALRADIO_TEMP_UPDATE.temp_measurement_context MEASUREMENT_CONTEXT_T
+HALRADIO_REG_LOG.address Natural32
+HALRADIO_LOCK_DURATION.duration Natural32s
+HALRADIO_LOCK_DURATION.locked Boolean
+HALRADIO_RADIOLOG_RAMS.buf_start Natural32
+HALRADIO_RADIOLOG_RAMS.buf_end Natural32
+HALRADIO_RADIOLOG_RAMS.buf_size Natural32
+HALRADIO_TX_DPD_NANNY_TRIG.temp_last Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.temp_cur Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.context Natural16s
+HALRADIO_TX_DPD_NANNY_TRIG.nanny_bm Natural16s
+HALRADIO_FEM_CONTROL.disable Boolean
+HALRADIO_FEM_CONTROL.ext_lna_enabled Boolean
+HALRADIO_SIGANAL_MIN_MAX.sa_max_positive Natural32s
+HALRADIO_SIGANAL_MIN_MAX.sa_min_negative Natural32s
+HALRADIO_SIGANAL_MIN_MAX.fault_count Natural32
+HALRADIO_SIGANAL_MIN_MAX.total_readings Natural32
+HALRADIO_CHAN_RSSI_PER_CAPTURE.gain_correction_dB Natural16s
+HALRADIO_CHAN_RSSI_PER_CAPTURE.chan_rssi_dBm Decibels
+HALRADIO_STAGE.step Natural32
+HALRADIO_STAGE.duration Natural32s
+MEASUREMENT_CONTEXT_T Enum 01 HALRADIO_TEMP_MEAS_CONTEXT_NANNY 02 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_DCO_PCAL 03 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_TX_POW_PSAT 04 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_TX_CARRIER_LEAKAGE_IMG 06 HALRADIO_TEMP_MEAS_CONTEXT_RADIO_ON 07 HALRADIO_TEMP_MEAS_CONTEXT_RADIO_OFF 08 HALRADIO_TEMP_MEAS_CONTEXT_TRIM_DPD_TRIM
+# Generated From wlanlite/wlanlite_debug.xml
+trace_def 2
+000d 0000 WLANLITE_RX_MAC_FILT 0006 flag mac_add_hi mac_add_mid mac_add_lo current_count bad_crc
+000d 0001 WLANLITE_TX_INTERVAL_DUMP 0002 interval_type intervals
+# Generated From wlanlite/wlanlite_debug.xml
+trace_types 1
+WLANLITE_TX_INTERVAL_DUMP.intervals MBULK
+# Generated From macrame/macrame_station_debug.xml
+trace_def 1
+0039 0000 MACRAME_STATION_UPDATE_RSSI_SNR_AVG 0007 device_addr rssi_raw_sample rssi_adjusted_sample snr_raw_sample rssi_avg snr_avg freq_offset
+# Generated From macrame/macrame_station_debug.xml
+trace_types 7
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.device_addr MAC_Address
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_raw_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_adjusted_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.snr_raw_sample Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.rssi_avg Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.snr_avg Decibels
+MACRAME_STATION_UPDATE_RSSI_SNR_AVG.freq_offset Natural32s
+# Generated From macrame/macrame_radio_debug.xml
+trace_def 18
+002c 0000 MACRAME_RADIOMAC_OFF_DP_OFF_DONE 0003 mac_instance radio_bm radio_state
+002c 0001 MACRAME_RADIOMAC_SWITCH_CHANNEL 0004 vix_bm current_state schdl_pid radiomac_handle
+002c 0002 MACRAME_RADIOMAC_SWITCH_COMPLETED 0003 mac_instance radio_bm new_state
+002c 0003 MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE 0003 mac_instance radio_bm radio_state
+002c 0004 MACRAME_RADIOMAC_SWITCH_OFF 0004 index current_state schdl_pid radiomac_handle
+002c 0005 MACRAME_RADIO_CHANNEL_DESCRIPTION 0005 channel_info primary_channel_freq channel_freq raw_max_air_power regulatory_domain
+002c 0006 MACRAME_RADIO_CONFIG_MODEMS 0003 idx mac_instance modem
+002c 0007 MACRAME_RADIO_CTL_OFF_REQ 0002 radio_bm current_state
+002c 0008 MACRAME_RADIO_CTL_ON_REQ 0003 radio_bm req_rice_state operational_mode
+002c 0009 MACRAME_RADIO_DISABLE_LNA 0002 radio_bm disable
+002c 000a MACRAME_RADIO_DPD_INFO 0005 radio_index dpd_frame_info_index acc num_frames phy_config
+002c 000b MACRAME_RADIO_DPD_REQ 0005 radio_index status rate1 rate2 rate3
+002c 000c MACRAME_RADIO_DPD_SENT_STATUS 0003 radio_bm acc1 Transmission_Status
+002c 000d MACRAME_RADIO_OFF_DONE 0003 mac_instance radio_bm state
+002c 000e MACRAME_RADIO_ON_DONE 0004 mac_instance radio_bm band new_rice_state
+002c 000f MACRAME_RADIO_PROCESSING_OVERHEAD 0001 proc_overhead
+002c 0010 MACRAME_RADIO_REGISTER_MAC_ADDRESS 0002 idx address
+002c 0011 MACRAME_RADIO_SCHED_INTERVAL 0001 interval
+# Generated From macrame/macrame_radio_debug.xml
+trace_types 37
+MACRAME_RADIO_CONFIG_MODEMS.idx Natural8
+MACRAME_RADIO_CONFIG_MODEMS.mac_instance Natural32
+MACRAME_RADIO_CONFIG_MODEMS.modem Natural32
+MACRAME_RADIO_SCHED_INTERVAL.interval Integer32
+MACRAME_RADIO_DPD_REQ.radio_index Natural8
+MACRAME_RADIOMAC_OFF_DP_OFF_DONE.mac_instance Natural32
+MACRAME_RADIOMAC_OFF_DP_OFF_DONE.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_DISABLE_LNA.disable Boolean
+MACRAME_RADIO_DPD_INFO.radio_index Natural8
+MACRAME_RADIO_DPD_INFO.dpd_frame_info_index Natural8
+MACRAME_RADIO_DPD_INFO.acc Natural32
+MACRAME_RADIO_DPD_INFO.phy_config Natural8
+MACRAME_RADIO_CTL_OFF_REQ.current_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_CHANNEL_DESCRIPTION.raw_max_air_power Integer8
+MACRAME_RADIO_CHANNEL_DESCRIPTION.regulatory_domain Natural8
+MACRAME_RADIO_REGISTER_MAC_ADDRESS.idx Natural8
+MACRAME_RADIO_REGISTER_MAC_ADDRESS.address MAC_Address
+MACRAME_RADIO_CTL_ON_REQ.req_rice_state Natural8
+MACRAME_RADIO_CTL_ON_REQ.operational_mode Natural8
+MACRAME_RADIO_ON_DONE.mac_instance Natural32
+MACRAME_RADIO_ON_DONE.band Interger32
+MACRAME_RADIO_ON_DONE.new_rice_state Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.index Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.current_state Natural8
+MACRAME_RADIOMAC_SWITCH_OFF.radiomac_handle Natural8
+MACRAME_RADIO_OFF_DONE.mac_instance Natural32
+MACRAME_RADIO_OFF_DONE.state RAMERAD_RADIO_STATE_T
+MACRAME_RADIO_PROCESSING_OVERHEAD.proc_overhead Integer32
+MACRAME_RADIO_DPD_SENT_STATUS.acc1 Natural32
+MACRAME_RADIO_DPD_SENT_STATUS.Transmission_Status Transmission_Status
+MACRAME_RADIOMAC_SWITCH_CHANNEL.vix_bm VIX_BM_T
+MACRAME_RADIOMAC_SWITCH_CHANNEL.current_state Natural8
+MACRAME_RADIOMAC_SWITCH_CHANNEL.radiomac_handle Natural8
+MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE.mac_instance Natural32
+MACRAME_RADIOMAC_SWITCH_DP_OFF_DONE.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_RADIOMAC_SWITCH_COMPLETED.mac_instance Natural32
+MACRAME_RADIOMAC_SWITCH_COMPLETED.new_state RAMERAD_RADIO_STATE_T
+RAMERAD_RADIO_STATE_T Enum 0000 RADIO_OFF 0001 RADIO_ON_CHANNEL_PENDING 0002 RADIO_ON_CHANNEL 0003 RADIO_ON_CHANNEL_RX_ONLY_PENDING 0004 RADIO_ON_CHANNEL_RX_ONLY 0005 RADIO_ON_CHANNEL_RX_ONLY_LP 0006 RADIO_OFF_PENDING 0007 RADIO_ON_CHANNEL_DPD_TRAINING
+# Generated From macrame/macrame_vif_debug.xml
+trace_def 42
+0025 0000 MACRAME_VIF_AP_CHECK_CLEAR 0002 cf_end_owner cts_to_self_owner
+0025 0001 MACRAME_VIF_AP_LPRX_UPDATE 0002 new_use_lp_rx num_frames_queued
+0025 0002 MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME 0003 timer_valid timer_id timer_duration
+0025 0003 MACRAME_VIF_CHECK_CLEAR 0003 queued inhibit pending
+0025 0004 MACRAME_VIF_CHECK_RX_THROUGHPUT 0005 num_bytes duration Tput rx_load_threshold_high rx_load_threshold_low
+0025 0005 MACRAME_VIF_CTS_DURATION 0006 earliest duration cts_self_end current_time desired_wake_time beacon_time
+0025 0006 MACRAME_VIF_CTS_FRAME_PROCESSED_TX_STATUS 0001 tx_status
+0025 0007 MACRAME_VIF_CU_UPDATE 0007 has_updated value bytes_Tx rate_Tx bytes_Rx rate_Rx measurement_time
+0025 0008 MACRAME_VIF_CU_UPDATE_CALL 0002 has_updated sched_vix_bitmap
+0025 0009 MACRAME_VIF_DESCHEDULED 0005 schdl_pid schedulable_vix_bm all_schedulable_vix_bm all_scheduled_vix_bm all_primary_vix_bm
+0025 000a MACRAME_VIF_FTM_TIME_STAMP_ENABLE 0002 ftm_hw_enable mac_instance
+0025 000b MACRAME_VIF_GET_CONCURRENT_NOA_DURATION 0002 concurrent_noa_duration coex_noa_duration
+0025 000c MACRAME_VIF_GET_TRAFFIC_CLASS 0003 num_txrx_packets threshold __LINE__
+0025 000d MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF 0003 host_requested_nss current_prefered_nss currnet_announced_nss
+0025 000e MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1 0004 search_from search_type dw0_start nr_of_entries
+0025 000f MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2 0005 earliest_type start stop nr_nss channel
+0025 0010 MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY 0006 dw0_start current_slot_idx strat_slot_idx stop_slot_idx slots_duration slots_period
+0025 0011 MACRAME_VIF_NAN_NEXT_DW 0004 tsf tsf_time until_next_dw next_dw_start
+0025 0012 MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS 0006 nan_scheduled_for_dw next_dw_start next_beacon_tbtt sched_time sched_end_time duration
+0025 0013 MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY 0007 type nr_nss channel slot_dur period start_offset nr_octets
+0025 0014 MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY_OCTETS 000c octet0 octet1 octet2 octet3 octet4 octet5 octet6 octet7 octet8 octet9 octet10 octet11
+0025 0015 MACRAME_VIF_PAUSE_DPLANE 0005 pause_bitmap queued inhibit pending LINE
+0025 0016 MACRAME_VIF_PAUSE_RESUME_QUEUE_POP 0001 time_of_request
+0025 0017 MACRAME_VIF_PAUSE_RESUME_Q_DISCARD 0004 current_action current_bitmap prev_action prev_bitmap
+0025 0018 MACRAME_VIF_RESUME_DPLANE 0005 resume_bitmap queued inhibit pending LINE
+0025 0019 MACRAME_VIF_RX_FTM_COARSE_FINE_TS 0007 rx_toa_coarse rx_toa_fine ack_tod_coarse ack_tod_fine rx_toc_coarse rx_toc_fine freq_offset
+0025 001a MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY 0006 sbf ebf qbf hbf abb dfe_delay
+0025 001b MACRAME_VIF_RX_FTM_DSP_CFO_CORRECT 0001 ftm_dsp_cfo_correc
+0025 001c MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME 0003 ftm_dsp_start_time ftm_dsp_end_time ftm_dsp_compute_time
+0025 001d MACRAME_VIF_RX_FTM_DSP_STF_SYNC 0001 ftm_dsp_stf_detect_index
+0025 001e MACRAME_VIF_RX_FTM_DSP_TOA_OFF 0001 ftm_dsp_toa_off
+0025 001f MACRAME_VIF_RX_FTM_IQ_INFO 0002 channel_bw num_of_wraps
+0025 0020 MACRAME_VIF_RX_FTM_TOA_AND_TOD 0002 rx_toa ack_tod
+0025 0021 MACRAME_VIF_SCHEDULED 0007 schdl_type schdl_pid schedulable_vix_bm all_scheduled_vix_bm all_primary_vix_bm radio_bm mac_instance
+0025 0022 MACRAME_VIF_SCHEDULE_MISSED 0005 inhibit all_primary_bm all_cur_sched_bm new_start new_end
+0025 0023 MACRAME_VIF_SET_CHANNEL 0008 Channel_Freq Channel_Info Max_Air_Power Max_Air_Power_Type Regulatory_Domain Sched_Flags Sched_Time Sched_Duration
+0025 0024 MACRAME_VIF_SMAPPER_OFF 0000
+0025 0025 MACRAME_VIF_SMAPPER_ON 0000
+0025 0026 MACRAME_VIF_STA_CHECK_CLEAR 0007 vif_is_schedulable sta_flags ps_state extra_listen_reason ps_trigger_timer_type ps_null_owner cts_to_self_owner
+0025 0027 MACRAME_VIF_SW_DONE 0002 schdl_pid sched_vix
+0025 0028 MACRAME_VIF_TRAFFIC_INFO 0003 trafficinfo_trigger_time traffic_class traffic_count
+0025 0029 MACRAME_VIF_UPDATE_NUM_ANTENNA_PREFERENCE 0001 num_antennas
+# Generated From macrame/macrame_vif_debug.xml
+trace_types 111
+MACRAME_VIF_CU_UPDATE.has_updated Boolean
+MACRAME_VIF_CU_UPDATE.value Natural32
+MACRAME_VIF_CU_UPDATE.bytes_Tx Natural32
+MACRAME_VIF_CU_UPDATE.bytes_Rx Natural32
+MACRAME_VIF_CU_UPDATE.measurement_time Natural32
+MACRAME_VIF_AP_LPRX_UPDATE.new_use_lp_rx Boolean
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.current_action SHAREDDATA_VIF_PAUSE_RESUME_ACTION_E
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.current_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.prev_action SHAREDDATA_VIF_PAUSE_RESUME_ACTION_E
+MACRAME_VIF_PAUSE_RESUME_Q_DISCARD.prev_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_NAN_NEXT_DW.tsf Natural64
+MACRAME_VIF_NAN_NEXT_DW.tsf_time Natural32
+MACRAME_VIF_NAN_NEXT_DW.until_next_dw Natural32
+MACRAME_VIF_NAN_NEXT_DW.next_dw_start Natural32
+MACRAME_VIF_RESUME_DPLANE.resume_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_RESUME_DPLANE.LINE Natural16s
+MACRAME_VIF_RX_FTM_DSP_TOA_OFF.ftm_dsp_toa_off Integer32
+MACRAME_VIF_GET_TRAFFIC_CLASS.num_txrx_packets Natural32
+MACRAME_VIF_GET_TRAFFIC_CLASS.__LINE__ __LINE__
+MACRAME_VIF_RX_FTM_DSP_STF_SYNC.ftm_dsp_stf_detect_index Integer32
+MACRAME_VIF_RX_FTM_IQ_INFO.channel_bw Natural8
+MACRAME_VIF_RX_FTM_IQ_INFO.num_of_wraps Integer16
+MACRAME_VIF_FTM_TIME_STAMP_ENABLE.ftm_hw_enable Boolean
+MACRAME_VIF_FTM_TIME_STAMP_ENABLE.mac_instance Natural32
+MACRAME_VIF_UPDATE_NUM_ANTENNA_PREFERENCE.num_antennas Natural8
+MACRAME_VIF_SCHEDULED.schdl_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_SCHEDULED.schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULED.all_scheduled_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULED.all_primary_vix_bm VIX_BM_T
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.channel Integer16
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.slot_dur Natural32
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.period Natural32
+MACRAME_VIF_NAN_UDATE_SCHDL_ENTRY.start_offset Natural32
+MACRAME_VIF_GET_CONCURRENT_NOA_DURATION.concurrent_noa_duration Natural32
+MACRAME_VIF_GET_CONCURRENT_NOA_DURATION.coex_noa_duration Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.nan_scheduled_for_dw Boolean
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.next_dw_start Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.next_beacon_tbtt Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.sched_time Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.sched_end_time Natural32
+MACRAME_VIF_NAN_NEXT_SCHEDREQ_PARAMS.duration Natural32
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_valid Boolean
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_id Natural32
+MACRAME_VIF_B4_RETURN_TO_BASE_CHANNEL_RESUME.timer_duration Natural32
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.sbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.ebf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.qbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.hbf Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.abb Natural8
+MACRAME_VIF_RX_FTM_DFE_RX_STATUS_LATENCY.dfe_delay Natural64
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.rx_toa_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.ack_tod_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.rx_toc_coarse Natural32
+MACRAME_VIF_RX_FTM_COARSE_FINE_TS.freq_offset Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.dw0_start Natural32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.strat_slot_idx Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.stop_slot_idx Integer32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.slots_duration Natural32
+MACRAME_VIF_NAN_GET_NEXT_START_STOP_FROM_ENTRY.slots_period Natural32
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.host_requested_nss Natural8
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.current_prefered_nss Natural8
+MACRAME_VIF_HOST_UPDATE_ANTENNA_PREF.currnet_announced_nss Natural8
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.search_from Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.search_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.dw0_start Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP1.nr_of_entries Natural8
+MACRAME_VIF_DESCHEDULED.schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_schedulable_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_scheduled_vix_bm VIX_BM_T
+MACRAME_VIF_DESCHEDULED.all_primary_vix_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.all_primary_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.all_cur_sched_bm VIX_BM_T
+MACRAME_VIF_SCHEDULE_MISSED.new_start Natural32
+MACRAME_VIF_SCHEDULE_MISSED.new_end Natural32
+MACRAME_VIF_TRAFFIC_INFO.trafficinfo_trigger_time Natural32
+MACRAME_VIF_TRAFFIC_INFO.traffic_class Natural8
+MACRAME_VIF_TRAFFIC_INFO.traffic_count Natural32
+MACRAME_VIF_CU_UPDATE_CALL.has_updated Boolean
+MACRAME_VIF_CU_UPDATE_CALL.sched_vix_bitmap VIX_BM_T
+MACRAME_VIF_CHECK_RX_THROUGHPUT.num_bytes Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.duration Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.Tput Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.rx_load_threshold_high Natural32
+MACRAME_VIF_CHECK_RX_THROUGHPUT.rx_load_threshold_low Natural32
+MACRAME_VIF_SET_CHANNEL.Channel_Freq Channel_Frequency
+MACRAME_VIF_SET_CHANNEL.Channel_Info Channel_Information
+MACRAME_VIF_SET_CHANNEL.Max_Air_Power Integer8
+MACRAME_VIF_SET_CHANNEL.Max_Air_Power_Type Air_Power_Type
+MACRAME_VIF_SET_CHANNEL.Regulatory_Domain Regulatory_Domain
+MACRAME_VIF_SET_CHANNEL.Sched_Flags Natural8
+MACRAME_VIF_SET_CHANNEL.Sched_Time Natural32
+MACRAME_VIF_SET_CHANNEL.Sched_Duration Integer32
+MACRAME_VIF_RX_FTM_TOA_AND_TOD.rx_toa Natural64
+MACRAME_VIF_RX_FTM_TOA_AND_TOD.ack_tod Natural64
+MACRAME_VIF_CTS_DURATION.earliest Natural32
+MACRAME_VIF_CTS_DURATION.duration Natural32s
+MACRAME_VIF_CTS_DURATION.cts_self_end Natural32
+MACRAME_VIF_CTS_DURATION.current_time Natural32
+MACRAME_VIF_CTS_DURATION.desired_wake_time Natural32
+MACRAME_VIF_CTS_DURATION.beacon_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_start_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_end_time Natural32
+MACRAME_VIF_RX_FTM_DSP_COMPUTE_TIME.ftm_dsp_compute_time Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.earliest_type SHAREDDATA_SCHED_TYPE
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.start Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.stop Natural32
+MACRAME_VIF_NAN_GET_NEXT_SCHDL_START_STOP2.channel Integer16
+MACRAME_VIF_PAUSE_RESUME_QUEUE_POP.time_of_request Natural32
+MACRAME_VIF_RX_FTM_DSP_CFO_CORRECT.ftm_dsp_cfo_correc Integer32
+MACRAME_VIF_PAUSE_DPLANE.pause_bitmap PAUSE_RESUME_BITMAP_T
+MACRAME_VIF_PAUSE_DPLANE.LINE Natural16s
+PAUSE_RESUME_BITMAP_T Enum 0001 DPLANE_NORMAL_FRAMES 0002 DPLANE_BBM_FRAMES 0003 DPLANE_ALL_FRAMES
+# Generated From macrame/macrame_calibration_debug.xml
+trace_def 12
+0027 0000 MACRAME_CALIB_ABORT 0000
+0027 0001 MACRAME_CALIB_ADJUST 0003 countdown grant_start grant_duration
+0027 0002 MACRAME_CALIB_BT_LO_ACCESS_GRANTED 0001 deadline
+0027 0003 MACRAME_CALIB_DONE 0000
+0027 0004 MACRAME_CALIB_PROCESS_REQ 0004 requested_duration minimum_usable_duration bt_impact wlan_impact
+0027 0005 MACRAME_CALIB_PROCESS_REQ_END 0002 grant_start grant_duration
+0027 0006 MACRAME_CALIB_QUERY 0006 blackout_impact bo_adjusted_start grant_start num_chip_blackouts num_vif_blackouts bt_is_active
+0027 0007 MACRAME_CALIB_REQ 0001 duration
+0027 0008 MACRAME_CALIB_REQ_BT_LO_REQUESTED 0001 cfm_deadline
+0027 0009 MACRAME_CALIB_REQ_DELAYED 0006 grant_start grant_duration minimum_usable_duration bt_impact wlan_impact coex_keep_alive
+0027 000a MACRAME_CALIB_REQ_GRANTED 0001 grant_duration
+0027 000b MACRAME_CALIB_REQ_NOT_GRANTED 0004 requested_duration minimum_usable_duration bt_impact wlan_impact
+# Generated From macrame/macrame_calibration_debug.xml
+trace_types 20
+MACRAME_CALIB_REQ.duration Integer32
+MACRAME_CALIB_ADJUST.countdown Natural32
+MACRAME_CALIB_ADJUST.grant_start Natural32
+MACRAME_CALIB_ADJUST.grant_duration Integer32
+MACRAME_CALIB_PROCESS_REQ_END.grant_start Natural32
+MACRAME_CALIB_PROCESS_REQ_END.grant_duration Integer32
+MACRAME_CALIB_PROCESS_REQ.requested_duration Integer32
+MACRAME_CALIB_PROCESS_REQ.minimum_usable_duration Integer32
+MACRAME_CALIB_REQ_GRANTED.grant_duration Integer32
+MACRAME_CALIB_REQ_BT_LO_REQUESTED.cfm_deadline Natural32
+MACRAME_CALIB_REQ_DELAYED.grant_start Natural32
+MACRAME_CALIB_REQ_DELAYED.grant_duration Integer32
+MACRAME_CALIB_REQ_DELAYED.minimum_usable_duration Integer32
+MACRAME_CALIB_REQ_DELAYED.coex_keep_alive Boolean
+MACRAME_CALIB_BT_LO_ACCESS_GRANTED.deadline Natural32
+MACRAME_CALIB_REQ_NOT_GRANTED.requested_duration Integer32
+MACRAME_CALIB_REQ_NOT_GRANTED.minimum_usable_duration Integer32
+MACRAME_CALIB_QUERY.bo_adjusted_start Natural32
+MACRAME_CALIB_QUERY.grant_start Natural32
+MACRAME_CALIB_QUERY.bt_is_active Boolean
+# Generated From macrame/macrame_tx_debug.xml
+trace_def 14
+0029 0000 MACRAME_SEND_FRAME_FROM_QUEUE 0001 frame
+0029 0001 MACRAME_SEND_FRAME_FROM_QUEUE_CTW 0002 frame ecw_max
+0029 0002 MACRAME_TX_ADD_FRAME_TO_QUEUE 0002 frame dwell_time
+0029 0003 MACRAME_TX_CANCEL_FRAME_IN_QUEUE 0002 control_tag_mask control_tag_include
+0029 0004 MACRAME_TX_DISCARD 0002 frame_type src_pid
+0029 0005 MACRAME_TX_DISCARD_ENTRY_FROM_QUEUE 0001 frame
+0029 0006 MACRAME_TX_FAIL 0004 frame src_pid reason tag
+0029 0007 MACRAME_TX_MM_REQUEST 0003 mm_frame_fcs queue_size queue_fcs
+0029 0008 MACRAME_TX_QUEUE_AND_SEND 0001 __LINE__
+0029 0009 MACRAME_TX_QUEUE_AND_SEND_FRAME 0002 frame dwell_time
+0029 000a MACRAME_TX_QUEUE_AND_SEND_NEW_FRAME 0002 frame flags
+0029 000b MACRAME_TX_SEND_CTS_TO_SELF 0000
+0029 000c MACRAME_TX_SEND_QUEUED_FRAMES 0000
+0029 000d MACRAME_TX_TEAR_DOWN_QUEUE 0000
+# Generated From macrame/macrame_tx_debug.xml
+trace_types 17
+MACRAME_TX_CANCEL_FRAME_IN_QUEUE.control_tag_mask Natural64
+MACRAME_TX_CANCEL_FRAME_IN_QUEUE.control_tag_include Natural64
+MACRAME_TX_MM_REQUEST.queue_size Natural32
+MACRAME_TX_MM_REQUEST.queue_fcs Natural32
+MACRAME_SEND_FRAME_FROM_QUEUE_CTW.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_NEW_FRAME.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_FRAME.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND_FRAME.dwell_time Natural32s
+MACRAME_TX_FAIL.frame MBULK
+MACRAME_TX_FAIL.src_pid FsmProcessId
+MACRAME_TX_FAIL.reason RAME_TX_FAIL_REASONS_T
+MACRAME_TX_FAIL.tag Natural64
+MACRAME_TX_ADD_FRAME_TO_QUEUE.frame MBULK
+MACRAME_TX_ADD_FRAME_TO_QUEUE.dwell_time Natural32s
+MACRAME_SEND_FRAME_FROM_QUEUE.frame MBULK
+MACRAME_TX_QUEUE_AND_SEND.__LINE__ __LINE__
+MACRAME_TX_DISCARD_ENTRY_FROM_QUEUE.frame MBULK
+RAME_TX_FAIL Enum 0 NULL_FRAME 1 CANT_OWN_FRAME 2 NULL_STA 3 NOT_CONNETED_UNICAST
+# Generated From macrame/macrame_beacon/macrame_beacon_debug.xml
+trace_def 31
+0024 0000 MACRAME_BEACON_DEREGISTER_TRACKING 0001 __LINE__
+0024 0001 MACRAME_BEACON_DRIFT 0004 go_drift tbtt_diff target_separation beacon_period
+0024 0002 MACRAME_BEACON_DRIFT_INPUT_GO 0004 go_tbtt go_tbtt_time go_tsf go_tsf_time
+0024 0003 MACRAME_BEACON_DRIFT_INPUT_STA 0004 sta_tbtt sta_tbtt_time sta_tsf sta_tsf_time
+0024 0004 MACRAME_BEACON_DTIM_COUNT 0005 tsf beacon_period dtim_period dtim_count time_till_next_dtim
+0024 0005 MACRAME_BEACON_INIT_TBTT 0003 period_us tbtt_time tbtt_tsf
+0024 0006 MACRAME_BEACON_LOAD 0002 frame __LINE__
+0024 0007 MACRAME_BEACON_MISSED1 0003 inhibit all_primary_bm all_curr_sched_bm
+0024 0008 MACRAME_BEACON_MISSED2 0005 listen_start listen_end sched_type received expected
+0024 0009 MACRAME_BEACON_REGISTER_TRACKING 0004 pid start_time end_time __LINE__
+0024 000a MACRAME_BEACON_RX 0006 tsf mac_rx_time tsf_rx_time received period seq_no
+0024 000b MACRAME_BEACON_RX_DISCARD 0001 beacon_period
+0024 000c MACRAME_BEACON_RX_EXTRA 0006 tbtt_bss tbtt_offset timestamp_offset acc_mod_opts fc processing_delay
+0024 000d MACRAME_BEACON_RX_HANDLER 0008 rssi rssi_valid inhibit all_primary_bm all_curr_sched_bm sched_type source_addr seq_no
+0024 000e MACRAME_BEACON_RX_HASH_CHANGED 0004 frame new_hash frame_length offset
+0024 000f MACRAME_BEACON_RX_NAN 0004 tsf mac_rx_time period seq_no
+0024 0010 MACRAME_BEACON_RX_NEXT_WINDOW 0004 pid start_time end_time __LINE__
+0024 0011 MACRAME_BEACON_RX_NOPHY 0003 tsf tsf_invalid_count period
+0024 0012 MACRAME_BEACON_RX_PROBE_RSP_A 0005 tsf mac_rx_time received period seq_no
+0024 0013 MACRAME_BEACON_RX_PROBE_RSP_B 0004 tbtt_bss tbtt_offset acc_mod_opts fc
+0024 0014 MACRAME_BEACON_RX_SCHED 0003 start end sched_duration
+0024 0015 MACRAME_BEACON_RX_SKIP 0003 skip dtim_count dtim_period
+0024 0016 MACRAME_BEACON_RX_TRACK 0005 offset min max holdoff total_duration
+0024 0017 MACRAME_BEACON_TSF_SYNC 0002 tsf tsf_systime
+0024 0018 MACRAME_BEACON_TX_AP 000a frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline tim_pvb mcast_frames_count pump_multicast ecsa_count quiet_count txflags_ex
+0024 0019 MACRAME_BEACON_TX_AP_HANDLER 0004 tsf_tbtt current_time sys_time_tbtt next_ap_handler_time
+0024 001a MACRAME_BEACON_TX_FINISHED 0007 tbtt_time last_success_systime tx_successful acc_mod_opts seq_no missed_since_last_tx missed_total
+0024 001b MACRAME_BEACON_TX_NAN_DISCOVERY 0004 frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline
+0024 001c MACRAME_BEACON_TX_NAN_SYNC 0004 frame tsf_tbtt_l sys_time_tbtt tx_sw_deadline
+0024 001d MACRAME_PROBEREQ_RX_HANDLER 0004 inhibit all_primary_bm all_curr_sched_bm sched_type
+0024 001e MACRAME_PROBERESP_RX_HANDLER 0007 rssi rssi_valid inhibit all_primary_bm all_curr_sched_bm sched_type seq_no
+# Generated From macrame/macrame_beacon/macrame_beacon_debug.xml
+trace_types 100
+MACRAME_BEACON_TX_AP.frame MBULK
+MACRAME_BEACON_TX_AP.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_AP.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_AP.tx_sw_deadline Natural32
+MACRAME_BEACON_TX_AP.tim_pvb Natural8
+MACRAME_BEACON_TX_AP.pump_multicast Boolean
+MACRAME_BEACON_TX_AP.ecsa_count Natural8
+MACRAME_BEACON_TX_AP.quiet_count Natural8
+MACRAME_BEACON_RX_PROBE_RSP_A.tsf Natural64
+MACRAME_BEACON_RX_PROBE_RSP_A.mac_rx_time Natural32
+MACRAME_BEACON_RX_PROBE_RSP_A.received Natural32
+MACRAME_BEACON_MISSED2.listen_start Natural32
+MACRAME_BEACON_MISSED2.listen_end Natural32
+MACRAME_BEACON_MISSED2.received Natural32
+MACRAME_BEACON_MISSED2.expected Natural32
+MACRAME_BEACON_TX_NAN_SYNC.frame MBULK
+MACRAME_BEACON_TX_NAN_SYNC.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_NAN_SYNC.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_NAN_SYNC.tx_sw_deadline Natural32
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tbtt Natural64
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tbtt_time Natural32
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_GO.go_tsf_time Natural32
+MACRAME_BEACON_RX_HANDLER.rssi Decibels
+MACRAME_BEACON_RX_HANDLER.rssi_valid Boolean
+MACRAME_BEACON_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_BEACON_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_RX_HANDLER.source_addr MAC_Address
+MACRAME_BEACON_DEREGISTER_TRACKING.__LINE__ __LINE__
+MACRAME_BEACON_MISSED1.all_primary_bm VIX_BM_T
+MACRAME_BEACON_MISSED1.all_curr_sched_bm VIX_BM_T
+MACRAME_PROBERESP_RX_HANDLER.rssi Decibels
+MACRAME_PROBERESP_RX_HANDLER.rssi_valid Boolean
+MACRAME_PROBERESP_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_PROBERESP_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_RX_EXTRA.tbtt_bss Natural64
+MACRAME_BEACON_RX_EXTRA.tbtt_offset Natural32s
+MACRAME_BEACON_RX_EXTRA.acc_mod_opts Natural32
+MACRAME_BEACON_RX_EXTRA.processing_delay Natural32
+MACRAME_BEACON_RX_NAN.tsf Natural64
+MACRAME_BEACON_RX_NAN.mac_rx_time Natural32
+MACRAME_BEACON_TSF_SYNC.tsf Natural64
+MACRAME_BEACON_TSF_SYNC.tsf_systime Natural32
+MACRAME_BEACON_LOAD.frame MBULK
+MACRAME_BEACON_LOAD.__LINE__ __LINE__
+MACRAME_BEACON_DTIM_COUNT.tsf Natural64
+MACRAME_BEACON_DTIM_COUNT.beacon_period Natural32
+MACRAME_BEACON_DTIM_COUNT.dtim_count Natural32
+MACRAME_BEACON_DTIM_COUNT.time_till_next_dtim Natural32
+MACRAME_BEACON_RX_HASH_CHANGED.frame MBULK
+MACRAME_BEACON_RX_HASH_CHANGED.new_hash Natural32
+MACRAME_BEACON_RX_HASH_CHANGED.frame_length Integer16
+MACRAME_BEACON_RX_HASH_CHANGED.offset Natural8
+MACRAME_BEACON_RX_SCHED.start Natural32
+MACRAME_BEACON_RX_SCHED.end Natural32
+MACRAME_BEACON_RX_SCHED.sched_duration Natural32
+MACRAME_BEACON_RX_PROBE_RSP_B.tbtt_bss Natural64
+MACRAME_BEACON_RX_PROBE_RSP_B.tbtt_offset Natural32s
+MACRAME_BEACON_RX_PROBE_RSP_B.acc_mod_opts Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.frame MBULK
+MACRAME_BEACON_TX_NAN_DISCOVERY.tsf_tbtt_l Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_NAN_DISCOVERY.tx_sw_deadline Natural32
+MACRAME_PROBEREQ_RX_HANDLER.all_primary_bm VIX_BM_T
+MACRAME_PROBEREQ_RX_HANDLER.all_curr_sched_bm VIX_BM_T
+MACRAME_BEACON_DRIFT.go_drift Natural32
+MACRAME_BEACON_DRIFT.tbtt_diff Natural32s
+MACRAME_BEACON_DRIFT.target_separation Natural32s
+MACRAME_BEACON_DRIFT.beacon_period Natural32
+MACRAME_BEACON_TX_AP_HANDLER.tsf_tbtt Natural64
+MACRAME_BEACON_TX_AP_HANDLER.current_time Natural32
+MACRAME_BEACON_TX_AP_HANDLER.sys_time_tbtt Natural32
+MACRAME_BEACON_TX_AP_HANDLER.next_ap_handler_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.start_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.end_time Natural32
+MACRAME_BEACON_RX_NEXT_WINDOW.__LINE__ __LINE__
+MACRAME_BEACON_RX_TRACK.offset Natural32
+MACRAME_BEACON_RX_TRACK.min Natural32
+MACRAME_BEACON_RX_TRACK.max Natural32
+MACRAME_BEACON_RX.tsf Natural64
+MACRAME_BEACON_RX.mac_rx_time Natural32
+MACRAME_BEACON_RX.tsf_rx_time Natural32
+MACRAME_BEACON_RX.received Natural32
+MACRAME_BEACON_INIT_TBTT.period_us Natural32
+MACRAME_BEACON_INIT_TBTT.tbtt_time Natural32
+MACRAME_BEACON_INIT_TBTT.tbtt_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tbtt Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tbtt_time Natural32
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tsf Natural64
+MACRAME_BEACON_DRIFT_INPUT_STA.sta_tsf_time Natural32
+MACRAME_BEACON_RX_NOPHY.tsf Natural64
+MACRAME_BEACON_RX_NOPHY.tsf_invalid_count Natural32
+MACRAME_BEACON_REGISTER_TRACKING.start_time Natural32
+MACRAME_BEACON_REGISTER_TRACKING.end_time Natural32
+MACRAME_BEACON_REGISTER_TRACKING.__LINE__ __LINE__
+MACRAME_BEACON_TX_FINISHED.tbtt_time Natural32
+MACRAME_BEACON_TX_FINISHED.last_success_systime Natural32
+MACRAME_BEACON_TX_FINISHED.tx_successful Boolean
+MACRAME_BEACON_TX_FINISHED.acc_mod_opts Natural32
+MACRAME_BEACON_TX_FINISHED.missed_total Natural32
+# Generated From macrame/macrame_idle/macrame_idle_ap/macrame_idle_ap_debug.xml
+trace_def 5
+0033 0000 MACRAME_IDLE_AP_CHECK_NOT_POSSIBLE 0001 id
+0033 0001 MACRAME_IDLE_AP_CHECK_POSSIBLE 0001 __LINE__
+0033 0002 MACRAME_IDLE_AP_LITE_EVALUATE 0001 permit
+0033 0003 MACRAME_IDLE_AP_MIFLESS_EVALUATE 0001 permit
+0033 0004 MACRAME_IDLE_AP_OFF_IND 0001 rame_idle_ap_state
+# Generated From macrame/macrame_idle/macrame_idle_ap/macrame_idle_ap_debug.xml
+trace_types 5
+MACRAME_IDLE_AP_CHECK_NOT_POSSIBLE.id Natural8
+MACRAME_IDLE_AP_LITE_EVALUATE.permit Natural8
+MACRAME_IDLE_AP_OFF_IND.rame_idle_ap_state Natural8
+MACRAME_IDLE_AP_CHECK_POSSIBLE.__LINE__ __LINE__
+MACRAME_IDLE_AP_MIFLESS_EVALUATE.permit Natural8
+# Generated From macrame/macrame_idle/macrame_idle_sta/macrame_idle_sta_debug.xml
+trace_def 2
+004c 0000 MACRAME_IDLE_STA_CHECK 0001 __LINE__
+004c 0001 MACRAME_IDLE_STA_EVALUATE 0001 permit
+# Generated From macrame/macrame_idle/macrame_idle_sta/macrame_idle_sta_debug.xml
+trace_types 2
+MACRAME_IDLE_STA_EVALUATE.permit Natural8
+MACRAME_IDLE_STA_CHECK.__LINE__ __LINE__
+# Generated From macrame/macrame_api/macrame_api_mlme_debug.xml
+trace_def 70
+0032 0000 MACRAME_API_MLME_ADJUST_TX_POWER 0001 tx_power
+0032 0001 MACRAME_API_MLME_ALLOW_ALL_BEACONS_REQUEST 0001 allow
+0032 0002 MACRAME_API_MLME_BA_ADD_REQUEST 0007 peer_qsta_address user_priority direction buf_size block_ack_timeout starting_sequence_number amsdu_permitted
+0032 0003 MACRAME_API_MLME_BA_DELETE_REQUEST 0004 sta_mac user_priority direction send_cfm
+0032 0004 MACRAME_API_MLME_BEACON_DEREGISTER_TRACKING_REQUEST 0000
+0032 0005 MACRAME_API_MLME_BEACON_REGISTER_TRACKING_REQUEST 0001 source_pid
+0032 0006 MACRAME_API_MLME_BLACKOUT_ADD_REQUEST 0008 blackout_id type source start_ref period duration count flags
+0032 0007 MACRAME_API_MLME_BLACKOUT_DELETE_REQUEST 0002 blackout_id type
+0032 0008 MACRAME_API_MLME_CHANNEL_BUSY 0004 time_ref mac_busy mac_busy_ref busy_percentage
+0032 0009 MACRAME_API_MLME_CONFIG_QUEUE_REQUEST 0006 queue_index acm aifs ecwmin ecwmax txop_limit
+0032 000a MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST 0005 rssi_low_threshold rssi_high_threshold rssi_cu_low_threshold rssi_cu_high_threshold result_code
+0032 000b MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_DEL_REQUEST 0001 result_code
+0032 000c MACRAME_API_MLME_CTW_CONFIG_REQUEST 0001 ctw
+0032 000d MACRAME_API_MLME_DELETE_KEY 0004 latest_key_only key_type sta_mac __LINE__
+0032 000e MACRAME_API_MLME_DWELLTIME_RESET_REQUEST 0000
+0032 000f MACRAME_API_MLME_EVENT_INDICATION 0001 event_id
+0032 0010 MACRAME_API_MLME_GET_KEY_REQUEST 0002 key_id key_type
+0032 0011 MACRAME_API_MLME_GET_RSSI 0002 rssi result
+0032 0012 MACRAME_API_MLME_HOST_SUSPEND_RESUME_INDICATION 0000
+0032 0013 MACRAME_API_MLME_KEY_FIND 0001 address
+0032 0014 MACRAME_API_MLME_MONITOR_RSSI 0003 low_threshold high_threshold enabled
+0032 0015 MACRAME_API_MLME_NAN_CLUSTER_CONFIG 0003 cluster_id beacon_timestamp_l beacon_receive_time
+0032 0016 MACRAME_API_MLME_NAN_SET_DISCOVERY_BEACON 0001 frame
+0032 0017 MACRAME_API_MLME_NAN_SET_SYNC_BEACON 0001 frame
+0032 0018 MACRAME_API_MLME_NOA_ADD_INDICATION 0006 blackout_id start_ref period duration count flags
+0032 0019 MACRAME_API_MLME_NOA_DELETE_INDICATION 0001 blackout_id
+0032 001a MACRAME_API_MLME_SCAN_DONE_INDICATION 0000
+0032 001b MACRAME_API_MLME_SCAN_START_INDICATION 0000
+0032 001c MACRAME_API_MLME_SCREEN_UPDATE 0000
+0032 001d MACRAME_API_MLME_SCREEN_UPDATE_FSM 0000
+0032 001e MACRAME_API_MLME_SET_AC_MEDIUM_TIME 0003 user_priority medium_time result_code
+0032 001f MACRAME_API_MLME_SET_BSS_REQUEST_AP 0004 vif_type bssid beacon_period dtim_period
+0032 0020 MACRAME_API_MLME_SET_BSS_REQUEST_STATION 0002 vif_type bssid
+0032 0021 MACRAME_API_MLME_SET_GROUP_MANAGEMENT_INFO 0000
+0032 0022 MACRAME_API_MLME_SET_KEY 0004 key_id key_type address cipher_suite_selector
+0032 0023 MACRAME_API_MLME_SET_PACKET_FILTER 0005 pid filter_id num_desc packet_filter_mode result_code
+0032 0024 MACRAME_API_MLME_SET_POWERMGT_REQUEST 0001 mode
+0032 0025 MACRAME_API_MLME_SET_RADIO_MULTIPLEXING 0001 mplex
+0032 0026 MACRAME_API_MLME_SET_SHORT_SLOT_TIME_REQUEST 0001 short_time
+0032 0027 MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST 0004 address frame_type frame_subtype scope
+0032 0028 MACRAME_API_MLME_STA_CLEAR 0001 address
+0032 0029 MACRAME_API_MLME_STA_CONNECT_DONE_INDICATION 0000
+0032 002a MACRAME_API_MLME_STA_CONNECT_START_INDICATION 0000
+0032 002b MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST 0002 sta_mac status
+0032 002c MACRAME_API_MLME_STA_DHCP_ACK_INDICATION 0000
+0032 002d MACRAME_API_MLME_STA_DHCP_DISCOVER_INDICATION 0000
+0032 002e MACRAME_API_MLME_STA_DHCP_DONE_INDICATION 0000
+0032 002f MACRAME_API_MLME_STA_DHCP_OFFER_INDICATION 0000
+0032 0030 MACRAME_API_MLME_STA_DHCP_REQUEST_INDICATION 0000
+0032 0031 MACRAME_API_MLME_STA_DHCP_START_INDICATION 0000
+0032 0032 MACRAME_API_MLME_STA_EAPOL_DONE_INDICATION 0000
+0032 0033 MACRAME_API_MLME_STA_EAPOL_START_INDICATION 0000
+0032 0034 MACRAME_API_MLME_STA_GET_LAST_ACTIVITY 0003 address last_activity_time result
+0032 0035 MACRAME_API_MLME_STA_GET_LAST_TRANSMIT 0003 address last_transmit_time result
+0032 0036 MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED 0003 address last_transmit_time result
+0032 0037 MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY 0003 address last_unicast_activity_time result
+0032 0038 MACRAME_API_MLME_STA_INIT 0002 station_addr tdls_peer
+0032 0039 MACRAME_API_MLME_STA_RESET_RATES 0001 peer_addr
+0032 003a MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM 0003 address direction result_code
+0032 003b MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST 0002 enable ttp
+0032 003c MACRAME_API_MLME_TX_FRAME_REQUEST 0007 frame flags pri control_tag dwell_time tx_lifetime fc
+0032 003d MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST 0003 frame_type frame_subtype scope
+0032 003e MACRAME_API_MLME_VIF_CREATE_INIT 0000
+0032 003f MACRAME_API_MLME_VIF_DEREGISTER_REQUEST 0000
+0032 0040 MACRAME_API_MLME_VIF_DESCHEDULE_REQUEST 0000
+0032 0041 MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE 0003 desired_nss current_num_antennas new_num_antennas
+0032 0042 MACRAME_API_MLME_VIF_PROTECTION_CONFIG_REQUEST 0000
+0032 0043 MACRAME_API_MLME_VIF_SCHEDULE_UPDATE_INDICATION 0000
+0032 0044 MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST 0009 channel_freq channel_info max_air_power air_pwr_type regulatory_domain flags sched_time duration num_antennas_expected
+0032 0045 MACRAME_MLME_ATTEMPT_DTIM_LISTEN 0001 enable
+# Generated From macrame/macrame_api/macrame_api_mlme_debug.xml
+trace_types 110
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.address MAC_Address
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.frame_type MLME_FRAME_TYPE
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.frame_subtype Natural8
+MACRAME_API_MLME_STA_CANCEL_FRAME_REQUEST.scope Natural8
+MACRAME_API_MLME_BLACKOUT_DELETE_REQUEST.type BLACKOUT_TYPE
+MACRAME_API_MLME_MONITOR_RSSI.low_threshold Integer16
+MACRAME_API_MLME_MONITOR_RSSI.high_threshold Integer16
+MACRAME_API_MLME_MONITOR_RSSI.enabled Boolean
+MACRAME_API_MLME_TX_FRAME_REQUEST.frame MBULK
+MACRAME_API_MLME_TX_FRAME_REQUEST.pri PRIORITY
+MACRAME_API_MLME_TX_FRAME_REQUEST.control_tag Natural64
+MACRAME_API_MLME_TX_FRAME_REQUEST.dwell_time Natural32
+MACRAME_API_MLME_TX_FRAME_REQUEST.tx_lifetime Natural32
+MACRAME_API_MLME_SET_AC_MEDIUM_TIME.user_priority PRIORITY
+MACRAME_API_MLME_SET_AC_MEDIUM_TIME.result_code RESULT_CODE
+MACRAME_API_MLME_SET_BSS_REQUEST_AP.vif_type VIF_TYPE
+MACRAME_API_MLME_SET_BSS_REQUEST_AP.bssid MAC_Address
+MACRAME_API_MLME_BA_ADD_REQUEST.peer_qsta_address MAC_Address
+MACRAME_API_MLME_BA_ADD_REQUEST.user_priority PRIORITY
+MACRAME_API_MLME_BA_ADD_REQUEST.direction DIRECTION
+MACRAME_API_MLME_BA_ADD_REQUEST.block_ack_timeout TIME_UNITS
+MACRAME_API_MLME_BA_ADD_REQUEST.amsdu_permitted Boolean
+MACRAME_API_MLME_SET_BSS_REQUEST_STATION.vif_type VIF_TYPE
+MACRAME_API_MLME_SET_BSS_REQUEST_STATION.bssid MAC_Address
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.type BLACKOUT_TYPE
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.source BLACKOUT_SOURCE
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.start_ref Natural32
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.period Natural32
+MACRAME_API_MLME_BLACKOUT_ADD_REQUEST.duration Natural32
+MACRAME_MLME_ATTEMPT_DTIM_LISTEN.enable Boolean
+MACRAME_API_MLME_GET_RSSI.rssi Integer16
+MACRAME_API_MLME_GET_RSSI.result Boolean
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.last_unicast_activity_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_UNICAST_ACTIVITY.result Boolean
+MACRAME_API_MLME_STA_INIT.station_addr MAC_Address
+MACRAME_API_MLME_STA_INIT.tdls_peer Boolean
+MACRAME_API_MLME_DELETE_KEY.latest_key_only Boolean
+MACRAME_API_MLME_DELETE_KEY.key_type KEY_TYPE
+MACRAME_API_MLME_DELETE_KEY.sta_mac MAC_Address
+MACRAME_API_MLME_DELETE_KEY.__LINE__ __LINE__
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.frame_type Natural8
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.frame_subtype Natural8
+MACRAME_API_MLME_VIF_CANCEL_FRAME_REQUEST.scope Natural8
+MACRAME_API_MLME_SET_SHORT_SLOT_TIME_REQUEST.short_time Boolean
+MACRAME_API_MLME_SET_KEY.key_type Key_Type
+MACRAME_API_MLME_SET_KEY.address MAC_Address
+MACRAME_API_MLME_SET_KEY.cipher_suite_selector Natural32
+MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST.sta_mac MAC_Address
+MACRAME_API_MLME_STA_CONNECT_STATUS_REQUEST.status CONNECTION_STATUS
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.desired_nss Natural8
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.current_num_antennas Natural8
+MACRAME_API_MLME_VIF_DESIRED_NSS_CHANGE.new_num_antennas Natural8
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.last_activity_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_ACTIVITY.result Boolean
+MACRAME_API_MLME_BA_DELETE_REQUEST.sta_mac MAC_Address
+MACRAME_API_MLME_BA_DELETE_REQUEST.user_priority PRIORITY
+MACRAME_API_MLME_BA_DELETE_REQUEST.direction DIRECTION
+MACRAME_API_MLME_BA_DELETE_REQUEST.send_cfm Boolean
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_low_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_high_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_cu_low_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.rssi_cu_high_threshold Decibels
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_ADD_REQUEST.result_code RESULT_CODE
+MACRAME_API_MLME_NAN_SET_SYNC_BEACON.frame MBULK
+MACRAME_API_MLME_NAN_SET_DISCOVERY_BEACON.frame MBULK
+MACRAME_API_MLME_STA_CLEAR.address MAC_Address
+MACRAME_API_MLME_NOA_ADD_INDICATION.start_ref Natural32
+MACRAME_API_MLME_NOA_ADD_INDICATION.period Natural32
+MACRAME_API_MLME_NOA_ADD_INDICATION.duration Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.last_transmit_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT.result Boolean
+MACRAME_API_MLME_GET_KEY_REQUEST.key_type KEY_TYPE
+MACRAME_API_MLME_SET_POWERMGT_REQUEST.mode POWER_MANAGEMENT_MODE
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.cluster_id MAC_Address
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.beacon_timestamp_l Natural32
+MACRAME_API_MLME_NAN_CLUSTER_CONFIG.beacon_receive_time Natural32
+MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST.enable Boolean
+MACRAME_API_MLME_TDLS_ENABLE_TRAFFIC_REPORT_REQUEST.ttp Natural32
+MACRAME_API_MLME_SET_RADIO_MULTIPLEXING.mplex Natural32
+MACRAME_API_MLME_CONNECTION_QUALITY_TRIGGER_DEL_REQUEST.result_code RESULT_CODE
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.channel_freq CHANNEL_FREQUENCY
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.channel_info CHANNEL_INFORMATION
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.max_air_power Integer16
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.air_pwr_type CHANNEL_INFORMATION
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.regulatory_domain REGULATORY_DOMAIN
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.flags Natural8
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.sched_time Natural32
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.duration Integer32
+MACRAME_API_MLME_VIF_SET_CHANNEL_REQUEST.num_antennas_expected Natural8
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.address MAC_Address
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.direction DIRECTION
+MACRAME_API_MLME_STA_RESET_SEQUENCE_NUM.result_code RESULT_CODE
+MACRAME_API_MLME_STA_RESET_RATES.peer_addr MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.address MAC_Address
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.last_transmit_time Natural32
+MACRAME_API_MLME_STA_GET_LAST_TRANSMIT_ENCRYPTED.result Boolean
+MACRAME_API_MLME_SET_PACKET_FILTER.pid FsmProcessId
+MACRAME_API_MLME_SET_PACKET_FILTER.packet_filter_mode PACKET_FILTER_MODE
+MACRAME_API_MLME_SET_PACKET_FILTER.result_code RESULT_CODE
+MACRAME_API_MLME_KEY_FIND.address MAC_Address
+MACRAME_API_MLME_CONFIG_QUEUE_REQUEST.acm Boolean
+MACRAME_API_MLME_BEACON_REGISTER_TRACKING_REQUEST.source_pid FsmProcessId
+MACRAME_API_MLME_ALLOW_ALL_BEACONS_REQUEST.allow Boolean
+MACRAME_API_MLME_CHANNEL_BUSY.time_ref Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.mac_busy Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.mac_busy_ref Natural32
+MACRAME_API_MLME_CHANNEL_BUSY.busy_percentage Natural32
+# Generated From macrame/macrame_api/macrame_api_coex_debug.xml
+trace_def 22
+002a 0000 MACRAME_API_COEX_BLACKOUT_ATTACH 0002 handle vix_bitmap
+002a 0001 MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED 0002 handle vix_bitmap_applied
+002a 0002 MACRAME_API_COEX_BLACKOUT_CREATE 0004 period duration start_time req_flags
+002a 0003 MACRAME_API_COEX_BLACKOUT_DESTROY 0001 handle
+002a 0004 MACRAME_API_COEX_BLACKOUT_DETACH 0002 handle vix_bitmap
+002a 0005 MACRAME_API_COEX_BLACKOUT_MASK 0002 handle vix_bitmap
+002a 0006 MACRAME_API_COEX_BLACKOUT_UNMASK 0002 handle vix_bitmap
+002a 0007 MACRAME_API_COEX_BLACKOUT_UPDATE 0005 handle period duration start_time req_flags
+002a 0008 MACRAME_API_COEX_FORCE_MIN_TX_RATE 0002 vix_bitmap rate
+002a 0009 MACRAME_API_COEX_GET_SCHEULABLE_VIX_BITMAP 0000
+002a 000a MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT 0003 noa_duration prev_noa_duration __LINE__
+002a 000b MACRAME_API_COEX_PS_FORCE_ACTIVE 0001 vix_bitmap
+002a 000c MACRAME_API_COEX_PS_RESTORE 0001 vix_bitmap
+002a 000d MACRAME_API_COEX_RESTORE_MAX_CLEAR_TIMEOUT 0001 vix_bitmap
+002a 000e MACRAME_API_COEX_RESTORE_MIN_TX_RATE 0001 vix_bitmap
+002a 000f MACRAME_API_COEX_RESTRICT_WLAN 0004 restrict_start restrict_duration is_scheduled eol_extension
+002a 0010 MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT 0002 vix_bitmap timeout
+002a 0011 MACRAME_API_COEX_SET_TX_PRIORITY 0001 coex_priority
+002a 0012 MACRAME_API_COEX_VIF_GET_CLEAR_TIME 0000
+002a 0013 MACRAME_API_COEX_VIF_GET_NEXT_DTIM_TIME 0000
+002a 0014 MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS 0002 vix_bitmap wake_up
+002a 0015 MACRAME_API_USPBO_CONFIG 0006 flags cts_tx_lifetime cts_backoff_time cts_duration rx_period rx_duration
+# Generated From macrame/macrame_api/macrame_api_coex_debug.xml
+trace_types 40
+MACRAME_API_COEX_BLACKOUT_ATTACH.handle Natural32
+MACRAME_API_COEX_BLACKOUT_ATTACH.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_MASK.handle Natural32
+MACRAME_API_COEX_BLACKOUT_MASK.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_UPDATE.handle Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.period Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.duration Natural32
+MACRAME_API_COEX_BLACKOUT_UPDATE.start_time Natural32
+MACRAME_API_COEX_PS_FORCE_ACTIVE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_DESTROY.handle Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.period Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.duration Natural32
+MACRAME_API_COEX_BLACKOUT_CREATE.start_time Natural32
+MACRAME_API_COEX_FORCE_MIN_TX_RATE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_MAX_CLEAR_TIMEOUT.timeout Integer32
+MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED.handle Natural32
+MACRAME_API_COEX_BLACKOUT_ATTACH_APPLIED.vix_bitmap_applied VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_UNMASK.handle Natural32
+MACRAME_API_COEX_BLACKOUT_UNMASK.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_SET_TX_PRIORITY.coex_priority Natural8
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.noa_duration Natural32
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.prev_noa_duration Natural32
+MACRAME_API_COEX_NOA_DURATION_FOR_CONCURRENT.__LINE__ __LINE__
+MACRAME_API_COEX_RESTORE_MAX_CLEAR_TIMEOUT.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_BLACKOUT_DETACH.handle Natural32
+MACRAME_API_COEX_BLACKOUT_DETACH.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_PS_RESTORE.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_RESTRICT_WLAN.restrict_start Natural32
+MACRAME_API_COEX_RESTRICT_WLAN.restrict_duration Integer32
+MACRAME_API_COEX_RESTRICT_WLAN.is_scheduled Boolean
+MACRAME_API_COEX_RESTRICT_WLAN.eol_extension Integer32
+MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS.vix_bitmap VIX_BM_T
+MACRAME_API_COEX_WAKE_UP_ON_BEACON_MISS.wake_up Boolean
+MACRAME_API_COEX_RESTORE_MIN_TX_RATE.vix_bitmap VIX_BM_T
+MACRAME_API_USPBO_CONFIG.cts_tx_lifetime Integer32
+MACRAME_API_USPBO_CONFIG.cts_backoff_time Integer32
+MACRAME_API_USPBO_CONFIG.cts_duration Integer32
+MACRAME_API_USPBO_CONFIG.rx_period Integer32
+MACRAME_API_USPBO_CONFIG.rx_duration Integer32
+# Generated From macrame/macrame_api/macrame_api_dplane_debug.xml
+trace_def 35
+0011 0000 MACRAME_API_DPLANE_BA_ERROR_IND 0004 sta_mac prio direction reason
+0011 0001 MACRAME_API_DPLANE_BA_TX_ERROR_IND 0002 start_seq_nr sta_mac
+0011 0002 MACRAME_API_DPLANE_BEACON_TX_FINISHED_IND 0002 seq_nr txstatus
+0011 0003 MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND 0002 frame txstatus
+0011 0004 MACRAME_API_DPLANE_DELBA_CFM 0000
+0011 0005 MACRAME_API_DPLANE_DPD_FRAME_SENT_IND 0002 frame txstatus
+0011 0006 MACRAME_API_DPLANE_FRAME_RX_IND 0001 frame
+0011 0007 MACRAME_API_DPLANE_GET_SHED_PRIMARY_VIX 0002 mac_instance vix_bm
+0011 0008 MACRAME_API_DPLANE_MATCHED_FILTER_IND 0005 frame dest_pid filter_id packet_filter_mode mac_hdr_len
+0011 0009 MACRAME_API_DPLANE_MCAST_SERVICE_END_IND 0000
+0011 000a MACRAME_API_DPLANE_MGMT_TX_CFM 0006 frame pid txstatus retrys host_tag control_tag
+0011 000b MACRAME_API_DPLANE_MIC_FAILURE_IND 0001 frame
+0011 000c MACRAME_API_DPLANE_MM_CFM 0004 source_pid txstatus control_tag receiver_address
+0011 000d MACRAME_API_DPLANE_NAN_SDF_CALLBACK 0001 txstatus
+0011 000e MACRAME_API_DPLANE_NULL_ANNOUNCE_FRAME_PROCESSED_IND 0002 seq_nr txstatus
+0011 000f MACRAME_API_DPLANE_PAUSE_RESUME_CFM 0000
+0011 0010 MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND 0002 sta_addr power_save
+0011 0011 MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND 0002 frame txstatus
+0011 0012 MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND 0002 frame txstatus
+0011 0013 MACRAME_API_DPLANE_PS_SERVICE_END_IND 0001 moredata
+0011 0014 MACRAME_API_DPLANE_PS_SERVICE_TRIGGERED_IND 0000
+0011 0015 MACRAME_API_DPLANE_PS_UPDATE_IND 0002 vif_is_sta sta_ps_state
+0011 0016 MACRAME_API_DPLANE_RX_ACTIVITY_OCCURED_IND 0002 mac_instance vix
+0011 0017 MACRAME_API_DPLANE_SEND_NULL_FRAME_IND 0000
+0011 0018 MACRAME_API_DPLANE_SPURIOUS_MOREBIT_IND 0000
+0011 0019 MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND 0002 frame txstatus
+0011 001a MACRAME_API_DPLANE_TDLS_PEER_PS_UPDATE_IND 0002 sta_mac tdls_ps_state
+0011 001b MACRAME_API_DPLANE_TDLS_PEER_SP_IND 0002 sta_mac du_bm
+0011 001c MACRAME_API_DPLANE_TX_CFM 0006 source_pid txstatus control_tag fc seq_num retry_count
+0011 001d MACRAME_API_DPLANE_UNKNOWN_PEER_IND 0001 peer_addr
+0011 001e MACRAME_API_DPLANE_UPDATE_RSSI_SNR_AVG 0000
+0011 001f MACRAME_API_DPLANE_VIF_ANNOUNCE_AVAILABILITY_IND 0000
+0011 0020 MACRAME_API_DPLANE_VIF_CHECK_CLEAR_IND 0000
+0011 0021 MACRAME_API_DPLANE_VIF_DELETE_CFM 0000
+0011 0022 MACRAME_FSM_DPLANE_PAUSE_RESUME_CFM 0000
+# Generated From macrame/macrame_api/macrame_api_dplane_debug.xml
+trace_types 47
+MACRAME_API_DPLANE_TDLS_PEER_SP_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_TDLS_PEER_SP_IND.du_bm Natural8
+MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND.frame MBULK
+MACRAME_API_DPLANE_PSPOLL_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_PS_UPDATE_IND.vif_is_sta Boolean
+MACRAME_API_DPLANE_DPD_FRAME_SENT_IND.frame MBULK
+MACRAME_API_DPLANE_DPD_FRAME_SENT_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_BA_ERROR_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_BA_ERROR_IND.prio PRIORITY
+MACRAME_API_DPLANE_BA_ERROR_IND.direction DIRECTION
+MACRAME_API_DPLANE_BA_ERROR_IND.reason REASON_CODE
+MACRAME_API_DPLANE_UNKNOWN_PEER_IND.peer_addr MAC_Address
+MACRAME_API_DPLANE_TX_CFM.source_pid FsmProcessId
+MACRAME_API_DPLANE_TX_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_TX_CFM.control_tag Natural64
+MACRAME_API_DPLANE_TX_CFM.retry_count Natural8
+MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND.frame MBULK
+MACRAME_API_DPLANE_STA_KEEPALIVE_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_TDLS_PEER_PS_UPDATE_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_MIC_FAILURE_IND.frame MBULK
+MACRAME_API_DPLANE_NAN_SDF_CALLBACK.txstatus Transmission_Status
+MACRAME_API_DPLANE_RX_ACTIVITY_OCCURED_IND.mac_instance Natural32
+MACRAME_API_DPLANE_BEACON_TX_FINISHED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_MGMT_TX_CFM.frame MBULK
+MACRAME_API_DPLANE_MGMT_TX_CFM.pid FsmProcessId
+MACRAME_API_DPLANE_MGMT_TX_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_MGMT_TX_CFM.control_tag Natural64
+MACRAME_API_DPLANE_FRAME_RX_IND.frame MBULK
+MACRAME_API_DPLANE_NULL_ANNOUNCE_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_BA_TX_ERROR_IND.sta_mac MAC_Address
+MACRAME_API_DPLANE_GET_SHED_PRIMARY_VIX.mac_instance Natural32
+MACRAME_API_DPLANE_PS_SERVICE_END_IND.moredata Boolean
+MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND.frame MBULK
+MACRAME_API_DPLANE_CTS_ANNOUNCE_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND.frame MBULK
+MACRAME_API_DPLANE_PERSISTENT_FRAME_PROCESSED_IND.txstatus Transmission_Status
+MACRAME_API_DPLANE_MM_CFM.source_pid FsmProcessId
+MACRAME_API_DPLANE_MM_CFM.txstatus Transmission_Status
+MACRAME_API_DPLANE_MM_CFM.control_tag Natural64
+MACRAME_API_DPLANE_MM_CFM.receiver_address MAC_Address
+MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND.sta_addr MAC_Address
+MACRAME_API_DPLANE_PEER_PS_STATE_UPDATE_IND.power_save Boolean
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.frame MBULK
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.dest_pid FsmProcessId
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.filter_id Natural8
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.packet_filter_mode Packet_Filter_Mode
+MACRAME_API_DPLANE_MATCHED_FILTER_IND.mac_hdr_len NAtural16
+# Generated From macrame/macrame_blackout/macrame_blackout_debug.xml
+trace_def 38
+001f 0000 MACRAME_ADD_CHIP_BLACKOUT 0008 dtim_time start_reference duration period count flags handle num_chip_blackouts
+001f 0001 MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS 0004 on host_conn sta_ps_state rx_only
+001f 0002 MACRAME_BLACKOUT_ACTIVATE_USPBO 0002 blackout_masked next_blackout_state_change_valid
+001f 0003 MACRAME_BLACKOUT_ACTIVITIES_ALLOWED 0007 idx bo_type period duration start bo_id allowed
+001f 0004 MACRAME_BLACKOUT_ADD_BLACKOUT 0009 bo_id bo_type bo_source bo_start period duration count flags result
+001f 0005 MACRAME_BLACKOUT_ADD_COEX_LTE_BO 0003 start_ref duration period
+001f 0006 MACRAME_BLACKOUT_CHECK_USPBO_0 0001 uspbo_active
+001f 0007 MACRAME_BLACKOUT_CHECK_USPBO_1 0003 uspbo_active num_blackouts flags
+001f 0008 MACRAME_BLACKOUT_COEX_ATTACH_USPBO 0002 handle vix_bitmap
+001f 0009 MACRAME_BLACKOUT_COEX_ATTACH_VIF 0001 handle
+001f 000a MACRAME_BLACKOUT_COEX_DETACH_USPBO 0002 handle vix_bitmap
+001f 000b MACRAME_BLACKOUT_COEX_DETACH_VIF 0001 handle
+001f 000c MACRAME_BLACKOUT_COEX_MASK_UNMASK 0003 handle vix_bitmap mask
+001f 000d MACRAME_BLACKOUT_DBG_MAC_OFF_DONE 0001 value
+001f 000e MACRAME_BLACKOUT_DEACTIVATE_USPBO 0003 all_primary_bm blackout_masked next_blackout_state_change_valid
+001f 000f MACRAME_BLACKOUT_DEL_BLACKOUT 0002 bo_id result
+001f 0010 MACRAME_BLACKOUT_GET_SSS_BO_START_END 0004 state start duration eol_extension
+001f 0011 MACRAME_BLACKOUT_GET_USPBO_INFO 0005 flags period duration reference end_time
+001f 0012 MACRAME_BLACKOUT_GET_USPBO_INFO_IN 0003 bostart bostop flags
+001f 0013 MACRAME_BLACKOUT_GET_USPBO_INFO_OUT 0003 bostart bostop flags
+001f 0014 MACRAME_BLACKOUT_INFO 0007 bo_id flags start_reference duration scheduler_flags period end_time
+001f 0015 MACRAME_BLACKOUT_LTE_ENTER_RX_ONLY 0001 vifs_in_ps
+001f 0016 MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY 0002 vifs_in_ps prev_in_tx_only
+001f 0017 MACRAME_BLACKOUT_LTE_RX_ONLY_MODE 0003 next_update vifs_in_ps vifs_paused
+001f 0018 MACRAME_BLACKOUT_LTE_TX_ONLY_MODE 0003 next_update vifs_in_ps vifs_paused
+001f 0019 MACRAME_BLACKOUT_MASK_COEX_USPBO 0003 in_mask uspbo_active blackout_masked
+001f 001a MACRAME_BLACKOUT_MSG 0003 word16 word32 __LINE__
+001f 001b MACRAME_BLACKOUT_QUERY_BACKOFF_1 0006 idx start start_ref duration period stop
+001f 001c MACRAME_BLACKOUT_QUERY_BACKOFF_2 0004 idx backoff_time flags priority
+001f 001d MACRAME_BLACKOUT_QUERY_BLACKOUT 0008 Scheduler_flag vif_in_blackout start_time stop_time reference t idx bo_cause
+001f 001e MACRAME_BLACKOUT_REGISTER_BLACKOUT 0008 bo_id bo_type bo_source bo_start period duration count flags
+001f 001f MACRAME_BLACKOUT_RESTART_USPBO 0003 uspbo_active blackout_masked next_blackout_state_change_valid
+001f 0020 MACRAME_BLACKOUT_UPDATE_USPBO 0007 all_primary_bm bo_info_vix_bitmap bo_info_state blackout_masked next_blackout_state_change_valid timer_st cts_to_self_mode
+001f 0021 MACRAME_BLACKOUT_UPDATE_USPBO_CTS 0004 lte_uspbo_mode in_rx_only in_tx_only lte_ul_skip_count
+001f 0022 MACRAME_BLACKOUT_UPDATE_USPBO_ENTER 0007 bo_info_state fully_scheduled_vix_bm usbpo_vix_bitmap next_blackout_state_change_valid blackout_masked lte_ul_skip_count usbpo_prev_in_tx_only
+001f 0023 MACRAME_DEL_CHIP_BLACKOUT 0005 handle result rame_blackout_sco_like_active num_chip_blackouts ps_forced
+001f 0024 MACRAME_QUIET_INFO 0003 count current_time blackout_start_time
+001f 0025 MACRAME_SSS_BLACKOUT_UPDATE 0008 start duration initial_state new_state initial_inhibit_flags new_inhibit_flags timer_id timer_set
+# Generated From macrame/macrame_blackout/macrame_blackout_debug.xml
+trace_types 117
+MACRAME_BLACKOUT_COEX_DETACH_VIF.handle Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.period Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.duration Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.reference Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO.end_time Natural32
+MACRAME_BLACKOUT_DEL_BLACKOUT.result Result_Code
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.next_update Natural32
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_TX_ONLY_MODE.vifs_paused VIX_BM_T
+MACRAME_BLACKOUT_COEX_ATTACH_VIF.handle Natural32
+MACRAME_ADD_CHIP_BLACKOUT.dtim_time Natural32
+MACRAME_ADD_CHIP_BLACKOUT.start_reference Natural32
+MACRAME_ADD_CHIP_BLACKOUT.duration Natural32
+MACRAME_ADD_CHIP_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.bo_info_state RAMEDATA_USPBO_STATE_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.fully_scheduled_vix_bm VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.usbpo_vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.blackout_masked Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.lte_ul_skip_count Natural8
+MACRAME_BLACKOUT_UPDATE_USPBO_ENTER.usbpo_prev_in_tx_only Boolean
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.start Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.start_ref Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.duration Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.period Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_1.stop Natural32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.start_ref Natural32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.duration Integer32
+MACRAME_BLACKOUT_ADD_COEX_LTE_BO.period Integer32
+MACRAME_BLACKOUT_UPDATE_USPBO.all_primary_bm VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO.bo_info_vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_UPDATE_USPBO.bo_info_state RAMEDATA_USPBO_STATE_T
+MACRAME_BLACKOUT_UPDATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO.timer_st Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO.cts_to_self_mode Boolean
+MACRAME_BLACKOUT_QUERY_BLACKOUT.vif_in_blackout Boolean
+MACRAME_BLACKOUT_QUERY_BLACKOUT.start_time Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.stop_time Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.reference Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.t Natural32
+MACRAME_BLACKOUT_QUERY_BLACKOUT.bo_cause BLACKOUT_ELEMENT_FLAGS_T
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.all_primary_bm VIX_BM_T
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_DEACTIVATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.state SHAREDDATA_VIF_SSS_STATE_T
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.start Natural32
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.duration Integer32
+MACRAME_BLACKOUT_GET_SSS_BO_START_END.eol_extension Integer32
+MACRAME_BLACKOUT_CHECK_USPBO_1.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_RESTART_USPBO.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_RESTART_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_RESTART_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_ENTER_TX_ONLY.prev_in_tx_only Boolean
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_source BLACKOUT_SOURCE
+MACRAME_BLACKOUT_ADD_BLACKOUT.bo_start Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.duration Natural32
+MACRAME_BLACKOUT_ADD_BLACKOUT.result Result_Code
+MACRAME_BLACKOUT_COEX_DETACH_USPBO.handle Natural32
+MACRAME_BLACKOUT_COEX_DETACH_USPBO.vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_source BLACKOUT_SOURCE
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.bo_start Natural32
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.period Natural32
+MACRAME_BLACKOUT_REGISTER_BLACKOUT.duration Natural32
+MACRAME_BLACKOUT_ACTIVATE_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_ACTIVATE_USPBO.next_blackout_state_change_valid Boolean
+MACRAME_QUIET_INFO.current_time Natural32
+MACRAME_QUIET_INFO.blackout_start_time Natural32
+MACRAME_BLACKOUT_QUERY_BACKOFF_2.backoff_time Integer32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.bo_type BLACKOUT_TYPE
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.period Natural32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.duration Natural32
+MACRAME_BLACKOUT_ACTIVITIES_ALLOWED.start Natural32
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.lte_uspbo_mode Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.in_rx_only Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.in_tx_only Boolean
+MACRAME_BLACKOUT_UPDATE_USPBO_CTS.lte_ul_skip_count Natural8
+MACRAME_BLACKOUT_GET_USPBO_INFO_OUT.bostart Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_OUT.bostop Natural32
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.on Boolean
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.host_conn Boolean
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.sta_ps_state SHAREDDATA_802_PS_T
+MACRAME_BLACKOUT_ABOUT_TO_ENTER_FORCED_PS_PS.rx_only Boolean
+MACRAME_SSS_BLACKOUT_UPDATE.start Natural32
+MACRAME_SSS_BLACKOUT_UPDATE.duration Integer32
+MACRAME_SSS_BLACKOUT_UPDATE.timer_id Natural32
+MACRAME_SSS_BLACKOUT_UPDATE.timer_set Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_IN.bostart Natural32
+MACRAME_BLACKOUT_GET_USPBO_INFO_IN.bostop Natural32
+MACRAME_BLACKOUT_INFO.bo_id BLACKOUT_ID
+MACRAME_BLACKOUT_INFO.start_reference Natural32
+MACRAME_BLACKOUT_INFO.duration Natural32
+MACRAME_BLACKOUT_INFO.period Natural32
+MACRAME_BLACKOUT_INFO.end_time Natural32
+MACRAME_BLACKOUT_MSG.word32 Natural32
+MACRAME_BLACKOUT_MSG.__LINE__ __LINE__
+MACRAME_DEL_CHIP_BLACKOUT.result Result_Code
+MACRAME_DEL_CHIP_BLACKOUT.rame_blackout_sco_like_active Boolean
+MACRAME_DEL_CHIP_BLACKOUT.ps_forced Boolean
+MACRAME_BLACKOUT_LTE_ENTER_RX_ONLY.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_DBG_MAC_OFF_DONE.value Natural32
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.handle Natural32
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.vix_bitmap VIX_BM_T
+MACRAME_BLACKOUT_COEX_MASK_UNMASK.mask Boolean
+MACRAME_BLACKOUT_MASK_COEX_USPBO.in_mask Boolean
+MACRAME_BLACKOUT_MASK_COEX_USPBO.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_MASK_COEX_USPBO.blackout_masked Boolean
+MACRAME_BLACKOUT_CHECK_USPBO_0.uspbo_active RAMEDATA_USPBO_T
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.next_update Natural32
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.vifs_in_ps VIX_BM_T
+MACRAME_BLACKOUT_LTE_RX_ONLY_MODE.vifs_paused VIX_BM_T
+MACRAME_BLACKOUT_COEX_ATTACH_USPBO.handle Natural32
+MACRAME_BLACKOUT_COEX_ATTACH_USPBO.vix_bitmap VIX_BM_T
+RAMEDATA_USPBO_STATE_T Enum 0 RAMEDATA_USPBO_INACTIVE 1 RAMEDATA_USPBO_CTS_TO_SELF 2 RAMEDATA_USPBO_IN_BO 3 RAMEDATA_USPBO_OUTSIDE_BO
+BLACKOUT_ELEMENT_FLAGS_T Enum 0000 BLACKOUT_RESET 0001 BLACKOUT_INITIALISED 0002 BLACKOUT_ENABLED 0004 BLACKOUT_IN_BLACKOUT 0020 BLACKOUT_MASKED 0040 BLACKOUT_IS_COEX 0100 BLACKOUT_IS_ULTRA_SHORT_PERIODIC 0200 BLACKOUT_IS_FOR_CONCURRENT 0400 BLACKOUT_IS_ULTRA_SHORT
+# Generated From macrame/macrame_schdl/macrame_schdl_debug.xml
+trace_def 64
+000e 0000 MACRAME_SCHDL_CONCURRENT_SCAN 0004 vif_to_pause_bm bo_start bo_end __LINE__
+000e 0001 MACRAME_SCHDL_MGR_RESOURCES 0006 band_idx vifs_pending_resource vifs_using_antenna0 vifs_using_antenna1 vifs_releasing_antenna0 vifs_releasing_antenna1
+000e 0002 MACRAME_SCHDL_MGR_UPDATE_RESOURCES 0002 band_idx radio_bm
+000e 0003 MACRAME_SCHED_ADD_INSTANCE_TO_LIST 0003 pid count bitmap
+000e 0004 MACRAME_SCHED_APPLY_CHIP_BLACKOUT 0002 sched_next_vix next_reschedule_time
+000e 0005 MACRAME_SCHED_ASSIGN_RESOURCE 0007 available_antennas main_ant_idx num_preferred_ant is_releasing_resources vif_changed_scheduler mac_is_available vif_already_claimed_all_res
+000e 0006 MACRAME_SCHED_AVAILABLE_VIF 0005 force_duration max_schdl_interval available_end_time available_time_remain schdl_pid
+000e 0007 MACRAME_SCHED_BLACKOUT_START_TIME 0004 debug_location start_time deadline result
+000e 0008 MACRAME_SCHED_CHECK_CLEARING_RESOURCES 0006 schdl_instance instance_to_ignore vix_bm schdl_being_cleared radio_bm schdl_state
+000e 0009 MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ 0006 sched_type required_time_valid jetzt forced_end required_time_start required_time_end
+000e 000a MACRAME_SCHED_CHECK_FOR_PENDING_RES 0004 other_schdl_pid num_of_antenas_used schdl_fsm_num_of_antennas_pending other_scheduler_reched_req
+000e 000b MACRAME_SCHED_CLEAR_OLD_RES 0003 old_pid old_band_idx old_radio_bm
+000e 000c MACRAME_SCHED_COMMON_TIMING 0005 sleep wakeup mif_on_start mif_on_end c_start
+000e 000d MACRAME_SCHED_DELAY_DUE_TO_SINGLE_STA_SCAN 0000
+000e 000e MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE 0008 vifsc_schedulable sched_time duration sched_flags current_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 000f MACRAME_SCHED_DELAY_VIF_SCHEDULE 0007 sched_time duration sched_flags current_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 0010 MACRAME_SCHED_DESCHED 0003 sched_vix_bitmap sched_next_vix next_sched_type
+000e 0011 MACRAME_SCHED_DESCHED_NOW 0006 simultaneous_schedule_possible sched_vix_bitmap sched_next_vix vif_need_desched calculated_sched_vix_bitmap inhibit
+000e 0012 MACRAME_SCHED_DESCHED_REQUEST 0003 current_time sched_vix sched_vix_bitmap
+000e 0013 MACRAME_SCHED_DESCHED_RESPONSE 0000
+000e 0014 MACRAME_SCHED_EXTEND_SCHDL 0003 sched_vix_bitmap end_time prioritise_over_others
+000e 0015 MACRAME_SCHED_FSM_ALL_SCANS_DONE 0000
+000e 0016 MACRAME_SCHED_FSM_DEL_SCAN_BO 0000
+000e 0017 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_CORNER_CASE 0001 line
+000e 0018 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2 0003 time_now current_vif_req_time next_vif_req_time
+000e 0019 MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3 0003 end duration situation
+000e 001a MACRAME_SCHED_GET_CORRECTED_SCHED_TIME 0003 avg_duration samples result
+000e 001b MACRAME_SCHED_INIT_VARIABLES 0001 pid
+000e 001c MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT 0004 vif_get_assigned_num_antennas other_schdl_is_waiting other_schdl_schd_vix_bm num_of_free_antennas
+000e 001d MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_MAC_AVAILABLE 0002 schdl_fsm_pending_reschedule schdl_pid
+000e 001e MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE 0003 schdl_pid num_of_antennas_pending num_of_assigned_antennas
+000e 001f MACRAME_SCHED_MGR_SET_PROTECT_ACTIVE 0001 mimo_protect_active
+000e 0020 MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE 0002 old_num_antennas new_num_antennas
+000e 0021 MACRAME_SCHED_MGR_UPDATE_SCHDL_RADIO_BM 0004 resume_after_scheduler schdl_instance radio_bm paused_schdl_bm
+000e 0022 MACRAME_SCHED_MGR_VIF_IMPACTS_OTHER_VIFS 0002 impacted_vif_bm schdl_to_pause
+000e 0023 MACRAME_SCHED_NOW 0008 schedule_type concurrent_vif_bm inhibit schedule_state radio_state schdl_pid is_schedulable sched_vix
+000e 0024 MACRAME_SCHED_QUERY_BLACKOUT 0006 start_time stop_time start_time_valid stop_time_valid duration blackout_flags
+000e 0025 MACRAME_SCHED_RADIO_OFF 0001 schdl_pid
+000e 0026 MACRAME_SCHED_RADIO_OFF_RESCHEDULE_AT 0002 next_schedule_time schdl_pid
+000e 0027 MACRAME_SCHED_RADIO_ON 0002 radio_state schdl_pid
+000e 0028 MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING 0003 schdl_pid sched_radio_switch_off_start sched_radio_switch_off_done
+000e 0029 MACRAME_SCHED_RADIO_SWITCH_RESPONSE 0003 comms_chain_index schdl_instance radio_bm
+000e 002a MACRAME_SCHED_REDISTRIBUTE_RESOURCES 0004 schdl_pid radio_bm vifs_pending_schedule upgraded_vifs
+000e 002b MACRAME_SCHED_RELEASE_RESOURCE 0003 antenna_index band_index_to_ignore vifs_using_antenna_bm
+000e 002c MACRAME_SCHED_REQ_HIGH_PRIORITY 0003 sched_start sched_end sched_pri
+000e 002d MACRAME_SCHED_REQ_LOW_PRIORITY 0003 sched_start duration forced
+000e 002e MACRAME_SCHED_RESCHEDULE 0007 schdl_instance sched_state sched_type radio_bm schedulable_vix_bm force_sched_duration force_sched_time
+000e 002f MACRAME_SCHED_RESCHEDULE_AT 0002 when pid
+000e 0030 MACRAME_SCHED_RESCHEDULE_NOW 0002 scheduler_pid when
+000e 0031 MACRAME_SCHED_SCAN_CAN_CONCURR 0000
+000e 0032 MACRAME_SCHED_SCAN_CAN_CONCURR_FAIL 0001 __LINE__
+000e 0033 MACRAME_SCHED_SET_SCHED_END 0002 hdr_vif_end new_end
+000e 0034 MACRAME_SCHED_SWITCH_CHANNEL_DONE 0004 sched_vix_bm sched_vix force_reschedule schdl_pid
+000e 0035 MACRAME_SCHED_SWITCH_ON_TIMING 0003 schdl_radio_change_requested rice_radio_change_requested vif_ready
+000e 0036 MACRAME_SCHED_SWITCH_RESPONSE 0007 sched_vix_bitmap schedule_type radio_ready_time proc_overhead primary_chan_freq chan_freq chan_info
+000e 0037 MACRAME_SCHED_SWITCH_VIF 0004 inhibit schedule_state radio_state schdl_type
+000e 0038 MACRAME_SCHED_UPDATE_SCHEDULING_VIF 0008 schedule_type force_sched_duration sched_is_forced next_reschedule_time_valid next_reschedule_time priority_changed inhibit schdl_pid
+000e 0039 MACRAME_SCHED_UPGRADE_RESOURCES 0002 ant_available_band0 ant_available_band1
+000e 003a MACRAME_SCHED_VIF_CLEARED 0002 current_time inhibit
+000e 003b MACRAME_SCHED_VIF_DESCHED 0001 to_mlme_sched_desched
+000e 003c MACRAME_SCHED_VIF_RELEASING_RESOURCE 0005 vif_is_releasing_resources utils_radio_is_off vif_is_scheduled vif_is_waiting_schedule radio_switch_in_progress
+000e 003d MACRAME_SCHED_VIF_RELINQUISHING 0001 inhibit
+000e 003e MACRAME_SCHED_VIF_SCHEDULE 0008 sched_time duration sched_flags current_fsm_pid required_fsm_pid scan_is_active scan_bo_end_valid scan_bo_end
+000e 003f MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER 0005 schdl_instance radiomac_handle sched_vix schedulable_vix_bitmap sched_vix_bitmap
+# Generated From macrame/macrame_schdl/macrame_schdl_debug.xml
+trace_types 153
+MACRAME_SCHED_CHECK_CLEARING_RESOURCES.schdl_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING.sched_radio_switch_off_start Natural32
+MACRAME_SCHED_RADIO_SWITCH_OFF_TIMING.sched_radio_switch_off_done Natural32
+MACRAME_SCHED_SWITCH_VIF.schedule_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_SWITCH_VIF.schdl_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.vif_get_assigned_num_antennas Natural8
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.other_schdl_is_waiting Boolean
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.other_schdl_schd_vix_bm VIX_BM_T
+MACRAME_SCHED_MGR_CUR_RES_SUFFICIENT.num_of_free_antennas Natural8
+MACRAME_SCHED_RESCHEDULE_AT.when Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_CORNER_CASE.line __LINE__
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.force_sched_duration Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.sched_is_forced Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.next_reschedule_time_valid Boolean
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.next_reschedule_time Natural32
+MACRAME_SCHED_UPDATE_SCHEDULING_VIF.priority_changed Boolean
+MACRAME_SCHDL_MGR_UPDATE_RESOURCES.band_idx Natural8
+MACRAME_SCHED_REQ_LOW_PRIORITY.sched_start Natural32
+MACRAME_SCHED_REQ_LOW_PRIORITY.duration Integer32
+MACRAME_SCHED_REQ_LOW_PRIORITY.forced Boolean
+MACRAME_SCHED_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_NOW.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_NOW.concurrent_vif_bm VIX_BM_T
+MACRAME_SCHED_NOW.schedule_state RAMEDATA_SCHED_STATE
+MACRAME_SCHED_NOW.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_SCHED_NOW.is_schedulable Boolean
+MACRAME_SCHED_VIF_DESCHED.to_mlme_sched_desched VIF_Schedule_Type
+MACRAME_SCHED_RESCHEDULE_NOW.when Natural32
+MACRAME_SCHED_APPLY_CHIP_BLACKOUT.next_reschedule_time Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.start_time Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.deadline Natural32
+MACRAME_SCHED_BLACKOUT_START_TIME.result Natural32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_DELAY_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_DESCHED.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_DESCHED.next_sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHDL_CONCURRENT_SCAN.vif_to_pause_bm VIX_BM_T
+MACRAME_SCHDL_CONCURRENT_SCAN.bo_start Natural32
+MACRAME_SCHDL_CONCURRENT_SCAN.bo_end Natural32
+MACRAME_SCHDL_CONCURRENT_SCAN.__LINE__ __LINE__
+MACRAME_SCHED_RADIO_ON.radio_state RAMERAD_RADIO_STATE_T
+MACRAME_SCHED_EXTEND_SCHDL.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_EXTEND_SCHDL.end_time Natural32
+MACRAME_SCHED_EXTEND_SCHDL.prioritise_over_others Boolean
+MACRAME_SCHDL_MGR_RESOURCES.band_idx Natural8
+MACRAME_SCHDL_MGR_RESOURCES.vifs_pending_resource VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_using_antenna0 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_using_antenna1 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_releasing_antenna0 VIX_BM_T
+MACRAME_SCHDL_MGR_RESOURCES.vifs_releasing_antenna1 VIX_BM_T
+MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE.old_num_antennas Natural8
+MACRAME_SCHED_MGR_UPDATE_NUM_ANTENNA_PREFERENCE.new_num_antennas Natural8
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.vifsc_schedulable Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.sched_time Natural32
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.duration Integer32
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_is_active Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_bo_end_valid Boolean
+MACRAME_SCHED_DELAY_MAC_PENDING_VIF_SCHEDULE.scan_bo_end Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3.end Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA3.duration Integer32
+MACRAME_SCHED_VIF_CLEARED.current_time Natural32
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_releasing_resources Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.utils_radio_is_off Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_scheduled Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.vif_is_waiting_schedule Natural8
+MACRAME_SCHED_VIF_RELEASING_RESOURCE.radio_switch_in_progress Natural8
+MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER.radiomac_handle Natural8
+MACRAME_SCHED_WAIT_FOR_OTHER_SCHEDULER.sched_vix VIF_INDEX
+MACRAME_SCHED_UPGRADE_RESOURCES.ant_available_band0 VIX_BM_T
+MACRAME_SCHED_UPGRADE_RESOURCES.ant_available_band1 VIX_BM_T
+MACRAME_SCHED_RESCHEDULE.sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_RESCHEDULE.schedulable_vix_bm VIX_BM_T
+MACRAME_SCHED_RESCHEDULE.force_sched_duration Boolean
+MACRAME_SCHED_RESCHEDULE.force_sched_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.start_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.stop_time Natural32
+MACRAME_SCHED_QUERY_BLACKOUT.start_time_valid Natural8
+MACRAME_SCHED_QUERY_BLACKOUT.stop_time_valid Natural8
+MACRAME_SCHED_QUERY_BLACKOUT.duration Integer32
+MACRAME_SCHED_REDISTRIBUTE_RESOURCES.vifs_pending_schedule VIX_BM_T
+MACRAME_SCHED_REDISTRIBUTE_RESOURCES.upgraded_vifs VIX_BM_T
+MACRAME_SCHED_SCAN_CAN_CONCURR_FAIL.__LINE__ __LINE__
+MACRAME_SCHED_ASSIGN_RESOURCE.main_ant_idx Natural8
+MACRAME_SCHED_ASSIGN_RESOURCE.num_preferred_ant Natural8
+MACRAME_SCHED_ASSIGN_RESOURCE.is_releasing_resources Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.vif_changed_scheduler Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.mac_is_available Boolean
+MACRAME_SCHED_ASSIGN_RESOURCE.vif_already_claimed_all_res Boolean
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.time_now Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.current_vif_req_time Natural32
+MACRAME_SCHED_GET_AVAILABLE_TIME_MULTI_STA2.next_vif_req_time Natural32
+MACRAME_SCHED_SWITCH_CHANNEL_DONE.sched_vix_bm VIX_BM_T
+MACRAME_SCHED_SWITCH_CHANNEL_DONE.force_reschedule Boolean
+MACRAME_SCHED_RADIO_OFF_RESCHEDULE_AT.next_schedule_time Natural32
+MACRAME_SCHED_DESCHED_REQUEST.current_time Natural32
+MACRAME_SCHED_DESCHED_REQUEST.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_start Natural32
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_end Natural32
+MACRAME_SCHED_REQ_HIGH_PRIORITY.sched_pri SHAREDDATA_REQUIRED_SCHEDULE_PRIORITY
+MACRAME_SCHED_COMMON_TIMING.sleep Natural32
+MACRAME_SCHED_COMMON_TIMING.wakeup Natural32
+MACRAME_SCHED_COMMON_TIMING.mif_on_start Natural32
+MACRAME_SCHED_COMMON_TIMING.mif_on_end Natural32
+MACRAME_SCHED_COMMON_TIMING.c_start Natural32
+MACRAME_SCHED_SET_SCHED_END.hdr_vif_end Natural32
+MACRAME_SCHED_SET_SCHED_END.new_end Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_SWITCH_RESPONSE.schedule_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_SWITCH_RESPONSE.radio_ready_time Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.proc_overhead Natural32
+MACRAME_SCHED_SWITCH_RESPONSE.primary_chan_freq CHANNEL_FREQUENCY
+MACRAME_SCHED_SWITCH_RESPONSE.chan_freq CHANNEL_FREQUENCY
+MACRAME_SCHED_SWITCH_RESPONSE.chan_info CHANNEL_INFORMATION
+MACRAME_SCHED_SWITCH_ON_TIMING.schdl_radio_change_requested Natural32
+MACRAME_SCHED_SWITCH_ON_TIMING.rice_radio_change_requested Natural32
+MACRAME_SCHED_SWITCH_ON_TIMING.vif_ready Natural32
+MACRAME_SCHED_RADIO_SWITCH_RESPONSE.comms_chain_index Natural8
+MACRAME_SCHED_MGR_SET_PROTECT_ACTIVE.mimo_protect_active Boolean
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE.num_of_antennas_pending Natural8
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_RES_AVAILABLE.num_of_assigned_antennas Natural8
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.sched_type SHAREDDATA_SCHED_TYPE
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_valid Boolean
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.jetzt Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.forced_end Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_start Natural32
+MACRAME_SCHED_CHECK_FORCED_OVERLAPS_WITH_REQ.required_time_end Natural32
+MACRAME_SCHED_ADD_INSTANCE_TO_LIST.bitmap VIX_BM_T
+MACRAME_SCHED_MGR_REQ_RESCHEDULE_WHEN_MAC_AVAILABLE.schdl_fsm_pending_reschedule VIX_BM_T
+MACRAME_SCHED_RELEASE_RESOURCE.antenna_index Natural8
+MACRAME_SCHED_RELEASE_RESOURCE.band_index_to_ignore Natural8
+MACRAME_SCHED_RELEASE_RESOURCE.vifs_using_antenna_bm VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.simultaneous_schedule_possible Boolean
+MACRAME_SCHED_DESCHED_NOW.sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.vif_need_desched VIX_BM_T
+MACRAME_SCHED_DESCHED_NOW.calculated_sched_vix_bitmap VIX_BM_T
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.num_of_antenas_used Natural8
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.schdl_fsm_num_of_antennas_pending Natural8
+MACRAME_SCHED_CHECK_FOR_PENDING_RES.other_scheduler_reched_req Boolean
+MACRAME_SCHED_AVAILABLE_VIF.force_duration Boolean
+MACRAME_SCHED_AVAILABLE_VIF.max_schdl_interval Integer32
+MACRAME_SCHED_AVAILABLE_VIF.available_end_time Natural32
+MACRAME_SCHED_AVAILABLE_VIF.available_time_remain Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.avg_duration Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.samples Integer32
+MACRAME_SCHED_GET_CORRECTED_SCHED_TIME.result Integer32
+# Generated From macrame/macrame_powersave/macrame_ps_debug.xml
+trace_def 14
+001e 0000 MACRAME_ANNOUNCE_FRAME_PROCESSED 0009 ps_activity ps_bitmap pending_inds inhibit power_mgt_mode traffic_class tx_status seq_no ps_delay_timeout
+001e 0001 MACRAME_CAN_GO_ACTIVE 0009 ps_activity ps_bitmap pending_inds inhibit lp_sched_requested any_ps_activity power_mgt_mode traffic_class last_activity_time
+001e 0002 MACRAME_CAN_PS 0006 power_mgt_mode last_activity_time inhibit pending_inds sta_ps_bitmap tx_n_queued
+001e 0003 MACRAME_PS_CAN_SLEEP 0007 sta_ps_bitmap rame_tx_n_queued tx_n_queued tx_n_total_ready ps_state ps_activity __LINE__
+001e 0004 MACRAME_PS_CHANGE_STATE 0003 from to __LINE__
+001e 0005 MACRAME_PS_CHECK 0007 ps_state inhibit disallow_sched_relinquish require_rx_only use_lprx_only fast_timeout_us __LINE__
+001e 0006 MACRAME_PS_GET_LAST_ACTIVITY_TIME_1 0005 access_point last_activity_time ps_ind_last sta_tx_activity sta_rx_activity
+001e 0007 MACRAME_PS_GET_LAST_ACTIVITY_TIME_2 0003 last_sta_activity_time extra_listen_end power_mgt_mode
+001e 0008 MACRAME_PS_GOTO_PS 0001 __LINE__
+001e 0009 MACRAME_PS_LEAVE_PS 0001 __LINE__
+001e 000a MACRAME_PS_STAY_IN_ACTIVE 0001 __LINE__
+001e 000b MACRAME_PS_STAY_IN_PS 0001 __LINE__
+001e 000c MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME 0005 previous_poll_time next_poll_time extra_listen_end since_last_rx_activity power_mgt_mode
+001e 000d MACRAME_SEND_PS_NULL 0004 ps_state current_time tx_sw_deadline transmission_control
+# Generated From macrame/macrame_powersave/macrame_ps_debug.xml
+trace_types 43
+MACRAME_SEND_PS_NULL.ps_state SHAREDDATA_802_PS_T
+MACRAME_SEND_PS_NULL.current_time Natural32
+MACRAME_SEND_PS_NULL.tx_sw_deadline Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.last_sta_activity_time Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.extra_listen_end Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_2.power_mgt_mode SHAREDDATA_802_PS_T
+MACRAME_ANNOUNCE_FRAME_PROCESSED.ps_bitmap Natural8
+MACRAME_ANNOUNCE_FRAME_PROCESSED.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_ANNOUNCE_FRAME_PROCESSED.ps_delay_timeout Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.access_point MAC_Address
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.last_activity_time Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.ps_ind_last Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.sta_tx_activity Natural32
+MACRAME_PS_GET_LAST_ACTIVITY_TIME_1.sta_rx_activity Natural32
+MACRAME_PS_STAY_IN_PS.__LINE__ __LINE__
+MACRAME_PS_CHECK.ps_state SHAREDDATA_802_PS_T
+MACRAME_PS_CHECK.disallow_sched_relinquish Natural8
+MACRAME_PS_CHECK.require_rx_only Boolean
+MACRAME_PS_CHECK.use_lprx_only Boolean
+MACRAME_PS_CHECK.fast_timeout_us Natural32s
+MACRAME_PS_CHECK.__LINE__ __LINE__
+MACRAME_PS_STAY_IN_ACTIVE.__LINE__ __LINE__
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.previous_poll_time Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.next_poll_time Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.extra_listen_end Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.since_last_rx_activity Natural32
+MACRAME_PS_UPDATE_EXTRA_LISTEN_TIME.power_mgt_mode SHAREDDATA_802_PS_T
+MACRAME_PS_CAN_SLEEP.sta_ps_bitmap Natural8
+MACRAME_PS_CAN_SLEEP.ps_state SHAREDDATA_802_PS_T
+MACRAME_PS_CAN_SLEEP.__LINE__ __LINE__
+MACRAME_PS_GOTO_PS.__LINE__ __LINE__
+MACRAME_CAN_GO_ACTIVE.ps_bitmap Natural8
+MACRAME_CAN_GO_ACTIVE.lp_sched_requested Boolean
+MACRAME_CAN_GO_ACTIVE.any_ps_activity Boolean
+MACRAME_CAN_GO_ACTIVE.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_CAN_GO_ACTIVE.last_activity_time Natural32
+MACRAME_PS_CHANGE_STATE.from SHAREDDATA_802_PS_T
+MACRAME_PS_CHANGE_STATE.to SHAREDDATA_802_PS_T
+MACRAME_PS_CHANGE_STATE.__LINE__ __LINE__
+MACRAME_CAN_PS.power_mgt_mode VIF_POWER_MANAGEMENT_MODE
+MACRAME_CAN_PS.last_activity_time Natural32
+MACRAME_CAN_PS.sta_ps_bitmap Natural8
+MACRAME_PS_LEAVE_PS.__LINE__ __LINE__
+# Generated From fault/faults_debug.xml
+trace_def 2
+0002 0000 FAULTS_FAULT_RECORDED 0004 SubSystemId FaultLevel faultid Arg
+0002 0001 FAULTS_FILTERED 0004 SubSystemId FaultLevel Confession Arg
+# Generated From fault/faults_debug.xml
+trace_types 6
+FAULTS_FAULT_RECORDED.SubSystemId SUBSYSTEM_ID_T
+FAULTS_FAULT_RECORDED.FaultLevel FAULT_LEVEL_T
+FAULTS_FAULT_RECORDED.Arg Natural32
+FAULTS_FILTERED.SubSystemId SUBSYSTEM_ID_T
+FAULTS_FILTERED.FaultLevel FAULT_LEVEL_T
+FAULTS_FILTERED.Arg Natural32
+SUBSYSTEM_ID_T Enum 0001 SUBSYSTEM_IDS_COEX 0002 SUBSYSTEM_IDS_COMMON 0003 SUBSYSTEM_IDS_DPLANE 0004 SUBSYSTEM_IDS_MACRAME 0005 SUBSYSTEM_IDS_MLME 0006 SUBSYSTEM_IDS_RADIO 0007 SUBSYSTEM_LAST_ID
+FAULT_LEVEL_T Enum 0000 FAULT_LVL_ERROR 0001 FAULT_LVL_WARNING 0002 FAULT_LVL_INFO_1 0003 FAULT_LVL_INFO_2
+# Generated From packet_filter/packet_filter_debug.xml
+trace_def 4
+0037 0000 PACKET_FILTER_ADD 0004 id num_desc desc_list_len filter_mode
+0037 0001 PACKET_FILTER_DELETE_ALL 0000
+0037 0002 PACKET_FILTER_DELETE_SINGLE 0001 id
+0037 0003 PACKET_FILTER_MODE_REVERSED 0003 id old_filter_mode new_filter_mode
+# Generated From packet_filter/packet_filter_debug.xml
+trace_types 3
+PACKET_FILTER_MODE_REVERSED.id Natural8
+PACKET_FILTER_MODE_REVERSED.old_filter_mode Natural8
+PACKET_FILTER_MODE_REVERSED.new_filter_mode Natural8
+# Generated From packet_filter/apf/apf_debug.xml
+trace_def 4
+0049 0000 APF_HANDLER 0003 grp_pkt eth_type_offset eth_l3_len
+0049 0001 APF_READ_PARAMS 0002 total_len apf_program_len
+0049 0002 APF_RESULT 0002 apf_result packet_len
+0049 0003 APF_SET_PARAMS 0003 flt_mode apf_program_len apf_ram_len
+# Generated From packet_filter/apf/apf_debug.xml
+trace_types 3
+APF_SET_PARAMS.flt_mode Natural32
+APF_RESULT.apf_result Natural32
+APF_HANDLER.grp_pkt Boolean
+# Generated From rice/rice_rssi_debug.xml
+trace_def 32
+0031 0000 RICE_RSSI_INFO_PER_PKT 000c rx_mixer_gain_index rx_lna_gain_index rssi_dBm steps rssi_lin rssi_gain_adjustment_qdB centre_freq_half_mhz snr rssi_valid rx_digital_gain_step rx_bb_gain_index rx_fe_gain_index
+0031 0001 RICE_RSSI_LNA_MIXER 0005 rx_mixer_gain_index rx_lna_gain_index rx_fe_gain_index rssi_valid center_frequency_half_mhz
+0031 0002 RICE_RSSI_PER_PKT_FROM_MAC 0007 gain_steps rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm packet_count
+0031 0003 RICE_RSSI_VALIDITY 0008 gain_steps misc_gain rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm rssi_valid
+0031 0004 RICE_RSSI_FREQ_OFFSET_FAULT 0009 centre_freq_half_mhz ch_bandwidth freq_offset bb_freq_offset_val ppdu_rate rssi_valid phy_gain phy_misc_gain phy_rssi
+0031 0005 RICE_RSSI_DIG_GAIN 0005 bypass_digital_agc rx_digital_gain_step digital_gain_correction phy_misc_gain digital_gain_mask
+0031 0006 RICE_RSSI_DBM_CONVERSION 0006 rssi exp_index mant_index mlog elog rssi_dBm
+0031 0007 RICE_RSSI_VALIDITY2 0007 misc_gain rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm rssi_valid
+0031 0008 RICE_RSSI_FREQ_OFFSET_FAULT2 0008 centre_freq_half_mhz ch_bandwidth freq_offset bb_freq_offset_val ppdu_rate rssi_valid phy_misc_gain phy_rssi
+0031 0009 RICE_RSSI_DIG_GAIN2 0005 bypass_digital_agc rx_digital_gain_step digital_gain_correction phy_misc_gain digital_gain_mask
+0031 000a RICE_RSSI_PER_PKT_FROM_MAC2 0006 rssi_mac rssi_lin raw_rssi_dbm rssi_qdBm rssi_dBm packet_count
+0031 000b RICE_RSSI_AT_DETECTOR_POINTS 0004 rssi_dBm rssi_lna_dBm rssi_mixer_dBm rssi_bb_dBm
+0031 000c RICE_RSSI_PKT_GAIN_HIST 000c gain_word_0 gain_count_0 gain_word_1 gain_count_1 gain_word_2 gain_count_2 gain_word_3 gain_count_3 gain_word_4 gain_count_4 gain_word_5 gain_count_5
+0031 000d RICE_RSSI_PKT_MIN_MAX 0005 min_snr max_snr min_rssi max_rssi invalid_count
+0031 000e RICE_RSSI_PKT_SNR_HIST 000c snr_count_0 snr_count_1 snr_count_2 snr_count_3 snr_count_4 snr_count_5 snr_count_6 snr_count_7 snr_count_8 snr_count_9 snr_count_10 snr_count_11
+0031 000f RICE_RSSI_RX_COMP_AMP_HIST 000c comp_amplitude_count_0 comp_amplitude_count_1 comp_amplitude_count_2 comp_amplitude_count_3 comp_amplitude_count_4 comp_amplitude_count_5 comp_amplitude_count_6 comp_amplitude_count_7 comp_amplitude_count_8 comp_amplitude_count_9 comp_amplitude_count_10 comp_amplitude_count_11
+0031 0010 RICE_RSSI_RX_COMP_PH_HIST 000c comp_phase_count_0 comp_phase_count_1 comp_phase_count_2 comp_phase_count_3 comp_phase_count_4 comp_phase_count_5 comp_phase_count_6 comp_phase_count_7 comp_phase_count_8 comp_phase_count_9 comp_phase_count_10 comp_phase_count_11
+0031 0011 RICE_RSSI_RX_COMP_COEFFS_PKT 0005 packet_count rx_iq_comp_amplitude rx_iq_comp_phase rx_iq_comp_amplitude_averaged rx_iq_comp_phase_averaged
+0031 0012 RICE_RSSI_IQ_COMP_MIN_MAX 000a min_rx_comp_amplitude max_rx_comp_amplitude min_rx_comp_phase max_rx_comp_phase min_rx_comp_amplitude_averaged max_rx_comp_amplitude_averaged min_rx_comp_phase_averaged max_rx_comp_phase_averaged average_comp_amplitude_cal_averaged average_comp_phase_cal_averaged
+0031 0013 RICE_RSSI_RX_COMP_PH_AVE_HIST 000c comp_phase_averaged_count_0 comp_phase_averaged_count_1 comp_phase_averaged_count_2 comp_phase_averaged_count_3 comp_phase_averaged_count_4 comp_phase_averaged_count_5 comp_phase_averaged_count_6 comp_phase_averaged_count_7 comp_phase_averaged_count_8 comp_phase_averaged_count_9 comp_phase_averaged_count_10 comp_phase_averaged_count_11
+0031 0014 RICE_RSSI_RX_COMP_AMP_AVE_HIST 000c comp_amplitude_averaged_count_0 comp_amplitude_averaged_count_1 comp_amplitude_averaged_count_2 comp_amplitude_averaged_count_3 comp_amplitude_averaged_count_4 comp_amplitude_averaged_count_5 comp_amplitude_averaged_count_6 comp_amplitude_averaged_count_7 comp_amplitude_averaged_count_8 comp_amplitude_averaged_count_9 comp_amplitude_averaged_count_10 comp_amplitude_averaged_count_11
+0031 0015 RICE_RSSI_PDOLLOP_PREROCK1 0009 ppdu_rate total_gain ht_vhta_signal_hi ht_vht_signal_lo rssi gain misc_gain reserved1 signal_quality_lo
+0031 0016 RICE_RSSI_PDOLLOP_PREROCK2 0004 signal_quality_hi sync_counter freq_offset reserved2
+0031 0017 RICE_RSSI_PDOLLOP_POSTROCK1 000a ppdu_rate antenna_11b vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter signal_quality_ant0 signal_quality_ss0 misc_gain_ant0_lo misc_gain_ant0_hi
+0031 0018 RICE_RSSI_PDOLLOP_POSTROCK2 000a freq_offs_ant0 rssi_ant0 reserved1 reserved2 signal_quality_ant1 signal_quality_ss1 misc_gain_ant1_lo misc_gain_ant1_hi freq_offs_ant1 rssi_ant1
+0031 0019 RICE_RSSI_AT_DETECTOR_POINTS2 0004 rssi_dBm rssi_lin rssi_mixer_dBm rssi_bb_dBm
+0031 001a RICE_CHANNEL_RSSI 0004 rssi_dBm gain_correction_qdBm dbg_rssi_dBm chan_rssi_dBm
+0031 001b RICE_FAULT_HELPER 0007 fault_id arg extra0 extra1 extra2 extra3 extra4
+0031 001c RICE_RSSI_PDOLLOP_CHILLI1 000a ppdu_rate antenna_11b vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter signal_quality_ant0 signal_quality_ss0 misc_gain_ant0_lo misc_gain_ant0_hi
+0031 001d RICE_RSSI_PDOLLOP_CHILLI2 0003 freq_offs_ant0 rssi_ant0 fe_gain
+0031 001e RICE_RSSI_PDOLLOP_NEUS1 000a ppdu_rate antenna_11b ppdu_flags vhtb_signal ht_vhta_signal_hi ht_vhta_signal_lo sync_counter sig_qual_ss0 sig_qual_ant0 sig_qual_ss1
+0031 001f RICE_RSSI_PDOLLOP_NEUS2 0007 sig_qual_ant1 misc_gain_ant0 misc_gain_ant1 agc_avg_pwr_ant0 agc_avg_pwr_ant1 rssi_ant0 rssi_ant1
+# Generated From rice/rice_rssi_debug.xml
+trace_types 96
+RICE_RSSI_PKT_MIN_MAX.min_snr Natural16s
+RICE_RSSI_PKT_MIN_MAX.max_snr Natural16s
+RICE_RSSI_PKT_MIN_MAX.min_rssi Natural16s
+RICE_RSSI_PKT_MIN_MAX.max_rssi Natural16s
+RICE_RSSI_DBM_CONVERSION.mlog Natural16s
+RICE_RSSI_DBM_CONVERSION.elog Natural16s
+RICE_RSSI_DBM_CONVERSION.rssi_dBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.raw_rssi_dbm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.rssi_qdBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC.rssi_dBm Natural16s
+RICE_RSSI_PDOLLOP_PREROCK1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_PREROCK1.rssi Natural8
+RICE_RSSI_PDOLLOP_PREROCK1.gain Natural8
+RICE_RSSI_PDOLLOP_CHILLI2.fe_gain Natural8
+RICE_RSSI_VALIDITY2.misc_gain Natural32
+RICE_RSSI_VALIDITY2.raw_rssi_dbm Natural16s
+RICE_RSSI_VALIDITY2.rssi_qdBm Natural16s
+RICE_RSSI_VALIDITY2.rssi_dBm Natural16s
+RICE_RSSI_VALIDITY2.rssi_valid Natural16s
+RICE_RSSI_DIG_GAIN.phy_misc_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.ch_bandwidth Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_misc_gain Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT.phy_rssi Natural16s
+RICE_RSSI_VALIDITY.raw_rssi_dbm Natural16s
+RICE_RSSI_VALIDITY.rssi_qdBm Natural16s
+RICE_RSSI_VALIDITY.rssi_dBm Natural16s
+RICE_RSSI_VALIDITY.rssi_valid Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_amplitude Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_phase Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_amplitude_averaged Natural16s
+RICE_RSSI_RX_COMP_COEFFS_PKT.rx_iq_comp_phase_averaged Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_lna_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_mixer_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS.rssi_bb_dBm Natural16s
+RICE_RSSI_PDOLLOP_POSTROCK1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_POSTROCK1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.signal_quality_ant0 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.signal_quality_ss0 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK1.misc_gain_ant0_lo Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_CHILLI1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.signal_quality_ant0 Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.signal_quality_ss0 Natural8
+RICE_RSSI_PDOLLOP_CHILLI1.misc_gain_ant0_lo Natural8
+RICE_RSSI_DIG_GAIN2.phy_misc_gain Natural32
+RICE_RSSI_INFO_PER_PKT.rssi_dBm Natural16s
+RICE_RSSI_INFO_PER_PKT.rssi_gain_adjustment_qdB Natural16s
+RICE_RSSI_INFO_PER_PKT.snr Natural16s
+RICE_RSSI_INFO_PER_PKT.rssi_valid Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_amplitude Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_amplitude Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_phase Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_phase Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_amplitude_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_amplitude_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.min_rx_comp_phase_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.max_rx_comp_phase_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.average_comp_amplitude_cal_averaged Natural16s
+RICE_RSSI_IQ_COMP_MIN_MAX.average_comp_phase_cal_averaged Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT2.ch_bandwidth Natural16s
+RICE_RSSI_FREQ_OFFSET_FAULT2.ppdu_rate Natural32
+RICE_RSSI_FREQ_OFFSET_FAULT2.phy_misc_gain Natural32
+RICE_RSSI_FREQ_OFFSET_FAULT2.phy_rssi Natural16s
+RICE_RSSI_PDOLLOP_NEUS1.ppdu_rate Natural32
+RICE_RSSI_PDOLLOP_NEUS1.antenna_11b Natural8
+RICE_RSSI_PDOLLOP_NEUS1.vhtb_signal Natural8
+RICE_RSSI_PDOLLOP_NEUS1.ht_vhta_signal_hi Natural32
+RICE_RSSI_PDOLLOP_NEUS1.sync_counter Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ss0 Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ant0 Natural8
+RICE_RSSI_PDOLLOP_NEUS1.sig_qual_ss1 Natural8
+RICE_RSSI_PDOLLOP_PREROCK2.signal_quality_hi Natural8
+RICE_RSSI_PDOLLOP_PREROCK2.sync_counter Natural8
+RICE_RSSI_PDOLLOP_NEUS2.sig_qual_ant1 Natural8
+RICE_RSSI_PDOLLOP_NEUS2.misc_gain_ant0 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.misc_gain_ant1 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.rssi_ant0 Natural32
+RICE_RSSI_PDOLLOP_NEUS2.rssi_ant1 Natural32
+RICE_CHANNEL_RSSI.rssi_dBm Decibels
+RICE_CHANNEL_RSSI.gain_correction_qdBm Natural16s
+RICE_CHANNEL_RSSI.dbg_rssi_dBm Decibels
+RICE_CHANNEL_RSSI.chan_rssi_dBm Decibels
+RICE_RSSI_PER_PKT_FROM_MAC2.raw_rssi_dbm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC2.rssi_qdBm Natural16s
+RICE_RSSI_PER_PKT_FROM_MAC2.rssi_dBm Natural16s
+RICE_RSSI_PDOLLOP_POSTROCK2.reserved2 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.signal_quality_ant1 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.signal_quality_ss1 Natural8
+RICE_RSSI_PDOLLOP_POSTROCK2.misc_gain_ant1_lo Natural8
+RICE_RSSI_LNA_MIXER.rssi_valid Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_lin Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_mixer_dBm Natural16s
+RICE_RSSI_AT_DETECTOR_POINTS2.rssi_bb_dBm Natural16s
+# Generated From rice/rice_debug.xml
+trace_def 31
+000b 0000 RICE_CHANGE_RADIO_STATE_DONE 0006 radio_state shared_vif_mode rice_freq_half_mhz rice_bandwidth rice_primary_ch_pos rice_tx_pwr_limit_quarter_dbm
+000b 0001 RICE_TRIM_ON_RADIO_CALIBRATION_IND 0003 requested_duration min_usable_duration pending
+000b 0002 RICE_IDLE_ON_RADIO_CALIBRATION_DONE_IND 0000
+000b 0003 RICE_IDLE_OFF_CHANGE_RADIO_STATE 0006 radio_state vif_mode freq_half_mhz bandwith primary_ch_pos tx_pwr_limit_quarter_dbm
+000b 0004 RICE_IDLE_ON_CHANGE_RADIO_STATE 0006 radio_state vif_mode freq_half_mhz bandwith primary_ch_pos tx_pwr_limit_quarter_dbm
+000b 0005 RICE_TRIM_ON_RADIO_CALIBRATION_RESP 0001 schedule_deadline
+000b 0012 RICE_SWITCH_ON_DONE 0000
+000b 0013 RICE_CHANGE_STATE_ESTIMATES_1 0005 start switch_on_off switch_channel finish turned_rf_chip_on
+000b 0014 RICE_CHANGE_STATE_ESTIMATES_2 0005 off_estimate on_estimate switch_scan_estimate switch_cached_estimate switch_uncached_estimate
+000b 0015 RICE_DPD_TRAIN_BST_DONE_MGR 0001 state
+000b 0016 RICE_DPD_TRAIN_BST_DONE_RAD 0001 line_num
+000b 0017 RICE_TRIM_INITIATE 0005 pending trim_duration min_duration wlan_impact bt_impact
+000b 0018 RICE_TRIM_CHECK 0003 pending remaining deadline
+000b 0019 RICE_TRIM_RUN 0004 trim_num pending remaining deadline
+000b 001a RICE_TRIM_RAN_STEP 0003 trim_num step_duration complete
+000b 001b RICE_TRIM_MORE 0005 pending step_time remaining wlan_impact bt_impact
+000b 001c RICE_TRIM_CHANGED_IMPACT 0000
+000b 001d RICE_TRIM_DONE 0001 remaining
+000b 001e RICE_TRIM_REQ_MORE 0005 pending trim_duration min_duration wlan_impact bt_impact
+000b 001f RICE_UPDATE_RADIO_CHANGE_ESTIMATES 0002 ts stage
+000b 0020 RICE_TRIM_LOOKUP 0008 pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0021 RICE_TRIM_MATCH_EXACT 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0022 RICE_TRIM_MATCH_RXONLY_AS_RXTX 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0023 RICE_TRIM_MATCH_PROMOTE 000a allow_retrim idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0024 RICE_TRIM_NEW 0009 idx pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0025 RICE_TRIM_NOT_FOUND 0009 allow_retrim pcr_id mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0026 RICE_RADIO_ON 0007 mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0027 RICE_RADIO_OFF 0000
+000b 0028 RICE_RADIO_REQ_ON 0007 mode channel_mode frequency_half_MHz bw primary_channel_position transmit_power_quarter_dBm regulatory_domain
+000b 0029 RICE_RADIO_REQ_OFF 0000
+000b 002a RICE_RETRIM 0001 pending
+# Generated From rice/rice_debug.xml
+trace_types 94
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.allow_retrim Boolean
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.idx Natural16s
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.pcr_id Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.mode Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.channel_mode Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.bw Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.primary_channel_position Natural8
+RICE_TRIM_MATCH_RXONLY_AS_RXTX.transmit_power_quarter_dBm Decibels
+RICE_IDLE_ON_CHANGE_RADIO_STATE.tx_pwr_limit_quarter_dbm Decibels
+RICE_CHANGE_STATE_ESTIMATES_1.start Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.switch_on_off Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.switch_channel Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.finish Natural32
+RICE_CHANGE_STATE_ESTIMATES_1.turned_rf_chip_on Boolean
+RICE_CHANGE_STATE_ESTIMATES_2.off_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.on_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_scan_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_cached_estimate Natural32
+RICE_CHANGE_STATE_ESTIMATES_2.switch_uncached_estimate Natural32
+RICE_TRIM_LOOKUP.pcr_id Natural8
+RICE_TRIM_LOOKUP.mode Natural8
+RICE_TRIM_LOOKUP.channel_mode Natural8
+RICE_TRIM_LOOKUP.bw Natural8
+RICE_TRIM_LOOKUP.primary_channel_position Natural8
+RICE_TRIM_LOOKUP.transmit_power_quarter_dBm Decibels
+RICE_RADIO_ON.mode Natural8
+RICE_RADIO_ON.channel_mode Natural8
+RICE_RADIO_ON.bw Natural8
+RICE_RADIO_ON.primary_channel_position Natural8
+RICE_RADIO_ON.transmit_power_quarter_dBm Decibels
+RICE_TRIM_RAN_STEP.trim_num Integer8
+RICE_TRIM_RAN_STEP.step_duration Integer32
+RICE_TRIM_RAN_STEP.complete Boolean
+RICE_CHANGE_RADIO_STATE_DONE.rice_tx_pwr_limit_quarter_dbm Decibels
+RICE_TRIM_INITIATE.pending Natural32
+RICE_TRIM_INITIATE.wlan_impact Natural8
+RICE_TRIM_INITIATE.bt_impact Natural8
+RICE_TRIM_NOT_FOUND.allow_retrim Boolean
+RICE_TRIM_NOT_FOUND.pcr_id Natural8
+RICE_TRIM_NOT_FOUND.mode Natural8
+RICE_TRIM_NOT_FOUND.channel_mode Natural8
+RICE_TRIM_NOT_FOUND.bw Natural8
+RICE_TRIM_NOT_FOUND.primary_channel_position Natural8
+RICE_TRIM_NOT_FOUND.transmit_power_quarter_dBm Decibels
+RICE_TRIM_DONE.remaining Natural32
+RICE_RETRIM.pending Natural32
+RICE_RADIO_REQ_ON.mode Natural8
+RICE_RADIO_REQ_ON.channel_mode Natural8
+RICE_RADIO_REQ_ON.bw Natural8
+RICE_RADIO_REQ_ON.primary_channel_position Natural8
+RICE_RADIO_REQ_ON.transmit_power_quarter_dBm Decibels
+RICE_TRIM_MATCH_PROMOTE.allow_retrim Boolean
+RICE_TRIM_MATCH_PROMOTE.idx Natural16s
+RICE_TRIM_MATCH_PROMOTE.pcr_id Natural8
+RICE_TRIM_MATCH_PROMOTE.mode Natural8
+RICE_TRIM_MATCH_PROMOTE.channel_mode Natural8
+RICE_TRIM_MATCH_PROMOTE.bw Natural8
+RICE_TRIM_MATCH_PROMOTE.primary_channel_position Natural8
+RICE_TRIM_MATCH_PROMOTE.transmit_power_quarter_dBm Decibels
+RICE_TRIM_NEW.idx Natural16s
+RICE_TRIM_NEW.pcr_id Natural8
+RICE_TRIM_NEW.mode Natural8
+RICE_TRIM_NEW.channel_mode Natural8
+RICE_TRIM_NEW.bw Natural8
+RICE_TRIM_NEW.primary_channel_position Natural8
+RICE_TRIM_NEW.transmit_power_quarter_dBm Decibels
+RICE_TRIM_CHECK.pending Natural32
+RICE_TRIM_CHECK.remaining Natural32
+RICE_TRIM_CHECK.deadline Natural32
+RICE_DPD_TRAIN_BST_DONE_MGR.state Natural8
+RICE_TRIM_MATCH_EXACT.allow_retrim Boolean
+RICE_TRIM_MATCH_EXACT.idx Natural16s
+RICE_TRIM_MATCH_EXACT.pcr_id Natural8
+RICE_TRIM_MATCH_EXACT.mode Natural8
+RICE_TRIM_MATCH_EXACT.channel_mode Natural8
+RICE_TRIM_MATCH_EXACT.bw Natural8
+RICE_TRIM_MATCH_EXACT.primary_channel_position Natural8
+RICE_TRIM_MATCH_EXACT.transmit_power_quarter_dBm Decibels
+RICE_TRIM_REQ_MORE.pending Natural32
+RICE_TRIM_REQ_MORE.wlan_impact Natural8
+RICE_TRIM_REQ_MORE.bt_impact Natural8
+RICE_IDLE_OFF_CHANGE_RADIO_STATE.tx_pwr_limit_quarter_dbm Decibels
+RICE_TRIM_MORE.pending Natural32
+RICE_TRIM_MORE.step_time Integer32
+RICE_TRIM_MORE.remaining Integer32
+RICE_TRIM_MORE.wlan_impact Natural8
+RICE_TRIM_MORE.bt_impact Natural8
+RICE_TRIM_ON_RADIO_CALIBRATION_RESP.schedule_deadline Natural32
+RICE_TRIM_RUN.trim_num Integer8
+RICE_TRIM_RUN.pending Natural32
+RICE_TRIM_RUN.remaining Integer32
+RICE_TRIM_RUN.deadline Natural32
+RICE_UPDATE_RADIO_CHANGE_ESTIMATES.ts Natural32
+RICE_UPDATE_RADIO_CHANGE_ESTIMATES.stage Natural32
+# Generated From mib/mib_debug.xml
+trace_def 8
+002d 0000 MIB_BMSG_ELEM_ALLOC 0001 address
+002d 0001 MIB_BMSG_ELEM_DEALLOC 0001 address
+002d 0002 MIB_GET 0007 psid_hex psid_dec name value ix0 ix1 success
+002d 0003 MIB_GET_OCTETS 0008 psid_hex psid_dec name length value ix0 ix1 success
+002d 0004 MIB_HOSTOVERRIDE 0002 mib_loc mib_sz
+002d 0005 MIB_SET 0007 psid_hex psid_dec name value ix0 ix1 success
+002d 0006 MIB_SET_OCTETS 0008 psid_hex psid_dec name length value ix0 ix1 success
+002d 0007 Mibkey 0000
+# Generated From mib/mib_debug.xml
+trace_types 22
+MIB_SET.psid_dec Natural16s
+MIB_SET.name Mibkey
+MIB_SET.value Natural32s
+MIB_SET.success Boolean
+MIB_GET_OCTETS.psid_dec Natural16s
+MIB_GET_OCTETS.name Mibkey
+MIB_GET_OCTETS.length Natural8s
+MIB_GET_OCTETS.value Natural16[4]
+MIB_GET_OCTETS.success Boolean
+MIB_HOSTOVERRIDE.mib_loc Natural32
+MIB_HOSTOVERRIDE.mib_sz Natural32
+MIB_GET.psid_dec Natural16s
+MIB_GET.name Mibkey
+MIB_GET.value Natural32s
+MIB_GET.success Boolean
+MIB_BMSG_ELEM_DEALLOC.address Natural32
+MIB_SET_OCTETS.psid_dec Natural16s
+MIB_SET_OCTETS.name Mibkey
+MIB_SET_OCTETS.length Natural8s
+MIB_SET_OCTETS.value Natural16[4]
+MIB_SET_OCTETS.success Boolean
+MIB_BMSG_ELEM_ALLOC.address Natural32
+# Generated From data_plane/dataplane_debug.xml
+trace_def 117
+0019 0000 DATAPLANE_AMPDU_BURSTING 0008 bursting_is_on n_mpdus_to_tx prot_time ampdu_tx_time txop_time_us n_mpdus_queued n_ampdus_to_tx max_mpdus_per_ampdu
+0019 0001 DATAPLANE_ANTENNA_MODE_SWITCH 0002 mac_instance antenna_bitmap
+0019 0002 DATAPLANE_API_FTM_IQ_BUFF 0001 ftm_iq_buff
+0019 0003 DATAPLANE_API_MACRAME_ADDBA_TX 0007 tpri peer_id ba_flags win_size timeout start_seqno max_length
+0019 0004 DATAPLANE_API_MACRAME_CANCEL_DEADLINES 0000
+0019 0005 DATAPLANE_API_MACRAME_CANCEL_FRAME 0004 addr_lo addr_mid addr_hi fc
+0019 0006 DATAPLANE_API_MACRAME_CANCEL_FRAMES 0002 control_tag_mask control_tag_include
+0019 0007 DATAPLANE_API_MACRAME_CANCEL_MLME_DU 0005 addr_lo addr_mid addr_hi control_tag_mask control_tag_include
+0019 0008 DATAPLANE_API_MACRAME_CANCEL_PAUSE_MAC_AT_TIME_REQUEST 0001 mac_instance
+0019 0009 DATAPLANE_API_MACRAME_CLEAR_DPLP 0001 callback
+0019 000a DATAPLANE_API_MACRAME_CLEAR_VIF 0000
+0019 000b DATAPLANE_API_MACRAME_DELBA_TX 0007 tpri peer_id ba_flags win_size timeout start_seqno max_length
+0019 000c DATAPLANE_API_MACRAME_DELETE_VIF 0000
+0019 000d DATAPLANE_API_MACRAME_DE_REGISTER_KEY 0008 addr_lo addr_mid addr_hi key_type crypt_type key_id basic_enc_flags keyflags
+0019 000e DATAPLANE_API_MACRAME_EDCA_CONFIG 0000
+0019 000f DATAPLANE_API_MACRAME_FTM_BURST_ENABLE 0001 enable
+0019 0010 DATAPLANE_API_MACRAME_IML_OFF_IND 0000
+0019 0011 DATAPLANE_API_MACRAME_IML_OFF_REQ 0000
+0019 0012 DATAPLANE_API_MACRAME_IML_ON 0000
+0019 0013 DATAPLANE_API_MACRAME_INIT_QUEUES 0000
+0019 0014 DATAPLANE_API_MACRAME_LOAD_FRAME 0009 Frame_control du_state txrxflags txflags_ex tx_control tx_sw_deadline addr_lo addr_mid addr_hi
+0019 0015 DATAPLANE_API_MACRAME_MAX_AGGR_SIZE_CONFIG 0001 aggr_size
+0019 0016 DATAPLANE_API_MACRAME_OVERRIDE_PARAMS 0001 mask
+0019 0017 DATAPLANE_API_MACRAME_PAUSE_DPLP 0002 callback bitmap
+0019 0018 DATAPLANE_API_MACRAME_PAUSE_DPLP_MSG_QUEUE 0001 callback
+0019 0019 DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST 0003 mac_instance stop_time cb
+0019 001a DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ 0003 saved_rx_start saved_rx_end callback
+0019 001b DATAPLANE_API_MACRAME_PROTECTION_CONFIG 0000
+0019 001c DATAPLANE_API_MACRAME_QUEUE_BEACON 0002 mcast_en deadline
+0019 001d DATAPLANE_API_MACRAME_REGISTER_KEY 0008 addr_lo addr_mid addr_hi key_type crypt_type key_id basic_enc_flags keyflags
+0019 001e DATAPLANE_API_MACRAME_RESUME_DPLP 0002 callback bitmap
+0019 001f DATAPLANE_API_MACRAME_RESUME_DPLP_MSG_QUEUE 0000
+0019 0020 DATAPLANE_API_MACRAME_RESUME_MAC 0001 mac_instance
+0019 0021 DATAPLANE_API_MACRAME_RX_NOTIFY 0000
+0019 0022 DATAPLANE_API_MACRAME_SET_BSS_STA 0003 addr_lo addr_mid addr_hi
+0019 0023 DATAPLANE_API_MACRAME_SET_MIN_TX_RATE 0003 addr_lo addr_mid addr_hi
+0019 0024 DATAPLANE_API_MACRAME_STA_IMPOSED_MIN_TX_RATE 0004 addr_lo addr_mid addr_hi imposed_rate
+0019 0025 DATAPLANE_API_MACRAME_STA_RESET_RATES 0003 addr_lo addr_mid addr_hi
+0019 0026 DATAPLANE_API_MACRAME_TBTT_REQ 0003 deadline stall_time cback
+0019 0027 DATAPLANE_API_MACRAME_TURN_OFF_DPHP 0001 mac_instance
+0019 0028 DATAPLANE_API_MACRAME_TURN_ON_DPHP 0001 mac_instance
+0019 0029 DATAPLANE_API_MACRAME_UPDATE_PS 0000
+0019 002a DATAPLANE_API_MACRAME_VIF_IMPOSE_MIN_TX_RATE 0001 imposed_min_tx_rate
+0019 002b DATAPLANE_API_MLME_RANDOMISE_VIF_SEQ 0000
+0019 002c DATAPLANE_API_MLME_STA_CLEAR_REQUEST 0001 addr
+0019 002d DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST 0003 from_addr drop_enc to_addr
+0019 002e DATAPLANE_API_MLME_STA_PAUSE_REQUST 0002 addr sta_get_num_tx_dus_queued
+0019 002f DATAPLANE_API_MLME_STA_RESUME_REQUEST 0002 addr sta_get_num_tx_dus_queued
+0019 0030 DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ 0003 cmd_time callback instance
+0019 0031 DATAPLANE_CTL_MGR_HW_STATE_CHANGE 0009 instance vif_state_unicast vif_state_bbm tx_n_total_ready tx_n_queued dplp_state_dplane dplp_state_mpdu_hw dplp_state_ampdu_hw dplp_state_bbm
+0019 0032 DATAPLANE_CTL_MGR_PAUSED 0001 cmd_time
+0019 0033 DATAPLANE_CTL_MGR_PAUSE_BBM_REQ 0003 cmd_time callback instance
+0019 0034 DATAPLANE_CTL_MGR_PAUSE_REQ 0003 cmd_time callback instance
+0019 0035 DATAPLANE_CTL_MGR_RESUME_BBM_REQ 0003 cmd_time callback instance
+0019 0036 DATAPLANE_CTL_MGR_RESUME_REQ 0003 cmd_time callback instance
+0019 0037 DATAPLANE_CTL_MGR_RUNNING 0001 cmd_time
+0019 0038 DATAPLANE_DATA_PPDU_TX_FAILURE 0007 dphp_state coex_collision mac_sm_channel_state backoff cca_busy_time cca_busy_duration rx_sync_count
+0019 0039 DATAPLANE_DATA_TX_FAILURE 0008 frame line fc mac_instance tx_status flags ex_flags tx_count
+0019 003a DATAPLANE_DATA_TX_FAILURE_EXTRA 0004 src_pid mac_mod_opts pkt_tag timeout
+0019 003b DATAPLANE_DATA_TX_STATE_LOG 0009 index trans0 trans1 trans2 trans3 trans4 trans5 trans6 trans7
+0019 003c DATAPLANE_DEADLINE_CANCEL_STOP_REQ 0001 mac_instance
+0019 003d DATAPLANE_DEADLINE_RESUME_REQ 0001 mac_instance
+0019 003e DATAPLANE_DEADLINE_STOP_CFM 0003 mac_instance stop_time cb
+0019 003f DATAPLANE_DEADLINE_STOP_REQ 0003 mac_instance stop_time cb
+0019 0040 DATAPLANE_DPHP_MON_LOG 0007 log_start_l log_start_h start_index end_index entry_size num_entries_in_log failed_log_allocations
+0019 0041 DATAPLANE_DPHP_PEER_DEREGISTER 0004 addr_lo addr_mid addr_hi peer_index
+0019 0042 DATAPLANE_DPHP_PEER_REGISTER 0004 addr_lo addr_mid addr_hi peer_index
+0019 0043 DATAPLANE_DPLP_MSG 0002 loc info
+0019 0044 DATAPLANE_HW_PUMP_AMPDU_IGNORE_MAC 0001 mac_instance
+0019 0045 DATAPLANE_HW_PUMP_IGNORE_MAC 0001 mac_instance
+0019 0046 DATAPLANE_LAA_CUR_RATE_STAT 0004 result per throughput mpdus
+0019 0047 DATAPLANE_LAA_GOOD_AVG_PER 0004 pdu_num mpdu_succ_num mpdu_fail_num current_rate
+0019 0048 DATAPLANE_LAA_INSTALL_RATE 0003 cur_rate old_rate mtper
+0019 0049 DATAPLANE_LAA_INSTALL_RATE_EXTRA 0006 fallback_n_entries f0_rate f1_rate f2_rate f3_rate f4_rate
+0019 004a DATAPLANE_LAA_PRV_RATE_STAT 0003 per throughput mpdus
+0019 004b DATAPLANE_LAA_RATE_CHANGED 0005 action sgi nss bw_idx mcs
+0019 004c DATAPLANE_LAA_RATE_STAT 0006 action rate n_pdu n_no_ba n_mpdu_succ n_mpdu_fail
+0019 004d DATAPLANE_LAA_RESET_STA 0008 association_type cur_rate nss_bits bw_bits mcs_bits_11b mcs_bits_11a mcs_bits_ht mcs_bits_vht
+0019 004e DATAPLANE_LAA_SCBRD_STATS_1 000a fallback_n_entries cur_n_mpdu_succ cur_n_mpdu_fail cur_n_pdu cur_n_no_ba n_pdu_not_counted n_ba_missed n_prot_failed n_ppdu_req n_ba_received
+0019 004f DATAPLANE_LAA_SCBRD_STATS_2 000a f0_mpdu_succ f0_mpdu_fail f1_mpdu_succ f1_mpdu_fail f2_mpdu_succ f2_mpdu_fail f3_mpdu_succ f3_mpdu_fail f4_mpdu_succ f4_mpdu_fail
+0019 0050 DATAPLANE_LAA_STATE_CHANGE 0007 state old_state last_evt drop_rtsel n_drop_fail_in_row spec_rtsel spec_result
+0019 0051 DATAPLANE_LAA_TRACE_SM 0004 state expire_at_hi expire_at_lo evt
+0019 0052 DATAPLANE_LIVE_RESTART 0001 mac_instance
+0019 0053 DATAPLANE_MSG 0001 status
+0019 0054 DATAPLANE_PAUSED_STA 0005 addr_lo addr_mid addr_hi dp_sta_op_flags n_tx_dus_queued
+0019 0055 DATAPLANE_PEER_MGR_PEER_DISABLE 0005 addr_lo addr_mid addr_hi peer_index disablement_reason
+0019 0056 DATAPLANE_PEER_MGR_PEER_ENABLE 0005 addr_lo addr_mid addr_hi peer_index enablement_reason
+0019 0057 DATAPLANE_PEER_MGR_PEER_FRAMES_CANCELLED 0002 peer_index other_peer_n_frames
+0019 0058 DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES 0005 entry_0 entry_1 entry_2 entry_3 entry_4
+0019 0059 DATAPLANE_REG_BFEE 0003 addr_lo addr_mid addr_hi
+0019 005a DATAPLANE_REG_BFER 0003 addr_lo addr_mid addr_hi
+0019 005b DATAPLANE_RESUMED_STA 0006 addr_lo addr_mid addr_hi pause_type dp_sta_op_flags n_tx_dus_queued
+0019 005c DATAPLANE_RX_DISCARDED 0003 fc discard_reason seqno
+0019 005d DATAPLANE_RX_PHY_INFO 000a rate rssi snr is_ctrl payload_us fcs_good fcs_error bad_sig cca_busy rx_started_us
+0019 005e DATAPLANE_STA_CREATE_FALLBACK_TABLE 0005 addr_lo addr_mid addr_hi starting_hw_rate min_hw_rate
+0019 005f DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA 0007 frame_type long_frame fallback_tbl default_supported_rates supported_rates ht_mcs_rates vht_mcs_rates
+0019 0060 DATAPLANE_STA_DELETE_FALLBACK_TABLE 0004 addr_lo addr_mid addr_hi fallback_tbl
+0019 0061 DATAPLANE_STA_INSTALL_FALLBACK_TABLES 0007 addr_lo addr_mid addr_hi curr_sta_rate min_rate short_fallback_tbl long_fallback_tbl
+0019 0062 DATAPLANE_STA_RATE_IMPOSED_MIN_TX_RATE 0008 addr_lo addr_mid addr_hi imposed_rate coex_supported_rates_mask coex_ht_rates_mask supported_rates_mask ht_rates_mask
+0019 0063 DATAPLANE_STA_RATE_INSTALL_RATE 0005 addr_lo addr_mid addr_hi curr_sta_rate install_fallback_tbls
+0019 0064 DATAPLANE_STA_RESET_RATES 0009 addr_lo addr_mid addr_hi bandwidth channel_freq association_type supported_rates ht_mcs_rates vht_mcs_rates
+0019 0065 DATAPLANE_STA_RESET_RATES_STA_CAPS 0001 sta_caps
+0019 0066 DATAPLANE_STA_TIMEOUT_PARKED_FRAMES 0005 addr_lo addr_mid addr_hi dp_sta_op_flags count
+0019 0067 DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES 0004 addr_lo addr_mid addr_hi curr_sta_rate
+0019 0068 DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA 0004 short_tbl_ref_count short_fallback_tbl long_tbl_ref_count long_fallback_tbl
+0019 0069 DATAPLANE_TPUT_DIAG 0002 mib_count mac_instance
+0019 006a DATAPLANE_TX_CFM 000a frame_control seq_frag cfm_rate flags success failure tx_n_total_ready tx_n_queued tx_spent_32us tx_started_us
+0019 006b DATAPLANE_VIF_RESET_RATES 0000
+0019 006c DATAPLANE_WMMAC_DOWNGRADE 0006 downgraded_from_ac downgraded_to_ac txop_limit ecw_min ecw_max aifs
+0019 006d DATAPLANE_WMMAC_MEDIUM_TIME_SPENT 0002 mac_ac medium_time_spent
+0019 006e DATAPLANE_WMMAC_QUEUE_STALLED 0001 dpif_queue
+0019 006f DATAPLANE_WMMAC_RESTORE 0005 restored_ac txop_limit ecw_min ecw_max aifs
+0019 0070 DATAPLANE_WMMAC_SET_MEDIUM_TIME 0002 mac_ac medium_time
+0019 0071 DATAPLANE_WMMAC_TIMER_END 0004 mac_ac ac_admitted ac_remaining ac_monitor_time
+0019 0072 DATAPLANE_WMMAC_TIMER_START 0004 mac_ac ac_admitted ac_remaining ac_monitor_time
+0019 0073 DPLANE_API_MACRAME_SET_TX_BURST_TIME 0004 mac_instance mac_ac_category burst_time type
+0019 0074 LMIF_TPUT_DIAG 0002 ncounters mac_instance
+# Generated From data_plane/dataplane_debug.xml
+trace_types 134
+DATAPLANE_LAA_CUR_RATE_STAT.result Boolean
+DATAPLANE_API_MACRAME_QUEUE_BEACON.mcast_en Boolean
+DATAPLANE_API_MACRAME_QUEUE_BEACON.deadline Natural32
+DATAPLANE_API_MACRAME_CLEAR_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_PAUSE_DPLP_MSG_QUEUE.callback Natural32
+DATAPLANE_CTL_MGR_PAUSED.cmd_time Natural32
+DATAPLANE_TX_CFM.success Natural8
+DATAPLANE_TX_CFM.failure Natural8
+DATAPLANE_TX_CFM.tx_started_us Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.curr_sta_rate Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.min_rate Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.short_fallback_tbl Natural32
+DATAPLANE_STA_INSTALL_FALLBACK_TABLES.long_fallback_tbl Natural32
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.mac_ac_category mac_access_category
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.burst_time Natural8
+DPLANE_API_MACRAME_SET_TX_BURST_TIME.type BURST_TYPE_T
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.callback Natural32
+DATAPLANE_CTL_MGR_RESUME_BBM_REQ.instance Natural32
+DATAPLANE_ANTENNA_MODE_SWITCH.mac_instance Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.saved_rx_start Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.saved_rx_end Natural32
+DATAPLANE_API_MACRAME_POST_IMM_TIDY_REQ.callback Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.short_tbl_ref_count Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.short_fallback_tbl Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.long_tbl_ref_count Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES_EXTRA.long_fallback_tbl Natural32
+DATAPLANE_DEADLINE_STOP_CFM.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_CFM.stop_time Natural32
+DATAPLANE_DEADLINE_STOP_CFM.cb Natural32
+DATAPLANE_LAA_RESET_STA.cur_rate Natural32
+DATAPLANE_AMPDU_BURSTING.n_mpdus_to_tx Natural32
+DATAPLANE_AMPDU_BURSTING.prot_time Natural32
+DATAPLANE_AMPDU_BURSTING.ampdu_tx_time Natural32
+DATAPLANE_AMPDU_BURSTING.txop_time_us Natural32
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.instance Natural32
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.vif_state_unicast Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.vif_state_bbm Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_dplane Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_mpdu_hw Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_ampdu_hw Natural8
+DATAPLANE_CTL_MGR_HW_STATE_CHANGE.dplp_state_bbm Natural8
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.mac_instance Natural32
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.stop_time Natural32
+DATAPLANE_API_MACRAME_PAUSE_MAC_AT_TIME_REQUEST.cb Natural32
+DATAPLANE_PEER_MGR_PEER_FRAMES_CANCELLED.other_peer_n_frames Natural32
+DATAPLANE_DATA_TX_FAILURE_EXTRA.mac_mod_opts Natural32
+DATAPLANE_DATA_TX_FAILURE_EXTRA.timeout Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f0_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f1_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f2_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f3_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE_EXTRA.f4_rate Natural32
+DATAPLANE_API_MACRAME_CANCEL_FRAMES.control_tag_mask Natural64
+DATAPLANE_API_MACRAME_CANCEL_FRAMES.control_tag_include Natural64
+DATAPLANE_DEADLINE_CANCEL_STOP_REQ.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_REQ.mac_instance Natural32
+DATAPLANE_DEADLINE_STOP_REQ.stop_time Natural32
+DATAPLANE_DEADLINE_STOP_REQ.cb Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA.long_frame Boolean
+DATAPLANE_STA_CREATE_FALLBACK_TABLE_EXTRA.fallback_tbl Boolean
+DATAPLANE_STA_RESET_RATES_STA_CAPS.sta_caps Natural64
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.callback Natural32
+DATAPLANE_CTL_MGR_FLUSH_PLANE_REQ.instance Natural32
+DATAPLANE_CTL_MGR_RUNNING.cmd_time Natural32
+DATAPLANE_STA_UNINSTALL_FALLBACK_TABLES.curr_sta_rate Natural32
+DATAPLANE_HW_PUMP_AMPDU_IGNORE_MAC.mac_instance Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.deadline Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.stall_time Natural32
+DATAPLANE_API_MACRAME_TBTT_REQ.cback Natural32
+DATAPLANE_HW_PUMP_IGNORE_MAC.mac_instance Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE.starting_hw_rate Natural32
+DATAPLANE_STA_CREATE_FALLBACK_TABLE.min_hw_rate Natural32
+DATAPLANE_API_MACRAME_RESUME_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_RESUME_DPLP.bitmap Natural8
+DATAPLANE_API_MACRAME_DELBA_TX.max_length Natural32
+DATAPLANE_API_MACRAME_ADDBA_TX.max_length Natural32
+DATAPLANE_API_MACRAME_CANCEL_PAUSE_MAC_AT_TIME_REQUEST.mac_instance Natural32
+DATAPLANE_API_MLME_STA_RESUME_REQUEST.addr MAC_Address
+DATAPLANE_API_MACRAME_TURN_OFF_DPHP.mac_instance Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_0 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_1 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_2 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_3 Natural8
+DATAPLANE_PRINT_FALLBACK_TABLE_RETRIES.entry_4 Natural8
+DATAPLANE_API_MACRAME_CANCEL_MLME_DU.control_tag_mask Natural64
+DATAPLANE_API_MACRAME_CANCEL_MLME_DU.control_tag_include Natural64
+DATAPLANE_API_MACRAME_PAUSE_DPLP.callback Natural32
+DATAPLANE_API_MACRAME_PAUSE_DPLP.bitmap Natural8
+DATAPLANE_API_MACRAME_TURN_ON_DPHP.mac_instance Natural8
+DATAPLANE_API_MACRAME_FTM_BURST_ENABLE.enable Boolean
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.from_addr MAC_Address
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.drop_enc Boolean
+DATAPLANE_API_MLME_STA_MOVE_DU_REQUEST.to_addr MAC_Address
+DATAPLANE_API_MLME_STA_CLEAR_REQUEST.addr MAC_Address
+DATAPLANE_LAA_RATE_STAT.rate Natural32
+DATAPLANE_API_MACRAME_RESUME_MAC.mac_instance Natural32
+DATAPLANE_STA_DELETE_FALLBACK_TABLE.fallback_tbl Natural32
+DATAPLANE_DEADLINE_RESUME_REQ.mac_instance Natural32
+DATAPLANE_RX_PHY_INFO.rate Natural32
+DATAPLANE_RX_PHY_INFO.rssi Natural8
+DATAPLANE_RX_PHY_INFO.snr Natural8
+DATAPLANE_RX_PHY_INFO.is_ctrl Natural8
+DATAPLANE_RX_PHY_INFO.rx_started_us Natural32
+DATAPLANE_DATA_TX_FAILURE.frame MBULK
+DATAPLANE_DATA_TX_FAILURE.mac_instance Natural8
+DATAPLANE_DATA_TX_FAILURE.tx_count Natural8
+DATAPLANE_API_MLME_STA_PAUSE_REQUST.addr MAC_Address
+DATAPLANE_DATA_PPDU_TX_FAILURE.dphp_state Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.coex_collision Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.mac_sm_channel_state Natural8
+DATAPLANE_DATA_PPDU_TX_FAILURE.cca_busy_time Natural32
+DATAPLANE_DATA_PPDU_TX_FAILURE.cca_busy_duration Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.callback Natural32
+DATAPLANE_CTL_MGR_RESUME_REQ.instance Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.callback Natural32
+DATAPLANE_CTL_MGR_PAUSE_REQ.instance Natural32
+DATAPLANE_API_FTM_IQ_BUFF.ftm_iq_buff Natural32
+DATAPLANE_DPLP_MSG.loc Natural32
+DATAPLANE_DPLP_MSG.info Natural32
+DATAPLANE_LAA_INSTALL_RATE.cur_rate Natural32
+DATAPLANE_LAA_INSTALL_RATE.old_rate Natural32
+DATAPLANE_STA_RATE_INSTALL_RATE.curr_sta_rate Natural32
+DATAPLANE_STA_RATE_INSTALL_RATE.install_fallback_tbls Boolean
+DATAPLANE_API_MACRAME_OVERRIDE_PARAMS.mask Natural32
+DATAPLANE_LAA_GOOD_AVG_PER.current_rate Natural32
+DATAPLANE_API_MACRAME_LOAD_FRAME.tx_sw_deadline Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.cmd_time Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.callback Natural32
+DATAPLANE_CTL_MGR_PAUSE_BBM_REQ.instance Natural32
+DATAPLANE_API_MACRAME_MAX_AGGR_SIZE_CONFIG.aggr_size Natural32
+# Generated From smapper/smapper_debug.xml
+trace_def 2
+0043 0000 SMAPPER_START 0000
+0043 0001 SMAPPER_STOP 0000
+# Generated From smapper/smapper_debug.xml
+# Generated From bist/bist_debug.xml
+trace_def 7
+003e 0000 BIST_GAIN 0001 sat_gain
+003e 0001 BIST_GET_TX_GAIN_REQ 0003 freq tx_gain rx_gain
+003e 0002 BIST_SHIFT_SWEEP 0003 i q shift
+003e 0003 BIST_RX_BUF_GAIN 0002 rx_bb1 rx_bb2
+003e 0004 BIST_SIG_ANAL 0002 sig_anal_cfg sig_anal_freq
+003e 0005 BIST_SIG_GEN 0005 sig_gen_cfg sig_gen_cfg2 sig_gen_freq1 sig_gen_freq2 sig_gen_phase
+003e 0006 BIST_MAGNITUDE_INCREASE 0007 i q mag_squared mag_squared_threshold attempt tx_gain rx_gain
+# Generated From bist/bist_debug.xml
+trace_types 17
+BIST_SIG_GEN.sig_gen_cfg Natural32
+BIST_SIG_GEN.sig_gen_cfg2 Natural32
+BIST_SIG_GEN.sig_gen_freq1 Natural32
+BIST_SIG_GEN.sig_gen_freq2 Natural32
+BIST_SIG_GEN.sig_gen_phase Natural32
+BIST_SHIFT_SWEEP.i Natural32s
+BIST_SHIFT_SWEEP.q Natural32s
+BIST_GAIN.sat_gain Natural32
+BIST_MAGNITUDE_INCREASE.i Natural16s
+BIST_MAGNITUDE_INCREASE.q Natural16s
+BIST_MAGNITUDE_INCREASE.mag_squared Natural32
+BIST_MAGNITUDE_INCREASE.mag_squared_threshold Natural32
+BIST_MAGNITUDE_INCREASE.attempt Natural8s
+BIST_MAGNITUDE_INCREASE.tx_gain Natural8s
+BIST_MAGNITUDE_INCREASE.rx_gain Natural8s
+BIST_SIG_ANAL.sig_anal_cfg Natural32
+BIST_SIG_ANAL.sig_anal_freq Natural32
+# Generated From lower_mac/lmif_debug.xml
+trace_def 2
+0047 0000 LMIF_COUNTERS_REPORT 0007 MAC_DOT11_FCS_GOOD_COUNT MAC_DOT11_FCS_ERROR_COUNT MAC_BAD_SIG_COUNT MAC_NO_ACK_COUNT MAC_DOT11_RX_AMPDUS_COUNT MAC_DOT11_RX_MPDUS_IN_AMPDUS_COUNT MAC_DOT11_RX_AMPDU_DELIM_CRC_ERR_COUNT
+0047 0001 LMIF_COUNTERS_REPORT_2 0001 MAC_DOT11_ERROR_COUNT
+# Generated From lower_mac/lmif_debug.xml
+trace_types 5
+LMIF_COUNTERS_REPORT_2.MAC_DOT11_ERROR_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_DOT11_FCS_GOOD_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_DOT11_FCS_ERROR_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_BAD_SIG_COUNT Natural32
+LMIF_COUNTERS_REPORT.MAC_NO_ACK_COUNT Natural32
+# Generated From mlme_hard/mlme_tdls/mlme_tdls_debug.xml
+trace_def 23
+0023 0000 MLME_TDLS_CHANNEL_CONFIG 0002 primary_freq channel_info
+0023 0001 MLME_TDLS_DISCOVERY_EVENT_RETRIEVED 0000
+0023 0002 MLME_TDLS_DISCOVERY_EVENT_SAVED 0003 address found space
+0023 0003 MLME_TDLS_FILTER_MATCH 0003 action_type address link_state
+0023 0004 MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1 0002 tdls_allowed rssi
+0023 0005 MLME_TDLS_FRAME_DISCOVERY_RESPONSE_2 0001 address
+0023 0006 MLME_TDLS_HOST_ACTION_REQUEST 0002 action address
+0023 0007 MLME_TDLS_INIT 0003 tdls_activated coex_activated p2p_activated
+0023 0008 MLME_TDLS_PEER_DISCOVERY_REQUEST 0001 tdls_allowed
+0023 0009 MLME_TDLS_PEER_SETUP_CONFIRM 0002 address link_state
+0023 000a MLME_TDLS_PEER_SETUP_REQUEST 0001 secure_link
+0023 000b MLME_TDLS_PEER_SETUP_REQUEST_RETRIEVED 0001 address
+0023 000c MLME_TDLS_PEER_SETUP_REQUEST_SAVED 0001 address
+0023 000d MLME_TDLS_PEER_SETUP_RESPONSE 0002 address link_state
+0023 000e MLME_TDLS_PEER_TEARDOWN_REQUEST 0002 address link_state
+0023 000f MLME_TDLS_SENDING_ACTION_FRAME 0002 frame_type address
+0023 0010 MLME_TDLS_STATUS_CHANGED 0005 new_state_is_active is_in_teardown coex_activated mvif_activated channel_switch
+0023 0011 MLME_TDLS_TERMINATE_LINK 0001 index
+0023 0012 MLME_TDLS_TERMINATE_LINK_DURING_SETUP 0001 index
+0023 0013 MLME_TDLS_TERMINATE_ONE 0002 address tx_frame
+0023 0014 MLME_TDLS_TERMINATE_THREE 0001 address
+0023 0015 MLME_TDLS_TERMINATE_TWO 0003 address paused confirming
+0023 0016 MLME_TDLS_TRAFFIC_STATISTICS 0006 address tdls_link_established packet_cnt_tx packet_cnt_rx tx_above_threshold rx_above_threshold
+# Generated From mlme_hard/mlme_tdls/mlme_tdls_debug.xml
+trace_types 44
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_2.address MAC_Address
+MLME_TDLS_PEER_DISCOVERY_REQUEST.tdls_allowed Boolean
+MLME_TDLS_PEER_SETUP_REQUEST.secure_link Boolean
+MLME_TDLS_PEER_SETUP_CONFIRM.address MAC_Address
+MLME_TDLS_PEER_SETUP_CONFIRM.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_INIT.tdls_activated Boolean
+MLME_TDLS_INIT.coex_activated Boolean
+MLME_TDLS_INIT.p2p_activated Boolean
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1.tdls_allowed Boolean
+MLME_TDLS_FRAME_DISCOVERY_RESPONSE_1.rssi Natural16s
+MLME_TDLS_PEER_SETUP_RESPONSE.address MAC_Address
+MLME_TDLS_PEER_SETUP_RESPONSE.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_PEER_SETUP_REQUEST_RETRIEVED.address MAC_Address
+MLME_TDLS_TRAFFIC_STATISTICS.address MAC_Address
+MLME_TDLS_TRAFFIC_STATISTICS.tdls_link_established Boolean
+MLME_TDLS_TRAFFIC_STATISTICS.packet_cnt_tx Natural32
+MLME_TDLS_TRAFFIC_STATISTICS.packet_cnt_rx Natural32
+MLME_TDLS_TRAFFIC_STATISTICS.tx_above_threshold Boolean
+MLME_TDLS_TRAFFIC_STATISTICS.rx_above_threshold Boolean
+MLME_TDLS_HOST_ACTION_REQUEST.address MAC_Address
+MLME_TDLS_FILTER_MATCH.action_type Natural8
+MLME_TDLS_FILTER_MATCH.address MAC_Address
+MLME_TDLS_FILTER_MATCH.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_DISCOVERY_EVENT_SAVED.address MAC_Address
+MLME_TDLS_DISCOVERY_EVENT_SAVED.found Natural32
+MLME_TDLS_DISCOVERY_EVENT_SAVED.space Natural32
+MLME_TDLS_TERMINATE_ONE.address MAC_Address
+MLME_TDLS_TERMINATE_ONE.tx_frame Boolean
+MLME_TDLS_PEER_TEARDOWN_REQUEST.address MAC_Address
+MLME_TDLS_PEER_TEARDOWN_REQUEST.link_state DEBUG_TYPE_TDLS_LINK_STATE
+MLME_TDLS_TERMINATE_THREE.address MAC_Address
+MLME_TDLS_CHANNEL_CONFIG.primary_freq Channel_Frequency
+MLME_TDLS_CHANNEL_CONFIG.channel_info Channel_Information
+MLME_TDLS_SENDING_ACTION_FRAME.frame_type DEBUG_TYPE_TDLS_ACTION_FRAME
+MLME_TDLS_SENDING_ACTION_FRAME.address MAC_Address
+MLME_TDLS_PEER_SETUP_REQUEST_SAVED.address MAC_Address
+MLME_TDLS_STATUS_CHANGED.new_state_is_active Boolean
+MLME_TDLS_STATUS_CHANGED.is_in_teardown Boolean
+MLME_TDLS_STATUS_CHANGED.coex_activated Boolean
+MLME_TDLS_STATUS_CHANGED.mvif_activated Boolean
+MLME_TDLS_STATUS_CHANGED.channel_switch Boolean
+MLME_TDLS_TERMINATE_TWO.address MAC_Address
+MLME_TDLS_TERMINATE_TWO.paused Boolean
+MLME_TDLS_TERMINATE_TWO.confirming Boolean
+DEBUG_TYPE_TDLS_ACTION_FRAME Enum 00 Setup_Request 01 Setup_Response 02 Setup_Confirm 03 Teardown_Request 04 Peer_Traffic_Ind 07 Peer_Psm_Request 08 Peer_Psm_Response 09 Peer_Traffic_Rsp 0a Discovery_Request 0e Discovery_Response
+DEBUG_TYPE_TDLS_LINK_STATE Enum 00 Idle 01 Waiting_For_Setup_Response 02 Waiting_For_Setup_Confirm 03 Established 04 In_Teardown
+# Generated From mlme_hard/mlme_frame/mlme_frame_debug.xml
+trace_def 7
+003f 0000 MLME_FRAME_BUILD_ASSOC_FRAME_ACM 0004 old_aci_aifsn new_aci_aifsn old_acm new_acm
+003f 0001 MLME_FRAME_BUILD_ASSOC_FRAME_ACM_RIC_COPIED 0002 coped_bytes resource_descriptor_count
+003f 0002 MLME_FRAME_BUILD_FRAME 0003 build frametype line
+003f 0003 MLME_FRAME_ECSA_INCLUDE_IN_BEACON 0005 now new_primary_channel new_channel_info channel_switch_count channel_switch_mode
+003f 0004 MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED 0003 current_offset frame_max_length attribute_size
+003f 0005 MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE 0007 valid hop_lim checksum len tgt dst ll_opt
+003f 0006 MLME_FRAME_STA_RECORD_CAPS_UPDATED 0002 sta_caps_current sta_caps_new
+# Generated From mlme_hard/mlme_frame/mlme_frame_debug.xml
+trace_types 21
+MLME_FRAME_STA_RECORD_CAPS_UPDATED.sta_caps_current Natural32
+MLME_FRAME_STA_RECORD_CAPS_UPDATED.sta_caps_new Natural32
+MLME_FRAME_BUILD_FRAME.build Boolean
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.now Natural32
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.new_primary_channel Integer8
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.channel_switch_count Integer8
+MLME_FRAME_ECSA_INCLUDE_IN_BEACON.channel_switch_mode Integer8
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.valid Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.hop_lim Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.checksum Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.len Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.tgt Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.dst Boolean
+MLME_FRAME_NEIGHBOR_DISCOVERY_NS_VALIDATE.ll_opt Boolean
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.current_offset Natural32
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.frame_max_length Natural32
+MLME_FRAME_LAST_NAN_ATTRIBUTE_NOT_INCLUDED.attribute_size Natural32
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.old_aci_aifsn Natural8
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.new_aci_aifsn Natural8
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.old_acm Boolean
+MLME_FRAME_BUILD_ASSOC_FRAME_ACM.new_acm Boolean
+# Generated From mlme_hard/mlme_mpdu_router/mlme_mpdu_router_debug.xml
+trace_def 13
+0006 0000 MLME_MPDU_FILTER_ADD 0002 filter_id mode
+0006 0001 MLME_MPDU_FRAME_FILTER 0003 pid Channel_Frequency bssid
+0006 0002 MLME_MPDU_FRAME_FILTERED_ADDR 0002 filter_addr frame_addr
+0006 0003 MLME_MPDU_FRAME_FILTERED_FREQ 0002 filter_freq frame_freq
+0006 0004 MLME_MPDU_FRAME_FILTERED_SSID 0001 frame
+0006 0005 MLME_MPDU_FRAME_MATCH 0003 pid subscribe_flags frame_flags
+0006 0006 MLME_MPDU_HOST_FILTER_MATCH 0000
+0006 0007 MLME_MPDU_MANAGEMENT_FRAME_FILTERED 0000
+0006 0008 MLME_MPDU_ROUTER_DEREGISTER_EXTERNAL 0000
+0006 0009 MLME_MPDU_ROUTER_DEREGISTER_INTERNAL 0001 pid
+0006 000a MLME_MPDU_ROUTER_FRAME 0003 type subtype subscribe_flags
+0006 000b MLME_MPDU_ROUTER_REGISTER_EXTERNAL 0000
+0006 000c MLME_MPDU_ROUTER_REGISTER_INTERNAL 0002 pid subscribe_flags
+# Generated From mlme_hard/mlme_mpdu_router/mlme_mpdu_router_debug.xml
+trace_types 17
+MLME_MPDU_FRAME_FILTERED_SSID.frame MBULK
+MLME_MPDU_ROUTER_REGISTER_INTERNAL.pid FsmProcessId
+MLME_MPDU_ROUTER_REGISTER_INTERNAL.subscribe_flags Natural32
+MLME_MPDU_ROUTER_DEREGISTER_INTERNAL.pid FsmProcessId
+MLME_MPDU_FRAME_FILTERED_ADDR.filter_addr MAC_Address
+MLME_MPDU_FRAME_FILTERED_ADDR.frame_addr MAC_Address
+MLME_MPDU_ROUTER_FRAME.subscribe_flags Natural32
+MLME_MPDU_FRAME_MATCH.pid FsmProcessId
+MLME_MPDU_FRAME_MATCH.subscribe_flags Natural32
+MLME_MPDU_FRAME_MATCH.frame_flags Natural32
+MLME_MPDU_FRAME_FILTER.pid FsmProcessId
+MLME_MPDU_FRAME_FILTER.Channel_Frequency Channel_Frequency
+MLME_MPDU_FRAME_FILTER.bssid MAC_Address
+MLME_MPDU_FILTER_ADD.filter_id Natural8
+MLME_MPDU_FILTER_ADD.mode Natural8
+MLME_MPDU_FRAME_FILTERED_FREQ.filter_freq Channel_Frequency
+MLME_MPDU_FRAME_FILTERED_FREQ.frame_freq Channel_Frequency
+# Generated From mlme_hard/mlme_txpower/mlme_txpower_debug.xml
+trace_def 4
+0036 0000 MLME_TXPOWER_INFO 000b channel_freq channel_info maximum reg_dom network sar nocell user tpc lte_coex minimum
+0036 0001 MLME_TXPOWER_LTE_COEX_POWER_REDUCTION 0004 current_centre_freq current_channel_info current_occupied_mask power_reduction_channel_mask
+0036 0002 MLME_TXPOWER_NETWORK 0006 envelope envelope_limit_20Mhz envelope_limit_channel_bw constraint constraint_limit calculated_limit
+0036 0003 MLME_TXPOWER_NETWORK_UPDATE 0002 new_limit old_limit
+# Generated From mlme_hard/mlme_txpower/mlme_txpower_debug.xml
+trace_types 21
+MLME_TXPOWER_NETWORK_UPDATE.new_limit Integer8
+MLME_TXPOWER_NETWORK_UPDATE.old_limit Integer8
+MLME_TXPOWER_INFO.channel_freq Channel_Frequency
+MLME_TXPOWER_INFO.channel_info Channel_Information
+MLME_TXPOWER_INFO.maximum Integer8
+MLME_TXPOWER_INFO.reg_dom Integer8
+MLME_TXPOWER_INFO.network Integer8
+MLME_TXPOWER_INFO.sar Integer8
+MLME_TXPOWER_INFO.nocell Integer8
+MLME_TXPOWER_INFO.user Integer8
+MLME_TXPOWER_INFO.tpc Integer8
+MLME_TXPOWER_INFO.lte_coex Integer8
+MLME_TXPOWER_INFO.minimum Integer8
+MLME_TXPOWER_NETWORK.envelope Boolean
+MLME_TXPOWER_NETWORK.envelope_limit_20Mhz Integer8
+MLME_TXPOWER_NETWORK.envelope_limit_channel_bw Integer8
+MLME_TXPOWER_NETWORK.constraint Boolean
+MLME_TXPOWER_NETWORK.constraint_limit Integer8
+MLME_TXPOWER_NETWORK.calculated_limit Integer8
+MLME_TXPOWER_LTE_COEX_POWER_REDUCTION.current_occupied_mask Natural64
+MLME_TXPOWER_LTE_COEX_POWER_REDUCTION.power_reduction_channel_mask Natural64
+# Generated From mlme_hard/mlme_ap/mlme_ap_debug.xml
+trace_def 5
+0014 0000 MLME_AP_AID 0001 aid
+0014 0001 MLME_AP_CONNECT_STATUS 0002 address info
+0014 0002 MLME_AP_FRAMETX 0001 status
+0014 0003 MLME_AP_RECORD_FLAGS 0005 address state aid mlme_connected_ind mlme_started_ind
+0014 0004 MLME_AP_RSN 0003 version group_cipher pairwise_ciphers
+# Generated From mlme_hard/mlme_ap/mlme_ap_debug.xml
+trace_types 6
+MLME_AP_CONNECT_STATUS.address MAC_Address
+MLME_AP_CONNECT_STATUS.info DEBUG_TYPE_AP_CONNECT_STATUS_VALUE
+MLME_AP_RECORD_FLAGS.address MAC_Address
+MLME_AP_RECORD_FLAGS.state MLME_STATION_RECORD_STATES
+MLME_AP_RECORD_FLAGS.mlme_connected_ind Boolean
+MLME_AP_RECORD_FLAGS.mlme_started_ind Boolean
+DEBUG_TYPE_AP_CONNECT_STATUS Enum 1000 deauth_sta_unknown 1001 deauth_from_sta_not_associated 1002 deauth_from_sta 1003 auth_from_sta_unknown 1004 auth_from_sta_known 1005 auth_declined_acl 1006 auth_declined_shared_auth 1007 auth_declined_seq_num 1008 auth_success 1009 assoc_from_sta_unknown 100a assoc_from_sta_known 100b assoc_no_free_aid 100c assoc_rates_mismatch 100d assoc_sec_mismatch 100e assoc_failure 100f assoc_success 1010 tkip_assoc_no_ht_allowed 1011 auth_pmf_in_use 1011 sa_query_failed
+# Generated From mlme_hard/mlme_vifctrl/mlme_vifctrl_debug.xml
+trace_def 67
+0008 0000 MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION 0005 primary_freq channel_info is_environment_40mhz_intolerant allowed_to_increase_bandwidth bandwidth_updated
+0008 0001 MLME_VIFCTRL_AP_FAILURE 0002 bssid reason
+0008 0002 MLME_VIFCTRL_ARP_DETECT 0003 action target_ip_address is_tracking_arp
+0008 0003 MLME_VIFCTRL_ARP_DETECT_IP_CHECK 0002 target_ip_address dst_ip_address
+0008 0004 MLME_VIFCTRL_ARP_OFFLOAD 0004 opcode sha spa tpa
+0008 0005 MLME_VIFCTRL_ARP_OFFLOAD_REPLY 0004 opcode tha spa tpa
+0008 0006 MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED 0002 enabled vif_type
+0008 0007 MLME_VIFCTRL_ASSIST_ACTIVE 0002 flavour active
+0008 0008 MLME_VIFCTRL_ASSIST_DHCP_FRAME 0001 flavour
+0008 0009 MLME_VIFCTRL_ASSIST_RA_FRAME 0002 frame line
+0008 000a MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES 0004 elapsed_time router_lifetime valid_lifetime preferred_lifetime
+0008 000b MLME_VIFCTRL_ASSIST_TIMER 0001 timer_id
+0008 000c MLME_VIFCTRL_BEACON_FORWARD 0001 enabled
+0008 000d MLME_VIFCTRL_BEACON_UPDATE 0001 now
+0008 000e MLME_VIFCTRL_CHANGED_AP_CHANNEL 0003 is_sta_preparing_channel_switch sta_primary_freq ap_proposed_primary_freq
+0008 000f MLME_VIFCTRL_CHANGE_BSS_REQ 0004 from_bssid from_freq to_bssid to_freq
+0008 0010 MLME_VIFCTRL_CHANNEL_CONFIG 0005 primary_freq centre_freq channel_info max_air_power form_max_air_power
+0008 0011 MLME_VIFCTRL_CONNECTION_RESUMED 0001 same_channel
+0008 0012 MLME_VIFCTRL_DEAUTH_FRAME_DROPPED_PMF 0002 fsubtype reason_code
+0008 0013 MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS 0003 pid priority direction
+0008 0014 MLME_VIFCTRL_DESCHEDULED 0002 pid line
+0008 0015 MLME_VIFCTRL_ECSA_COUNT_FINISHED 0003 now channel_switch_count channel_switch_time
+0008 0016 MLME_VIFCTRL_ECSA_RECEIVED 0003 new_primary_channel_number channel_switch_count channel_switch_mode
+0008 0017 MLME_VIFCTRL_ECSA_SEND_ACTION 0005 now bssid new_primary_channel new_channel_info channel_switch_count
+0008 0018 MLME_VIFCTRL_ECSA_TIMEOUT 0004 now new_channel_number new_channel_info channel_switch_count
+0008 0019 MLME_VIFCTRL_EVAL_BEACON_FLAGS 0002 current evaluated
+0008 001a MLME_VIFCTRL_FRAMETX 0001 status
+0008 001b MLME_VIFCTRL_INACTIVITY 0002 interval now
+0008 001c MLME_VIFCTRL_INACTIVITY_KICK_DO 0000
+0008 001d MLME_VIFCTRL_INACTIVITY_KICK_INFO 0003 current_time unicast_rx_time time_since_last_rx
+0008 001e MLME_VIFCTRL_KEEPALIVE_AP 0002 timeout timeout_check
+0008 001f MLME_VIFCTRL_KEEPALIVE_PEER 0003 last_activity_delta timeout check
+0008 0020 MLME_VIFCTRL_KEEPALIVE_STA 0003 mode timeout timeout_check
+0008 0021 MLME_VIFCTRL_KEEPALIVE_TX 0001 protected
+0008 0022 MLME_VIFCTRL_LISTEN_OFFLOAD 0001 interval
+0008 0023 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED 0003 ht_activated vht_activated all_membership_selector
+0008 0024 MLME_VIFCTRL_MIC_FAILURE 0002 peer status
+0008 0025 MLME_VIFCTRL_NAN_FAILURE 0002 reason arg
+0008 0026 MLME_VIFCTRL_NDP_FRAME 0002 frame line
+0008 0027 MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD 0006 router solicited override target_ip6_0 target_ll_0 line
+0008 0028 MLME_VIFCTRL_NDP_OFFLOAD 0004 icmp_type src_0 dst_0 line
+0008 0029 MLME_VIFCTRL_NDP_OFFLOAD_SET_ENABLED 0001 enabled
+0008 002a MLME_VIFCTRL_OBSS_SCAN_DONE_IND 0005 intolerant_channels intolerant_40mhz_ap_found intolerant_obss_found_by_peer found_obss_on_another_channel cycle_to_send_report
+0008 002b MLME_VIFCTRL_OBSS_SCAN_IND 0003 intolerant_channels intolerant_40mhz_ap_found found_obss_on_another_channel
+0008 002c MLME_VIFCTRL_OFFCHANNEL_TIMEOUT 0001 pid
+0008 002d MLME_VIFCTRL_OLBC 0003 rx_beacons bss_ht_protection_flags bss_erp_protection_flags
+0008 002e MLME_VIFCTRL_P2P_NOA 0005 duration interval start_time blackout_id position
+0008 002f MLME_VIFCTRL_PROBE_REQ_FILTERED 0003 da sa reason
+0008 0030 MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR 0002 da sa
+0008 0031 MLME_VIFCTRL_QBSS_CU 0003 reported_load_percentage computed_load_percentage channel_usage_above_threshold
+0008 0032 MLME_VIFCTRL_ROAMING_CONNECTION_INITIALISATION 0005 roaming_ft mic_len kck_len kek_len ptk_len
+0008 0033 MLME_VIFCTRL_SAVE_WMM_FOR_ACM 0000
+0008 0034 MLME_VIFCTRL_SELECTED_SECURITY 0006 security_status type group_cipher pairwise_cipher akm_suite adaptive_11r_enabled
+0008 0035 MLME_VIFCTRL_SEND_OMN_ACTION_FRAME 0002 bandwidth rx_nss
+0008 0036 MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME 0002 sm_power_save_enabled sm_mode
+0008 0037 MLME_VIFCTRL_SET_IP 0005 vif_type version address is_zero success
+0008 0038 MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS 0006 pid priority direction medium_time minimun_data_rate address
+0008 0039 MLME_VIFCTRL_SLOW_AP 0001 max_time
+0008 003a MLME_VIFCTRL_STATION_OVERRIDE_EDCA 0004 ac_category aifs_n cw_min_max txop
+0008 003b MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE 0002 beacon_period drift_allowance
+0008 003c MLME_VIFCTRL_STATION_QE_IGNORED_IE 0005 beacon_period qe_count qe_period qe_duration qe_offset
+0008 003d MLME_VIFCTRL_STATION_ROAM_END_ROAM 0003 bssid result_code reason_code
+0008 003e MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND 0003 preparing_channel_switch wifisharing_in_use ap_channel_switch_required
+0008 003f MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED 0002 req_mask mask
+0008 0040 MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS 0004 is_required is_rsdb_supported sta_primary_channel_freq ap_primary_channel_freq
+0008 0041 MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL 0003 sta_primary_freq ap_proposed_primary_freq count
+0008 0042 MLME_VIFCTRL_WIFISHARING_PERMITTED_CHANNELS 0001 mask
+# Generated From mlme_hard/mlme_vifctrl/mlme_vifctrl_debug.xml
+trace_types 151
+MLME_VIFCTRL_KEEPALIVE_PEER.last_activity_delta Integer32
+MLME_VIFCTRL_KEEPALIVE_PEER.timeout Integer32
+MLME_VIFCTRL_KEEPALIVE_PEER.check Natural32
+MLME_VIFCTRL_DESCHEDULED.pid FsmProcessId
+MLME_VIFCTRL_SEND_OMN_ACTION_FRAME.bandwidth Natural8
+MLME_VIFCTRL_SEND_OMN_ACTION_FRAME.rx_nss DEBUG_TYPE_VIFCTRL_NSS
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.beacon_period Natural32
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.qe_count Natural8
+MLME_VIFCTRL_STATION_QE_IGNORED_IE.qe_period Natural8
+MLME_VIFCTRL_KEEPALIVE_STA.mode MlmeKeepalive
+MLME_VIFCTRL_KEEPALIVE_STA.timeout Natural32
+MLME_VIFCTRL_KEEPALIVE_STA.timeout_check Natural32
+MLME_VIFCTRL_ARP_DETECT.target_ip_address Natural32
+MLME_VIFCTRL_ARP_DETECT.is_tracking_arp Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.ht_activated Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.vht_activated Boolean
+MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED.all_membership_selector Natural8
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.current_time Natural32
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.unicast_rx_time Natural32
+MLME_VIFCTRL_INACTIVITY_KICK_INFO.time_since_last_rx Natural32
+MLME_VIFCTRL_NDP_FRAME.frame MBULK
+MLME_VIFCTRL_ECSA_RECEIVED.new_primary_channel_number Natural8
+MLME_VIFCTRL_ECSA_RECEIVED.channel_switch_count Natural8
+MLME_VIFCTRL_ECSA_RECEIVED.channel_switch_mode Natural8
+MLME_VIFCTRL_ARP_DETECT_IP_CHECK.target_ip_address Natural32
+MLME_VIFCTRL_ARP_DETECT_IP_CHECK.dst_ip_address Natural32
+MLME_VIFCTRL_NAN_FAILURE.reason DEBUG_TYPE_VIFCTRL_NAN_FAILURE_REASON
+MLME_VIFCTRL_CHANNEL_CONFIG.primary_freq Channel_Frequency
+MLME_VIFCTRL_CHANNEL_CONFIG.centre_freq Channel_Frequency
+MLME_VIFCTRL_CHANNEL_CONFIG.max_air_power Integer8
+MLME_VIFCTRL_INACTIVITY.interval Natural32
+MLME_VIFCTRL_INACTIVITY.now Natural32
+MLME_VIFCTRL_BEACON_UPDATE.now Natural32
+MLME_VIFCTRL_NDP_OFFLOAD.icmp_type Natural8
+MLME_VIFCTRL_NDP_OFFLOAD.src_0 Natural32
+MLME_VIFCTRL_NDP_OFFLOAD.dst_0 Natural32
+MLME_VIFCTRL_ROAMING_CONNECTION_INITIALISATION.roaming_ft Boolean
+MLME_VIFCTRL_OBSS_SCAN_IND.intolerant_40mhz_ap_found Boolean
+MLME_VIFCTRL_OBSS_SCAN_IND.found_obss_on_another_channel Boolean
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.opcode DEBUG_ARP_OPCODE
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.tha MAC_Address
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.spa Natural32
+MLME_VIFCTRL_ARP_OFFLOAD_REPLY.tpa Natural32
+MLME_VIFCTRL_NDP_OFFLOAD_SET_ENABLED.enabled Boolean
+MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS.is_required Boolean
+MLME_VIFCTRL_WIFISHARING_COMPARE_CHANNELS.is_rsdb_supported Boolean
+MLME_VIFCTRL_QBSS_CU.channel_usage_above_threshold Boolean
+MLME_VIFCTRL_ECSA_SEND_ACTION.now Natural32
+MLME_VIFCTRL_ECSA_SEND_ACTION.bssid MAC_Address
+MLME_VIFCTRL_ECSA_SEND_ACTION.new_primary_channel Integer8
+MLME_VIFCTRL_ECSA_SEND_ACTION.channel_switch_count Integer8
+MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED.enabled Boolean
+MLME_VIFCTRL_ARP_OFFLOAD_SET_ENABLED.vif_type VIF_Type
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.preparing_channel_switch Boolean
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.wifisharing_in_use Boolean
+MLME_VIFCTRL_WIFISHARING_AP_CHANNEL_SWITCH_IND.ap_channel_switch_required Boolean
+MLME_VIFCTRL_ASSIST_RA_FRAME.frame MBULK
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.is_sta_preparing_channel_switch Boolean
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.sta_primary_freq Channel_Frequency
+MLME_VIFCTRL_CHANGED_AP_CHANNEL.ap_proposed_primary_freq Channel_Frequency
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.pid FsmProcessId
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.priority Priority
+MLME_VIFCTRL_DEL_TRAFFIC_PARAMETERS.direction Direction
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.bssid MAC_Address
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.result_code Result_Code
+MLME_VIFCTRL_STATION_ROAM_END_ROAM.reason_code Reason_Code
+MLME_VIFCTRL_ASSIST_DHCP_FRAME.flavour MESSAGE_TYPE
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.pid FsmProcessId
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.priority Priority
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.direction Direction
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.minimun_data_rate Rate
+MLME_VIFCTRL_SET_TRAFFIC_PARAMETERS.address MAC_Address
+MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE.beacon_period Natural32
+MLME_VIFCTRL_STATION_QE_DRIFT_ALLOWANCE.drift_allowance Natural32
+MLME_VIFCTRL_LISTEN_OFFLOAD.interval Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.security_status Result_Code
+MLME_VIFCTRL_SELECTED_SECURITY.type DEBUG_TYPE_VIFCTRL_SELECTED_SECURITY
+MLME_VIFCTRL_SELECTED_SECURITY.group_cipher Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.pairwise_cipher Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.akm_suite Natural32
+MLME_VIFCTRL_SELECTED_SECURITY.adaptive_11r_enabled Boolean
+MLME_VIFCTRL_SET_IP.vif_type VIF_Type
+MLME_VIFCTRL_SET_IP.version Integer8
+MLME_VIFCTRL_SET_IP.address Natural32
+MLME_VIFCTRL_SET_IP.is_zero Boolean
+MLME_VIFCTRL_SET_IP.success Boolean
+MLME_VIFCTRL_ARP_OFFLOAD.opcode DEBUG_ARP_OPCODE
+MLME_VIFCTRL_ARP_OFFLOAD.sha MAC_Address
+MLME_VIFCTRL_ARP_OFFLOAD.spa Natural32
+MLME_VIFCTRL_ARP_OFFLOAD.tpa Natural32
+MLME_VIFCTRL_ASSIST_ACTIVE.flavour MESSAGE_TYPE
+MLME_VIFCTRL_ASSIST_ACTIVE.active Boolean
+MLME_VIFCTRL_AP_FAILURE.bssid MAC_Address
+MLME_VIFCTRL_AP_FAILURE.reason DEBUG_TYPE_VIFCTRL_AP_FAILURE_REASON
+MLME_VIFCTRL_ASSIST_TIMER.timer_id SignalId
+MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME.sm_power_save_enabled Natural8
+MLME_VIFCTRL_SEND_SM_POWER_SAVE_ACTION_FRAME.sm_mode Natural8
+MLME_VIFCTRL_OFFCHANNEL_TIMEOUT.pid FsmProcessId
+MLME_VIFCTRL_PROBE_REQ_FILTERED.da MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED.sa MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED.reason DEBUG_TYPE_VIFCTRL_PROBE_REQ_FILTER_REASON
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.primary_freq Channel_Frequency
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.channel_info Channel_Information
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.is_environment_40mhz_intolerant Boolean
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.allowed_to_increase_bandwidth Boolean
+MLME_VIFCTRL_AP_BANDWIDTH_EVALUATION.bandwidth_updated Boolean
+MLME_VIFCTRL_KEEPALIVE_TX.protected Boolean
+MLME_VIFCTRL_ECSA_TIMEOUT.now Natural32
+MLME_VIFCTRL_ECSA_TIMEOUT.new_channel_number Integer8
+MLME_VIFCTRL_ECSA_TIMEOUT.channel_switch_count Integer8
+MLME_VIFCTRL_WIFISHARING_PERMITTED_CHANNELS.mask Natural48
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.sta_primary_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.ap_proposed_primary_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_MOVING_AP_TO_CHANNEL.count Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.ac_category Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.aifs_n Natural8
+MLME_VIFCTRL_STATION_OVERRIDE_EDCA.cw_min_max Natural8
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.now Natural32
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.channel_switch_count Integer8
+MLME_VIFCTRL_ECSA_COUNT_FINISHED.channel_switch_time Natural32
+MLME_VIFCTRL_MIC_FAILURE.peer MAC_Address
+MLME_VIFCTRL_MIC_FAILURE.status DEBUG_TYPE_VIFCTRL_MIC_FAILURE_RESULT
+MLME_VIFCTRL_BEACON_FORWARD.enabled Boolean
+MLME_VIFCTRL_SLOW_AP.max_time Natural32
+MLME_VIFCTRL_CHANGE_BSS_REQ.from_bssid MAC_Address
+MLME_VIFCTRL_CHANGE_BSS_REQ.from_freq Channel_Frequency
+MLME_VIFCTRL_CHANGE_BSS_REQ.to_bssid MAC_Address
+MLME_VIFCTRL_CHANGE_BSS_REQ.to_freq Channel_Frequency
+MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED.req_mask Natural48
+MLME_VIFCTRL_WIFISHARING_CHANNEL_NOT_PERMITTED.mask Natural48
+MLME_VIFCTRL_P2P_NOA.duration Natural32
+MLME_VIFCTRL_P2P_NOA.interval Natural32
+MLME_VIFCTRL_P2P_NOA.start_time Natural32
+MLME_VIFCTRL_P2P_NOA.position Natural32
+MLME_VIFCTRL_CONNECTION_RESUMED.same_channel Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.router Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.solicited Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.override Boolean
+MLME_VIFCTRL_NDP_NEIGHBOR_ADV_OFFLOAD.target_ip6_0 Natural32
+MLME_VIFCTRL_KEEPALIVE_AP.timeout Natural32
+MLME_VIFCTRL_KEEPALIVE_AP.timeout_check Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.elapsed_time Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.router_lifetime Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.valid_lifetime Natural32
+MLME_VIFCTRL_ASSIST_RA_HANDLE_STORED_FRAMES.preferred_lifetime Natural32
+MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR.da MAC_Address
+MLME_VIFCTRL_PROBE_REQ_FILTERED_DEVICE_ADDR.sa MAC_Address
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.intolerant_40mhz_ap_found Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.intolerant_obss_found_by_peer Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.found_obss_on_another_channel Boolean
+MLME_VIFCTRL_OBSS_SCAN_DONE_IND.cycle_to_send_report Boolean
+DEBUG_TYPE_VIFCTRL_NSS Enum 0000 nss_one_stream 0001 nss_two_streams 0002 nss_three_streams 0003 nss_four_streams 0004 nss_five_streams 0005 nss_six_streams 0006 nss_seven_streams 0007 nss_eight_streams
+DEBUG_TYPE_VIFCTRL_NAN_FAILURE_REASON Enum 0001 vif_index 0002 invalid_tlv
+DEBUG_TYPE_VIFCTRL_PROBE_REQ_FILTER_REASON Enum 0000 group_address 0001 dest_address 0002 ssid 0003 no_p2p_ie 0004 device_address 0005 no_wcs_ie 0006 device_type 0007 no_probe_rsp_ies 0008 no_probe_rsp_p2p_ie 0009 no_probe_rsp_wsc_ie 000a already_txing_probe_resp 000b no_supported_rates_ie 000c p2p_with_only_basic_rates
+DEBUG_TYPE_VIFCTRL_SELECTED_SECURITY Enum 0000 none 0001 rsn 0002 wpa 0003 wapi
+DEBUG_TYPE_VIFCTRL_MIC_FAILURE_RESULT Enum 0000 success 0001 no_peer_entry
+DEBUG_TYPE_VIFCTRL_AP_FAILURE_REASON Enum 0000 bssid 0001 vif_index 0002 beacon_period 0003 dtim_period 0004 authentication_type 0005 channel 0008 ie_list 0009 no_rates_ie 000a no_ssid_ie 000b no_ht_operation_ie 000c no_wmm_ie 000d no_vht_operation_or_ht_ie 000e missing_ht_ies 0011 probe_rsp_no_p2p_ie 0012 ht_op_ie_channel_mismatch 0013 multiple_security_ies 0014 group_key_mismatch 0015 vendor_ie_present 0018 country_mismatch 001a wifisharing_not_supported 001b no_valid_channel_is_found
+DEBUG_ARP_OPCODE Enum 0001 request 0002 reply
+# Generated From mlme_hard/mlme_ftm/mlme_ftm_debug.xml
+trace_def 21
+0042 0000 MLME_FTM_ADDED_RESPONDER 0006 address frequency bursts_interval bursts_duration number_of_bursts number_of_frames_per_burst
+0042 0001 MLME_FTM_ADD_SCAN_REQUEST 0000
+0042 0002 MLME_FTM_ADD_SCAN_RESULT 0001 result_code
+0042 0003 MLME_FTM_DIST_RESULT 0001 distance_mm
+0042 0004 MLME_FTM_NEW_BURST_INTERVAL 0001 bursts_interval
+0042 0005 MLME_FTM_PROPOSED_BURST_START_TIME 0001 time
+0042 0006 MLME_FTM_RANGE_INDICATION 0003 report rtt_id count
+0042 0007 MLME_FTM_RESPONDER_NOT_ASAP 0001 address
+0042 0008 MLME_FTM_RESPONDER_PARAMETERS_UPDATED 0006 address bursts_start bursts_interval bursts_duration number_of_bursts number_of_frames_per_burst
+0042 0009 MLME_FTM_RESPONDER_UNUSED 0002 preamble bandwidth
+0042 000a MLME_FTM_RTT_RESULT 0008 address status burst_number measurement_attempted measurement_performed rtt deviation spread
+0042 000b MLME_FTM_RTT_STATUS 0002 status line_num
+0042 000c MLME_FTM_SCAN_DONE_INDICATION 0002 scan_id responder_count
+0042 000d MLME_FTM_SCAN_INDICATION 0001 interface_address
+0042 000e MLME_FTM_START_BURST 0002 address asap_mode
+0042 000f MLME_FTM_START_SESSION 0001 address
+0042 0010 MLME_FTM_STATUS 0002 status line_num
+0042 0011 MLME_FTM_TIME_STAMPS_T1_T4 0004 t1 t4 dialog_token follow_up_dialog_token
+0042 0012 MLME_FTM_TIME_STAMPS_T2_T3 0004 t2 t3 dialog_token follow_up_dialog_token
+0042 0013 MLME_RX_FTM_FRAME_STATS 0002 Received_frames Valid_frames
+0042 0014 MLME_RX_FTM_TIME_DIFF 0003 T2_T3_diff_in_picosecs T1_T4_diff_in_picosecs RTT_in_picosecs
+# Generated From mlme_hard/mlme_ftm/mlme_ftm_debug.xml
+trace_types 37
+MLME_FTM_ADDED_RESPONDER.address MAC_Address
+MLME_FTM_ADDED_RESPONDER.frequency Channel_Frequency
+MLME_FTM_ADDED_RESPONDER.bursts_interval Natural32
+MLME_FTM_ADDED_RESPONDER.bursts_duration Natural32
+MLME_FTM_START_BURST.address MAC_Address
+MLME_FTM_START_BURST.asap_mode Boolean
+MLME_RX_FTM_FRAME_STATS.Received_frames Integer32
+MLME_RX_FTM_FRAME_STATS.Valid_frames Integer32
+MLME_FTM_RESPONDER_NOT_ASAP.address MAC_Address
+MLME_FTM_STATUS.status DEBUG_TYPE_FTM_STATUS
+MLME_FTM_STATUS.line_num __LINE__
+MLME_FTM_TIME_STAMPS_T2_T3.t2 Natural64
+MLME_FTM_TIME_STAMPS_T2_T3.t3 Natural64
+MLME_FTM_TIME_STAMPS_T2_T3.dialog_token Natural8
+MLME_FTM_TIME_STAMPS_T2_T3.follow_up_dialog_token Natural8
+MLME_FTM_NEW_BURST_INTERVAL.bursts_interval Natural32
+MLME_FTM_SCAN_INDICATION.interface_address MAC_Address
+MLME_FTM_RTT_RESULT.address MAC_Address
+MLME_FTM_RTT_RESULT.status DEBUG_TYPE_FTM_RTT_STATUS
+MLME_FTM_RTT_RESULT.rtt Natural32
+MLME_FTM_RANGE_INDICATION.report MBULK
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.address MAC_Address
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_start Natural32
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_interval Natural32
+MLME_FTM_RESPONDER_PARAMETERS_UPDATED.bursts_duration Natural32
+MLME_FTM_PROPOSED_BURST_START_TIME.time Natural32
+MLME_FTM_START_SESSION.address MAC_Address
+MLME_FTM_RTT_STATUS.status DEBUG_TYPE_FTM_RTT_STATUS
+MLME_FTM_RTT_STATUS.line_num __LINE__
+MLME_FTM_DIST_RESULT.distance_mm Natural32
+MLME_RX_FTM_TIME_DIFF.T2_T3_diff_in_picosecs Integer32
+MLME_RX_FTM_TIME_DIFF.T1_T4_diff_in_picosecs Integer32
+MLME_RX_FTM_TIME_DIFF.RTT_in_picosecs Integer32
+MLME_FTM_TIME_STAMPS_T1_T4.t1 Natural64
+MLME_FTM_TIME_STAMPS_T1_T4.t4 Natural64
+MLME_FTM_TIME_STAMPS_T1_T4.dialog_token Natural8
+MLME_FTM_TIME_STAMPS_T1_T4.follow_up_dialog_token Natural8
+DEBUG_TYPE_FTM_STATUS Enum 01 Created 02 Negotiateable 04 Burst 08 Stopabble 10 Terminated
+DEBUG_TYPE_FTM_RTT_STATUS Enum 00 Success 02 Fail_No_Response 03 Fail_Rejected 04 Fail_Not_Scheduled 08 Aborted 0a Fail_No_Frames 0b Fail_Burst_Not_scheduled 0f Fail_Override
+# Generated From mlme_hard/mlme_roaming/mlme_roaming_debug.xml
+trace_def 20
+0018 0000 MLME_ROAMING_ATTEMPT 0007 bssid rssi freq okc_state pmk_available ft_capability roaming_ft
+0018 0001 MLME_ROAMING_BSS_TRANS_MGMT_REQ 0003 link_loss_imminent disassociation_timer_us deauth_pending
+0018 0002 MLME_ROAMING_COMPLETE 0001 bssid
+0018 0003 MLME_ROAMING_CONNECTION_RESUMED 0001 bssid
+0018 0004 MLME_ROAMING_CU_TRIGGER 0001 channel_usage_above_threshold
+0018 0005 MLME_ROAMING_FAIL 0003 bssid result_code reason_code
+0018 0006 MLME_ROAMING_GIVEUP 0000
+0018 0007 MLME_ROAMING_INITIAL_CONFIG 000a background_scan_period roam_scan_band rssi_low_threshold rssi_delta_threshold rssi_no_candidate_delta_threshold cu_no_candidate_delta_threshold rssi_cu_low_threshold_2G rssi_cu_low_threshold_5G cu_high_threshold_2G cu_high_threshold_5G
+0018 0008 MLME_ROAMING_LINK_LOST 0001 deauth
+0018 0009 MLME_ROAMING_NEIGHBOR 0001 freq
+0018 000a MLME_ROAMING_NEW_SCAN 0005 scan_mode scan_type periodic fullscan scan_channels
+0018 000b MLME_ROAMING_NON_CURRENT_AP_IDENTIFIED 0000
+0018 000c MLME_ROAMING_NO_CANDIDATE_MODE_UPDATE 0001 ctrl_flag_in_no_candidate_mode
+0018 000d MLME_ROAMING_POTENTIAL_CANDIDATE 0008 is_eligible candidate_selection_factor candidate_eligibility_threshold local_AP_selection_factor candidate_rssi candidate_channel_utilisation local_AP_rssi local_AP_channel_utilisation
+0018 000e MLME_ROAMING_RSSI_BOOST_CANDIDATE 0004 is_candidate frequency original_rssi boost
+0018 000f MLME_ROAMING_RSSI_TRIGGER 0006 trigger_flags rssi rssi_low rssi_high rssi_cu_low rssi_cu_high
+0018 0010 MLME_ROAMING_SCAN_DONE 0001 roam_candidates
+0018 0011 MLME_ROAMING_SCAN_IND_FILTERED 0006 bssid other_bssid rssi freq current_rssi reason
+0018 0012 MLME_ROAMING_SET_CACHED_CHANNELS 0001 cached_channel_mask
+0018 0013 MLME_ROAMING_SET_SCAN_MODE 0006 new_scan_mode old_scan_mode rssi_trigger cu_trigger deauth_pending deauth_reason
+# Generated From mlme_hard/mlme_roaming/mlme_roaming_debug.xml
+trace_types 59
+MLME_ROAMING_NO_CANDIDATE_MODE_UPDATE.ctrl_flag_in_no_candidate_mode Boolean
+MLME_ROAMING_POTENTIAL_CANDIDATE.is_eligible Boolean
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_selection_factor Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_eligibility_threshold Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_selection_factor Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_rssi Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.candidate_channel_utilisation Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_rssi Decibels
+MLME_ROAMING_POTENTIAL_CANDIDATE.local_AP_channel_utilisation Decibels
+MLME_ROAMING_LINK_LOST.deauth Reason_Code
+MLME_ROAMING_SET_SCAN_MODE.new_scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_SET_SCAN_MODE.old_scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_SET_SCAN_MODE.rssi_trigger Boolean
+MLME_ROAMING_SET_SCAN_MODE.cu_trigger Boolean
+MLME_ROAMING_SET_SCAN_MODE.deauth_pending DEBUG_TYPE_ROAMING_DEAUTH_PENDING
+MLME_ROAMING_SET_SCAN_MODE.deauth_reason Reason_Code
+MLME_ROAMING_CONNECTION_RESUMED.bssid MAC_Address
+MLME_ROAMING_SET_CACHED_CHANNELS.cached_channel_mask Natural64
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.link_loss_imminent Boolean
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.disassociation_timer_us Natural32
+MLME_ROAMING_BSS_TRANS_MGMT_REQ.deauth_pending DEBUG_TYPE_ROAMING_DEAUTH_PENDING
+MLME_ROAMING_INITIAL_CONFIG.background_scan_period Natural32
+MLME_ROAMING_INITIAL_CONFIG.rssi_low_threshold Decibels
+MLME_ROAMING_INITIAL_CONFIG.rssi_cu_low_threshold_2G Decibels
+MLME_ROAMING_INITIAL_CONFIG.rssi_cu_low_threshold_5G Decibels
+MLME_ROAMING_RSSI_TRIGGER.trigger_flags DEBUG_TYPE_ROAMING_TRIGGER_MODE
+MLME_ROAMING_RSSI_TRIGGER.rssi Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_low Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_high Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_cu_low Decibels
+MLME_ROAMING_RSSI_TRIGGER.rssi_cu_high Decibels
+MLME_ROAMING_NEW_SCAN.scan_mode DEBUG_TYPE_ROAMING_SCAN_MODE
+MLME_ROAMING_NEW_SCAN.scan_type DEBUG_TYPE_ROAMING_SCAN
+MLME_ROAMING_NEW_SCAN.periodic Boolean
+MLME_ROAMING_NEW_SCAN.fullscan Boolean
+MLME_ROAMING_NEW_SCAN.scan_channels Natural48
+MLME_ROAMING_COMPLETE.bssid MAC_Address
+MLME_ROAMING_NEIGHBOR.freq Channel_Frequency
+MLME_ROAMING_FAIL.bssid MAC_Address
+MLME_ROAMING_FAIL.result_code Result_Code
+MLME_ROAMING_FAIL.reason_code Reason_Code
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.is_candidate Boolean
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.frequency Channel_Frequency
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.original_rssi Decibels
+MLME_ROAMING_RSSI_BOOST_CANDIDATE.boost Decibels
+MLME_ROAMING_ATTEMPT.bssid MAC_Address
+MLME_ROAMING_ATTEMPT.rssi Decibels
+MLME_ROAMING_ATTEMPT.freq Channel_Frequency
+MLME_ROAMING_ATTEMPT.okc_state DEBUG_TYPE_ROAMING_OKC_STATE
+MLME_ROAMING_ATTEMPT.pmk_available Boolean
+MLME_ROAMING_ATTEMPT.ft_capability Boolean
+MLME_ROAMING_ATTEMPT.roaming_ft Boolean
+MLME_ROAMING_CU_TRIGGER.channel_usage_above_threshold Boolean
+MLME_ROAMING_SCAN_IND_FILTERED.bssid MAC_Address
+MLME_ROAMING_SCAN_IND_FILTERED.other_bssid MAC_Address
+MLME_ROAMING_SCAN_IND_FILTERED.rssi Decibels
+MLME_ROAMING_SCAN_IND_FILTERED.freq Channel_Frequency
+MLME_ROAMING_SCAN_IND_FILTERED.current_rssi Decibels
+MLME_ROAMING_SCAN_IND_FILTERED.reason DEBUG_TYPE_ROAMING_SCAN_IND_FILTER_REASON
+DEBUG_TYPE_ROAMING_DEAUTH_PENDING Enum 0000 DEAUTH_NOT_PENDING 0001 IN_MORE_THAN_10_SECONDS 0002 IN_LESS_THAN_10_SECONDS
+DEBUG_TYPE_ROAMING_TRIGGER_MODE Enum 0001 no_trigger 0003 RSSI_only 0005 CU_RSSI_only 0007 RSSI_and_CU_RSSI
+DEBUG_TYPE_ROAMING_SCAN_MODE Enum 0000 ROAMING_SCAN_MODE_CASE_1_NCHO 0001 ROAMING_SCAN_MODE_CASE_1 0002 ROAMING_SCAN_MODE_CASE_2 0003 ROAMING_SCAN_MODE_CASE_3 0004 ScanMode_None
+DEBUG_TYPE_ROAMING_OKC_STATE Enum 0000 OKC_TRY 0001 OKC_ON 0002 OKC_OFF
+DEBUG_TYPE_ROAMING_SCAN Enum 000b SOFT_NEIGHBOUR_ROAMING_SCAN 000c SOFT_CACHED_ROAMING_SCAN 000d SOFT_ALL_ROAMING_SCAN 000e HARD_NEIGHBOUR_ROAMING_SCAN 000f HARD_CACHED_ROAMING_SCAN 0010 HARD_ALL_ROAMING_SCAN 0013 FIRST_ILLEGAL
+DEBUG_TYPE_ROAMING_SCAN_IND_FILTER_REASON Enum 0000 bssid_connected 0001 ssid 0002 rssi 0003 rss 0004 malloc_failed 0005 off_channel 0006 out_of_band 0007 bssid_not_target 0008 mobility_domain 000c selection_factor_low
+# Generated From mlme_hard/mlme_requests/mlme_requests_debug.xml
+trace_def 5
+0007 0000 MLME_REQUESTS_FORWARD 0003 id rules pid
+0007 0001 MLME_REQUESTS_FORWARD_ERROR 0004 id rules pid line
+0007 0002 MLME_REQUESTS_SEND_STAGE1_RESETS 0001 pid
+0007 0003 MLME_REQUESTS_SEND_STAGE2_RESETS 0001 pid
+0007 0004 MLME_REQUESTS_SEND_WAKE_HOSTS 0001 pid
+# Generated From mlme_hard/mlme_requests/mlme_requests_debug.xml
+trace_types 5
+MLME_REQUESTS_FORWARD_ERROR.pid FsmProcessId
+MLME_REQUESTS_SEND_STAGE1_RESETS.pid FsmProcessId
+MLME_REQUESTS_SEND_WAKE_HOSTS.pid FsmProcessId
+MLME_REQUESTS_FORWARD.pid FsmProcessId
+MLME_REQUESTS_SEND_STAGE2_RESETS.pid FsmProcessId
+# Generated From mlme_hard/mlme_security/mlme_security_debug.xml
+trace_def 32
+0035 0000 MLME_SECURITY_EAPOL 0001 line
+0035 0001 MLME_SECURITY_EAPOL_BUILD_SEND 0002 bssid type
+0035 0002 MLME_SECURITY_EAPOL_DECRYPT_ERROR 0001 line
+0035 0003 MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID 0002 descriptor_version line
+0035 0004 MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO 0004 m4_mbulk_available key_mbulk_available done_action security_tracker
+0035 0005 MLME_SECURITY_EAPOL_FRAME_RECEIVED 0003 okc_state pmk_available is_roaming
+0035 0006 MLME_SECURITY_EAPOL_GTK_UNAVAILABLE 0001 line
+0035 0007 MLME_SECURITY_EAPOL_IGTK_UNAVAILABLE 0001 line
+0035 0008 MLME_SECURITY_EAPOL_KEY_DATA_LENGTH_INVALID 0002 len line
+0035 0009 MLME_SECURITY_EAPOL_MIC_DISCARDED 0001 line
+0035 000a MLME_SECURITY_EAPOL_MIC_NOT_PRESENT 0001 line
+0035 000b MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED 0003 secure encrypted_key line
+0035 000c MLME_SECURITY_EAPOL_PROCESS_G 0000
+0035 000d MLME_SECURITY_EAPOL_PROCESS_G1 0000
+0035 000e MLME_SECURITY_EAPOL_PROCESS_M 0000
+0035 000f MLME_SECURITY_EAPOL_PROCESS_M1 0000
+0035 0010 MLME_SECURITY_EAPOL_PROCESS_M3 0000
+0035 0011 MLME_SECURITY_EAPOL_PTK_UNAVAILABLE 0001 line
+0035 0012 MLME_SECURITY_FRAMETX 0001 status
+0035 0013 MLME_SECURITY_FRAME_TOO_SHORT_FOR_KEY 0001 line
+0035 0014 MLME_SECURITY_FSM_DEINIT 0001 pid
+0035 0015 MLME_SECURITY_FSM_INIT 0001 pid
+0035 0016 MLME_SECURITY_GET_CIPHER_MATCH 0002 frame_akm_suite_number frame_akm_suite
+0035 0017 MLME_SECURITY_INSTALL_KEY 0001 key_type
+0035 0018 MLME_SECURITY_IS_EAPOL_FRAME 0001 line
+0035 0019 MLME_SECURITY_IS_EAP_FRAME 0001 line
+0035 001a MLME_SECURITY_KCK 0000
+0035 001b MLME_SECURITY_KEK 0000
+0035 001c MLME_SECURITY_PMK 0000
+0035 001d MLME_SECURITY_PTK 0000
+0035 001e MLME_SECURITY_REPLAY_COUNTER_INVALID 0001 line
+0035 001f MLME_SECURITY_TK 0000
+# Generated From mlme_hard/mlme_security/mlme_security_debug.xml
+trace_types 30
+MLME_SECURITY_EAPOL_GTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_GET_CIPHER_MATCH.frame_akm_suite Natural32
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.secure Boolean
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.encrypted_key Boolean
+MLME_SECURITY_EAPOL_NOT_SECURE_AND_ENCRYPTED.line __LINE__
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.m4_mbulk_available Boolean
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.key_mbulk_available Boolean
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.done_action Natural8
+MLME_SECURITY_EAPOL_EVALUATE_NOTHING_TODO.security_tracker Natural8
+MLME_SECURITY_EAPOL_BUILD_SEND.bssid MAC_Address
+MLME_SECURITY_EAPOL_BUILD_SEND.type DEBUG_TYPE_SECURITY_EAPOL_FRAME
+MLME_SECURITY_EAPOL_PTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_EAPOL.line __LINE__
+MLME_SECURITY_EAPOL_IGTK_UNAVAILABLE.line __LINE__
+MLME_SECURITY_EAPOL_DECRYPT_ERROR.line __LINE__
+MLME_SECURITY_EAPOL_MIC_NOT_PRESENT.line __LINE__
+MLME_SECURITY_REPLAY_COUNTER_INVALID.line __LINE__
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.okc_state DEBUG_TYPE_SECURITY_OKC_STATE
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.pmk_available Boolean
+MLME_SECURITY_EAPOL_FRAME_RECEIVED.is_roaming Boolean
+MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID.descriptor_version Natural8
+MLME_SECURITY_EAPOL_DESCRIPTOR_VERSION_INVALID.line __LINE__
+MLME_SECURITY_FSM_INIT.pid FsmProcessId
+MLME_SECURITY_FRAME_TOO_SHORT_FOR_KEY.line __LINE__
+MLME_SECURITY_EAPOL_MIC_DISCARDED.line __LINE__
+MLME_SECURITY_IS_EAPOL_FRAME.line __LINE__
+MLME_SECURITY_IS_EAP_FRAME.line __LINE__
+MLME_SECURITY_FSM_DEINIT.pid FsmProcessId
+MLME_SECURITY_INSTALL_KEY.key_type Key_Type
+MLME_SECURITY_EAPOL_KEY_DATA_LENGTH_INVALID.line __LINE__
+DEBUG_TYPE_SECURITY_OKC_STATE Enum 0000 OKC_TRY 0001 OKC_ON 0002 OKC_OFF
+DEBUG_TYPE_SECURITY_EAPOL_FRAME Enum 00 M2 01 M4 02 G2
+# Generated From mlme_hard/mlme_nan/mlme_nam_debug.xml
+trace_def 32
+004b 0000 MLME_NAM_ADD_VIF_SCHEDULE 0001 pid
+004b 0001 MLME_NAM_ALLOCATE_AVAILABILITY_ENTRY 0001 pid
+004b 0002 MLME_NAM_AVAILABILITY_ENTRY 0006 status type schedule primary_freq channel_info desired_nss
+004b 0003 MLME_NAM_BUILD_AVAILABILITY 0001 pid
+004b 0004 MLME_NAM_BUILD_VIF_NDC_TIME_MAP 0001 pid
+004b 0005 MLME_NAM_CREATE_SCHEDULE 0001 pid
+004b 0006 MLME_NAM_DW_INFO 0002 band slot_period
+004b 0007 MLME_NAM_FREE_AVAILABILITY_ENTRY 0001 pid
+004b 0008 MLME_NAM_MAKE_EXCLUSIVE_NDC_SCHEDULE 0001 pid
+004b 0009 MLME_NAM_MARK_SCHEDULE_AS_COMMITTED 0001 pid
+004b 000a MLME_NAM_NDL_VIF_NDC_CREATED 0001 ndc_id
+004b 000b MLME_NAM_REMOVE_DWS_FROM_SCHEDULE 0001 pid
+004b 000c MLME_NAM_REMOVE_OVERLAPPING_SCHEDULES 0001 pid
+004b 000d MLME_NAM_SCHEDULE_AVAILABILITIES 0001 pid
+004b 000e MLME_NAM_SCHEDULE_ENTRY 0004 schedule_type primary_freq channel_info desired_nss
+004b 000f MLME_NAM_SLOT_MAP 0001 slot_map
+004b 0010 MLME_NAM_TIME_MAP_ENTRY 0003 slot_start_offset slot_duration slot_period
+004b 0011 MLME_NAM_UPDATE_DW 0002 band slot_period
+004b 0012 MLME_NAM_UPDATE_NMI_VIF_DW_SCHEDULE 0001 pid
+004b 0013 MLME_NAM_UPDATE_SCHEDULE 0001 pid
+004b 0014 MLME_NAM_VERIFY_NDC_SCHEDULE 0001 ndc_id
+004b 0015 MLME_NAM_VIF_DEINIT 0001 pid
+004b 0016 MLME_NAM_VIF_INIT 0001 pid
+004b 0017 MLME_NAM_VIF_SCHEDULE_NEGOTIATED 0001 pid
+004b 0018 MLME_NSF_BUILD_AVAILABILITY_DATA 0001 pid
+004b 0019 MLME_NSF_BUILD_AVAILABILITY_ENTRY 0001 control
+004b 001a MLME_NSF_BUILD_CHANNEL_ENTRY 0005 primary_freq channel_info operating_class channel_mask primary_channel_map
+004b 001b MLME_NSF_BUILD_REGULATORY_CONFIG 0005 primary_freq channel_info operating_class channel_mask primary_channel_map
+004b 001c MLME_NSF_BUILD_TIME_BIT_MAP 0002 control length
+004b 001d MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE 0005 seq_id map_id committed_changed potential_changed ndc_changed
+004b 001e MLME_NSF_EXTRACT_TIME_BIT_MAP 0002 control length
+004b 001f MLME_NSF_SLOT_MAP 0001 slot_map
+# Generated From mlme_hard/mlme_nan/mlme_nam_debug.xml
+trace_types 55
+MLME_NAM_AVAILABILITY_ENTRY.status DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.type DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.schedule DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_AVAILABILITY_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NAM_AVAILABILITY_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NAM_AVAILABILITY_ENTRY.desired_nss NSS
+MLME_NAM_DW_INFO.band INTERFACE
+MLME_NAM_DW_INFO.slot_period Time
+MLME_NSF_BUILD_AVAILABILITY_DATA.pid FsmProcessId
+MLME_NSF_EXTRACT_TIME_BIT_MAP.length Natural8
+MLME_NAM_UPDATE_SCHEDULE.pid FsmProcessId
+MLME_NAM_SLOT_MAP.slot_map TOKEN
+MLME_NSF_BUILD_REGULATORY_CONFIG.primary_freq CHANNEL_FREQUENCY
+MLME_NSF_BUILD_REGULATORY_CONFIG.channel_info CHANNEL_INFORMATION
+MLME_NSF_BUILD_REGULATORY_CONFIG.operating_class Natural8
+MLME_NSF_BUILD_REGULATORY_CONFIG.channel_mask Natural64
+MLME_NSF_BUILD_REGULATORY_CONFIG.primary_channel_map Natural8
+MLME_NSF_SLOT_MAP.slot_map TOKEN
+MLME_NAM_VIF_SCHEDULE_NEGOTIATED.pid FsmProcessId
+MLME_NAM_FREE_AVAILABILITY_ENTRY.pid FsmProcessId
+MLME_NAM_SCHEDULE_AVAILABILITIES.pid FsmProcessId
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.seq_id Natural8
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.map_id Natural8
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.committed_changed Boolean
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.potential_changed Boolean
+MLME_NSF_EXTRACTING_AVAILABILITY_ATTRIBUTE.ndc_changed Boolean
+MLME_NSF_BUILD_CHANNEL_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NSF_BUILD_CHANNEL_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NSF_BUILD_CHANNEL_ENTRY.operating_class Natural8
+MLME_NSF_BUILD_CHANNEL_ENTRY.channel_mask Natural64
+MLME_NSF_BUILD_CHANNEL_ENTRY.primary_channel_map Natural8
+MLME_NSF_BUILD_TIME_BIT_MAP.length Natural8
+MLME_NAM_VIF_DEINIT.pid FsmProcessId
+MLME_NAM_TIME_MAP_ENTRY.slot_start_offset Time
+MLME_NAM_TIME_MAP_ENTRY.slot_duration Time
+MLME_NAM_TIME_MAP_ENTRY.slot_period Time
+MLME_NAM_NDL_VIF_NDC_CREATED.ndc_id MAC_Address
+MLME_NAM_BUILD_VIF_NDC_TIME_MAP.pid FsmProcessId
+MLME_NAM_REMOVE_DWS_FROM_SCHEDULE.pid FsmProcessId
+MLME_NAM_BUILD_AVAILABILITY.pid FsmProcessId
+MLME_NAM_VERIFY_NDC_SCHEDULE.ndc_id MAC_Address
+MLME_NAM_ADD_VIF_SCHEDULE.pid FsmProcessId
+MLME_NAM_MARK_SCHEDULE_AS_COMMITTED.pid FsmProcessId
+MLME_NAM_UPDATE_NMI_VIF_DW_SCHEDULE.pid FsmProcessId
+MLME_NAM_REMOVE_OVERLAPPING_SCHEDULES.pid FsmProcessId
+MLME_NAM_ALLOCATE_AVAILABILITY_ENTRY.pid FsmProcessId
+MLME_NAM_MAKE_EXCLUSIVE_NDC_SCHEDULE.pid FsmProcessId
+MLME_NAM_VIF_INIT.pid FsmProcessId
+MLME_NAM_SCHEDULE_ENTRY.schedule_type DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE
+MLME_NAM_SCHEDULE_ENTRY.primary_freq CHANNEL_FREQUENCY
+MLME_NAM_SCHEDULE_ENTRY.channel_info CHANNEL_INFORMATION
+MLME_NAM_SCHEDULE_ENTRY.desired_nss NSS
+MLME_NAM_UPDATE_DW.band INTERFACE
+MLME_NAM_UPDATE_DW.slot_period Time
+MLME_NAM_CREATE_SCHEDULE.pid FsmProcessId
+# Generated From mlme_hard/mlme_nan/mlme_ndm_debug.xml
+trace_def 19
+004a 0000 MLME_NDM_FRAME_RECEIVED 0003 oui_subtype sa da
+004a 0001 MLME_NDM_FSM_DEINIT 0001 pid
+004a 0002 MLME_NDM_FSM_INIT 0001 pid
+004a 0003 MLME_NDM_INITIATOR_BASF_NO_STATION_RECORD 0001 pid
+004a 0004 MLME_NDM_INITIATOR_BASF_SENDING_CONFIRM 0000
+004a 0005 MLME_NDM_INITIATOR_BASF_WRONG_STATE 0001 state
+004a 0006 MLME_NDM_INITIATOR_NDL_SETUP_ATTRIBUTE_MISSING 0000
+004a 0007 MLME_NDM_INITIATOR_NDP_REQUEST 0003 initiator_ndi ndp_id state
+004a 0008 MLME_NDM_INITIATOR_NDP_RESPONSE_FAIL_NO_VIF 0001 sa
+004a 0009 MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS 0003 remote_address local_address status
+004a 000a MLME_NDM_INITIATOR_REQUEST_NO_MATCHING_SERVICE 0001 match_id
+004a 000b MLME_NDM_INITIATOR_RESPONSE_NDL_FAIL 0002 token status
+004a 000c MLME_NDM_INITIATOR_RESPONSE_NDP_FAIL 0001 status
+004a 000d MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS 0002 remote_address local_address
+004a 000e MLME_NDM_NDL_VIF_CREATED 0003 remote_nmi local_nmi cluster_id
+004a 000f MLME_NDM_RESPONDER_NDP_CONFIRMED 0001 result_code
+004a 0010 MLME_NDM_RESPONDER_NDP_REQUESTED 0006 initiator_ndi ndp_id publish_id local_ndp_id retry_frame waiting_for_host
+004a 0011 MLME_NDM_RESPONDER_NDP_REQUEST_NO_MATCHING_SERVICE 0001 publish_id
+004a 0012 MLME_NDM_RESPONDER_NDP_RESPONSE 0004 initiator_ndi ndp_id status reason
+# Generated From mlme_hard/mlme_nan/mlme_ndm_debug.xml
+trace_types 30
+MLME_NDM_INITIATOR_NDP_REQUEST.initiator_ndi MAC_Address
+MLME_NDM_INITIATOR_NDP_REQUEST.ndp_id Natural8
+MLME_NDM_INITIATOR_NDP_REQUEST.state Natural8
+MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS.remote_address MAC_Address
+MLME_NDM_INITIATOR_TRIGGER_SR_INIT_CALLBACKS.local_address MAC_Address
+MLME_NDM_RESPONDER_NDP_REQUEST_NO_MATCHING_SERVICE.publish_id Natural8
+MLME_NDM_INITIATOR_NDP_RESPONSE_FAIL_NO_VIF.sa MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.remote_address MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.local_address MAC_Address
+MLME_NDM_INITIATOR_NDP_RESPONSE_STATUS.status Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.initiator_ndi MAC_Address
+MLME_NDM_RESPONDER_NDP_REQUESTED.ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.publish_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.local_ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_REQUESTED.retry_frame Boolean
+MLME_NDM_RESPONDER_NDP_REQUESTED.waiting_for_host Boolean
+MLME_NDM_RESPONDER_NDP_CONFIRMED.result_code RESULT_CODE
+MLME_NDM_FSM_DEINIT.pid FsmProcessId
+MLME_NDM_RESPONDER_NDP_RESPONSE.initiator_ndi MAC_Address
+MLME_NDM_RESPONDER_NDP_RESPONSE.ndp_id Natural8
+MLME_NDM_RESPONDER_NDP_RESPONSE.status Natural8
+MLME_NDM_RESPONDER_NDP_RESPONSE.reason Natural8
+MLME_NDM_FSM_INIT.pid FsmProcessId
+MLME_NDM_FRAME_RECEIVED.oui_subtype Natural8
+MLME_NDM_FRAME_RECEIVED.sa MAC_Address
+MLME_NDM_FRAME_RECEIVED.da MAC_Address
+MLME_NDM_NDL_VIF_CREATED.remote_nmi MAC_Address
+MLME_NDM_NDL_VIF_CREATED.local_nmi MAC_Address
+MLME_NDM_NDL_VIF_CREATED.cluster_id MAC_Address
+MLME_NDM_INITIATOR_BASF_NO_STATION_RECORD.pid FsmProcessId
+# Generated From mlme_hard/mlme_nan/mlme_nan_debug.xml
+trace_def 69
+0016 0000 MLME_NAN_ADDRESS_CHANGED 0002 old_address new_address
+0016 0001 MLME_NAN_AVAILABILITY_ATTRIBUTE_PARAMS 0003 seq_id attribute_control availability_entry_list_len
+0016 0002 MLME_NAN_AVAILABILITY_ATTRIBUTE_SIZE 0002 size map_id
+0016 0003 MLME_NAN_AVAILABILITY_ENTRY_PARAMS 0002 entry_control num_of_channel_band_entries
+0016 0004 MLME_NAN_AVAILABILITY_ENTRY_SIZE 0002 size type
+0016 0005 MLME_NAN_CANDIDATE 0001 bssid
+0016 0006 MLME_NAN_CHANNEL_BAND_ENTRY_PARAMS 0001 list_control
+0016 0007 MLME_NAN_CHANNEL_BAND_ENTRY_SIZE 0002 size entry_count
+0016 0008 MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS 0002 capabilities cipher_entry_count
+0016 0009 MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_SIZE 0001 size
+0016 000a MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS 0004 attribute_id anchor_master_rank hop_count_to_anchor_master anchor_master_beacon_transmission_time
+0016 000b MLME_NAN_CLUSTER_ATTRIBUTE_SIZE 0001 size
+0016 000c MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS 0003 cluster_id cluster_time_offset anchor_master_rank
+0016 000d MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_SIZE 0001 size
+0016 000e MLME_NAN_CLUSTER_JOINING 0001 cluster_id
+0016 000f MLME_NAN_CLUSTER_MERGING 0003 cluster_id merge_state current_role
+0016 0010 MLME_NAN_CLUSTER_STARTING 0001 cluster_id
+0016 0011 MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED 0003 anchor_rank hop_count_to_anchor ambtt
+0016 0012 MLME_NAN_DATA_CLUSTER_ATTRIBUTE_PARAMS 0002 ndc_id attribute_control
+0016 0013 MLME_NAN_DATA_CLUSTER_ATTRIBUTE_SIZE 0001 size
+0016 0014 MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS 0007 map_id committed_dw_info supported_bands operating_mode number_of_antennas max_channel_switch_time capabilities
+0016 0015 MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_SIZE 0001 size
+0016 0016 MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS 0006 dialog_token type_and_status reason_code ndl_control max_idle_period immu_sched_entry_list_len
+0016 0017 MLME_NAN_DEVICE_LINK_ATTRIBUTE_SIZE 0001 size
+0016 0018 MLME_NAN_DW_END_POSTPONED 0001 index_in_sdf_mask
+0016 0019 MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS 0005 map_id basic_rates rates ht_activated vht_activated
+0016 001a MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_SIZE 0001 size
+0016 001b MLME_NAN_FSM_DEINIT 0001 pid
+0016 001c MLME_NAN_FSM_INIT 0001 pid
+0016 001d MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS 0003 attribute_id master_preference random_factor
+0016 001e MLME_NAN_MASTER_INDICATION_ATTRIBUTE_SIZE 0001 size
+0016 001f MLME_NAN_MASTER_RANK_CHANGED 0004 new_master_rank master_preference random_factor interface_address
+0016 0020 MLME_NAN_NDP_ATTRIBUTE_PARAMS 0008 dialog_token type_and_status reason_code ndp_control ndp_id own_ndi peer_ndi publish_id
+0016 0021 MLME_NAN_NDP_ATTRIBUTE_SIZE 0001 size
+0016 0022 MLME_NAN_NDP_REQ_RECEIVED 0002 rssi frame
+0016 0023 MLME_NAN_RECEIVED_FRAME_IGNORED 0002 reason frame
+0016 0024 MLME_NAN_RECEIVED_FRAME_VALID 0001 frame
+0016 0025 MLME_NAN_ROLE_CHANGED 0006 old_role new_role beacon_counter_to_sync_role_rssi_close beacon_counter_to_sync_role_rssi_middle beacon_counter_to_non_sync_role_rssi_close beacon_counter_to_non_sync_role_rssi_middle
+0016 0026 MLME_NAN_SCAN 0003 ies scan_channels periodic_scan
+0016 0027 MLME_NAN_SCAN_DONE 0002 periodic_scan found_candidate
+0016 0028 MLME_NAN_SCAN_IND_FILTERED 0003 bssid other_bssid reason
+0016 0029 MLME_NAN_SDF_DESCRIPTOR_IGNORED 0002 service_type instance_id
+0016 002a MLME_NAN_SDF_DESCRIPTOR_RECEIVED 0003 service_type instance_id service_id
+0016 002b MLME_NAN_SDF_HANDLE_CFM 0003 index_in_sdf_mask transmission_status delete_after_tx
+0016 002c MLME_NAN_SDF_RANGE_CHECK 0004 sda1_discovery_range sda2_discovery_range sdf_rssi close_enough
+0016 002d MLME_NAN_SDF_RECEIVED 0002 rssi frame
+0016 002e MLME_NAN_SDF_SEND 0002 address frame_type
+0016 002f MLME_NAN_SDF_SEND_MULTICAST 0000
+0016 0030 MLME_NAN_SDF_SERVICE_DELETED 0003 instance_id service_type reason_code
+0016 0031 MLME_NAN_SDF_SRF_MATCH_FAILED 0002 service_type instance_id
+0016 0032 MLME_NAN_SDF_SSI_MISSING 0001 instance_id
+0016 0033 MLME_NAN_SECURITY_CONTEXT_INFO_ATTRIBUTE_SIZE 0001 size
+0016 0034 MLME_NAN_SERVICE_DESCRIPTOR 0003 service_type instance_id service_id
+0016 0035 MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS 0005 attribute_id service_id instance_id requestor_instance_id service_control
+0016 0036 MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE 0003 size instance_id service_type
+0016 0037 MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS 0003 attribute_id instance_id service_control
+0016 0038 MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_SIZE 0001 size
+0016 0039 MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_PARAMS 0002 attribute_id attribute_len
+0016 003a MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_SIZE 0002 size service_type
+0016 003b MLME_NAN_SERVICE_MATCHED 0004 match_id peer_nmi peer_instance_id instance_id
+0016 003c MLME_NAN_SERVICE_MATCH_EXPIRED 0006 match_id peer_instance_id miss_match_count matched_time instance_id instance_exists
+0016 003d MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS 0002 publish_id eapol_key_len
+0016 003e MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_SIZE 0001 size
+0016 003f MLME_NAN_TIME_MAP_ENTRY_PARAMS 0002 entry_control entry_length
+0016 0040 MLME_NAN_TIME_MAP_ENTRY_SIZE 0001 size
+0016 0041 MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR 0002 tlv_tag tlv_length
+0016 0042 MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR_DATA 0001 tlv_value
+0016 0043 MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS 0008 attribute_control starting_time duration period count_down ulw_overwrite ulw_control channel_entry_list_len
+0016 0044 MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_SIZE 0001 size
+# Generated From mlme_hard/mlme_nan/mlme_nan_debug.xml
+trace_types 126
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.dialog_token Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.type_and_status Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.reason_code Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.ndp_control Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.ndp_id Natural8
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.own_ndi MAC_Address
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.peer_ndi MAC_Address
+MLME_NAN_NDP_ATTRIBUTE_PARAMS.publish_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.service_id Natural8[6]
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.requestor_instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_PARAMS.service_control Natural8
+MLME_NAN_AVAILABILITY_ENTRY_PARAMS.num_of_channel_band_entries Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.peer_instance_id Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.miss_match_count Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.matched_time Time
+MLME_NAN_SERVICE_MATCH_EXPIRED.instance_id Natural8
+MLME_NAN_SERVICE_MATCH_EXPIRED.instance_exists Boolean
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.anchor_master_rank Natural64
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.hop_count_to_anchor_master Natural8
+MLME_NAN_CLUSTER_ATTRIBUTE_PARAMS.anchor_master_beacon_transmission_time Natural32
+MLME_NAN_DATA_CLUSTER_ATTRIBUTE_PARAMS.ndc_id MAC_Address
+MLME_NAN_MASTER_RANK_CHANGED.new_master_rank Natural64
+MLME_NAN_MASTER_RANK_CHANGED.master_preference Natural8
+MLME_NAN_MASTER_RANK_CHANGED.random_factor Natural8
+MLME_NAN_MASTER_RANK_CHANGED.interface_address MAC_Address
+MLME_NAN_AVAILABILITY_ENTRY_SIZE.type DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE
+MLME_NAN_ROLE_CHANGED.old_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_ROLE_CHANGED.new_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_CANDIDATE.bssid MAC_Address
+MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS.capabilities Natural8
+MLME_NAN_CIPHER_SUITE_INFO_ATTRIBUTE_PARAMS.cipher_entry_count Natural8
+MLME_NAN_TIME_MAP_ENTRY_PARAMS.entry_length Natural8
+MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_ATTRIBUTE_HEADER_SIZE.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SCAN_IND_FILTERED.bssid MAC_Address
+MLME_NAN_SCAN_IND_FILTERED.other_bssid MAC_Address
+MLME_NAN_SCAN_IND_FILTERED.reason DEBUG_TYPE_NAN_SCAN_IND_FILTER_REASON
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.attribute_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR_EXTN_ATTRIBUTE_HEADER_PARAMS.service_control Natural8
+MLME_NAN_SDF_SSI_MISSING.instance_id Natural8
+MLME_NAN_SDF_SRF_MATCH_FAILED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_SRF_MATCH_FAILED.instance_id Natural8
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.instance_id Natural8
+MLME_NAN_SDF_DESCRIPTOR_RECEIVED.service_id Natural8[6]
+MLME_NAN_FSM_INIT.pid FsmProcessId
+MLME_NAN_SCAN_DONE.periodic_scan Boolean
+MLME_NAN_SCAN_DONE.found_candidate Boolean
+MLME_NAN_CLUSTER_MERGING.cluster_id MAC_Address
+MLME_NAN_CLUSTER_MERGING.merge_state Natural8
+MLME_NAN_CLUSTER_MERGING.current_role DEBUG_TYPE_NAN_ROLE
+MLME_NAN_SDF_RECEIVED.rssi Natural16s
+MLME_NAN_SDF_RECEIVED.frame MBULK
+MLME_NAN_RECEIVED_FRAME_IGNORED.reason DEBUG_TYPE_NAN_RECEIVED_FRAME_IGNORED_REASON
+MLME_NAN_RECEIVED_FRAME_IGNORED.frame MBULK
+MLME_NAN_SCAN.ies MBULK
+MLME_NAN_SCAN.scan_channels Natural48
+MLME_NAN_SCAN.periodic_scan Boolean
+MLME_NAN_RECEIVED_FRAME_VALID.frame MBULK
+MLME_NAN_SERVICE_ID_LIST_ATTRIBUTE_SIZE.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SERVICE_MATCHED.peer_nmi MAC_Address
+MLME_NAN_SERVICE_MATCHED.peer_instance_id Natural8
+MLME_NAN_SERVICE_MATCHED.instance_id Natural8
+MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS.publish_id Natural8
+MLME_NAN_SHARED_KEY_DESC_ATTRIBUTE_PARAMS.eapol_key_len Natural8
+MLME_NAN_CLUSTER_STARTING.cluster_id MAC_Address
+MLME_NAN_AVAILABILITY_ATTRIBUTE_PARAMS.seq_id Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.starting_time Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.duration Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.period Natural32
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.count_down Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.ulw_overwrite Natural8
+MLME_NAN_UNALIGNED_SCHEDULE_ATTRIBUTE_PARAMS.ulw_control Natural8
+MLME_NAN_ADDRESS_CHANGED.old_address MAC_Address
+MLME_NAN_ADDRESS_CHANGED.new_address MAC_Address
+MLME_NAN_SDF_HANDLE_CFM.delete_after_tx Boolean
+MLME_NAN_SERVICE_DESCRIPTOR.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SERVICE_DESCRIPTOR.instance_id Natural8
+MLME_NAN_SERVICE_DESCRIPTOR.service_id Natural8[6]
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.anchor_rank Natural64
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.hop_count_to_anchor Natural8
+MLME_NAN_CURRENT_ANCHOR_RECORD_UPDATED.ambtt Natural32
+MLME_NAN_FSM_DEINIT.pid FsmProcessId
+MLME_NAN_NDP_REQ_RECEIVED.rssi Natural16s
+MLME_NAN_NDP_REQ_RECEIVED.frame MBULK
+MLME_NAN_SDF_DESCRIPTOR_IGNORED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_DESCRIPTOR_IGNORED.instance_id Natural8
+MLME_NAN_CLUSTER_JOINING.cluster_id MAC_Address
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.map_id Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.supported_bands Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.operating_mode Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.number_of_antennas Natural8
+MLME_NAN_DEVICE_CAPABILITY_ATTRIBUTE_PARAMS.capabilities Natural8
+MLME_NAN_SDF_RANGE_CHECK.sda1_discovery_range NanDiscoveryRange
+MLME_NAN_SDF_RANGE_CHECK.sda2_discovery_range NanDiscoveryRange
+MLME_NAN_SDF_RANGE_CHECK.sdf_rssi Natural16s
+MLME_NAN_SDF_RANGE_CHECK.close_enough Boolean
+MLME_NAN_CHANNEL_BAND_ENTRY_PARAMS.list_control Natural8
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.cluster_id MAC_Address
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.cluster_time_offset Natural64
+MLME_NAN_CLUSTER_DISCOVERY_ATTRIBUTE_PARAMS.anchor_master_rank Natural64
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.dialog_token Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.type_and_status Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.reason_code Natural8
+MLME_NAN_DEVICE_LINK_ATTRIBUTE_PARAMS.ndl_control Natural8
+MLME_NAN_SDF_SERVICE_DELETED.instance_id Natural8
+MLME_NAN_SDF_SERVICE_DELETED.service_type DEBUG_TYPE_NAN_SERVICE_TYPE
+MLME_NAN_SDF_SERVICE_DELETED.reason_code Reason_Code
+MLME_NAN_CHANNEL_BAND_ENTRY_SIZE.entry_count Natural8
+MLME_NAN_AVAILABILITY_ATTRIBUTE_SIZE.map_id Natural8
+MLME_NAN_TLV_TO_SERVICE_DESCRIPTOR_DATA.tlv_value TOKEN
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.attribute_id Natural8
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.master_preference Natural8
+MLME_NAN_MASTER_INDICATION_ATTRIBUTE_PARAMS.random_factor Natural8
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.map_id Natural8
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.basic_rates Natural64
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.rates Natural64
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.ht_activated Boolean
+MLME_NAN_ELEMENT_CONTAINER_ATTRIBUTE_PARAMS.vht_activated Boolean
+MLME_NAN_SDF_SEND.address MAC_Address
+MLME_NAN_SDF_SEND.frame_type DEBUG_TYPE_SDF_FRAME
+DEBUG_TYPE_NAN_SCAN_IND_FILTER_REASON Enum 0000 already_joined 0001 no_nan_ie 0002 lower_cluster_grade 0003 bssid_not_in_cluster_range 0004 malloc_failed
+DEBUG_TYPE_NAN_SCHEDULE_ENTRY_TYPE Enum 0000 Not_in_use 0001 FAW 0002 NDC 0003 DW
+DEBUG_TYPE_SDF_FRAME Enum 0000 Unicast 0001 Multicast
+DEBUG_TYPE_NAN_SERVICE_TYPE Enum 0000 Publish 0001 Subscribe 0002 FollowUp
+DEBUG_TYPE_NAN_AVAILABILITY_ENTRY_TYPE Enum 0000 Invalid 0001 Committed 0002 Potential 0003 Committed_and_Potential 0004 Conditional 0005 Conditional_and_Potential
+DEBUG_TYPE_NAN_RECEIVED_FRAME_IGNORED_REASON Enum 0001 frame_is_null 0002 no_nan_ie 0003 no_master_indication_attr 0004 no_cluster_attr 0005 hop_count_threshold 0006 out_of_sync 0007 not_in_same_cluster
+DEBUG_TYPE_NAN_ROLE Enum 0000 Not_Set 0001 Anchor_Master 0002 Master 0003 Sync 0004 Non_Sync
+# Generated From mlme_hard/mlme_ftm_resp/mlme_ftm_resp_debug.xml
+trace_def 11
+0045 0000 MLME_FTM_RESP_BURST_COMPLETED 0001 peer_addr
+0045 0001 MLME_FTM_RESP_BURST_CYCLE_COMPLETED 0002 burst_count current_burst_count
+0045 0002 MLME_FTM_RESP_BURST_CYCLE_STARTED 0001 peer_addr
+0045 0003 MLME_FTM_RESP_BURST_FRAME_QUEUED 0004 follow_up_dialog_token dialog_token tod toa
+0045 0004 MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED 0002 ftm_per_burst current_ftm_count
+0045 0005 MLME_FTM_RESP_BURST_STARTED 0001 peer_addr
+0045 0006 MLME_FTM_RESP_IFTMR_DISCARDED 0001 peer_addr
+0045 0007 MLME_FTM_RESP_IFTMR_RECEIVED 0001 peer_addr
+0045 0008 MLME_FTM_RESP_STARTED 0001 interface_address
+0045 0009 MLME_FTM_RESP_STOP_FRAME_RECEIVED 0001 peer_addr
+0045 000a MLME_FTM_RESP_TRIGGER_FRAME_RECEIVED 0001 peer_addr
+# Generated From mlme_hard/mlme_ftm_resp/mlme_ftm_resp_debug.xml
+trace_types 16
+MLME_FTM_RESP_IFTMR_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_COMPLETED.peer_addr MAC_Address
+MLME_FTM_RESP_IFTMR_DISCARDED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_STARTED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_CYCLE_STARTED.peer_addr MAC_Address
+MLME_FTM_RESP_TRIGGER_FRAME_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_CYCLE_COMPLETED.burst_count Natural8
+MLME_FTM_RESP_BURST_CYCLE_COMPLETED.current_burst_count Natural8
+MLME_FTM_RESP_STOP_FRAME_RECEIVED.peer_addr MAC_Address
+MLME_FTM_RESP_BURST_FRAME_QUEUED.follow_up_dialog_token Natural8
+MLME_FTM_RESP_BURST_FRAME_QUEUED.dialog_token Natural8
+MLME_FTM_RESP_BURST_FRAME_QUEUED.tod Natural64
+MLME_FTM_RESP_BURST_FRAME_QUEUED.toa Natural64
+MLME_FTM_RESP_STARTED.interface_address MAC_Address
+MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED.ftm_per_burst Natural8
+MLME_FTM_RESP_BURST_NEXT_FTM_SCHEDULED.current_ftm_count Natural8
+# Generated From mlme_hard/mlme_wifi_logger/mlme_wifi_logger_debug.xml
+trace_def 14
+0038 0000 MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED 0005 report_reason last_beacon_received_time start_time assoc_resp_result_code assoc_resp_result
+0038 0001 MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED 0005 report_reason last_beacon_received_time start_time auth_resp_result_code auth_resp_result
+0038 0002 MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER 0008 assoc_complete_time last_rssi deauth_rssi rssi_diff resp_seq_no deauth_seq_no seq_no_diff jammer_likelihood_percent
+0038 0003 MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED 0007 report_reason last_beacon_received_time assoc_complete_time assoc_resp_result_code assoc_resp_result deauth_reason_code deauth_reason
+0038 0004 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1 0009 eap_timestamp_1 eap_direction_1 eap_msg_type_1 eap_timestamp_2 eap_direction_2 eap_msg_type_2 eap_timestamp_3 eap_direction_3 eap_msg_type_3
+0038 0005 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2 0009 eap_timestamp_4 eap_direction_4 eap_msg_type_4 eap_timestamp_5 eap_direction_5 eap_msg_type_5 eap_timestamp_6 eap_direction_6 eap_msg_type_6
+0038 0006 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3 0009 eap_timestamp_7 eap_direction_7 eap_msg_type_7 eap_timestamp_8 eap_direction_8 eap_msg_type_8 eap_timestamp_9 eap_direction_9 eap_msg_type_9
+0038 0007 MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4 0009 eap_timestamp_10 eap_direction_10 eap_msg_type_10 eap_timestamp_11 eap_direction_11 eap_msg_type_11 eap_timestamp_12 eap_direction_12 eap_msg_type_12
+0038 0008 MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED 0005 report_reason last_beacon_received_time start_time assoc_resp_result_code assoc_resp_result
+0038 0009 MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1 0009 roam_timestamp_1 roam_assoc_result_1 roam_deauth_reason_1 roam_timestamp_2 roam_result_code_2 roam_deauth_reason_2 roam_timestamp_3 roam_result_code_3 roam_deauth_reason_3
+0038 000a MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2 0009 roam_timestamp_4 roam_result_code_4 roam_deauth_reason_4 roam_timestamp_5 roam_result_code_5 roam_deauth_reason_5 roam_timestamp_6 roam_result_code_6 roam_deauth_reason_6
+0038 000b MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED 0005 report_reason last_beacon_received_time start_time auth_resp_result_code auth_resp_result
+0038 000c MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED 0002 last_roam_scan_mode last_roam_scan_mode_name
+0038 000d MLME_WIFI_LOGGER_DATA 0002 report line
+# Generated From mlme_hard/mlme_wifi_logger/mlme_wifi_logger_debug.xml
+trace_types 84
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_10 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_10 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_10 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_11 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_11 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_11 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_timestamp_12 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_direction_12 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_4.eap_msg_type_12 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_AUTH_FAILED.auth_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED.last_roam_scan_mode Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_FAILED.last_roam_scan_mode_name DEBUG_TYPE_WIFILOGGER_ROAMING_SCAN_MODE
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ASSOC_FAILED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_AUTH_FAILED.auth_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.assoc_complete_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.last_rssi Natural16s
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.deauth_rssi Natural16s
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.rssi_diff Natural8
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_JAMMER.jammer_likelihood_percent Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_4 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_4 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_4 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_5 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_5 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_5 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_timestamp_6 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_result_code_6 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_2.roam_deauth_reason_6 Reason_Code
+MLME_WIFI_LOGGER_DATA.report MBULK
+MLME_WIFI_LOGGER_DATA.line __LINE__
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_4 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_4 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_4 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_5 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_5 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_5 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_timestamp_6 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_direction_6 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_2.eap_msg_type_6 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.start_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ASSOC_FAILED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.report_reason DEBUG_TYPE_WIFILOGGER_REPORT_REASON
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.last_beacon_received_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.assoc_complete_time Natural32
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.assoc_resp_result Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_DEAUTH_RECEIVED.deauth_reason Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_1 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_assoc_result_1 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_1 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_2 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_result_code_2 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_2 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_timestamp_3 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_result_code_3 Result_Code
+MLME_WIFI_LOGGER_ANALYSIS_ROAM_ATTEMPT_HISTORY_1.roam_deauth_reason_3 Reason_Code
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_7 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_7 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_7 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_8 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_8 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_8 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_timestamp_9 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_direction_9 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_3.eap_msg_type_9 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_1 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_1 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_1 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_2 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_2 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_2 Natural8
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_timestamp_3 Natural32
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_direction_3 DEBUG_TYPE_WIFILOGGER_DIRECTION
+MLME_WIFI_LOGGER_ANALYSIS_EAP_HISTORY_1.eap_msg_type_3 Natural8
+DEBUG_TYPE_WIFILOGGER_DIRECTION Enum 0000 Transmit 0001 Receive 0003 Any
+DEBUG_TYPE_WIFILOGGER_ROAMING_SCAN_MODE Enum 0001 ROAMING_SCAN_MODE_CASE_1 0002 ROAMING_SCAN_MODE_CASE_2 0003 ROAMING_SCAN_MODE_CASE_3 0004 ROAMING_SCAN_MODE_CASE_1_NCHO 0005 ROAMING_SCAN_MODE_NONE
+DEBUG_TYPE_WIFILOGGER_REPORT_REASON Enum 0000 Not_Specified 0001 See_Status 0002 Timeout 0003 Retries_Exhausted
+# Generated From mlme_hard/mlme_ba/mlme_ba_debug.xml
+trace_def 23
+0012 0000 MLME_BA_ADDTX_REQ 0007 address priority peer coex_allowed already_configured no_of_tx max_no_of_tx
+0012 0001 MLME_BA_ADD_RX_RAME_CFM 0001 Result_Code
+0012 0002 MLME_BA_ADD_RX_REQ 0005 address dialog_token parameter_set priority coex_allowed
+0012 0003 MLME_BA_ADD_TX_COMPLETION 0003 address priority success
+0012 0004 MLME_BA_ADD_TX_RAME_RESULT 0002 result_code seq_no
+0012 0005 MLME_BA_ADD_TX_RSP 0004 dialog_token status parameter_set priority
+0012 0006 MLME_BA_AGREEMENT_TIMEOUT 0003 peer_addr priority direction
+0012 0007 MLME_BA_AUTO_DELETE 0003 address tx_configured rx_configured
+0012 0008 MLME_BA_CONTROL 0004 set tx address configured
+0012 0009 MLME_BA_DELETE_DUPLICATE 0003 address priority direction
+0012 000a MLME_BA_DEL_REQ 0006 address priority direction reason_code tx_configured rx_configured
+0012 000b MLME_BA_DEL_TX_RAME_CFM 0004 address priority direction result_code
+0012 000c MLME_BA_FRAME_CANCEL 0001 address
+0012 000d MLME_BA_FRAME_DEL_REQ 0005 address priority direction tx_configured rx_configured
+0012 000e MLME_BA_HANDLE_DEL 0003 address priority direction
+0012 000f MLME_BA_INIT 0004 a_msdu_tx a_msdu_rx buffer_size timeout
+0012 0010 MLME_BA_RECEIVED_FRAME 0003 address associated tdls
+0012 0011 MLME_BA_RESET_PEER_REQ 0001 address
+0012 0012 MLME_BA_RESTORE_TX 0005 address priority desired configured coex_allowed
+0012 0013 MLME_BA_RETRY_ADD_TX 0005 address priority desired configured count
+0012 0014 MLME_BA_SEND_ADD_RSP_FRAME 0004 address dialog_token status_code parameter_set
+0012 0015 MLME_BA_SEND_ADD_TX_REQ_FRAME 0003 address dialog_token parameter_set
+0012 0016 MLME_BA_SEND_DEL_FRAME 0000
+# Generated From mlme_hard/mlme_ba/mlme_ba_debug.xml
+trace_types 54
+MLME_BA_AUTO_DELETE.address MAC_Address
+MLME_BA_ADD_TX_RAME_RESULT.result_code Result_Code
+MLME_BA_CONTROL.set Boolean
+MLME_BA_CONTROL.tx Boolean
+MLME_BA_CONTROL.address MAC_Address
+MLME_BA_DELETE_DUPLICATE.address MAC_Address
+MLME_BA_DELETE_DUPLICATE.priority Priority
+MLME_BA_DELETE_DUPLICATE.direction Direction
+MLME_BA_RESET_PEER_REQ.address MAC_Address
+MLME_BA_RETRY_ADD_TX.address MAC_Address
+MLME_BA_RETRY_ADD_TX.desired Boolean
+MLME_BA_RETRY_ADD_TX.configured Boolean
+MLME_BA_FRAME_DEL_REQ.address MAC_Address
+MLME_BA_FRAME_DEL_REQ.priority Priority
+MLME_BA_FRAME_DEL_REQ.direction Direction
+MLME_BA_DEL_REQ.address MAC_Address
+MLME_BA_DEL_REQ.priority Priority
+MLME_BA_DEL_REQ.direction Direction
+MLME_BA_DEL_REQ.reason_code Reason_Code
+MLME_BA_RECEIVED_FRAME.address MAC_Address
+MLME_BA_RECEIVED_FRAME.associated Boolean
+MLME_BA_RECEIVED_FRAME.tdls Boolean
+MLME_BA_ADDTX_REQ.address MAC_Address
+MLME_BA_ADDTX_REQ.priority Priority
+MLME_BA_ADDTX_REQ.peer Boolean
+MLME_BA_ADDTX_REQ.coex_allowed Boolean
+MLME_BA_ADDTX_REQ.already_configured Boolean
+MLME_BA_ADD_RX_REQ.address MAC_Address
+MLME_BA_ADD_RX_REQ.priority Priority
+MLME_BA_ADD_RX_REQ.coex_allowed Boolean
+MLME_BA_ADD_RX_RAME_CFM.Result_Code Result_Code
+MLME_BA_HANDLE_DEL.address MAC_Address
+MLME_BA_HANDLE_DEL.priority Priority
+MLME_BA_HANDLE_DEL.direction Direction
+MLME_BA_INIT.a_msdu_tx Boolean
+MLME_BA_INIT.a_msdu_rx Boolean
+MLME_BA_SEND_ADD_TX_REQ_FRAME.address MAC_Address
+MLME_BA_ADD_TX_RSP.priority Priority
+MLME_BA_SEND_ADD_RSP_FRAME.address MAC_Address
+MLME_BA_AGREEMENT_TIMEOUT.peer_addr MAC_Address
+MLME_BA_AGREEMENT_TIMEOUT.priority Priority
+MLME_BA_AGREEMENT_TIMEOUT.direction Direction
+MLME_BA_FRAME_CANCEL.address MAC_Address
+MLME_BA_RESTORE_TX.address MAC_Address
+MLME_BA_RESTORE_TX.desired Boolean
+MLME_BA_RESTORE_TX.configured Boolean
+MLME_BA_RESTORE_TX.coex_allowed Boolean
+MLME_BA_DEL_TX_RAME_CFM.address MAC_Address
+MLME_BA_DEL_TX_RAME_CFM.priority Priority
+MLME_BA_DEL_TX_RAME_CFM.direction Direction
+MLME_BA_DEL_TX_RAME_CFM.result_code Result_Code
+MLME_BA_ADD_TX_COMPLETION.address MAC_Address
+MLME_BA_ADD_TX_COMPLETION.priority Priority
+MLME_BA_ADD_TX_COMPLETION.success Boolean
+# Generated From mlme_hard/mlme/mlme_debug.xml
+trace_def 44
+002b 0000 MLME_CAPABILITIES_INIT_2G 0002 overwritten HT
+002b 0001 MLME_CAPABILITIES_INIT_5G 0001 HT
+002b 0002 MLME_CHANNEL_FREQ_NOT_SUITABLE_FOR_AP 0003 current_centre_freq current_channel_info reason
+002b 0003 MLME_DATA_ADD_VIF 0004 source_pid vif_type interface_addr device_addr
+002b 0004 MLME_DATA_PREAMBLE 0004 erp barker short_preamble short_slot_time
+002b 0005 MLME_DATA_REMOVE_VIF 0000
+002b 0006 MLME_DATA_SET_STA_OPERATION 0001 sta_operation
+002b 0007 MLME_FORCE_ACTIVE 0004 pid requester flags active
+002b 0008 MLME_INVALID_SIGNAL_DISCARDED 0002 pid signal
+002b 0009 MLME_LTE_COEX_INTERFERENCE_DETECTED 0005 current_centre_freq current_channel_info proposed_centre_freq proposed_channel_info channel_avoidance_mask
+002b 000a MLME_LTE_COEX_NO_INTERFERENCE 0004 current_centre_freq current_channel_info current_occupied_mask channel_avoidance_mask
+002b 000b MLME_MBULK_ADJUST_RANGE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000c MLME_MBULK_ALLOC 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000d MLME_MBULK_ALLOC_NULL 0002 pid line
+002b 000e MLME_MBULK_APPEND_TAIL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 000f MLME_MBULK_CLONE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0010 MLME_MBULK_DAT_AT_R 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0011 MLME_MBULK_DAT_AT_RW 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0012 MLME_MBULK_DAT_R 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0013 MLME_MBULK_DAT_RW 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0014 MLME_MBULK_DEBUGGING_INFO_HAS_BEEN_OVERWRITTEN 0001 debug_pointer
+002b 0015 MLME_MBULK_DUPLICATE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0016 MLME_MBULK_DUPLICATE_NULL 0002 pid line
+002b 0017 MLME_MBULK_FREE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0018 MLME_MBULK_FREE_NULL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0019 MLME_MBULK_FREE_WITH_SIGNAL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001a MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001b MLME_MBULK_PREPEND_HEAD 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001c MLME_MBULK_PROCESS_FSM_EVENT 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001d MLME_MBULK_PROCESS_FSM_EVENT_NULL 0002 pid line
+002b 001e MLME_MBULK_SET_READONLY 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 001f MLME_MBULK_SET_READWRITE 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0020 MLME_MBULK_TRIM_HEAD 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0021 MLME_MBULK_WITH_SIGNAL_ALLOC 0006 pid line mbulk_address ref_cnt free_flag flags
+002b 0022 MLME_STA_RECORD_ADD 0002 pid address
+002b 0023 MLME_STA_RECORD_DEFAULT_SET_RATES 0003 basic_rates ht_mcs_set vht_mcs_set
+002b 0024 MLME_STA_RECORD_DELETE 0002 pid address
+002b 0025 MLME_STA_RECORD_INITIALISE_CAPS 0004 address sta_caps ht_rx_mcs vht_rx_mcs
+002b 0026 MLME_STA_RECORD_PMF 0001 pmf_in_use
+002b 0027 MLME_STA_RECORD_SET_CAPS 0002 address sta_caps
+002b 0028 MLME_STA_RECORD_SET_NSS 0007 address peer_current_nss peer_new_nss link_current_nss link_new_nss vif_current_nss mib_max_nss
+002b 0029 MLME_STA_SET_QOS_INFO 0002 address qos_info
+002b 002a MLME_VIF_CAPABILITIES_RESET_TQAM 0001 tqam_activated
+002b 002b MLME_VIF_CAPABILITIES_STATIC_UPDATE_TQAM 0002 point tqam_activated
+# Generated From mlme_hard/mlme/mlme_debug.xml
+trace_types 100
+MLME_MBULK_DEBUGGING_INFO_HAS_BEEN_OVERWRITTEN.debug_pointer Natural32
+MLME_CAPABILITIES_INIT_2G.overwritten Boolean
+MLME_CAPABILITIES_INIT_2G.HT Boolean
+MLME_MBULK_WITH_SIGNAL_ALLOC.pid FsmProcessId
+MLME_MBULK_WITH_SIGNAL_ALLOC.mbulk_address Natural32
+MLME_MBULK_WITH_SIGNAL_ALLOC.free_flag Boolean
+MLME_DATA_PREAMBLE.erp Boolean
+MLME_DATA_PREAMBLE.barker Boolean
+MLME_DATA_PREAMBLE.short_preamble Boolean
+MLME_DATA_PREAMBLE.short_slot_time Boolean
+MLME_STA_RECORD_DEFAULT_SET_RATES.basic_rates RATE
+MLME_STA_RECORD_PMF.pmf_in_use Boolean
+MLME_MBULK_PROCESS_FSM_EVENT.pid FsmProcessId
+MLME_MBULK_PROCESS_FSM_EVENT.mbulk_address Natural32
+MLME_MBULK_PROCESS_FSM_EVENT.free_flag Boolean
+MLME_MBULK_DAT_RW.pid FsmProcessId
+MLME_MBULK_DAT_RW.mbulk_address Natural32
+MLME_MBULK_DAT_RW.free_flag Boolean
+MLME_MBULK_TRIM_HEAD.pid FsmProcessId
+MLME_MBULK_TRIM_HEAD.mbulk_address Natural32
+MLME_MBULK_TRIM_HEAD.free_flag Boolean
+MLME_CHANNEL_FREQ_NOT_SUITABLE_FOR_AP.reason DEBUG_TYPE_AP_CHANNEL_CHECK_REASON
+MLME_MBULK_DUPLICATE.pid FsmProcessId
+MLME_MBULK_DUPLICATE.mbulk_address Natural32
+MLME_MBULK_DUPLICATE.free_flag Boolean
+MLME_MBULK_ADJUST_RANGE.pid FsmProcessId
+MLME_MBULK_ADJUST_RANGE.mbulk_address Natural32
+MLME_MBULK_ADJUST_RANGE.free_flag Boolean
+MLME_CAPABILITIES_INIT_5G.HT Boolean
+MLME_STA_RECORD_SET_NSS.address MAC_Address
+MLME_STA_RECORD_SET_NSS.peer_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.peer_new_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.link_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.link_new_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.vif_current_nss DEBUG_TYPE_SS
+MLME_STA_RECORD_SET_NSS.mib_max_nss DEBUG_TYPE_SS
+MLME_LTE_COEX_INTERFERENCE_DETECTED.channel_avoidance_mask Natural64
+MLME_MBULK_FREE_NULL.pid FsmProcessId
+MLME_MBULK_FREE_NULL.mbulk_address Natural32
+MLME_MBULK_FREE_NULL.free_flag Boolean
+MLME_STA_RECORD_DELETE.pid FsmProcessId
+MLME_STA_RECORD_DELETE.address MAC_Address
+MLME_STA_SET_QOS_INFO.address MAC_Address
+MLME_MBULK_APPEND_TAIL.pid FsmProcessId
+MLME_MBULK_APPEND_TAIL.mbulk_address Natural32
+MLME_MBULK_APPEND_TAIL.free_flag Boolean
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.pid FsmProcessId
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.mbulk_address Natural32
+MLME_MBULK_FREE_WITH_SIGNAL_AND_NULL.free_flag Boolean
+MLME_STA_RECORD_INITIALISE_CAPS.address MAC_Address
+MLME_STA_RECORD_INITIALISE_CAPS.sta_caps Natural64
+MLME_MBULK_DAT_R.pid FsmProcessId
+MLME_MBULK_DAT_R.mbulk_address Natural32
+MLME_MBULK_DAT_R.free_flag Boolean
+MLME_MBULK_SET_READWRITE.pid FsmProcessId
+MLME_MBULK_SET_READWRITE.mbulk_address Natural32
+MLME_MBULK_SET_READWRITE.free_flag Boolean
+MLME_MBULK_PROCESS_FSM_EVENT_NULL.pid FsmProcessId
+MLME_LTE_COEX_NO_INTERFERENCE.current_occupied_mask Natural64
+MLME_LTE_COEX_NO_INTERFERENCE.channel_avoidance_mask Natural64
+MLME_MBULK_PREPEND_HEAD.pid FsmProcessId
+MLME_MBULK_PREPEND_HEAD.mbulk_address Natural32
+MLME_MBULK_PREPEND_HEAD.free_flag Boolean
+MLME_MBULK_ALLOC_NULL.pid FsmProcessId
+MLME_DATA_ADD_VIF.source_pid FsmProcessId
+MLME_DATA_ADD_VIF.vif_type VIF_TYPE
+MLME_DATA_ADD_VIF.interface_addr MAC_Address
+MLME_DATA_ADD_VIF.device_addr MAC_Address
+MLME_MBULK_ALLOC.pid FsmProcessId
+MLME_MBULK_ALLOC.mbulk_address Natural32
+MLME_MBULK_ALLOC.free_flag Boolean
+MLME_STA_RECORD_ADD.pid FsmProcessId
+MLME_STA_RECORD_ADD.address MAC_Address
+MLME_STA_RECORD_SET_CAPS.address MAC_Address
+MLME_STA_RECORD_SET_CAPS.sta_caps Natural64
+MLME_VIF_CAPABILITIES_RESET_TQAM.tqam_activated Boolean
+MLME_MBULK_SET_READONLY.pid FsmProcessId
+MLME_MBULK_SET_READONLY.mbulk_address Natural32
+MLME_MBULK_SET_READONLY.free_flag Boolean
+MLME_MBULK_DAT_AT_R.pid FsmProcessId
+MLME_MBULK_DAT_AT_R.mbulk_address Natural32
+MLME_MBULK_DAT_AT_R.free_flag Boolean
+MLME_MBULK_CLONE.pid FsmProcessId
+MLME_MBULK_CLONE.mbulk_address Natural32
+MLME_MBULK_CLONE.free_flag Boolean
+MLME_MBULK_FREE_WITH_SIGNAL.pid FsmProcessId
+MLME_MBULK_FREE_WITH_SIGNAL.mbulk_address Natural32
+MLME_MBULK_FREE_WITH_SIGNAL.free_flag Boolean
+MLME_MBULK_FREE.pid FsmProcessId
+MLME_MBULK_FREE.mbulk_address Natural32
+MLME_MBULK_FREE.free_flag Boolean
+MLME_VIF_CAPABILITIES_STATIC_UPDATE_TQAM.tqam_activated Boolean
+MLME_MBULK_DAT_AT_RW.pid FsmProcessId
+MLME_MBULK_DAT_AT_RW.mbulk_address Natural32
+MLME_MBULK_DAT_AT_RW.free_flag Boolean
+MLME_INVALID_SIGNAL_DISCARDED.pid FsmProcessId
+MLME_INVALID_SIGNAL_DISCARDED.signal SignalId
+MLME_FORCE_ACTIVE.pid FsmProcessId
+MLME_FORCE_ACTIVE.active Boolean
+MLME_MBULK_DUPLICATE_NULL.pid FsmProcessId
+DEBUG_TYPE_AP_CHANNEL_CHECK_REASON Enum 0000 2g_channel_must_be_20mhz 0001 unsupported_bandwidth 0002 invalid_channel 0003 invalid_channel_no_outdoor_dfs 0004 invalid_channel_no_ir 0005 ht_on_no_ofdm_channel
+DEBUG_TYPE_SS Enum 00 unspecified_or_unchange 01 single 02 two
+# Generated From mlme_hard/mlme_ie/mlme_ie_debug.xml
+trace_def 118
+0040 0000 MLME_IE_20_40_BSS_COEX_PARAMS 0001 bss_coex_info
+0040 0001 MLME_IE_20_40_BSS_COEX_SIZE 0001 size
+0040 0002 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_CHANNEL 0001 channel_num
+0040 0003 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_PARAMS 0001 operating_class
+0040 0004 MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_SIZE 0001 size
+0040 0005 MLME_IE_ADAPTIVE_11R_CISCO_CAPS 0001 capabilities
+0040 0006 MLME_IE_ADAPTIVE_11R_SAMSUNG_IE_SIZE 0001 size
+0040 0007 MLME_IE_AID_PARAMS 0001 aid
+0040 0008 MLME_IE_AID_SIZE 0001 size
+0040 0009 MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS 0003 channel_switch_mode new_channel_number channel_switch_count
+0040 000a MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_SIZE 0001 size
+0040 000b MLME_IE_CHANNEL_SWITCH_TIMING_ELEMENT_PARAMS 0002 switch_time switch_timeout
+0040 000c MLME_IE_CHANNEL_SWITCH_TIMING_ELEMENT_SIZE 0001 size
+0040 000d MLME_IE_CHANNEL_SWITCH_WRAPPER_PARAMS 0000
+0040 000e MLME_IE_CHANNEL_SWITCH_WRAPPER_SIZE 0001 size
+0040 000f MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS 0003 dms_id dms_length request_type
+0040 0010 MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_SIZE 0001 size
+0040 0011 MLME_IE_DS_PARAMETER_SET_PARAMS 0001 channel
+0040 0012 MLME_IE_DS_PARAMETER_SET_SIZE 0001 size
+0040 0013 MLME_IE_ERP_PARAMS 0001 erp
+0040 0014 MLME_IE_ERP_SIZE 0001 size
+0040 0015 MLME_IE_EXTENDED_CAPABILITIES_PARAMS 0001 extended_capabilities
+0040 0016 MLME_IE_EXTENDED_CAPABILITIES_SIZE 0001 size
+0040 0017 MLME_IE_FTM_BURST_PARAMETERS_PARAMS 0007 status_value burst_duration_count min_delta_ftm partial_tsf asap_ftm_per_burst format_bandwidth burst_interval
+0040 0018 MLME_IE_FTM_BURST_PARAMETERS_SIZE 0001 size
+0040 0019 MLME_IE_FTM_ERROR_CODE_PARAMS 0003 start_time bssid error_code
+0040 001a MLME_IE_FTM_ERROR_CODE_SIZE 0001 size
+0040 001b MLME_IE_FTM_LCI_REQUEST_PARAMS 0004 measurement_token measurement_request_mode measurement_type location_subject
+0040 001c MLME_IE_FTM_LCI_REQUEST_SIZE 0001 size
+0040 001d MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS 0006 measurement_token measurement_request_mode measurement_type location_subject location_civic_type location_service_interval
+0040 001e MLME_IE_FTM_LOCATION_CIVIC_REQUEST_SIZE 0001 size
+0040 001f MLME_IE_FTM_RANGE_ENTRY_PARAMS 0005 start_time bssid range max_error reserved
+0040 0020 MLME_IE_FTM_RANGE_ENTRY_SIZE 0001 size
+0040 0021 MLME_IE_FTM_SYNC_INFO_PARAMS 0002 id_extension tsf_sync_info
+0040 0022 MLME_IE_FTM_SYNC_INFO_SIZE 0001 size
+0040 0023 MLME_IE_GET_AKM_SUITES_NUMBER 0001 akm_suites_number
+0040 0024 MLME_IE_GET_PAIRWISE_CIPHERS_NUMBER 0001 pairwise_ciphers_number
+0040 0025 MLME_IE_HT_OPERATION_PARAMS 0005 primary_channel information_subset_1 information_subset_2 information_subset_3 basic_ht_mcs
+0040 0026 MLME_IE_HT_OPERATION_SIZE 0001 size
+0040 0027 MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS 0003 bssid initiator_address responder_address
+0040 0028 MLME_IE_LINK_IDENTIFIER_ELEMENT_SIZE 0001 size
+0040 0029 MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS 0004 channel_number measurement_start_time measurement_duration map
+0040 002a MLME_IE_MEASUREMENT_REPORT_BASIC_SIZE 0001 size
+0040 002b MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS 0009 operating_class channel_num measurement_duration reported_frame_info rcpi rsni bssid antenna_id parent_tsf
+0040 002c MLME_IE_MEASUREMENT_REPORT_BEACON_SIZE 0001 size
+0040 002d MLME_IE_MEASUREMENT_REPORT_PARAMS 0003 measurement_token measurement_report_mode measurement_type
+0040 002e MLME_IE_MEASUREMENT_REPORT_SIZE 0001 size
+0040 002f MLME_IE_MLME_WFA_P2P_IE_PARAMS 0002 oui oui_type
+0040 0030 MLME_IE_MLME_WFA_P2P_IE_SIZE 0001 size
+0040 0031 MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS 0004 hdr_id hdr_length index ctw_ops
+0040 0032 MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_SIZE 0001 size
+0040 0033 MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR 0004 count_type duration interval start_time
+0040 0034 MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS 0003 hdr_id hdr_length status
+0040 0035 MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_SIZE 0001 size
+0040 0036 MLME_IE_MOBILITY_DOMAIN_PARAMS 0002 identifier cap_and_policy
+0040 0037 MLME_IE_MOBILITY_DOMAIN_SIZE 0001 size
+0040 0038 MLME_IE_NAN_HEADER_PARAMS 0003 oui oui_type ie_size
+0040 0039 MLME_IE_NAN_HEADER_SIZE 0001 size
+0040 003a MLME_IE_OPERATING_MODE_NOTIFICATION_PARAMS 0001 operating_mode
+0040 003b MLME_IE_OPERATING_MODE_NOTIFICATION_SIZE 0001 size
+0040 003c MLME_IE_POWER_CAPABILITY_PARAMS 0002 min_power max_power
+0040 003d MLME_IE_POWER_CAPABILITY_SIZE 0001 size
+0040 003e MLME_IE_QUIET_ELEMENT_PARAMS 0003 period duration offset
+0040 003f MLME_IE_QUIET_ELEMENT_SIZE 0001 size
+0040 0040 MLME_IE_REPORTED_FRAME_BODY_PARAMS 0001 reported_frame_body
+0040 0041 MLME_IE_REPORTED_FRAME_BODY_SIZE 0001 size
+0040 0042 MLME_IE_RM_ENABLED_CAPABILITIES_PARAMS 0001 caps
+0040 0043 MLME_IE_RM_ENABLED_CAPABILITIES_SIZE 0001 size
+0040 0044 MLME_IE_RSN_CAPABILITIES 0001 capabilities
+0040 0045 MLME_IE_SCSC_CHANNEL_LIST_PARAMS 0003 oui oui_type oui_subtype
+0040 0046 MLME_IE_SCSC_CHANNEL_LIST_SCAN_CHANNEL 0002 freq scan_policy
+0040 0047 MLME_IE_SCSC_CHANNEL_LIST_SIZE 0001 size
+0040 0048 MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS 0003 peer_address priority dw_or_faw
+0040 0049 MLME_IE_SCSC_NAN_FOLLOWUP_SIZE 0001 size
+0040 004a MLME_IE_SCSC_SCAN_NEIGHBOUR_BSSID 0002 bssid freq
+0040 004b MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_PARAMS 0000
+0040 004c MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_SIZE 0001 size
+0040 004d MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS 0005 oui oui_type oui_subtype ssid_length ssid
+0040 004e MLME_IE_SCSC_SCAN_SSID_FILTER_SIZE 0001 size
+0040 004f MLME_IE_SCSC_SCAN_TIMING_PARAMS 0008 oui oui_type oui_subtype min_period max_period exponent step_count skip_first_period
+0040 0050 MLME_IE_SCSC_SCAN_TIMING_SIZE 0001 size
+0040 0051 MLME_IE_SCSC_SCAN_TIMING_V_2_PARAMS 0002 max_channel_time_active max_channel_time_passive
+0040 0052 MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_PARAMS 0001 secondary_channel_offset
+0040 0053 MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_SIZE 0001 size
+0040 0054 MLME_IE_SSID_PARAMS 0001 ssid
+0040 0055 MLME_IE_SSID_SIZE 0001 size
+0040 0056 MLME_IE_SUPPORTED_CHANNELS_PARAMS 0001 first_channels_mask
+0040 0057 MLME_IE_SUPPORTED_CHANNELS_SIZE 0001 size
+0040 0058 MLME_IE_SUPPORTED_OPERATING_CLASSES_PARAMS 0001 current_operating_class
+0040 0059 MLME_IE_SUPPORTED_OPERATING_CLASSES_SIZE 0001 size
+0040 005a MLME_IE_SUPPORTED_RATES_PARAMS 0001 rates
+0040 005b MLME_IE_SUPPORTED_RATES_SIZE 0001 size
+0040 005c MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS 0005 user_priority classifier_type classifier_mask dest_addr type
+0040 005d MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_SIZE 0001 size
+0040 005e MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS 0005 user_priority classifier_type classifier_mask ip_version ip_addr
+0040 005f MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_SIZE 0001 size
+0040 0060 MLME_IE_TIMEOUT_INTERVAL_PARAMS 0002 type value
+0040 0061 MLME_IE_TIMEOUT_INTERVAL_SIZE 0001 size
+0040 0062 MLME_IE_TPC_REPORT_PARAMS 0002 tx_power link_margin
+0040 0063 MLME_IE_TPC_REPORT_SIZE 0001 size
+0040 0064 MLME_IE_TPU_BUFFER_STATUS_ELEMENT_PARAMS 0001 tpu_buffer_status_info
+0040 0065 MLME_IE_TPU_BUFFER_STATUS_ELEMENT_SIZE 0001 size
+0040 0066 MLME_IE_TQAM_CAPABILITIES_MBULK_FIND 0001 result
+0040 0067 MLME_IE_TQAM_CAPS_AND_OPS_SIZE 0001 size
+0040 0068 MLME_IE_TQAM_CAPS_SIZE 0001 size
+0040 0069 MLME_IE_TQAM_OPERATION_MBULK_FIND 0001 result
+0040 006a MLME_IE_TQAM_SUBTYPE_MBULK_FIND 0001 result
+0040 006b MLME_IE_VALIDATE_RSN 0008 is_valid pairwise_count_in_ie pairwise_count_computed akm_count_declared akm_count_real pmkid_count capabilities ie_length
+0040 006c MLME_IE_VHT_OPERATION_PARAMS 0004 channel_width channel_center_frequency_segment_0 channel_center_frequency_segment_1 basic_vht_mcs_and_nss
+0040 006d MLME_IE_VHT_OPERATION_SIZE 0001 size
+0040 006e MLME_IE_WFA_TPC_REPORT_PARAMS 0005 oui oui_type oui_subtype tx_power link_margin
+0040 006f MLME_IE_WFA_TPC_REPORT_SIZE 0001 size
+0040 0070 MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS 0003 channel_width channel_center_freq_seg0 channel_center_freq_seg1
+0040 0071 MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_SIZE 0001 size
+0040 0072 MLME_IE_WMM_INFO_PARAMS 0005 oui oui_type oui_subtype version qos_info_field
+0040 0073 MLME_IE_WMM_INFO_SIZE 0001 size
+0040 0074 MLME_IE_WMM_PARAMETER_PARAMS 0007 oui version qos_info_field ac_be ac_bk ac_vi ac_vo
+0040 0075 MLME_IE_WMM_PARAMETER_SIZE 0001 size
+# Generated From mlme_hard/mlme_ie/mlme_ie_debug.xml
+trace_types 159
+MLME_IE_EXTENDED_CAPABILITIES_SIZE.size Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_token Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_report_mode Natural8
+MLME_IE_MEASUREMENT_REPORT_PARAMS.measurement_type Natural8
+MLME_IE_DS_PARAMETER_SET_PARAMS.channel Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_width Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_center_freq_seg0 Natural8
+MLME_IE_WIDE_BANDWIDTH_CHANNEL_SWITCH_ELEMENT_PARAMS.channel_center_freq_seg1 Natural8
+MLME_IE_WMM_INFO_PARAMS.oui Natural8[3]
+MLME_IE_WMM_INFO_PARAMS.oui_type Natural8
+MLME_IE_WMM_INFO_PARAMS.oui_subtype Natural8
+MLME_IE_WMM_INFO_PARAMS.version Natural8
+MLME_IE_WMM_INFO_PARAMS.qos_info_field Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_SIZE.size Natural8
+MLME_IE_NAN_HEADER_PARAMS.oui Natural8[3]
+MLME_IE_NAN_HEADER_PARAMS.oui_type Natural8
+MLME_IE_NAN_HEADER_PARAMS.ie_size Natural8
+MLME_IE_SUPPORTED_CHANNELS_PARAMS.first_channels_mask Natural64
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui_type Natural8
+MLME_IE_SCSC_CHANNEL_LIST_PARAMS.oui_subtype Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.hdr_id Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.index Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_PARAMS.ctw_ops Natural8
+MLME_IE_SUPPORTED_OPERATING_CLASSES_PARAMS.current_operating_class Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.oui Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.version Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.qos_info_field Natural8
+MLME_IE_WMM_PARAMETER_PARAMS.ac_be Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_bk Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_vi Natural32
+MLME_IE_WMM_PARAMETER_PARAMS.ac_vo Natural32
+MLME_IE_TQAM_OPERATION_MBULK_FIND.result Natural32
+MLME_IE_20_40_BSS_COEX_PARAMS.bss_coex_info Natural8
+MLME_IE_EXTENDED_CAPABILITIES_PARAMS.extended_capabilities Natural8[9]
+MLME_IE_VHT_OPERATION_PARAMS.channel_width Natural8
+MLME_IE_VHT_OPERATION_PARAMS.channel_center_frequency_segment_0 Natural8
+MLME_IE_VHT_OPERATION_PARAMS.channel_center_frequency_segment_1 Natural8
+MLME_IE_TPC_REPORT_PARAMS.tx_power Natural8
+MLME_IE_TPC_REPORT_PARAMS.link_margin Natural8
+MLME_IE_REPORTED_FRAME_BODY_PARAMS.reported_frame_body Natural64
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.dms_id Natural8
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.dms_length Natural8
+MLME_IE_DMS_REQUEST_DESCRIPTOR_HEADER_PARAMS.request_type Natural8
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.channel_number Natural8
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.measurement_start_time Natural64
+MLME_IE_MEASUREMENT_REPORT_BASIC_PARAMS.map Natural8
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_SIZE.size Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_token Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_request_mode Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.measurement_type Natural8
+MLME_IE_FTM_LCI_REQUEST_PARAMS.location_subject Natural8
+MLME_IE_FTM_SYNC_INFO_PARAMS.id_extension Natural8
+MLME_IE_FTM_SYNC_INFO_PARAMS.tsf_sync_info Natural32
+MLME_IE_TQAM_SUBTYPE_MBULK_FIND.result Natural32
+MLME_IE_MOBILITY_DOMAIN_SIZE.size Natural8
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.count_type Natural8
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.duration Natural32
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.interval Natural32
+MLME_IE_MLME_WFA_P2P_NOA_DESCRIPTOR.start_time Natural32
+MLME_IE_CHANNEL_SWITCH_WRAPPER_SIZE.size Natural8
+MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_CHANNEL.channel_num Natural8
+MLME_IE_OPERATING_MODE_NOTIFICATION_PARAMS.operating_mode Natural8
+MLME_IE_VALIDATE_RSN.is_valid Boolean
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui Natural8[3]
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui_type Natural8
+MLME_IE_WFA_TPC_REPORT_PARAMS.oui_subtype Natural8
+MLME_IE_WFA_TPC_REPORT_PARAMS.tx_power Natural8s
+MLME_IE_WFA_TPC_REPORT_PARAMS.link_margin Natural8s
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.oui_subtype Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.ssid_length Natural8
+MLME_IE_SCSC_SCAN_SSID_FILTER_PARAMS.ssid Char[6]
+MLME_IE_NAN_HEADER_SIZE.size Natural8
+MLME_IE_DS_PARAMETER_SET_SIZE.size Natural8
+MLME_IE_TQAM_CAPS_SIZE.size Natural8
+MLME_IE_SSID_SIZE.size Natural8
+MLME_IE_MLME_WFA_P2P_IE_PARAMS.oui Natural8[3]
+MLME_IE_MLME_WFA_P2P_IE_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui Natural8[3]
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui_type Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.oui_subtype Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.min_period Natural32
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.max_period Natural32
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.exponent Natural8
+MLME_IE_SCSC_SCAN_TIMING_PARAMS.step_count Natural8
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.peer_address MAC_Address
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.priority Natural8
+MLME_IE_SCSC_NAN_FOLLOWUP_PARAMS.dw_or_faw Natural8
+MLME_IE_SUPPORTED_RATES_SIZE.size Natural8
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.start_time Natural32
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.bssid MAC_Address
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.range Natural32
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.max_error Natural8
+MLME_IE_FTM_RANGE_ENTRY_PARAMS.reserved Natural8
+MLME_IE_POWER_CAPABILITY_PARAMS.min_power Natural8s
+MLME_IE_POWER_CAPABILITY_PARAMS.max_power Natural8s
+MLME_IE_SECONDARY_CHANNEL_OFFSET_ELEMENT_PARAMS.secondary_channel_offset Natural8
+MLME_IE_RM_ENABLED_CAPABILITIES_SIZE.size Natural8
+MLME_IE_SUPPORTED_RATES_PARAMS.rates Natural64
+MLME_IE_FTM_ERROR_CODE_PARAMS.start_time Natural32
+MLME_IE_FTM_ERROR_CODE_PARAMS.bssid MAC_Address
+MLME_IE_FTM_ERROR_CODE_PARAMS.error_code Natural8
+MLME_IE_MLME_WFA_P2P_NOA_ATTRIBUTE_SIZE.size Natural8
+MLME_IE_SCSC_SCAN_NEIGHBOUR_LIST_SIZE.size Natural8
+MLME_IE_SCSC_CHANNEL_LIST_SCAN_CHANNEL.scan_policy Natural8
+MLME_IE_20_40_BSS_INTOLERANT_CH_REPORT_PARAMS.operating_class Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.status_value Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.burst_duration_count Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.min_delta_ftm Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.asap_ftm_per_burst Natural8
+MLME_IE_FTM_BURST_PARAMETERS_PARAMS.format_bandwidth Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.operating_class Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.channel_num Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.reported_frame_info Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.rcpi Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.rsni Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.bssid MAC_Address
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.antenna_id Natural8
+MLME_IE_MEASUREMENT_REPORT_BEACON_PARAMS.parent_tsf Natural32
+MLME_IE_QUIET_ELEMENT_PARAMS.period Natural8
+MLME_IE_SCSC_SCAN_NEIGHBOUR_BSSID.bssid MAC_Address
+MLME_IE_TIMEOUT_INTERVAL_PARAMS.type Natural8
+MLME_IE_TIMEOUT_INTERVAL_PARAMS.value Natural32
+MLME_IE_RM_ENABLED_CAPABILITIES_PARAMS.caps Natural8[5]
+MLME_IE_HT_OPERATION_PARAMS.primary_channel Natural8
+MLME_IE_HT_OPERATION_PARAMS.information_subset_1 Natural8
+MLME_IE_HT_OPERATION_PARAMS.basic_ht_mcs Natural8[8]
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.user_priority Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.classifier_type Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.classifier_mask Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.ip_version Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_IP_HEADER_PARAMS.ip_addr Natural64
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.bssid MAC_Address
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.initiator_address MAC_Address
+MLME_IE_LINK_IDENTIFIER_ELEMENT_PARAMS.responder_address MAC_Address
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS.hdr_id Natural8
+MLME_IE_MLME_WFA_P2P_STATUS_ATTRIBUTE_PARAMS.status Natural8
+MLME_IE_SSID_PARAMS.ssid TOKEN
+MLME_IE_TQAM_CAPABILITIES_MBULK_FIND.result Natural32
+MLME_IE_TPU_BUFFER_STATUS_ELEMENT_PARAMS.tpu_buffer_status_info Natural8
+MLME_IE_TQAM_CAPS_AND_OPS_SIZE.size Natural8
+MLME_IE_SCSC_CHANNEL_LIST_SIZE.size Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.user_priority Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.classifier_type Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.classifier_mask Natural8
+MLME_IE_TCLAS_FOR_DMS_TYPE_ETHERNET_PARAMS.dest_addr MAC_Address
+MLME_IE_WMM_PARAMETER_SIZE.size Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_token Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_request_mode Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.measurement_type Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_subject Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_civic_type Natural8
+MLME_IE_FTM_LOCATION_CIVIC_REQUEST_PARAMS.location_service_interval Natural8
+MLME_IE_ERP_PARAMS.erp Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.channel_switch_mode Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.new_channel_number Natural8
+MLME_IE_CHANNEL_SWITCH_ANNOUNCEMENT_ELEMENT_PARAMS.channel_switch_count Natural8
+# Generated From mlme_hard/mlme_conmgr/mlme_conmgr_debug.xml
+trace_def 7
+0004 0000 MLME_BSS_MAX_IDLE_PERIOD_CONFIGURE 0002 max_idle_period protected_keep_alive_required
+0004 0001 MLME_CONMGR_BSS_IDLE_PERIOD_CAP 0002 ie max
+0004 0002 MLME_CONMGR_SLOW_AP_DELAY 0001 poll
+0004 0003 MLME_CONMGR_SLOW_AP_SWITCH 0002 max_time increment
+0004 0004 MLME_CONMGR_STATUS_CODE 0001 status
+0004 0005 MLME_CONMGR_TEARDOWN 0002 deauth_requested deauth_reason
+0004 0006 MLME_CONMGR_VALUES 0002 parent size_of_host_ies
+# Generated From mlme_hard/mlme_conmgr/mlme_conmgr_debug.xml
+trace_types 3
+MLME_CONMGR_SLOW_AP_SWITCH.max_time Natural32
+MLME_CONMGR_TEARDOWN.deauth_requested Boolean
+MLME_BSS_MAX_IDLE_PERIOD_CONFIGURE.protected_keep_alive_required Boolean
+# Generated From mlme_hard/mlme_sa_query/mlme_sa_query_debug.xml
+trace_def 2
+0020 0000 MLME_SA_QUERY_RESULT 0002 address status
+0020 0001 MLME_SA_QUERY_STATUS 0002 address is_sa_query_waiting_for_response
+# Generated From mlme_hard/mlme_sa_query/mlme_sa_query_debug.xml
+trace_types 4
+MLME_SA_QUERY_STATUS.address MAC_Address
+MLME_SA_QUERY_STATUS.is_sa_query_waiting_for_response bool
+MLME_SA_QUERY_RESULT.address MAC_Address
+MLME_SA_QUERY_RESULT.status Boolean
+# Generated From mlme_hard/mlme_regulatory/mlme_regulatory_debug.xml
+trace_def 12
+0015 0000 MLME_COUNTRY_WORLD 0000
+0015 0001 MLME_REGULATORY_ADJUSTED_CHANNEL_CONFIG 0003 proposed_channel_info resolved_channel_info found
+0015 0002 MLME_REGULATORY_CHANNELS_SUPPORTED 0006 supported_channels length num_subbands step channel num_channels
+0015 0003 MLME_REGULATORY_CHANNEL_REQ 0005 freq_center freq_start freq_end bandwidth_mhz reject_indoor_outdoor_flag
+0015 0004 MLME_REGULATORY_CHANNEL_REQ_FAILURE 0004 freq_start freq_end bandwidth_mhz reason
+0015 0005 MLME_REGULATORY_DO_COUNTRY_CODES_MATCH 0002 mib_country_code country_code
+0015 0006 MLME_REGULATORY_MASK 0001 mask
+0015 0007 MLME_REGULATORY_MIB_IS_DISABLED 0000
+0015 0008 MLME_REGULATORY_NO_CELL 0001 channels_disabled
+0015 0009 MLME_REGULATORY_RULE 0005 freq_start freq_end max_bandwidth_mhz max_power flags
+0015 000a MLME_REGULATORY_RULE_ADD 0006 freq_start freq_end max_bandwidth_mhz max_power flags rule_is_valid
+0015 000b MLME_SET_COUNTRY 0003 alpha reg_rules channel_map
+# Generated From mlme_hard/mlme_regulatory/mlme_regulatory_debug.xml
+trace_types 25
+MLME_REGULATORY_CHANNEL_REQ.reject_indoor_outdoor_flag Natural8
+MLME_REGULATORY_RULE.max_bandwidth_mhz Natural8
+MLME_REGULATORY_RULE.max_power Natural16s
+MLME_REGULATORY_RULE.flags Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.supported_channels Boolean
+MLME_REGULATORY_CHANNELS_SUPPORTED.length Natural32
+MLME_REGULATORY_CHANNELS_SUPPORTED.num_subbands Natural32
+MLME_REGULATORY_CHANNELS_SUPPORTED.step Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.channel Natural8
+MLME_REGULATORY_CHANNELS_SUPPORTED.num_channels Natural8
+MLME_REGULATORY_ADJUSTED_CHANNEL_CONFIG.found Boolean
+MLME_REGULATORY_DO_COUNTRY_CODES_MATCH.mib_country_code Char[2]
+MLME_REGULATORY_DO_COUNTRY_CODES_MATCH.country_code Char[2]
+MLME_REGULATORY_MASK.mask Natural48
+MLME_REGULATORY_NO_CELL.channels_disabled Boolean
+MLME_REGULATORY_CHANNEL_REQ_FAILURE.reason DEBUG_TYPE_REGULATORY_CHANNEL_REQ_FAILURE_REASON
+MLME_REGULATORY_RULE_ADD.freq_start EDGE_OF_BAND
+MLME_REGULATORY_RULE_ADD.freq_end EDGE_OF_BAND
+MLME_REGULATORY_RULE_ADD.max_bandwidth_mhz Natural8
+MLME_REGULATORY_RULE_ADD.max_power Decibels
+MLME_REGULATORY_RULE_ADD.flags Natural8
+MLME_REGULATORY_RULE_ADD.rule_is_valid Boolean
+MLME_SET_COUNTRY.alpha Char[2]
+MLME_SET_COUNTRY.reg_rules Natural8
+MLME_SET_COUNTRY.channel_map MBULK
+DEBUG_TYPE_REGULATORY_CHANNEL_REQ_FAILURE_REASON Enum 0000 invalid_bandwidth 0001 mib_read_failed 0002 header_read_failed 0003 no_rule 0004 bandwidth_40m_not_allowed_for_2g4 0005 not_allowed_in_no_cell
+# Generated From mlme_hard/mlme_measurements/mlme_measurements_debug.xml
+trace_def 27
+0022 0000 MLME_MEASUREMENTS_ADD_SCAN_RESULT 0001 result_code
+0022 0001 MLME_MEASUREMENTS_BUILD_RM_REPORT 0002 size result
+0022 0002 MLME_MEASUREMENTS_CLEARING_RESULTS 0000
+0022 0003 MLME_MEASUREMENTS_INIT 0001 interface_address
+0022 0004 MLME_MEASUREMENTS_LINK_REPORT 0004 interface_address bssid rcpi rsni
+0022 0005 MLME_MEASUREMENTS_LINK_REQUEST 0005 dialog_token used_power max_power rssi snr
+0022 0006 MLME_MEASUREMENTS_OPT_IE_SSID 0001 ssid
+0022 0007 MLME_MEASUREMENTS_REPORT_INFO 0002 bssid ie_len
+0022 0008 MLME_MEASUREMENTS_REQUEST 0005 token class channel mode duration
+0022 0009 MLME_MEASUREMENTS_REQUESTING_SCAN 0002 measurement_duration ies_len
+0022 000a MLME_MEASUREMENTS_REQUEST_IE 0002 token count
+0022 000b MLME_MEASUREMENTS_REQUEST_OPT_IE 0002 reporting_detail reason
+0022 000c MLME_MEASUREMENTS_REQ_REFUSED 0002 token mode
+0022 000d MLME_MEASUREMENTS_REQ_SCAN_MASK 0005 class channel mode channel_time freq_mask
+0022 000e MLME_MEASUREMENTS_RM_CAPS 0004 link beacon_passive beacon_active beacon_table
+0022 000f MLME_MEASUREMENTS_RM_REJECTED 0002 dummy reason
+0022 0010 MLME_MEASUREMENTS_RM_REQ 0001 result
+0022 0011 MLME_MEASUREMENTS_SCAN_COUNT 0002 performed required
+0022 0012 MLME_MEASUREMENTS_SCAN_DELAYED 0001 delay
+0022 0013 MLME_MEASUREMENTS_SCAN_IES 0002 frame frame_length
+0022 0014 MLME_MEASUREMENTS_SCAN_MASKS 0003 active passive mask
+0022 0015 MLME_MEASUREMENTS_SCAN_REQUEST 0001 data
+0022 0016 MLME_MEASUREMENTS_SCAN_RESULT 0001 address
+0022 0017 MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE 0003 ie len total
+0022 0018 MLME_MEASUREMENTS_SCAN_RESULT_NODE_TFS 0001 tfs
+0022 0019 MLME_MEASUREMENTS_TABLE_SIZE 0001 entries
+0022 001a MLME_MEASUREMENTS_TX_CFM 0001 transmission_status
+# Generated From mlme_hard/mlme_measurements/mlme_measurements_debug.xml
+trace_types 57
+MLME_MEASUREMENTS_SCAN_MASKS.active NATURAL48
+MLME_MEASUREMENTS_SCAN_MASKS.passive NATURAL48
+MLME_MEASUREMENTS_SCAN_MASKS.mask NATURAL48
+MLME_MEASUREMENTS_LINK_REQUEST.dialog_token NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.used_power NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.max_power NATURAL8
+MLME_MEASUREMENTS_LINK_REQUEST.rssi Decibels
+MLME_MEASUREMENTS_LINK_REQUEST.snr Decibels
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_TFS.tfs NATURAL64
+MLME_MEASUREMENTS_REQ_REFUSED.token NATURAL8
+MLME_MEASUREMENTS_REQ_REFUSED.mode NATURAL8
+MLME_MEASUREMENTS_RM_REQ.result NATURAL8
+MLME_MEASUREMENTS_RM_CAPS.link Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_passive Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_active Boolean
+MLME_MEASUREMENTS_RM_CAPS.beacon_table Boolean
+MLME_MEASUREMENTS_SCAN_IES.frame MBULK
+MLME_MEASUREMENTS_SCAN_IES.frame_length NATURAL32
+MLME_MEASUREMENTS_REQUEST_IE.token NATURAL8
+MLME_MEASUREMENTS_REQUEST_IE.count NATURAL8
+MLME_MEASUREMENTS_ADD_SCAN_RESULT.result_code NATURAL16
+MLME_MEASUREMENTS_INIT.interface_address MAC_Address
+MLME_MEASUREMENTS_SCAN_RESULT.address MAC_Address
+MLME_MEASUREMENTS_TABLE_SIZE.entries NATURAL16
+MLME_MEASUREMENTS_SCAN_COUNT.performed NATURAL8
+MLME_MEASUREMENTS_SCAN_COUNT.required NATURAL8
+MLME_MEASUREMENTS_TX_CFM.transmission_status NATURAL16
+MLME_MEASUREMENTS_REQUEST_OPT_IE.reporting_detail NATURAL8
+MLME_MEASUREMENTS_REQUEST_OPT_IE.reason DEBUG_TYPE_RM_REQ_OPTIONAL_IE
+MLME_MEASUREMENTS_LINK_REPORT.interface_address MAC_Address
+MLME_MEASUREMENTS_LINK_REPORT.bssid MAC_Address
+MLME_MEASUREMENTS_LINK_REPORT.rcpi NATURAL8
+MLME_MEASUREMENTS_LINK_REPORT.rsni NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.ie NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.len NATURAL8
+MLME_MEASUREMENTS_SCAN_RESULT_NODE_IE.total NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.class NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.channel NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.mode NATURAL8
+MLME_MEASUREMENTS_REQ_SCAN_MASK.channel_time NATURAL16
+MLME_MEASUREMENTS_REQ_SCAN_MASK.freq_mask NATURAL48
+MLME_MEASUREMENTS_OPT_IE_SSID.ssid NATURAL8
+MLME_MEASUREMENTS_REQUEST.token NATURAL8
+MLME_MEASUREMENTS_REQUEST.class NATURAL8
+MLME_MEASUREMENTS_REQUEST.channel NATURAL8
+MLME_MEASUREMENTS_REQUEST.mode NATURAL8
+MLME_MEASUREMENTS_REQUEST.duration NATURAL16
+MLME_MEASUREMENTS_REPORT_INFO.bssid MAC_Address
+MLME_MEASUREMENTS_REPORT_INFO.ie_len NATURAL8
+MLME_MEASUREMENTS_REQUESTING_SCAN.measurement_duration NATURAL16
+MLME_MEASUREMENTS_REQUESTING_SCAN.ies_len NATURAL16
+MLME_MEASUREMENTS_SCAN_DELAYED.delay NATURAL32
+MLME_MEASUREMENTS_BUILD_RM_REPORT.size NATURAL16
+MLME_MEASUREMENTS_BUILD_RM_REPORT.result NATURAL8
+MLME_MEASUREMENTS_SCAN_REQUEST.data TOKEN
+MLME_MEASUREMENTS_RM_REJECTED.dummy NATURAL8
+MLME_MEASUREMENTS_RM_REJECTED.reason DEBUG_TYPE_RM_REQ_FILTER_REASON
+DEBUG_TYPE_RM_REQ_OPTIONAL_IE Enum 0000 ssid 0001 beacon_reporting 0002 reporting_detail 0003 subelements 0004 ap_channel
+DEBUG_TYPE_RM_REQ_FILTER_REASON Enum 0000 req_success 0001 frame_too_small 0002 beacon_req_too_small 0003 mib_not_enabled 0004 no_channels_to_scan 0005 duration_too_large 0006 invalid_request 0007 not_supported 0008 add_scan_failed 0009 ftm_failed
+# Generated From mlme_hard/mlme_api/mlme_api_dplane_debug.xml
+trace_def 2
+0044 0000 MLME_API_DPLANE_STA_CLEAR_CONFIRM 0001 address
+0044 0001 MLME_API_DPLANE_STA_PAUSE_CONFIRM 0001 address
+# Generated From mlme_hard/mlme_api/mlme_api_dplane_debug.xml
+trace_types 2
+MLME_API_DPLANE_STA_PAUSE_CONFIRM.address MAC_Address
+MLME_API_DPLANE_STA_CLEAR_CONFIRM.address MAC_Address
+# Generated From mlme_hard/mlme_api/mlme_api_macrame_debug.xml
+trace_def 35
+0034 0000 MLME_API_MACRAME_ADD_BA_CONFIRM 0006 pid sta_mac priority direction result_code seq_no
+0034 0001 MLME_API_MACRAME_ADD_NOA_INDICATION 0006 blackout_id duration period start_time count flags
+0034 0002 MLME_API_MACRAME_BA_ADD_INDICATION 0002 sta_addr tid_bitmap
+0034 0003 MLME_API_MACRAME_BA_DELETE_CONFIRM 0004 sta_mac priority direction result_code
+0034 0004 MLME_API_MACRAME_BA_DELETE_INDICATION 0004 reason_code peer_addr priority direction
+0034 0005 MLME_API_MACRAME_BA_ERROR_INDICATION 0004 reason_code peer_addr priority direction
+0034 0006 MLME_API_MACRAME_BEACON_NEXT_WINDOW 0003 pid beacon_start_listen beacon_end_listen
+0034 0007 MLME_API_MACRAME_BLACKOUT_END_INIDCATION 0001 id
+0034 0008 MLME_API_MACRAME_CHANNEL_ACTIVITY 0000
+0034 0009 MLME_API_MACRAME_CHANNEL_AVOIDANCE_INDICATION 0001 channel_avoidance_mask
+0034 000a MLME_API_MACRAME_CHANNEL_SWITCH_COUNT_UPDATE 0001 channel_switch_count
+0034 000b MLME_API_MACRAME_CONNECTION_QUALITY_TRIGGER_INDICATION 0001 trigger_flags
+0034 000c MLME_API_MACRAME_DEL_NOA_INDICATION 0001 blackout_id
+0034 000d MLME_API_MACRAME_ECSA_COUNT_FINISHED_INDICATION 0001 sw_time
+0034 000e MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION 0005 frame rssi snr primary_chan_freq fralocal_timeme
+0034 000f MLME_API_MACRAME_MATCHED_FILTER_INIDCATION 0005 frame dest_pid filter_id packet_filter_mode mac_hdr_len
+0034 0010 MLME_API_MACRAME_MIC_FAILURE_INIDCATION 0003 sta_addr key_type key_id
+0034 0011 MLME_API_MACRAME_NAN_DW_FINISHED_INDICATION 0001 pid
+0034 0012 MLME_API_MACRAME_POWER_REDUCTION_INDICATION 0001 power_reduction_channel_mask
+0034 0013 MLME_API_MACRAME_QE_ADD_INDICATION 0006 blackout_id quiet_duration quiet_period start_time quiet_offset flags
+0034 0014 MLME_API_MACRAME_QE_DELETE_INDICATION 0000
+0034 0015 MLME_API_MACRAME_QE_UPDATE_COUNT 0001 quiet_count
+0034 0016 MLME_API_MACRAME_REQ_PROBE_REQ 0000
+0034 0017 MLME_API_MACRAME_RSSI_REPORT 0002 bssid rssi
+0034 0018 MLME_API_MACRAME_RX_BLOCKACK_CONTROL_INIDCATION 0001 rx_allowed
+0034 0019 MLME_API_MACRAME_SET_NUM_ANTENNAS 0001 num_antennas
+0034 001a MLME_API_MACRAME_STA_UNKNOWN_PEER_INDICATION 0001 peer_addr
+0034 001b MLME_API_MACRAME_TDLS_CTRL_INDICATION 0001 tdls_allowed
+0034 001c MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION 0003 address traffic_pkt_cnt_tx traffic_pkt_cnt_rx
+0034 001d MLME_API_MACRAME_TPU_SP_INIDCATION 0002 address ca_bitmap
+0034 001e MLME_API_MACRAME_TX_BLOCKACK_CONTROL_INIDCATION 0001 tx_allowed
+0034 001f MLME_API_MACRAME_TX_FRAME_CONFIRM 0004 pid status tag receiver_address
+0034 0020 MLME_API_MACRAME_VIF_DEREGISTER_CONFIRM 0000
+0034 0021 MLME_API_MACRAME_VIF_DESCHEDULE_INDICATION 0001 pid
+0034 0022 MLME_API_MACRAME_VIF_SCHEDULE_INDICATION 0001 pid
+# Generated From mlme_hard/mlme_api/mlme_api_macrame_debug.xml
+trace_types 65
+MLME_API_MACRAME_QE_ADD_INDICATION.quiet_duration Natural32
+MLME_API_MACRAME_QE_ADD_INDICATION.quiet_period Natural32
+MLME_API_MACRAME_QE_ADD_INDICATION.start_time Natural64
+MLME_API_MACRAME_ADD_BA_CONFIRM.pid FsmProcessId
+MLME_API_MACRAME_ADD_BA_CONFIRM.sta_mac MAC_Address
+MLME_API_MACRAME_ADD_BA_CONFIRM.priority Priority
+MLME_API_MACRAME_ADD_BA_CONFIRM.direction Direction
+MLME_API_MACRAME_ADD_BA_CONFIRM.result_code Result_Code
+MLME_API_MACRAME_BA_DELETE_CONFIRM.sta_mac MAC_Address
+MLME_API_MACRAME_BA_DELETE_CONFIRM.priority Priority
+MLME_API_MACRAME_BA_DELETE_CONFIRM.direction Direction
+MLME_API_MACRAME_BA_DELETE_CONFIRM.result_code Result_Code
+MLME_API_MACRAME_CHANNEL_SWITCH_COUNT_UPDATE.channel_switch_count Natural8
+MLME_API_MACRAME_STA_UNKNOWN_PEER_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_RSSI_REPORT.bssid MAC_Address
+MLME_API_MACRAME_RSSI_REPORT.rssi Integer16
+MLME_API_MACRAME_BA_DELETE_INDICATION.reason_code Reason_Code
+MLME_API_MACRAME_BA_DELETE_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_BA_DELETE_INDICATION.priority Priority
+MLME_API_MACRAME_BA_DELETE_INDICATION.direction Direction
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.frame MBULK
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.dest_pid FsmProcessId
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.filter_id Natural8
+MLME_API_MACRAME_MATCHED_FILTER_INIDCATION.packet_filter_mode Packet_Filter_Mode
+MLME_API_MACRAME_ADD_NOA_INDICATION.duration Natural32
+MLME_API_MACRAME_ADD_NOA_INDICATION.period Natural32
+MLME_API_MACRAME_ADD_NOA_INDICATION.start_time Natural64
+MLME_API_MACRAME_ADD_NOA_INDICATION.count Natural8
+MLME_API_MACRAME_SET_NUM_ANTENNAS.num_antennas Natural8
+MLME_API_MACRAME_VIF_DESCHEDULE_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.frame MBULK
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.rssi Decibels
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.snr Decibels
+MLME_API_MACRAME_MANAGEMENT_FRAME_INDICATION.fralocal_timeme Natural64
+MLME_API_MACRAME_POWER_REDUCTION_INDICATION.power_reduction_channel_mask Natural64
+MLME_API_MACRAME_MIC_FAILURE_INIDCATION.sta_addr MAC_Address
+MLME_API_MACRAME_MIC_FAILURE_INIDCATION.key_type Key_Type
+MLME_API_MACRAME_TPU_SP_INIDCATION.address MAC_Address
+MLME_API_MACRAME_TPU_SP_INIDCATION.ca_bitmap Natural8
+MLME_API_MACRAME_RX_BLOCKACK_CONTROL_INIDCATION.rx_allowed Boolean
+MLME_API_MACRAME_TX_FRAME_CONFIRM.pid FsmProcessId
+MLME_API_MACRAME_TX_FRAME_CONFIRM.status Transmission_Status
+MLME_API_MACRAME_TX_FRAME_CONFIRM.tag Client_Tag
+MLME_API_MACRAME_TX_FRAME_CONFIRM.receiver_address MAC_Address
+MLME_API_MACRAME_TX_BLOCKACK_CONTROL_INIDCATION.tx_allowed Boolean
+MLME_API_MACRAME_NAN_DW_FINISHED_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_CONNECTION_QUALITY_TRIGGER_INDICATION.trigger_flags Natural8
+MLME_API_MACRAME_ECSA_COUNT_FINISHED_INDICATION.sw_time Natural32
+MLME_API_MACRAME_CHANNEL_AVOIDANCE_INDICATION.channel_avoidance_mask Natural64
+MLME_API_MACRAME_BLACKOUT_END_INIDCATION.id BLACKOUT_ID
+MLME_API_MACRAME_TDLS_CTRL_INDICATION.tdls_allowed Boolean
+MLME_API_MACRAME_QE_UPDATE_COUNT.quiet_count Natural8
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.pid FsmProcessId
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.beacon_start_listen Natural32
+MLME_API_MACRAME_BEACON_NEXT_WINDOW.beacon_end_listen Natural32
+MLME_API_MACRAME_BA_ADD_INDICATION.sta_addr MAC_Address
+MLME_API_MACRAME_BA_ADD_INDICATION.tid_bitmap Natural8
+MLME_API_MACRAME_BA_ERROR_INDICATION.reason_code Reason_Code
+MLME_API_MACRAME_BA_ERROR_INDICATION.peer_addr MAC_Address
+MLME_API_MACRAME_BA_ERROR_INDICATION.priority Priority
+MLME_API_MACRAME_BA_ERROR_INDICATION.direction Direction
+MLME_API_MACRAME_VIF_SCHEDULE_INDICATION.pid FsmProcessId
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.address MAC_Address
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.traffic_pkt_cnt_tx Natural32
+MLME_API_MACRAME_TDLS_TRAFFIC_REPORT_INDICATION.traffic_pkt_cnt_rx Natural32
+# Generated From mlme_hard/mlme_scan/mlme_scan_debug.xml
+trace_def 41
+0001 0000 MLME_NO_OF_REGISTERED_VIFS 0001 number
+0001 0001 MLME_PNO_SIGNAL_BELOW_THRESHOLD 0002 rssi_threshold frame_rssi
+0001 0002 MLME_SCAN_ADD_REQ 0005 requester new_scan_id scan_type device_address new_prority
+0001 0003 MLME_SCAN_BOOK_NEXT_SCAN 0002 pause_count sps_count
+0001 0004 MLME_SCAN_BOOK_NEXT_SCAN_TIME 0001 time
+0001 0005 MLME_SCAN_DEL_REQ 0002 requester scan_id
+0001 0006 MLME_SCAN_DEVICE_ADDRESS_RANDOMISED 0003 mask old_address new_address
+0001 0007 MLME_SCAN_DUE_TIME 0004 period scan_next_due_time is_scan_periodic periodic_scan_count
+0001 0008 MLME_SCAN_FRAME_REPORTED 0001 frequency
+0001 0009 MLME_SCAN_FREQUENCY_NOT_ALLOWED_CONFIG 0001 frequency
+0001 000a MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY 0003 frequency config policy
+0001 000b MLME_SCAN_FREQUENCY_NOT_ALLOWED_WIFISHARING 0001 frequency
+0001 000c MLME_SCAN_GET_NEXT_CHANNEL 0002 type mask
+0001 000d MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE 0005 rule posn mask frequency policy
+0001 000e MLME_SCAN_GET_NEXT_CHANNEL_RESULT 0002 channel_found frequency
+0001 000f MLME_SCAN_GET_NEXT_SCAN_CANDIDATE 0007 priority highest_priority pause_priority is_scan_in_home_time end_of_home_time scan_start_time next_next_start_time
+0001 0010 MLME_SCAN_GET_NEXT_SCAN_RESULT 0003 priority now next_scan_due_time
+0001 0011 MLME_SCAN_HOME_TIME 0000
+0001 0012 MLME_SCAN_IE_CHANNEL 0003 count mask scan_policy
+0001 0013 MLME_SCAN_IE_CHANNEL_ENTRY 0003 frequency count scan_mask
+0001 0014 MLME_SCAN_IE_NEIGHBOUR_DL 0001 neighbour_descriptor_count
+0001 0015 MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY 0003 bssid channel_freq mask
+0001 0016 MLME_SCAN_IE_SSID_FILTER 0000
+0001 0017 MLME_SCAN_IE_TIMING 0005 min_period max_period exponent step_count scan_skip_first_period
+0001 0018 MLME_SCAN_INIT 0003 usable_aerials hw_aerials mib_aerials
+0001 0019 MLME_SCAN_MASK 0001 mask
+0001 001a MLME_SCAN_MASK_UPDATE 0004 frequency set channel_mask channels_mask
+0001 001b MLME_SCAN_NCHO_VALUES 0004 channel_scan_time probe_interval home_time away_time
+0001 001c MLME_SCAN_PAUSE_REQ 0005 requester pause priority pause_count current_priority
+0001 001d MLME_SCAN_PROCESS_SCAN_END 0001 period
+0001 001e MLME_SCAN_RESULT 0003 frequency rssi hash
+0001 001f MLME_SCAN_RESULT_DELETED 0001 address
+0001 0020 MLME_SCAN_RESULT_FILTERED 0004 frequency bcn_bssid rssi reason
+0001 0021 MLME_SCAN_SEQUENCE_NUMBER_RANDOMISED 0000
+0001 0022 MLME_SCAN_SPS_DELETE 0002 id flag
+0001 0023 MLME_SCAN_SPS_NOT_FOUND 0001 id
+0001 0024 MLME_SCAN_START_CHANNEL_SCAN 0004 id frequency active rescan_count
+0001 0025 MLME_SCAN_TIMER_INDICATION 0004 next_scan_time is_scan_suspended pause_count pause_priority
+0001 0026 MLME_SCAN_VALIDATE_AP 0005 ds_chan ht_chan rice_freq ds_freq ht_freq
+0001 0027 MLME_SCAN_WHAT_NEXT 0004 start_time time_on_chl chl_duration rescan_count
+0001 0028 MLME_SET_ACL_REQ 0001 result_code
+# Generated From mlme_hard/mlme_scan/mlme_scan_debug.xml
+trace_types 87
+MLME_SCAN_ADD_REQ.requester FsmProcessId
+MLME_SCAN_ADD_REQ.new_scan_id SCAN_ID
+MLME_SCAN_ADD_REQ.scan_type SCAN_TYPE
+MLME_SCAN_ADD_REQ.device_address MAC_Address
+MLME_SCAN_ADD_REQ.new_prority Natural8
+MLME_SCAN_NCHO_VALUES.channel_scan_time Integer16
+MLME_SCAN_NCHO_VALUES.probe_interval Integer16
+MLME_SCAN_NCHO_VALUES.home_time Natural32
+MLME_SCAN_NCHO_VALUES.away_time Natural32
+MLME_SCAN_DUE_TIME.period Natural32
+MLME_SCAN_DUE_TIME.scan_next_due_time Natural32
+MLME_SCAN_DUE_TIME.is_scan_periodic Boolean
+MLME_SCAN_DUE_TIME.periodic_scan_count Natural8
+MLME_SCAN_WHAT_NEXT.start_time Natural32
+MLME_SCAN_WHAT_NEXT.time_on_chl Natural32
+MLME_SCAN_WHAT_NEXT.chl_duration Natural32
+MLME_SCAN_WHAT_NEXT.rescan_count Natural8
+MLME_SCAN_DEL_REQ.requester FsmProcessId
+MLME_SCAN_DEL_REQ.scan_id SCAN_ID
+MLME_SCAN_SPS_NOT_FOUND.id SCAN_ID
+MLME_SCAN_START_CHANNEL_SCAN.id SCAN_ID
+MLME_SCAN_START_CHANNEL_SCAN.frequency Channel_Frequency
+MLME_SCAN_START_CHANNEL_SCAN.active Boolean
+MLME_SCAN_START_CHANNEL_SCAN.rescan_count Natural8
+MLME_SET_ACL_REQ.result_code Integer16
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.mask Natural64
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.old_address MAC_Address
+MLME_SCAN_DEVICE_ADDRESS_RANDOMISED.new_address MAC_Address
+MLME_SCAN_IE_CHANNEL.count Natural8
+MLME_SCAN_IE_CHANNEL.mask Natural64
+MLME_SCAN_IE_CHANNEL.scan_policy Natural8
+MLME_SCAN_BOOK_NEXT_SCAN_TIME.time Natural32
+MLME_SCAN_TIMER_INDICATION.next_scan_time Natural32
+MLME_SCAN_TIMER_INDICATION.is_scan_suspended Boolean
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.is_scan_in_home_time Boolean
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.end_of_home_time Natural32
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.scan_start_time Natural32
+MLME_SCAN_GET_NEXT_SCAN_CANDIDATE.next_next_start_time Natural32
+MLME_NO_OF_REGISTERED_VIFS.number Integer16
+MLME_SCAN_PAUSE_REQ.requester FsmProcessId
+MLME_SCAN_PAUSE_REQ.pause Boolean
+MLME_SCAN_PAUSE_REQ.priority Natural8
+MLME_SCAN_PAUSE_REQ.current_priority Natural8
+MLME_SCAN_IE_CHANNEL_ENTRY.frequency Channel_Frequency
+MLME_SCAN_IE_CHANNEL_ENTRY.scan_mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.frequency Channel_Frequency
+MLME_SCAN_GET_NEXT_CHANNEL_POSSIBLE.policy Natural8
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_WIFISHARING.frequency Channel_Frequency
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_CONFIG.frequency Channel_Frequency
+MLME_SCAN_SPS_DELETE.id SCAN_ID
+MLME_SCAN_SPS_DELETE.flag Boolean
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY.frequency Channel_Frequency
+MLME_SCAN_FREQUENCY_NOT_ALLOWED_POLICY.policy Natural8
+MLME_SCAN_IE_TIMING.min_period Natural32
+MLME_SCAN_IE_TIMING.max_period Natural32
+MLME_SCAN_IE_TIMING.exponent Natural8
+MLME_SCAN_IE_TIMING.step_count Natural8
+MLME_SCAN_IE_TIMING.scan_skip_first_period Boolean
+MLME_SCAN_RESULT.frequency Channel_Frequency
+MLME_SCAN_RESULT.rssi Decibels
+MLME_SCAN_MASK_UPDATE.frequency Channel_Frequency
+MLME_SCAN_MASK_UPDATE.set Boolean
+MLME_SCAN_MASK_UPDATE.channel_mask Natural64
+MLME_SCAN_MASK_UPDATE.channels_mask Natural64
+MLME_SCAN_GET_NEXT_CHANNEL.type DEBUG_TYPE_SCAN_CHANNEL
+MLME_SCAN_GET_NEXT_CHANNEL.mask Natural64
+MLME_SCAN_RESULT_FILTERED.frequency Channel_Frequency
+MLME_SCAN_RESULT_FILTERED.bcn_bssid MAC_Address
+MLME_SCAN_RESULT_FILTERED.rssi Decibels
+MLME_SCAN_RESULT_FILTERED.reason DEBUG_TYPE_SCAN_FILTER_REASON_TYPE
+MLME_SCAN_GET_NEXT_CHANNEL_RESULT.channel_found Boolean
+MLME_SCAN_GET_NEXT_CHANNEL_RESULT.frequency Channel_Frequency
+MLME_SCAN_RESULT_DELETED.address MAC_Address
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.bssid MAC_Address
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.channel_freq Channel_Frequency
+MLME_SCAN_IE_NEIGHBOUR_DL_ENTRY.mask Natural64
+MLME_SCAN_MASK.mask Natural64
+MLME_PNO_SIGNAL_BELOW_THRESHOLD.rssi_threshold Decibels
+MLME_PNO_SIGNAL_BELOW_THRESHOLD.frame_rssi Decibels
+MLME_SCAN_PROCESS_SCAN_END.period Natural32
+MLME_SCAN_FRAME_REPORTED.frequency Channel_Frequency
+MLME_SCAN_GET_NEXT_SCAN_RESULT.now Natural32
+MLME_SCAN_GET_NEXT_SCAN_RESULT.next_scan_due_time Natural32
+MLME_SCAN_VALIDATE_AP.rice_freq Channel_Frequency
+MLME_SCAN_VALIDATE_AP.ds_freq Channel_Frequency
+MLME_SCAN_VALIDATE_AP.ht_freq Channel_Frequency
+DEBUG_TYPE_SCAN_FILTER_REASON_TYPE Enum 0000 ssid 0001 freq 0002 address 0003 invalid 0004 channel 0005 hash 0006 rssi 0007 not_basic 0008 bssid_filter 0009 policy 000a test_mode 000b ssid_list 000c not_p2p_ssid 000d hotlist 000e tracking_scan 000f blacklisted_sender 0010 pno 0011 duplicate_frame 0012 not_on_channel 0013 off_channel_invalid 0014 no_sps 0015 ncho
+DEBUG_TYPE_SCAN_CHANNEL Enum 0000 IE 0001 ALL 0002 NEIGHBOUR
+# Generated From mlme_hard/mlme_scan/mlme_scan_channel_debug.xml
+trace_def 13
+0046 0000 MLME_SCAN_CHANNEL_BUSY 0001 busy
+0046 0001 MLME_SCAN_CHANNEL_COMPLETED 0002 frames type
+0046 0002 MLME_SCAN_CHANNEL_DFS_ACTIVE 0003 frequency flags policy
+0046 0003 MLME_SCAN_CHANNEL_ENTRY_ALL 0003 channel_freq mask count
+0046 0004 MLME_SCAN_CHANNEL_INIT 0001 pid
+0046 0005 MLME_SCAN_CHANNEL_MIB 0003 frames ap_min ap_max
+0046 0006 MLME_SCAN_CHANNEL_REQUEST 0003 frequency flags policy
+0046 0007 MLME_SCAN_CHANNEL_SCHEDULE 0002 frequency schedule_time
+0046 0008 MLME_SCAN_CHANNEL_SEND_PROBES 0003 frequency num_probes_ies wildcard_scan
+0046 0009 MLME_SCAN_CHANNEL_SET_TIME_PROBE 0002 frequency duration
+0046 000a MLME_SCAN_CHANNEL_START_LISTENING 0005 passive rescan_count start total timeout
+0046 000b MLME_SCAN_CHANNEL_TIMES 0002 now max
+0046 000c MLME_SCAN_CHANNEL_WHAT_NEXT 0003 frequency total rescan_count
+# Generated From mlme_hard/mlme_scan/mlme_scan_channel_debug.xml
+trace_types 29
+MLME_SCAN_CHANNEL_DFS_ACTIVE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_DFS_ACTIVE.flags Natural8
+MLME_SCAN_CHANNEL_DFS_ACTIVE.policy Natural8
+MLME_SCAN_CHANNEL_COMPLETED.frames Natural8
+MLME_SCAN_CHANNEL_COMPLETED.type DEBUG_TYPE_SCAN_CHANNEL_END
+MLME_SCAN_CHANNEL_WHAT_NEXT.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_WHAT_NEXT.total Natural32
+MLME_SCAN_CHANNEL_WHAT_NEXT.rescan_count Natural8
+MLME_SCAN_CHANNEL_REQUEST.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_REQUEST.flags Natural8
+MLME_SCAN_CHANNEL_REQUEST.policy Natural8
+MLME_SCAN_CHANNEL_SET_TIME_PROBE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SET_TIME_PROBE.duration Natural32
+MLME_SCAN_CHANNEL_SCHEDULE.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SCHEDULE.schedule_time Natural32
+MLME_SCAN_CHANNEL_TIMES.now Natural32
+MLME_SCAN_CHANNEL_TIMES.max Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.passive Boolean
+MLME_SCAN_CHANNEL_START_LISTENING.rescan_count Natural8
+MLME_SCAN_CHANNEL_START_LISTENING.start Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.total Natural32
+MLME_SCAN_CHANNEL_START_LISTENING.timeout Natural32
+MLME_SCAN_CHANNEL_BUSY.busy Boolean
+MLME_SCAN_CHANNEL_ENTRY_ALL.channel_freq Channel_Frequency
+MLME_SCAN_CHANNEL_ENTRY_ALL.mask Natural64
+MLME_SCAN_CHANNEL_ENTRY_ALL.count Natural8
+MLME_SCAN_CHANNEL_SEND_PROBES.frequency Channel_Frequency
+MLME_SCAN_CHANNEL_SEND_PROBES.num_probes_ies Natural8
+MLME_SCAN_CHANNEL_SEND_PROBES.wildcard_scan Boolean
+DEBUG_TYPE_SCAN_CHANNEL_END Enum 0000 natural 0003 frame 0004 ap 0005 busy 0006 abort
+# Generated From coex/coex_debug.xml
+trace_def 280
+001d 0000 CME_BT_TRANSACTION_REQ 0009 seqNum valid is_tx pri start end chStart chEnd antMask
+001d 0001 CME_SIMRX_REQ 0001 enabled
+001d 0002 COEX_API_WLAN_PRIV_SET_STATE 0003 current_state new_state __LINE__
+001d 0003 COEX_BEACON 0003 our_pos aid __LINE__
+001d 0004 COEX_CTL_DEINIT 0002 cflags __LINE__
+001d 0005 COEX_CTL_INIT 0003 cflags freq __LINE__
+001d 0006 COEX_CTL_STROBE 0001 __LINE__
+001d 0007 COEX_CTL_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0008 COEX_FLEXIMAC_ARBITRATION_ALERT 0004 mac update_time arb_required __LINE__
+001d 0009 COEX_FLEXIMAC_ARBITRATION_LEVEL 0004 mac current required __LINE__
+001d 000a COEX_FLEXIMAC_BT_OFF 0001 __LINE__
+001d 000b COEX_FLEXIMAC_BT_ON 0001 __LINE__
+001d 000c COEX_FLEXIMAC_DEINIT 0001 __LINE__
+001d 000d COEX_FLEXIMAC_DPLP_OFF 0002 mac __LINE__
+001d 000e COEX_FLEXIMAC_FLUSH 0003 head missed __LINE__
+001d 000f COEX_FLEXIMAC_FLUSH_ELEMENT 0002 tail __LINE__
+001d 0010 COEX_FLEXIMAC_INIT 0001 __LINE__
+001d 0011 COEX_FLEXIMAC_INTERRUPT_DEREGISTER 0003 mac int_num __LINE__
+001d 0012 COEX_FLEXIMAC_INTERRUPT_REGISTER 0004 mac source int_num __LINE__
+001d 0013 COEX_FLEXIMAC_MACPP_ALLOWED_ALERT 0005 mac update_time update_allowed reason __LINE__
+001d 0014 COEX_FLEXIMAC_OVERRIDE_ALERT 0004 mac update_time override __LINE__
+001d 0015 COEX_FLEXIMAC_OVERRIDE_MACPP 0004 mac override_macpp override_femctrl_drive __LINE__
+001d 0016 COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED 0004 flags mac arb_required __LINE__
+001d 0017 COEX_FLEXIMAC_REQ_OVERRIDE 0004 flags mac override __LINE__
+001d 0018 COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING 0004 flags mac spectral_checking_enabled __LINE__
+001d 0019 COEX_FLEXIMAC_REQ_WLAN_LISTEN 0004 flags mac priority __LINE__
+001d 001a COEX_FLEXIMAC_RESULT 0002 result __LINE__
+001d 001b COEX_FLEXIMAC_RING_BG 0006 mac isr head tail missed __LINE__
+001d 001c COEX_FLEXIMAC_RING_DEINIT 0001 __LINE__
+001d 001d COEX_FLEXIMAC_RING_ENTRY 0008 mac time_us event data data1 data2 count __LINE__
+001d 001e COEX_FLEXIMAC_RING_INIT 0001 __LINE__
+001d 001f COEX_FLEXIMAC_RING_RING 0004 mac head tail __LINE__
+001d 0020 COEX_FLEXIMAC_SHUTDOWN_ALERT 0003 mac_instance time_us __LINE__
+001d 0021 COEX_FLEXIMAC_SIM_RX_ALERT 0004 mac update_time simrx_disabled __LINE__
+001d 0022 COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT 0004 mac update_time spectral_checking_enabled __LINE__
+001d 0023 COEX_FLEXIMAC_START_ALERT 0008 flags mac time_us channel_start channel_end band antenna_bitmask __LINE__
+001d 0024 COEX_FLEXIMAC_START_CONFIG_ALERT 0006 arb_req spectral simrx override listen __LINE__
+001d 0025 COEX_FLEXIMAC_TRANS_ALERT 0005 mac_instance time_us seq_num result __LINE__
+001d 0026 COEX_FLEXIMAC_WLAN_LISTEN_ALERT 0004 mac update_time priority __LINE__
+001d 0027 COEX_GENERIC 0008 data0 data1 data2 data3 data4 data5 data6 data7
+001d 0028 COEX_HWM_COEX_BB_ALLOWED_ORIDE 0002 COEX_BB_ALLOWED_ORIDE __LINE__
+001d 0029 COEX_HWM_COEX_BB_CFG 0002 COEX_BB_CFG_EN __LINE__
+001d 002a COEX_HWM_COEX_BB_DEBUG 0004 bb_debug_sel bb_debug_if_sel bb_debug_cdl_sel bb_debug_cdl_arb_sel
+001d 002b COEX_HWM_COEX_BB_DEFER 0006 wl_tx wl_rx bt_tx bt_rx lte_tx lte_rx
+001d 002c COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME 0003 mac_instance wl_sw_asrx_start_time __LINE__
+001d 002d COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE 0003 mac_instance wl_sw_asrx_update __LINE__
+001d 002e COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME 0003 mac_instance wl_sw_astx_start_time __LINE__
+001d 002f COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE 0003 mac_instance wl_sw_astx_update __LINE__
+001d 0030 COEX_HWM_COEX_BB_WL_SW_IF_EN 0003 mac_instance wl_sw_if_en __LINE__
+001d 0031 COEX_HWM_COEX_BT_ALLOWED_ORIDE 0002 COEX_BT_ALLOWED_ORIDE __LINE__
+001d 0032 COEX_HWM_COEX_BT_CFG 0002 COEX_BT_CFG __LINE__
+001d 0033 COEX_HWM_COEX_BT_DEBUG 0004 bt_debug_sel bt_cdl_debug_sel bt_sw_if_debug_sel __LINE__
+001d 0034 COEX_HWM_COEX_BT_DEFER 0003 bt_tx bt_rx __LINE__
+001d 0035 COEX_HWM_COEX_BT_WL_CDL_CFG 0006 mac_instance bt_tx_col bt_rx_col wl_tx_col wl_rx_col __LINE__
+001d 0036 COEX_HWM_COEX_BT_WL_DEBUG 0002 bt_wl_debug_sel __LINE__
+001d 0037 COEX_HWM_COEX_CDL_CFG 0004 wl_abort_cfg bt_abort_cfg bt_wl_tx_col bt_wl_rx_col
+001d 0038 COEX_HWM_COEX_CLKGEN_CFG 0002 COEX_BB_CLKGEN_CFG __LINE__
+001d 0039 COEX_HWM_COEX_WL_ALLOWED_ORIDE 0003 mac_instance COEX_WL_ALLOWED_ORIDE __LINE__
+001d 003a COEX_HWM_COEX_WL_CFG 0003 mac_instance COEX_WL_CFG __LINE__
+001d 003b COEX_HWM_COEX_WL_DEBUG 0006 mac_instance wl_debug_sel wl_mac_if_debug_sel wl_cdl_debug_sel wl_sw_if_debug_sel __LINE__
+001d 003c COEX_HWM_COEX_WL_DEFER 0004 mac_instance wl_tx wl_rx __LINE__
+001d 003d COEX_HWM_COEX_WL_SW_ASRX 0009 mac_instance wl_sw_asrx_duration wl_sw_asrx_priority wl_sw_asrx_ant_bitmap wl_sw_asrx_ant_min wl_sw_asrx_start_chan wl_sw_asrx_end_chan wl_sw_asrx_5g __LINE__
+001d 003e COEX_HWM_COEX_WL_SW_ASTX 0009 mac_instance wl_sw_astx_duration wl_sw_astx_priority wl_sw_astx_ant_bitmap wl_sw_astx_ant_min wl_sw_astx_start_chan wl_sw_astx_end_chan wl_sw_astx_5g __LINE__
+001d 003f COEX_HWM_DEINIT 0001 __LINE__
+001d 0040 COEX_HWM_GET_RX_PRI 0005 mac_instance wl_rx_listen_pri wl_rx_phyact_pri wl_rx_mac_phy __LINE__
+001d 0041 COEX_HWM_GET_RX_TX_ACK_PRI 0004 mac_instance wl_rx_ack_pri wl_tx_ack_pri __LINE__
+001d 0042 COEX_HWM_INIT 0001 __LINE__
+001d 0043 COEX_HWM_SET_RX_PRI 0004 mac_instance cdl_priority promote_mac __LINE__
+001d 0044 COEX_HWM_SET_RX_PRIORITY_ERROR 0003 res mac pri
+001d 0045 COEX_HWM_SET_RX_TX_ACK_PRI 0003 mac_instance wl_rx_tx_ack_priority __LINE__
+001d 0046 COEX_HWM_SET_SIMRX_ERROR 0003 res mac simrx_enabled
+001d 0047 COEX_HWM_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0048 COEX_HWM_WL_CALIB_PROTECT_DISABLE_ERROR 0002 res mac
+001d 0049 COEX_HWM_WL_CALIB_PROTECT_ENABLE_ERROR 0002 res mac
+001d 004a COEX_MAC_ACL_CONTROL 0003 mflags bt_active __LINE__
+001d 004b COEX_MAC_ADD_PERIODIC_BLACKOUT 0008 mflags pbo_index type start_time duration period puncturable vif_bm
+001d 004c COEX_MAC_ADD_PERIODIC_BLACKOUT_END 0004 pbo_index created handle __LINE__
+001d 004d COEX_MAC_ADD_SINGLESHOT_BLACKOUT 0008 mflags type start_time duration puncturable bo_handle vif_bm go_mvif
+001d 004e COEX_MAC_ADD_SINGLESHOT_RESTRICTION 0006 mflags vif_bm start_time duration eol __LINE__
+001d 004f COEX_MAC_CALIBRATION_SW_IF_DISABLED 0002 cflags __LINE__
+001d 0050 COEX_MAC_CALIBRATION_SW_IF_ENABLED 0007 cflags astx_duration astx_priority asrx_duration asrx_priority start_time __LINE__
+001d 0051 COEX_MAC_DEINIT 0001 __LINE__
+001d 0052 COEX_MAC_DELETE_ALL_BLACKOUTS 0002 mflags __LINE__
+001d 0053 COEX_MAC_DELETE_PERIODIC_BLACKOUT 0004 mflags pbo_index type __LINE__
+001d 0054 COEX_MAC_DELETE_SINGLESHOT_BLACKOUT 0003 mflags type __LINE__
+001d 0055 COEX_MAC_DELETE_SINGLESHOT_RESTRICTION 0003 mflags vif_bm __LINE__
+001d 0056 COEX_MAC_GET_CLEAR_TIMEOUT 0004 mflags active_2g4_vifs duration __LINE__
+001d 0057 COEX_MAC_INIT 0001 __LINE__
+001d 0058 COEX_MAC_INSTALL_KA_MPS_BLACKOUTS 0003 mflags mps_state __LINE__
+001d 0059 COEX_MAC_INSTALL_MAC_BLACKOUT 0007 start_time duration period puncturable KA_mode bo_handle vif_bm
+001d 005a COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS 0002 mflags __LINE__
+001d 005b COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS 0002 mflags __LINE__
+001d 005c COEX_MAC_KA_UPDATE_PUNCTURABILITY 0003 mflags enable_puncturing __LINE__
+001d 005d COEX_MAC_MASK_BLE_BLACKOUTS 0004 mflags mps_state vix_bitmap __LINE__
+001d 005e COEX_MAC_MASK_PERIODIC_BLACKOUTS 0002 mflags __LINE__
+001d 005f COEX_MAC_MPS_CHECK 0003 mflags mps_state __LINE__
+001d 0060 COEX_MAC_MPS_DISABLE 0003 mflags mps_state __LINE__
+001d 0061 COEX_MAC_MPS_ELEMENT 0005 index period duration total __LINE__
+001d 0062 COEX_MAC_MPS_ENABLE 0003 mflags mps_state __LINE__
+001d 0063 COEX_MAC_MPS_PROTECTION_END 0006 mflags mps_state in_mps mps_on_time mps_off_time __LINE__
+001d 0064 COEX_MAC_MPS_PROTECTION_START 0006 mflags mps_state in_mps mps_on_time mps_off_time __LINE__
+001d 0065 COEX_MAC_MPS_SUMMARY 0005 mflags connflags total_duration MPS_PERIODIC_DURATION_LIMIT __LINE__
+001d 0066 COEX_MAC_MPS_TIMER_EVENT 0003 mflags mps_state __LINE__
+001d 0067 COEX_MAC_PAUSE_PERIODIC_BLACKOUT 0005 mflags index type bo_handle __LINE__
+001d 0068 COEX_MAC_RESUME_PERIODIC_BLACKOUT 0005 mflags index type bo_handle __LINE__
+001d 0069 COEX_MAC_SET_CLEAR_TIMEOUT 0005 mflags active_2g4_vifs restore duration __LINE__
+001d 006a COEX_MAC_SET_MIN_TX_RATE 0003 mflags min_tx_rate __LINE__
+001d 006b COEX_MAC_STOP_KEEP_ALIVE 0002 mflags __LINE__
+001d 006c COEX_MAC_TDLS_IND 0006 ctx__flags sflags sstate vix_index vif__hdr_pid __LINE__
+001d 006d COEX_MAC_UNMASK_BLE_BLACKOUTS 0004 mflags mps_state vix_bitmap __LINE__
+001d 006e COEX_MAC_UNMASK_PERIODIC_BLACKOUTS 0002 mflags __LINE__
+001d 006f COEX_MAC_UPDATE_PS_DELAY_TIMEOUT 0002 use_coex_timeout __LINE__
+001d 0070 COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT 0006 mflags type start_time duration puncturable bo_handle
+001d 0071 COEX_MAC_VIX_CONTROL 0005 mflags sflags inhibit vix_bm __LINE__
+001d 0072 COEX_MAC_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0073 COEX_MODEM_CC_ADJACENT_BAND 0003 cc_band channel_mask __LINE__
+001d 0074 COEX_MODEM_CC_BAND 0006 ca_order cc_band cc_ul_active cc_offset cc_bandwidth __LINE__
+001d 0075 COEX_MODEM_CC_HARMONIC 0005 cc_band low_freq high_freq channel_mask __LINE__
+001d 0076 COEX_MODEM_CDMA_CC_BAND 0006 order cc_band cc_ul_active cc_offset cc_bandwidth __LINE__
+001d 0077 COEX_MODEM_CDMA_CC_HARMONIC 0005 cc_band low_freq high_freq channel_mask __LINE__
+001d 0078 COEX_MODEM_CHECK_DRIFT 0006 modflags d0 d1 d2 driftavg update
+001d 0079 COEX_MODEM_CON_PRIORITY 0006 last_pri_sfn current_sfn current_sfn_start inhibit_sfn_start inhibit_time mask
+001d 007a COEX_MODEM_DEINIT 0001 __LINE__
+001d 007b COEX_MODEM_DEINIT_TIMER 0002 modflags __LINE__
+001d 007c COEX_MODEM_DESTROY_TDD_BLACKOUT 0001 handle
+001d 007d COEX_MODEM_DRX 0006 modflags drx_start_sfn drx_wake_subf drx_start drx_inactivity_duration wlan_bo_time
+001d 007e COEX_MODEM_DRX_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 007f COEX_MODEM_FRAME_SYNC 0005 modflags irq_time time_us subframe sfn
+001d 0080 COEX_MODEM_FRAME_SYNC_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 0081 COEX_MODEM_IM_ENTER 0002 modflags __LINE__
+001d 0082 COEX_MODEM_IM_EXIT 0002 modflags __LINE__
+001d 0083 COEX_MODEM_INIT 0002 modflags __LINE__
+001d 0084 COEX_MODEM_INIT_TIMER 0002 modflags __LINE__
+001d 0085 COEX_MODEM_INSTALL_TDD_BLACKOUT 0008 frame_start_time bo_start_time period duration lte_config lte_special handle usbpo_flags
+001d 0086 COEX_MODEM_MIB_INIT 000b modflags pb_thresh_low pb_thresh_high rsrp_alpha pb_chan_mask b40c1 b40c2 b41c1 b41c2 b7c1 b7c2
+001d 0087 COEX_MODEM_RX_LEVEL 0009 modflags rx_cc mws_rsrp mws_max_rx_freq mws_rx_bw rsrp_avg pb_thresh_lo pb_thresh_hi __LINE__
+001d 0088 COEX_MODEM_RX_LEVEL_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 0089 COEX_MODEM_RX_SIGNAL 0007 modflags enable rx_cc freq_thresh rsrp_thresh pb_channel_mask __LINE__
+001d 008a COEX_MODEM_STATE 0003 state modflags __LINE__
+001d 008b COEX_MODEM_STATUS 0006 modflags channel_mask lte_active lte_ca_order cdma_ca_order __LINE__
+001d 008c COEX_MODEM_STATUS_ENTRY 0004 message_okay modem_active api_version __LINE__
+001d 008d COEX_MODEM_STATUS_TDD_INFO 0006 tdd_frame_type special_subframe_type dl_cyclic_prefix_ext ul_cyclic_prefix_ext timing_advance tdd_rx_active
+001d 008e COEX_MODEM_STATUS_TDD_RESET 0000
+001d 008f COEX_MODEM_TEST_INTERFERER_INSTALL 0003 start_time period duration
+001d 0090 COEX_MODEM_TEST_INTERFERER_STOP 0000
+001d 0091 COEX_MODEM_TEST_RX_START 0000
+001d 0092 COEX_MODEM_TEST_RX_STOP 0000
+001d 0093 COEX_MODEM_UPDATE_CHANNEL_MASK 0006 modflags channel_mask lte_active lte_ca_order cdma_ca_order __LINE__
+001d 0094 COEX_MODEM_WLAN_CONNECT 0002 modflags connecting
+001d 0095 COEX_PROT_DEINIT 0001 __LINE__
+001d 0096 COEX_PROT_INIT 0001 __LINE__
+001d 0097 COEX_PROT_PROTECT_START 0004 prot_act active_prot delay_ron __LINE__
+001d 0098 COEX_PROT_PROTECT_STOP 0004 prot_act elapsed active_prot prot_state
+001d 0099 COEX_PROT_PROTECT_STOP_UNEXPECTED 0002 prot_act __LINE__
+001d 009a COEX_PROT_PROTECT_SUMMARY 0006 prot_act act_pri rx_max_pri mflags current_acts timeout
+001d 009b COEX_PROT_PROTECT_TIMEOUT_FIRED 0003 prot_act start_act __LINE__
+001d 009c COEX_PROT_PROTECT_TIMEOUT_SET 0005 start_act prot_act time duration __LINE__
+001d 009d COEX_RAME_ABSENCE 0008 idx flags type period start duration max __LINE__
+001d 009e COEX_RAME_ASSOCIATE_MAC_INSTANCE 0008 vif_bm mac_instance mvif_bm v1_vix v1_mac v2_vix v2_mac __LINE__
+001d 009f COEX_RAME_BT_LO_ACCESS_REQ 0003 mflags duration deadline
+001d 00a0 COEX_RAME_CONNECTION_PROT_START 0006 vix prot_duration cflags mflags connflags __LINE__
+001d 00a1 COEX_RAME_CONNECTION_PROT_STOP 0004 cflags mflags connflags __LINE__
+001d 00a2 COEX_RAME_EVENT 0007 vix event cflags mflags connflags args __LINE__
+001d 00a3 COEX_RAME_IML_ENTER 0004 cflags mflags connflags __LINE__
+001d 00a4 COEX_RAME_IML_EXIT 0004 cflags mflags connflags __LINE__
+001d 00a5 COEX_RAME_IMM_ENTER 0004 cflags mflags connflags __LINE__
+001d 00a6 COEX_RAME_IMM_EXIT 0004 cflags mflags connflags __LINE__
+001d 00a7 COEX_RAME_PROTECT 0005 vix prot_act protect start_time __LINE__
+001d 00a8 COEX_RAME_RADIO_CHANGED 0009 mac_id freq radio_bm macs_2g macs_5g active_prot cflags mflags __LINE__
+001d 00a9 COEX_RAME_SCAN_VIF_CHANGED 0004 mflags schedulable interface __LINE__
+001d 00aa COEX_RAME_SET_VIF_TIMING 0008 mflags vix vtflags vif_attributes period_us high_start_time_us high_duration_us __LINE__
+001d 00ab COEX_RAME_SET_WLAN_PRIORIY_LEVEL 0003 mflags level __LINE__
+001d 00ac COEX_RAME_VIF_ABSENCE 0006 vix vtflags period start duration __LINE__
+001d 00ad COEX_RAME_VIF_ABSENCE_CHANGED 0004 mflags vix absence_added __LINE__
+001d 00ae COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO 0003 mflags vix __LINE__
+001d 00af COEX_RAME_VIF_CHANGED 0009 mflags vix schedulable vif_type p2p vif_5G vif_2g4_bm mvif_bitmap __LINE__
+001d 00b0 COEX_RAME_VIF_CHANGED_END 0008 mflags vix schedulable vif_type vif_5G vif_2g4_bm vif_2g4_go_bm __LINE__
+001d 00b1 COEX_RAME_VIF_CHANGED_MULTI_VIF 0005 mflags mvif_bitmap vif_2g4_bm vif_2g4_go_bm __LINE__
+001d 00b2 COEX_RAME_VIF_CHANNEL 0005 mflags vix chan_freq_mhz bandwidth_mhz __LINE__
+001d 00b3 COEX_RAME_VIF_PRESENCE 0007 vix vtflags start duration high_start_time_us presence __LINE__
+001d 00b4 COEX_RAME_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 00b5 COEX_REQ_FLEXIMAC_SIMRX 0004 flags mac simrx_disabled __LINE__
+001d 00b6 COEX_SET_POWER_BACKOFF 0003 channel_mask power_reduction __LINE__
+001d 00b7 COEX_SET_TIME_DOMAIN_DEBUG 0002 mode __LINE__
+001d 00b8 COEX_SMEM_A2DP_PRESENT 0002 a2dp_present __LINE__
+001d 00b9 COEX_SMEM_ASYNC_EVENT 0004 type start_time duration __LINE__
+001d 00ba COEX_SMEM_BT_ASYNC_EARLY_START 0001 __LINE__
+001d 00bb COEX_SMEM_BT_ASYNC_RELINQUISH 0001 __LINE__
+001d 00bc COEX_SMEM_BT_ASYNC_REVOKE 0001 __LINE__
+001d 00bd COEX_SMEM_BT_LO_ACCESS 0001 deadline
+001d 00be COEX_SMEM_BT_OFF 0001 __LINE__
+001d 00bf COEX_SMEM_BT_ON 0001 __LINE__
+001d 00c0 COEX_SMEM_CHANNEL_MAP 0005 bandwidth_Mhz chan_freq_MHz low high __LINE__
+001d 00c1 COEX_SMEM_CHANNEL_MAP_CLEAR 0002 bt_channel __LINE__
+001d 00c2 COEX_SMEM_CHANNEL_MAP_HI_SET 0002 bt_channel __LINE__
+001d 00c3 COEX_SMEM_CHANNEL_MAP_LO_SET 0002 bt_channel __LINE__
+001d 00c4 COEX_SMEM_DEINIT 0001 __LINE__
+001d 00c5 COEX_SMEM_INIT 0001 __LINE__
+001d 00c6 COEX_SMEM_INIT_BT_API 0001 __LINE__
+001d 00c7 COEX_SMEM_PERIODIC_EVENT 0006 idx type start_time period duration __LINE__
+001d 00c8 COEX_SMEM_STATE 0002 state __LINE__
+001d 00c9 COEX_SMEM_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 00ca COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE 0004 smemflags allowed last_val __LINE__
+001d 00cb COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME 0002 completion_time __LINE__
+001d 00cc COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS 0003 min_ms maxs_ms __LINE__
+001d 00cd COEX_SMEM_WRITE_CHANNEL_MAP 0006 map_0 map_1 map_2 map_3 map_4 __LINE__
+001d 00ce COEX_SMEM_WRITE_CHANNEL_MAP_LO_HI 0006 map_lo_hi_0 map_lo_hi_1 map_lo_hi_2 map_lo_hi_3 map_lo_hi_4 __LINE__
+001d 00cf COEX_SMEM_WRITE_VIF1_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d0 COEX_SMEM_WRITE_VIF2_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d1 COEX_SMEM_WRITE_VIF3_TIMING 0005 start period duration vif_attribute __LINE__
+001d 00d2 COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL 0003 smemflags priority __LINE__
+001d 00d3 COEX_STRAT_A2DP_PRESENT 0003 sflags a2dp_present __LINE__
+001d 00d4 COEX_STRAT_ADD_BLACKOUT_PERIODIC 0007 index type start duration periodic allow_p __LINE__
+001d 00d5 COEX_STRAT_ADD_BLACKOUT_SINGLESHOT 0007 index start duration est allow_p allow_ka __LINE__
+001d 00d6 COEX_STRAT_ADD_SINGLESHOT_RESTRICTION 0003 start duration __LINE__
+001d 00d7 COEX_STRAT_ALLOW_TDLS_CONTROL 0002 sflags __LINE__
+001d 00d8 COEX_STRAT_ASYNC 0006 sstate ss_time smemflags modflags eol __LINE__
+001d 00d9 COEX_STRAT_ASYNC_CONTINUOUS 0002 sstate __LINE__
+001d 00da COEX_STRAT_ASYNC_EVENT_NONE 0003 sflags sstate __LINE__
+001d 00db COEX_STRAT_ASYNC_EXTENDED 0002 orig_start extended_dur
+001d 00dc COEX_STRAT_ASYNC_HANDLER_END 0008 last_event_type sflags sstate mflags blackout_start blackout_duration next_alarm __LINE__
+001d 00dd COEX_STRAT_ASYNC_HANDLER_START 0008 event_type start_time duration est sflags sstate sstime __LINE__
+001d 00de COEX_STRAT_ASYNC_IMMEDIATE 0003 sstate next_wlan __LINE__
+001d 00df COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START 0002 sflags __LINE__
+001d 00e0 COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK 0003 sflags legal __LINE__
+001d 00e1 COEX_STRAT_ASYNC_REVOKE 0003 sflags legal __LINE__
+001d 00e2 COEX_STRAT_DEINIT 0001 __LINE__
+001d 00e3 COEX_STRAT_DEINIT_TIMER 0002 sflags __LINE__
+001d 00e4 COEX_STRAT_DELETE_BLACKOUT_PERIODIC 0002 index __LINE__
+001d 00e5 COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT 0003 index type __LINE__
+001d 00e6 COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION 0002 type __LINE__
+001d 00e7 COEX_STRAT_ILLEGAL_ASYNC_REQUEST 0003 now new_start old_start
+001d 00e8 COEX_STRAT_IM_ENTER 0003 sflags sstate __LINE__
+001d 00e9 COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL 0002 sflags __LINE__
+001d 00ea COEX_STRAT_INIT 0002 sflags __LINE__
+001d 00eb COEX_STRAT_INIT_TIMER 0002 sflags __LINE__
+001d 00ec COEX_STRAT_RADIO_OFF_HANDLER_END 0002 sstate __LINE__
+001d 00ed COEX_STRAT_RADIO_OFF_HANDLER_START 0005 cflags sflags sstate last_freq __LINE__
+001d 00ee COEX_STRAT_RADIO_ON_HANDLER_END 0001 __LINE__
+001d 00ef COEX_STRAT_RADIO_ON_HANDLER_START 0006 cflags freq sflags sstate est __LINE__
+001d 00f0 COEX_STRAT_SERVICE 0002 state __LINE__
+001d 00f1 COEX_STRAT_SS_HALDER_END 0004 sflags sstate itimer_ss_event __LINE__
+001d 00f2 COEX_STRAT_SS_HANDLER_BT_OPP_REACHED 0003 sstate itimer_ss_event __LINE__
+001d 00f3 COEX_STRAT_SS_HANDLER_EARLY 0005 cflags sflags sstate sstate_event __LINE__
+001d 00f4 COEX_STRAT_SS_HANDLER_EST_REACHED 0005 sstate ss_event event_start_time event_duration __LINE__
+001d 00f5 COEX_STRAT_SS_HANDLER_START 0005 cflags sflags sstate freq __LINE__
+001d 00f6 COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED 0003 sstate itimer_ss_event __LINE__
+001d 00f7 COEX_STRAT_TDLS_CONTROL_CAUSE 0002 idx __LINE__
+001d 00f8 COEX_STRAT_UPDATE_TDLS_CONTROL 0002 sflags __LINE__
+001d 00f9 COEX_STRAT_VIF_CLEAR_TIMEOUT_JUMP_AWAY 0001 __LINE__
+001d 00fa COEX_STRAT_VIF_CLEAR_TIMEOUT_OUTSIDE 0001 __LINE__
+001d 00fb COEX_STRAT_VIF_CLEAR_TIMEOUT_SET 0003 sflags mct __LINE__
+001d 00fc COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_AWAY 0001 __LINE__
+001d 00fd COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_IN 0001 __LINE__
+001d 00fe COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED 0002 mct __LINE__
+001d 00ff COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF 0006 r2s mct limit start stop __LINE__
+001d 0100 COEX_STRAT_WARNING 0006 reason p1 p2 p3 p4 __LINE__
+001d 0101 COEX_TASK_DEINIT 0001 __LINE__
+001d 0102 COEX_TASK_EVENT 0003 pending raw __LINE__
+001d 0103 COEX_TASK_INIT 0001 __LINE__
+001d 0104 COEX_TIMER_DEINIT 0002 cflags __LINE__
+001d 0105 COEX_TIMER_EVENT 0002 alarm __LINE__
+001d 0106 COEX_TIMER_INIT 0002 cflags __LINE__
+001d 0107 COEX_VIF_TIMING_ABSENCE 0008 vix result vtflags vif_period noa_period start duration __LINE__
+001d 0108 COEX_VIF_TIMING_CHECK_DRIFT 0006 start_time start_time_last drift_us dur_change_us update __LINE__
+001d 0109 COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING 0002 mflags __LINE__
+001d 010a COEX_VIF_TIMING_CLEAR_VIF_TIMING 0004 mflags vix vif_timing_index __LINE__
+001d 010b COEX_VIF_TIMING_DEL_VIF_TYPE 0004 mflags coex_vif_type mvif_bitmap __LINE__
+001d 010c COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING 0007 vif_timing_index_curr vif_timing_index_next mvif_bitmap period_us high_start_time_us high_duration_100us __LINE__
+001d 010d COEX_VIF_TIMING_INIT 0001 __LINE__
+001d 010e COEX_VIF_TIMING_MAP_ADD 0004 mflags vix free_timing_idx __LINE__
+001d 010f COEX_VIF_TIMING_MAP_FREE 0003 mflags vix __LINE__
+001d 0110 COEX_VIF_TIMING_MAP_RESET 0004 mflags vix free_timing_idx __LINE__
+001d 0111 COEX_VIF_TIMING_PHASE_DIFF 0005 vif_start noa_end period offset __LINE__
+001d 0112 COEX_VIF_TIMING_SET_NOA_DURATION 0005 mflags sflags noa_duration noa_last __LINE__
+001d 0113 COEX_VIF_TIMING_SET_VIF_TYPE 0006 mflags vif_timing_idx vif_attributes coex_vif_type mvif_bitmap __LINE__
+001d 0114 COEX_VIF_TIMING_UPDATE 0005 mvif_bitmap multiband mac_vif0 mac_vif1 __LINE__
+001d 0115 COEX_VIF_TIMING_UPDATE_PRESENCE 0007 p2p_flags noa_start noa_period noa_duration presence_start presence_duration __LINE__
+001d 0116 COEX_VIF_TIMING_WRITE_VIF_TIMING 0005 vif_timing_index period start_time duration __LINE__
+001d 0117 TRANSACTION_ORIDE_T 0001 mac_instance
+# Generated From coex/coex_debug.xml
+trace_types 814
+COEX_MAC_MPS_ELEMENT.period Natural32
+COEX_MAC_MPS_ELEMENT.duration Natural32
+COEX_MAC_MPS_ELEMENT.total Natural32
+COEX_MAC_MPS_ELEMENT.__LINE__ __LINE__
+COEX_PROT_PROTECT_TIMEOUT_FIRED.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_FIRED.start_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_FIRED.__LINE__ __LINE__
+COEX_RAME_IML_ENTER.cflags COEX_FLAGS_T
+COEX_RAME_IML_ENTER.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IML_ENTER.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IML_ENTER.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP_LO_SET.__LINE__ __LINE__
+COEX_STRAT_ALLOW_TDLS_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ALLOW_TDLS_CONTROL.__LINE__ __LINE__
+COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_RELINQUISH_BT_EARLY_START.__LINE__ __LINE__
+COEX_FLEXIMAC_FLUSH.head Natural32
+COEX_FLEXIMAC_FLUSH.missed Natural32
+COEX_FLEXIMAC_FLUSH.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_OVERRIDE.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_OVERRIDE.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_REQ_OVERRIDE.__LINE__ __LINE__
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.smemflags COEX_SMEM_FLAGS_T
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.priority CME_WLAN_PRIORITY_LEVEL_T
+COEX_SMEM_WRITE_WLAN_PRIORITY_LEVEL.__LINE__ __LINE__
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.bo_handle Natural32
+COEX_MAC_PAUSE_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.min_ms Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.maxs_ms Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_LIMITS.__LINE__ __LINE__
+COEX_VIF_TIMING_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_SIM_RX_ALERT.update_time Natural32
+COEX_FLEXIMAC_SIM_RX_ALERT.simrx_disabled Boolean
+COEX_FLEXIMAC_SIM_RX_ALERT.__LINE__ __LINE__
+COEX_SMEM_BT_ON.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_TRANS_ALERT.time_us Natural32
+COEX_FLEXIMAC_TRANS_ALERT.seq_num Natural32
+COEX_FLEXIMAC_TRANS_ALERT.result FMPD_COEX_RESULT_T
+COEX_FLEXIMAC_TRANS_ALERT.__LINE__ __LINE__
+COEX_STRAT_ASYNC_CONTINUOUS.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_CONTINUOUS.__LINE__ __LINE__
+COEX_RAME_IMM_ENTER.cflags COEX_FLAGS_T
+COEX_RAME_IMM_ENTER.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IMM_ENTER.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IMM_ENTER.__LINE__ __LINE__
+COEX_RAME_VIF_PRESENCE.vix vix
+COEX_RAME_VIF_PRESENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_RAME_VIF_PRESENCE.start Natural32
+COEX_RAME_VIF_PRESENCE.duration Natural32
+COEX_RAME_VIF_PRESENCE.high_start_time_us Natural32
+COEX_RAME_VIF_PRESENCE.presence Boolean
+COEX_RAME_VIF_PRESENCE.__LINE__ __LINE__
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.smemflags COEX_SMEM_FLAGS_T
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.allowed Boolean
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.last_val Boolean
+COEX_SMEM_WRITE_A2DP_PUNCTURE_MODE.__LINE__ __LINE__
+COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_DELETE_BLACKOUT_SINGLESHOT.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_FREE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_FREE.vix vix
+COEX_VIF_TIMING_MAP_FREE.__LINE__ __LINE__
+COEX_MAC_WARNING.reason WARNING_REASON
+COEX_MAC_WARNING.__LINE__ __LINE__
+COEX_HWM_COEX_BB_CFG.COEX_BB_CFG_EN COEX_BB_CFG_T
+COEX_HWM_COEX_BB_CFG.__LINE__ __LINE__
+COEX_FLEXIMAC_ARBITRATION_LEVEL.current Boolean
+COEX_FLEXIMAC_ARBITRATION_LEVEL.required Boolean
+COEX_FLEXIMAC_ARBITRATION_LEVEL.__LINE__ __LINE__
+COEX_SMEM_WRITE_CHANNEL_MAP_LO_HI.__LINE__ __LINE__
+COEX_MODEM_CC_ADJACENT_BAND.channel_mask Natural64
+COEX_MODEM_CC_ADJACENT_BAND.__LINE__ __LINE__
+COEX_CTL_STROBE.__LINE__ __LINE__
+COEX_MODEM_IM_ENTER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_IM_ENTER.__LINE__ __LINE__
+COEX_SMEM_BT_ASYNC_RELINQUISH.__LINE__ __LINE__
+COEX_HWM_DEINIT.__LINE__ __LINE__
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_DELETE_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_FLEXIMAC_START_ALERT.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_START_ALERT.time_us Natural32
+COEX_FLEXIMAC_START_ALERT.band FMPD_COEX_BAND_T
+COEX_FLEXIMAC_START_ALERT.antenna_bitmask Natural8
+COEX_FLEXIMAC_START_ALERT.__LINE__ __LINE__
+COEX_MODEM_CC_HARMONIC.channel_mask Natural64
+COEX_MODEM_CC_HARMONIC.__LINE__ __LINE__
+COEX_MODEM_DESTROY_TDD_BLACKOUT.handle Natural32
+COEX_STRAT_ASYNC.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC.ss_time Natural32
+COEX_STRAT_ASYNC.smemflags COEX_SMEM_FLAGS_T
+COEX_STRAT_ASYNC.modflags COEX_MODEM_FLAGS
+COEX_STRAT_ASYNC.eol Natural32
+COEX_STRAT_ASYNC.__LINE__ __LINE__
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.update_time Natural32
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.spectral_checking_enabled Boolean
+COEX_FLEXIMAC_SPECTRAL_CHECKING_ALERT.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_RING.head Natural32
+COEX_FLEXIMAC_RING_RING.tail Natural32
+COEX_FLEXIMAC_RING_RING.__LINE__ __LINE__
+COEX_SMEM_PERIODIC_EVENT.type CME_BT_PERIODIC_TYPE
+COEX_SMEM_PERIODIC_EVENT.start_time Natural32
+COEX_SMEM_PERIODIC_EVENT.period Natural32
+COEX_SMEM_PERIODIC_EVENT.duration Natural32
+COEX_SMEM_PERIODIC_EVENT.__LINE__ __LINE__
+COEX_HWM_SET_SIMRX_ERROR.res FMPD_COEX_RESULT_T
+COEX_HWM_SET_SIMRX_ERROR.simrx_enabled Boolean
+COEX_STRAT_RADIO_ON_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_RADIO_ON_HANDLER_START.freq COEX_INTERFACE
+COEX_STRAT_RADIO_ON_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_RADIO_ON_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_ON_HANDLER_START.est Natural32
+COEX_STRAT_RADIO_ON_HANDLER_START.__LINE__ __LINE__
+COEX_MAC_ADD_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_ADD_PERIODIC_BLACKOUT.start_time Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.duration Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.period Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT.puncturable Boolean
+COEX_MAC_ADD_PERIODIC_BLACKOUT.vif_bm VIX_BM_T
+COEX_STRAT_ASYNC_EXTENDED.orig_start Natural32
+COEX_STRAT_ASYNC_EXTENDED.extended_dur Integer32
+COEX_SMEM_BT_ASYNC_REVOKE.__LINE__ __LINE__
+COEX_RAME_IMM_EXIT.cflags COEX_FLAGS_T
+COEX_RAME_IMM_EXIT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IMM_EXIT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IMM_EXIT.__LINE__ __LINE__
+COEX_MODEM_FRAME_SYNC.modflags COEX_MODEM_FLAGS
+COEX_MODEM_FRAME_SYNC.irq_time Natural32
+COEX_RAME_CONNECTION_PROT_STOP.cflags COEX_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.mflags COEX_MAC_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_CONNECTION_PROT_STOP.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP_CLEAR.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.itimer_ss_event Natural32
+COEX_STRAT_SS_HANDLER_WLAN_OPP_REACHED.__LINE__ __LINE__
+COEX_FLEXIMAC_OVERRIDE_ALERT.update_time Natural32
+COEX_FLEXIMAC_OVERRIDE_ALERT.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_OVERRIDE_ALERT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.wl_sw_astx_update Boolean
+COEX_HWM_COEX_BB_WL_SW_ASTX_UPDATE.__LINE__ __LINE__
+COEX_MAC_UNMASK_PERIODIC_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UNMASK_PERIODIC_BLACKOUTS.__LINE__ __LINE__
+COEX_PROT_INIT.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.vix vix
+COEX_RAME_VIF_ABSENCE_CHANGED_NON_GO.__LINE__ __LINE__
+COEX_VIF_TIMING_SET_VIF_TYPE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_SET_VIF_TYPE.vif_attributes COEX_VIF_ATTRIBUTES_T
+COEX_VIF_TIMING_SET_VIF_TYPE.coex_vif_type COEX_VIF_TYPES_T
+COEX_VIF_TIMING_SET_VIF_TYPE.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_OUTSIDE.__LINE__ __LINE__
+COEX_MODEM_CDMA_CC_HARMONIC.channel_mask Natural64
+COEX_MODEM_CDMA_CC_HARMONIC.__LINE__ __LINE__
+COEX_RAME_RADIO_CHANGED.freq INTERFACE
+COEX_RAME_RADIO_CHANGED.cflags COEX_FLAGS_T
+COEX_RAME_RADIO_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_RADIO_CHANGED.__LINE__ __LINE__
+COEX_PROT_PROTECT_TIMEOUT_SET.start_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_SET.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_TIMEOUT_SET.time Natural32
+COEX_PROT_PROTECT_TIMEOUT_SET.duration Natural32
+COEX_PROT_PROTECT_TIMEOUT_SET.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_BG.isr Natural32
+COEX_FLEXIMAC_RING_BG.head Natural32
+COEX_FLEXIMAC_RING_BG.tail Natural32
+COEX_FLEXIMAC_RING_BG.missed Natural32
+COEX_FLEXIMAC_RING_BG.__LINE__ __LINE__
+COEX_HWM_COEX_WL_DEBUG.mac_instance Natural32
+COEX_HWM_COEX_WL_DEBUG.wl_debug_sel COEX_WL_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_mac_if_debug_sel COEX_WL_MAC_IF_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_cdl_debug_sel COEX_WL_CDL_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.wl_sw_if_debug_sel COEX_WL_SW_IF_DEBUG_SEL_T
+COEX_HWM_COEX_WL_DEBUG.__LINE__ __LINE__
+COEX_MAC_INIT.__LINE__ __LINE__
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.created Boolean
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.handle Natural32
+COEX_MAC_ADD_PERIODIC_BLACKOUT_END.__LINE__ __LINE__
+COEX_STRAT_RADIO_OFF_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_RADIO_OFF_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_RADIO_OFF_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_OFF_HANDLER_START.last_freq COEX_INTERFACE
+COEX_STRAT_RADIO_OFF_HANDLER_START.__LINE__ __LINE__
+COEX_MAC_MPS_ENABLE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_ENABLE.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_ENABLE.__LINE__ __LINE__
+COEX_RAME_SCAN_VIF_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SCAN_VIF_CHANGED.schedulable Boolean
+COEX_RAME_SCAN_VIF_CHANGED.interface INTERFACE
+COEX_RAME_SCAN_VIF_CHANGED.__LINE__ __LINE__
+COEX_HWM_COEX_CLKGEN_CFG.COEX_BB_CLKGEN_CFG COEX_BB_CLKGEN_CFG_T
+COEX_HWM_COEX_CLKGEN_CFG.__LINE__ __LINE__
+COEX_MAC_SET_CLEAR_TIMEOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_SET_CLEAR_TIMEOUT.active_2g4_vifs VIX_BM_T
+COEX_MAC_SET_CLEAR_TIMEOUT.restore Boolean
+COEX_MAC_SET_CLEAR_TIMEOUT.duration Natural32
+COEX_MAC_SET_CLEAR_TIMEOUT.__LINE__ __LINE__
+COEX_HWM_COEX_WL_DEFER.mac_instance Natural32
+COEX_HWM_COEX_WL_DEFER.__LINE__ __LINE__
+COEX_RAME_WARNING.reason WARNING_REASON
+COEX_RAME_WARNING.__LINE__ __LINE__
+COEX_SMEM_BT_ASYNC_EARLY_START.__LINE__ __LINE__
+COEX_HWM_COEX_BB_ALLOWED_ORIDE.COEX_BB_ALLOWED_ORIDE COEX_BB_ALLOWED_ORIDE_T
+COEX_HWM_COEX_BB_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_FLEXIMAC_INIT.__LINE__ __LINE__
+COEX_FLEXIMAC_DPLP_OFF.__LINE__ __LINE__
+COEX_TIMER_EVENT.alarm COEX_TIMER_T
+COEX_TIMER_EVENT.__LINE__ __LINE__
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.period_us Natural32
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.high_start_time_us Natural32
+COEX_VIF_TIMING_DUALBAND_MULTI_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_BT_LO_ACCESS_REQ.mflags COEX_MAC_FLAGS_T
+COEX_RAME_BT_LO_ACCESS_REQ.duration Natural32
+COEX_RAME_BT_LO_ACCESS_REQ.deadline Natural32
+COEX_MODEM_CHECK_DRIFT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_CHECK_DRIFT.d0 Integer32
+COEX_MODEM_CHECK_DRIFT.d1 Integer32
+COEX_MODEM_CHECK_DRIFT.d2 Integer32
+COEX_MODEM_CHECK_DRIFT.driftavg Integer32
+COEX_MODEM_CHECK_DRIFT.update Boolean
+COEX_STRAT_A2DP_PRESENT.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_A2DP_PRESENT.a2dp_present Boolean
+COEX_STRAT_A2DP_PRESENT.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF2_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF2_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF2_TIMING.__LINE__ __LINE__
+COEX_MAC_SET_MIN_TX_RATE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_SET_MIN_TX_RATE.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_AWAY.__LINE__ __LINE__
+COEX_MODEM_UPDATE_CHANNEL_MASK.modflags COEX_MODEM_FLAGS
+COEX_MODEM_UPDATE_CHANNEL_MASK.channel_mask Natural64
+COEX_MODEM_UPDATE_CHANNEL_MASK.lte_active Boolean
+COEX_MODEM_UPDATE_CHANNEL_MASK.__LINE__ __LINE__
+COEX_RAME_SET_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SET_VIF_TIMING.vix vix
+COEX_RAME_SET_VIF_TIMING.vtflags COEX_MAC_VIF_TIMING_FLAGS_T
+COEX_RAME_SET_VIF_TIMING.vif_attributes COEX_VIF_ATTRIBUTES_T
+COEX_RAME_SET_VIF_TIMING.period_us Natural32
+COEX_RAME_SET_VIF_TIMING.high_start_time_us Natural32
+COEX_RAME_SET_VIF_TIMING.high_duration_us Natural32
+COEX_RAME_SET_VIF_TIMING.__LINE__ __LINE__
+COEX_HWM_COEX_CDL_CFG.wl_abort_cfg ABORT_CFG_T
+COEX_HWM_COEX_CDL_CFG.bt_abort_cfg ABORT_CFG_T
+COEX_VIF_TIMING_WRITE_VIF_TIMING.period Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.start_time Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.duration Natural32
+COEX_VIF_TIMING_WRITE_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_PROTECT.vix vix
+COEX_RAME_PROTECT.prot_act COEX_PROTECT_ACT_T
+COEX_RAME_PROTECT.protect COEX_PROTECT_STATE
+COEX_RAME_PROTECT.start_time Natural32
+COEX_RAME_PROTECT.__LINE__ __LINE__
+COEX_MODEM_INSTALL_TDD_BLACKOUT.frame_start_time Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.bo_start_time Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.handle Natural32
+COEX_MODEM_INSTALL_TDD_BLACKOUT.usbpo_flags RAMEDATA_USPBO_CONFIG_FLAGS
+COEX_STRAT_VIF_CLEAR_TIMEOUT_JUMP_AWAY.__LINE__ __LINE__
+COEX_MAC_UPDATE_PS_DELAY_TIMEOUT.use_coex_timeout Boolean
+COEX_MAC_UPDATE_PS_DELAY_TIMEOUT.__LINE__ __LINE__
+COEX_SMEM_ASYNC_EVENT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_SMEM_ASYNC_EVENT.start_time Natural32
+COEX_SMEM_ASYNC_EVENT.duration Natural32
+COEX_SMEM_ASYNC_EVENT.__LINE__ __LINE__
+COEX_MODEM_CDMA_CC_BAND.__LINE__ __LINE__
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.update_time Natural32
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.update_allowed Natural32
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.reason CAR_REASON
+COEX_FLEXIMAC_MACPP_ALLOWED_ALERT.__LINE__ __LINE__
+COEX_MODEM_STATE.state COEX_MACRAME_EVENT_T
+COEX_MODEM_STATE.modflags COEX_MODEM_FLAGS
+COEX_MODEM_STATE.__LINE__ __LINE__
+COEX_MODEM_RX_LEVEL.modflags COEX_MODEM_FLAGS
+COEX_MODEM_RX_LEVEL.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED_END.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED_END.vix vix
+COEX_RAME_VIF_CHANGED_END.schedulable Boolean
+COEX_RAME_VIF_CHANGED_END.vif_type VIF_TYPE
+COEX_RAME_VIF_CHANGED_END.vif_5G Boolean
+COEX_RAME_VIF_CHANGED_END.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_END.vif_2g4_go_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_END.__LINE__ __LINE__
+COEX_HWM_SET_RX_TX_ACK_PRI.mac_instance Natural32
+COEX_HWM_SET_RX_TX_ACK_PRI.__LINE__ __LINE__
+COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION.type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_DELETE_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_INSTALL_MAC_BLACKOUT.start_time Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.duration Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.period Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.puncturable Boolean
+COEX_MAC_INSTALL_MAC_BLACKOUT.KA_mode BLACKOUT_KA_MODE_T
+COEX_MAC_INSTALL_MAC_BLACKOUT.bo_handle Natural32
+COEX_MAC_INSTALL_MAC_BLACKOUT.vif_bm VIX_BM_T
+COEX_FLEXIMAC_FLUSH_ELEMENT.tail Natural32
+COEX_FLEXIMAC_FLUSH_ELEMENT.__LINE__ __LINE__
+COEX_HWM_COEX_BT_WL_CDL_CFG.mac_instance Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.bt_tx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.bt_rx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.wl_tx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.wl_rx_col Natural32
+COEX_HWM_COEX_BT_WL_CDL_CFG.__LINE__ __LINE__
+CME_BT_TRANSACTION_REQ.seqNum Natural32
+CME_BT_TRANSACTION_REQ.start Natural32
+CME_BT_TRANSACTION_REQ.end Natural32
+COEX_SMEM_DEINIT.__LINE__ __LINE__
+COEX_TASK_DEINIT.__LINE__ __LINE__
+COEX_TIMER_DEINIT.cflags COEX_FLAGS_T
+COEX_TIMER_DEINIT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.wl_sw_asrx_start_time Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_START_TIME.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.itimer_ss_event Natural32
+COEX_STRAT_SS_HANDLER_BT_OPP_REACHED.__LINE__ __LINE__
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.type CME_BT_PERIODIC_TYPE
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.start Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.duration Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.periodic Natural32
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.allow_p Boolean
+COEX_STRAT_ADD_BLACKOUT_PERIODIC.__LINE__ __LINE__
+COEX_FLEXIMAC_START_CONFIG_ALERT.arb_req Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.spectral Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.simrx Boolean
+COEX_FLEXIMAC_START_CONFIG_ALERT.override FMPD_COEX_OVERRIDE_ARBITRATION_T
+COEX_FLEXIMAC_START_CONFIG_ALERT.__LINE__ __LINE__
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.type CME_BT_PERIODIC_EVENT_TYPE
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.bo_handle Natural32
+COEX_MAC_RESUME_PERIODIC_BLACKOUT.__LINE__ __LINE__
+COEX_MAC_MPS_SUMMARY.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_SUMMARY.connflags COEX_MAC_CONN_FLAGS_T
+COEX_MAC_MPS_SUMMARY.total_duration Natural32
+COEX_MAC_MPS_SUMMARY.MPS_PERIODIC_DURATION_LIMIT Natural32
+COEX_MAC_MPS_SUMMARY.__LINE__ __LINE__
+COEX_RAME_ASSOCIATE_MAC_INSTANCE.vif_bm VIX_BM_T
+COEX_RAME_ASSOCIATE_MAC_INSTANCE.__LINE__ __LINE__
+COEX_HWM_COEX_BB_DEBUG.bb_debug_sel COEX_BB_DEBUG_SEL_T
+COEX_HWM_COEX_BB_DEBUG.bb_debug_if_sel COEX_BB_DEBUG_IF_SEL_T
+COEX_HWM_COEX_BB_DEBUG.bb_debug_cdl_sel COEX_BB_DEBUG_CDL_SEL_T
+COEX_SMEM_CHANNEL_MAP_HI_SET.__LINE__ __LINE__
+COEX_MAC_TDLS_IND.sflags COEX_STRAT_FLAGS_T
+COEX_MAC_TDLS_IND.sstate DEBUG_COEX_STRAT_STATE
+COEX_MAC_TDLS_IND.__LINE__ __LINE__
+COEX_MAC_MPS_TIMER_EVENT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_TIMER_EVENT.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_TIMER_EVENT.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF3_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF3_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF3_TIMING.__LINE__ __LINE__
+COEX_STRAT_DELETE_BLACKOUT_PERIODIC.__LINE__ __LINE__
+COEX_PROT_PROTECT_STOP.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_STOP.elapsed Natural32
+COEX_CTL_DEINIT.cflags COEX_FLAGS_T
+COEX_CTL_DEINIT.__LINE__ __LINE__
+COEX_MODEM_DEINIT_TIMER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_DEINIT_TIMER.__LINE__ __LINE__
+COEX_HWM_GET_RX_PRI.mac_instance Natural32
+COEX_HWM_GET_RX_PRI.__LINE__ __LINE__
+COEX_PROT_PROTECT_STOP_UNEXPECTED.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_STOP_UNEXPECTED.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_START.cflags COEX_FLAGS_T
+COEX_STRAT_SS_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_START.freq COEX_INTERFACE
+COEX_STRAT_SS_HANDLER_START.__LINE__ __LINE__
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.mflags COEX_MAC_FLAGS_T
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.level CME_WLAN_PRIORITY_LEVEL_T
+COEX_RAME_SET_WLAN_PRIORIY_LEVEL.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_SET.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED.vix vix
+COEX_RAME_VIF_CHANGED.schedulable Boolean
+COEX_RAME_VIF_CHANGED.vif_type VIF_TYPE
+COEX_RAME_VIF_CHANGED.p2p Boolean
+COEX_RAME_VIF_CHANGED.vif_5G Boolean
+COEX_RAME_VIF_CHANGED.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED.__LINE__ __LINE__
+COEX_FLEXIMAC_ARBITRATION_ALERT.update_time Natural32
+COEX_FLEXIMAC_ARBITRATION_ALERT.arb_required Boolean
+COEX_FLEXIMAC_ARBITRATION_ALERT.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_WLAN_LISTEN.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_WLAN_LISTEN.__LINE__ __LINE__
+COEX_VIF_TIMING_SET_NOA_DURATION.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_SET_NOA_DURATION.sflags COEX_STRAT_FLAGS_T
+COEX_VIF_TIMING_SET_NOA_DURATION.noa_duration Natural32
+COEX_VIF_TIMING_SET_NOA_DURATION.noa_last Natural32
+COEX_VIF_TIMING_SET_NOA_DURATION.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_STEP_IN.__LINE__ __LINE__
+COEX_STRAT_ASYNC_REVOKE.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_REVOKE.legal Boolean
+COEX_STRAT_ASYNC_REVOKE.__LINE__ __LINE__
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_INSTALL_KA_MPS_BLACKOUTS.__LINE__ __LINE__
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.start_time Natural32
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.duration Natural32
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.puncturable Boolean
+COEX_MAC_UPDATE_SINGLESHOT_BLACKOUT.bo_handle Natural32
+COEX_SMEM_INIT.__LINE__ __LINE__
+COEX_HWM_INIT.__LINE__ __LINE__
+COEX_MODEM_CC_BAND.__LINE__ __LINE__
+COEX_VIF_TIMING_DEL_VIF_TYPE.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_DEL_VIF_TYPE.coex_vif_type COEX_VIF_TYPES_T
+COEX_VIF_TIMING_DEL_VIF_TYPE.__LINE__ __LINE__
+COEX_MODEM_CON_PRIORITY.current_sfn_start Natural32
+COEX_MODEM_CON_PRIORITY.inhibit_sfn_start Natural32
+COEX_MODEM_CON_PRIORITY.inhibit_time Natural32
+COEX_HWM_COEX_WL_SW_ASRX.mac_instance Natural32
+COEX_HWM_COEX_WL_SW_ASRX.wl_sw_asrx_duration Natural32
+COEX_HWM_COEX_WL_SW_ASRX.wl_sw_asrx_5g Boolean
+COEX_HWM_COEX_WL_SW_ASRX.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_DEINIT.__LINE__ __LINE__
+COEX_MAC_ACL_CONTROL.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ACL_CONTROL.bt_active Boolean
+COEX_MAC_ACL_CONTROL.__LINE__ __LINE__
+COEX_MODEM_STATUS_ENTRY.message_okay Boolean
+COEX_MODEM_STATUS_ENTRY.modem_active Boolean
+COEX_MODEM_STATUS_ENTRY.__LINE__ __LINE__
+COEX_MODEM_RX_LEVEL_ENTRY.message_okay Boolean
+COEX_MODEM_RX_LEVEL_ENTRY.modem_active Boolean
+COEX_MODEM_RX_LEVEL_ENTRY.__LINE__ __LINE__
+COEX_MODEM_INIT_TIMER.modflags COEX_MODEM_FLAGS
+COEX_MODEM_INIT_TIMER.__LINE__ __LINE__
+COEX_SET_TIME_DOMAIN_DEBUG.__LINE__ __LINE__
+COEX_STRAT_SERVICE.state COEX_MACRAME_EVENT_T
+COEX_STRAT_SERVICE.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_ADD.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_ADD.vix vix
+COEX_VIF_TIMING_MAP_ADD.free_timing_idx Natural32
+COEX_VIF_TIMING_MAP_ADD.__LINE__ __LINE__
+COEX_MAC_MPS_PROTECTION_END.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_PROTECTION_END.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_PROTECTION_END.in_mps Boolean
+COEX_MAC_MPS_PROTECTION_END.mps_on_time Natural32
+COEX_MAC_MPS_PROTECTION_END.mps_off_time Natural32
+COEX_MAC_MPS_PROTECTION_END.__LINE__ __LINE__
+COEX_HWM_COEX_BT_WL_DEBUG.bt_wl_debug_sel COEX_BT_WL_DEBUG_SEL_T
+COEX_HWM_COEX_BT_WL_DEBUG.__LINE__ __LINE__
+COEX_RAME_VIF_CHANNEL.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANNEL.vix vix
+COEX_RAME_VIF_CHANNEL.chan_freq_mhz Natural32
+COEX_RAME_VIF_CHANNEL.bandwidth_mhz Natural32
+COEX_RAME_VIF_CHANNEL.__LINE__ __LINE__
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.start Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.duration Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.est Natural32
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.allow_p Boolean
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.allow_ka DEBUG_BLACKOUT_KA_MODE
+COEX_STRAT_ADD_BLACKOUT_SINGLESHOT.__LINE__ __LINE__
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.now Natural32
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.new_start Natural32
+COEX_STRAT_ILLEGAL_ASYNC_REQUEST.old_start Natural32
+COEX_STRAT_INIT_TIMER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INIT_TIMER.__LINE__ __LINE__
+COEX_HWM_COEX_BT_CFG.COEX_BT_CFG COEX_BT_CFG_T
+COEX_HWM_COEX_BT_CFG.__LINE__ __LINE__
+COEX_SMEM_CHANNEL_MAP.__LINE__ __LINE__
+COEX_PROT_DEINIT.__LINE__ __LINE__
+COEX_VIF_TIMING_MAP_RESET.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_MAP_RESET.vix vix
+COEX_VIF_TIMING_MAP_RESET.free_timing_idx Natural32
+COEX_VIF_TIMING_MAP_RESET.__LINE__ __LINE__
+COEX_SET_POWER_BACKOFF.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_BT_REACHED.__LINE__ __LINE__
+COEX_HWM_WL_CALIB_PROTECT_DISABLE_ERROR.res FMPD_COEX_RESULT_T
+COEX_API_WLAN_PRIV_SET_STATE.current_state DEBUG_CME_WLAN_STATE
+COEX_API_WLAN_PRIV_SET_STATE.new_state DEBUG_CME_WLAN_STATE
+COEX_API_WLAN_PRIV_SET_STATE.__LINE__ __LINE__
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.start Natural32
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.duration Natural32
+COEX_STRAT_ADD_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.start_time Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.duration Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.puncturable Boolean
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.bo_handle Natural32
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.vif_bm VIX_BM_T
+COEX_MAC_ADD_SINGLESHOT_BLACKOUT.go_mvif Boolean
+COEX_SMEM_A2DP_PRESENT.a2dp_present Boolean
+COEX_SMEM_A2DP_PRESENT.__LINE__ __LINE__
+COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_DETACH_BLACKOUT_FROM_SCANS.__LINE__ __LINE__
+COEX_CTL_INIT.cflags COEX_FLAGS_T
+COEX_CTL_INIT.freq COEX_INTERFACE
+COEX_CTL_INIT.__LINE__ __LINE__
+COEX_HWM_SET_RX_PRIORITY_ERROR.res FMPD_COEX_RESULT_T
+COEX_MODEM_INIT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_INIT.__LINE__ __LINE__
+COEX_MAC_STOP_KEEP_ALIVE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_STOP_KEEP_ALIVE.__LINE__ __LINE__
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.update_time Natural32
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.priority Natural32
+COEX_FLEXIMAC_WLAN_LISTEN_ALERT.__LINE__ __LINE__
+COEX_BEACON.our_pos Natural32
+COEX_BEACON.aid Natural32
+COEX_BEACON.__LINE__ __LINE__
+COEX_MAC_MPS_DISABLE.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_DISABLE.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_DISABLE.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.wl_sw_asrx_update Boolean
+COEX_HWM_COEX_BB_WL_SW_ASRX_UPDATE.__LINE__ __LINE__
+COEX_SMEM_WARNING.reason WARNING_REASON
+COEX_SMEM_WARNING.__LINE__ __LINE__
+COEX_MODEM_FRAME_SYNC_ENTRY.message_okay Boolean
+COEX_MODEM_FRAME_SYNC_ENTRY.modem_active Boolean
+COEX_MODEM_FRAME_SYNC_ENTRY.__LINE__ __LINE__
+COEX_SMEM_WRITE_CHANNEL_MAP.__LINE__ __LINE__
+COEX_RAME_ABSENCE.period Natural32
+COEX_RAME_ABSENCE.start Natural32
+COEX_RAME_ABSENCE.duration Natural32
+COEX_RAME_ABSENCE.max Natural32
+COEX_RAME_ABSENCE.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.spectral_checking_enabled Boolean
+COEX_FLEXIMAC_REQ_SPECTRAL_CHECKING.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE_CHANGED.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_ABSENCE_CHANGED.vix vix
+COEX_RAME_VIF_ABSENCE_CHANGED.absence_added Boolean
+COEX_RAME_VIF_ABSENCE_CHANGED.__LINE__ __LINE__
+COEX_TASK_INIT.__LINE__ __LINE__
+COEX_MODEM_DRX.modflags COEX_MODEM_FLAGS
+COEX_MODEM_DRX.drx_start Natural32
+COEX_MODEM_DRX.wlan_bo_time Natural32
+COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_CLEAR_NAN_VIF_TIMING.__LINE__ __LINE__
+COEX_RAME_VIF_ABSENCE.vix vix
+COEX_RAME_VIF_ABSENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_RAME_VIF_ABSENCE.period Natural32
+COEX_RAME_VIF_ABSENCE.start Natural32
+COEX_RAME_VIF_ABSENCE.duration Natural32
+COEX_RAME_VIF_ABSENCE.__LINE__ __LINE__
+COEX_FLEXIMAC_BT_OFF.__LINE__ __LINE__
+COEX_HWM_COEX_BT_DEFER.__LINE__ __LINE__
+COEX_HWM_WARNING.reason WARNING_REASON
+COEX_HWM_WARNING.__LINE__ __LINE__
+COEX_HWM_WL_CALIB_PROTECT_ENABLE_ERROR.res FMPD_COEX_RESULT_T
+COEX_MAC_DELETE_ALL_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_ALL_BLACKOUTS.__LINE__ __LINE__
+COEX_FLEXIMAC_RESULT.result FMPD_COEX_RESULT_T
+COEX_FLEXIMAC_RESULT.__LINE__ __LINE__
+COEX_MAC_MASK_PERIODIC_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MASK_PERIODIC_BLACKOUTS.__LINE__ __LINE__
+COEX_MODEM_DEINIT.__LINE__ __LINE__
+COEX_MODEM_IM_EXIT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_IM_EXIT.__LINE__ __LINE__
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.enable_puncturing Boolean
+COEX_MAC_KA_UPDATE_PUNCTURABILITY.__LINE__ __LINE__
+COEX_PROT_PROTECT_START.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_START.delay_ron Natural32
+COEX_PROT_PROTECT_START.__LINE__ __LINE__
+COEX_MODEM_DRX_ENTRY.message_okay Boolean
+COEX_MODEM_DRX_ENTRY.modem_active Boolean
+COEX_MODEM_DRX_ENTRY.__LINE__ __LINE__
+COEX_STRAT_ASYNC_HANDLER_START.event_type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_ASYNC_HANDLER_START.start_time Natural32
+COEX_STRAT_ASYNC_HANDLER_START.duration Natural32
+COEX_STRAT_ASYNC_HANDLER_START.est Natural32
+COEX_STRAT_ASYNC_HANDLER_START.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_START.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_HANDLER_START.sstime Natural32
+COEX_STRAT_ASYNC_HANDLER_START.__LINE__ __LINE__
+COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME.completion_time Natural32
+COEX_SMEM_WRITE_ASYNC_EVENT_COMPLETION_TIME.__LINE__ __LINE__
+COEX_HWM_SET_RX_PRI.mac_instance Natural32
+COEX_HWM_SET_RX_PRI.promote_mac Boolean
+COEX_HWM_SET_RX_PRI.__LINE__ __LINE__
+COEX_HWM_COEX_BT_DEBUG.bt_debug_sel COEX_BT_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.bt_cdl_debug_sel COEX_BT_CDL_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.bt_sw_if_debug_sel COEX_BT_SW_IF_DEBUG_SEL_T
+COEX_HWM_COEX_BT_DEBUG.__LINE__ __LINE__
+COEX_MAC_UNMASK_BLE_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.vix_bitmap VIX_BM_T
+COEX_MAC_UNMASK_BLE_BLACKOUTS.__LINE__ __LINE__
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.mac_instance Natural32
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.COEX_WL_ALLOWED_ORIDE COEX_WL_ALLOWED_ORIDE_T
+COEX_HWM_COEX_WL_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_TASK_EVENT.pending FOS_EVENT_PENDING_EVENT
+COEX_TASK_EVENT.raw Natural32
+COEX_TASK_EVENT.__LINE__ __LINE__
+COEX_HWM_COEX_BB_WL_SW_IF_EN.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_IF_EN.wl_sw_if_en Boolean
+COEX_HWM_COEX_BB_WL_SW_IF_EN.__LINE__ __LINE__
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.flags COEX_FLEXIMAC_FLAGS_T
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.arb_required Boolean
+COEX_FLEXIMAC_REQ_ARBITRATION_REQUIRED.__LINE__ __LINE__
+COEX_MODEM_WLAN_CONNECT.modflags COEX_MODEM_FLAGS
+COEX_MODEM_WLAN_CONNECT.connecting Boolean
+COEX_STRAT_INIT.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INIT.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_EARLY.cflags COEX_FLAGS_T
+COEX_STRAT_SS_HANDLER_EARLY.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HANDLER_EARLY.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_EARLY.sstate_event Natural32
+COEX_STRAT_SS_HANDLER_EARLY.__LINE__ __LINE__
+COEX_MAC_MASK_BLE_BLACKOUTS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MASK_BLE_BLACKOUTS.mps_state COEX_MPS_STATE_T
+COEX_MAC_MASK_BLE_BLACKOUTS.vix_bitmap VIX_BM_T
+COEX_MAC_MASK_BLE_BLACKOUTS.__LINE__ __LINE__
+COEX_HWM_COEX_WL_CFG.mac_instance Natural32
+COEX_HWM_COEX_WL_CFG.COEX_WL_CFG COEX_WL_CFG_T
+COEX_HWM_COEX_WL_CFG.__LINE__ __LINE__
+COEX_STRAT_SS_HANDLER_EST_REACHED.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HANDLER_EST_REACHED.ss_event Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.event_start_time Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.event_duration Natural32
+COEX_STRAT_SS_HANDLER_EST_REACHED.__LINE__ __LINE__
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.r2s Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.mct Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.limit Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.start Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.stop Natural32
+COEX_STRAT_VIF_CLEAR_TIMEOUT_UPDATE_RADIO_OFF.__LINE__ __LINE__
+COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_INHIBIT_ACL_ACTIVITY_CONTROL.__LINE__ __LINE__
+COEX_RAME_IML_EXIT.cflags COEX_FLAGS_T
+COEX_RAME_IML_EXIT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_IML_EXIT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_IML_EXIT.__LINE__ __LINE__
+COEX_VIF_TIMING_UPDATE_PRESENCE.p2p_flags COEX_MAC_VIF_TIMING_FLAGS_T
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_start Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_period Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.noa_duration Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.presence_start Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.presence_duration Natural32
+COEX_VIF_TIMING_UPDATE_PRESENCE.__LINE__ __LINE__
+COEX_HWM_COEX_WL_SW_ASTX.mac_instance Natural32
+COEX_HWM_COEX_WL_SW_ASTX.wl_sw_astx_duration Natural32
+COEX_HWM_COEX_WL_SW_ASTX.__LINE__ __LINE__
+COEX_CTL_WARNING.reason WARNING_REASON
+COEX_CTL_WARNING.__LINE__ __LINE__
+COEX_STRAT_TDLS_CONTROL_CAUSE.__LINE__ __LINE__
+COEX_VIF_TIMING_ABSENCE.vix vix
+COEX_VIF_TIMING_ABSENCE.result Boolean
+COEX_VIF_TIMING_ABSENCE.vtflags COEX_MAC_VIF_TIMING_T
+COEX_VIF_TIMING_ABSENCE.vif_period Natural32
+COEX_VIF_TIMING_ABSENCE.noa_period Natural32
+COEX_VIF_TIMING_ABSENCE.start Natural32
+COEX_VIF_TIMING_ABSENCE.duration Natural32
+COEX_VIF_TIMING_ABSENCE.__LINE__ __LINE__
+COEX_SMEM_BT_OFF.__LINE__ __LINE__
+COEX_STRAT_IM_ENTER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_IM_ENTER.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_IM_ENTER.__LINE__ __LINE__
+COEX_HWM_COEX_BT_ALLOWED_ORIDE.COEX_BT_ALLOWED_ORIDE COEX_BT_ALLOWED_ORIDE_T
+COEX_HWM_COEX_BT_ALLOWED_ORIDE.__LINE__ __LINE__
+COEX_VIF_TIMING_CHECK_DRIFT.start_time Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.start_time_last Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.drift_us Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.dur_change_us Natural32
+COEX_VIF_TIMING_CHECK_DRIFT.update Boolean
+COEX_VIF_TIMING_CHECK_DRIFT.__LINE__ __LINE__
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.legal Boolean
+COEX_STRAT_ASYNC_RELINQUISH_CAN_TAKE_BACK.__LINE__ __LINE__
+COEX_SMEM_STATE.state COEX_MACRAME_EVENT_T
+COEX_SMEM_STATE.__LINE__ __LINE__
+COEX_STRAT_ASYNC_HANDLER_END.last_event_type CME_BT_ASYNC_EVENT_TYPE
+COEX_STRAT_ASYNC_HANDLER_END.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_HANDLER_END.mflags COEX_MAC_FLAGS_T
+COEX_STRAT_ASYNC_HANDLER_END.blackout_start Natural32
+COEX_STRAT_ASYNC_HANDLER_END.blackout_duration Natural32
+COEX_STRAT_ASYNC_HANDLER_END.next_alarm Natural32
+COEX_STRAT_ASYNC_HANDLER_END.__LINE__ __LINE__
+CME_SIMRX_REQ.enabled Boolean
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.mac_instance Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.wl_sw_astx_start_time Natural32
+COEX_HWM_COEX_BB_WL_SW_ASTX_START_TIME.__LINE__ __LINE__
+COEX_FLEXIMAC_INTERRUPT_REGISTER.source INT_SOURCE_T
+COEX_FLEXIMAC_INTERRUPT_REGISTER.__LINE__ __LINE__
+COEX_MAC_VIX_CONTROL.mflags COEX_MAC_FLAGS_T
+COEX_MAC_VIX_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_MAC_VIX_CONTROL.inhibit Boolean
+COEX_MAC_VIX_CONTROL.vix_bm VIX_BM_T
+COEX_MAC_VIX_CONTROL.__LINE__ __LINE__
+COEX_HWM_GET_RX_TX_ACK_PRI.mac_instance Natural32
+COEX_HWM_GET_RX_TX_ACK_PRI.__LINE__ __LINE__
+COEX_TIMER_INIT.cflags COEX_FLAGS_T
+COEX_TIMER_INIT.__LINE__ __LINE__
+COEX_MAC_DEINIT.__LINE__ __LINE__
+COEX_MAC_MPS_CHECK.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_CHECK.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_CHECK.__LINE__ __LINE__
+COEX_MODEM_RX_SIGNAL.modflags COEX_MODEM_FLAGS
+COEX_MODEM_RX_SIGNAL.enable Boolean
+COEX_MODEM_RX_SIGNAL.__LINE__ __LINE__
+COEX_MAC_CALIBRATION_SW_IF_DISABLED.cflags COEX_FLAGS_T
+COEX_MAC_CALIBRATION_SW_IF_DISABLED.__LINE__ __LINE__
+COEX_STRAT_RADIO_ON_HANDLER_END.__LINE__ __LINE__
+COEX_MAC_MPS_PROTECTION_START.mflags COEX_MAC_FLAGS_T
+COEX_MAC_MPS_PROTECTION_START.mps_state COEX_MPS_STATE_T
+COEX_MAC_MPS_PROTECTION_START.in_mps Boolean
+COEX_MAC_MPS_PROTECTION_START.mps_on_time Natural32
+COEX_MAC_MPS_PROTECTION_START.mps_off_time Natural32
+COEX_MAC_MPS_PROTECTION_START.__LINE__ __LINE__
+COEX_FLEXIMAC_RING_ENTRY.time_us Natural32
+COEX_FLEXIMAC_RING_ENTRY.event FMPD_COEX_RING_EVENT_T
+COEX_FLEXIMAC_RING_ENTRY.data Integer32
+COEX_FLEXIMAC_RING_ENTRY.data1 Integer16
+COEX_FLEXIMAC_RING_ENTRY.data2 Integer16
+COEX_FLEXIMAC_RING_ENTRY.count Natural32
+COEX_FLEXIMAC_RING_ENTRY.__LINE__ __LINE__
+COEX_MODEM_MIB_INIT.modflags COEX_MODEM_FLAGS
+COEX_STRAT_DEINIT_TIMER.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_DEINIT_TIMER.__LINE__ __LINE__
+COEX_STRAT_ASYNC_IMMEDIATE.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_IMMEDIATE.next_wlan Natural32
+COEX_STRAT_ASYNC_IMMEDIATE.__LINE__ __LINE__
+COEX_STRAT_DEINIT.__LINE__ __LINE__
+COEX_VIF_TIMING_PHASE_DIFF.vif_start Natural32
+COEX_VIF_TIMING_PHASE_DIFF.noa_end Natural32
+COEX_VIF_TIMING_PHASE_DIFF.period Natural32
+COEX_VIF_TIMING_PHASE_DIFF.offset Natural32
+COEX_VIF_TIMING_PHASE_DIFF.__LINE__ __LINE__
+COEX_STRAT_UPDATE_TDLS_CONTROL.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_UPDATE_TDLS_CONTROL.__LINE__ __LINE__
+COEX_RAME_CONNECTION_PROT_START.vix vix
+COEX_RAME_CONNECTION_PROT_START.prot_duration Natural32
+COEX_RAME_CONNECTION_PROT_START.cflags COEX_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.mflags COEX_MAC_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_CONNECTION_PROT_START.__LINE__ __LINE__
+COEX_SMEM_WRITE_VIF1_TIMING.start Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.period Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.duration Natural32
+COEX_SMEM_WRITE_VIF1_TIMING.vif_attribute CME_WLAN_VIF_ATTRIBUTE
+COEX_SMEM_WRITE_VIF1_TIMING.__LINE__ __LINE__
+COEX_VIF_TIMING_UPDATE.multiband Boolean
+COEX_VIF_TIMING_UPDATE.__LINE__ __LINE__
+COEX_FLEXIMAC_BT_ON.__LINE__ __LINE__
+COEX_REQ_FLEXIMAC_SIMRX.flags COEX_FLEXIMAC_FLAGS_T
+COEX_REQ_FLEXIMAC_SIMRX.simrx_disabled Boolean
+COEX_REQ_FLEXIMAC_SIMRX.__LINE__ __LINE__
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.mflags COEX_MAC_FLAGS_T
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.vif_bm VIX_BM_T
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.start_time Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.duration Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.eol Natural32
+COEX_MAC_ADD_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.cflags COEX_FLAGS_T
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.astx_duration Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.asrx_duration Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.start_time Natural32
+COEX_MAC_CALIBRATION_SW_IF_ENABLED.__LINE__ __LINE__
+COEX_FLEXIMAC_OVERRIDE_MACPP.override_macpp Natural32
+COEX_FLEXIMAC_OVERRIDE_MACPP.override_femctrl_drive Natural32
+COEX_FLEXIMAC_OVERRIDE_MACPP.__LINE__ __LINE__
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.mflags COEX_MAC_FLAGS_T
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.vix vix
+COEX_VIF_TIMING_CLEAR_VIF_TIMING.__LINE__ __LINE__
+COEX_FLEXIMAC_DEINIT.__LINE__ __LINE__
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.type CME_BT_ASYNC_EVENT_TYPE
+COEX_MAC_DELETE_SINGLESHOT_BLACKOUT.__LINE__ __LINE__
+COEX_FLEXIMAC_INTERRUPT_DEREGISTER.__LINE__ __LINE__
+COEX_SMEM_BT_LO_ACCESS.deadline Natural32
+COEX_PROT_PROTECT_SUMMARY.prot_act COEX_PROTECT_ACT_T
+COEX_PROT_PROTECT_SUMMARY.mflags COEX_MAC_FLAGS_T
+COEX_PROT_PROTECT_SUMMARY.current_acts COEX_PROT_ACTS_T
+COEX_PROT_PROTECT_SUMMARY.timeout Natural32
+COEX_STRAT_ASYNC_EVENT_NONE.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_ASYNC_EVENT_NONE.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_ASYNC_EVENT_NONE.__LINE__ __LINE__
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.mflags COEX_MAC_FLAGS_T
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.vif_bm VIX_BM_T
+COEX_MAC_DELETE_SINGLESHOT_RESTRICTION.__LINE__ __LINE__
+COEX_MODEM_TEST_INTERFERER_INSTALL.start_time Natural32
+COEX_RAME_EVENT.vix vix
+COEX_RAME_EVENT.event COEX_MACRAME_EVENT_T
+COEX_RAME_EVENT.cflags COEX_FLAGS_T
+COEX_RAME_EVENT.mflags COEX_MAC_FLAGS_T
+COEX_RAME_EVENT.connflags COEX_MAC_CONN_FLAGS_T
+COEX_RAME_EVENT.__LINE__ __LINE__
+COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS.mflags COEX_MAC_FLAGS_T
+COEX_MAC_KA_REATTACH_BLACKOUT_FROM_SCANS.__LINE__ __LINE__
+COEX_STRAT_RADIO_OFF_HANDLER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_RADIO_OFF_HANDLER_END.__LINE__ __LINE__
+COEX_FLEXIMAC_SHUTDOWN_ALERT.time_us Natural32
+COEX_FLEXIMAC_SHUTDOWN_ALERT.__LINE__ __LINE__
+COEX_STRAT_WARNING.reason WARNING_REASON
+COEX_STRAT_WARNING.__LINE__ __LINE__
+COEX_MAC_GET_CLEAR_TIMEOUT.mflags COEX_MAC_FLAGS_T
+COEX_MAC_GET_CLEAR_TIMEOUT.active_2g4_vifs VIX_BM_T
+COEX_MAC_GET_CLEAR_TIMEOUT.duration Natural32
+COEX_MAC_GET_CLEAR_TIMEOUT.__LINE__ __LINE__
+COEX_SMEM_INIT_BT_API.__LINE__ __LINE__
+COEX_MODEM_STATUS.modflags COEX_MODEM_FLAGS
+COEX_MODEM_STATUS.channel_mask Natural64
+COEX_MODEM_STATUS.lte_active Boolean
+COEX_MODEM_STATUS.__LINE__ __LINE__
+COEX_STRAT_SS_HALDER_END.sflags COEX_STRAT_FLAGS_T
+COEX_STRAT_SS_HALDER_END.sstate DEBUG_COEX_STRAT_STATE
+COEX_STRAT_SS_HALDER_END.itimer_ss_event Natural32
+COEX_STRAT_SS_HALDER_END.__LINE__ __LINE__
+COEX_RAME_VIF_CHANGED_MULTI_VIF.mflags COEX_MAC_FLAGS_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.vif_2g4_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.vif_2g4_go_bm VIX_BM_T
+COEX_RAME_VIF_CHANGED_MULTI_VIF.__LINE__ __LINE__
+COEX_MAC_VIF_TIMING_T Enum 0001 NOA_VALID 0002 NOA_UPDATED 0004 NOA_PENDING 0008 AP 0010 P2P 0020 5G ffff BITMAP
+COEX_VIF_TYPES_T Enum 0001 COEX_MAC_VIF_5G_STA 0002 COEX_MAC_VIF_2G4_AP 0003 COEX_MAC_VIF_5G_AP 0004 COEX_MAC_VIF_2G4_GC 0005 COEX_MAC_VIF_5G_GC 0006 COEX_MAC_VIF_2G4_GO 0007 COEX_MAC_VIF_5G_GO x0000 COEX_MAC_VIF_2G4_STA
+DEBUG_COEX_ASYNC_EVENT_TYPE Enum 0000 ASYNC_NONE 0001 ASYNC_INQUIRY 0002 ASYNC_PAGE 0003 ASYNC_BT_CONNECT 0004 ASYNC_BLE_SCAN 0005 ASYNC_BLE_CONNECT 0006 ASYNC_BLE_ADVERT 0007 ASYNC_ACL_FOR_A2DP 0008 ASYNC_ACL_WITHOUT_A2DP
+COEX_TIMER_T Enum 01 COEX_SS_ALARM 02 COEX_PROTECT_ALARM ffff BITMAP
+CME_WLAN_VIF_ATTRIBUTE Enum 0001 5G 0002 AP 0004 P2P ffff BITMAP
+DEBUG_BLACKOUT_KA_MODE Enum 0000 BLACKOUT_KA_NONE 0001 BLACKOUT_KA_CONTINUOUS_BT 0002 BLACKOUT_KA_MULTI_PROFILE_SURVIVAL
+WARNING_REASON Enum 0000 UNSPECIFIED 0001 FAULT 0002 LAST
+DEBUG_COEX_PARAMS Enum ffff IGNORED
+FMPD_COEX_RESULT_T Enum 0000 SUCCESS 0010 PENDING 0021 ARB_DRAW 0022 ARB_BT_WINS 0023 ORIDE_BT_WINS 0024 ARB_NO_OVERLAP 0025 ARB_AS_NOT_VALID 0026 ARB_NO_COLLISION 0040 ARB_WLAN_WINS 0041 ORIDE_WLAN_WINS 0042 BUSY 0080 INVALID_SEQUENCE_NUM 0081 ERROR 0082 TIMEOUT 0083 DELAYED_FM_NOT_RUNNING 0084 DELAYED_PENDING
+COEX_MACRAME_EVENT_T Enum 0000 MAC_START 0001 MAC_STOP 0002 RADIO_ON_DEPRICATED 0003 SCAN_START 0004 SCAN_STOP 0005 CONNECTION_START 0006 CONNECTION_STOP 0007 CALIBRATION_START 0008 CALIBRATION_STOP 0009 DHCP_START 000a DHCP_STOP 000b DHCP_DISCOVER 000c DHCP_OFFER 000d DHCP_REQUEST 000e DHCP_ACK 000f PM_ACTIVE_TRUE 0010 PM_ACTIVE_FALSE 0011 EAPOL_START 0012 EAPOL_STOP 0013 DWELL_START 0014 DWELL_STOP
+COEX_WL_CFG_T Enum 0001 WL_EN 0002 FORCE_REGS_CLK_EN 0004 USE_SW_IF 0008 WL_FEM_EN ffff BITMAP
+CME_WLAN_PRIORITY_LEVEL_T Enum 0000 LOW 0001 MEDIUM 0002 HIGH
+COEX_FLEXIMAC_ARB_BM_T Enum 0001 ARB_REQUIRED 0002 SIM_RX 0003 SPECTRAL_CHECKING 0004 OVERRIDE
+INTERFACE Enum 0001 2G4 0002 5G
+BLACKOUT_KEEP_ALIVE_MODE_T Enum 0000 BLACKOUT_KEEP_ALIVE_NOT_ALLOWED 0001 BLACKOUT_KEEP_ALIVE_MINIMAL 0002 BLACKOUT_KEEP_ALIVE_5_50 0003 BLACKOUT_KEEP_ALIVE_10_100
+COEX_SMEM_FLAGS_T Enum 0001 HIGH 0002 NORMAL 0004 LOW 0008 A2DP_PUNC 0010 P_INIT ffff BITMAP
+COEX_BT_SW_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+COEX_BB_DEBUG_SEL_T Enum 0001 SEL_CDL 0002 SEL_BT_IF 0004 SEL_WL_IF ffff BITMAP
+DEBUG_COEX_CTL_SERVICE_T Enum 0001 COEX_CTL_SERVICE_LOCAL 0002 COEX_CTL_SERVICE_REMOTE 0003 COEX_CTL_SERVICE_ALL
+COEX_SCHEME_T Enum 0005 COEX_SCHEME_COMBO
+COEX_MAC_CONN_FLAGS_T Enum 0001 CONN_CONNECTION 0002 CONN_EAPOL 0004 CONN_DHCP 0008 CONN_DWELL ffff BITMAP
+BLACKOUT_KA_MODE_T Enum 0000 BO_KA_NONE 0001 BA_KA_CONT_BT 0002 BO_KA_MPS
+COEX_BB_ALLOWED_ORIDE_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX 0010 BTTX_EN 0020 BTTX 0040 BTRX_EN 0080 BTRX ffff BITMAP
+COEX_WL_ALLOWED_ORIDE_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX ffff BITMAP
+COEX_WL_MAC_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+COEX_BT_ALLOWED_ORIDE_T Enum 0001 BTTX_EN 0002 BTTX 0004 BTRX_EN 0008 BTRX ffff BITMAP
+FMPD_COEX_OVERRIDE_ARBITRATION_T Enum 0000 NONE 0001 BT 0002 WLAN
+COEX_WL_CDL_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX 0002 SEL_MISC
+COEX_MAC_VIF_TIMING_FLAGS_T Enum 0001 COEX_MAC_VIF_ABSENCE_VALID 0002 COEX_MAC_VIF_ABSENCE_UPDATE 0004 COEX_MAC_VIF_ABSENCE_PENDING
+FMPD_COEX_BAND_T Enum 0000 UNKNOWN 0002 2G4 0005 5G 0006 6G
+COEX_TDLS_CONTROL Enum 0000 TDLS_ALLOWED 0001 TDLS_INHIBITED
+COEX_PROT_ACTS_T Enum 0000 NONE 0001 TX_BEACON 0002 RX_BEACON 0004 TX_NULL 0008 CTS2SELF 0010 CF_END 0020 KEEP_ALIVE 0040 CONNECTION 0080 MIN_VIF_DUR 0100 MULTICAST 0200 WLAN_OPP ffff BITMAP
+CME_BT_PERIODIC_TYPE Enum 0000 EVENT_TYPE_NONE 0001 EVENT_TYPE_SCO 0002 EVENT_TYPE_ESCO 0003 EVENT_TYPE_ACL_SNIFF 0004 EVENT_TYPE_PAGE_SCAN 0005 EVENT_TYPE_INQUIRY_SCAN 0006 EVENT_TYPE_BLE_SCAN 0007 EVENT_TYPE_BLE_CONNECT 0008 EVENT_TYPE_BLE_CONNECTION 0009 EVENT_TYPE_BLE_ADVERT 000a EVENT_TYPE_ANT_SCAN_NORMAL 000b EVENT_TYPE_ANT_SCAN_CRITICAL 000c EVENT_TYPE_ANT_CHANNEL_RX 000d EVENT_TYPE_ANT_BURST_RX 000e EVENT_TYPE_ANT_BURST_TX
+FOS_EVENT_PENDING_EVENT Enum 01 COEX_EVT_ALARM_SIGNAL 02 COEX_EVT_BT_SIGNAL 04 COEX_EVT_MODEM_SIGNAL ffff BITMAP
+DEBUG_COEX_STRAT_STATE Enum 0000 WL_HAS_RADIO 0001 WAITING_BT_OPP 0002 WAITING_WL_OPP 0003 WAITING_EST 0004 ASYNC_CONTINUOUS
+COEX_BT_DEBUG_SEL_T Enum 0000 SEL_SW_IF 0001 SEL_CDL_WL0 0002 SEL_CDL_WL1 0003 SEL_MISC
+CME_SIGNAL_ID Enum 0000 CME_SIGNAL_ID_COEX_SERVICE_ACTIVE_IND 0024 CME_SIGNAL_ID_WLAN_CHANNEL_MAP_IND 0025 CME_SIGNAL_ID_PROFILE_A2DP_START_IND 0026 CME_SIGNAL_ID_PROFILE_A2DP_STOP_IND 0029 CME_SIGNAL_ID_BT_CAL_START_REQ 002a CME_SIGNAL_ID_BT_CAL_START_CFM 002b CME_SIGNAL_ID_BT_CAL_END_IND 002c CME_SIGNAL_ID_WLAN_CHANNEL_MAP_LO_HI_IND 002d CME_SIGNAL_ID_COEX_STOP_IND 002f CME_SIGNAL_ID_COEX_START_IND 0030 CME_SIGNAL_ID_WLAN_VIF_TIMING_IND
+COEX_PROTECT_STATE Enum 0000 FALSE 0001 TRUE 0002 DELAYED
+COEX_MODEM_FLAGS Enum 0001 INIT 0002 TIMERS 0004 MODEM_ENABLED 0008 CA_ENABLED 0010 PB_ENABLED 0020 TDD_ENABLED 0040 MWX_RX_ON 0080 RSRP_LOW 0100 PB_ACTIVE 0200 TD_REQUIRED 0400 TD_ACTIVE 0800 DRX_ACTIVE 1000 TD_SUSPEND ffff BITMAP
+COEX_BT_WL_DEBUG_SEL_T Enum 0000 SEL_WL0 0001 SEL_WL1 0002 SEL_BT
+CME_BT_ASYNC_EVENT_TYPE Enum 0000 NONE 0001 DISCOVERY_CONNECTION 0002 ACL_FOR_A2DP 0003 ACL_WITHOUT_A2DP 0004 BLE_DATA 0005 CALIBRATION 0006 ANNOUNCED_PUNCTURE
+COEX_BT_CDL_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX 0002 SEL_MISC
+COEX_WL_DEBUG_SEL_T Enum 0000 SEL_MAC_IF 0001 SEL_SW_IF 0002 SEL_CDL 0003 SEL_MISC
+COEX_WL_SW_IF_DEBUG_SEL_T Enum 0000 SEL_TX 0001 SEL_RX
+DEBUG_COEX_PERIODIC_EVENT_TYPE Enum 0000 PERIODIC_NONE 0001 PERIODIC_SCO 0002 PERIODIC_ESCO 0003 PERIODIC_ACL_SNIFF 0004 PERIODIC_PAGE_SCAN 0005 PERIODIC_INQUIRY_SCAN 0006 PERIODIC_BLE_SCAN 0007 PERIODIC_BLE_CONNECT 0008 PERIODIC_BLE_CONNECTION 0009 PERIODIC_BLE_ADVERT 000a PERIODIC_ANT_SCAN_NORMAL 000b PERIODIC_ANT_SCAN_CRITICAL 000c PERIODIC_ANT_CHANNEL_RX 000d PERIODIC_ANT_BURST_RX 000e PERIODIC_ANT_BURST_TX
+CAR_REASON Enum 0011 ALLOWED_OVERRIDE_REQ 0012 ARB_REQ 0013 SIM_RX_REQ 0014 SPECTRAL__REQ 0015 OVERRIDE_REQ 0016 WLAN_LISTEN_PRI_REQ 0017 ARB_REQUIRED_REQ 0021 RECONFIG 0022 BT_TRANS 0041 RX_START 0042 RX_START_ACK 0043 RX_LSIG 0044 RX_HTSIG 0045 TX_START 0046 RX_CANCEL 0047 RX_END 0048 TX_CANCEL_EDCA 0049 TX_END 004a TX_RSP_ACK 004b TX_RSP_CTS 004c SLOT_TIMER
+VIF_TYPE Enum 0000 UNSYNC 0001 ADHOC 0002 STA 0003 AP
+COEX_BB_DEBUG_CDL_SEL_T Enum 0001 CDL_SEL_BT 0002 CDL_SEL_WL ffff BITMAP
+COEX_BB_CLKGEN_CFG_T Enum 0001 CLK_COEX_EN 0002 CLK_COEX_REGS_EN ffff BITMAP
+COEX_MPS_STATE_T Enum 0000 COEX_MPS_OFF 0001 COEX_MPS_ON_BT_PHASE 0002 COEX_MPS_ON_WL_PHASE 0003 LAST
+DEBUG_COEX_IRQ_TYPE Enum 0000 CME_IRQ_TYPE_VPIO 0001 CME_IRQ_TYPE_TBUS
+COEX_INTERFACE Enum 0000 RADIO_off 0001 5G 0002 2G4
+CME_BT_PERIODIC_EVENT_TYPE Enum 0000 NONE 0001 SCO 0002 ESCO 0003 ACL_SNIFF 0004 PAGE_SCAN 0005 INQUIRY_SCAN 0006 BLE_SCAN 0007 BLE_CONNECT 0008 BLE_CONNECTION 0009 BLE_ADVERT 000a ANT_SCAN_NORMAL 000b ANT_SCAN_CRITICAL 000c ANT_CHANNEL_RX 000d ANT_BURST_RX 000e ANT_BURST_TX
+COEX_CDL_INSTANCE_T Enum 0000 COEX_CDL_INSTANCE_WL 0000 COEX_CDL_INSTANCE_AUTO 0001 COEX_CDL_INSTANCE_BT
+COEX_STRAT_FLAGS_T Enum 0001 INIT 0002 TIMERS 0004 ASYNC_V 0008 WL_RESTRICT 0020 INHIBIT_REVOKE 0040 A2DP 0080 PERIODIC_INHIBIT 0100 ASYNC_INHIBIT 0200 EARLY_START 0400 SCO 0800 ESCO ffff BITMAP
+COEX_FLEXIMAC_REQUESTS_T Enum 0010 ALLOWED_OVERRIDE 0020 ARB_REQUIRED 0040 SIM_RX 0080 SPECTRAL_CHECKING 0100 OVERRIDE 0200 LISTEN_PRIORITY 0400 BT_TRANSACTION ffff BITMAP
+FMPD_COEX_RING_EVENT_T Enum 0010 COEX_START 0011 COEX_SHUTDOWN 0020 PPDU_RX_START 0021 PPDU_RX_LSIG_RX 0022 PPDU_RX_HTSIG_GF_RX 0023 PPDU_RX_END 0024 PPDU_TX_START 0025 PPDU_TX_END 0026 PPDU_TX_RSP 0027 PPDU_TX_CANCEL 0028 PPDU_RX_CANCEL 0040 BT_TRANS_REQ 0041 BT_TRANS_ALERT 0080 EDCA_TX_REQ 0081 EDCA_TX_SCHED 0082 EDCA_TX_DEADLINE 0083 SLOT_TIMER_FINISHED 0100 PPDU_LISTEN 0200 UPDATE_MACPP 0400 ARB_EVENT 0401 ARB_WLAN_WINS 0402 ARB_BT_WINS 0403 ARB_DRAW 0800 BT_ORIDE 0801 WLAN_ORIDE 1000 REQUEST
+COEX_BB_DEBUG_IF_SEL_T Enum 0001 IF_SEL_TX 0002 IF_SEL_RX 0004 IF_SEL_TXRX ffff BITMAP
+INT_SOURCE_T Enum 0061 FXMAC0_0 0062 FXMAC0_1 0063 FXMAC0_2 0064 FXMAC0_3 0065 FXMAC1_0 0066 FXMAC1_1 0067 FXMAC1_2 0068 FXMAC1_3
+COEX_VIF_ATTRIBUTES_T Enum 0000 COEX_MAC_VIF_ATTRIBUTE_NONE 0001 COEX_MAC_VIF_ATTRIBUTE_5G 0002 COEX_MAC_VIF_ATTRIBUTE_AP 0004 COEX_MAC_VIF_ATTRIBUTE_P2P ffff BITMAP
+COEX_BT_CFG_T Enum 0001 BT_EN 0002 FORCE_REGS_CLK_EN ffff BITMAP
+COEX_FLEXIMAC_FLAGS_T Enum 0001 FM0 0002 FM1 0004 INIT 0008 TRANS_TIMEOUT_FIRED 0010 TRANS_WAITING ffff BITMAP
+COEX_CDL_OVERRIDE_OPTION_T Enum 0001 WLTX_EN 0002 WLTX 0004 WLRX_EN 0008 WLRX 0010 BTTX_EN 0020 BTTX 0040 BTRX_EN 0080 BTRX ffff BITMAP
+COEX_FLAGS_T Enum 0001 COEX_MAC_READY 0002 COEX_BT_ON 0004 COEX_CDL_WL_SW_IF ffff BITMAP
+COEX_PROTECT_ACT_T Enum 0000 TX_BEACON 0001 RX_BEACON 0002 TX_NULL 0003 TX_CTS_TO_SELF 0004 TX_CF_END 0005 TX_RX_KEEP_ALIVE 0006 TX_RX_CONNECTION 0007 RX_MIN_VIF_DURATION 0008 RX_MULTICAST 0009 RX_DURING_WLAN_OPP 000a LAST
+DEBUG_CME_WLAN_STATE Enum 0 CME_WLAN_STATE_OFF 1 CME_WLAN_STATE_ON
+COEX_BB_DEBUG_CDL_ARB_SEL_T Enum 0001 ARB_SEL_REM_TX 0002 ARB_SEL_REM_RX 0004 ARB_SEL_MISC ffff BITMAP
+FMPD_COEX_BT_TRANSACTION_SOURCE_T Enum 0000 TIMEOUT 0001 IMMEDIATE 0002 NORMAL
+ABORT_CFG_T Enum 0001 TX_CDL_EN 0002 TX_RF_EN 0004 RX_CDL_EN 0008 RX_RF_EN ffff BITMAP
+COEX_FLEXIMAC_ALERTS_T Enum 0001 COEX_START 0002 COEX_SHUTDOWN 0004 RING_FILLING 0008 ARB_REQUIRED 0010 SIM_RX 0020 SPECTRAL_CHECKING 0040 OVERRIDE 0080 LISTEN_PRIORITY 0100 BT_TRANSACTION 0200 MACPP_ALLOWED ffff BITMAP
+RAMEDATA_USPBO_CONFIG_FLAGS Enum 0001 USPBO_ENABLE_CTS_TO_SELF 0002 USPBO_ENABLE_CTS_TO_SELF_LIFETIME_OVERRIDE 0004 USPBO_ENABLE_CTS_TO_SELF_BACKOFF_OVERRIDE 0008 USPBO_ENABLE_CTS_TO_SELF_DURATION_OVERRIDE 0010 USPBO_ENABLE_RX_ONLY_PHASE 0020 USPBO_ENABLE_AP_MODE
+COEX_BB_CFG_T Enum 0001 CFG_EN 0002 CFG_FORCE_CDL_EN 0004 WL_SW_IF_EN ffff BITMAP
+COEX_MAC_FLAGS_T Enum 0001 READY 0002 SCAN_ACTIVE 0004 CALIBRATION_ACTIVE 0008 ACL 0010 KEEP_ALIVE 0020 MPS_ENABLED 0040 PS_ACTIVE 0080 HIGH_PRIORITY 0100 DHCP_PROTECT 0200 TESCO6 0400 AP 0800 GO_NOA 1000 IM_IDLE 2000 P2P_FULL_SCAN 4000 P2P_SOCIAL_SCAN ffff BITMAP
+WLAN_CDL_PRIORITY Enum 0000 WLAN_CDL_PRI_RX_DEFAULT 0004 WLAN_CDL_PRI_RX_MIN_VIF_DURATION 0006 WLAN_CDL_PRI_TX_CTRL 0006 WLAN_CDL_PRI_TX_MULTICAST 0006 WLAN_CDL_PRI_RX_WLAN_OPP 0006 WLAN_CDL_PRI_TX_DATA_MGMT 000a WLAN_CDL_PRI_TX_RX_BEACON 000a WLAN_CDL_PRI_TX_RX_KEEP_ALIVE 000a WLAN_CDL_PRI_RX_MULTICAST 000a WLAN_CDL_PRI_TX_RX_HI_PRI_CTRL 000b WLAN_CDL_PRI_TX_RX_ACK
+# Generated From crypto/crypto_debug.xml
+trace_def 3
+001c 0000 CRYPTO_START
+001c 0001 CRYPTO_STOP 0002 type version
+001c 0002 CRYPTO_RESULT 0002 data type
+# Generated From crypto/crypto_debug.xml
+trace_types 9
+CRYPTO_STOP.type DEBUG_CRYPTO_ALGO
+CRYPTO_STOP.version DEBUG_SHA_VERSION
+CRYPTO_START_AES.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_AES.version DEBUG_AES_KEY_LENGTH_TYPE
+CRYPTO_RESULT.data TOKEN
+CRYPTO_RESULT.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_SHA.type DEBUG_CRYPTO_ALGO
+CRYPTO_START_SHA.version DEBUG_SHA_VERSION
+CRYPTO_ERROR.type DEBUG_CRYPTO_ALGO
+DEBUG_CRYPTO_ALGO_TYPE Enum 0000 FT_R0_KDF 0001 FT_R0NAME 0002 FT_R1_KDF 0003 FT_R1NAME 0004 FT_PTK_KDF 0005 FT_MIC_AES128_CMAC 0006 FT_MIC_SHA384_HMAC 0007 FT_GTK_AES_UNWRAP 0008 FT_IGTK_AES_UNWRAP
+DEBUG_SHA_VERSION_TYPE Enum 0000 SHA_VERSION_256 0001 SHA_VERSION_384 0002 SHA_VERSION_512
+DEBUG_AES_KEY_LENGTH_TYPE Enum 0000 AES_KEY_LENGTH_128 0001 AES_KEY_LENGTH_256
+# Generated From hip_signals.xml
+trace_types 88
+Radio_Bitmap Enum 0002 radio_1 0001 radio_0
+Cipher_Suite_Selector Natural32
+Peer_Index Natural16
+Tx_Data_Type Enum 0000 data_word 0001 data_random
+Channel_Frequency Natural16
+Client_Tag Natural16
+Edge_Of_Band Natural16
+TDLS_Event Enum 0003 Discovered 0001 Connected 0002 Disconnected
+Scan_Id Natural16
+Data_Unit_Descriptor Enum 0002 AMSDU_subframe 0000 IEEE802_11_Frame 0003 AMSDU 0004 TCP_ACK 0001 IEEE802_3_Frame
+Pmalloc_Area Enum 0001 Pmalloc_Fsm_Stats 0000 Pmalloc_Stats 0002 Hostio_Sig_Sizes
+NAN_Availability_Interval Natural32
+NANSDF_Mask Natural16
+Connection_type Enum 0001 P2p_Operation 0005 Wlan_Ranging 0004 Nan_Further_Service_Slot 0000 Wlan_Infrastructure
+uint16 Natural16
+Microseconds16 Natural16
+Band Enum 0001 5GHz 0002 2_4GHz 0000 Auto
+VIF_Range Enum 000f VIF_Index_Max 0001 VIF_Index_Min
+uint32 Natural32
+Hidden_Ssid Enum 0002 Hidden_Zero_Data 0000 Not_Hidden 0001 Hidden_Zero_Length
+int32 Natural32s
+VIF_Index Natural16
+CW_Start_Flags Enum 0000 none 0001 scan_channel
+NAN_SDF_Control Enum 0008 Received_FollowUp_Event 0002 Subscribe_End_Event 0004 Match_expired_Event 0010 Followup_Transmit_Status 0001 Publish_End_Event
+Microseconds32 Natural32
+RTT_Type Enum 0001 One_sided 0002 Two_sided
+ePNO_Policy Enum 0100 Auth_Open 0010 Same_Network 0004 G_Band 0008 Strict_Match 0001 Hidden 0400 Auth_EAPOL 0002 A_Band 0200 Auth_PSK
+End_Point Enum 0002 DPLP 0001 Hostio
+Message_Type Enum 0005 DHCP 0001 EAP_Message 0003 EAPOL_Key_M4 0011 IEEE80211_Mgmt 0007 WAI_Message 0006 Neighbor_Discovery 0008 Any_Other 0002 EAPOL_Key_M123 0004 ARP 0010 IEEE80211_Action
+Mode Enum 0003 Loopback 0002 Sink 0001 Source
+Tx_Set_Params_Flags Enum 0000 none 1000 rx_low_power 0080 disable_scrambler 0008 deafen_rx 0100 ldpc 0200 stbc 0001 ack 0002 duplicate_80 0020 scan_channel 0040 short_preamble 2000 ibss_frames 8000 disable_external_lna 4000 beamforming 0004 duplicate_40 0400 disable_spreader 0800 greenfield_preamble 0010 cs
+NAN_Operation_Control Enum 0004 Start_Cluster_Event 0002 MAC_Address_Event 0008 Joined_Cluster_Event
+Beacon_Periods Natural16
+Time_Units Natural16
+Bulk_Data_Descriptor Enum 0001 Smapper 0000 Inline
+Tx_Set_Params_Flags2 Enum 0000 none
+Data_Length Natural16
+Rule_Flag Enum 0010 NO_OUTDOOR 0002 DFS 0008 NO_INDOOR 0001 NO_IR 0004 NO_OFDM
+Tx_HE_Mode Enum 0004 he_mu_tb 0003 he_mu_tb_standalone 0002 he_er_su_10mhz 0001 he_er_su 0000 he_su
+NANOperControl_Mask Natural16
+Purpose_Mask Natural16
+VIF_Type Enum 0021 Offchannel 0005 NAN 0003 AP 0007 Preconnect 0002 Station 0022 Range 0010 Monitor 0006 Discovery 0000 Unsynchronised 0004 Wlanlite 0020 Scan
+Device_Role Enum 0002 P2p_GO 0004 P2p_Client 0001 Infrastructure_Station 0003 P2p_Device
+CW_Type Enum 0003 dc 0001 ramp 0002 two_tone 0004 prn 0000 sine
+Action Enum 0000 stop 0001 start
+Power_Management_Mode Enum 0001 Power_Save 0000 Active_Mode
+TDLS_Action Enum 0002 Teardown 0000 Discovery 0001 Setup
+Boolean Enum 0001 True 0000 False
+Data_Rate Enum 8c97 11ax160_1361m1bps_2gi_nss2 8828 11ax80_367m5bps_4gi 6848 11ac80_390mbps_sgi 8851 11ax80_34mbps_2gi_dcm 8492 11ax40_97m5bps_2gi_nss2 8ca4 11ax160_735mbps_4gi_nss2 68cb 11ac80_1083m3bps_sgi_nss2 6843 11ac80_130mbps_sgi 8051 11ax20_8m1bps_2gi_dcm 6084 11ac20_78mbps_nss2 8897 11ax80_680m6bps_2gi_nss2 8495 11ax40_260mbps_2gi_nss2 6c87 11ac160_1170mbps_nss2 8899 11ax80_907m4bps_2gi_nss2 6847 11ac80_325mbps_sgi e008 ctr_beamformed 8095 11ax20_130mbps_2gi_nss2 6807 11ac80_292m5bps 8063 11ax20_14m6bps_4gi_dcm 4405 11n40_108mbps e002 ctr_crc_error 6082 11ac20_39mbps_nss2 4042 11n20_21m7bps_sgi 8caa 11ax160_1837m5bps_4gi_nss2 84aa 11ax40_438m8bps_4gi_nss2 8883 11ax80_288m2bps_1gi_nss2 8423 11ax40_58m5bps_4gi 8c21 11ax160_122m5bps_4gi 8483 11ax40_137m6bps_1gi_nss2 8498 11ax40_390mbps_2gi_nss2 8480 11ax40_34m4bps_1gi_nss2 8c54 11ax160_204m2bps_2gi_dcm 8822 11ax80_91m9bps_4gi 8013 11ax20_32m5bps_2gi 8c0b 11ax160_1201mbps_1gi 6404 11ac40_81mbps 4444 11n40_90mbps_sgi 6c84 11ac160_702mbps_nss2 44c8 11n40_30mbps_sgi_nss2 8488 11ax40_412m9bps_1gi_nss2 4407 11n40_135mbps 8489 11ax40_458m8bps_1gi_nss2 4005 11n20_52mbps 8061 11ax20_7m3bps_4gi_dcm 8cc0 11ax160_72m1bps_1gi_nss2_dcm 8861 11ax80_30m6bps_4gi_dcm 8461 11ax40_14m6bps_4gi_dcm 8ca0 11ax160_122m5bps_4gi_nss2 6440 11ac40_15mbps_sgi 8802 11ax80_108m1bps_1gi 4443 11n40_60mbps_sgi 84a9 11ax40_390mbps_4gi_nss2 8c27 11ax160_612m5bps_4gi 4000 11n20_6m5bps 8823 11ax80_122m5bps_4gi 8086 11ax20_154m9bps_1gi_nss2 8c44 11ax160_216m2bps_1gi_dcm 8403 11ax40_68m8bps_1gi 84e4 11ax40_87m8bps_4gi_nss2_dcm 840b 11ax40_286m8bps_1gi 8407 11ax40_172m1bps_1gi 88d4 11ax80_204m2bps_2gi_nss2_dcm 8406 11ax40_154m9bps_1gi 8022 11ax20_21m9bps_4gi 8c0a 11ax160_1080m9bps_1gi 8007 11ax20_86mbps_1gi 84ab 11ax40_487m5bps_4gi_nss2 8083 11ax20_68m8bps_1gi_nss2 8c95 11ax160_1088m9bps_2gi_nss2 84e1 11ax40_29m3bps_4gi_nss2_dcm 4089 11n20_26mbps_nss2 40cc 11n20_86m7bps_sgi_nss2 889a 11ax80_1020m8bps_2gi_nss2 8041 11ax20_8m6bps_1gi_dcm 6048 11ac20_86m7bps_sgi 4460 11n40_6m7bps_sgi 8819 11ax80_453m7bps_2gi 8816 11ax80_306m3bps_2gi 800a 11ax20_129mbps_1gi 8c85 11ax160_1152m9bps_1gi_nss2 6c42 11ac160_195mbps_sgi 6809 11ac80_390mbps 408a 11n20_39mbps_nss2 6c48 11ac160_780mbps_sgi 8ce3 11ax160_245mbps_4gi_nss2_dcm 8c96 11ax160_1225mbps_2gi_nss2 4001 11n20_13mbps 80a8 11ax20_175m5bps_4gi_nss2 888b 11ax80_1201mbps_1gi_nss2 4043 11n20_28m9bps_sgi 8416 11ax40_146m3bps_2gi 6840 11ac80_32m5bps_sgi 8c90 11ax160_136m1bps_2gi_nss2 68c6 11ac80_585mbps_sgi_nss2 64c3 11ac40_120mbps_sgi_nss2 88ab 11ax80_1020m8bps_4gi_nss2 6445 11ac40_120mbps_sgi 880a 11ax80_540m4bps_1gi 8894 11ax80_408m3bps_2gi_nss2 84d1 11ax40_32m5bps_2gi_nss2_dcm 8021 11ax20_14m6bps_4gi 8020 11ax20_7m3bps_4gi 8428 11ax40_175m5bps_4gi 6ccb 11ac160_2166m7bps_sgi_nss2 6cc7 11ac160_1300mbps_sgi_nss2 8000 11ax20_8m6bps_1gi 8414 11ax40_97m5bps_2gi 8014 11ax20_48m8bps_2gi 4401 11n40_27mbps 808b 11ax20_286m8bps_1gi_nss2 64c6 11ac40_270mbps_sgi_nss2 88c4 11ax80_216m2bps_1gi_nss2_dcm 882b 11ax80_510m4bps_4gi 802a 11ax20_109m7bps_4gi 8895 11ax80_544m4bps_2gi_nss2 8429 11ax40_195mbps_4gi 84d0 11ax40_16m3bps_2gi_nss2_dcm 8044 11ax20_25m8bps_1gi_dcm 8820 11ax80_30m6bps_4gi 44ce 11n40_270mbps_sgi_nss2 8441 11ax40_17m2bps_1gi_dcm 8024 11ax20_43m9bps_4gi 8419 11ax40_216m7bps_2gi 6409 11ac40_180mbps 4488 11n40_27mbps_nss2 8011 11ax20_16m3bps_2gi 8464 11ax40_43m9bps_4gi_dcm 4442 11n40_45mbps_sgi 6801 11ac80_58m5bps 8ca9 11ax160_1633m3bps_4gi_nss2 84a2 11ax40_87m8bps_4gi_nss2 8c63 11ax160_122m5bps_4gi_dcm 448f 11n40_270mbps_nss2 8c60 11ax160_30m6bps_4gi_dcm 80d4 11ax20_48m8bps_2gi_nss2_dcm 88a2 11ax80_183m8bps_4gi_nss2 8c91 11ax160_272m2bps_2gi_nss2 2009 11a20_9mbps 68c8 11ac80_780mbps_sgi_nss2 8c88 11ax160_1729m4bps_1gi_nss2 8817 11ax80_340m3bps_2gi 6088 11ac20_156mbps_nss2 6443 11ac40_60mbps_sgi 6441 11ac40_30mbps_sgi 8808 11ax80_432m4bps_1gi 8c14 11ax160_408m3bps_2gi 6c49 11ac160_866m7bps_sgi 6046 11ac20_65mbps_sgi 6400 11ac40_13m5bps 8821 11ax80_61m3bps_4gi 6442 11ac40_45mbps_sgi 8898 11ax80_816m7bps_2gi_nss2 8089 11ax20_229m4bps_1gi_nss2 68c7 11ac80_650mbps_sgi_nss2 8c24 11ax160_367m5bps_4gi 8422 11ax40_43m9bps_4gi 448d 11n40_216mbps_nss2 8002 11ax20_25m8bps_1gi 6846 11ac80_292m5bps_sgi 8424 11ax40_87m8bps_4gi 68c9 11ac80_866m7bps_sgi_nss2 8c12 11ax160_204m2bps_2gi 8096 11ax20_146m3bps_2gi_nss2 64c0 11ac40_30mbps_sgi_nss2 8c61 11ax160_61m3bps_4gi_dcm 80ab 11ax20_243m8bps_4gi_nss2 68c4 11ac80_390mbps_sgi_nss2 4441 11n40_30mbps_sgi 6c83 11ac160_468mbps_nss2 6845 11ac80_260mbps_sgi 64c5 11ac40_240mbps_sgi_nss2 6080 11ac20_13mbps_nss2 8440 11ax40_8m6bps_1gi_dcm 6446 11ac40_135mbps_sgi 84d3 11ax40_65mbps_2gi_nss2_dcm 6806 11ac80_263m3bps 8026 11ax20_65m8bps_4gi 6cc8 11ac160_1560mbps_sgi_nss2 68ca 11ac80_975mbps_sgi_nss2 64c7 11ac40_300mbps_sgi_nss2 8ca6 11ax160_1102m5bps_4gi_nss2 8888 11ax80_864m7bps_1gi_nss2 8850 11ax80_17mbps_2gi_dcm 8881 11ax80_144m1bps_1gi_nss2 888a 11ax80_1080m9bps_1gi_nss2 68c2 11ac80_195mbps_sgi_nss2 8408 11ax40_206m5bps_1gi 800b 11ax20_143m4bps_1gi 8454 11ax40_48m8bps_2gi_dcm 6885 11ac80_468mbps_nss2 809b 11ax20_270m8bps_2gi_nss2 8c04 11ax160_432m4bps_1gi 6008 11ac20_78mbps e001 ctr_no_error 8c98 11ax160_1633m3bps_2gi_nss2 8c99 11ax160_1814m8bps_2gi_nss2 8860 11ax80_15m3bps_4gi_dcm 60c1 11ac20_28m9bps_sgi_nss2 80a6 11ax20_131m6bps_4gi_nss2 80a1 11ax20_29m3bps_4gi_nss2 6488 11ac40_324mbps_nss2 8801 11ax80_72m1bps_1gi 8885 11ax80_576m5bps_1gi_nss2 6002 11ac20_19m5bps 88e0 11ax80_30m6bps_4gi_nss2_dcm 6883 11ac80_234mbps_nss2 8c20 11ax160_61m3bps_4gi 8887 11ax80_720m6bps_1gi_nss2 88d0 11ax80_34mbps_2gi_nss2_dcm 8853 11ax80_68m1bps_2gi_dcm 8884 11ax80_432m4bps_1gi_nss2 8844 11ax80_108m1bps_1gi_dcm 60c3 11ac20_57m8bps_sgi_nss2 68c0 11ac80_65mbps_sgi_nss2 881a 11ax80_510m4bps_2gi 84c4 11ax40_103m2bps_1gi_nss2_dcm 40cd 11n20_115m6bps_sgi_nss2 6480 11ac40_27mbps_nss2 8893 11ax80_272m2bps_2gi_nss2 8443 11ax40_34m4bps_1gi_dcm 8863 11ax80_61m3bps_4gi_dcm 648b 11ac40_450mbps_nss2 8451 11ax40_16m3bps_2gi_dcm 8016 11ax20_73m1bps_2gi 6c8b 11ac160_1950mbps_nss2 8c80 11ax160_144m1bps_1gi_nss2 88c0 11ax80_36mbps_1gi_nss2_dcm 8025 11ax20_58m5bps_4gi 4088 11n20_13mbps_nss2 8088 11ax20_206m5bps_1gi_nss2 84c3 11ax40_68m8bps_1gi_nss2_dcm 2024 11a20_36mbps 64c8 11ac40_360mbps_sgi_nss2 8c53 11ax160_136m1bps_2gi_dcm 88d1 11ax80_68m1bps_2gi_nss2_dcm 6448 11ac40_180mbps_sgi 8c11 11ax160_136m1bps_2gi 8891 11ax80_136m1bps_2gi_nss2 6c0a 11ac160_877m5bps 8ce0 11ax160_61m3bps_4gi_nss2_dcm 6c4a 11ac160_975mbps_sgi 8cc3 11ax160_288m2bps_1gi_nss2_dcm 8c03 11ax160_288m2bps_1gi 680a 11ac80_438m8bps 6841 11ac80_65mbps_sgi 80c1 11ax20_17m2bps_1gi_nss2_dcm 000b 11b20_11mbps 84a4 11ax40_175m5bps_4gi_nss2 8400 11ax40_17m2bps_1gi 4402 11n40_40m5bps 8c93 11ax160_544m4bps_2gi_nss2 4406 11n40_121m5bps 6c07 11ac160_585mbps 4003 11n20_26mbps 6487 11ac40_270mbps_nss2 6489 11ac40_360mbps_nss2 8091 11ax20_32m5bps_2gi_nss2 8cd1 11ax160_136m1bps_2gi_nss2_dcm 8813 11ax80_136m1bps_2gi 60c0 11ac20_14m4bps_sgi_nss2 8493 11ax40_130mbps_2gi_nss2 8c41 11ax160_72m1bps_1gi_dcm 80a0 11ax20_14m6bps_4gi_nss2 809a 11ax20_243m8bps_2gi_nss2 6402 11ac40_40m5bps 84a1 11ax40_58m5bps_4gi_nss2 8c17 11ax160_680m6bps_2gi 8494 11ax40_195mbps_2gi_nss2 8c64 11ax160_183m8bps_4gi_dcm 8886 11ax80_648m5bps_1gi_nss2 8809 11ax80_480m4bps_1gi 68c1 11ac80_130mbps_sgi_nss2 88aa 11ax80_918m8bps_4gi_nss2 8409 11ax40_229m4bps_1gi 6c04 11ac160_351mbps 6888 11ac80_702mbps_nss2 e000 ctr_total 6003 11ac20_26mbps 8c25 11ax160_490mbps_4gi 4047 11n20_72m2bps_sgi 8010 11ax20_8m1bps_2gi 6804 11ac80_175m5bps 849b 11ax40_541m7bps_2gi_nss2 8ce4 11ax160_367m5bps_4gi_nss2_dcm 80a4 11ax20_87m8bps_4gi_nss2 8889 11ax80_960m7bps_1gi_nss2 8486 11ax40_309m7bps_1gi_nss2 841b 11ax40_270m8bps_2gi 688b 11ac80_975mbps_nss2 6485 11ac40_216mbps_nss2 8854 11ax80_102m1bps_2gi_dcm 64c4 11ac40_180mbps_sgi_nss2 8ca1 11ax160_245mbps_4gi_nss2 8453 11ax40_32m5bps_2gi_dcm 40ce 11n20_130mbps_sgi_nss2 0001 11b20_1mbps 6403 11ac40_54mbps 8806 11ax80_324m3bps_1gi 60c4 11ac20_86m7bps_sgi_nss2 6c82 11ac160_351mbps_nss2 8c29 11ax160_816m6bps_4gi 8444 11ax40_51m6bps_1gi_dcm 8463 11ax40_29m3bps_4gi_dcm 60c5 11ac20_115m6bps_sgi_nss2 80a2 11ax20_43m9bps_4gi_nss2 6cc5 11ac160_1040mbps_sgi_nss2 68c5 11ac80_520mbps_sgi_nss2 8426 11ax40_131m6bps_4gi 8c00 11ax160_72m1bps_1gi 8841 11ax80_36mbps_1gi_dcm 8c16 11ax160_612m5bps_2gi 8c84 11ax160_864m7bps_1gi_nss2 88d3 11ax80_136m1bps_2gi_nss2_dcm 8818 11ax80_408m3bps_2gi 6c80 11ac160_117mbps_nss2 8017 11ax20_81m3bps_2gi 6405 11ac40_108mbps 408e 11n20_117mbps_nss2 6000 11ac20_6m5bps 8487 11ax40_344m1bps_1gi_nss2 8cc4 11ax160_432m4bps_1gi_nss2_dcm 80a7 11ax20_146m3bps_4gi_nss2 448b 11n40_108mbps_nss2 408b 11n20_52mbps_nss2 88a9 11ax80_816m6bps_4gi_nss2 8003 11ax20_34m4bps_1gi 4400 11n40_13m5bps 6c0b 11ac160_975mbps 684b 11ac80_541m7bps_sgi 40c9 11n20_28m9bps_sgi_nss2 8005 11ax20_68m8bps_1gi 4006 11n20_58m5bps 8c02 11ax160_216m2bps_1gi 8827 11ax80_306m3bps_4gi 84a0 11ax40_29m3bps_4gi_nss2 6881 11ac80_117mbps_nss2 6482 11ac40_81mbps_nss2 8c18 11ax160_816m7bps_2gi 8805 11ax80_288m2bps_1gi 6c05 11ac160_468mbps 848a 11ax40_516m2bps_1gi_nss2 4404 11n40_81mbps 8826 11ax80_275m6bps_4gi 6449 11ac40_200mbps_sgi 6c09 11ac160_780mbps 88a6 11ax80_551m3bps_4gi_nss2 448a 11n40_81mbps_nss2 4446 11n40_135mbps_sgi 84a5 11ax40_234mbps_4gi_nss2 80a5 11ax20_117mbps_4gi_nss2 6086 11ac20_117mbps_nss2 8c28 11ax160_735mbps_4gi 8c15 11ax160_544m4bps_2gi 8c51 11ax160_68m1bps_2gi_dcm 8c06 11ax160_648m5bps_1gi 44cd 11n40_240mbps_sgi_nss2 841a 11ax40_243m8bps_2gi 6408 11ac40_162mbps 6045 11ac20_57m8bps_sgi 6043 11ac20_28m9bps_sgi 8481 11ax40_68m8bps_1gi_nss2 8c89 11ax160_1921m5bps_1gi_nss2 8c50 11ax160_34mbps_2gi_dcm 408f 11n20_130mbps_nss2 8412 11ax40_48m8bps_2gi 8c40 11ax160_36mbps_1gi_dcm 8815 11ax80_272m2bps_2gi 8814 11ax80_204m2bps_2gi 882a 11ax80_459m4bps_4gi 6800 11ac80_29m3bps 8015 11ax20_65mbps_2gi 88a7 11ax80_612m5bps_4gi_nss2 8497 11ax40_325mbps_2gi_nss2 84a8 11ax40_351mbps_4gi_nss2 4045 11n20_57m8bps_sgi e006 ctr_error 84a3 11ax40_117mbps_4gi_nss2 8413 11ax40_65mbps_2gi 848b 11ax40_573m5bps_1gi_nss2 0002 11b20_2mbps 88a8 11ax80_735mbps_4gi_nss2 8019 11ax20_108m3bps_2gi 80d1 11ax20_16m3bps_2gi_nss2_dcm 44cf 11n40_300mbps_sgi_nss2 6c43 11ac160_260mbps_sgi 8804 11ax80_216m2bps_1gi 680b 11ac80_487m5bps 88e1 11ax80_61m3bps_4gi_nss2_dcm 8c9a 11ax160_2041m7bps_2gi_nss2 6c03 11ac160_234mbps 80c4 11ax20_51m6bps_1gi_nss2_dcm 6c81 11ac160_234mbps_nss2 8040 11ax20_4m3bps_1gi_dcm 8092 11ax20_48m8bps_2gi_nss2 8cc1 11ax160_144m1bps_1gi_nss2_dcm 6cc4 11ac160_780mbps_sgi_nss2 8890 11ax80_68m1bps_2gi_nss2 8843 11ax80_72m1bps_1gi_dcm 8093 11ax20_65mbps_2gi_nss2 8c1a 11ax160_1020m8bps_2gi 44ca 11n40_90mbps_sgi_nss2 684a 11ac80_487m5bps_sgi 88a0 11ax80_61m3bps_4gi_nss2 80e3 11ax20_29m3bps_4gi_nss2_dcm 8012 11ax20_24m4bps_2gi 6c02 11ac160_175m5bps 8081 11ax20_34m4bps_1gi_nss2 6042 11ac20_21m7bps_sgi 8896 11ax80_612m5bps_2gi_nss2 8460 11ax40_7m3bps_4gi_dcm 6486 11ac40_243mbps_nss2 8ce1 11ax160_122m5bps_4gi_nss2_dcm 6c89 11ac160_1560mbps_nss2 842b 11ax40_243m8bps_4gi 8c86 11ax160_1297m1bps_1gi_nss2 8401 11ax40_34m4bps_1gi 80e4 11ax20_43m9bps_4gi_nss2_dcm 801a 11ax20_121m9bps_2gi 8485 11ax40_275m3bps_1gi_nss2 40cf 11n20_144m4bps_sgi_nss2 8496 11ax40_292m5bps_2gi_nss2 60c8 11ac20_173m3bps_sgi_nss2 6c85 11ac160_936mbps_nss2 8085 11ax20_137m6bps_1gi_nss2 64c9 11ac40_400mbps_sgi_nss2 8c83 11ax160_576m5bps_1gi_nss2 6407 11ac40_135mbps 8420 11ax40_14m6bps_4gi 60ca 11ac20_216m7bps_sgi_nss2 644a 11ac40_225mbps_sgi 200c 11a20_12mbps 448e 11n40_243mbps_nss2 8840 11ax80_18mbps_1gi_dcm 8882 11ax80_216m2bps_1gi_nss2 8c13 11ax160_272m2bps_2gi 88a3 11ax80_245mbps_4gi_nss2 8402 11ax40_51m6bps_1gi 849a 11ax40_487m5bps_2gi_nss2 8cd4 11ax160_408m3bps_2gi_nss2_dcm 6041 11ac20_14m4bps_sgi 8050 11ax20_4mbps_2gi_dcm 8421 11ax40_29m3bps_4gi 6889 11ac80_780mbps_nss2 6884 11ac80_351mbps_nss2 80e1 11ax20_14m6bps_4gi_nss2_dcm 8c94 11ax160_816m7bps_2gi_nss2 8482 11ax40_103m2bps_1gi_nss2 84e3 11ax40_58m5bps_4gi_nss2_dcm 6c06 11ac160_526m5bps 8c08 11ax160_864m7bps_1gi 6c8a 11ac160_1755mbps_nss2 8028 11ax20_87m8bps_4gi 8004 11ax20_51m6bps_1gi 6880 11ac80_58m5bps_nss2 80aa 11ax20_219m4bps_4gi_nss2 8c07 11ax160_720m6bps_1gi 8098 11ax20_195mbps_2gi_nss2 842a 11ax40_219m4bps_4gi 8ca7 11ax160_1225mbps_4gi_nss2 8c1b 11ax160_1134m2bps_2gi 408c 11n20_78mbps_nss2 608a 11ac20_195mbps_nss2 8c43 11ax160_144m1bps_1gi_dcm 40cb 11n20_57m8bps_sgi_nss2 8427 11ax40_146m3bps_4gi 8ca2 11ax160_367m5bps_4gi_nss2 8060 11ax20_3m6bps_4gi_dcm 8415 11ax40_130mbps_2gi 6803 11ac80_117mbps 60c6 11ac20_130mbps_sgi_nss2 2030 11a20_48mbps 6444 11ac40_90mbps_sgi 6c40 11ac160_65mbps_sgi 6484 11ac40_162mbps_nss2 6cc9 11ac160_1733m3bps_sgi_nss2 8c8a 11ax160_2161m8bps_1gi_nss2 64ca 11ac40_450mbps_sgi_nss2 6083 11ac20_52mbps_nss2 80a3 11ax20_58m5bps_4gi_nss2 640b 11ac40_225mbps 4041 11n20_14m4bps_sgi 8006 11ax20_77m4bps_1gi 8484 11ax40_206m5bps_1gi_nss2 80d3 11ax20_32m5bps_2gi_nss2_dcm 6887 11ac80_585mbps_nss2 8880 11ax80_72m1bps_1gi_nss2 8800 11ax80_36mbps_1gi 4447 11n40_150mbps_sgi 8094 11ax20_97m5bps_2gi_nss2 8417 11ax40_162m5bps_2gi 4044 11n20_43m3bps_sgi 8053 11ax20_16m3bps_2gi_dcm 8cd0 11ax160_68m1bps_2gi_nss2_dcm 8008 11ax20_103m2bps_1gi e004 ctr_stbc 6c88 11ac160_1404mbps_nss2 8c8b 11ax160_2401m9bps_1gi_nss2 44cb 11n40_120mbps_sgi_nss2 8829 11ax80_408m3bps_4gi 8009 11ax20_114m7bps_1gi 8c22 11ax160_183m8bps_4gi 8ca8 11ax160_1470mbps_4gi_nss2 64c1 11ac40_60mbps_sgi_nss2 8803 11ax80_144m1bps_1gi 6c4b 11ac160_1083m3bps_sgi 6406 11ac40_121m5bps 6c45 11ac160_520mbps_sgi 448c 11n40_162mbps_nss2 8490 11ax40_32m5bps_2gi_nss2 8c23 11ax160_245mbps_4gi 84c1 11ax40_34m4bps_1gi_nss2_dcm 6007 11ac20_65mbps 0005 11b20_5m5bps 6c86 11ac160_1053mbps_nss2 4046 11n20_65mbps_sgi 6808 11ac80_351mbps 6044 11ac20_43m3bps_sgi 801b 11ax20_135m4bps_2gi 8c82 11ax160_432m4bps_1gi_nss2 88a1 11ax80_122m5bps_4gi_nss2 6087 11ac20_130mbps_nss2 4004 11n20_39mbps 88a4 11ax80_367m5bp_4gi_nss2 604a 11ac20_108m3bps_sgi 6c08 11ac160_702mbps 6047 11ac20_72m2bps_sgi 6c44 11ac160_390mbps_sgi 68c3 11ac80_260mbps_sgi_nss2 6cca 11ac160_1950mbps_sgi_nss2 8812 11ax80_102m1bps_2gi 6cc2 11ac160_390mbps_sgi_nss2 8018 11ax20_97m5bps_2gi 60c2 11ac20_43m3bps_sgi_nss2 8404 11ax40_103m2bps_1gi 6401 11ac40_27mbps 44c9 11n40_60mbps_sgi_nss2 80a9 11ax20_195mbps_4gi_nss2 8099 11ax20_216m7bps_2gi_nss2 8892 11ax80_204m2bps_2gi_nss2 4040 11n20_7m2bps_sgi 44cc 11n40_180mbps_sgi_nss2 880b 11ax80_600m4bps_1gi 8c05 11ax160_576m5bps_1gi 8c81 11ax160_288m2bps_1gi_nss2 4002 11n20_19m5bps 408d 11n20_104mbps_nss2 60c7 11ac20_144m4bps_sgi_nss2 2018 11a20_24mbps 6481 11ac40_54mbps_nss2 8029 11ax20_97m5bps_4gi 6c46 11ac160_585mbps_sgi 8054 11ax20_24m4bps_2gi_dcm 64cb 11ac40_500mbps_sgi_nss2 6882 11ac80_175m5bps_nss2 8c19 11ax160_907m4bps_2gi 88a5 11ax80_490mbps_4gi_nss2 881b 11ax80_567m1bps_2gi 6006 11ac20_58m5bps 8864 11ax80_91m9bps_4gi_dcm 6085 11ac20_104mbps_nss2 8c87 11ax160_1441m2bps_1gi_nss2 4440 11n40_15mbps_sgi 6447 11ac40_150mbps_sgi 80e0 11ax20_7m3bps_4gi_nss2_dcm 2036 11a20_54mbps 6cc1 11ac160_260mbps_sgi_nss2 6886 11ac80_526m5bps_nss2 e003 ctr_bad_signal 8023 11ax20_29m3bps_4gi 6001 11ac20_13mbps 4445 11n40_120mbps_sgi 80c0 11ax20_8m6bps_1gi_nss2_dcm 80d0 11ax20_8m1bps_2gi_nss2_dcm 6c01 11ac160_117mbps 6849 11ac80_433m3bps_sgi 6483 11ac40_108mbps_nss2 6c41 11ac160_130mbps_sgi 8c9b 11ax160_2268m5bps_2gi_nss2 64c2 11ac40_90mbps_sgi_nss2 88c3 11ax80_144m1bps_1gi_nss2_dcm 8418 11ax40_195mbps_2gi 8450 11ax40_8m1bps_2gi_dcm 8cab 11ax160_2041m6bps_4gi_nss2 84a6 11ax40_263m3bps_4gi_nss2 808a 11ax20_258m1bps_1gi_nss2 840a 11ax40_258m1bps_1gi 8825 11ax80_245mbps_4gi 889b 11ax80_1134m3bps_2gi_nss2 4007 11n20_65mbps 8080 11ax20_17m2bps_1gi_nss2 8405 11ax40_137m6bps_1gi 84a7 11ax40_292m5bps_4gi_nss2 40ca 11n20_43m3bps_sgi_nss2 6c00 11ac160_58m5bps 8810 11ax80_34mbps_2gi 8c10 11ax160_68m1bps_2gi 8027 11ax20_73m1bps_4gi 6004 11ac20_39mbps 6cc6 11ac160_1170mbps_sgi_nss2 88e4 11ax80_183m8bps_4gi_nss2_dcm e007 ctr_ldpc 4489 11n40_54mbps_nss2 688a 11ac80_877m5bps_nss2 8097 11ax20_162m5bps_2gi_nss2 8425 11ax40_117mbps_4gi 8084 11ax20_103m2bps_1gi_nss2 8491 11ax40_65mbps_2gi_nss2 4403 11n40_54mbps 84e0 11ax40_14m6bps_4gi_nss2_dcm 8087 11ax20_172m1bps_1gi_nss2 40c8 11n20_14m4bps_sgi_nss2 8001 11ax20_17m2bps_1gi 84d4 11ax40_97m5bps_2gi_nss2_dcm 8064 11ax20_21m9bps_4gi_dcm 8090 11ax20_16m3bps_2gi_nss2 8411 11ax40_32m5bps_2gi 8807 11ax80_360m3bps_1gi 88c1 11ax80_72m1bps_1gi_nss2_dcm 2006 11a20_6mbps 648a 11ac40_405mbps_nss2 6844 11ac80_195mbps_sgi 8824 11ax80_183m8bps_4gi 802b 11ax20_121m9bps_4gi 644b 11ac40_250mbps_sgi 8410 11ax40_16m3bps_2gi 2012 11a20_18mbps 80c3 11ax20_34m4bps_1gi_nss2_dcm 8ca3 11ax160_490mbps_4gi_nss2 8c2a 11ax160_918m8bps_4gi 8cd3 11ax160_272m2bps_2gi_nss2_dcm 6805 11ac80_234mbps 4420 11n40_6mbps 84c0 11ax40_17m2bps_1gi_nss2_dcm 8c26 11ax160_551m3bps_4gi 88e3 11ax80_122m5bps_4gi_nss2_dcm 600a 11ac20_97m5bps 6081 11ac20_26mbps_nss2 e005 ctr_duplicate 6c47 11ac160_650mbps_sgi 8ca5 11ax160_980mbps_4gi_nss2 640a 11ac40_202m5bps 6cc0 11ac160_130mbps_sgi_nss2 6842 11ac80_97m5bps_sgi 8499 11ax40_433m3bps_2gi_nss2 6005 11ac20_52mbps 8c92 11ax160_408m3bps_2gi_nss2 8c09 11ax160_960m7bps_1gi 6cc3 11ac160_520mbps_sgi_nss2 8c01 11ax160_144m1bps_1gi 6040 11ac20_7m2bps_sgi 8c2b 11ax160_1020m8bps_4gi 8043 11ax20_17m2bps_1gi_dcm 8811 11ax80_68m1bps_2gi 8082 11ax20_51m6bps_1gi_nss2 6802 11ac80_87m8bps
+Raw_Power Natural16s
+RTT_ID Natural16
+Procedure_Type Enum 0002 Device_Discovered 0003 Roaming_Started 0000 Unknown 0001 Connection_Started
+StatsStop_Mask Natural16
+Association_Id Natural16
+DFS_Regulatory Enum 0001 FCC 0003 JAPAN 0004 GLOBAL 0000 Unknown 0006 CHINA 0002 ETSI
+Authentication_Type Enum 0001 Shared_Key 0003 SAE 0000 Open_System 0080 LEAP
+Device_State Enum 4 bist_running 2 tx_running 1 rx_running 0 idle 3 cw_running
+Key_Type Enum 0003 IGTK 0001 Pairwise 0004 PMK 0002 WEP 0005 First_Illegal 0000 Group
+Picoseconds16 Natural16
+Slot_Number Natural16
+APF_Filter_Mode Enum 0001 Suspend 0000 Disabled 0002 Active
+Counter32 Natural32
+Host_State Natural16
+Event Enum 0010 WIFI_EVENT_ROAM_SCAN_COMPLETE 000f WIFI_EVENT_ROAM_SCAN_STARTED 0005 WIFI_EVENT_FW_RE_ASSOC_STARTED 0015 WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_START 0007 WIFI_EVENT_DRIVER_SCAN_RESULT_FOUND 000a WIFI_EVENT_G_SCAN_COMPLETE 0006 WIFI_EVENT_DRIVER_SCAN_REQUESTED 0034 WIFI_EVENT_DRIVER_PNO_NETWORK_FOUND 0026 WIFI_EVENT_G_SCAN_STOP 0029 WIFI_EVENT_G_SCAN_BUCKET_STARTED 000e WIFI_EVENT_BEACON_RECEIVED 0104 WIFI_EVENT_NAN_CLUSTER_STARTED 0105 WIFI_EVENT_NAN_CLUSTER_JOINED 0003 WIFI_EVENT_FW_AUTH_STARTED 0032 WIFI_EVENT_DRIVER_PNO_ADD 0017 WIFI_EVENT_DRIVER_EAPOL_FRAME_TRANSMIT_REQUESTED 0101 WIFI_EVENT_NAN_SUBSCRIBE_TERMINATED 0020 WIFI_EVENT_BT_COEX_BT_HID_START 0012 WIFI_EVENT_ROAM_SEARCH_STOPPED 0065 WIFI_EVENT_BLACKOUT_STOP 0000 WIFI_EVENT_ASSOCIATION_REQUESTED 0008 WIFI_EVENT_DRIVER_SCAN_COMPLETE 002f WIFI_EVENT_AUTH_TIMEOUT 002b WIFI_EVENT_G_SCAN_RESULTS_AVAILABLE 0001 WIFI_EVENT_AUTH_COMPLETE 0037 WIFI_EVENT_DRIVER_PNO_SCAN_COMPLETE 0035 WIFI_EVENT_DRIVER_PNO_SCAN_REQUESTED 002d WIFI_EVENT_ROAM_CANDIDATE_FOUND 001c WIFI_EVENT_BT_COEX_BT_SCO_START 0016 WIFI_EVENT_FW_EAPOL_FRAME_TRANSMIT_STOP 0011 WIFI_EVENT_ROAM_SEARCH_STARTED 000d WIFI_EVENT_ROAM_REQUESTED 0009 WIFI_EVENT_G_SCAN_STARTED 000b WIFI_EVENT_DISASSOCIATION_REQUESTED 0100 WIFI_EVENT_NAN_PUBLISH_TERMINATED 001f WIFI_EVENT_BT_COEX_BT_SCAN_STOP 001d WIFI_EVENT_BT_COEX_BT_SCO_STOP 0028 WIFI_EVENT_G_SCAN_CYCLE_COMPLETED 0031 WIFI_EVENT_MEM_ALLOC_FAILURE 002c WIFI_EVENT_G_SCAN_CAPABILITIES 0024 WIFI_EVENT_ROAM_ASSOC_STARTED 0103 WIFI_EVENT_NAN_ADDRESS_CHANGED 0002 WIFI_EVENT_ASSOC_COMPLETE 0102 WIFI_EVENT_NAN_MATCH_EXPIRED 0033 WIFI_EVENT_DRIVER_PNO_REMOVE 0025 WIFI_EVENT_ROAM_ASSOC_COMPLETE 001b WIFI_EVENT_BLOCK_ACK_NEGOTIATION_COMPLETE 0106 WiFI_EVENT_NAN_TRANSMIT_FOLLOWUP 0036 WIFI_EVENT_DRIVER_PNO_SCAN_RESULT_FOUND 0030 WIFI_EVENT_ASSOC_TIMEOUT 0021 WIFI_EVENT_BT_COEX_BT_HID_STOP 0064 WIFI_EVENT_BLACKOUT_START 000c WIFI_EVENT_RE_ASSOCIATION_REQUESTED 0018 WIFI_EVENT_FW_EAPOL_FRAME_RECEIVED 002e WIFI_EVENT_ROAM_SCAN_CONFIG 0023 WIFI_EVENT_ROAM_AUTH_COMPLETE 001a WIFI_EVENT_DRIVER_EAPOL_FRAME_RECEIVED 0014 WIFI_EVENT_CHANNEL_SWITCH_ANOUNCEMENT 002a WIFI_EVENT_G_SCAN_BUCKET_COMPLETED 0027 WIFI_EVENT_G_SCAN_CYCLE_STARTED 0004 WIFI_EVENT_FW_ASSOC_STARTED 0022 WIFI_EVENT_ROAM_AUTH_STARTED 001e WIFI_EVENT_BT_COEX_BT_SCAN_START
+Purpose Enum 0004 Association_Response 0010 Association_Request 0020 Probe_Request 0002 Probe_Response 0008 Local 0001 Beacon
+Tx_Read_Flags Enum 0002 thermal_cutout 0001 frame_counting 0000 none
+Picoseconds32 Natural32
+Direction Enum 0000 Transmit 0001 Receive
+Decibels Natural16s
+RTT_Bandwidth Enum 0020 160MHz 0010 80MHz 0008 40MHz 0004 20MHz
+RTT_Preamble Enum 0002 HT 0004 VHT 0001 Legacy
+Ranging_Ind_Type Enum 0002 Ingress 0001 Continuous_Indication 0004 Egress
+Report_Mode Enum 0002 End_of_Scan_cycle 0004 Real_Time 0001 Reserved 0008 No_Batch
+Capability_Information Natural16
+Scan_Type Enum 000e Hard_All_Roaming_Scan 0005 P2P_Scan_Social 0001 Initial_Scan 0002 Full_Scan 0003 Scheduled_Scan 000f OBSS_Scan_Internal 000d Hard_Cached_Roaming_Scan 0009 GScan 0011 FTM_Neighbour_Scan 000b Soft_Cached_Roaming_Scan 0006 OBSS_Scan 0010 NAN_Scan 0007 AP_Auto_Channel_Selection 0004 P2P_Scan_Full 000a Measurement_Scan 0012 First_Illegal 000c Soft_All_Roaming_Scan
+ACL_Policy Enum 0001 WhiteList 0000 BlackList
+Rx_Start_Flags Enum 0020 chan_rssi 0000 none 0040 disable_external_lna 0004 beamforming 0010 lp_mode 0008 ack 0001 scan_channel 0002 filtering
+IPv4_Address Natural32
+Reason_Code Enum 8007 Channel_Switch_Failure 0022 QoS_Excessive_Not_Ack 9002 NAN_Service_Terminated_User_Request 8004 Security_Required 9009 NDP_Rejected 0029 Start 0006 Deauthenticated_invalid_class_2_frame 9006 NAN_Transmit_Followup_Success 0019 TDLS_Peer_Unreachable 8003 Synchronisation_Loss 0023 QoS_TXOP_Limit_Exceeded 0010 Deauthenticated_Group_ Handshake_Timeout 9003 NAN_Service_Terminated_Count_Reached 0000 Reserved 0024 QSTA_Leaving 9007 NAN_Transmit_Followup_Failure 0001 Unspecified_Reason 9004 NAN_Service_Terminated_Discovery_Shutdown 000d Deauthenticated_Reason_invalid_IE 0026 Unknown 0011 Deauthenticated_Handshake_Element_Mismatch 8008 Reporting_Aborted_Scanning 9008 NDP_Accepted 0028 Keep_Alive_Failure 0003 Deauthenticated_Leaving 0005 Deauthenticated_no_more_stations 8005 Roaming_failure_link_loss_no_candidate 0025 End 0014 Deauthenticated_Reason_Invalid_RSNE 0020 QoS_Unspecified_Reason 000f Deauthenticated_4_Way_Handshake_Timeout 001a TDLS_Teardown_Unspecified_Reason 0049 Invalid_Pmkid 8006 Hotspot_max_client_reached 9001 NAN_Service_Terminated_Timeout 8009 Reporting_Aborted_Roaming 0017 Deauthenticated_802_1_X_Auth_Failed 0007 Deauthenticated_invalid_class_3_frame 0002 Deauthenticated_Invalid_authentication 0027 Timeout 0031 Deauthenticated_Reason_invalid_PMKID
+RTT_Status Enum 0009 Fail_Invalid_Time_Stamp 0006 Fail_Incorrect_channel 0008 Fail_Measurement_Aborted 0003 Fail_Rejected 0005 Fail_Timeout 000f Fail_FTM_Parameter_Override 000c Fail_Busy_try_later 0002 Fail_No_Response 0007 Fail_FTM_Not_Supported 000b Fail_Burst_Not_Scheduled 000a Fail_No_FTM_Received 0001 Unspecified_failure 000d Fail_Invalid_request 0000 Success 0004 Fail_Not_Scheduled
+Protocol Enum 0002 TCP 0001 UDP
+Transmission_Status Enum 0002 Tx_Lifetime 0005 Unavailable_Key_Mapping 0003 No_BSS 0006 Unspecified_failure 0000 Successful 0004 Excessive_Data_Length 0001 Retry_Limit
+Result_Code Enum 800c Host_Request_Failed 8010 Auth_Timeout 900b NDP_Rejected 9006 NAN_Invalid_Match_ID 9004 Unsupported_Concurrency 8013 Auth_No_Ack 9000 Invalid_TLV_Value 0030 Not_Allowed 900c NDL_Unacceptable 8012 Assoc_Abort 8011 Assoc_Timeout 8006 Insufficient_Resource 800e Invalid_Frequency 800b Host_Request_Success 8100 Auth_Failed_Code 8002 BSS_Already_Started_Or_Joined 8003 Not_Supported 0031 Not_Present 9005 NAN_Invalid_NDP_ID 9008 NAN_Invalid_Availability 900a NAN_Rejected_Security_Policy 9002 NAN_Invalid_Session_ID 9003 NAN_Invalid_Requestor_Instance_ID 9007 NAN_No_OTA_Ack 8200 Assoc_Failed_Code 800f Probe_Timeout 004f Transmission_Failure 900d NDL_Failed_Schedule 800a Invalid_Virtual_Interface_Index 0028 Rejected_Invalid_IE 0000 Success 0026 Invalid_Parameters 8001 Too_Many_Simultaneous_Requests 9009 NAN_Immutable_Unacceptable 9001 NAN_Protocol_Failure 0001 Unspecified_Failure 8014 Assoc_No_Ack 8004 Invalid_State
+int16 Natural16s
+Priority Enum 0006 QoS_UP6 0003 QoS_UP3 0002 QoS_UP2 0005 QoS_UP5 0001 QoS_UP1 0007 QoS_UP7 8000 Contention 0000 QoS_UP0 0004 QoS_UP4
+Category_Mask Natural32
+StatsStop_Bitmap Enum 0040 Stats_Iface_AC 0004 Stats_Radio_Channels 0002 Stats_Radio_CCA 0080 Stats_Iface_Contension 0008 Stats_Radio_Scan 0001 Stats_Radio 0020 Stats_Iface_Txrate 0010 Stats_Iface
+Roaming_Type Enum 0001 NCHO 0000 Legacy
+# Generated From fsm_signals/station_types.xml
+trace_types 23
+Trigger_Type Enum 0001 Type_B 0000 Type_A
+MLME_Frame_Type Enum 0002 Management 0003 All 0001 Data
+RICE_RADIO_STATE_T Enum 0002 rx_only 0001 rx_only_lp 0005 rxtx_ax 0003 rxtx_lp 0005 num_on_states 0004 rxtx 0000 off
+RICE_VIF_MODE_T Enum 0001 operational 0000 scan
+Basf_Status_Type Enum 0002 Teardown 0001 Fail 0003 Timeout 0000 Success
+Halradio_Log_Cap_format_T Enum 0005 num_cap_formats 0004 clipped_8_8 0002 rounding_10_10 0000 full_precision ffff max 0003 rounding_8_8 0001 floating_point
+Scan_Event_Type Enum 0002 active_scan_start 0001 passive_scan_end 0003 active_scan_end 0000 passive_scan_start
+Rice_Calibration_Wlan_Impact_Type Enum 0001 not_allowed 0000 not_affected
+Halradio_Log_Fsel_T Enum 0000 fsel_80 0001 fsel_40 ffff max 0002 fsel_20 0003 num_fsel
+Halradio_Log_Cap_Point_T Enum 0004 tx_dpd_out_iq 0001 tx_dac_q 003e max 0015 mac_phy_radio_debug_0 0011 dpd_tx1_rx2 0013 dpd_tx2_rx2 000f rx_mac 0009 rx_adc 0002 tx_dac_iq 001c capture_cest_stream_6_7 0005 tx_iq_chain_in_msbs 0000 tx_dac_i 0006 tx_iq_chain_in_lsbs 0016 bt_coex_debug 000e rx_ofdm_modem_input 0003 tx_in_iq 000b rx_bba_demap 001b capture_cest_stream_4_5 0019 capture_cest_stream_0_1 001d num_cap_points 0007 tx_mac 000c rx_ofdm_modem_msb_input 000d rx_cck_modem_input 0017 rfic_debug 0012 dpd_tx2_rx1 0008 dpd_tx3_rx2 0010 dpd_tx1_rx1 000a rx_comp_out 0018 mac_phy_radio_debug_1 0014 mac_phy_bb_debug 001a capture_cest_stream_2_3
+VIF_Register_Status_Type Enum 0002 Failed_Low_Resources 0001 Failed 0000 Success
+Triggered_Get_Type Enum 0000 rssi_snr_bound
+BLACKOUT_TYPE Enum 0001 LOCAL_DEVICE_ONLY 0004 QUIET_ELEMENT ffff ANY 0002 P2P
+Halradio_Log_Trig_T Enum 0023 event_match_3 001d max_phy_tx_pulse 001b max_phy_tx_en ffff max 001a max_phy_rx_en 0011 agc_lock 001c max_phy_rx_pulse 000d end_of_buffer 000e stf_sync 0019 plcp_crc_err 0002 noack 0013 end_of_ndp 0024 num_trigs 0017 stf_no_ltf 0009 bad_crc_cck_only 000f rci_sync 0008 ofdm_only 0000 none 0018 capture_timer_expired 0003 int 0005 short 0001 immediate 0020 event_match_0 0012 rx_payload_start 0006 bad_crc 0021 event_match_1 0010 rx_cca 0016 tx_end 000a bad_crc_ofdm_only 0014 rx_end 0004 sync 0022 event_match_2 000c interrupt 001e gpio 0015 tx_start 0007 cck_only 001f first_cest
+Conn_Security_Mode Enum 0000 OPEN 0001 PROTECTED
+Mbulk Natural32
+NAN_Role_Type Enum 0004 Non_Sync 0001 Anchor_Master 0000 Not_Set 0003 Sync 0002 Master
+BLACKOUT_SOURCE Enum 0000 DOT11_LOCAL_TSF 0002 OTHER_RADIO 0004 DOT11_LOCAL_SYSTIME
+BLACKOUT_ID Natural16
+VIF_Schedule_Type Enum 0002 fully_descheduled 0001 deschedule 0000 schedule
+Halradio_Log_Cap_Stream_T Enum 0006 dpd_spatial_stream_0_tx 0004 mimo_stream_1 ffff max 0008 spatial_stream_0_TXRX_DPD 0007 radio_logging_mimo_streams_0_1 0002 rsdb_siso_modem_0 000a num_stream_ids 0003 dpd_spatial_stream_0_rx 0000 single_stream_siso 0009 spatial_stream_1_TXRX_DPD 0001 mimo_stream_0 0005 rsdb_siso_modem_1
+Rice_Calibration_Bt_Impact_Type Enum 0004 not_allowed_and_bt_lo_needed 0003 not_allowed 0002 silence_needed 0000 not_affected 0001 receive_blocked
+VIX_BM_T VIX_BM_TYPE
+VIF_Schedule_Flags Enum 0004 honour_start_time 0080 schedule_exclusively 0002 schedule 20 rx_only 0008 non_operational_trim 0040 schedule_once 0001 clear_frames_after_deschedule 0010 get_scheduled_ind
+trace_types 1
+Boolean Enum 0000 False 0001 True
--- /dev/null
+signalid 360
+1000 MaUnitdata_request
+1002 MaSpare1_request
+1003 MaSpare2_request
+1004 MaSpare3_request
+1005 DataSpareSignal1_request
+1006 DataSpareSignal2_request
+1007 DataSpareSignal3_request
+1100 MaUnitdata_confirm
+1102 MaSpare1_confirm
+1103 MaSpare2_confirm
+1104 MaSpare3_confirm
+1105 DataSpareSignal1_confirm
+1106 DataSpareSignal2_confirm
+1107 DataSpareSignal3_confirm
+1200 MaSpare1_response
+1201 MaSpare2_response
+1202 MaSpare3_response
+1203 DataSpareSignal1_response
+1204 DataSpareSignal2_response
+1205 DataSpareSignal3_response
+1300 MaUnitdata_indication
+1301 MaBlockack_indication
+1302 MaSpare1_indication
+1303 MaSpare2_indication
+1304 MaSpare3_indication
+1305 DataSpareSignal1_indication
+1306 DataSpareSignal2_indication
+1307 DataSpareSignal3_indication
+2001 MlmeGet_request
+2002 MlmeSet_request
+2003 MlmePowermgt_request
+2004 MlmeAddInfoElements_request
+2005 MlmeAddScan_request
+2006 MlmeDelScan_request
+2007 MlmeAddVif_request
+2008 MlmeDelVif_request
+2009 MlmeStart_request
+200a MlmeSetChannel_request
+200b MlmeConnect_request
+200c MlmeReassociate_request
+200d MlmeRoam_request
+200e MlmeDisconnect_request
+200f MlmeRegisterActionFrame_request
+2010 MlmeSendFrame_request
+2011 MlmeResetDwellTime_request
+2012 MlmeSetTrafficParameters_request
+2013 MlmeDelTrafficParameters_request
+2014 MlmeSetPacketFilter_request
+2015 MlmeSetIpAddress_request
+2016 MlmeSetAcl_request
+2018 MlmeSetkeys_request
+201a MlmeGetKeySequence_request
+201c MlmeSetPmk_request
+201f MlmeSetCachedChannels_request
+2020 MlmeSetWhitelistSsid_request
+2021 MlmeTdlsAction_request
+2022 MlmeChannelSwitch_request
+2023 MlmeMonitorRssi_request
+2024 MlmeStartLinkStatistics_request
+2025 MlmeStopLinkStatistics_request
+2027 MlmeSetPnoList_request
+2028 MlmeHostState_request
+2029 MlmeAddRange_request
+202a MlmeDelRange_request
+202b MlmeSetNoa_request
+202c MlmeSetCtwindow_request
+202d MlmeNanStart_request
+202e MlmeNanConfig_request
+202f MlmeNanPublish_request
+2030 MlmeNanSubscribe_request
+2031 MlmeNanFollowup_request
+2032 MlmeUnsetChannel_request
+2033 MlmeSetCountry_request
+2034 MlmeForwardBeacon_request
+2035 MlmeNdpRequest_request
+2036 MlmeNdpResponse_request
+2037 MlmeNdpTerminate_request
+203a MlmeSpare4_request
+203b MlmeSpare5_request
+203c MlmeSpare6_request
+203d MlmeInstallApf_request
+203e MlmeReadApf_request
+203f MlmeSetNumAntennas_request
+2040 MlmeArpDetect_request
+2041 MlmeSetRoamingType_request
+2042 MlmeSetBand_request
+2101 MlmeGet_confirm
+2102 MlmeSet_confirm
+2103 MlmePowermgt_confirm
+2104 MlmeAddInfoElements_confirm
+2105 MlmeAddScan_confirm
+2106 MlmeDelScan_confirm
+2107 MlmeAddVif_confirm
+2108 MlmeDelVif_confirm
+2109 MlmeStart_confirm
+210a MlmeSetChannel_confirm
+210b MlmeConnect_confirm
+210c MlmeReassociate_confirm
+210d MlmeRoam_confirm
+210e MlmeDisconnect_confirm
+210f MlmeRegisterActionFrame_confirm
+2110 MlmeSendFrame_confirm
+2111 MlmeResetDwellTime_confirm
+2112 MlmeSetTrafficParameters_confirm
+2113 MlmeDelTrafficParameters_confirm
+2114 MlmeSetPacketFilter_confirm
+2115 MlmeSetIpAddress_confirm
+2116 MlmeSetAcl_confirm
+2118 MlmeSetkeys_confirm
+211a MlmeGetKeySequence_confirm
+211c MlmeSetPmk_confirm
+211f MlmeSetCachedChannels_confirm
+2120 MlmeSetWhitelistSsid_confirm
+2121 MlmeTdlsAction_confirm
+2122 MlmeChannelSwitch_confirm
+2123 MlmeMonitorRssi_confirm
+2124 MlmeStartLinkStatistics_confirm
+2125 MlmeStopLinkStatistics_confirm
+2127 MlmeSetPnoList_confirm
+2128 MlmeHostState_confirm
+2129 MlmeAddRange_confirm
+212a MlmeDelRange_confirm
+212b MlmeSetNoa_confirm
+212c MlmeSetCtwindow_confirm
+212d MlmeNanStart_confirm
+212e MlmeNanConfig_confirm
+212f MlmeNanPublish_confirm
+2130 MlmeNanSubscribe_confirm
+2131 MlmeNanFollowup_confirm
+2132 MlmeUnsetChannel_confirm
+2133 MlmeSetCountry_confirm
+2134 MlmeForwardBeacon_confirm
+2135 MlmeNdpRequest_confirm
+2136 MlmeNdpResponse_confirm
+2137 MlmeNdpTerminate_confirm
+213a MlmeSpare4_confirm
+213b MlmeSpare5_confirm
+213c MlmeSpare6_confirm
+213d MlmeInstallApf_confirm
+213e MlmeReadApf_confirm
+213f MlmeSetNumAntennas_confirm
+2140 MlmeArpDetect_confirm
+2141 MlmeSetRoamingType_confirm
+2142 MlmeSetBand_confirm
+2200 MlmeConnect_response
+2201 MlmeConnected_response
+2202 MlmeReassociate_response
+2203 MlmeRoamed_response
+2204 MlmeTdlsPeer_response
+2205 MlmeSynchronised_response
+2206 MlmeSpare2_response
+2207 MlmeSpare3_response
+2208 MlmeSpare4_response
+2300 MlmeScan_indication
+2301 MlmeScanDone_indication
+2302 MlmeListenEnd_indication
+2303 MlmeConnect_indication
+2304 MlmeConnected_indication
+2305 MlmeReassociate_indication
+2306 MlmeRoam_indication
+2307 MlmeRoamed_indication
+2308 MlmeDisconnect_indication
+2309 MlmeDisconnected_indication
+230a MlmeProcedureStarted_indication
+230b MlmeMicFailure_indication
+230c MlmeFrameTransmission_indication
+230d MlmeReceivedFrame_indication
+230f MlmeTdlsPeer_indication
+2312 MlmeRssiReport_indication
+2313 MlmeAcPriorityUpdate_indication
+2314 MlmeRange_indication
+2315 MlmeRangeDone_indication
+2316 MlmeEventLog_indication
+2317 MlmeNanEvent_indication
+2318 MlmeNanService_indication
+2319 MlmeNanFollowup_indication
+231a MlmeChannelSwitched_indication
+231b MlmeSynchronised_indication
+231c MlmeBeaconReportingEvent_indication
+231d MlmeSpare3_indication
+231e MlmeSpare4_indication
+231f MlmeNdpRequest_indication
+2320 MlmeNdpRequested_indication
+2321 MlmeNdpResponse_indication
+2322 MlmeNdpTerminate_indication
+2323 MlmeNdpTerminated_indication
+2324 MlmeSpare5_indication
+8000 DebugSpare1_request
+8001 DebugSpare2_request
+8002 DebugSpare3_request
+8003 DebugSpareSignal1_request
+8004 DebugSpareSignal2_request
+8005 DebugSpareSignal3_request
+8100 DebugSpare1_confirm
+8101 DebugSpare2_confirm
+8102 DebugSpare3_confirm
+8103 DebugSpareSignal1_confirm
+8104 DebugSpareSignal2_confirm
+8105 DebugSpareSignal3_confirm
+8200 DebugSpare1_response
+8201 DebugSpare2_response
+8202 DebugSpare3_response
+8203 DebugSpareSignal1_response
+8204 DebugSpareSignal2_response
+8205 DebugSpareSignal3_response
+8301 DebugWord12_indication
+8302 DebugFault_indication
+8303 DebugWords_indication
+8304 DebugSpare2_indication
+8305 DebugSpare3_indication
+8306 DebugSpare4_indication
+8307 DebugSpareSignal1_indication
+8308 DebugSpareSignal2_indication
+8309 DebugSpareSignal3_indication
+9000 TestBlockRequests_request
+9001 TestPanic_request
+9002 TestSuspend_request
+9003 TestResume_request
+9004 RadioLogging_request
+9005 WlanliteCwStart_request
+9006 WlanliteCwStop_request
+9007 WlanliteTxSetParams_request
+9008 WlanliteTxStart_request
+9009 WlanliteTxRead_request
+900a WlanliteTxStop_request
+900b WlanliteRxStart_request
+900c WlanliteRxRead_request
+900d WlanliteRxStop_request
+900e WlanliteStatus_request
+900f TestPmalloc_request
+9010 TestConfigureMonitorMode_request
+9012 TestCheckFwAlive_request
+9013 DebugGeneric_request
+9014 DebugPktSinkStart_request
+9015 DebugPktSinkStop_request
+9016 DebugPktSinkReport_request
+9017 DebugPktGenStart_request
+9018 DebugPktGenStop_request
+9019 DebugPktGenReport_request
+901a WlanliteRadioSelect_request
+901b TestHipTesterStart_request
+901c TestHipTesterStop_request
+901d TestHipTesterSetParams_request
+901e TestHipTesterReport_request
+901f TestBistGetTxGain_request
+9020 TestSpare1_request
+9021 TestSpare2_request
+9022 TestSpare3_request
+9023 TestSpareSignal1_request
+9024 TestSpareSignal2_request
+9025 TestSpareSignal3_request
+9100 RadioLogging_confirm
+9101 WlanliteCwStart_confirm
+9102 WlanliteTxSetParams_confirm
+9103 WlanliteCwStop_confirm
+9104 WlanliteTxStart_confirm
+9105 WlanliteTxRead_confirm
+9106 WlanliteTxStop_confirm
+9107 WlanliteRxStart_confirm
+9108 WlanliteRxRead_confirm
+9109 WlanliteRxStop_confirm
+910a WlanliteStatus_confirm
+910b TestPmalloc_confirm
+910c TestConfigureMonitorMode_confirm
+910e TestCheckFwAlive_confirm
+910f TestSuspend_confirm
+9110 TestResume_confirm
+9111 DebugGeneric_confirm
+9112 WlanliteRadioSelect_confirm
+9113 TestHipTesterStart_confirm
+9114 TestHipTesterStop_confirm
+9115 TestHipTesterSetParams_confirm
+9116 TestBistGetTxGain_confirm
+9117 TestSpare1_confirm
+9118 TestSpare2_confirm
+9119 TestSpare3_confirm
+911a TestSpareSignal1_confirm
+911b TestSpareSignal2_confirm
+911c TestSpareSignal3_confirm
+9200 TestSpare1_response
+9201 TestSpare2_response
+9202 TestSpare3_response
+9203 TestSpareSignal1_response
+9204 TestSpareSignal2_response
+9205 TestSpareSignal3_response
+9300 RadioLogging_indication
+9301 DebugGeneric_indication
+9302 DebugPktSinkReport_indication
+9303 DebugPktGenReport_indication
+9304 TestHipTesterReport_indication
+9305 TestSpare1_indication
+9306 TestSpare2_indication
+9307 TestSpare3_indication
+9308 TestSpareSignal1_indication
+9309 TestSpareSignal2_indication
+930a TestSpareSignal3_indication
+a202 WlanliteRadioCalibration_indication
+a203 WlanliteReserveRadioForCalibration_indication
+a204 WlanliteReserveRadioForCalibration_response
+a205 WlanliteRadioCalibrationDone_indication
+a206 WlanliteRadioCalibrationDone_response
+a207 WlanliteTxTimer_indication
+a252 RiceChangeFsmParams_request
+a253 RiceInitialise_request
+a254 RiceInitialise_confirm
+a255 RiceChangeRadioState_request
+a256 RiceChangeRadioState_confirm
+a257 RiceRadioDpdDone_response
+a258 RiceRadioLog_request
+a259 RicePhyEventLog_request
+a25a RiceRadioNudgeNannyTimer_request
+a25b RiceRadioEvaluateNanny_request
+a25c RiceRadioEvaluateNanny_confirm
+a25d RiceReserveRadioForCalibration_indication
+a25e RiceRadioCalibrationDone_indication
+a25f RiceAbortRadioCalibration_request
+a260 RiceReserveRadioForCalibration_response
+a261 RiceNannyTimer_indication
+a262 RiceSwitchOnTimer_indication
+a263 RiceRadioLogTimer_indication
+a264 RiceRadioDeinit_indication
+a422 RameMsgDelba_confirm
+a423 RameMsgRadioOffDplpOff_indication
+a424 RameMsgRadioOnDplpOn_indication
+a425 RameMsgRadioSwitchChannelDplpOff_indication
+a426 RameMsgRxActivityOccurred_indication
+a427 RameMsgDplpVifDelete_confirm
+a428 RameMsgVifCheckClear_indication
+a429 RameMsgVifAnnounceAvailability_indication
+a42a RameMsgPsUpdate_indication
+a42b RameMsgTdlsPeerSp_indication
+a42c RameMsgTdlsPsUpdate_indication
+a42d RameMsgNullAnnounceFrameProcessed_indication
+a42e RameMsgPersistentFrameProcessed_indication
+a42f RameMsgCtsAnnounceFrameProcessed_indication
+a430 RameMsgFrameRx_indication
+a431 RameMsgMm_confirm
+a432 RameMsgPsServTriggered_indication
+a433 RameMsgPsServEnd_indication
+a434 RameMsgSpuriousMorebit_indication
+a435 RameMsgMcastServiceEnd_indication
+a436 RameMsgBeaconTxFinished_indication
+a437 RameMsgNanSdfCallback_confirm
+a438 RameMsgPsPollTxFinished_indication
+a439 RameMsgPeerPsStateUpdate_indication
+a43a RameMsgSendNullFrame_request
+a43b RameMsgBaTxError_indication
+a43c RameMsgPauseResumeDplp_confirm
+a43d RameMsgDpdFrameProcessed_indication
+a43e RameMsgFrameTxFinished_indication
+a43f RameMsgStaKeepaliveTxFinished_indication
+a440 RameMsgRadioReady_indication
+a4c2 RameRiceRadioSetupDone_indication
+a4c3 RameRiceRadioCalib_request
+a4c4 RameRiceRadioCalibDone_indication
+a4c5 RameRiceRadioChangeStateDone_confirm
+a4c6 RameRiceRadioChangeStateOffDone_confirm
+a4d2 RameRadioChangeState_request
+a4d3 RameRadioOff_request
+a4d4 RameRadioPerformDpd_request
+pid 8
+4000 rice_radio_fsm[0] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4001 rice_radio_fsm[1] 0007 block_until_setup idle_off switching_on idle_on trim_on turning_off_external turning_off_internal
+4002 rice_mgr_fsm 0008 not_initialised initialising idle changing_state trimming retrimming dpd nanny
+4003 macrame_radio_ctl[0] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4004 macrame_radio_ctl[1] 0004 Idle WaitForRadioOn WaitForRadioOff DpdOngoing
+4005 wlanlite_conn_fsm[0] 0008 Idle Rx_Running Tx_Running Cw_Running BIST_Running Tx_Pausing Tx_Paused Tx_Stopped
+4006 wlanlite_conn_fsm[1] 0008 Idle Rx_Running Tx_Running Cw_Running BIST_Running Tx_Pausing Tx_Paused Tx_Stopped
+4007 wlanlite_mgr_fsm 0004 Idle Do_Conn_Cmd Radio_Trim Radio_Retrim
+faultid 596
+2000 DPLANE_RX_PDU_LOST
+2001 DPLANE_RECEIVED_FRAME_FROM_OWN_MAC_ADDR
+2002 DPLANE_ENCPTION_NO_KEY_FOUND
+2003 DPLP_MPDU_LOST
+2004 DPLANE_PROTECTION
+2005 DPLANE_FALLBACK_CREATE_TBL
+2006 DPLANE_MIB
+2007 DPLANE_RX_RESOURCE_LOW
+2008 DPLANE_BLOCK_ACK_REQ_UNKNOWN_STA
+2009 DPLANE_BLOCK_ACK_REQ_NOT_COMPRESSED
+200a DPLANE_BLOCK_ACK_REQ_NO_STREAM
+200b DPLANE_BLOCK_ACK_REQ_STALE_BUNS
+200c DPLANE_BLOCK_ACK_REQ_WRONG_DEST
+200d DPLANE_BLOCK_ACK_RX_NO_MATCH
+200e DPLANE_BLOCK_ACK_MISSING
+200f DPLANE_NO_KEY_FOR_PMF
+2010 DPLANE_BFMEE_UNSUPPORTED_VIF_TYPE
+2011 DPLANE_BFMEE_TOO_MANY_INTERFACES
+2012 DPLANE_BFMEE_UNKNOWN_MODULATION
+2013 DPLANE_BFMEE_UNDERFLOW
+2014 DPLANE_FBMEE_UNKNOWN_MAC_STATUS
+2015 DPLANE_BFMEE_BAD_STATE_TRANSITION
+2016 DPLANE_MM_CONFIRM_ASOC_REQ
+2017 DPLANE_MM_CONFIRM_ASOC_RSP
+2018 DPLANE_MM_CONFIRM_REASOC_REQ
+2019 DPLANE_MM_CONFIRM_REASOC_RSP
+201a DPLANE_MM_CONFIRM_PROBE_REQ
+201b DPLANE_MM_CONFIRM_PROBE_RSP
+201c DPLANE_MM_CONFIRM_MGMT6
+201d DPLANE_MM_CONFIRM_MGMT7
+201e DPLANE_MM_CONFIRM_BEACON
+201f DPLANE_MM_CONFIRM_ATIM
+2020 DPLANE_MM_CONFIRM_DISASOC
+2021 DPLANE_MM_CONFIRM_AUTH
+2022 DPLANE_MM_CONFIRM_DEAUTH
+2023 DPLANE_MM_CONFIRM_ACTION
+2024 DPLANE_MM_CONFIRM_MGMT14
+2025 DPLANE_MM_CONFIRM_MGMT15
+2026 DPLANE_MM_CONFIRM_NOT_MGMT
+2027 DPLANE_UNKNOWN_DUD_REQUEST_TYPE
+2028 DPLANE_MA_PACKET_REQ_WARN
+2029 DPLANE_UNABLE_TO_MALLOC
+202a DPLANE_LINK_ADAPT_PDU_RETRIES_TOO_HIGH
+202b DPLANE_IQ_CAPTURE_TOO_MANY_REQUESTS
+202c DPLANE_FILTER_FWCALLBACK_NO_MEM
+202d DPLANE_PPDU_STATS_DROPPED
+202e DPLANE_REPLAY_NULL_KEY
+202f DPLANE_REPLAY_SUSPECTED_ATTACK
+2030 DPLANE_BEAMFORMER
+2031 DPLANE_BEAMFORMER_INVALID_PEER
+2032 DPLANE_FRAG_SEQ_FOR_PATCH_NOT_FOUND
+2033 DPLANE_FAILED_TO_ALLOCATE_AMSDU_TCM
+2034 DPLANE_BFEE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2035 DPLANE_RX_ACT_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2036 DPLANE_MSG_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2037 DPLANE_RATE_ALERT_DPHP_WHILE_MACS_TURNED_OFF
+2038 DPLANE_CANCEL_NO_RESP
+2039 DPLANE_FRAME_TX_DPIF_DEST_Q_FULL
+203a DPLANE_FRAME_TX_PPDU_CREATE_FAILED
+203b DPLANE_FRAME_TX_MPDU_LIST_CREATE_FAILED
+203c DPLANE_FRAME_TX_UNSPECIFIED_FAILURE
+203d DPLANE_DEADLINE_STOP_REQUESTED_WITH_ONE_ACTIVE
+203e DPLANE_DEADLINE_CANNOT_CREATE
+203f DPLANE_DEADLINE_TX_TIMED_REQUESTED_WHILE_ONE_ACTIVE
+2040 DPLANE_PROTECTION_5g_11b
+2041 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2042 DPLP_PPDU_ALLOC_FAILED
+2043 DPLANE_LAA_LOWER_SPECULATED_RATE
+2044 DPLP_Q_SLOT_PPDU_STATUS_UNEXPECTED
+2045 FAILED_TO_FORWARD_TO_MACRAME
+2046 DPLANE_DEADLINE_STOP_REQUESTED_IN_PAST
+2047 DPLANE_UNABLE_TO_RESUME_MAC
+2049 DPLANE_BFEE_INVALID_PEER
+2050 DPLANE_BFER_INVALID_PEER
+2051 DPLANE_RX_FTM_FAILURE
+2200 DPHP_DMA_NONRECOVERABLE_TIMEOUT
+2201 DPHP_SLOT_STUCK_LOCKUP
+2202 DPHP_SLOT_CANCEL_LOCKUP
+2300 RAME_RATES
+2301 RAME_INVALID_BO_ID
+2302 RAME_ENCRYPTION_KEY
+2303 RAME_INCOMPATIBLE_REG_DOMAINS
+2304 RAME_INVALID_BA
+2305 RAME_INVALID_BAINFO
+2306 RAME_CHANGE_MODE_PS_TO_FPS
+2307 RAME_INVALID_GO_BEACON_DRIFT_VALUE
+2308 RAME_INVALID_SET_PEER_CHANNEL_REQUEST
+2309 RAME_INVALID_SCHED_REQUEST
+230a RAME_COEX_BLACKOUT_ATTACH_INVALID_VIF
+230b RAME_ENCRYPTION_KEYFIND_FAIL
+230c RAME_SET_QOS_INVALID_STA
+230d RAME_MLME_TX_FRAME_REQUEST_WITH_NULL_MBULK
+230e RAME_STA_DOUBLE_ADD
+230f RAME_SCHDL_UNEXPECTED_RESUME_REQUEST
+2310 RAME_SCHDL_UNEXPECTED_SIGNAL
+2311 RAME_COEX_BLACKOUT_ATTACH_FAILED
+2312 RAME_MLME_FRAME_DISCARDED
+2313 RAME_UNEXPECTED_SIGNAL
+2314 RAME_COEX_IDLE_EXIT_FORCED
+2315 RAME_RADIO_UNEXPECTED_SIGNAL
+2316 RAME_EARLIEST_TOO_LATE
+2317 RAME_USING_FORCED_CHANNEL_BW
+2318 RAME_NO_CCK_MODEM
+2319 RAME_BEACON_TX_SW_DEADLINE_MISSED
+231a RAME_RADIOMAC_SWITCH_FAILED
+231b RAME_RADIOMAC_SWITCH_OFF_FAILED
+231c RAME_IQ_RESOURCE_UNAVAILABLE
+231d RAME_IQ_INVALID_PARAM
+231e RAME_INVALID_ANTENNA_CONFIG
+231f SCHDL_UNEXPECTED_START_IND
+2320 RAME_FTM_INVALID_DFE_CONFIG
+2321 RAME_FTM_INVALID_BANDWIDTH_CONFIG
+2322 RAME_CALIB_UNEXPECTED_SIGNAL
+2323 RAME_SCAN_BLOCKED_BY_NUM_VIFS
+2500 MLME_WIFI_LOGGER_JAMMER_LIKELY_PRESENT
+2501 MLME_WIFI_LOGGER_NO_MEM
+2510 MLME_AP_CONNECTED_RSP_UNEXPECTED
+2511 MLME_AP_DISCARDED_DISCONNECTION_FRAME
+2512 MLME_AP_UNHANDLED_MM_FRAME_IND
+2513 MLME_AP_PMKID_COULD_NOT_BE_COMPUTED
+2514 MLME_AP_PROVIDED_PMKIDS_ARE_INVALID
+2515 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD
+2516 MLME_AP_RAME_MM_CFM_NO_PEER_RECORD_WRONG_STATE
+2517 MLME_AP_SA_QUERY_IND_NO_PEER_RECORD
+2530 MLME_BA_EXTRA_DELETE_CONFIRM
+2531 MLME_BA_TX_RES_POLICY_INVALID
+2532 MLME_BA_NO_PEER_FOUND
+2533 MLME_BA_TX_ADD_NOT_ALLOWED_NAN_TOO_MANY
+2534 MLME_BA_RX_ADD_REJECTED_MIB
+2535 MLME_BA_RX_ADD_REJECTED_RAME
+2536 MLME_BA_RX_ADD_REJECTED_HT
+2537 MLME_BA_RX_SPAREA
+2538 MLME_BA_RX_ADD_INVALID_REQ
+2539 MLME_BA_TX_ADD_NOT_ALLOWED_MIB
+253a MLME_BA_TX_ADD_NOT_ALLOWED_TOO_MANY
+253b MLME_BA_TX_ADD_NOT_ALLOWED_HT
+253c MLME_BA_TX_ADD_INVALID_REQ
+253d MLME_BA_TX_ADD_WITHOUT_PEER
+253e MLME_BA_TX_RES_MACRAME_BLOCKED
+253f MLME_BA_TX_RES_PID_MISMATCH
+2550 MLME_CONMGR_AP_REJECTED_US
+2551 MLME_CONMGR_CONNECTION_ATTEMPT_ABORTED
+2553 MLME_CONMGR_ASSOC_VERIFICATION_FAILED
+2556 MLME_CONMGR_FAILED_TO_SEND_ASSOC
+2559 MLME_CONMGR_MBULK_ALLOC_FAILURE
+255a MLME_CONMGR_TIMEOUT
+255b MLME_CONMGR_TX_OR_TIMEOUT
+2570 MLME_FRAME_BSSID_NOT_INDIVIDUAL
+2571 MLME_FRAME_BUILD_INCR_MBULK_ALLOC_FAILED
+2572 MLME_FRAME_BUILD_INCR_NULL_FRAME
+2573 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_SUBTYPE
+2574 MLME_FRAME_DATA_GET_HDR_SIZE_INVALID_TYPE
+2575 MLME_FRAME_DATA_GET_PRI_INVALID_SUBTYPE
+2576 MLME_FRAME_DATA_GET_PRI_INVALID_TYPE
+2577 MLME_FRAME_DATA_PACKET_NULL_PTR
+2578 MLME_FRAME_FAILED_VALIDATION_CODE
+2579 MLME_FRAME_GET_BSSID_UNEXPECTED_DS
+257a MLME_FRAME_GET_DA_UNEXPECTED_DS
+257b MLME_FRAME_GET_SA_UNEXPECTED_DS
+257c MLME_FRAME_HEADER_INVALID_TYPE
+257d MLME_FRAME_ICMP6_CHECKSUM_MALLOC_ERR
+257e MLME_FRAME_MBULK_SIZE_NOT_ENOUGH
+257f MLME_FRAME_RM_RM_REPORT_INVALID_ELEMENTS
+2580 MLME_FRAME_RM_RM_REPORT_NO_MEASUREMENT_REPORT
+2581 MLME_FRAME_TDLS_GET_ACTION_OFFSET_INVALID_SUBTYPE
+2582 MLME_FRAME_TDLS_GET_ELEMENT_OFFSET_INVALID_ACTION
+2583 MLME_FRAME_UNEXPECTED_MGT_FRAME
+2584 MLME_FRAME_ALLOC_FAILED
+2585 MLME_FRAME_CRITICAL_PARAM_IE_LENGTH_ERROR
+2586 MLME_FRAME_NAN_SDF_WITH_NO_PAYLOAD
+25a0 MLME_IE_RSN_INVALID_LENGTH
+25a1 MLME_IE_COUNTRY_INVALID_LENGTH_OUT_OF_RANGE
+25a2 MLME_IE_COUNTRY_INVALID_LENGTH_PADDING
+25a3 MLME_IE_RATE_INVALID_RATE_1
+25a4 MLME_IE_RATE_INVALID_RATE_2
+25a5 MLME_IE_RATE_INVALID_RATE_3
+25a6 MLME_IE_RSN_INVALID_AKM_COUNT
+25a7 MLME_IE_RSN_INVALID_CAPS_LENGTH
+25a8 MLME_IE_RSN_INVALID_PAIRWISE_COUNT
+25a9 MLME_IE_RSN_NO_AKM_SUITE
+25aa MLME_IE_CRITICAL_PARAM_LENGTH_ERROR
+25ab MLME_IE_RSN_INVALID_PMKID_COUNT
+25ac MLME_IE_RSN_INVALID_VERSION
+25ad MLME_IE_RSN_INVALID_PMF_SETTINGS
+25ae MLME_IE_RSN_CORRUPT_AKM_SUITE
+25af MLME_IE_RSN_INVALID_PARWISE_CIPHER_COUNT
+25b1 MLME_IE_RSN_INVALID_GROUP_CIPHER_SIZE
+25b2 MLME_IE_RSN_NO_PAIRWISE_CIPHER_SUITE
+25c0 MLME_MEASUREMENTS_MBULK_ALLOC_FAILURE
+25c1 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_FAIL
+25c2 MLME_MEASUREMENTS_MBULK_RM_BEACON_REPORT_LEAK
+25c3 MLME_MEASUREMENTS_MBULK_RM_BEACON_REQUEST_LEAK
+25c4 MLME_MEASUREMENTS_MBULK_RM_LM_REPORT_FAIL
+25c5 MLME_MEASUREMENTS_MBULK_SCAN_IES_ALLOC_FAIL
+25d0 MLME_MPDU_ROUTER_INVALID_FRAME_DISCARDED
+25d1 MLME_MPDU_ROUTER_REGISTER_INVALID_NO_BUFFER_MEMORY
+25e0 MLME_NAN_CONFIG_TLV_DOES_NOT_EXIST
+25e1 MLME_NAN_INVALID_MAC_ADDR_RANDOMISATION_INTERVAL
+25e2 MLME_NAN_INVALID_MASTER_PREFERENCE_VALUE
+25e3 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_2
+25e4 MLME_NAN_MATCH_MBULK_ALLOC_FAILURE_1
+25e5 MLME_NAN_MBULK_SCAN_IES_ALLOC_FAIL
+25e6 MLME_NAN_PUBLISH_NODE_ALLOC_FAILURE
+25e7 MLME_NAN_INVALID_SERVICE_DESCRIPTOR
+25e8 MLME_NAN_MATCH_NODE_ALLOC_FAILURE
+25e9 MLME_NAN_INVALID_BAND_CONFIG
+25ea MLME_NAN_UNEXPECTED_AMR_UPDATE_FLAGS
+2600 MLME_REGULATORY_20_MHZ_CHANNEL_WIDTH_NOT_FOUND
+2601 MLME_REGULATORY_BAD_CHANNEL_CENTRE_FREQUENCY
+2602 MLME_REGULATORY_COUNTRY_NOT_FOUND_USE_WORLD
+2603 MLME_REGULATORY_DEFAULT_CASE_SHOULD_NOT_HAPPEN
+2604 MLME_REGULATORY_FAILED_TO_MATCH_COUNTRY_CODE_FOR_EVALUATED_IDX
+2605 MLME_REGULATORY_SET_COUNTRY_REQ_IS_INVALID_USE_WORLD
+2607 MLME_REGULATORY_OPERATING_CLASS_TABLE_READ_FAILURE
+2608 MLME_REGULATORY_NO_MEM
+2610 MLME_REQUESTS_VIF_INCOMPATIBLE_FOR_SINGAL
+2611 MLME_REQUESTS_MIB_MBULK_GET_CFM_ALLOC_FAIL
+2612 MLME_REQUESTS_MIB_MBULK_SET_CFM_ALLOC_FAIL
+2613 MLME_REQUESTS_MISSING_MANDATORY_MBULK
+2614 MLME_REQUESTS_NO_DESTINATION_FOR_VIF_IN_SIGNAL
+2615 MLME_REQUESTS_SPURIOUS_MBULK_IN_SIGNAL
+2620 MLME_ROAMING_MBULK_SCAN_IES_ALLOC_FAIL
+2621 MLME_ROAMING_MBULK_CANDIDATE_ALLOC_FAIL
+2630 MLME_SA_QUERY_NO_PEER_RECORD
+2631 MLME_SA_QUERY_NO_BUFFER_IN_FRAME_INDICATION
+2642 MLME_SCAN_DESC_LIST_AP_THRESHOLD_DIFFERS
+2643 MLME_SCAN_DESC_LIST_IE_INVALID_LENGTH
+2644 MLME_SCAN_DESC_LIST_RSSI_THRESHOLD_INVALID
+2648 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_SPS
+264e MLME_SCAN_ERROR_IN_GET_NEXT_CHANNEL
+264f MLME_SCAN_SPAREB
+2655 MLME_SCAN_IGNORING_SCHED_IND
+2656 MLME_SCAN_ADD_INVALID_NO_MEM_FOR_LISTS
+2658 MLME_SCAN_MORE_THAN_ONE_PRIORITY_PAUSE
+2659 MLME_SCAN_NO_CHANNELS_SCANNED
+265a MLME_SCAN_NO_MEDIUM_ENABLED_TEST_USE_ONLY_1
+265b MLME_SCAN_NO_MEMORY_FOR_SCAN_FRAME_DETAILS
+265c MLME_SCAN_ADD_INVALID_NO_CHANNELS
+265d MLME_SCAN_NO_MEM_FOR_LOST_AP_DATA_REF
+265e MLME_SCAN_NO_MEM_FOR_SIGNIFICANT_CHANGE_DATA_REF
+265f MLME_SCAN_NO_MEDIUM_TEST_MODE
+2660 MLME_SCAN_SPAREC
+2661 MLME_SCAN_UNPAUSE_WHEN_NOT_PAUSED
+2662 MLME_SCAN_UNSUPPORTED_CHANNEL
+2664 MLME_SCAN_VERIFICATION_DEVICE_ADDRESS_INVALID
+2665 MLME_SCAN_VERIFICATION_DUPLICATED_WILDCARD_SSID
+2666 MLME_SCAN_VERIFICATION_SCAN_ID_INVALID
+2667 MLME_SCAN_VERIFICATION_IES_TOO_LONG
+2668 MLME_SCAN_VERIFICATION_IE_BUFFER_CORRUPT
+266a MLME_SCAN_VERIFICATION_IE_MISSING_BSSID_IE
+266b MLME_SCAN_VERIFICATION_IE_NOT_RECOGNISED
+266c MLME_SCAN_VERIFICATION_IE_NO_CHANNEL_OR_BSSID_LIST
+266d MLME_SCAN_VERIFICATION_IE_NO_SCAN_TIMING
+266e MLME_SCAN_VERIFICATION_IE_TO_SMALL
+2670 MLME_SCAN_VERIFICATION_INVALID_CHANNEL_COUNT
+2671 MLME_SCAN_VERIFICATION_INVALID_POLICY
+2672 MLME_SCAN_VERIFICATION_INVALID_POLICY_1
+2673 MLME_SCAN_VERIFICATION_INVALID_POLICY_2
+2674 MLME_SCAN_VERIFICATION_INVALID_REPORT_BITMAP
+2675 MLME_SCAN_VERIFICATION_INVALID_SCAN_TYPE
+2676 MLME_SCAN_VERIFICATION_MULTIPLE_CHANNEL_LISTS
+2677 MLME_SCAN_VERIFICATION_NEIGHBOUR_DL_IE_INVALID
+2678 MLME_SCAN_VERIFICATION_SSID_FILTER_IE_INVALID_LENGTH
+2679 MLME_SCAN_VERIFICATION_SSID_IE_INVALID_LENGTH
+267a MLME_SCAN_VERIFICATION_TIMING_IE_INVALID
+267b MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_1
+267c MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_2
+267d MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_3
+267e MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_4
+267f MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_5
+2680 MLME_SCAN_VERIFICATION_TIMING_IE_INVALID_6
+2681 MLME_SCAN_VERIFICATION_NCHO_SCAN
+2682 MLME_SCAN_DISABLED_IN_SPS
+2683 MLME_SCAN_CALLBACK_INVALID
+2684 MLME_SCAN_VERIFICATION_SSID_DESCRIPTOR_INVALID_LENGTH
+26a0 MLME_SECURITY_EAPOL_NO_PEER_FOUND
+26a1 MLME_SECURITY_EAPOL_UNEXPECTED_SECURITY_SUITE
+26a2 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK
+26a3 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_LEN
+26a4 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_1
+26a5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_LEN
+26a6 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_IGTK_UNWRAP_FAILURE
+26a7 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R0KHID
+26a8 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_R1KH_ID
+26a9 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_1
+26aa MLME_SECURITY_FT_AUTH_VALIDATION_MDE_BAD_MDID
+26ab MLME_SECURITY_FT_AUTH_VALIDATION_MIC_CMP_FAILURE
+26ac MLME_SECURITY_FT_AUTH_VALIDATION_NO_FTE
+26ad MLME_SECURITY_FT_AUTH_VALIDATION_NO_MDE
+26ae MLME_SECURITY_FT_AUTH_VALIDATION_NO_RSN
+26b0 MLME_SECURITY_MBULK_ALLOC_FAILURE
+26b1 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_1
+26b2 MLME_SECURITY_NO_MEM_FOR_ANONCE
+26b3 MLME_SECURITY_WRONG_EAPOL_TYPE
+26b4 MLME_SECURITY_NO_MEM_EAPOL_G1_KEY_DECRYPT_2
+26b5 MLME_SECURITY_FT_AUTH_VALIDATION_FTE_SNONCE_2
+26b6 MLME_SECURITY_FT_UNKNOWN_MIC_LEN
+26b7 MLME_SECURITY_M3_PROCESSING_FAILURE
+26bf MLME_SECURITY_FT_AUTH_VALIDATION_FTE_GTK_UNWRAP_FAILURE_2
+26d0 MLME_TDLS_SPAREA
+26d1 MLME_TDLS_DISCOVERY_REQUEST_LINKID_INVALID
+26d2 MLME_TDLS_DISCOVERY_REQUEST_NOT_ALLOWED
+26d3 MLME_TDLS_DISCOVERY_RESPONSE_DIALOG_TOKEN_INVALID
+26d4 MLME_TDLS_DISCOVERY_RESPONSE_LINKID_INVALID
+26d5 MLME_TDLS_DISCOVERY_RESPONSE_UNEXPECTED
+26d6 MLME_TDLS_IS_NOT_ACTIVATED
+26d7 MLME_TDLS_LINK_IS_NOT_ESTABLISHED
+26d8 MLME_TDLS_LINK_IS_NULL
+26d9 MLME_TDLS_NO_FREE_SLOT
+26da MLME_TDLS_PEER_NOT_FOUND_1
+26db MLME_TDLS_PEER_NOT_FOUND_2
+26dc MLME_TDLS_RAME_CFM_PEER_NOT_FOUND
+26dd MLME_TDLS_SETUP_CONFIRM_DIALOG_INVALID
+26de MLME_TDLS_SETUP_CONFIRM_LINKID_INVALID
+26df MLME_TDLS_SETUP_CONFIRM_REJECTED
+26e0 MLME_TDLS_SETUP_CONFIRM_TPK_INVALID
+26e1 MLME_TDLS_SETUP_CONFIRM_WRONG_STATE
+26e2 MLME_TDLS_SETUP_REQUEST_DISCARDED_CONFIRM
+26e3 MLME_TDLS_SETUP_REQUEST_MAX_LINKS
+26e4 MLME_TDLS_SETUP_REQUEST_SETUP_IN_PROGRESS
+26e5 MLME_TDLS_SETUP_RESPONSE_INVALID
+26e6 MLME_TDLS_SETUP_RESPONSE_SECURITY_INVALID
+26e7 MLME_TDLS_SETUP_RESPONSE_WRONG_STATE
+26e8 MLME_TDLS_UNKNOWN_ACTION_TYPE
+26ea MLME_TDLS_TERMINATE_ADDRESS_UNKNOWN
+2700 RADIO_WL_RX_COMP
+2701 RADIO_RX_DCOC_TIMEOUT
+2702 RADIO_DPD_GAIN_ALIGN_PATH_ZERO
+2703 RADIO_BAD_BB_SAMPLE_OFFSET_SHORT_GI
+2704 RADIO_RECALIBRATE
+2705 RADIO_UNKNOWN_PLATFORM
+2707 RADIO_UNSUPPORTED_PLATFORM_FEATURE
+2708 RADIO_PAPR_CONFIG
+2709 RADIO_INVALID_MODULATION_TYPE
+270a RADIO_LOGGER_HW_FAIL
+270b RADIO_SIGNANAL_TOO_MANY_SAMPLES_READ
+270c RADIO_INVALID_RADIO_IDENTIFIER
+270d RADIO_VCO_LOCK_FAILED
+270e RADIO_ADC_CONVERT
+270f RADIO_DPD_LOOPBACK_SIGNAL_SUSPECT
+2710 RADIO_INVALID_FIR_COEFFICIENT
+2711 RADIO_INCOMPATIBLE_REG_DOMAINS
+2712 RADIO_RICE_FREQ_OUTSIDE_KNOWN_BANDS
+2713 RADIO_RICE_PACKET_WHEN_MODEM_DISCONNECTED
+2714 RADIO_RICE_FREQUENCY_OFFSET_TOO_BIG
+2715 RADIO_SETUP_FAILED
+2716 RADIO_ESTIMATES
+2717 RADIO_INVALID_RSSI
+2718 RADIO_POWER_OVERRIDDEN
+2719 RADIO_DPD_LOOPBACK_FIR_GAIN
+271a RADIO_SPIKE_REMOVED_FROM_DPD_LUT
+271b RADIO_SIGNAL_ANALYSER_16_BIT_OVERFLOW
+271c RADIO_IQ_CAPTURE_FREE_RAMSW_INFO
+271d RADIO_DPD_SUSPECT_LUT
+271e RADIO_SA_ZERO_AS_DIVISOR
+271f RADIO_DPD_BAD_LUT_QUALITY
+2720 RADIO_LOGGER_BAD_CAPTURE
+2721 RADIO_RUN_OUT_TRIM_TIME_DPD
+2722 RADIO_XDMAC_MEMCPY_FAIL
+2723 RADIO_RX_AAB_FTRIM
+2724 RADIO_WBRSSI_FAILED
+2725 RADIO_TX_POWER_DIGITAL_SERVO
+2726 RADIO_VALUE_BELOW_MIN_SETTING
+2727 RADIO_VALUE_ABOVE_MAX_SETTING
+2728 RADIO_NO_SUITABLE_SETTING
+2729 RADIO_TX_POWER_DIGITAL_LIMIT
+272a RADIO_BAD_POWER_TABLE_CONFIG
+272b RADIO_BAD_TX_SETTINGS
+272c RADIO_BAD_ANTENNA_GAIN_SETTINGS
+272d RADIO_BAD_IREF_TRIM
+272e RADIO_AGC_SETTING_OUT_OF_RANGE
+272f RADIO_DPD_LOOPBACK_ABB_GAIN
+2730 RADIO_DPD_CALC_LOOPBACK_BROKEN_RX
+2731 RADIO_CHIP_DOES_NOT_SUPPORT_RX_IQ_CONFIG
+2732 RADIO_RX_IQ_TRIM_RADIO_ISSUE
+2733 RADIO_RX_IQ_TRIM_NUMERIC_ISSUE
+2734 RADIO_DPD_LOOPBACK_RESTART_ALIGN
+2735 RADIO_INADEQUATE_TRIM_TIME
+2736 RADIO_CHAN_RSSI_MEASUREMENT_ERROR
+2737 RADIO_DPD_CALC_LOOPBACK_CORRELATION
+2738 RADIO_INADEQUATE_TRIM_RANGE
+2739 RADIO_BAD_RSSI_PDOLLOP_RSSI_LIN_IS_ZERO
+273a RADIO_LARGE_RX_DCOC_OFFSET_TRIM_VALUE
+273b RADIO_DPD_IQ_CAPTURE_FAILURE
+273c RADIO_INDICATE_FW_SIGANAL_USAGE
+273d RADIO_RX_DCOC_RF_AGC_MAX_GAINS_TIMEOUT
+273e RADIO_RX_DCOC_RF_MAXIMUM_RETRIES
+273f RADIO_TX_POWER_PRE_GAIN_TOO_LOW
+2740 RADIO_TX_POWER_TRIM_FAILED
+2741 RADIO_IQ_TRIM_NOT_CONVERGING
+2742 RADIO_BAD_CONFIG_FOR_FLEXIMAC_POWER_TRIM
+2743 RADIO_INVALID_RSSI_ADJUSTMENTS
+2744 RADIO_INVALID_FEC_CONFIG
+2745 RADIO_TRIM_PASS_EXCEEDED_SCO_LIMIT
+2746 RADIO_SIG_AN_LOCKED_UP
+2747 RADIO_PA_SAT_READING_LOW
+2748 RADIO_PHY_FLEXIMAC_ST_TOO_LONG
+2749 RADIO_INVALID_PER_CH_TRIM_ITERATION
+274a RADIO_BAD_TX_IQ_DIFFERENTIAL_DELAY
+274b RADIO_UNEXPECTED_FLEXIMAC_STATE
+274c RADIO_EXCESS_RX_IQ_COMP_MEAS_VARIATION
+274d RADIO_TX_PARAMETER_OUT_OF_RANGE
+2800 TEST_WLANLITE_AMPDU_TOO_LONG
+2801 TEST_WLANLITE_INVALID_RATE
+2802 TEST_WLANLITE_MAC_BAND_MAPPING_NOT_UNIQUE
+2803 TEST_WLANLITE_BEAMFORMER
+2804 TEST_WLANLITE_INVALID_BANDWIDTH
+2805 TEST_WLANLITE_CHANNEL_RSSI_MEASUREMENT_FAILED
+2806 BIST_LOW_LOOPBACK_GAIN
+2807 BIST_BROKEN_LOOPBACK
+2808 TEST_MICRAME_TX_BAD_PPDU_STATE
+2809 RADIO_RX_IQ_TRIM_FAILED_AFTER_RETRIES
+2900 COEX_DEBUG_OVERRIDE_BT_ENABLED
+2901 COEX_INIT_FAILED
+2902 COEX_WRONG_IMPOSED_MIN_RATE
+2903 COEX_MAC_CREATE_BLACKOUT_FAILED
+2904 COEX_VIF_UPDATE_TIMING
+2905 COEX_VIF_TIMING_BAD_NOA_OFFSET
+2906 COEX_MODEM_CC_BAND_UNKNOWN
+2907 COEX_MODEM_CDMA_BAND_UNKNOWN
+2a00 COMMON_FSM_LEAKY_SIGNAL_DISCARDED
+2a01 COMMON_FSM_ERROR_PROCESSING_SIGNAL
+2a02 COMMON_FSM_UNEXPECTED_TERMINATED_FSM
+2a10 COMMON_MIB_WRITE
+2a11 COMMON_MIB_READ
+2a12 COMMON_MIB_REQ_VAL_ABSENT
+2a13 COMMON_MIB_TYPE_CLASH
+2a14 COMMON_MIB_RAM_CORRUPT
+2a15 COMMON_MIB_DUFF_INDEX_COUNT
+2a16 COMMON_MIB_ROM_CORRUPT
+2a17 COMMON_MIB_INVALID_INDEX
+2a18 COMMON_MIB_LIMIT
+2a19 COMMON_MIB_RAM_REC_CORRUPT
+2a1a COMMON_MIB_ASSERT_FAIL
+2a1b COMMON_MIB_TAB_INDEX
+2a1c COMMON_MIB_READ_WARNING
+2a1d COMMON_MIB_WRITE_WARNING
+2a1e COMMON_MIB_NON_EXISTENT_VIF_INDEX
+2a30 COMMON_STA_DATA_CREATE_RECORD
+2a31 COMMON_STA_DATA_CREATE_RECORD_INIT_CALLS_DELAYED
+2a40 COMMON_RATE_BAD_RATE_TX
+2a50 COMMON_DORM_INVALID_ENTITY
+2a60 COMMON_DEBUG_INIT
+2a70 COMMON_HIP_BAD_SIGNAL_PROCESS_ID
+2a80 COMMON_HOSTIO_KICK_UNMASK_TO_HOST_INT
+2a81 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a90 COMMON_VLDATA_TOO_BIG
+2a91 COMMON_VLDATA_WRONG_FORMAT
+2a92 COMMON_VLDATA_NEGATIVE_UNSIGNED_VALUE
+2a93 COMMON_VLDATA_OVERFLOW
+2a94 COMMON_VIF_WRONG_TYPE
+2aa0 COMMON_FAULT_INIT
+2ab0 COMMON_PANIC_SUBSYSTEM_LEVEL
+2c00 MLME_VIFCTRL_ACTIVE_PROCESSING_TIME_NOT_RECEIVED
+2c01 MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_AUTH_TYPE
+2c02 MLME_VIFCTRL_ARP_EXTRACT_ARP_INFO_INVALID_ETH_TYPE
+2c03 MLME_VIFCTRL_ARP_EXTRACT_NDP_INFO_INVALID_ETH_TYPE
+2c04 MLME_VIFCTRL_ARP_OFFLOAD_INVALID_ARP_FRAME
+2c05 MLME_VIFCTRL_ARP_OFFLOAD_IP4_ADDR_UNSET
+2c06 MLME_VIFCTRL_BAD_BEACON_1
+2c07 MLME_VIFCTRL_CHANNEL_SWITCH_REQ_CHANNEL_VALIDATION_FAILED
+2c08 MLME_VIFCTRL_PEER_NOT_FOUND_2
+2c09 MLME_VIFCTRL_CONNECT_REQ_INFO_BSSID_IS_GROUP_ADDRESS
+2c0a MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_CHANNEL_CONFIG
+2c0b MLME_VIFCTRL_CONNECT_REQ_INFO_INVALID_RSN_IE
+2c0c MLME_VIFCTRL_CONNECT_REQ_INFO_NO_SSID_IE
+2c0d MLME_VIFCTRL_CONNECT_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c0e MLME_VIFCTRL_ECSA_IS_NOT_STARTED
+2c0f MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_HOST_PID
+2c10 MLME_VIFCTRL_FRAME_BAD_TAG_ENTRY_TAG
+2c11 MLME_VIFCTRL_FRAME_BAD_TAG_INDEX
+2c12 MLME_VIFCTRL_INVALID_PMF
+2c13 MLME_VIFCTRL_KEEPALIVE_IP4_ADDR_UNSET
+2c14 MLME_VIFCTRL_BAD_BEACON_2
+2c15 MLME_VIFCTRL_MEMBERSHIP_SELECTOR_NOT_SATISFIED
+2c16 MLME_VIFCTRL_NAN_START_REQ_INFO_INVALID_TLV
+2c18 MLME_VIFCTRL_NAN_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c19 MLME_VIFCTRL_NDP_OFFLOAD_INVALID_ICMP6_FRAME
+2c1a MLME_VIFCTRL_NDP_OFFLOAD_INVALID_NDP_NS_FRAME
+2c1b MLME_VIFCTRL_NOA_SCHEDULE_INCOMPLETE
+2c1c MLME_VIFCTRL_NOA_SCHEDULE_INVALID
+2c1d MLME_VIFCTRL_NO_MEM_FOR_WMM
+2c1f MLME_VIFCTRL_NO_VALID_RATES_INTERSECTION
+2c20 MLME_VIFCTRL_OBSS_CANT_ALLOC_SCAN_IES
+2c21 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_INVALID
+2c22 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_CHAN_DFS_OR_NOR_IR
+2c23 MLME_VIFCTRL_OFFCHANNEL_SPARE
+2c24 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_PARAMETERS
+2c25 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_INVALID_VIF
+2c26 MLME_VIFCTRL_OFFCHANNEL_REQ_INFO_TOO_MANY_SIMULTANEOUS_REQUESTS
+2c27 MLME_VIFCTRL_OLBC_DURATION_TIMEOUT_INVALID
+2c28 MLME_VIFCTRL_UNKNOWN_AP
+2c29 MLME_VIFCTRL_PEER_NOT_FOUND_1
+2c2a MLME_VIFCTRL_PEER_NOT_FOUND_3
+2c2b MLME_VIFCTRL_PEER_NOT_FOUND_4
+2c2c MLME_VIFCTRL_PEER_NOT_FOUND_5
+2c2d MLME_VIFCTRL_PEER_NOT_FOUND_6
+2c2e MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_BLACKOUT_LIST_FULL
+2c2f MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_1
+2c30 MLME_VIFCTRL_RAME_DEL_NOA_IND_FAILED_TO_MATCH
+2c32 MLME_VIFCTRL_RA_PKT_VALIDATION_FAILED
+2c33 MLME_VIFCTRL_SECURITY
+2c34 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_CHANNEL
+2c35 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_COUNT
+2c36 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_DURATION
+2c37 MLME_VIFCTRL_SET_CHANNEL_FAILURE_INVALID_INTERVAL
+2c38 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_P2P_IE
+2c39 MLME_VIFCTRL_SET_CHANNEL_FAILURE_NO_WSC_IE
+2c3b MLME_VIFCTRL_SET_CHANNEL_FAILURE_REGULATORY
+2c3c MLME_VIFCTRL_SET_IP_ADDR_INVALID_VERSION
+2c3e MLME_VIFCTRL_START_REQ_INFO_COUNTRY_MISMATCH
+2c3f MLME_VIFCTRL_START_REQ_INFO_INVALID_AUTH_TYPE
+2c40 MLME_VIFCTRL_START_REQ_INFO_INVALID_BEACON_PERIOD
+2c41 MLME_VIFCTRL_START_REQ_INFO_INVALID_BSSID
+2c42 MLME_VIFCTRL_START_REQ_INFO_INVALID_CHANNEL
+2c43 MLME_VIFCTRL_START_REQ_NO_VALID_CHANNEL_IS_FOUND
+2c45 MLME_VIFCTRL_START_REQ_INFO_INVALID_DTIM_PERIOD
+2c46 MLME_VIFCTRL_START_REQ_INFO_INVALID_IE_LIST
+2c48 MLME_VIFCTRL_START_REQ_INFO_MULTIPLE_SECURITY_IES
+2c49 MLME_VIFCTRL_START_REQ_INFO_NO_RATES_IE
+2c4a MLME_VIFCTRL_START_REQ_INFO_NO_SSID_IE
+2c4b MLME_VIFCTRL_START_REQ_INFO_P2P_NO_PROBE_RSP_IES
+2c4c MLME_VIFCTRL_START_REQ_INFO_VENDOR_IE_PRESENT
+2c4d MLME_VIFCTRL_START_REQ_INFO_VIF_INDEX_MISMATCH
+2c4e MLME_VIFCTRL_START_REQ_INFO_WIFISHARING_NOT_SUPPORTED
+2c4f MLME_VIFCTRL_STATION_INACTIVITY_PEER_NOT_FOUND
+2c50 MLME_VIFCTRL_TOO_MANY_QUIET_ELEMENTS
+2c51 MLME_VIFCTRL_SPAREB
+2c52 MLME_VIFCTRL_UNABLE_TO_USE_CHAN_FROM_BEACON
+2c53 MLME_VIFCTRL_UNEXPECTED_IP_VER
+2c54 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_1
+2c55 MLME_VIFCTRL_WIFISHARING_CHANNEL_SWITCH_FAILED_2
+2c56 MLME_VIFCTRL_WIFISHARING_INVALID_CHANNEL
+2c57 MLME_VIFCTRL_RAME_ADD_NOA_IND_FAILED_PMALLOC_2
+2c58 MLME_VIFCTRL_CHANNEL_SWITCH_BAD_CHANNEL
+2c59 MLME_VIFCTRL_CHANNEL_SWITCH_WIFISHARING_NOT_ALLOWED
+2c5a MLME_VIFCTRL_UNEXPECTED_QE_DEL_REQ
+2c60 MLME_VIFCTRL_AP_NO_CHANNEL_FOUND
+2c61 MLME_VIFCTRL_STA_CHANNEL_NOT_FOUND
+2c62 MLME_VIFCTRL_EDCA_OVERRIDE_FAILED
+2c63 MLME_VIFCTRL_READ_APF_MBULK_ALLOC_FAIL
+2c70 MLME_CHANNELISATION_LTE_COEX_NO_CHANNEL_FOUND
+2c71 MLME_MBULK_NOT_ENOUGH_HEADROOM
+2c72 MLME_STATION_RECORD_DOES_NOT_EXIST
+2c73 MLME_UTILS_FORCE_ACTIVE_IDEMPOTENT_FALSE
+2c74 MLME_UTILS_FORCE_ACTIVE_OUT_OF_RANGE
+2c75 MLME_UTILS_NON_STATION_POWERMGT
+2c76 MLME_INVALID_SIGNAL_DISCARDED
+2c77 MLME_UTILS_MBULK_CLONE_OUT_OF_MEM
+2c90 MLME_TXPOWER
+2c91 MLME_TXPOWER_SAR_INIT
+2c92 MLME_TXPOWER_NO_CELL_INIT
+2c93 MLME_TXPOWER_NO_CELL_INIT_INCLUDED_CHANNELS
+2c94 MLME_TXPOWER_POWER_CAP_BELOW_MIN
+2c95 MLME_TXPOWER_11AC_TPC_NO_ENV_WITH_RM
+2ca0 MLME_FTM_CREATE_RESPONDER_ENTRY
+2ca1 MLME_FTM_INVALID_PARAMETERS
+2ca2 MLME_FTM_INVALID_RANGE_REQ
+2ca3 MLME_FTM_MBULK_SCAN_IES_ALLOC_FAIL
+2ca4 MLME_FTM_SCAN_UNKNOWN_RESPONDER
+2ca5 MLME_FTM_SCAN_NO_RESPONDER_FOUND
+2ca6 MLME_FTM_DEL_UNKNOWN_RESPONDER
+2ca7 MLME_FTM_CREATE_RTT_RECORD
+2ca8 MLME_FTM_RTT_CONF_NO_RESPONDERS
+2ca9 MLME_FTM_RTT_CONF_TOO_MANY_RESPONDERS
+2caa MLME_FTM_RTT_CONF_DUPLICATE_PEER
+2cab MLME_FTM_RTT_CONF_BURST_PERIODS_CONFLICT
+2cac MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_SHORT
+2cad MLME_FTM_RTT_CONF_BURST_PERIODS_TOO_LONG
+2cae MLME_FTM_RTT_CONF_INVALID_RTT_TYPE
+2caf MLME_FTM_RTT_CONF_INVALID_CHANNEL_FREQ
+2cb0 MLME_FTM_RTT_CONF_INVALID_BURST_PERIOD
+2cb1 MLME_FTM_RTT_CONF_INVALID_BURSTS_EXPONENT
+2cb2 MLME_FTM_RTT_CONF_INVALID_FRAMES_PER_BURST
+2cb3 MLME_FTM_RTT_CONF_INVALID_BURST_DURATION
+2cb4 MLME_FTM_RTT_CONF_TOO_MANY_FRAMES_IN_BURST
+2cb5 MLME_FTM_PARAMETER_OVERRIDE_BURST_EXPONENT
+2cb6 MLME_FTM_PARAMETER_OVERRIDE_BURST_DURATION
+2cb7 MLME_FTM_PARAMETER_OVERRIDE_BURST_MIN_DELTA
+2cb8 MLME_FTM_PARAMETER_OVERRIDE_ASAP_MDOE
+2cb9 MLME_FTM_PARAMETER_OVERRIDE_FTM_PER_BURST
+2cba MLME_FTM_PARAMETER_OVERRIDE_BANDWIDTH
+2cbb MLME_FTM_PARAMETER_OVERRIDE_INTERVAL
+2cbc MLME_FTM_REQUEST_VALIDATION_DISABLED
+2cbd MLME_FTM_RESPONSE_VALIDATION_DISABLED
+2cbe MLME_FTM_CREATE_RTT_RECORD_DUPLICATED
+2cbf MLME_FTM_RTT_RECORD_NOT_FOUND
+2cc0 MLME_FTM_BURST_PARAMETERS_NOT_EXIST
+2cc1 MLME_FTM_PARAMETER_OVERRIDE_START_TIME
+2cc2 MLME_FTM_RTT_CONF_INVALID_BURST_INTERVAL
+2cc3 MLME_FTM_RTT_MEASUREMENT_UNSUCCESSFUL
+2cc4 MLME_FTM_RTT_T3_T2_INVALID
+2cc5 MLME_FTM_RTT_T4_T1_INVALID
+2cc6 MLME_FTM_RTT_T4_T1_IS_LESS_THAN_T3_T2
+2cd0 MLME_NDM_UNEXPECTED_FRAME
+2ce0 MLME_NAM_NDC_SCHEDULE_NOT_POSSIBLE
+panicid 722
+2000 DPLP_FRAG_GENERIC
+2001 DPLP_FRAG_WRONG_LEN
+2002 DPLP_FRAG_FREE_DU
+2003 DPLP_FRAG_IS_LAST_FRAME_FRAG
+2004 DPLP_FRAG_IS_INCONSISTENT
+2010 DPLP_FALLBACK_GENERIC
+2011 DPLP_FALLBACK_INVALID_MIB_SIZE
+2013 DPLP_FALLBACK_INVALID_MODULATION
+2014 DPLP_FALLBACK_MAX_ENTRIES_IS_ZERO
+2016 DPLP_FALLBACK_FAILED_TO_ALLOCATE_LINK_INFO
+2017 DPLP_FALLBACK_TBL_LENGTH_OUT_OF_BOUNDS
+2018 DPLP_FALLBACK_RATE_INDEX_OUT_OF_BOUNDS
+2020 DPLP_ENC_HNDL_GENERIC
+2021 DPLP_ENC_HNDL_WRONG_ENC_TYPE
+2022 DPLP_ENC_HNDL_MBULK_NULL
+2023 DPLP_ENC_HNDL_KEYC_NULL
+2024 DPLP_ENC_HNDL_NO_ROOM_LEFT
+2025 DPLP_ENC_HNDL_LIST_EMPTY
+2026 DPLP_ENC_HNDL_NO_KEY_FOUND
+2027 DPLP_ENC_HNDL_ENC_INFO_ALLOC_FAIL
+2028 DPLP_ENC_HNDL_NO_FRAMES_QUEUED_TO_DPHP
+2029 DPLP_ENC_HNDL_WAPI_CRYPTOSW_INVALID
+202a DPLP_ENC_HNDL_MBULK_IS_CHAINED
+2030 DPLP_CTRL_MGRL_GENERIC
+2031 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSING
+2032 DPLP_CTRL_MGR_DP_STATE_NOT_RESUMING
+2033 DPLP_CTRL_MGR_DP_STATE_NOT_PAUSED
+2034 DPLP_CTRL_MGR_NEW_CMD_ALLOC_FAIL
+2035 DPLP_CTRL_MGR_CMD_TIMEOUT
+2040 DPLP_LINK_ADAPT_GENERIC
+2041 DPLP_LINK_ADAPT_RATE_UNSUPPORTED
+2042 DPLP_LINK_ADAPT_RATE_INDEX_OUT_OF_BOUNDS
+2043 DPLP_LINK_ADAPT_RATE_MIN_BA_RATE_WRONG
+2044 DPLP_LINK_ADAPT_SELECTED_RATE_INVALID
+2045 DPLP_LINK_ADAPT_FALLBACK_TABLE_IS_NULL
+2047 DPLP_LINK_ADAPT_NUM_RETRIES_IS_WRONG
+2050 DPLP_EXT_API_GENERIC
+2051 DPLP_EXT_API_DU_IS_NOT_RXENTRY
+2052 DPLP_EXT_API_DU_IS_NOT_TXENTRY
+2053 DPLP_EXT_API_RESOURCE_HANDLE_NOT_CALLED_FROM_CB
+2054 DPLP_EXT_API_WRONG_AMSDU_LEN
+2055 DPLP_EXT_API_WRONG_SIGNAL_BUFFER_SIZE
+2057 DPLP_EXT_API_MSG_CANNOT_QUEUE_BEACON
+2058 DPLP_EXT_API_DU_HAS_WRONG_STATE
+205a DPLP_EXT_API_INVALID_PID
+205b DPLP_EXT_API_INVALID_PAUSE_TYPE
+205c DPLP_EXT_API_STA_RECORD_DOES_NOT_EXIST
+205d DPLP_EXT_API_STA_RECORD_ALREADY_CLEARING
+205e DPLP_EXT_API_MLME_CALLBACK_ALREADY_SET
+205f DPLP_EXT_API_INVALID_MAC
+2060 DPLP_RX_GENERIC
+2061 DPLP_RX_VIF_IS_SCAN
+2062 DPLP_RX_FRAG_COUNT_WRONG_FOR_AMPDU
+2063 DPLP_RX_SEQ_DIFF_GREATER_THAN_WIN_SIZE
+2064 DPLP_RX_DPLP_INTERNAL_ERROR
+2065 DPLP_RX_CORRUPT_MBULK
+2066 DPLP_RX_MISMATCHED_FRAME_CONTROL
+2067 DPLP_RX_FORWARD_CHAINED_TO_CTRLPLANE
+2068 DPLP_RX_MISSING_DRAM
+2070 DPLP_STATION_GENERIC
+2071 DPLP_STATION_TX_UP_IS_UNMAPPED
+2072 DPLP_STATION_FRAME_ALREADY_COUNTED
+2073 DPLP_STATION_TOO_MANY_QUEUED_FRAMES
+2074 DPLP_STATION_FRAME_IS_NOT_COUNTED
+2075 DPLP_STATION_NO_QUEUED_FRAME
+2076 DPLP_STATION_FRAME_HAS_NO_TXQUEUE
+2077 DPLP_STATION_FRAME_NOT_READY_TO_QUEUE
+2078 DPLP_STATION_RATE_INVALID
+207a DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_HIGH_IMPORTANCE
+207b DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_AMDPU
+207c DPLP_STATION_TXENTRY_HAS_NO_BAINFO
+207d DPLP_STATION_SET_TX_RATE_FALLBACK_NON_NULL_MULTICAST
+207e DPLP_STATION_DPLP_IN_WRONG_STATE
+207f DPLP_STATION_CLEAR_MUST_BE_TOTAL_PAUSED
+2080 DPLP_STATION_CLEAR_MUST_BE_NOTHING_QUEUED
+2081 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_SF_NOT_NULL
+2082 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_LF_NOT_NULL
+2083 DPLP_STATION_UNINSTALL_FALLBACK_TBLS_COUNT_NOT_ZERO
+2090 DPLP_AMPDU_MGR_GENERIC
+2091 DPLP_AMPDU_MGR_MALLOC_FAIL
+2092 DPLP_AMPDU_MGR_TX_QUEUE_HEAD_OR_TAIL_NULL
+2093 DPLP_AMPDU_MGR_DU_NOT_READY_TO_SEND
+2094 DPLP_AMPDU_MGR_AMPDU_TXENTRY_LIST_NOT_FOUND
+2095 DPLP_AMPDU_MGR_TOO_MANY_FRAMES_WAITING_TO_TX
+2096 DPLP_AMPDU_MGR_TX_ENTRY_HAS_NO_BAINFO
+2097 DPLP_AMPDU_MGR_TX_ENTRY_HAS_INVALID_RATE
+2098 DPLP_AMPDU_LINK_INFO_IS_NULL
+2099 DPLP_AMPDU_AMSDU_OVERSIZE
+209a DPLP_AMPDU_AMSDU_NOT_SUPPORTED
+209b DPLP_AMPDU_MGR_RX_BA
+209c DPLP_AMPDU_MGR_FREE_PPDU_STILL_IN_DPHP
+209d DPLP_AMPDU_MGR_CFMS_COUNT
+209e DPLP_AMPDU_MGR_CANNOT_CANCEL_PPDU
+209f DPLP_AMPDU_MGR_CANCEL_COUNT
+20a0 DPLP_HW_GENERIC
+20a1 DPLP_HW_VIF_IS_NOT_SCHEDULED
+20a2 DPLP_HW_MBULK_HAS_NO_SIGNAL
+20a3 DPLP_HW_MBULK_HAS_REFCOUNT_OR_LEN
+20a4 DPLP_HW_UNEXPECTED_DU_STATE
+20a5 DPLP_HW_TXENTRY_IS_DATAFRAME
+20a9 DPLP_HW_UNEXPECTED_VIF_ID
+20aa DPLP_HW_TXENTRY_STILL_COUNTED
+20b0 DPLP_MPDU_LOAD_GENERIC
+20b1 DPLP_MPDU_LOAD_NODE_ELEMENT_NOT_NULL
+20b2 DPLP_MPDU_LOAD_PPDU_NOT_FOUND
+20b3 DPLP_MPDU_LOAD_NOT_A_TRIGGERED_QUEUE
+20b4 DPLP_MPDU_LOAD_CANCELLING_NULL_PPDU
+20b5 DPLP_MPDU_LOAD_UNICAST_IS_PAUSING
+20b6 DPLP_MPDU_LOAD_TXENTRY_NOT_FOUND
+20b7 DPLP_MPDU_LOAD_NO_MORE_TRIGGERED_Q_LEFT
+20b8 DPLP_MPDU_LOAD_FRAME_NOT_QUEUED
+20b9 DPLP_MPDU_LOAD_COUNT_NOT_ZERO
+20ba DPLP_MPDU_LOAD_DPLANE_NOT_RUNNING
+20c0 DPLP_QUEUE_GENERIC
+20c1 DPLP_QUEUE_WRONG_DU_STATE
+20c2 DPLP_QUEUE_TX_QUEUE_NOT_EMPTY
+20c3 DPLP_QUEUE_MAC_AC_IS_WRONG
+20c4 DPLP_QUEUE_FRAME_WITHOUT_TX_QUEUE
+20c5 DPLP_QUEUE_LIST_ELEMENT_IS_WRONG
+20c6 DPLP_QUEUE_MBULK_NOT_LARGE_ENOUGH
+20c7 DPLP_QUEUE_UNKNOWN_REQUEST_TYPE
+20c8 DPLP_QUEUE_DOUBLE_DEQUEUE
+20c9 DPLP_QUEUE_TX_QUEUE_EMPTY
+20ca DPLP_QUEUE_DEBUG_BEACON_SW_TIMEOUT
+20cb DPLP_QUEUE_DEBUG_AMSDU_ERROR
+20cc DPLP_QUEUE_INVALID_DU
+20d0 DPLP_FROM_HOST_HARD
+20e0 DPLP_TIMER_SCHEDULE_WHEN_PAUSED
+20f0 DPLP_ANTENNA_MODE_INVALID_BITMAP
+2100 DPLP_DPLP_IMM_UNIMPLEMENTED
+2110 DPLP_DPIF_GENERIC
+2111 DPLP_DPIF_BAD_OPERATION
+2112 DPLP_DPIF_RESOURCE_LOW
+2113 DPLP_DPIF_RESOURCE_INDEX_ERROR
+2114 DPLP_DPIF_BFEE
+2115 DPLP_DPIF_PEER_INFO
+2116 DPLP_DPIF_INTERRUPT_SANITY
+2117 DPLP_DPIF_INVALID_BSS_INDEX
+2120 DPLP_PEER_MGT_GENERIC
+2121 DPLP_PEER_MGT_FRAMES_NOT_CANCELLED
+2130 DPLP_BEAMFORMER_GENERIC
+2131 DPLP_BEAMFORMER_UNEXPECTED_NDPA
+2140 DPLP_DEADLINE_GENERIC
+2141 DPLP_DEADLINE_STOP_DEADLINE_NOT_FOUND
+2142 DPLP_DEADLINE_VIF_DEADLINE_NOT_FOUND
+2143 DPLP_DEADLINE_ACTIVE_DEADLINE_IS_NULL
+2144 DPLP_DEADLINE_DPIF_Q_NUM_NOT_FOUND
+2145 DPLP_DEADLINE_UNABLE_TO_CANCEL_DLINE
+2150 DPLP_PROTECTION_GENERIC
+2151 DPLP_PROTECTION_RATE_INDEX_OUT_OF_BOUNDS
+2160 DPLP_VIF_GENERIC
+2200 DPHP_BA_GENERIC
+2201 DPHP_BA_RESERVE_NON_AMPDU
+2202 DPHP_BA_LOAD_NON_AMPDU
+2203 DPHP_BA_LOAD_RESERVE_FAILED
+2210 DPHP_COORD_GENERIC
+2211 DPHP_COORD_BAD_RESET
+2212 DPHP_COORD_BAD_RESET_STAGE2
+2213 DPHP_COORD_INVALID_BK_CLEAR
+2214 DPHP_COORD_PPDU_LIST_DAMAGED
+2215 DPHP_COORD_NOT_MARKED_CANCEL
+2216 DPHP_COORD_INVALID_PPDU_STATE
+2217 DPHP_COORD_INVALID_DPHP_STATE
+2218 DPHP_COORD_Q_EMPTY
+2220 DPHP_DEADLINE_GENERIC
+2221 DPHP_DEADLINE_BK_NOT_EMPTY
+2222 DPHP_DEADLINE_BAD_DEADLINE
+2223 DPHP_DEADLINE_IS_NULL
+2224 DPHP_DEADLINE_BAD_Q_MASK
+2225 DPHP_DEADLINE_ILLEGAL_PPDU
+2226 DPHP_DEADLINE_ALREADY_ACTIVE
+2227 DPHP_DEADLINE_INVALID_TYPE
+2228 DPHP_DEADLINE_NO_INSTALLED_DEADLINE
+2230 DPHP_RX_GENERIC
+2231 DPHP_RX_NO_DRAM
+2232 DPHP_RX_TRUNCATED_DOLLOP
+2233 DPHP_RX_SANITY
+2234 DPHP_RX_NO_PRECEDING_MPDU
+2235 DPHP_RX_BAD_DOLLOP
+2236 DPHP_RX_GIVE_BEHIND_TAKE
+2240 DPHP_DMA_GENERIC
+2241 DPHP_DMA_RX_ORDER
+2242 DPHP_DMA_UNEVEN_ALIGN
+2243 DPHP_DMA_INVALID_ENC_TYPE
+2244 DPHP_DMA_NO_SPACE
+2245 DPHP_DMA_TX_FRAME_TOO_LONG
+2246 DPHP_DMA_PLINE_FULL
+2247 DPHP_DMA_PLINE_EMPTY
+2248 DPHP_DMA_PLINE_INVALID
+2249 DPHP_DMA_INVALID_TFER_ALERT
+224a DPHP_DMA_MBULK_CHAIN_ERROR
+224b DPHP_DMA_INVALID_PAUSE_STATE
+224c DPHP_DMA_SG_LIST_FULL
+224d DPHP_DMA_BAD_SAVED_RX_STATE
+2250 DPHP_RESET_GENERIC
+2251 DPHP_RESET_BAD_STATE_REQUEST
+2252 DPHP_RESET_RX_NOT_IDLE
+2253 DPHP_RESET_DMA_NOT_IDLE
+2254 DPHP_RESET_BAD_WDOG_STATE
+2255 DPHP_RESET_HW_IDLE_FAIL
+2256 DPHP_INIT_BAD_MAC_REGS_ADDR_START
+2257 DPHP_INIT_BAD_MAC_INSTANCE_NUM
+2258 DPHP_MAC_FAILED_TO_START
+2260 DPHP_INT_GENERIC
+2261 DPHP_INT_UNHANDLED
+2262 DPHP_INT_MAC_ERROR
+2263 DPHP_INT_DMA_ALERT_RECURSION
+2264 DPHP_INT_BAD_DMA_TFER_STATE
+2265 DPHP_INT_DMA_TFER_FAIL
+2266 MAC_ACC_BAD_TX_RATE
+2267 MAC_ACC_BAD_PROT_RATE
+2268 DPHP_INT_XDMA_TFER_FAIL
+2269 DPHP_XDMA_TFER_FAIL
+226a DPHP_XDMA_TFER_CHAINED_MBULK_FAIL
+226b DPHP_XDMA_TFER_CHUNK_MBULKS_FAIL
+226c DPHP_FLEXIMAC_PANIC
+226d DPHP_CAPTURE_IQ_SAMPLES_LOST
+226e DPHP_CAPTURE_DONE
+226f DPHP_PHYDMA_DOUBLE_REGISTER
+2270 DPHP_TX_GENERIC
+2271 DPHP_TX_UNDERFLOW
+2272 DPHP_TX_BUFFER_INCORRECT
+2280 DPHP_SLOT_GENERIC
+2281 DPHP_SLOT_EXPECTED_AMPDU
+2282 DPHP_SLOT_NULL_PPDU
+2283 DPHP_SLOT_DMA_INCOMPLETE
+2284 DPHP_SLOT_QUEUEING_FAIL
+2285 DPHP_SLOT_BAD_CANCEL_REQ
+2286 DPHP_SLOT_TIMED_TX_Q_PAUSED
+2287 DPHP_SLOT_DMA_DATA_INVALID
+2288 DPHP_SLOT_INVALID_STATE
+2289 DPHP_SLOT_INVALID_PDU_STATUS
+228a DPHP_SLOT_UNEXPECTED_CFM
+228b DPHP_SLOT_MPDU_INDEX_OUT_OF_BOUNDS
+228c DPHP_SLOT_UNEXPECTED_DYN_RESTART
+228d DPHP_SLOT_BAD_COMMAND
+2290 DPHP_CONFIG_GENERIC
+2291 DPHP_CONFIG_BAD_EDCA_Q
+2292 DPHP_CONFIG_BAD_EDCA_CONFIG
+2293 DPHP_CONFIG_MISSING_PROT_TABLE
+2294 DPHP_CONFIG_RAMSW_SIZE_INVALID
+22a0 DPHP_DPIF_GENERIC
+22a1 DPHP_DPIF_BAD_DEADLINE_CANCEL
+22a2 DPHP_DPIF_INVALID_ECW
+22a3 DPHP_DPIF_INVALID_BURST
+22a4 DPHP_DPIF_BAD_RX_CHAIN_CALC
+22a5 DPHP_DPIF_BAD_RX_TYPE
+22a6 DPHP_DPIF_PEER_INFO
+22a7 DPHP_DPIF_UNXPECTED_AMPDU
+22a8 DPIF_LINK_INFO_INC_REF_COUNT_WHEN_MAX
+22a9 DPIF_LINK_INFO_DEC_REF_COUNT_WHEN_ZERO
+22aa DPIF_LINK_INFO_ASSIGN_TO_TX_ENTRY_Q_NULL
+22ab DPIF_MBULK_DATA_WRONG_CACHELINE
+22ac DPIF_BAD_ENC_KEY
+22ad DPIF_UNEXPECTED_REQUEST_CANCEL
+22b0 DPHP_TCM_GENERIC
+22b1 DPHP_TCM_ALLOC_SIZE_MISMATCH
+22b2 DPHP_TCM_POOL_EMPTY
+22b3 DPHP_TCM_BAD_FREE
+22b4 DPHP_TCM_INIT_INSUFFICIENT_SPACE
+22b5 DPHP_TCM_POOL_SIZE
+22b6 DPHP_TCM_INIT_FAIL
+22b7 TCM_INIT_POOL_IN_USE
+22c0 DPHP_BAD_MIF_STATE
+22d0 DPHP_BA_TX_GENERIC
+22d1 DPHP_BA_TX_UNEXPECTED_CFM_STATE
+22d2 DPHP_BA_TX_PPDU_AT_Q_HEAD_DOES_NOT_MATCH
+22d3 DPHP_BA_TX_DEINT_OUTSTANDING_AMPDUS
+22d4 DPHP_BA_TX_DEINT_OUTSTANDING_BA_TX_AGRS
+22d5 DPHP_BA_TX_AMPDU_ALREADY_CONFIRMED
+22d6 DPHP_BA_TX_PPDU_COUNT_VALUE_INCORRECT
+22d7 DPHP_BA_TX_UNEXPECTED_PANIC_SIGNAL
+22d8 DPHP_BA_TX_BA_WINDOW_NOT_EMPTY
+22d9 DPHP_BA_TX_AMPDU_DEQUEUED_INCORRECTLY
+22da DPHP_BA_TX_AMPDU_NOT_FOUND
+22e0 DPHP_WATCHDOG_GENERIC
+22e1 DPHP_UNHANDLED_LOCKUP
+22f0 DPHP_BEAMFORMER_INVALID_NDPA
+22f1 DPHP_BEAMFORMEE_GENERIC
+2300 MACRAME_VIF_CREATE_NULL_SCANVIF
+2301 MACRAME_VIF_DEREGISTER_QUEUED_TX_FRAMES
+2302 MACRAME_VIF_DELETE_STATION_ASSOCIATED
+2303 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_STATE
+2304 MACRAME_VIF_ANNOUNCE_AVAILABILITY_INVALID_PS_STATE
+2305 MACRAME_VIF_CLEAR_INVALID_SCHED_STATE
+2308 MACRAME_VIF_DESCHED_REG_REQ_INVALID_PS_STATE
+230a MACRAME_VIF_SW_DONE_VIF_NOT_SCHEDULED
+230c MACRAME_VIF_CTS_PROCESSED_NULL_DU
+230d MACRAME_VIF_DEREGISTER_NO_REG_VIF
+230e MACRAME_VIF_DEREGISTER_INVALID_SCHED_STATE
+230f MACRAME_VIF_SCHED_MISSED_INVALID_START_TIME
+2311 MACRAME_VIF_INDEX_OUT_OF_RANGE
+2313 MACRAME_VIF_CANCEL_NULL_ENTRY
+2315 MACRAME_VIF_IS_NULL
+2316 MACRAME_VIF_INVALID_TRAFFIC_STATISTICS
+2320 MACRAME_STATION_ADD_NULL_RECORD
+2323 MACRAME_STATION_SET_CONNECT_NULL_RECORD
+2326 MACRAME_STATION_RESET_STA_RECORD_WITH_ENC_KEY
+2340 MACRAME_SCHED_UPDATE_DURATION_HIST_VIF_NOT_SCHEDULED
+2342 MACRAME_SCHED_QUERY_BO_INVALID_BO_TIMES
+2343 MACRAME_SCHED_RESCHEDULE_ALREADY_ACTIVE
+2344 MACRAME_SCHED_SCHED_INVALID_VIF
+2345 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_VIF
+2346 MACRAME_SCHED_SWITCH_RESPONSE_INVALID_STATE
+2347 MACRAME_SCHED_SCHED_IND_INVALID_VIF
+2348 MACRAME_SCHED_RADIO_DONE_INVALID_STATE
+2349 MACRAME_SCHED_BO_UPDATE_INVALID_VIX
+234a MACRAME_SCHED_DESCHED_NOW_NOT_SCEDULED
+234b MACRAME_SCHED_NEAREST_SCHED_TIME_INVALID_STATE
+234c MACRAME_SCHED_COULD_NOT_INSTANTIATE_FSM
+234d MACRAME_SCHED_INVALID_FSM_PID
+234e MACRAME_SCHED_INVALID_RADIO_BM
+234f MACRAME_SCHED_INVALID_PAUSE_REASON
+2350 MACRAME_SCHED_INVALID_INDEX
+2351 MACRAME_SCHED_INVALID_INTERFACE
+2352 MACRAME_SCHED_INVALID_SCHDL_FSM
+2361 MACRAME_TX_MM_REQUEST_INVALID_VIF
+2362 MACRAME_TX_ADDING_NULL_ENTRY_TO_BUFFER
+2363 MACRAME_TX_SENDING_NULL_ENTRY_FROM_BUFFER
+2364 MACRAME_TX_DISCARDING_NULL_ENTRY_FROM_BUFFER
+2366 MACRAME_TX_DISCARD_NULL_PTR_TO_ENTRY
+2367 MACRAME_TX_CANCEL_NULL_PTR_TO_ENTRY
+2368 MACRAME_TX_CANCEL_NULL_TXENTRY
+2369 MACRAME_TX_NO_PSPOLL
+2382 MACRAME_BEACON_MISSED_BEACON_NOT_SCHEDULED_VIF
+2384 MACRAME_BEACON_UPDATE_WAKEUP_VIF_NOT_STA
+2386 MACRAME_BEACON_TX_CLEAR_INVALID_VIF_TYPE
+2387 MACRAME_BEACON_TX_LOAD_HANDLER_INVALID_VIF_TYPE
+2388 MACRAME_BEACON_TX_LOAD_HANDLER_READONLY_FRAME
+2389 MACRAME_BEACON_TX_FINISHED_INVALID_VIF
+238a MACRAME_BEACON_RX_SCHEDULE_TOO_FAR_IN_THE_FUTURE
+238c MACRAME_BEACON_TX_SHEDULE_REQUEST_IN_THE_PAST
+238d MACRAME_BEACON_TX_GET_NEXT_TIME_INVALID_VIF_TYPE
+238e MACRAME_BEACON_TX_AP_WRITE_PVB_INPUT_CHECK
+238f MACRAME_BEACON_TX_AP_UPDATE_NEEDED_NON_AP_VIF
+2390 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_SCHEDULED_VIF
+2391 MACRAME_BEACON_TX_AP_SEND_BEACON_NON_AP_VIF
+2392 MACRAME_BEACON_TX_AP_SEND_BEACON_NOT_FOUND
+2394 MACRAME_BEACON_TX_AP_CLEAR_BEACON_IN_DPLP
+2395 MACRAME_BEACON_TX_ECSA_COUNT_REACHED_ZERO
+239a MACRAME_BEACON_CALC_SLEEP_PERIODS
+239b MACRAME_BEACON_TBTT_EBRT_INVALID_VIF
+239c MACRAME_BEACON_TBTT_EBRT_INVALID_LISTEN_START
+239e MACRAME_BEACON_TX_TXENTRY_IS_NULL
+23a2 MACRAME_PS_COMMON_PS_CHECK_INVALID_VIF
+23a3 MACRAME_PS_COMMON_ANNOUNCE_PROCESSED_NULL_DU
+23a4 MACRAME_PS_COMMON_SEND_PSNULL_NULL_ERROR
+23a6 MACRAME_PS_COMMON_POPULATE_PSNULL_VIF_NOT_SCHEDULED
+23a7 MACRAME_PS_LEGACY_PSPOLL_CFM_NULL_DU
+23a8 MACRAME_PS_LEGACY_PSPOLL_CFM_NON_STA_VIF
+23a9 MACRAME_PS_UAPSD_ENQUEUE_TRIGGER_VIF_NOT_SCHEDULED
+23c0 MACRAME_BLACKOUT_CMM_INVALID_NUM_BO
+23c1 MACRAME_BLACKOUT_CHIP_INVALID_NUM_BO
+23c2 MACRAME_BLACKOUT_P2P_INVALID_VIF_TYPE_NOA
+23c3 MACRAME_BLACKOUT_P2P_SET_CTW_FAIL
+23c4 MACRAME_BLACKOUT_NOT_REGISTERED
+23c5 MACRAME_BLACKOUT_P2P_SCAN_NOA_NOT_UPDATED
+23c6 MACRAME_BLACKOUT_AP_SCAN_QUIET_COUNT_NOT_UPDATED
+23e2 MACRAME_FSM_ADD_BO_INVALID_TYPE
+23e3 MACRAME_FSM_ADD_BO_UNDEFINED_TYPE
+23e4 MACRAME_FSM_ADD_BO_QUIET_INVALID_ID
+23e5 MACRAME_FSM_ADD_BO_LOCAL_INVALID_ID
+23e6 MACRAME_FSM_DEL_BO_INVALID_TYPE
+23e7 MACRAME_FSM_DEL_BO_UNDEFINED_TYPE
+23e8 MACRAME_FSM_DEL_BO_QUIET_INVALID_ID
+23e9 MACRAME_FSM_DEL_BO_LOCAL_INVALID_ID
+2400 MACRAME_TIMER_UNSCHEDULABLE_VIF_MULTICAST
+2401 MACRAME_TIMER_UNSCHEDULABLE_VIF_FAST_PS
+2402 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_DELAY
+2403 MACRAME_TIMER_UNSCHEDULABLE_VIF_CHECK_CLEAR
+2404 MACRAME_TIMER_UNSCHEDULABLE_VIF_MOREBIT
+2405 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_CHECK
+2406 MACRAME_TIMER_UNSCHEDULABLE_VIF_PS_TIMER
+2407 MACRAME_TIMER_UNSCHEDULABLE_VIF_TDLS
+240a MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_TX
+240b MACRAME_TIMER_DPLANE_OPERATION_TIMEOUT
+240c MACRAME_TIMER_RADIOMAC_SWITCH_TIMEOUT
+240d MACRAME_TIMER_BT_LO_ACCESS_GRANT_TIMEOUT
+240e MACRAME_TIMER_UNSCHEDULABLE_VIF_BEACON_RX
+2420 MACRAME_COEX_BLACKOUT_ATTACH_USPBO_FAILED
+2421 MACRAME_COEX_BLACKOUT_ATTACH_VIF_FAILED
+2422 MACRAME_COEX_BLACKOUT_ATTACH_INVALID_HANDLE
+2423 MACRAME_COEX_BLACKOUT_UPDATE_INVALID_HANDLE
+2424 MACRAME_COEX_BLACKOUT_DESTROY_INVALID_HANDLE
+2425 MACRAME_COEX_BLACKOUT_DETACH_INVALID_HANDLE
+2426 MACRAME_COEX_BLACKOUT_MASK_INVALID_HANDLE
+2427 MACRAME_COEX_BLACKOUT_UNMASK_INVALID_HANDLE
+2428 MACRAME_COEX_VIF_GET_NEXT_DTIM_TIME_INVALID_VIF
+2429 MACRAME_COEX_VIF_GET_CLEAR_TIME_INVALID_VIF
+242a MACRAME_COEX_NEGATIVE_MAX_CLEAR_TIMEOUT
+2431 MACRAME_MLME_API_ALLOW_BEACONS_NON_AP_VIF
+2434 MACRAME_MLME_API_SET_BSS_INVALID_VIF
+2435 MACRAME_MLME_API_SET_BSS_NO_AP
+2436 MACRAME_MLME_API_SET_INFO_SCAN_VIF
+2437 MACRAME_MLME_API_CONFIG_QUEUE_SCAN_VIF
+2438 MACRAME_MLME_API_SET_BSS_UNMATCHED_VIF_TYPES
+2439 MACRAME_MLME_API_INVALID_VIF
+243a MACRAME_MLME_API_NOT_STATION_OWNER
+243b MACRAME_MLME_API_STATION_CLEAR_RECORD_NOT_FOUND
+243c MACRAME_MLME_API_STATION_PAUSE_RECORD_NOT_FOUND
+243d MACRAME_MLME_API_STATION_UNPAUSE_RECORD_NOT_FOUND
+2441 MACRAME_BA_MGR_REMOVE_BA_NULL_INFO
+2442 MACRAME_BA_MGR_REMOVE_BA_HWINFO
+2443 MACRAME_BA_MGR_QUEUE_HEAD_NULL
+2444 MACRAME_BA_MGR_QUEUE_TAIL_NULL
+2445 MACRAME_BA_MGR_DELBA_RX_BAINSTANCE_NULL
+2446 MACRAME_BA_MGR_FIND_BA_INVALID_TPRI
+2447 MACRAME_BA_MGR_DELBA_INVALID_DIR
+2448 MACRAME_BA_MGR_ADDBA_ZERO_BUF_SIZE
+2449 MACRAME_BA_MGR_ADDBA_STA_RECORD_NULL
+244a MACRAME_BA_MGR_ADD_BA_RX_AGREEMENT
+2450 MACRAME_KEY_MALLOC_FAILED
+2451 MACRAME_RADIO_INIT_DONE_INVALID_STATE
+2452 MACRAME_RADIO_STATE_CHANGE_ON_NO_DESCRIPTORS
+2453 MACRAME_RADIO_OFF_INVALID_STATE
+2454 MACRAME_RADIO_DPD_NO_RATES
+2455 MACRAME_RADIO_INVALID_STATE
+2456 MACRAME_RADIO_COULD_NOT_INSTANTIATE_FSM
+2457 MACRAME_RADIO_INVALID_BITMAP
+2458 MACRAME_RADIO_ILLEGAL_SWITCH_REQUEST
+2459 MACRAME_MODEM_INVALID_DFE_CONFIG
+245a MACRAME_RADIOMAC_TOO_MANY_REQUESTS
+245b MACRAME_MODEM_CONFLICTING_DFE_CONFIG
+245c MACRAME_RADIOMAC_MAC0_UNAVAILABLE
+245d MACRAME_RADIO_DUMMY_FRAME_DPD_NOT_SUPPORTED
+2480 MACRAME_DPLANE_MACRAME_NULL_POINTER
+2490 MACRAME_VIF_PAUSE_RESUME_NOT_ENOUGH_MEMORY_FOR_REQUEST
+2491 MACRAME_VIF_NAN_ELAPSED_TIME_GREATER_THAN_DW0_PERIOD
+2492 MACRAME_VIF_NAN_INSUFFICINET_OCTETS
+2493 MACRAME_VIF_NAN_NO_SLOTS_FOUND
+24a0 MACRAME_IDLE_AP_INVALID_VIF
+24ff MACRAME_LAST_ID
+2500 MLME_RAME_GET_KA_INTERVAL_INVALID_DATA
+2501 MLME_FSM_PID_ALREADY_IN_USE_1
+2502 MLME_AP_NO_CURRENT_STA
+2503 MLME_FSM_PID_ALREADY_IN_USE_2
+2504 MLME_FSM_PID_ALREADY_IN_USE_3
+2505 MLME_FSM_PID_ALREADY_IN_USE_4
+2506 MLME_FSM_PID_ALREADY_IN_USE_5
+2507 MLME_FSM_PID_ALREADY_IN_USE_6
+2508 MLME_FSM_PID_ALREADY_IN_USE_7
+2509 MLME_FSM_PID_ALREADY_IN_USE_8
+250a MLME_FSM_PID_ALREADY_IN_USE_9
+250b MLME_FSM_PID_ALREADY_IN_USE_10
+250c MLME_AP_DISCONNECT_NO_STATION_RECORD
+250e MLME_AP_UNEXPECTED_FRAME_TYPE
+250f MLME_AP_UNEXPECTED_FRAME_SUBTYPE
+2510 MLME_REG_MIB_READ_FAIL
+2511 MLME_REG_MIB_READ_FAIL_2
+2512 MLME_REG_MIB_COUNTRY_CODE_FAIL
+2513 MLME_REG_MIB_WORLD_DOMAIN_COUNTRY_CODE_FAIL
+2514 MLME_REG_IS_NULL
+2520 MLME_CONMGR_MLME_SYNCHRONISED_RSP_INVALID
+2530 MLME_STA_RECORD_ADD_1
+2531 MLME_STA_RECORD_DELETE
+2532 MLME_DATA_SAVE_UNKNOWN_KEY_TYPE
+2533 MLME_STA_RECORD_ADD_2
+2534 MLME_STA_RECORD_PAUSE
+2535 MLME_STA_RECORD_RESUME
+2536 MLME_STA_RECORD_MOVE
+2537 MLME_DATA_NO_AVAILABLE_VIF
+2538 MLME_DATA_ADD_VIF_FAILED_1
+2539 MLME_DATA_ADD_VIF_FAILED_3
+253a MLME_DATA_ADD_VIF_FAILED_4
+253b MLME_STA_RECORD_CLEAR
+253c MLME_STA_RECORDS_EXIST
+253d MLME_STA_RECORD_DELETE_WRONG_OWNER
+2560 MLME_MEASUREMENTS_FRAME_SZ_WRONG
+2580 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_WITH_VIX
+2581 MLME_REQUESTS_TEST_PANIC
+2582 MLME_REQUESTS_INVALID_STATE_IN_ADD_VIF
+2583 MLME_REQUESTS_MULTIPLE_ROUTES_FOR_SIGNAL_NULL_VIX
+25a0 MLME_ROAMING_IES_SZ_WRONG
+25a1 MLME_ROAMING_LOGGING_IE_SZ_WRONG
+25c2 MLME_SCAN_INTERNAL_DATA_CORRUPTED
+25c3 MLME_SCAN_NO_SCANNERS
+25c4 MLME_SCAN_PID_TO_INSTANCE_FAILED
+25c5 MLME_SCAN_MIB_FAIL
+25c6 MLME_SCAN_CHANNEL_ZERO_FREQ
+25d0 MLME_TDLS_INVALID_DTIM_PERIOD
+25d1 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_1
+25d2 MLME_TDLS_INITIAL_CHANNEL_CFG_FAILED_2
+25d3 MLME_TDLS_INVALID_TERMINATE_LINK
+25d4 MLME_TDLS_INVALID_TERMINATE_LINK_SETUP
+25d5 MLME_TDLS_INVALID_CONFIRM
+25d6 MLME_TDLS_MAX_SLOTS_EXCEEDED
+25e0 MLME_VIFCTRL_DMS_IES_SZ_WRONG_1
+25e1 MLME_VIFCTRL_DMS_IES_SZ_WRONG_2
+25e2 MLME_VIFCTRL_DMS_IES_SZ_WRONG_3
+25e3 MLME_VIFCTRL_DMS_IES_SZ_WRONG_4
+25e4 MLME_VIFCTRL_DMS_IES_SZ_WRONG_5
+25e5 MLME_VIFCTRL_DMS_IES_SZ_WRONG_6
+25e6 MLME_VIFCTRL_DMS_IES_SZ_WRONG_7
+25e7 MLME_VIFCTRL_CHANNEL_SWITCH_NO_STA_RECORD
+25e8 MLME_VIFCTRL_TEARDOWN_BITMAP_OVERFLOW
+25e9 MLME_VIFCTRL_SEND_FRAME_INVALID_CHANNEL_FREQ
+25ea MLME_VIFCTRL_OBSS_SCAN_IES_SIZE_WRONG
+25eb MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_1
+25ec MLME_VIFCTRL_PACKET_FILTER_IES_TOO_LONG
+25ed MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_MODE
+25f0 MLME_SECURITY_EAPOL_PEER_NOT_FOUND
+25f1 MLME_SECURITY_FILTER_OVERFLOW
+25f2 MLME_SECURITY_EAPOL_REPLY_TYPE_INVALID
+2600 MLME_VIFCTRL_FILTER_OVERFLOW_1
+2601 MLME_VIFCTRL_FILTER_OVERFLOW_2
+2602 MLME_VIFCTRL_FILTER_OVERFLOW_3
+2603 MLME_VIFCTRL_FILTER_OVERFLOW_4
+2604 MLME_VIFCTRL_FILTER_OVERFLOW_5
+2605 MLME_VIFCTRL_FILTER_OVERFLOW_6
+2606 MLME_VIFCTRL_FILTER_OVERFLOW_7
+2607 MLME_VIFCTRL_FILTER_OVERFLOW_8
+2608 MLME_VIFCTRL_PACKET_FILTER_IES_INVALID_RANGE_2
+2610 MLME_MBULK_IS_NULL
+2611 MLME_MBULK_ADDRESS_IS_NULL
+2620 MLME_MPDU_VIX_REGISTRATION_FAILED_1
+2621 MLME_MPDU_VIX_REGISTRATION_FAILED_2
+2630 MLME_FRAMES_FRAME_SZ_WRONG
+2631 MLME_FRAMES_INVALID_FRAME_TYPE_1
+2632 MLME_FRAMES_INVALID_FRAME_TYPE_2
+2633 MLME_FRAME_ADDR_DS_MODE_UNSUPPORTED
+2634 MLME_FRAME_APPEND_OOB
+2635 MLME_FRAME_EAPOL_INVALID_FRAME_TYPE
+2636 MLME_FRAME_BUILD_INC_SZ_MISMATCH
+2640 MLME_NAN_SCAN_IES_SIZE_WRONG
+2641 MLME_NAN_FRAME_SZ_WRONG_1
+2642 MLME_NAN_INVALID_NAN_FRAME
+2643 MLME_NAN_INITIAL_CHANNEL_CFG_FAILED
+2644 MLME_NAN_NUM_OF_SDA_OVERFLOW
+2645 MLME_NAN_SDF_WITH_NO_PAYLOAD
+2646 MLME_NAN_RAME_MM_CFM_NOT_RECEIVED
+2647 MLME_NAN_INVALID_CLUSTER_MERGE_STATE
+2649 MLME_NAN_FRAME_SZ_WRONG_3
+264a MLME_NAN_FRAME_SZ_WRONG_4
+264c MLME_NAN_FRAME_SZ_WRONG_6
+264e MLME_FSM_PID_ALREADY_IN_USE_11
+2650 MLME_API_STATION_RECORD_DOES_NOT_EXIST_1
+2651 MLME_API_STATION_RECORD_DOES_NOT_EXIST_2
+2652 MLME_API_STATION_RECORD_DOES_NOT_EXIST_3
+2653 MLME_API_INVALID_VIF
+2660 MLME_FTM_SCAN_IES_SIZE_WRONG
+2700 RADIO_RICE_RADIO_SETUP_FAILED
+2701 RADIO_RICE_ALREADY_SETUP
+2702 RADIO_RICE_BAD_CLOCK_FREQ
+2703 RADIO_RICE_IMM_ERROR
+2704 RADIO_RICE_RICE_ERROR
+2705 RADIO_RICE_MGR_FSM_ERROR
+2706 RADIO_RICE_RADIO_FSM_ERROR
+2707 RADIO_RICE_ILLEGAL_RECONFIGURE
+2708 RADIO_RICE_CONNECTION_CLASH
+2709 RADIO_RICE_FSM_CHANGE_PARAMS
+270a RADIO_RICE_FSM_INADEQUATE_TIME
+270b RADIO_RICE_BAD_ANTENNA_GAIN_SETTINGS
+2710 RADIO_HAL_BAD_FREQ_COMP_TABLE_TYPE
+2711 RADIO_HAL_BAD_TEMP_COMP_TABLE_TYPE
+2712 RADIO_HAL_BAD_SIG_GEN_WAVEFORM_TYPE
+2713 RADIO_HAL_BAD_SIG_GEN_LOCATION_TYPE
+2714 RADIO_HAL_UNKNOWN_TX_TRIM_TYPE
+2715 RADIO_HAL_UNKNOWN_TX_LOOPBACK_TYPE
+2716 RADIO_HAL_BAD_CONFIGURATION
+2717 RADIO_HAL_BAD_PATH_MUX_CONFIGURATION
+2718 RADIO_HAL_PATH_MUX_SETUP_FAILED
+2719 RADIO_HAL_PATH_MUX_MAP_INDETERMINATE
+271a RADIO_HAL_INTERNAL
+271b RADIO_HAL_INVALID_RADIO_ID
+271c RADIO_HAL_BAD_RAMSW_REC
+271d RADIO_NOT_ENOUGH_SRAM_FOR_PLAYBACK_SIGNAL
+271e RADIO_PLAYBACK_FAILED
+271f RADIO_TOO_MANY_DPD_TRIM_FAILURES
+2720 RADIO_MIB_ERROR
+2721 RADIO_HAL_BAD_RAMSW_PLAY
+2722 RADIO_PHASE_COMPUTATION
+2723 RADIO_DPD_CALC_LOOPBACK_FAILED
+2724 RADIO_ILLEGAL_COMPLEX_DIVISION
+2725 RADIO_DPD_ALIGN_CAPTURE_FAIL
+2726 RADIO_HAL_BAD_CAPTURE_POINT_TX_RX_DEF
+2727 RADIO_TRIM_SETUP_ERROR
+2728 RADIO_NULL_REG_CACHE_PTR
+2729 RADIO_NULL_PTR
+272a RADIO_ILLEGAL_DIVISION
+272b RADIO_DEINIT_ALREADY_IN_PROGRESS
+272c RADIO_BAD_RF_CB_STATE
+272d RADIO_DPD_UNDEFINED_TRIM_STEP
+272e RADIO_RF_RX_DCOC_NULL_POINTER
+272f RADIO_REGISTER_LOG_VERIFY_FAIL
+2730 RADIO_INVALID_CALL_IN_IMM
+2731 RADIO_INVALID_CALL_IN_DPD_TRAIN
+2732 RADIO_UNKNOWN_BAND
+2733 RADIO_HAL_TOO_MANY_TX_GAIN_STEPS
+2734 RADIO_VCO_LOCK_FAILED
+2735 RADIO_PHY_FLEXIMAC_ST_INCONSISTENT
+2736 PA_SAT_IS_NULL
+2737 LARK_D00_INVALID_5G_FREQ
+2780 RADIO_HALMAC_FAILED_TO_INSTALL_MIB
+2781 RADIO_HALMAC_FAILED_TO_FIND_ROW
+2800 TEST_UNUSED
+2801 TEST_DPHPADPT_RX_OUT_OF_MBULKS
+2802 TEST_DPHPADPT_RX_UNEXPECTED_MPDU
+2803 TEST_DPHPADPT_RX_TOO_MANY_MPDUS_IN_AMPDU
+2810 TEST_MICRAME_BAD_RADIO_REQUEST
+2811 TEST_MICRAME_TX_QUEUE_EMPTY
+2812 TEST_MICRAME_TX_QUEUE_FULL
+2813 TEST_MICRAME_TX_NO_MEM_FOR_CANCEL
+2814 TEST_MICRAME_TX_BAD_PPDU_STATE
+2815 TEST_MICRAME_TX_BAD_MPDU_COUNT
+2816 TEST_MICRAME_TX_BAD_SLOT_STATE
+2817 TEST_MICRAME_TX_BAD_SLOT_COUNT
+2818 TEST_MICRAME_TX_BAD_MPDU_LEN
+2820 TEST_WLANLITE_MGR_FSM_ERROR
+2821 TEST_WLANLITE_LOAD_FRAME_PPDU_ALLOC
+2822 TEST_WLANLITE_INVALID_RADIO_ID
+2823 TEST_WLANLITE_INVALID_MAC_ID
+2824 TEST_WLANLITE_INVALID_RADIO_BITMAP
+2825 TEST_WLANLITE_BEAMFORMER
+2826 TEST_WLANLITE_CONN_FSM_ERROR
+2827 TEST_WLANLITE_DPHP_HW_LOCKUP
+2900 COEX_API_PERIODIC_EVENT_INVALID_ENTRY
+2910 COEX_STRAT_INIT_FAILURE
+2940 COEX_MAC_KA_BO_FAILURE
+2950 COEX_RAME_BAD_VIX
+2960 COEX_FLEXIMAC_INT_UNHANDLED
+2970 COEX_FLEXIMAC_INVALID_SEQ_NUM
+29ff COEX_LAST
+2a00 LOWER_MAC
+2a01 COMMON_HOSTIO_GENERIC
+2a02 COMMON_HOSTIO_HOST_NOT_RESPONSIVE
+2a03 COMMON_HOSTIO_VIRT_GENERIC
+2a04 COMMON_HOSTIO_VIRT_WLANLITE
+2a10 COMMON_PMALLOC_OUT_OF_MEMORY
+2a11 COMMON_PMALLOC_INVALID_MEMORY_CONFIG
+2a12 COMMON_PMALLOC_INVALID_POINTER
+2a13 COMMON_PMALLOC_MEMORY_EXHAUSTION
+2a20 COMMON_DEBUG_DWORD12_INVALID_PTR
+2a21 COMMON_DEBUG_DWORD12_SANITY_FAIL
+2a22 COMMON_DEBUG_SAP_TOO_LARGE_ALLOC_SZ
+2a23 COMMON_DEBUG_NOT_ALLOWED
+2a30 COMMON_SERVICE_FOS_RES_NOT_CLEANED
+2a31 COMMON_SERVICE_START_FAILED
+2a32 COMMON_SERVICE_STOP_FAILED
+2a33 COMMON_SERVICE_FOS_TASK_NOT_SCHEDULED
+2a34 COMMON_SERVICE_TOO_MANY_NON_RTOS_IRQ
+2a40 COMMON_FAULT_NOT_ALLOWED
+2a50 COMMON_HW_ILLEGAL_RESPONSE_RATE
+2a51 COMMON_RSA_OUT_OF_RANGE
+2a52 COMMON_LMIF_MAC_CONFIG_GENERIC
+2a60 COMMON_FSM_ALLOCATION_FAILURE
+2a61 COMMON_FSM_INVALID_SIGNAL
+2a62 COMMON_FSM_INVALID_PRIORITY
+2a63 COMMON_FSM_FAILURE
+2a64 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESS
+2a65 COMMON_FSM_SIGNAL_TO_UNKNOWN_PROCESSOR
+2a66 COMMON_FSM_SIGNAL_TO_ENV
+2a67 COMMON_FSM_EMPTY_TIMER_LIST
+2a68 COMMON_FSM_LAST_NEXT_NOT_NULL
+2a69 COMMON_FSM_LAST_IS_NULL
+2a6a COMMON_FSM_CHANGE_NOT_ALLOWED_IN_INTERRUPT_CONTEXT
+2a6b COMMON_FSM_INVALID_PID
+2a6c COMMON_FSM_DATA_NOT_READY
+2a6d COMMON_FSM_INVALID_RADIO_ID_TO_PID
+2a6e COMMON_FSM_INVALID_SCHDL_ID_TO_PID
+2a6f COMMON_FSM_TOO_MANY_SAVED_OR_FORWARD_EVENTS
+2a70 COMMON_UTILS_DATA_UNIT
+2a71 COMMON_UTILS_MAKE_FRAME
+2a72 COMMON_UTILS_LINKED_LIST
+2a80 COMMON_MIB_ROM_CORRUPT
+2a81 COMMON_MIB_OVERRIDE
+2a82 COMMON_MIB_GETACTOS
+2aa0 COMMON_SHARED_DATA_VIF_INVALID_ACCESS
+2aa1 COMMON_SHARED_DATA_VIF_STA_INVALID_ACCESS
+2aa2 COMMON_SHARED_DATA_VIF_AP_INVALID_ACCESS
+2aa3 COMMON_SHARED_DATA_VIF_NAN_INVALID_ACCESS
+2aa4 COMMON_SHARED_DATA_VIF_SCAN_INVALID_ACCESS
+2aa5 COMMON_SHARED_DATA_STA_INVALID_ACCESS
+2aa6 COMMON_SHARED_DATA_MISSING_CALLBACK
+2aa7 COMMON_SHARED_DATA_VIF_FTM_INVALID_ACCESS
+2aa8 COMMON_SHARED_DATA_DU_INVALID_ACCESS
+2aa9 COMMON_SHARED_DATA_CALLBACKS_ALREADY_TRIGGERED
+2aaa COMMON_SHARED_DATA_VIF_FTM_INVALID_BW
+2ab0 COMMON_PACKET_FILTER_GENERIC
+2ab1 COMMON_PACKET_FILTER_INVALID_PID
+2ab2 COMMON_PACKET_FILTER_LIST_HEAD_IS_NOT_NULL
+2ab3 COMMON_PACKET_FILTER_NOT_ALL_FILTERS_DELETED
+2ab4 COMMON_PACKET_FILTER_INVALID_PARAMETERS
+2ab5 COMMON_PACKET_FILTER_INSUFFICIENT_RESOURCE
+2ac0 COMMON_SMAPPER_GENERIC
+2ad0 COMMON_MBULK_GENERIC
+2ad1 COMMON_MBULK_CHAIN_ALREADY_HEAD_SET
+2ad2 COMMON_MBULK_CHAIN_CANNOT_RECLAIM_AS_USED
+2ad3 COMMON_MBULK_CHAIN_EXPECTED
+2ad4 COMMON_MBULK_CHAIN_WRITE_LEN_TOO_LARGE
+2ad5 COMMON_MBULK_DAT_AT_OFFSET_OUTSIDE_DATA
+2ad6 COMMON_MBULK_DAT_MOVE_OUTSIDE_DATA
+2ad7 COMMON_MBULK_DAT_MOVE_IS_READ_ONLY
+2ad8 COMMON_MBULK_DAT_ACCESS_NOT_ALLOWED
+2ad9 COMMON_MBULK_INVALID_POOL
+2ada COMMON_MBULK_MBULK_FREE_BUT_CHAINED
+2adb COMMON_MBULK_MSIGNAL_FREE_NO_SIGNAL
+2adc COMMON_MBULK_MSIGNAL_FREE_UNDER_DELIVERY
+2add COMMON_MBULK_POOL_CHECK_SANITY_FAILURE
+2ade COMMON_MBULK_INCORRECT_REFCNT
+2adf COMMON_MBULK_POOL_GET_FREE_OUTSIDE_POOL_MEMORY
+2ae0 COMMON_MBULK_POOL_GET_FREE_WRONG_OFFSET
+2ae1 COMMON_MBULK_POOL_NOT_4K_ALIGNED
+2ae2 COMMON_MBULK_POOL_PUT_AT_WRONG_OFFSET
+2ae3 COMMON_MBULK_POOL_PUT_NONE_IN_USE
+2ae4 COMMON_MBULK_POOL_PUT_OUTSIDE_POOL_MEMORY
+2ae5 COMMON_MBULK_RESIZE_EXCEEDS_DATA_BUFSIZ
+2ae6 COMMON_MBULK_SEG_DUPLICATE_RW
+2ae7 COMMON_MBULK_SEG_GENERIC_FREE_IN_OUTBOUND
+2ae8 COMMON_MBULK_SEG_GENERIC_FREE_NO_RETURN_TO_HOST
+2ae9 COMMON_MBULK_SEG_GENERIC_FREE_NOT_IN_USE
+2aea COMMON_MBULK_SEG_GENERIC_FREE_PTR_OUTSIDE_POOLS
+2aeb COMMON_MBULK_SEG_GENERIC_FREE_UNDER_DELIVERY
+2aec COMMON_MBULK_MULTIPLE_USERS
+2aed COMMON_MBULK_TOO_LARGE_SIZE_REQUESTED
+2aee COMMON_MBULK_TRIM_EXCEEDS_ACTUAL_DATA_LEN
+2aef COMMON_MBULK_SMAPPER_OP_NOT_SUPPORTED
+2af0 COMMON_GENERIC_EDP
+2af1 COMMON_GENERIC_RESET
+2af2 COMMON_CACHE_UNALIGNED_ADDR
+2af3 COMMON_MBULK_SMAPPER_FREE_NON_SMAPPER_MBULK
+2af4 COMMON_FSMLITE_GENERIC
+2aff COMMON_PLACEHOLDER_PLACEHOLDER_MAX
+mibkey 543
+0000 MIBKEY_NULL
+0001 DOT11RSNASTATSSTAADDRESS
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+1a9b UNIFIRADIORXSETTINGSREAD
+1aa3 UNIFIRADIOTXSETTINGSREAD
+1aab UNIFIRADIOTXIQDELAY
+1acb UNIFIRADIOTXPOWEROVERRIDE
+1adb UNIFIRATESTATSRXSUCCESSCOUNT
+1ae3 UNIFIRATESTATSTXSUCCESSCOUNT
+1aeb UNIFIRATESTATSRATE
+1af3 UNIFIRATESTATSRTSERRORCOUNT
+1afb UNIFIREADHARDWARECOUNTER
+1b03 UNIFIREADREG
+1b0b UNIFIREGULATORYPARAMETERS
+02c3 UNIFIRSNCAPABILITIES
+02c9 UNIFI24G40MHZCHANNELS
+02d1 UNIFIEXTENDEDCAPABILITIESDISABLED
+02d9 UNIFISUPPORTEDDATARATES
+0049 DOT11RSNASTATSCCMPDECRYPTERRORS
+02f3 UNIFIRADIOMEASUREMENTACTIVATED
+02fb UNIFIRADIOMEASUREMENTCAPABILITIES
+030d UNIFIVHTACTIVATED
+0315 UNIFIHTACTIVATED
+031d UNIFIENABLETWOSIMULTANEOUSPASSIVESCANSSAMEBAND
+0325 UNIFIROAMINGACTIVATED
+032d UNIFIROAMRSSISCANTRIGGER
+033d UNIFIROAMDELTATRIGGER
+034b UNIFIROAMCACHEDCHANNELSCANPERIOD
+0359 UNIFIFULLROAMSCANPERIOD
+0367 UNIFIROAMSOFTROAMINGENABLED
+036d UNIFIROAMSCANBAND
+0379 UNIFIROAMSCANMAXACTIVECHANNELTIME
+0059 DOT11RSNASTATSTKIPREPLAYS
+0009 DOT11RSNASTATSTKIPICVERRORS
+0385 UNIFIROAMFULLCHANNELSCANFREQUENCY
+038f UNIFIROAMMODE
+039b UNIFIROAMRSSISCANNOCANDIDATEDELTATRIGGER
+03a9 UNIFIROAMEAPTIMEOUT
+03b3 UNIFIROAMSCANCONTROL
+03bb UNIFIROAMDFSSCANMODE
+03c7 UNIFIROAMSCANHOMETIME
+03d1 UNIFIROAMSCANHOMEAWAYTIME
+03dd UNIFIROAMSCANNPROBE
+03e5 UNIFIAPOLBCDURATION
+oid 542
+100 dot11AssociationSAQueryMaximumTimeout
+101 dot11AssociationSAQueryRetryTimeout
+121 dot11RTSThreshold
+122 dot11ShortRetryLimit
+123 dot11LongRetryLimit
+124 dot11FragmentationThreshold
+146 dot11RTSSuccessCount
+148 dot11ACKFailureCount
+150 dot11MulticastReceivedFrameCount
+151 dot11FCSErrorCount
+153 dot11WEPUndecryptableCount
+183 dot11manufacturerProductVersion
+2000 unifiMLMEConnectionTimeOut
+2001 unifiMLMEScanChannelMaxScanTime
+2002 unifiMLMEScanChannelProbeInterval
+2003 unifiMLMEScanChannelRule
+2005 unifiMLMEDataReferenceTimeout
+2007 unifiMLMEScanProbeInterval
+2008 unifiMLMEScanHighRSSIThreshold
+2010 unifiMLMEScanDeltaRSSIThreshold
+2014 unifiMLMEScanMaximumAge
+2015 unifiMLMEScanMaximumResults
+2016 unifiMLMEAutonomousScanNoisy
+2018 unifiChannelBusyThreshold
+2020 unifiMacSequenceNumberRandomisationActivated
+2021 unifiFirmwareBuildID
+2022 unifiChipVersion
+2023 unifiFirmwarePatchBuildID
+2025 unifiMaxNumAntennaToUse
+2026 unifiHtCapabilities5G
+2027 unifiVhtCapabilities5G
+2028 unifiHtCapabilitiesSoftAp
+2029 unifiSoftAp40MHzOn24G
+2030 unifiBasicCapabilities
+2031 unifiExtendedCapabilities
+2032 unifiHtCapabilities
+2034 unifiRsnCapabilities
+2035 unifi24G40MHZChannels
+2036 unifiExtendedCapabilitiesDisabled
+2041 unifiSupportedDataRates
+2043 unifiRadioMeasurementActivated
+2044 unifiRadioMeasurementCapabilities
+2045 unifiVhtActivated
+2046 unifiHtActivated
+2047 unifiEnableTwoSimultaneousPassiveScansSameBand
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+2051 unifiRoamDeltaTrigger
+2052 unifiRoamCachedChannelScanPeriod
+2053 unifiFullRoamScanPeriod
+2054 unifiRoamSoftRoamingEnabled
+2055 unifiRoamScanBand
+2057 unifiRoamScanMaxActiveChannelTime
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+2060 unifiRoamMode
+2064 unifiRoamRssiScanNoCandidateDeltaTrigger
+2065 unifiRoamEAPTimeout
+2067 unifiRoamScanControl
+2068 unifiRoamDfsScanMode
+2069 unifiRoamScanHomeTime
+2070 unifiRoamScanHomeAwayTime
+2072 unifiRoamScanNProbe
+2076 unifiApOlbcDuration
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+2078 unifiDNSSupportActivated
+2079 unifiOffchannelScheduleTimeout
+2080 unifiFrameResponseTimeOut
+2081 unifiConnectionFailureTimeout
+2082 unifiConnectingProbeTimeout
+2083 unifiDisconnectTimeout
+2084 unifiFrameResponseCfmTxLifetimeTimeOut
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+2086 unifiForceActiveDuration
+2087 unifiMLMEScanMaxNumberOfProbeSets
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+2089 unifiAPAssociationTimeout
+2091 unifiHostNumAntennaControlActivated
+2094 unifiPeerBandwidth
+2095 unifiCurrentPeerNss
+2096 unifiPeerTxDataRate
+2097 unifiPeerRSSI
+2098 unifiMLMEStationInactivityTimeOut
+2099 unifiMLMECliInactivityTimeOut
+2100 unifiMLMEStationInitialKickTimeOut
+2110 unifiUartConfigure
+2111 unifiUartPios
+2141 unifiCrystalFrequencyTrim
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+2146 unifiExternalClockDetect
+2149 unifiExternalFastClockRequest
+2152 unifiWatchdogTimeout
+2154 unifiScanParameters
+2155 unifiOverrideEDCAParamActivated
+2156 unifiOverrideEDCAParam
+2158 unifiExternalFastClockRequestPIO
+2196 unifiRxDataRate
+2198 unifiPeerRxRetryCount
+2199 unifiPeerRxMulticastCount
+2200 unifiRSSI
+2201 unifiLastBssRSSI
+2202 unifiSNR
+2203 unifiLastBssSNR
+2204 unifiSwTxTimeout
+2205 unifiHwTxTimeout
+2206 unifiRateStatsRxSuccessCount
+2207 unifiRateStatsTxSuccessCount
+2208 unifiTxDataRate
+2209 unifiSNRExtraOffsetCCK
+2210 unifiRSSIMaxAveragingPeriod
+2211 unifiRSSIMinReceivedFrames
+2212 unifiRateStatsRate
+2213 unifiLastBssTxDataRate
+2214 unifiDiscardedFrameCount
+2215 unifiMacrameDebugStats
+2218 unifiCurrentTSFTime
+2219 unifiBaRxEnableTid
+2221 unifiBaTxEnableTid
+2222 unifiTrafficThresholdToSetupBA
+2223 unifiDplaneTXAmsduHWCapability
+2224 unifiDplaneTXAmsduSubframeCountMax
+2225 unifiBaConfig
+2226 unifiBaTxMaxNumber
+2227 unifiMoveBKtoBE
+2228 unifiBeaconReceived
+2229 unifiACRetries
+2230 unifiRadioOnTime
+2231 unifiRadioTxTime
+2232 unifiRadioRxTime
+2233 unifiRadioScanTime
+2234 unifiPSLeakyAP
+2235 unifiTqamActivated
+2236 unifiRadioOnTimeNan
+2239 unifiOutputRadioInfoToKernelLog
+2240 unifiNoAckActivationCount
+2241 unifiRxFcsErrorCount
+2245 unifiBeaconsReceivedPercentage
+2246 unifiARPDetectActivated
+2247 unifiARPDetectResponseCounter
+2249 unifiEnableMgmtTxPacketStats
+2250 unifiSwToHwQueueStats
+2251 unifiHostToSwQueueStats
+2252 unifiQueueStatsEnable
+2253 unifiTxDataConfirm
+2254 unifiThroughputDebug
+2255 unifiLoadDpdLut
+2256 unifiDpdMasterSwitch
+2257 unifiDpdPredistortGains
+2258 unifiOverrideDpdLut
+2260 unifiGoogleMaxNumberOfPeriodicScans
+2261 unifiGoogleMaxRSSISampleSize
+2262 unifiGoogleMaxHotlistAPs
+2263 unifiGoogleMaxSignificantWifiChangeAPs
+2264 unifiGoogleMaxBssidHistoryEntries
+2270 unifiMacBeaconTimeout
+2271 unifiMIFOffAllowed
+2272 unifiBlockScanAfterNumSchedVif
+2274 unifiSTAUsesOneAntennaWhenIdle
+2275 unifiSTAUsesMultiAntennasDuringConnect
+2276 unifiAPUsesOneAntennaWhenPeersIdle
+2277 deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+2278 unifiPreferredAntennaBitmap
+2279 unifiMaxConcurrentMACs
+2280 unifiLoadDpdLutPerRadio
+2281 unifiOverrideDpdLutPerRadio
+2294 unifiRoamDeauthReason
+2295 unifiRoamCUFactor
+2298 unifiRoamRSSIBoost
+2299 UnifiRoamTrackingScanPeriod
+2300 unifiRoamCuLocal
+2301 unifiRoamCUScanNoCandidateDeltaTrigger
+2302 unifiRoamAPSelectDeltaFactor
+2303 unifiRoamCUWeight
+2305 unifiRoamRssiweight
+2306 unifiRoamRssiFactor
+2307 unifiRSSICURoamScanTrigger
+2308 unifiRoamCUScanTrigger
+2309 unifiRoamBSSLoadMonitoringFrequency
+2310 unifiRoamBlacklistSize
+2311 unifiCUMeasurementInterval
+2312 unifiCurrentBssNss
+2313 unifiAPMimoUsed
+2314 unifiRoamEapolTimeout
+2315 unifiRoamingCount
+2316 unifiRoamingAKM
+2317 unifiCurrentBssBandwidth
+2318 unifiCurrentBssChannelFrequency
+2320 unifiLoggerEnabled
+2321 unifiMaPacketFateEnabled
+2324 unifiStaVifLinkNss
+2326 unifiFrameRXCounters
+2327 unifiFrameTXCounters
+2330 unifiLaaNssSpeculationIntervalSlotTime
+2331 unifiLaaNssSpeculationIntervalSlotMaxNum
+2332 unifiLaaBwSpeculationIntervalSlotTime
+2333 unifiLaaBwSpeculationIntervalSlotMaxNum
+2334 unifiLaaMcsSpeculationIntervalSlotTime
+2335 unifiLaaMcsSpeculationIntervalSlotMaxNum
+2336 unifiLaaGiSpeculationIntervalSlotTime
+2337 unifiLaaGiSpeculationIntervalSlotMaxNum
+2350 UnifiLaaTxDiversityBeamformEnabled
+2351 UnifiLaaTxDiversityBeamformMinMcs
+2352 UnifiLaaTxDiversityFixMode
+2356 unifiLaaProtectionConfigOverride
+2358 unifiRateStatsRTSErrorCount
+2362 unifiCSROnlyEIFSDuration
+2364 unifiOverrideDefaultBETXOPForHT
+2365 unifiOverrideDefaultBETXOP
+2366 unifiRXABBTrimSettings
+2367 unifiRadioTrimsEnable
+2368 unifiRadioCCAThresholds
+2369 unifiHardwarePlatform
+2370 unifiForceChannelBW
+2371 unifiDPDTrainingDuration
+2372 unifiTxFtrimSettings
+2373 unifiDPDTrainPacketConfig
+2374 unifiTxPowerTrimCommonConfig
+2375 unifiIqDebugEnabled
+2425 unifiCoexDebugOverrideBt
+2430 unifiLteMailbox
+2431 unifiLteMwsSignal
+2432 unifiLteEnableChannelAvoidance
+2433 unifiLteEnablePowerBackoff
+2434 unifiLteEnableTimeDomain
+2435 unifiLteEnableLteCoex
+2436 unifiLteBand40PowerBackoffChannels
+2437 unifiLteBand40PowerBackoffRsrpLow
+2438 unifiLteBand40PowerBackoffRsrpHigh
+2439 unifiLteBand40PowerBackoffRsrpAveragingAlpha
+2440 unifiLteSetChannel
+2441 unifiLteSetPowerBackoff
+2442 unifiLteSetTddDebugMode
+2443 unifiLteBand40AvoidChannels
+2444 unifiLteBand41AvoidChannels
+2445 unifiLteBand7AvoidChannels
+2480 unifiAPScanAbsenceDuration
+2481 unifiAPScanAbsencePeriod
+2485 unifiMLMESTAKeepAliveTimeoutCheck
+2486 unifiMLMEAPKeepAliveTimeoutCheck
+2487 unifiMLMEGOKeepAliveTimeoutCheck
+2488 unifiBSSMaxIdlePeriod
+2493 unifiSTAIdleModeEnabled
+2494 unifiFastPowerSaveTimeOutAggressive
+2495 unifiIdlemodeListenIntervalSkippingDTIM
+2496 unifiIdlemodeP2PListenIntervalSkippingDTIM
+2497 unifiAPIdleModeEnabled
+2500 unifiFastPowerSaveTimeout
+2501 unifiFastPowerSaveTimeOutSmall
+2502 unifiMLMESTAKeepAliveTimeout
+2503 unifiMLMEAPKeepAliveTimeout
+2504 unifiMLMEGOKeepAliveTimeout
+2505 unifiSTARouterAdvertisementMinimumIntervalToForward
+2506 unifiRoamConnectionQualityCheckWaitAfterConnect
+2507 unifiApBeaconMaxDrift
+2508 unifiBSSMaxIdlePeriodActivated
+2509 unifiVifIdleMonitorTime
+2510 unifiDisableLegacyPowerSave
+2511 unifiDebugForceActive
+2512 unifiStationActivityIdleTime
+2513 unifiDmsActivated
+2514 unifiPowerManagementDelayTimeout
+2515 unifiAPSDServicePeriodTimeout
+2516 unifiConcurrentPowerManagementDelayTimeout
+2517 unifiStationQosInfo
+2518 unifiListenIntervalSkippingDTIM
+2519 unifiListenInterval
+2520 unifiLegacyPsPollTimeout
+2521 unifiBeaconSkippingControl
+2522 unifiTogglePowerDomain
+2523 unifiP2PListenIntervalSkippingDTIM
+2524 unifiFragmentationDuration
+2526 unifiIdleModeLiteEnabled
+2527 unifiIdleModeEnabled
+2529 unifiDTIMWaitTimeout
+2530 unifiListenIntervalMaxTime
+2531 unifiScanMaxProbeTransmitLifetime
+2532 unifiPowerSaveTransitionPacketThreshold
+2533 unifiProbeResponseLifetime
+2534 unifiProbeResponseMaxRetry
+2535 unifiTrafficAnalysisPeriod
+2536 unifiAggressivePowerSaveTransitionPeriod
+2537 unifiActiveTimeAfterMoreBit
+2538 unifiDefaultDwellTime
+2540 unifiVhtCapabilities
+2541 unifiMAXVifScheduleDuration
+2542 unifiVifLongIntervalTime
+2543 unifiDisallowSchedRelinquish
+2544 unifiRameDplaneOperationTimeout
+2545 unifiDebugKeepRadioOn
+2546 unifiForceFixedDurationSchedule
+2547 unifiRameUpdateMibs
+2548 unifiGOScanAbsenceDuration
+2549 unifiGOScanAbsencePeriod
+2550 unifiMaxClient
+2556 unifiTdlsInP2pActivated
+2558 unifiTdlsActivated
+2559 unifiTdlsTPThresholdPktSecs
+2560 unifiTdlsRssiThreshold
+2561 unifiTdlsMaximumRetry
+2562 unifiTdlsTPMonitorSecs
+2563 unifiTdlsBasicHtMcsSet
+2564 unifiTdlsBasicVhtMcsSet
+2565 dot11TDLSDiscoveryRequestWindow
+2566 dot11TDLSResponseTimeout
+2567 dot11TDLSChannelSwitchActivated
+2568 unifiTdlsDesignForTestMode
+2569 unifiTdlsWiderBandwidthProhibited
+2577 unifiTdlsKeyLifeTimeInterval
+2578 unifiTdlsTeardownFrameTxTimeout
+2580 unifiWifiSharingActivated
+2582 unifiWiFiSharing5GHzChannel
+2583 unifiWifiSharingChannelSwitchCount
+2584 unifiChannelAnnouncementCount
+2585 unifiRATestStoredSA
+2586 unifiRATestStoreFrame
+2587 dot11TDLSPeerUAPSDBufferSTAActivated
+2600 unifiProbeResponseLifetimeP2P
+2601 unifiStaChannelSwitchSlowApActivated
+2604 unifiStaChannelSwitchSlowApMaxTime
+2605 unifiStaChannelSwitchSlowApPollInterval
+2606 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+2607 unifiMLMEScanMaxAerials
+2650 unifiAPFActivated
+2651 unifiAPFVersion
+2652 unifiAPFMaxSize
+2653 unifiAPFActiveModeEnabled
+4001 unifiCSROnlyMIBShield
+4071 unifiPrivateBbbTxFilterConfig
+4075 unifiPrivateSWAGCFrontEndGain
+4076 unifiPrivateSWAGCFrontEndLoss
+4077 unifiPrivateSWAGCExtThresh
+4078 unifiCSROnlyPowerCalDelay
+4079 unifiRxAgcControl
+4130 deprecated_unifiWapiQosMask
+4139 unifiWMMStallEnable
+4148 unifiRaaTxHostRate
+4149 unifiFallbackShortFrameRetryDistribution
+4150 unifiRXTHROUGHPUTLOW
+4151 unifiRXTHROUGHPUTHIGH
+4152 unifiSetFixedAMPDUAggregationSize
+4153 unifiThroughputDebugReportInterval
+4154 unifiDplaneTest1
+4155 unifiDplaneTest2
+4156 unifiDplaneTest3
+4157 unifiDplaneTest4
+4171 unifiPreEBRTWindow
+4173 unifiPostEBRTWindow
+4179 unifiPsPollThreshold
+430 dot11RSNAStatsSTAAddress
+433 dot11RSNAStatsTKIPICVErrors
+434 dot11RSNAStatsTKIPLocalMICFailures
+435 dot11RSNAStatsTKIPRemoteMICFailures
+436 dot11RSNAStatsCCMPReplays
+437 dot11RSNAStatsCCMPDecryptErrors
+438 dot11RSNAStatsTKIPReplays
+441 dot11RSNAStatsRobustMgmtCCMPReplays
+5000 unifiSableContainerSizeConfiguration
+5001 unifiSableFrameLogMode
+5002 unifiSableFrameLogCpuThresPercent
+5003 unifiSableFrameLogCpuOverheadPercent
+5010 unifiDebugSVCModeStackHighWaterMark
+5023 unifiOverrideEDCAParamBE
+5024 unifiOverrideEDCAParamBEEnable
+5026 unifiPanicSubSystemControl
+5027 unifiFaultEnable
+5028 unifiFaultSubSystemControl
+5029 unifiDebugModuleControl
+5030 unifiTxUsingLdpcActivated
+5031 unifiTxSettings
+5032 unifiTxGainSettings
+5033 unifiTxAntennaConnectionLossFrequency
+5034 unifiTxAntennaConnectionLoss
+5035 unifiTxAntennaMaxGainFrequency
+5036 unifiTxAntennaMaxGain
+5037 unifiRxExternalGainFrequency
+5038 unifiRxExternalGain
+5040 unifiTxSGI20Activated
+5041 unifiTxSGI40Activated
+5042 unifiTxSGI80Activated
+5043 unifiTxSGI160Activated
+5044 unifiMacAddressRandomisation
+5047 unifiMacAddressRandomisationMask
+5050 unifiWipsActivated
+5054 unifiRfTestModeActivated
+5055 unifiTxPowerDetectorResponse
+5056 unifiTxDetectorTemperatureCompensation
+5057 unifiTxDetectorFrequencyCompensation
+5058 unifiTxOpenLoopTemperatureCompensation
+5059 unifiTxOpenLoopFrequencyCompensation
+5060 unifiTxOfdmSelect
+5061 unifiTxDigGain
+5062 unifiChipTemperature
+5063 UnifiBatteryVoltage
+5064 unifiTxOOBConstraints
+5066 unifiTxPaGainDpdTemperatureCompensation
+5067 unifiTxPaGainDpdFrequencyCompensation
+5072 unifiTxPowerTrimConfig
+5080 unifiForceShortSlotTime
+5081 unifiTxGainStepSettings
+5082 unifiDebugDisableRadioNannyActions
+5083 unifiRxCckModemSensitivity
+5084 unifiDpdPerBandwidth
+5085 unifiBBVersion
+5086 unifiRFVersion
+5087 unifiReadHardwareCounter
+5088 unifiClearRadioTrimCache
+5089 unifiRadioTXSettingsRead
+5090 unifiModemSgiOffset
+5091 unifiRadioTxPowerOverride
+5092 unifiRxRadioCsMode
+5093 unifiRxPriEnergyDetThreshold
+5094 unifiRxSecEnergyDetThreshold
+5095 unifiAgcThresholds
+5096 unifiRadioRXSettingsRead
+5097 unifiStaticDpdGain
+5098 unifiIQBufferSize
+5099 unifiNarrowbandCCAThresholds
+5100 unifiRadioCCADebug
+5101 unifiCCACSThresh
+5102 unifiCCAMasterSwitch
+5103 unifiRxSyncCCACfg
+5104 unifiMacCCABusyTime
+5105 unifiMacSecChanClearTime
+5106 unifiDpdDebug
+5107 unifiNarrowbandCCADebug
+5109 unifiNannyTemperatureReportDelta
+5110 unifiNannyTemperatureReportInterval
+5111 unifiRadioRxDcocDebugIqValue
+5112 unifiRadioRxDcocDebug
+5113 unifiNannyRetrimDpdMod
+5114 unifiDisableDpdSubIteration
+5115 unifiRxRssiAdjustments
+5116 unifiFleximacCcaEdEnable
+5117 unifiRadioTxIqDelay
+5118 unifiDisableLNABypass
+5200 unifiEnableFlexiMacWatchdog
+53 dot11TDLSPeerUAPSDIndicationWindow
+5300 unifiRttCapabilities
+5301 unifiFtmMinDeltaFrames
+5302 unifiFtmPerBurst
+5303 unifiFtmBurstDuration
+5304 unifiFtmNumOfBurstsExponent
+5305 unifiFtmASAPModeActivated
+5306 unifiFtmResponderActivated
+5307 unifiFtmDefaultSessionEstablishmentTimeout
+5308 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+5309 unifiFtmDefaultGapBetweenBursts
+5310 unifiFtmDefaultTriggerDelay
+5311 unifiFtmDefaultEndBurstDelay
+5312 unifiFtmRequestValidationEnabled
+5313 unifiFtmResponseValidationEnabled
+5314 unifiFtmUseResponseParameters
+5315 unifiFtmInitialResponseTimeout
+5320 unifiFtmDSPInpBW
+5321 unifiFtmOFDMCutOffset
+5322 unifiFtmMeanAroundCluster
+5410 unifiMLMEScanContinueIfMoreThanXAps
+5411 unifiMLMEScanStopIfLessThanXNewAps
+5412 unifiScanMultiVifActivated
+5413 unifiScanNewAlgorithmActivated
+6010 unifiUnsyncVifLnaEnabled
+6011 unifiTPCMinPower2GMIMO
+6012 unifiTPCMinPower5GMIMO
+6013 unifiLnaControlEnabled
+6014 unifiLnaControlRssiThresholdLower
+6015 unifiLnaControlRssiThresholdUpper
+6016 unifiPowerIsGrip
+6018 unifiLowPowerRxConfig
+6019 unifiTPCEnabled
+6020 unifiCurrentTxpowerLevel
+6021 unifiUserSetTxpowerLevel
+6022 unifiTPCMaxPowerRSSIThreshold
+6023 unifiTPCMinPowerRSSIThreshold
+6024 unifiTPCMinPower2G
+6025 unifiTPCMinPower5G
+6026 unifiSarBackoff
+6027 unifiTPCUseAfterConnectRsp
+6028 unifiRadioLpRxRssiThresholdLower
+6029 unifiRadioLpRxRssiThresholdUpper
+6032 unifiTestTxPowerEnable
+6033 unifiLteCoexMaxPowerRSSIThreshold
+6034 unifiLteCoexMinPowerRSSIThreshold
+6035 unifiLteCoexPowerReduction
+6050 unifiPMFAssociationComebackTimeDelta
+6060 unifiTestTspecHack
+6061 unifiTestTspecHackValue
+6069 unifiDebugInstantDelivery
+6071 unifiDebugEnable
+6073 unifiDPlaneDebug
+6080 unifiNANActivated
+6081 unifiNANBeaconCapabilities
+6082 unifiNANMaxConcurrentClusters
+6083 unifiNANMaxConcurrentPublishes
+6084 unifiNANMaxConcurrentSubscribes
+6085 unifiNANMaxServiceNameLength
+6086 unifiNANMaxMatchFilterLength
+6087 unifiNANMaxTotalMatchFilterLength
+6088 unifiNANMaxServiceSpecificInfoLength
+6089 unifiNANMaxVSADataLength
+6090 unifiNANMaxMeshDataLength
+6091 unifiNANMaxNDIInterfaces
+6092 unifiNANMaxNDPSessions
+6093 unifiNANMaxAppInfoLength
+6094 unifiNANMatchExpirationTime
+6095 unifiNANDefaultScanDwellTime
+6096 unifiNANDefaultScanPeriod
+6097 unifiNANMaxChannelSwitchTime
+6098 unifiNANMacRandomisationActivated
+6100 hutsReadWriteDataElementInt32
+6101 hutsReadWriteDataElementBoolean
+6102 hutsReadWriteDataElementOctetString
+6103 hutsReadWriteTableInt16Row
+6104 hutsReadWriteTableOctetStringRow
+6105 hutsReadWriteRemoteProcedureCallInt32
+6107 hutsReadWriteRemoteProcedureCallOctetString
+6108 hutsReadWriteInternalAPIInt16
+6109 hutsReadWriteInternalAPIUint16
+6110 hutsReadWriteInternalAPIUint32
+6111 hutsReadWriteInternalAPIInt64
+6112 hutsReadWriteInternalAPIBoolean
+6113 hutsReadWriteInternalAPIOctetString
+6114 hutsReadWriteInternalAPIFixedSizeTableRow
+6115 hutsReadWriteInternalAPIVarSizeTableRow
+6116 hutsReadWriteInternalAPIFixSizeTableKey1Row
+6117 hutsReadWriteInternalAPIFixSizeTableKey2Row
+6118 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+6119 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+6120 hutsReadWriteInternalAPIFixSizeTableKeyRow
+6121 hutsReadWriteInternalAPIVarSizeTableKeyRow
+6122 unifiTestScanNoMedium
+6123 unifiDualBandConcurrency
+6124 unifiLoggerMaxDelayedEvents
+8011 unifiRegulatoryParameters
+8012 unifiSupportedChannels
+8013 unifiDefaultCountry
+8014 unifiCountryList
+8015 unifiOperatingClassParamters
+8016 unifiVifCountry
+8017 unifiNoCellMaxPower
+8018 unifiNoCellIncludedChannels
+8019 unifiRegDomVersion
+8020 unifiDefaultCountryWithoutCH12CH13
+8051 unifiReadReg
--- /dev/null
+2 dot11RSNAStatsSTAAddress
+2 dot11RSNAStatsTKIPICVErrors
+2 dot11RSNAStatsTKIPLocalMICFailures
+2 dot11RSNAStatsTKIPRemoteMICFailures
+2 dot11RSNAStatsCCMPReplays
+2 dot11RSNAStatsCCMPDecryptErrors
+2 dot11RSNAStatsTKIPReplays
+2 dot11RSNAStatsRobustMgmtCCMPReplays
+0 dot11TDLSPeerUAPSDIndicationWindow
+0 dot11AssociationSAQueryMaximumTimeout
+0 dot11AssociationSAQueryRetryTimeout
+0 dot11RTSThreshold
+0 dot11ShortRetryLimit
+0 dot11LongRetryLimit
+0 dot11FragmentationThreshold
+0 dot11RTSSuccessCount
+0 dot11ACKFailureCount
+0 dot11MulticastReceivedFrameCount
+0 dot11FCSErrorCount
+0 dot11WEPUndecryptableCount
+0 dot11manufacturerProductVersion
+0 unifiMLMEConnectionTimeOut
+0 unifiMLMEScanChannelMaxScanTime
+0 unifiMLMEScanChannelProbeInterval
+0 unifiMLMEScanChannelRule
+0 unifiMLMEDataReferenceTimeout
+0 unifiMLMEScanProbeInterval
+0 unifiMLMEScanHighRSSIThreshold
+0 unifiMLMEScanDeltaRSSIThreshold
+0 unifiMLMEScanMaximumAge
+0 unifiMLMEScanMaximumResults
+0 unifiMLMEAutonomousScanNoisy
+0 unifiChannelBusyThreshold
+0 unifiMacSequenceNumberRandomisationActivated
+0 unifiFirmwareBuildID
+0 unifiChipVersion
+0 unifiFirmwarePatchBuildID
+0 unifiMaxNumAntennaToUse
+0 unifiHtCapabilities5G
+0 unifiVhtCapabilities5G
+0 unifiHtCapabilitiesSoftAp
+0 unifiSoftAp40MHzOn24G
+0 unifiBasicCapabilities
+0 unifiExtendedCapabilities
+0 unifiHtCapabilities
+0 unifiRsnCapabilities
+0 unifi24G40MHZChannels
+0 unifiExtendedCapabilitiesDisabled
+0 unifiSupportedDataRates
+0 unifiRadioMeasurementActivated
+0 unifiRadioMeasurementCapabilities
+0 unifiVhtActivated
+0 unifiHtActivated
+0 unifiEnableTwoSimultaneousPassiveScansSameBand
+0 unifiRoamingActivated
+0 unifiRoamRssiScanTrigger
+0 unifiRoamDeltaTrigger
+0 unifiRoamCachedChannelScanPeriod
+0 unifiFullRoamScanPeriod
+0 unifiRoamSoftRoamingEnabled
+0 unifiRoamScanBand
+0 unifiRoamScanMaxActiveChannelTime
+0 unifiRoamFullChannelScanFrequency
+0 unifiRoamMode
+0 unifiRoamRssiScanNoCandidateDeltaTrigger
+0 unifiRoamEAPTimeout
+0 unifiRoamScanControl
+0 unifiRoamDfsScanMode
+0 unifiRoamScanHomeTime
+0 unifiRoamScanHomeAwayTime
+0 unifiRoamScanNProbe
+0 unifiApOlbcDuration
+0 unifiApOlbcInterval
+0 unifiDNSSupportActivated
+0 unifiOffchannelScheduleTimeout
+0 unifiFrameResponseTimeOut
+0 unifiConnectionFailureTimeout
+0 unifiConnectingProbeTimeout
+0 unifiDisconnectTimeout
+0 unifiFrameResponseCfmTxLifetimeTimeOut
+0 unifiFrameResponseCfmFailureTimeOut
+0 unifiForceActiveDuration
+0 unifiMLMEScanMaxNumberOfProbeSets
+0 unifiMLMEScanStopIfLessThanXFrames
+0 unifiAPAssociationTimeout
+0 unifiHostNumAntennaControlActivated
+0 unifiMLMEStationInactivityTimeOut
+0 unifiMLMECliInactivityTimeOut
+0 unifiMLMEStationInitialKickTimeOut
+0 unifiUartConfigure
+0 unifiUartPios
+0 unifiCrystalFrequencyTrim
+0 unifiEnableDorm
+0 unifiExternalClockDetect
+0 unifiExternalFastClockRequest
+0 unifiWatchdogTimeout
+0 unifiOverrideEDCAParamActivated
+0 unifiExternalFastClockRequestPIO
+0 unifiRxDataRate
+0 unifiRSSI
+0 unifiLastBssRSSI
+0 unifiSNR
+0 unifiLastBssSNR
+0 unifiSwTxTimeout
+0 unifiHwTxTimeout
+0 unifiTxDataRate
+0 unifiSNRExtraOffsetCCK
+0 unifiRSSIMaxAveragingPeriod
+0 unifiRSSIMinReceivedFrames
+0 unifiLastBssTxDataRate
+0 unifiDiscardedFrameCount
+0 unifiMacrameDebugStats
+0 unifiCurrentTSFTime
+0 unifiBaRxEnableTid
+0 unifiBaTxEnableTid
+0 unifiTrafficThresholdToSetupBA
+0 unifiDplaneTXAmsduHWCapability
+0 unifiDplaneTXAmsduSubframeCountMax
+0 unifiBaConfig
+0 unifiBaTxMaxNumber
+0 unifiMoveBKtoBE
+0 unifiBeaconReceived
+0 unifiPSLeakyAP
+0 unifiTqamActivated
+0 unifiOutputRadioInfoToKernelLog
+0 unifiNoAckActivationCount
+0 unifiRxFcsErrorCount
+0 unifiBeaconsReceivedPercentage
+0 unifiARPDetectActivated
+0 unifiARPDetectResponseCounter
+0 unifiEnableMgmtTxPacketStats
+0 unifiQueueStatsEnable
+0 unifiDpdMasterSwitch
+0 unifiGoogleMaxNumberOfPeriodicScans
+0 unifiGoogleMaxRSSISampleSize
+0 unifiGoogleMaxHotlistAPs
+0 unifiGoogleMaxSignificantWifiChangeAPs
+0 unifiGoogleMaxBssidHistoryEntries
+0 unifiMacBeaconTimeout
+0 unifiMIFOffAllowed
+0 unifiBlockScanAfterNumSchedVif
+0 unifiSTAUsesOneAntennaWhenIdle
+0 unifiSTAUsesMultiAntennasDuringConnect
+0 unifiAPUsesOneAntennaWhenPeersIdle
+0 deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+0 unifiPreferredAntennaBitmap
+0 unifiMaxConcurrentMACs
+0 unifiRoamDeauthReason
+0 UnifiRoamTrackingScanPeriod
+0 unifiRoamCuLocal
+0 unifiRoamCUScanNoCandidateDeltaTrigger
+0 unifiRoamAPSelectDeltaFactor
+0 unifiRoamCUWeight
+0 unifiRoamRssiweight
+0 unifiRoamBSSLoadMonitoringFrequency
+0 unifiRoamBlacklistSize
+0 unifiCUMeasurementInterval
+0 unifiCurrentBssNss
+0 unifiAPMimoUsed
+0 unifiRoamEapolTimeout
+0 unifiRoamingCount
+0 unifiRoamingAKM
+0 unifiCurrentBssBandwidth
+0 unifiCurrentBssChannelFrequency
+0 unifiLoggerEnabled
+0 unifiMaPacketFateEnabled
+0 unifiStaVifLinkNss
+0 unifiLaaNssSpeculationIntervalSlotTime
+0 unifiLaaNssSpeculationIntervalSlotMaxNum
+0 unifiLaaBwSpeculationIntervalSlotTime
+0 unifiLaaBwSpeculationIntervalSlotMaxNum
+0 unifiLaaMcsSpeculationIntervalSlotTime
+0 unifiLaaMcsSpeculationIntervalSlotMaxNum
+0 unifiLaaGiSpeculationIntervalSlotTime
+0 unifiLaaGiSpeculationIntervalSlotMaxNum
+0 UnifiLaaTxDiversityBeamformEnabled
+0 UnifiLaaTxDiversityBeamformMinMcs
+0 UnifiLaaTxDiversityFixMode
+0 unifiLaaProtectionConfigOverride
+0 unifiCSROnlyEIFSDuration
+0 unifiOverrideDefaultBETXOPForHT
+0 unifiOverrideDefaultBETXOP
+0 unifiRXABBTrimSettings
+0 unifiRadioTrimsEnable
+0 unifiHardwarePlatform
+0 unifiForceChannelBW
+0 unifiDPDTrainingDuration
+0 unifiTxPowerTrimCommonConfig
+0 unifiIqDebugEnabled
+0 unifiCoexDebugOverrideBt
+0 unifiLteMailbox
+0 unifiLteMwsSignal
+0 unifiLteEnableChannelAvoidance
+0 unifiLteEnablePowerBackoff
+0 unifiLteEnableTimeDomain
+0 unifiLteEnableLteCoex
+0 unifiLteBand40PowerBackoffChannels
+0 unifiLteBand40PowerBackoffRsrpLow
+0 unifiLteBand40PowerBackoffRsrpHigh
+0 unifiLteBand40PowerBackoffRsrpAveragingAlpha
+0 unifiLteSetChannel
+0 unifiLteSetPowerBackoff
+0 unifiLteSetTddDebugMode
+0 unifiLteBand40AvoidChannels
+0 unifiLteBand41AvoidChannels
+0 unifiLteBand7AvoidChannels
+0 unifiAPScanAbsenceDuration
+0 unifiAPScanAbsencePeriod
+0 unifiMLMESTAKeepAliveTimeoutCheck
+0 unifiMLMEAPKeepAliveTimeoutCheck
+0 unifiMLMEGOKeepAliveTimeoutCheck
+0 unifiBSSMaxIdlePeriod
+0 unifiSTAIdleModeEnabled
+0 unifiFastPowerSaveTimeOutAggressive
+0 unifiIdlemodeListenIntervalSkippingDTIM
+0 unifiIdlemodeP2PListenIntervalSkippingDTIM
+0 unifiAPIdleModeEnabled
+0 unifiFastPowerSaveTimeout
+0 unifiFastPowerSaveTimeOutSmall
+0 unifiMLMESTAKeepAliveTimeout
+0 unifiMLMEAPKeepAliveTimeout
+0 unifiMLMEGOKeepAliveTimeout
+0 unifiSTARouterAdvertisementMinimumIntervalToForward
+0 unifiRoamConnectionQualityCheckWaitAfterConnect
+0 unifiApBeaconMaxDrift
+0 unifiBSSMaxIdlePeriodActivated
+0 unifiVifIdleMonitorTime
+0 unifiDisableLegacyPowerSave
+0 unifiDebugForceActive
+0 unifiStationActivityIdleTime
+0 unifiDmsActivated
+0 unifiPowerManagementDelayTimeout
+0 unifiAPSDServicePeriodTimeout
+0 unifiConcurrentPowerManagementDelayTimeout
+0 unifiStationQosInfo
+0 unifiListenIntervalSkippingDTIM
+0 unifiListenInterval
+0 unifiLegacyPsPollTimeout
+0 unifiBeaconSkippingControl
+0 unifiTogglePowerDomain
+0 unifiP2PListenIntervalSkippingDTIM
+0 unifiFragmentationDuration
+0 unifiIdleModeLiteEnabled
+0 unifiIdleModeEnabled
+0 unifiDTIMWaitTimeout
+0 unifiListenIntervalMaxTime
+0 unifiScanMaxProbeTransmitLifetime
+0 unifiPowerSaveTransitionPacketThreshold
+0 unifiProbeResponseLifetime
+0 unifiProbeResponseMaxRetry
+0 unifiTrafficAnalysisPeriod
+0 unifiAggressivePowerSaveTransitionPeriod
+0 unifiActiveTimeAfterMoreBit
+0 unifiDefaultDwellTime
+0 unifiVhtCapabilities
+0 unifiMAXVifScheduleDuration
+0 unifiVifLongIntervalTime
+0 unifiDisallowSchedRelinquish
+0 unifiRameDplaneOperationTimeout
+0 unifiDebugKeepRadioOn
+0 unifiForceFixedDurationSchedule
+0 unifiRameUpdateMibs
+0 unifiGOScanAbsenceDuration
+0 unifiGOScanAbsencePeriod
+0 unifiMaxClient
+0 unifiTdlsInP2pActivated
+0 unifiTdlsActivated
+0 unifiTdlsTPThresholdPktSecs
+0 unifiTdlsRssiThreshold
+0 unifiTdlsMaximumRetry
+0 unifiTdlsTPMonitorSecs
+0 unifiTdlsBasicHtMcsSet
+0 unifiTdlsBasicVhtMcsSet
+0 dot11TDLSDiscoveryRequestWindow
+0 dot11TDLSResponseTimeout
+0 dot11TDLSChannelSwitchActivated
+0 unifiTdlsDesignForTestMode
+0 unifiTdlsWiderBandwidthProhibited
+0 unifiTdlsKeyLifeTimeInterval
+0 unifiTdlsTeardownFrameTxTimeout
+0 unifiWifiSharingActivated
+0 unifiWiFiSharing5GHzChannel
+0 unifiWifiSharingChannelSwitchCount
+0 unifiChannelAnnouncementCount
+0 unifiRATestStoredSA
+0 unifiRATestStoreFrame
+0 dot11TDLSPeerUAPSDBufferSTAActivated
+0 unifiProbeResponseLifetimeP2P
+0 unifiStaChannelSwitchSlowApActivated
+0 unifiStaChannelSwitchSlowApMaxTime
+0 unifiStaChannelSwitchSlowApPollInterval
+0 unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+0 unifiMLMEScanMaxAerials
+0 unifiAPFActivated
+0 unifiAPFVersion
+0 unifiAPFMaxSize
+0 unifiAPFActiveModeEnabled
+0 unifiCSROnlyMIBShield
+0 unifiPrivateBbbTxFilterConfig
+0 unifiPrivateSWAGCFrontEndGain
+0 unifiPrivateSWAGCFrontEndLoss
+0 unifiPrivateSWAGCExtThresh
+0 unifiCSROnlyPowerCalDelay
+0 unifiRxAgcControl
+0 deprecated_unifiWapiQosMask
+0 unifiWMMStallEnable
+0 unifiRaaTxHostRate
+0 unifiFallbackShortFrameRetryDistribution
+0 unifiRXTHROUGHPUTLOW
+0 unifiRXTHROUGHPUTHIGH
+0 unifiSetFixedAMPDUAggregationSize
+0 unifiThroughputDebugReportInterval
+0 unifiDplaneTest1
+0 unifiDplaneTest2
+0 unifiDplaneTest3
+0 unifiDplaneTest4
+0 unifiPreEBRTWindow
+0 unifiPostEBRTWindow
+0 unifiPsPollThreshold
+0 unifiSableContainerSizeConfiguration
+0 unifiSableFrameLogMode
+0 unifiSableFrameLogCpuThresPercent
+0 unifiSableFrameLogCpuOverheadPercent
+0 unifiDebugSVCModeStackHighWaterMark
+0 unifiOverrideEDCAParamBE
+0 unifiOverrideEDCAParamBEEnable
+0 unifiFaultEnable
+0 unifiTxUsingLdpcActivated
+0 unifiTxSGI20Activated
+0 unifiTxSGI40Activated
+0 unifiTxSGI80Activated
+0 unifiTxSGI160Activated
+0 unifiMacAddressRandomisation
+0 unifiMacAddressRandomisationMask
+0 unifiWipsActivated
+0 unifiRfTestModeActivated
+0 unifiTxOfdmSelect
+0 unifiTxDigGain
+0 unifiChipTemperature
+0 UnifiBatteryVoltage
+0 unifiForceShortSlotTime
+0 unifiDebugDisableRadioNannyActions
+0 unifiRxCckModemSensitivity
+0 unifiDpdPerBandwidth
+0 unifiBBVersion
+0 unifiRFVersion
+0 unifiClearRadioTrimCache
+0 unifiRxRadioCsMode
+0 unifiRxPriEnergyDetThreshold
+0 unifiRxSecEnergyDetThreshold
+0 unifiIQBufferSize
+0 unifiCCAMasterSwitch
+0 unifiRxSyncCCACfg
+0 unifiMacSecChanClearTime
+0 unifiNannyTemperatureReportDelta
+0 unifiNannyTemperatureReportInterval
+0 unifiRadioRxDcocDebugIqValue
+0 unifiRadioRxDcocDebug
+0 unifiNannyRetrimDpdMod
+0 unifiDisableDpdSubIteration
+0 unifiFleximacCcaEdEnable
+0 unifiDisableLNABypass
+0 unifiEnableFlexiMacWatchdog
+0 unifiRttCapabilities
+0 unifiFtmMinDeltaFrames
+0 unifiFtmPerBurst
+0 unifiFtmBurstDuration
+0 unifiFtmNumOfBurstsExponent
+0 unifiFtmASAPModeActivated
+0 unifiFtmResponderActivated
+0 unifiFtmDefaultSessionEstablishmentTimeout
+0 unifiFtmDefaultGapBeforeFirstBurstPerResponder
+0 unifiFtmDefaultGapBetweenBursts
+0 unifiFtmDefaultTriggerDelay
+0 unifiFtmDefaultEndBurstDelay
+0 unifiFtmRequestValidationEnabled
+0 unifiFtmResponseValidationEnabled
+0 unifiFtmUseResponseParameters
+0 unifiFtmInitialResponseTimeout
+0 unifiFtmDSPInpBW
+0 unifiFtmOFDMCutOffset
+0 unifiFtmMeanAroundCluster
+0 unifiMLMEScanContinueIfMoreThanXAps
+0 unifiMLMEScanStopIfLessThanXNewAps
+0 unifiScanMultiVifActivated
+0 unifiScanNewAlgorithmActivated
+0 unifiUnsyncVifLnaEnabled
+0 unifiTPCMinPower2GMIMO
+0 unifiTPCMinPower5GMIMO
+0 unifiLnaControlEnabled
+0 unifiLnaControlRssiThresholdLower
+0 unifiLnaControlRssiThresholdUpper
+0 unifiPowerIsGrip
+0 unifiLowPowerRxConfig
+0 unifiTPCEnabled
+0 unifiCurrentTxpowerLevel
+0 unifiUserSetTxpowerLevel
+0 unifiTPCMaxPowerRSSIThreshold
+0 unifiTPCMinPowerRSSIThreshold
+0 unifiTPCMinPower2G
+0 unifiTPCMinPower5G
+0 unifiTPCUseAfterConnectRsp
+0 unifiRadioLpRxRssiThresholdLower
+0 unifiRadioLpRxRssiThresholdUpper
+0 unifiTestTxPowerEnable
+0 unifiLteCoexMaxPowerRSSIThreshold
+0 unifiLteCoexMinPowerRSSIThreshold
+0 unifiLteCoexPowerReduction
+0 unifiPMFAssociationComebackTimeDelta
+0 unifiTestTspecHack
+0 unifiTestTspecHackValue
+0 unifiDebugInstantDelivery
+0 unifiDebugEnable
+0 unifiDPlaneDebug
+0 unifiNANActivated
+0 unifiNANBeaconCapabilities
+0 unifiNANMaxConcurrentClusters
+0 unifiNANMaxConcurrentPublishes
+0 unifiNANMaxConcurrentSubscribes
+0 unifiNANMaxServiceNameLength
+0 unifiNANMaxMatchFilterLength
+0 unifiNANMaxTotalMatchFilterLength
+0 unifiNANMaxServiceSpecificInfoLength
+0 unifiNANMaxVSADataLength
+0 unifiNANMaxMeshDataLength
+0 unifiNANMaxNDIInterfaces
+0 unifiNANMaxNDPSessions
+0 unifiNANMaxAppInfoLength
+0 unifiNANMatchExpirationTime
+0 unifiNANMaxChannelSwitchTime
+0 unifiNANMacRandomisationActivated
+0 hutsReadWriteDataElementInt32
+0 hutsReadWriteDataElementBoolean
+0 hutsReadWriteDataElementOctetString
+0 hutsReadWriteRemoteProcedureCallInt32
+0 hutsReadWriteInternalAPIInt16
+0 hutsReadWriteInternalAPIUint16
+0 hutsReadWriteInternalAPIUint32
+0 hutsReadWriteInternalAPIInt64
+0 hutsReadWriteInternalAPIBoolean
+0 hutsReadWriteInternalAPIOctetString
+0 unifiTestScanNoMedium
+0 unifiDualBandConcurrency
+0 unifiLoggerMaxDelayedEvents
+0 unifiSupportedChannels
+0 unifiCountryList
+0 unifiVifCountry
+0 unifiNoCellIncludedChannels
+0 unifiRegDomVersion
+0 unifiDefaultCountryWithoutCH12CH13
+2 hutsReadWriteInternalAPIFixSizeTableKeyRow
+1 hutsReadWriteInternalAPIFixSizeTableKey1Row
+1 hutsReadWriteInternalAPIFixSizeTableKey2Row
+1 hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+1 hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+1 hutsReadWriteInternalAPIFixedSizeTableRow
+1 hutsReadWriteInternalAPIVarSizeTableRow
+2 hutsReadWriteInternalAPIVarSizeTableKeyRow
+2 hutsReadWriteRemoteProcedureCallOctetString
+1 hutsReadWriteTableInt16Row
+1 hutsReadWriteTableOctetStringRow
+1 unifiACRetries
+1 unifiTxDataConfirm
+1 unifiAgcThresholds
+1 unifiCCACSThresh
+1 unifiDPDTrainPacketConfig
+1 unifiDebugModuleControl
+1 unifiDefaultCountry
+1 unifiDpdDebug
+1 unifiDpdPredistortGains
+1 unifiFaultSubSystemControl
+1 unifiFrameRXCounters
+1 unifiFrameTXCounters
+2 unifiLoadDpdLut
+2 unifiOverrideDpdLut
+3 unifiLoadDpdLutPerRadio
+3 unifiOverrideDpdLutPerRadio
+2 unifiMacCCABusyTime
+2 unifiModemSgiOffset
+1 unifiNANDefaultScanDwellTime
+1 unifiNANDefaultScanPeriod
+1 unifiNarrowbandCCADebug
+1 unifiNoCellMaxPower
+1 unifiOperatingClassParamters
+1 unifiOverrideEDCAParam
+1 unifiPanicSubSystemControl
+1 unifiPeerBandwidth
+1 unifiCurrentPeerNss
+1 unifiPeerTxDataRate
+1 unifiPeerRSSI
+1 unifiPeerRxRetryCount
+1 unifiPeerRxMulticastCount
+1 unifiSwToHwQueueStats
+1 unifiHostToSwQueueStats
+1 unifiRSSICURoamScanTrigger
+2 unifiRadioCCADebug
+1 unifiRadioCCAThresholds
+1 unifiNarrowbandCCAThresholds
+1 unifiRadioOnTime
+1 unifiRadioTxTime
+1 unifiRadioRxTime
+1 unifiRadioScanTime
+1 unifiRadioOnTimeNan
+2 unifiRadioRXSettingsRead
+2 unifiRadioTXSettingsRead
+1 unifiRadioTxIqDelay
+1 unifiRadioTxPowerOverride
+1 unifiRateStatsRxSuccessCount
+1 unifiRateStatsTxSuccessCount
+1 unifiRateStatsRate
+1 unifiRateStatsRTSErrorCount
+2 unifiReadHardwareCounter
+1 unifiReadReg
+1 unifiRegulatoryParameters
+1 unifiRoamCUFactor
+1 unifiRoamCUScanTrigger
+1 unifiRoamRSSIBoost
+1 unifiRoamRssiFactor
+1 unifiRxExternalGainFrequency
+1 unifiRxExternalGain
+2 unifiRxRssiAdjustments
+2 unifiSarBackoff
+1 unifiScanParameters
+1 unifiStaticDpdGain
+1 unifiThroughputDebug
+1 unifiTxAntennaConnectionLossFrequency
+1 unifiTxAntennaConnectionLoss
+1 unifiTxAntennaMaxGainFrequency
+1 unifiTxAntennaMaxGain
+1 unifiTxDetectorFrequencyCompensation
+1 unifiTxDetectorTemperatureCompensation
+1 unifiTxFtrimSettings
+1 unifiTxGainSettings
+1 unifiTxGainStepSettings
+1 unifiTxOOBConstraints
+1 unifiTxOpenLoopFrequencyCompensation
+1 unifiTxOpenLoopTemperatureCompensation
+1 unifiTxPaGainDpdFrequencyCompensation
+1 unifiTxPaGainDpdTemperatureCompensation
+1 unifiTxPowerDetectorResponse
+1 unifiTxPowerTrimConfig
+1 unifiTxSettings
--- /dev/null
+z dot11RSNAStatsSTAAddress
+z dot11RSNAStatsTKIPICVErrors
+z dot11RSNAStatsTKIPLocalMICFailures
+z dot11RSNAStatsTKIPRemoteMICFailures
+z dot11RSNAStatsCCMPReplays
+z dot11RSNAStatsCCMPDecryptErrors
+z dot11RSNAStatsTKIPReplays
+z dot11RSNAStatsRobustMgmtCCMPReplays
+z dot11TDLSPeerUAPSDIndicationWindow
+z dot11AssociationSAQueryMaximumTimeout
+z dot11AssociationSAQueryRetryTimeout
+ p dot11RTSThreshold
+ p dot11ShortRetryLimit
+ p dot11LongRetryLimit
+ p dot11FragmentationThreshold
+ p dot11RTSSuccessCount
+ p dot11ACKFailureCount
+ p dot11MulticastReceivedFrameCount
+ p dot11FCSErrorCount
+ p dot11WEPUndecryptableCount
+z dot11manufacturerProductVersion
+z unifiMLMEConnectionTimeOut
+z unifiMLMEScanChannelMaxScanTime
+z unifiMLMEScanChannelProbeInterval
+z unifiMLMEScanChannelRule
+z unifiMLMEDataReferenceTimeout
+z unifiMLMEScanProbeInterval
+z unifiMLMEScanHighRSSIThreshold
+z unifiMLMEScanDeltaRSSIThreshold
+z unifiMLMEScanMaximumAge
+z unifiMLMEScanMaximumResults
+z unifiMLMEAutonomousScanNoisy
+z unifiChannelBusyThreshold
+z unifiMacSequenceNumberRandomisationActivated
+z unifiFirmwareBuildID
+z unifiChipVersion
+z unifiFirmwarePatchBuildID
+z unifiMaxNumAntennaToUse
+z unifiHtCapabilities5G
+z unifiVhtCapabilities5G
+z unifiHtCapabilitiesSoftAp
+z unifiSoftAp40MHzOn24G
+z unifiBasicCapabilities
+z unifiExtendedCapabilities
+z unifiHtCapabilities
+z unifiRsnCapabilities
+z unifi24G40MHZChannels
+z unifiExtendedCapabilitiesDisabled
+z unifiSupportedDataRates
+z unifiRadioMeasurementActivated
+z unifiRadioMeasurementCapabilities
+z unifiVhtActivated
+z unifiHtActivated
+z unifiEnableTwoSimultaneousPassiveScansSameBand
+z unifiRoamingActivated
+z unifiRoamRssiScanTrigger
+z unifiRoamDeltaTrigger
+z unifiRoamCachedChannelScanPeriod
+z unifiFullRoamScanPeriod
+z unifiRoamSoftRoamingEnabled
+z unifiRoamScanBand
+z unifiRoamScanMaxActiveChannelTime
+z unifiRoamFullChannelScanFrequency
+z unifiRoamMode
+z unifiRoamRssiScanNoCandidateDeltaTrigger
+z unifiRoamEAPTimeout
+z unifiRoamScanControl
+z unifiRoamDfsScanMode
+z unifiRoamScanHomeTime
+z unifiRoamScanHomeAwayTime
+z unifiRoamScanNProbe
+z unifiApOlbcDuration
+z unifiApOlbcInterval
+z unifiDNSSupportActivated
+z unifiOffchannelScheduleTimeout
+z unifiFrameResponseTimeOut
+z unifiConnectionFailureTimeout
+z unifiConnectingProbeTimeout
+z unifiDisconnectTimeout
+z unifiFrameResponseCfmTxLifetimeTimeOut
+z unifiFrameResponseCfmFailureTimeOut
+z unifiForceActiveDuration
+z unifiMLMEScanMaxNumberOfProbeSets
+z unifiMLMEScanStopIfLessThanXFrames
+z unifiAPAssociationTimeout
+z unifiHostNumAntennaControlActivated
+z unifiMLMEStationInactivityTimeOut
+z unifiMLMECliInactivityTimeOut
+z unifiMLMEStationInitialKickTimeOut
+z unifiUartConfigure
+z unifiUartPios
+z unifiCrystalFrequencyTrim
+z unifiEnableDorm
+z unifiExternalClockDetect
+z unifiExternalFastClockRequest
+z unifiWatchdogTimeout
+z unifiOverrideEDCAParamActivated
+z unifiExternalFastClockRequestPIO
+ p unifiRxDataRate
+ p unifiRSSI
+z unifiLastBssRSSI
+ p unifiSNR
+z unifiLastBssSNR
+z unifiSwTxTimeout
+z unifiHwTxTimeout
+ p unifiTxDataRate
+z unifiSNRExtraOffsetCCK
+z unifiRSSIMaxAveragingPeriod
+z unifiRSSIMinReceivedFrames
+z unifiLastBssTxDataRate
+ p unifiDiscardedFrameCount
+z unifiMacrameDebugStats
+ p unifiCurrentTSFTime
+z unifiBaRxEnableTid
+z unifiBaTxEnableTid
+z unifiTrafficThresholdToSetupBA
+z unifiDplaneTXAmsduHWCapability
+z unifiDplaneTXAmsduSubframeCountMax
+z unifiBaConfig
+z unifiBaTxMaxNumber
+z unifiMoveBKtoBE
+ p unifiBeaconReceived
+ p unifiPSLeakyAP
+z unifiTqamActivated
+z unifiOutputRadioInfoToKernelLog
+ p unifiNoAckActivationCount
+ p unifiRxFcsErrorCount
+ p unifiBeaconsReceivedPercentage
+z unifiARPDetectActivated
+ p unifiARPDetectResponseCounter
+z unifiEnableMgmtTxPacketStats
+ p unifiQueueStatsEnable
+z unifiDpdMasterSwitch
+z unifiGoogleMaxNumberOfPeriodicScans
+z unifiGoogleMaxRSSISampleSize
+z unifiGoogleMaxHotlistAPs
+z unifiGoogleMaxSignificantWifiChangeAPs
+z unifiGoogleMaxBssidHistoryEntries
+z unifiMacBeaconTimeout
+z unifiMIFOffAllowed
+z unifiBlockScanAfterNumSchedVif
+z unifiSTAUsesOneAntennaWhenIdle
+z unifiSTAUsesMultiAntennasDuringConnect
+z unifiAPUsesOneAntennaWhenPeersIdle
+z deprecated_unifiUpdateAntennaCapabilitiesWhenScanning
+z unifiPreferredAntennaBitmap
+z unifiMaxConcurrentMACs
+z unifiRoamDeauthReason
+z UnifiRoamTrackingScanPeriod
+z unifiRoamCuLocal
+z unifiRoamCUScanNoCandidateDeltaTrigger
+z unifiRoamAPSelectDeltaFactor
+z unifiRoamCUWeight
+z unifiRoamRssiweight
+z unifiRoamBSSLoadMonitoringFrequency
+z unifiRoamBlacklistSize
+z unifiCUMeasurementInterval
+z unifiCurrentBssNss
+z unifiAPMimoUsed
+z unifiRoamEapolTimeout
+z unifiRoamingCount
+z unifiRoamingAKM
+z unifiCurrentBssBandwidth
+z unifiCurrentBssChannelFrequency
+z unifiLoggerEnabled
+z unifiMaPacketFateEnabled
+z unifiStaVifLinkNss
+z unifiLaaNssSpeculationIntervalSlotTime
+z unifiLaaNssSpeculationIntervalSlotMaxNum
+z unifiLaaBwSpeculationIntervalSlotTime
+z unifiLaaBwSpeculationIntervalSlotMaxNum
+z unifiLaaMcsSpeculationIntervalSlotTime
+z unifiLaaMcsSpeculationIntervalSlotMaxNum
+z unifiLaaGiSpeculationIntervalSlotTime
+z unifiLaaGiSpeculationIntervalSlotMaxNum
+z UnifiLaaTxDiversityBeamformEnabled
+z UnifiLaaTxDiversityBeamformMinMcs
+z UnifiLaaTxDiversityFixMode
+ p unifiLaaProtectionConfigOverride
+z unifiCSROnlyEIFSDuration
+z unifiOverrideDefaultBETXOPForHT
+z unifiOverrideDefaultBETXOP
+z unifiRXABBTrimSettings
+z unifiRadioTrimsEnable
+z unifiHardwarePlatform
+z unifiForceChannelBW
+z unifiDPDTrainingDuration
+z unifiTxPowerTrimCommonConfig
+z unifiIqDebugEnabled
+z unifiCoexDebugOverrideBt
+z unifiLteMailbox
+z unifiLteMwsSignal
+z unifiLteEnableChannelAvoidance
+z unifiLteEnablePowerBackoff
+z unifiLteEnableTimeDomain
+z unifiLteEnableLteCoex
+z unifiLteBand40PowerBackoffChannels
+z unifiLteBand40PowerBackoffRsrpLow
+z unifiLteBand40PowerBackoffRsrpHigh
+z unifiLteBand40PowerBackoffRsrpAveragingAlpha
+z unifiLteSetChannel
+z unifiLteSetPowerBackoff
+z unifiLteSetTddDebugMode
+z unifiLteBand40AvoidChannels
+z unifiLteBand41AvoidChannels
+z unifiLteBand7AvoidChannels
+z unifiAPScanAbsenceDuration
+z unifiAPScanAbsencePeriod
+z unifiMLMESTAKeepAliveTimeoutCheck
+z unifiMLMEAPKeepAliveTimeoutCheck
+z unifiMLMEGOKeepAliveTimeoutCheck
+z unifiBSSMaxIdlePeriod
+z unifiSTAIdleModeEnabled
+z unifiFastPowerSaveTimeOutAggressive
+z unifiIdlemodeListenIntervalSkippingDTIM
+z unifiIdlemodeP2PListenIntervalSkippingDTIM
+z unifiAPIdleModeEnabled
+z unifiFastPowerSaveTimeout
+z unifiFastPowerSaveTimeOutSmall
+z unifiMLMESTAKeepAliveTimeout
+z unifiMLMEAPKeepAliveTimeout
+z unifiMLMEGOKeepAliveTimeout
+z unifiSTARouterAdvertisementMinimumIntervalToForward
+z unifiRoamConnectionQualityCheckWaitAfterConnect
+z unifiApBeaconMaxDrift
+z unifiBSSMaxIdlePeriodActivated
+z unifiVifIdleMonitorTime
+z unifiDisableLegacyPowerSave
+z unifiDebugForceActive
+z unifiStationActivityIdleTime
+z unifiDmsActivated
+z unifiPowerManagementDelayTimeout
+ p unifiAPSDServicePeriodTimeout
+z unifiConcurrentPowerManagementDelayTimeout
+z unifiStationQosInfo
+z unifiListenIntervalSkippingDTIM
+z unifiListenInterval
+ p unifiLegacyPsPollTimeout
+z unifiBeaconSkippingControl
+z unifiTogglePowerDomain
+z unifiP2PListenIntervalSkippingDTIM
+ p unifiFragmentationDuration
+z unifiIdleModeLiteEnabled
+z unifiIdleModeEnabled
+z unifiDTIMWaitTimeout
+z unifiListenIntervalMaxTime
+z unifiScanMaxProbeTransmitLifetime
+z unifiPowerSaveTransitionPacketThreshold
+z unifiProbeResponseLifetime
+z unifiProbeResponseMaxRetry
+z unifiTrafficAnalysisPeriod
+z unifiAggressivePowerSaveTransitionPeriod
+z unifiActiveTimeAfterMoreBit
+z unifiDefaultDwellTime
+z unifiVhtCapabilities
+z unifiMAXVifScheduleDuration
+z unifiVifLongIntervalTime
+z unifiDisallowSchedRelinquish
+z unifiRameDplaneOperationTimeout
+z unifiDebugKeepRadioOn
+z unifiForceFixedDurationSchedule
+z unifiRameUpdateMibs
+z unifiGOScanAbsenceDuration
+z unifiGOScanAbsencePeriod
+z unifiMaxClient
+z unifiTdlsInP2pActivated
+z unifiTdlsActivated
+z unifiTdlsTPThresholdPktSecs
+z unifiTdlsRssiThreshold
+z unifiTdlsMaximumRetry
+z unifiTdlsTPMonitorSecs
+z unifiTdlsBasicHtMcsSet
+z unifiTdlsBasicVhtMcsSet
+z dot11TDLSDiscoveryRequestWindow
+z dot11TDLSResponseTimeout
+z dot11TDLSChannelSwitchActivated
+z unifiTdlsDesignForTestMode
+z unifiTdlsWiderBandwidthProhibited
+z unifiTdlsKeyLifeTimeInterval
+z unifiTdlsTeardownFrameTxTimeout
+z unifiWifiSharingActivated
+z unifiWiFiSharing5GHzChannel
+z unifiWifiSharingChannelSwitchCount
+z unifiChannelAnnouncementCount
+z unifiRATestStoredSA
+z unifiRATestStoreFrame
+z dot11TDLSPeerUAPSDBufferSTAActivated
+z unifiProbeResponseLifetimeP2P
+z unifiStaChannelSwitchSlowApActivated
+z unifiStaChannelSwitchSlowApMaxTime
+z unifiStaChannelSwitchSlowApPollInterval
+z unifiStaChannelSwitchSlowApProcedureTimeoutIncrement
+z unifiMLMEScanMaxAerials
+z unifiAPFActivated
+z unifiAPFVersion
+z unifiAPFMaxSize
+z unifiAPFActiveModeEnabled
+z unifiCSROnlyMIBShield
+z unifiPrivateBbbTxFilterConfig
+z unifiPrivateSWAGCFrontEndGain
+z unifiPrivateSWAGCFrontEndLoss
+z unifiPrivateSWAGCExtThresh
+z unifiCSROnlyPowerCalDelay
+z unifiRxAgcControl
+z deprecated_unifiWapiQosMask
+z unifiWMMStallEnable
+z unifiRaaTxHostRate
+z unifiFallbackShortFrameRetryDistribution
+z unifiRXTHROUGHPUTLOW
+z unifiRXTHROUGHPUTHIGH
+z unifiSetFixedAMPDUAggregationSize
+z unifiThroughputDebugReportInterval
+z unifiDplaneTest1
+z unifiDplaneTest2
+z unifiDplaneTest3
+z unifiDplaneTest4
+ p unifiPreEBRTWindow
+ p unifiPostEBRTWindow
+ p unifiPsPollThreshold
+z unifiSableContainerSizeConfiguration
+z unifiSableFrameLogMode
+z unifiSableFrameLogCpuThresPercent
+z unifiSableFrameLogCpuOverheadPercent
+z unifiDebugSVCModeStackHighWaterMark
+z unifiOverrideEDCAParamBE
+z unifiOverrideEDCAParamBEEnable
+z unifiFaultEnable
+z unifiTxUsingLdpcActivated
+z unifiTxSGI20Activated
+z unifiTxSGI40Activated
+z unifiTxSGI80Activated
+z unifiTxSGI160Activated
+z unifiMacAddressRandomisation
+z unifiMacAddressRandomisationMask
+z unifiWipsActivated
+z unifiRfTestModeActivated
+z unifiTxOfdmSelect
+z unifiTxDigGain
+z unifiChipTemperature
+z UnifiBatteryVoltage
+z unifiForceShortSlotTime
+z unifiDebugDisableRadioNannyActions
+z unifiRxCckModemSensitivity
+z unifiDpdPerBandwidth
+z unifiBBVersion
+z unifiRFVersion
+z unifiClearRadioTrimCache
+z unifiRxRadioCsMode
+z unifiRxPriEnergyDetThreshold
+z unifiRxSecEnergyDetThreshold
+z unifiIQBufferSize
+z unifiCCAMasterSwitch
+z unifiRxSyncCCACfg
+z unifiMacSecChanClearTime
+z unifiNannyTemperatureReportDelta
+z unifiNannyTemperatureReportInterval
+z unifiRadioRxDcocDebugIqValue
+z unifiRadioRxDcocDebug
+z unifiNannyRetrimDpdMod
+z unifiDisableDpdSubIteration
+z unifiFleximacCcaEdEnable
+z unifiDisableLNABypass
+z unifiEnableFlexiMacWatchdog
+z unifiRttCapabilities
+z unifiFtmMinDeltaFrames
+z unifiFtmPerBurst
+z unifiFtmBurstDuration
+z unifiFtmNumOfBurstsExponent
+z unifiFtmASAPModeActivated
+z unifiFtmResponderActivated
+z unifiFtmDefaultSessionEstablishmentTimeout
+z unifiFtmDefaultGapBeforeFirstBurstPerResponder
+z unifiFtmDefaultGapBetweenBursts
+z unifiFtmDefaultTriggerDelay
+z unifiFtmDefaultEndBurstDelay
+z unifiFtmRequestValidationEnabled
+z unifiFtmResponseValidationEnabled
+z unifiFtmUseResponseParameters
+z unifiFtmInitialResponseTimeout
+z unifiFtmDSPInpBW
+z unifiFtmOFDMCutOffset
+z unifiFtmMeanAroundCluster
+z unifiMLMEScanContinueIfMoreThanXAps
+z unifiMLMEScanStopIfLessThanXNewAps
+z unifiScanMultiVifActivated
+z unifiScanNewAlgorithmActivated
+z unifiUnsyncVifLnaEnabled
+z unifiTPCMinPower2GMIMO
+z unifiTPCMinPower5GMIMO
+z unifiLnaControlEnabled
+z unifiLnaControlRssiThresholdLower
+z unifiLnaControlRssiThresholdUpper
+z unifiPowerIsGrip
+z unifiLowPowerRxConfig
+z unifiTPCEnabled
+ p unifiCurrentTxpowerLevel
+z unifiUserSetTxpowerLevel
+z unifiTPCMaxPowerRSSIThreshold
+z unifiTPCMinPowerRSSIThreshold
+z unifiTPCMinPower2G
+z unifiTPCMinPower5G
+z unifiTPCUseAfterConnectRsp
+z unifiRadioLpRxRssiThresholdLower
+z unifiRadioLpRxRssiThresholdUpper
+z unifiTestTxPowerEnable
+z unifiLteCoexMaxPowerRSSIThreshold
+z unifiLteCoexMinPowerRSSIThreshold
+z unifiLteCoexPowerReduction
+z unifiPMFAssociationComebackTimeDelta
+z unifiTestTspecHack
+z unifiTestTspecHackValue
+z unifiDebugInstantDelivery
+z unifiDebugEnable
+ p unifiDPlaneDebug
+z unifiNANActivated
+z unifiNANBeaconCapabilities
+z unifiNANMaxConcurrentClusters
+z unifiNANMaxConcurrentPublishes
+z unifiNANMaxConcurrentSubscribes
+z unifiNANMaxServiceNameLength
+z unifiNANMaxMatchFilterLength
+z unifiNANMaxTotalMatchFilterLength
+z unifiNANMaxServiceSpecificInfoLength
+z unifiNANMaxVSADataLength
+z unifiNANMaxMeshDataLength
+z unifiNANMaxNDIInterfaces
+z unifiNANMaxNDPSessions
+z unifiNANMaxAppInfoLength
+z unifiNANMatchExpirationTime
+z unifiNANMaxChannelSwitchTime
+z unifiNANMacRandomisationActivated
+z hutsReadWriteDataElementInt32
+z hutsReadWriteDataElementBoolean
+z hutsReadWriteDataElementOctetString
+ p hutsReadWriteRemoteProcedureCallInt32
+z hutsReadWriteInternalAPIInt16
+z hutsReadWriteInternalAPIUint16
+z hutsReadWriteInternalAPIUint32
+ p hutsReadWriteInternalAPIInt64
+z hutsReadWriteInternalAPIBoolean
+z hutsReadWriteInternalAPIOctetString
+z unifiTestScanNoMedium
+z unifiDualBandConcurrency
+z unifiLoggerMaxDelayedEvents
+z unifiSupportedChannels
+z unifiCountryList
+ p unifiVifCountry
+z unifiNoCellIncludedChannels
+z unifiRegDomVersion
+z unifiDefaultCountryWithoutCH12CH13
+z hutsReadWriteInternalAPIFixSizeTableKeyRow
+ p hutsReadWriteInternalAPIFixSizeTableKey1Row
+ p hutsReadWriteInternalAPIFixSizeTableKey2Row
+z hutsReadWriteInternalAPIFixVarSizeTableKey1Row
+z hutsReadWriteInternalAPIFixVarSizeTableKey2Row
+z hutsReadWriteInternalAPIFixedSizeTableRow
+z hutsReadWriteInternalAPIVarSizeTableRow
+z hutsReadWriteInternalAPIVarSizeTableKeyRow
+z hutsReadWriteRemoteProcedureCallOctetString
+ p hutsReadWriteTableInt16Row
+z hutsReadWriteTableOctetStringRow
+ p unifiACRetries
+z unifiTxDataConfirm
+z unifiAgcThresholds
+z unifiCCACSThresh
+z unifiDPDTrainPacketConfig
+z unifiDebugModuleControl
+z unifiDefaultCountry
+z unifiDpdDebug
+z unifiDpdPredistortGains
+z unifiFaultSubSystemControl
+ p unifiFrameRXCounters
+ p unifiFrameTXCounters
+z unifiLoadDpdLut
+z unifiOverrideDpdLut
+z unifiLoadDpdLutPerRadio
+z unifiOverrideDpdLutPerRadio
+z unifiMacCCABusyTime
+z unifiModemSgiOffset
+z unifiNANDefaultScanDwellTime
+z unifiNANDefaultScanPeriod
+z unifiNarrowbandCCADebug
+z unifiNoCellMaxPower
+z unifiOperatingClassParamters
+z unifiOverrideEDCAParam
+z unifiPanicSubSystemControl
+z unifiPeerBandwidth
+z unifiCurrentPeerNss
+z unifiPeerTxDataRate
+z unifiPeerRSSI
+z unifiPeerRxRetryCount
+z unifiPeerRxMulticastCount
+ p unifiSwToHwQueueStats
+ p unifiHostToSwQueueStats
+z unifiRSSICURoamScanTrigger
+z unifiRadioCCADebug
+z unifiRadioCCAThresholds
+z unifiNarrowbandCCAThresholds
+z unifiRadioOnTime
+z unifiRadioTxTime
+z unifiRadioRxTime
+z unifiRadioScanTime
+z unifiRadioOnTimeNan
+z unifiRadioRXSettingsRead
+z unifiRadioTXSettingsRead
+z unifiRadioTxIqDelay
+z unifiRadioTxPowerOverride
+ p unifiRateStatsRxSuccessCount
+ p unifiRateStatsTxSuccessCount
+z unifiRateStatsRate
+ p unifiRateStatsRTSErrorCount
+z unifiReadHardwareCounter
+z unifiReadReg
+z unifiRegulatoryParameters
+z unifiRoamCUFactor
+z unifiRoamCUScanTrigger
+z unifiRoamRSSIBoost
+z unifiRoamRssiFactor
+z unifiRxExternalGainFrequency
+z unifiRxExternalGain
+z unifiRxRssiAdjustments
+z unifiSarBackoff
+z unifiScanParameters
+z unifiStaticDpdGain
+ p unifiThroughputDebug
+z unifiTxAntennaConnectionLossFrequency
+z unifiTxAntennaConnectionLoss
+z unifiTxAntennaMaxGainFrequency
+z unifiTxAntennaMaxGain
+z unifiTxDetectorFrequencyCompensation
+z unifiTxDetectorTemperatureCompensation
+z unifiTxFtrimSettings
+z unifiTxGainSettings
+z unifiTxGainStepSettings
+z unifiTxOOBConstraints
+z unifiTxOpenLoopFrequencyCompensation
+z unifiTxOpenLoopTemperatureCompensation
+z unifiTxPaGainDpdFrequencyCompensation
+z unifiTxPaGainDpdTemperatureCompensation
+z unifiTxPowerDetectorResponse
+z unifiTxPowerTrimConfig
+z unifiTxSettings
--- /dev/null
+Element dot11RSNAStatsSTAAddress BasicType string BERType string OID 1.2.3.2.1.2.3.1.430 Access read_only PSID 430 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType var BFAccess RO
+Element dot11RSNAStatsTKIPICVErrors BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.433 Access read_only Min 0 Max 4294967295 PSID 433 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPLocalMICFailures BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.434 Access read_only Min 0 Max 4294967295 PSID 434 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPRemoteMICFailures BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.435 Access read_only Min 0 Max 4294967295 PSID 435 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsCCMPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.436 Access read_only Min 0 Max 4294967295 PSID 436 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsCCMPDecryptErrors BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.437 Access read_only Min 0 Max 4294967295 PSID 437 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsTKIPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.438 Access read_only Min 0 Max 4294967295 PSID 438 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11RSNAStatsRobustMgmtCCMPReplays BasicType integer BERType integer_counter32 OID 1.2.3.2.1.2.3.1.441 Access read_only Min 0 Max 4294967295 PSID 441 GetFunction mibrsnastatsget ElementTable dot11RSNAStatsTable ElementTableIndices dot11RSNAConfigIndex:dot11RSNAStatsIndex BFType int64 BFAccess RO
+Element dot11TDLSPeerUAPSDIndicationWindow BasicType integer BERType integer OID 1.2.3.1.53 Access read_write PSID 53 Default 1 BFType uint16 BFAccess RW
+Element dot11AssociationSAQueryMaximumTimeout BasicType integer BERType integer_counter32 OID 1.2.3.1.100 Access read_write Min 0 Max 4294967295 PSID 100 Default 1000 BFType int64 BFAccess RW
+Element dot11AssociationSAQueryRetryTimeout BasicType integer BERType integer_counter32 OID 1.2.3.1.101 Access read_write Max 4294967295 PSID 101 Default 201 BFType int64 BFAccess RW
+Element dot11RTSThreshold BasicType integer BERType integer_unsigned32 OID 1.2.3.1.121 Access read_write Min 0 Max 65536 PSID 121 Default 65536 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RW
+Element dot11ShortRetryLimit BasicType integer BERType integer OID 1.2.3.1.122 Access read_write Min 1 Max 255 PSID 122 Default 32 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11LongRetryLimit BasicType integer BERType integer OID 1.2.3.1.123 Access read_write Min 1 Max 255 PSID 123 Default 4 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11FragmentationThreshold BasicType integer BERType integer OID 1.2.3.1.124 Access read_write Min 256 Max 11500 PSID 124 Default 3000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element dot11RTSSuccessCount BasicType integer BERType integer_counter32 OID 1.2.3.1.146 Access read_only Min 0 Max 4294967295 PSID 146 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11ACKFailureCount BasicType integer BERType integer_counter32 OID 1.2.3.1.148 Access read_only Min 0 Max 4294967295 PSID 148 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11MulticastReceivedFrameCount BasicType integer BERType integer_counter32 OID 1.2.3.1.150 Access read_only Min 0 Max 4294967295 PSID 150 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11FCSErrorCount BasicType integer BERType integer_counter32 OID 1.2.3.1.151 Access read_only Max 4294967295 PSID 151 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11WEPUndecryptableCount BasicType integer BERType integer_counter32 OID 1.2.3.1.153 Access read_only Min 0 Max 4294967295 PSID 153 GetPerVifFunction mibpktcntget BFType int64 BFAccess RO
+Element dot11manufacturerProductVersion BasicType string BERType string OID 1.2.3.1.183 Access read_only Min 0 Max 300 PSID 183 GetFunction mibgetfirmwareproductversion BFType var BFAccess RO
+Element unifiMLMEConnectionTimeOut BasicType integer BERType integer OID 1.2.3.1.2000 Access read_write PSID 2000 BFType uint16 BFAccess RW
+Element unifiMLMEScanChannelMaxScanTime BasicType string BERType string OID 1.2.3.1.2001 Access read_write Min 14 Max 14 PSID 2001 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiMLMEScanChannelProbeInterval BasicType string BERType string OID 1.2.3.1.2002 Access read_write Min 14 Max 14 PSID 2002 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiMLMEScanChannelRule BasicType string BERType string OID 1.2.3.1.2003 Access read_write Min 4 Max 4 PSID 2003 Default 0x00:0x01:0x00:0x01 BFType var BFAccess RW
+Element unifiMLMEDataReferenceTimeout BasicType integer BERType integer OID 1.2.3.1.2005 Access read_only Max 65534 PSID 2005 Default 0 BFType uint16 BFAccess RO
+Element unifiMLMEScanProbeInterval BasicType integer BERType integer OID 1.2.3.1.2007 Access read_write PSID 2007 BFType uint16 BFAccess RW
+Element unifiMLMEScanHighRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.2008 Access read_write Min -128 Max 127 PSID 2008 Default -90 BFType int16 BFAccess RW
+Element unifiMLMEScanDeltaRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.2010 Access read_write Min 1 Max 255 PSID 2010 Default 20 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaximumAge BasicType integer BERType integer OID 1.2.3.1.2014 Access read_write PSID 2014 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaximumResults BasicType integer BERType integer OID 1.2.3.1.2015 Access read_write PSID 2015 Default 100 BFType uint16 BFAccess RW
+Element unifiMLMEAutonomousScanNoisy BasicType integer BERType string OID 1.2.3.1.2016 Access read_write PSID 2016 BFType bool BFAccess RW
+Element unifiChannelBusyThreshold BasicType integer BERType integer OID 1.2.3.1.2018 Access read_write Min 1 Max 100 PSID 2018 Default 25 BFType uint16 BFAccess RW
+Element unifiMacSequenceNumberRandomisationActivated BasicType integer BERType string OID 1.2.3.1.2020 Access read_write PSID 2020 Default 1 BFType bool BFAccess RW
+Element unifiFirmwareBuildID BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2021 Access read_only PSID 2021 GetFunction mibgetfirmwarebuildid BFType uint32 BFAccess RO
+Element unifiChipVersion BasicType integer BERType integer OID 1.2.3.1.2022 Access read_only PSID 2022 BFType uint16 BFAccess RO
+Element unifiFirmwarePatchBuildID BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2023 Access read_only PSID 2023 GetFunction mibgetfirmwarebuildid BFType uint32 BFAccess RO
+Element unifiMaxNumAntennaToUse BasicType integer BERType integer OID 1.2.3.1.2025 Access read_write PSID 2025 Default 0x0202 BFType uint16 BFAccess RW
+Element unifiHtCapabilities5G BasicType string BERType string OID 1.2.3.1.2026 Access read_write Min 21 Max 21 PSID 2026 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiVhtCapabilities5G BasicType string BERType string OID 1.2.3.1.2027 Access read_write Min 12 Max 12 PSID 2027 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiHtCapabilitiesSoftAp BasicType string BERType string OID 1.2.3.1.2028 Access read_write Min 21 Max 21 PSID 2028 Default 0xef:0x0a:0x17:0xff:0xff:0x00:0x00:0x01:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiSoftAp40MHzOn24G BasicType integer BERType string OID 1.2.3.1.2029 Access read_only PSID 2029 Default 0 BFType bool BFAccess RO
+Element unifiBasicCapabilities BasicType integer BERType integer OID 1.2.3.1.2030 Access read_write PSID 2030 Default 0x1730 BFType uint16 BFAccess RW
+Element unifiExtendedCapabilities BasicType string BERType string OID 1.2.3.1.2031 Access read_write Min 9 Max 9 PSID 2031 Default 0x01:0x00:0x08:0x00:0x00:0x00:0x00:0x40:0x80 BFType var BFAccess RW
+Element unifiHtCapabilities BasicType string BERType string OID 1.2.3.1.2032 Access read_write Min 21 Max 21 PSID 2032 Default 0xef:0x0a:0x17:0xff:0xff:0x00:0x00:0x01:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiRsnCapabilities BasicType integer BERType integer OID 1.2.3.1.2034 Access read_write PSID 2034 BFType uint16 BFAccess RW
+Element unifi24G40MHZChannels BasicType integer BERType string OID 1.2.3.1.2035 Access read_only PSID 2035 Default 0 BFType bool BFAccess RO
+Element unifiExtendedCapabilitiesDisabled BasicType integer BERType string OID 1.2.3.1.2036 Access read_write PSID 2036 Default 0 BFType bool BFAccess RW
+Element unifiSupportedDataRates BasicType string BERType string OID 1.2.3.1.2041 Access read_only Min 2 Max 16 PSID 2041 Default 0x02:0x04:0x0b:0x0c:0x12:0x16:0x18:0x24:0x30:0x48:0x60:0x6c BFType var BFAccess RO
+Element unifiRadioMeasurementActivated BasicType integer BERType string OID 1.2.3.1.2043 Access read_write PSID 2043 Default 1 BFType bool BFAccess RW
+Element unifiRadioMeasurementCapabilities BasicType string BERType string OID 1.2.3.1.2044 Access read_write Min 5 Max 5 PSID 2044 Default 0x73:0x00:0x00:0x00:0x04 BFType var BFAccess RW
+Element unifiVhtActivated BasicType integer BERType string OID 1.2.3.1.2045 Access read_write PSID 2045 Default 0 BFType bool BFAccess RW
+Element unifiHtActivated BasicType integer BERType string OID 1.2.3.1.2046 Access read_write PSID 2046 Default 1 BFType bool BFAccess RW
+Element unifiEnableTwoSimultaneousPassiveScansSameBand BasicType integer BERType string OID 1.2.3.1.2047 Access read_write PSID 2047 Default 0 BFType bool BFAccess RW
+Element unifiRoamingActivated BasicType integer BERType string OID 1.2.3.1.2049 Access read_write PSID 2049 Default 1 BFType bool BFAccess RW
+Element unifiRoamRssiScanTrigger BasicType integer BERType integer OID 1.2.3.1.2050 Access read_write Min -128 Max 127 PSID 2050 Default -75 BFType int16 BFAccess RW
+Element unifiRoamDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2051 Access read_write Min 1 Max 255 PSID 2051 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamCachedChannelScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2052 Access read_write Min 1 PSID 2052 Default 20000000 BFType uint32 BFAccess RW
+Element unifiFullRoamScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2053 Access read_write Min 1 PSID 2053 Default 30000000 BFType uint32 BFAccess RW
+Element unifiRoamSoftRoamingEnabled BasicType integer BERType string OID 1.2.3.1.2054 Access read_write PSID 2054 BFType bool BFAccess RW
+Element unifiRoamScanBand BasicType integer BERType integer OID 1.2.3.1.2055 Access read_write Min 1 Max 2 PSID 2055 Default 2 BFType uint16 BFAccess RW
+Element unifiRoamScanMaxActiveChannelTime BasicType integer BERType integer OID 1.2.3.1.2057 Access read_write Min 1 PSID 2057 Default 120 BFType uint16 BFAccess RW
+Element unifiRoamFullChannelScanFrequency BasicType integer BERType integer OID 1.2.3.1.2058 Access read_write Min 1 PSID 2058 Default 9 BFType uint16 BFAccess RW
+Element unifiRoamMode BasicType integer BERType integer OID 1.2.3.1.2060 Access read_write Min 0 Max 2 PSID 2060 Default 1 BFType uint16 BFAccess RW
+Element unifiRoamRssiScanNoCandidateDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2064 Access read_only Min 1 Max 255 PSID 2064 Default 10 BFType uint16 BFAccess RO
+Element unifiRoamEAPTimeout BasicType integer BERType integer OID 1.2.3.1.2065 Access read_only PSID 2065 Default 200 BFType uint16 BFAccess RO
+Element unifiRoamScanControl BasicType integer BERType string OID 1.2.3.1.2067 Access read_write PSID 2067 Default 0 BFType bool BFAccess RW
+Element unifiRoamDfsScanMode BasicType integer BERType integer OID 1.2.3.1.2068 Access read_write Min 0 Max 2 PSID 2068 Default 1 BFType uint16 BFAccess RW
+Element unifiRoamScanHomeTime BasicType integer BERType integer OID 1.2.3.1.2069 Access read_write Min 40 PSID 2069 Default 45 BFType uint16 BFAccess RW
+Element unifiRoamScanHomeAwayTime BasicType integer BERType integer OID 1.2.3.1.2070 Access read_write Min 40 PSID 2070 Default 100 BFType uint16 BFAccess RW
+Element unifiRoamScanNProbe BasicType integer BERType integer OID 1.2.3.1.2072 Access read_write PSID 2072 Default 2 BFType uint16 BFAccess RW
+Element unifiApOlbcDuration BasicType integer BERType integer OID 1.2.3.1.2076 Access read_write PSID 2076 Default 300 BFType uint16 BFAccess RW
+Element unifiApOlbcInterval BasicType integer BERType integer OID 1.2.3.1.2077 Access read_write PSID 2077 Default 2000 BFType uint16 BFAccess RW
+Element unifiDNSSupportActivated BasicType integer BERType string OID 1.2.3.1.2078 Access read_write PSID 2078 Default 1 BFType bool BFAccess RW
+Element unifiOffchannelScheduleTimeout BasicType integer BERType integer OID 1.2.3.1.2079 Access read_write PSID 2079 Default 1000 BFType uint16 BFAccess RW
+Element unifiFrameResponseTimeOut BasicType integer BERType integer OID 1.2.3.1.2080 Access read_write Min 0 Max 500 PSID 2080 Default 200 BFType uint16 BFAccess RW
+Element unifiConnectionFailureTimeout BasicType integer BERType integer OID 1.2.3.1.2081 Access read_write Min 0 Max 20000 PSID 2081 Default 10000 BFType uint16 BFAccess RW
+Element unifiConnectingProbeTimeout BasicType integer BERType integer OID 1.2.3.1.2082 Access read_write Min 0 Max 100 PSID 2082 Default 10 BFType uint16 BFAccess RW
+Element unifiDisconnectTimeout BasicType integer BERType integer OID 1.2.3.1.2083 Access read_write Min 0 Max 3000 PSID 2083 Default 1500 BFType uint16 BFAccess RW
+Element unifiFrameResponseCfmTxLifetimeTimeOut BasicType integer BERType integer OID 1.2.3.1.2084 Access read_write PSID 2084 Default 10 BFType uint16 BFAccess RW
+Element unifiFrameResponseCfmFailureTimeOut BasicType integer BERType integer OID 1.2.3.1.2085 Access read_write PSID 2085 Default 40 BFType uint16 BFAccess RW
+Element unifiForceActiveDuration BasicType integer BERType integer OID 1.2.3.1.2086 Access read_write Min 0 Max 1000 PSID 2086 Default 200 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaxNumberOfProbeSets BasicType integer BERType integer OID 1.2.3.1.2087 Access read_write PSID 2087 BFType uint16 BFAccess RW
+Element unifiMLMEScanStopIfLessThanXFrames BasicType integer BERType integer OID 1.2.3.1.2088 Access read_write PSID 2088 Default 4 BFType uint16 BFAccess RW
+Element unifiAPAssociationTimeout BasicType integer BERType integer OID 1.2.3.1.2089 Access read_write PSID 2089 Default 2000 BFType uint16 BFAccess RW
+Element unifiHostNumAntennaControlActivated BasicType integer BERType string OID 1.2.3.1.2091 Access read_only PSID 2091 Default 0 BFType bool BFAccess RO
+Element unifiMLMEStationInactivityTimeOut BasicType integer BERType integer OID 1.2.3.1.2098 Access read_write PSID 2098 Default 3 BFType uint16 BFAccess RW
+Element unifiMLMECliInactivityTimeOut BasicType integer BERType integer OID 1.2.3.1.2099 Access read_write PSID 2099 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEStationInitialKickTimeOut BasicType integer BERType integer OID 1.2.3.1.2100 Access read_write PSID 2100 Default 50 BFType uint16 BFAccess RW
+Element unifiUartConfigure BasicType integer BERType integer OID 1.2.3.1.2110 Access read_write PSID 2110 Hide BFType uint16 BFAccess RW
+Element unifiUartPios BasicType integer BERType integer OID 1.2.3.1.2111 Access read_write NamedValues no_pios:1:tx_rx_only:2:tx_rx_rts_cts:3 NamedValues no_pios:1:tx_rx_only:2:tx_rx_rts_cts:3 PSID 2111 Hide BFType uint16 BFAccess RW
+Element unifiCrystalFrequencyTrim BasicType integer BERType integer OID 1.2.3.1.2141 Access read_only Max 63 PSID 2141 Default 31 BFType uint16 BFAccess RO
+Element unifiEnableDorm BasicType integer BERType string OID 1.2.3.1.2142 Access read_write PSID 2142 Default 1 BFType bool BFAccess RW
+Element unifiExternalClockDetect BasicType integer BERType string OID 1.2.3.1.2146 Access read_only PSID 2146 Default 0 BFType bool BFAccess RO
+Element unifiExternalFastClockRequest BasicType integer BERType integer OID 1.2.3.1.2149 Access read_only NamedValues no_clock_request:0:totem_pole:1:inverted_totem_pole:2:open_drain:3:open_source:4 NamedValues no_clock_request:0:totem_pole:1:inverted_totem_pole:2:open_drain:3:open_source:4 PSID 2149 Default 1 BFType uint16 BFAccess RO
+Element unifiWatchdogTimeout BasicType integer BERType integer OID 1.2.3.1.2152 Access read_only Min 1 PSID 2152 Default 1500 BFType uint16 BFAccess RO
+Element unifiOverrideEDCAParamActivated BasicType integer BERType string OID 1.2.3.1.2155 Access read_write PSID 2155 Default 0 BFType bool BFAccess RW
+Element unifiExternalFastClockRequestPIO BasicType integer BERType integer OID 1.2.3.1.2158 Access read_only Max 15 PSID 2158 Default 9 BFType uint16 BFAccess RO
+Element unifiRxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2196 Access read_only PSID 2196 GetPerVifFunction mibrxdatarateget BFType uint32 BFAccess RO
+Element unifiRSSI BasicType integer BERType integer OID 1.2.3.1.2200 Access read_only PSID 2200 GetPerVifFunction mibgetrssi BFType int16 BFAccess RO
+Element unifiLastBssRSSI BasicType integer BERType integer OID 1.2.3.1.2201 Access read_write PSID 2201 BFType int16 BFAccess RW
+Element unifiSNR BasicType integer BERType integer OID 1.2.3.1.2202 Access read_only PSID 2202 GetPerVifFunction mibgetsnr BFType int16 BFAccess RO
+Element unifiLastBssSNR BasicType integer BERType integer OID 1.2.3.1.2203 Access read_write PSID 2203 BFType int16 BFAccess RW
+Element unifiSwTxTimeout BasicType integer BERType integer OID 1.2.3.1.2204 Access read_write PSID 2204 Default 5 BFType uint16 BFAccess RW
+Element unifiHwTxTimeout BasicType integer BERType integer OID 1.2.3.1.2205 Access read_write PSID 2205 Default 512 BFType uint16 BFAccess RW
+Element unifiTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2208 Access read_only PSID 2208 GetPerVifFunction mibtxdatarateget BFType uint32 BFAccess RO
+Element unifiSNRExtraOffsetCCK BasicType integer BERType integer OID 1.2.3.1.2209 Access read_only PSID 2209 Default 8 BFType int16 BFAccess RO
+Element unifiRSSIMaxAveragingPeriod BasicType integer BERType integer OID 1.2.3.1.2210 Access read_only Min 1 PSID 2210 Default 3000 BFType uint16 BFAccess RO
+Element unifiRSSIMinReceivedFrames BasicType integer BERType integer OID 1.2.3.1.2211 Access read_only Min 1 PSID 2211 Default 2 BFType uint16 BFAccess RO
+Element unifiLastBssTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2213 Access read_write PSID 2213 BFType uint32 BFAccess RW
+Element unifiDiscardedFrameCount BasicType integer BERType integer OID 1.2.3.1.2214 Access read_only PSID 2214 GetPerVifFunction mibpktcntget BFType uint16 BFAccess RO
+Element unifiMacrameDebugStats BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2215 Access read_write PSID 2215 GetFunction mibuint32get SetFunction mibuint32set BFType uint32 BFAccess RW
+Element unifiCurrentTSFTime BasicType integer BERType integer OID 1.2.3.1.2218 Access read_only PSID 2218 GetPerVifFunction mibtsftime BFType int64 BFAccess RO
+Element unifiBaRxEnableTid BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2219 Access read_write PSID 2219 Default 0x1555 BFType uint32 BFAccess RW
+Element unifiBaTxEnableTid BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2221 Access read_write PSID 2221 Default 0x0557 BFType uint32 BFAccess RW
+Element unifiTrafficThresholdToSetupBA BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2222 Access read_write PSID 2222 Default 100 BFType uint32 BFAccess RW
+Element unifiDplaneTXAmsduHWCapability BasicType integer BERType integer OID 1.2.3.1.2223 Access read_only PSID 2223 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiDplaneTXAmsduSubframeCountMax BasicType integer BERType integer OID 1.2.3.1.2224 Access read_write Min 1 Max 4 PSID 2224 Default 3 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiBaConfig BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2225 Access read_write PSID 2225 Default 0x3fff01 BFType uint32 BFAccess RW
+Element unifiBaTxMaxNumber BasicType integer BERType integer OID 1.2.3.1.2226 Access read_write PSID 2226 Default 0x10 BFType uint16 BFAccess RW
+Element unifiMoveBKtoBE BasicType integer BERType string OID 1.2.3.1.2227 Access read_write PSID 2227 BFType bool BFAccess RW
+Element unifiBeaconReceived BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2228 Access read_only PSID 2228 GetPerVifFunction mibllsstatsget BFType uint32 BFAccess RO
+Element unifiPSLeakyAP BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2234 Access read_only PSID 2234 Default 0 GetPerVifFunction mibllsstatsget BFType uint32 BFAccess RO
+Element unifiTqamActivated BasicType integer BERType string OID 1.2.3.1.2235 Access read_write PSID 2235 Default 0 BFType bool BFAccess RW
+Element unifiOutputRadioInfoToKernelLog BasicType integer BERType string OID 1.2.3.1.2239 Access read_write PSID 2239 Default 0 BFType bool BFAccess RW
+Element unifiNoAckActivationCount BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2240 Access read_only PSID 2240 GetPerVifFunction mibuint32get BFType uint32 BFAccess RO
+Element unifiRxFcsErrorCount BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2241 Access read_only PSID 2241 GetPerVifFunction mibuint32get BFType uint32 BFAccess RO
+Element unifiBeaconsReceivedPercentage BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2245 Access read_only PSID 2245 Default 0 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RO
+Element unifiARPDetectActivated BasicType integer BERType string OID 1.2.3.1.2246 Access read_write PSID 2246 Default 0 BFType bool BFAccess RW
+Element unifiARPDetectResponseCounter BasicType integer BERType integer OID 1.2.3.1.2247 Access read_write PSID 2247 Default 0 GetPerVifFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiEnableMgmtTxPacketStats BasicType integer BERType string OID 1.2.3.1.2249 Access read_write PSID 2249 Default 1 SetFunction mib_mgmt_tx_packet_stats_set BFType bool BFAccess RW
+Element unifiQueueStatsEnable BasicType integer BERType string OID 1.2.3.1.2252 Access read_write PSID 2252 Default 0 SetPerVifFunction mibuint16set BFType bool BFAccess RW
+Element unifiDpdMasterSwitch BasicType integer BERType integer OID 1.2.3.1.2256 Access read_write PSID 2256 Default 0 GetFunction mibuint16get SetFunction mibricechangefsmparams BFType uint16 BFAccess RW
+Element unifiGoogleMaxNumberOfPeriodicScans BasicType integer BERType integer OID 1.2.3.1.2260 Access read_write PSID 2260 BFType uint16 BFAccess RW
+Element unifiGoogleMaxRSSISampleSize BasicType integer BERType integer OID 1.2.3.1.2261 Access read_write PSID 2261 BFType uint16 BFAccess RW
+Element unifiGoogleMaxHotlistAPs BasicType integer BERType integer OID 1.2.3.1.2262 Access read_write PSID 2262 BFType uint16 BFAccess RW
+Element unifiGoogleMaxSignificantWifiChangeAPs BasicType integer BERType integer OID 1.2.3.1.2263 Access read_write PSID 2263 BFType uint16 BFAccess RW
+Element unifiGoogleMaxBssidHistoryEntries BasicType integer BERType integer OID 1.2.3.1.2264 Access read_write PSID 2264 BFType uint16 BFAccess RW
+Element unifiMacBeaconTimeout BasicType integer BERType integer OID 1.2.3.1.2270 Access read_write PSID 2270 Default 128 BFType uint16 BFAccess RW
+Element unifiMIFOffAllowed BasicType integer BERType string OID 1.2.3.1.2271 Access read_write PSID 2271 Default 1 BFType bool BFAccess RW
+Element unifiBlockScanAfterNumSchedVif BasicType integer BERType integer OID 1.2.3.1.2272 Access read_write PSID 2272 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiSTAUsesOneAntennaWhenIdle BasicType integer BERType string OID 1.2.3.1.2274 Access read_write PSID 2274 Default 1 BFType bool BFAccess RW
+Element unifiSTAUsesMultiAntennasDuringConnect BasicType integer BERType string OID 1.2.3.1.2275 Access read_write PSID 2275 Default 1 BFType bool BFAccess RW
+Element unifiAPUsesOneAntennaWhenPeersIdle BasicType integer BERType string OID 1.2.3.1.2276 Access read_write PSID 2276 Default 0 SetFunction mibuint16set BFType bool BFAccess RW
+Element deprecated_unifiUpdateAntennaCapabilitiesWhenScanning BasicType integer BERType string OID 1.2.3.1.2277 Access read_write PSID 2277 Default 0 BFType bool BFAccess RW
+Element unifiPreferredAntennaBitmap BasicType integer BERType integer OID 1.2.3.1.2278 Access read_write PSID 2278 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiMaxConcurrentMACs BasicType integer BERType integer OID 1.2.3.1.2279 Access read_write PSID 2279 Default 2 BFType uint16 BFAccess RW
+Element unifiRoamDeauthReason BasicType integer BERType integer OID 1.2.3.1.2294 Access read_write PSID 2294 Default 3 BFType uint16 BFAccess RW
+Element UnifiRoamTrackingScanPeriod BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2299 Access read_write Min 1 PSID 2299 Default 5000000 BFType uint32 BFAccess RW
+Element unifiRoamCuLocal BasicType integer BERType integer OID 1.2.3.1.2300 Access read_write Min 0 Max 255 PSID 2300 Default 0 BFType uint16 BFAccess RW
+Element unifiRoamCUScanNoCandidateDeltaTrigger BasicType integer BERType integer OID 1.2.3.1.2301 Access read_write Min 0 Max 100 PSID 2301 Default 15 BFType uint16 BFAccess RW
+Element unifiRoamAPSelectDeltaFactor BasicType integer BERType integer OID 1.2.3.1.2302 Access read_write Min 0 Max 100 PSID 2302 Default 20 BFType uint16 BFAccess RW
+Element unifiRoamCUWeight BasicType integer BERType integer OID 1.2.3.1.2303 Access read_write Min 0 Max 100 PSID 2303 Default 35 BFType uint16 BFAccess RW
+Element unifiRoamRssiweight BasicType integer BERType integer OID 1.2.3.1.2305 Access read_write Min 0 Max 100 PSID 2305 Default 65 BFType uint16 BFAccess RW
+Element unifiRoamBSSLoadMonitoringFrequency BasicType integer BERType integer OID 1.2.3.1.2309 Access read_write Min 0 Max 100 PSID 2309 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamBlacklistSize BasicType integer BERType integer OID 1.2.3.1.2310 Access read_write Min 0 Max 100 PSID 2310 Default 5 BFType uint16 BFAccess RW
+Element unifiCUMeasurementInterval BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2311 Access read_write Min 1 Max 1000 PSID 2311 Default 500 BFType uint32 BFAccess RW
+Element unifiCurrentBssNss BasicType integer BERType integer OID 1.2.3.1.2312 Access read_only NamedValues SISO:0:MIMO_2x2:1:MIMO_3x3:2:MIMO_4x4:3 PSID 2312 Default 0 BFType uint16 BFAccess RO
+Element unifiAPMimoUsed BasicType integer BERType string OID 1.2.3.1.2313 Access read_only PSID 2313 Default 0 BFType bool BFAccess RO
+Element unifiRoamEapolTimeout BasicType integer BERType integer OID 1.2.3.1.2314 Access read_write Min 0 Max 100 PSID 2314 Default 10 BFType uint16 BFAccess RW
+Element unifiRoamingCount BasicType integer BERType integer OID 1.2.3.1.2315 Access read_only PSID 2315 Default 0 BFType uint16 BFAccess RO
+Element unifiRoamingAKM BasicType integer BERType integer OID 1.2.3.1.2316 Access read_only NamedValues AKM_None:0:AKM_OKC:1:AKM_FT_1X:2:AKM_PSK:3:AKM_FT_PSK:4:AKM_PMKSA_Caching:5:AKM_SAE:6:AKM_FT_SAE:7 NamedValues AKM_None:0:AKM_OKC:1:AKM_FT_1X:2:AKM_PSK:3:AKM_FT_PSK:4:AKM_PMKSA_Caching:5:AKM_SAE:6:AKM_FT_SAE:7 PSID 2316 Default 0 BFType uint16 BFAccess RO
+Element unifiCurrentBssBandwidth BasicType integer BERType integer OID 1.2.3.1.2317 Access read_only PSID 2317 BFType uint16 BFAccess RO
+Element unifiCurrentBssChannelFrequency BasicType integer BERType integer OID 1.2.3.1.2318 Access read_only PSID 2318 BFType uint16 BFAccess RO
+Element unifiLoggerEnabled BasicType integer BERType integer OID 1.2.3.1.2320 Access read_only NamedValues Disabled:0:Partial:1:Full:2 PSID 2320 Default 1 BFType uint16 BFAccess RO
+Element unifiMaPacketFateEnabled BasicType integer BERType string OID 1.2.3.1.2321 Access read_write PSID 2321 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiStaVifLinkNss BasicType integer BERType integer OID 1.2.3.1.2324 Access read_only NamedValues SISO:0:MIMO_2x2:1:MIMO_3x3:2:MIMO_4x4:3 PSID 2324 Default 0 BFType uint16 BFAccess RO
+Element unifiLaaNssSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2330 Access read_write PSID 2330 Default 300 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaNssSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2331 Access read_write PSID 2331 Default 5 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaBwSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2332 Access read_write PSID 2332 Default 300 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaBwSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2333 Access read_write PSID 2333 Default 8 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaMcsSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2334 Access read_write PSID 2334 Default 100 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaMcsSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2335 Access read_write PSID 2335 Default 10 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaGiSpeculationIntervalSlotTime BasicType integer BERType integer OID 1.2.3.1.2336 Access read_write PSID 2336 Default 100 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaGiSpeculationIntervalSlotMaxNum BasicType integer BERType integer OID 1.2.3.1.2337 Access read_write PSID 2337 Default 50 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element UnifiLaaTxDiversityBeamformEnabled BasicType integer BERType string OID 1.2.3.1.2350 Access read_write PSID 2350 Default 0 SetFunction mibboolset GetFunction mibboolget BFType bool BFAccess RW
+Element UnifiLaaTxDiversityBeamformMinMcs BasicType integer BERType integer OID 1.2.3.1.2351 Access read_write PSID 2351 Default 2 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element UnifiLaaTxDiversityFixMode BasicType integer BERType integer OID 1.2.3.1.2352 Access read_write PSID 2352 Default 0 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiLaaProtectionConfigOverride BasicType integer BERType integer OID 1.2.3.1.2356 Access read_write PSID 2356 Default 6 SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiCSROnlyEIFSDuration BasicType integer BERType integer OID 1.2.3.1.2362 Access read_only PSID 2362 Default 12 BFType uint16 BFAccess RO
+Element unifiOverrideDefaultBETXOPForHT BasicType integer BERType integer OID 1.2.3.1.2364 Access read_write PSID 2364 Default 171 BFType uint16 BFAccess RW
+Element unifiOverrideDefaultBETXOP BasicType integer BERType integer OID 1.2.3.1.2365 Access read_write PSID 2365 Default 78 BFType uint16 BFAccess RW
+Element unifiRXABBTrimSettings BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2366 Access read_write PSID 2366 Default 0 BFType uint32 BFAccess RW
+Element unifiRadioTrimsEnable BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2367 Access read_write PSID 2367 Default 0x0ff5 SetFunction mibricechangenonfsmparams BFType uint32 BFAccess RW
+Element unifiHardwarePlatform BasicType integer BERType integer OID 1.2.3.1.2369 Access read_write NamedValues PLATFORM_NOT_SET:0:T20:2:LASSEN_SMDK:17:LEMAN_S620_SMDK:18:LASSEN_UNIV:19:LEMAN_S612_SMDK:21:LASSEN_A5_REV02_2017_07:23:LASSEN_A7_REV01_2017_07:24:LASSEN_J3NEO_2017_08:25:LASSEN_J3TOP:26:LASSEN_J7TOP:27:LEMAN_S620_MAESTRO:28:LEMAN_S620_UNIV:31:LASSEN_A530D:33:LEMAN_S620_WING_DUALFEM:35:LASSEN_A6_SMA600_2018_04:36:LEMAN_S620_MAESTRO_SISO:39:LEMAN_S620_ROBUSTA2_DUALFEM:40:LEMAN_S620_ROBUSTA2_NOFEM:41:LEMAN_S620_A50:43:LEMAN_S620_A50_DUALFEM:44:LEMAN_S620_TROIKA_DUALFEM:45:LEMAN_S620_A50_MIMO:46:NACHO_S612_SMDK:47:NEUS_S620_SMDK:48:NEUS_S621_SMDK:49:LEMAN_S620_MAESTRO_VOLCANO:50:LEMAN_S620_A505Y:51:LEMAN_S620_A505N_DUALFEM:52:LEMAN_S620_FLEXI:53:LEMAN_S620_SHINE_F9T_DUALFEM:54:LEMAN_S620_M307F:55:LEMAN_S620_V_TD1904_DUALFEM:56:NEUS_S620_ERD:57:NEUS_S620_V_TD1905_DUALFEM:58:LEMAN_S620_A507FN_DUALFEM:59:NEUS_S620_L_RACER_DUALFEM:61:NEUS_S620_ERD_REV0:62:LEMAN_S620_A515FM:63:NACHO_S612_ERD:64:NEUS_S620_A71:65:NEUS_S620_ERD_VOLCANO:66:NEUS_S620_V_TD1905_DUALFEMSKY:67:NEUS_S620_A71_PRE:68:NACHO_S612_A31_UNIV:69:NACHO_S612_A31:70:LASSEN_A305FN_GLOBAL:71:NEUS_S620_ERD_VOLCANO_SISO:72:NEUS_S620_V_PD1938_DUALFEM:73:NEUS_S620_V_PD1949_DUALFEM:74:LASSEN_TAB_A4_S_2019_09:75:NEUS_S621_ERD_DUALFEM:76:NEUS_S621_ERD_DUALSWITCH:77:LEMAN_S620_G715FN_DUALFEM:78:LEMAN_S620_A515U_DUALFEM:79:LEMAN_S620_P615_MIMO:80:NEUS_S620_A716U_DUALFEM:81:LEMAN_S620_G715U_DUALFEM:82 NamedValues PLATFORM_NOT_SET:0:T20:2:LASSEN_SMDK:17:LEMAN_S620_SMDK:18:LASSEN_UNIV:19:LEMAN_S612_SMDK:21:LASSEN_A5_REV02_2017_07:23:LASSEN_A7_REV01_2017_07:24:LASSEN_J3NEO_2017_08:25:LASSEN_J3TOP:26:LASSEN_J7TOP:27:LEMAN_S620_MAESTRO:28:LEMAN_S620_UNIV:31:LASSEN_A530D:33:LEMAN_S620_WING_DUALFEM:35:LASSEN_A6_SMA600_2018_04:36:LEMAN_S620_MAESTRO_SISO:39:LEMAN_S620_ROBUSTA2_DUALFEM:40:LEMAN_S620_ROBUSTA2_NOFEM:41:LEMAN_S620_A50:43:LEMAN_S620_A50_DUALFEM:44:LEMAN_S620_TROIKA_DUALFEM:45:LEMAN_S620_A50_MIMO:46:NACHO_S612_SMDK:47:NEUS_S620_SMDK:48:NEUS_S621_SMDK:49:LEMAN_S620_MAESTRO_VOLCANO:50:LEMAN_S620_A505Y:51:LEMAN_S620_A505N_DUALFEM:52:LEMAN_S620_FLEXI:53:LEMAN_S620_SHINE_F9T_DUALFEM:54:LEMAN_S620_M307F:55:LEMAN_S620_V_TD1904_DUALFEM:56:NEUS_S620_ERD:57:NEUS_S620_V_TD1905_DUALFEM:58:LEMAN_S620_A507FN_DUALFEM:59:NEUS_S620_L_RACER_DUALFEM:61:NEUS_S620_ERD_REV0:62:LEMAN_S620_A515FM:63:NACHO_S612_ERD:64:NEUS_S620_A71:65:NEUS_S620_ERD_VOLCANO:66:NEUS_S620_V_TD1905_DUALFEMSKY:67:NEUS_S620_A71_PRE:68:NACHO_S612_A31_UNIV:69:NACHO_S612_A31:70:LASSEN_A305FN_GLOBAL:71:NEUS_S620_ERD_VOLCANO_SISO:72:NEUS_S620_V_PD1938_DUALFEM:73:NEUS_S620_V_PD1949_DUALFEM:74:LASSEN_TAB_A4_S_2019_09:75:NEUS_S621_ERD_DUALFEM:76:NEUS_S621_ERD_DUALSWITCH:77:LEMAN_S620_G715FN_DUALFEM:78:LEMAN_S620_A515U_DUALFEM:79:LEMAN_S620_P615_MIMO:80:NEUS_S620_A716U_DUALFEM:81:LEMAN_S620_G715U_DUALFEM:82 PSID 2369 Default 0 BFType uint16 BFAccess RW
+Element unifiForceChannelBW BasicType integer BERType integer OID 1.2.3.1.2370 Access read_write PSID 2370 Default 0 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiDPDTrainingDuration BasicType integer BERType integer OID 1.2.3.1.2371 Access read_write PSID 2371 Default 10 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiTxPowerTrimCommonConfig BasicType string BERType string OID 1.2.3.1.2374 Access read_write Min 3 Max 255 PSID 2374 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiIqDebugEnabled BasicType integer BERType string OID 1.2.3.1.2375 Access read_write PSID 2375 Default 0 BFType bool BFAccess RW
+Element unifiCoexDebugOverrideBt BasicType integer BERType string OID 1.2.3.1.2425 Access read_write PSID 2425 Default 0 BFType bool BFAccess RW
+Element unifiLteMailbox BasicType string BERType string OID 1.2.3.1.2430 Access read_write Min 36 Max 40 PSID 2430 BFType var BFAccess RW
+Element unifiLteMwsSignal BasicType integer BERType integer OID 1.2.3.1.2431 Access read_write PSID 2431 SetFunction mibltemwssignal BFType uint16 BFAccess RW
+Element unifiLteEnableChannelAvoidance BasicType integer BERType string OID 1.2.3.1.2432 Access read_write PSID 2432 Default 1 BFType bool BFAccess RW
+Element unifiLteEnablePowerBackoff BasicType integer BERType string OID 1.2.3.1.2433 Access read_write PSID 2433 Default 1 BFType bool BFAccess RW
+Element unifiLteEnableTimeDomain BasicType integer BERType string OID 1.2.3.1.2434 Access read_write PSID 2434 Default 1 BFType bool BFAccess RW
+Element unifiLteEnableLteCoex BasicType integer BERType string OID 1.2.3.1.2435 Access read_write PSID 2435 Default 1 BFType bool BFAccess RW
+Element unifiLteBand40PowerBackoffChannels BasicType string BERType string OID 1.2.3.1.2436 Access read_write Min 2 Max 2 PSID 2436 Default 0x01:0x02 BFType var BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpLow BasicType integer BERType integer OID 1.2.3.1.2437 Access read_write Min -140 Max -77 PSID 2437 Default -100 BFType int16 BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpHigh BasicType integer BERType integer OID 1.2.3.1.2438 Access read_write Min -140 Max -77 PSID 2438 Default -95 BFType int16 BFAccess RW
+Element unifiLteBand40PowerBackoffRsrpAveragingAlpha BasicType integer BERType integer OID 1.2.3.1.2439 Access read_write PSID 2439 Default 50 BFType uint16 BFAccess RW
+Element unifiLteSetChannel BasicType integer BERType integer OID 1.2.3.1.2440 Access read_write PSID 2440 SetFunction mibltesetchannel BFType uint16 BFAccess RW
+Element unifiLteSetPowerBackoff BasicType integer BERType integer OID 1.2.3.1.2441 Access read_write PSID 2441 SetFunction mibltesetpowerbackoff BFType uint16 BFAccess RW
+Element unifiLteSetTddDebugMode BasicType integer BERType integer OID 1.2.3.1.2442 Access read_write PSID 2442 SetFunction mibltesetltetdddebugmode BFType uint16 BFAccess RW
+Element unifiLteBand40AvoidChannels BasicType string BERType string OID 1.2.3.1.2443 Access read_write Min 2 Max 2 PSID 2443 Default 0x01:0x05 BFType var BFAccess RW
+Element unifiLteBand41AvoidChannels BasicType string BERType string OID 1.2.3.1.2444 Access read_write Min 2 Max 2 PSID 2444 Default 0x04:0x0D BFType var BFAccess RW
+Element unifiLteBand7AvoidChannels BasicType string BERType string OID 1.2.3.1.2445 Access read_write Min 2 Max 2 PSID 2445 Default 0x09:0x0D BFType var BFAccess RW
+Element unifiAPScanAbsenceDuration BasicType integer BERType integer OID 1.2.3.1.2480 Access read_write PSID 2480 Default 7 BFType uint16 BFAccess RW
+Element unifiAPScanAbsencePeriod BasicType integer BERType integer OID 1.2.3.1.2481 Access read_write PSID 2481 Default 14 BFType uint16 BFAccess RW
+Element unifiMLMESTAKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2485 Access read_write Max 100 PSID 2485 Default 5 BFType uint16 BFAccess RW
+Element unifiMLMEAPKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2486 Access read_write Max 100 PSID 2486 Default 5 BFType uint16 BFAccess RW
+Element unifiMLMEGOKeepAliveTimeoutCheck BasicType integer BERType integer OID 1.2.3.1.2487 Access read_write Max 100 PSID 2487 Default 5 BFType uint16 BFAccess RW
+Element unifiBSSMaxIdlePeriod BasicType integer BERType integer OID 1.2.3.1.2488 Access read_write Max 300 PSID 2488 Default 300 BFType uint16 BFAccess RW
+Element unifiSTAIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2493 Access read_write PSID 2493 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiFastPowerSaveTimeOutAggressive BasicType integer BERType integer OID 1.2.3.1.2494 Access read_only Max 2147483647 PSID 2494 Default 20000 BFType uint32 BFAccess RO
+Element unifiIdlemodeListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2495 Access read_write Min 0 Max 4294967295 PSID 2495 Default 0x00054645 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiIdlemodeP2PListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2496 Access read_write Min 0 Max 4294967295 PSID 2496 Default 0x00000002 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiAPIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2497 Access read_write PSID 2497 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiFastPowerSaveTimeout BasicType integer BERType integer OID 1.2.3.1.2500 Access read_only Max 2147483647 PSID 2500 Default 400000 BFType uint32 BFAccess RO
+Element unifiFastPowerSaveTimeOutSmall BasicType integer BERType integer OID 1.2.3.1.2501 Access read_only Max 2147483647 PSID 2501 Default 50000 BFType uint32 BFAccess RO
+Element unifiMLMESTAKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2502 Access read_write Max 2147 PSID 2502 Default 30 BFType uint16 BFAccess RW
+Element unifiMLMEAPKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2503 Access read_write Max 2147 PSID 2503 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEGOKeepAliveTimeout BasicType integer BERType integer OID 1.2.3.1.2504 Access read_write Max 2147 PSID 2504 Default 10 BFType uint16 BFAccess RW
+Element unifiSTARouterAdvertisementMinimumIntervalToForward BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2505 Access read_write Min 60 Max 4294967285 PSID 2505 Default 60 BFType uint32 BFAccess RW
+Element unifiRoamConnectionQualityCheckWaitAfterConnect BasicType integer BERType integer OID 1.2.3.1.2506 Access read_write PSID 2506 Default 200 BFType uint16 BFAccess RW
+Element unifiApBeaconMaxDrift BasicType integer BERType integer OID 1.2.3.1.2507 Access read_write PSID 2507 Default 0xFFFF BFType uint16 BFAccess RW
+Element unifiBSSMaxIdlePeriodActivated BasicType integer BERType string OID 1.2.3.1.2508 Access read_write PSID 2508 Default 1 BFType bool BFAccess RW
+Element unifiVifIdleMonitorTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2509 Access read_only Max 1800 PSID 2509 Default 1 BFType uint32 BFAccess RO
+Element unifiDisableLegacyPowerSave BasicType integer BERType string OID 1.2.3.1.2510 Access read_write PSID 2510 Default 1 BFType bool BFAccess RW
+Element unifiDebugForceActive BasicType integer BERType string OID 1.2.3.1.2511 Access read_write PSID 2511 Default 0 BFType bool BFAccess RW
+Element unifiStationActivityIdleTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2512 Access read_write PSID 2512 Default 500 BFType uint32 BFAccess RW
+Element unifiDmsActivated BasicType integer BERType string OID 1.2.3.1.2513 Access read_write PSID 2513 Default 0 BFType bool BFAccess RW
+Element unifiPowerManagementDelayTimeout BasicType integer BERType integer OID 1.2.3.1.2514 Access read_write Max 2147483647 PSID 2514 Default 30000 BFType uint32 BFAccess RW
+Element unifiAPSDServicePeriodTimeout BasicType integer BERType integer OID 1.2.3.1.2515 Access read_write PSID 2515 Default 20000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiConcurrentPowerManagementDelayTimeout BasicType integer BERType integer OID 1.2.3.1.2516 Access read_write Max 2147483647 PSID 2516 Default 10000 BFType uint32 BFAccess RW
+Element unifiStationQosInfo BasicType integer BERType integer OID 1.2.3.1.2517 Access read_write PSID 2517 Default 0 BFType uint16 BFAccess RW
+Element unifiListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2518 Access read_write Min 0 Max 4294967295 PSID 2518 Default 0x000A89AA SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiListenInterval BasicType integer BERType integer OID 1.2.3.1.2519 Access read_only Min 0 Max 100 PSID 2519 Default 10 BFType int16 BFAccess RO
+Element unifiLegacyPsPollTimeout BasicType integer BERType integer OID 1.2.3.1.2520 Access read_write PSID 2520 Default 15000 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiBeaconSkippingControl BasicType integer BERType integer_counter32 OID 1.2.3.1.2521 Access read_write Min 0 Max 4294967295 PSID 2521 Default 0x00010103 BFType int64 BFAccess RW
+Element unifiTogglePowerDomain BasicType integer BERType string OID 1.2.3.1.2522 Access read_write PSID 2522 Default 1 BFType bool BFAccess RW
+Element unifiP2PListenIntervalSkippingDTIM BasicType integer BERType integer_counter32 OID 1.2.3.1.2523 Access read_write Min 0 Max 4294967295 PSID 2523 Default 0x00000002 SetFunction mibuint32set BFType int64 BFAccess RW
+Element unifiFragmentationDuration BasicType integer BERType integer OID 1.2.3.1.2524 Access read_write PSID 2524 Default 0 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiIdleModeLiteEnabled BasicType integer BERType string OID 1.2.3.1.2526 Access read_write PSID 2526 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiIdleModeEnabled BasicType integer BERType string OID 1.2.3.1.2527 Access read_write PSID 2527 Default 0 SetFunction mibboolset BFType bool BFAccess RW
+Element unifiDTIMWaitTimeout BasicType integer BERType integer OID 1.2.3.1.2529 Access read_write PSID 2529 Default 50000 BFType uint16 BFAccess RW
+Element unifiListenIntervalMaxTime BasicType integer BERType integer OID 1.2.3.1.2530 Access read_only Min 0 Max 65535 PSID 2530 Default 1000 BFType uint16 BFAccess RO
+Element unifiScanMaxProbeTransmitLifetime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2531 Access read_write Min 1 PSID 2531 Default 64 BFType uint32 BFAccess RW
+Element unifiPowerSaveTransitionPacketThreshold BasicType integer BERType integer OID 1.2.3.1.2532 Access read_write PSID 2532 Default 10 BFType uint16 BFAccess RW
+Element unifiProbeResponseLifetime BasicType integer BERType integer OID 1.2.3.1.2533 Access read_write PSID 2533 Default 100 BFType uint16 BFAccess RW
+Element unifiProbeResponseMaxRetry BasicType integer BERType integer OID 1.2.3.1.2534 Access read_write Max 255 PSID 2534 Default 5 BFType uint16 BFAccess RW
+Element unifiTrafficAnalysisPeriod BasicType integer BERType integer OID 1.2.3.1.2535 Access read_write PSID 2535 Default 200 BFType uint16 BFAccess RW
+Element unifiAggressivePowerSaveTransitionPeriod BasicType integer BERType integer OID 1.2.3.1.2536 Access read_write PSID 2536 Default 5 BFType uint16 BFAccess RW
+Element unifiActiveTimeAfterMoreBit BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2537 Access read_write PSID 2537 Default 30 BFType uint32 BFAccess RW
+Element unifiDefaultDwellTime BasicType integer BERType integer OID 1.2.3.1.2538 Access read_write PSID 2538 Default 50 BFType uint16 BFAccess RW
+Element unifiVhtCapabilities BasicType string BERType string OID 1.2.3.1.2540 Access read_write Min 12 Max 12 PSID 2540 Default 0xb1:0x7a:0x11:0x03:0xfa:0xff:0x00:0x00:0xfa:0xff:0x00:0x00 BFType var BFAccess RW
+Element unifiMAXVifScheduleDuration BasicType integer BERType integer OID 1.2.3.1.2541 Access read_write PSID 2541 Default 50 BFType uint16 BFAccess RW
+Element unifiVifLongIntervalTime BasicType integer BERType integer OID 1.2.3.1.2542 Access read_write PSID 2542 Default 60 BFType uint16 BFAccess RW
+Element unifiDisallowSchedRelinquish BasicType integer BERType string OID 1.2.3.1.2543 Access read_write PSID 2543 Default 0 BFType bool BFAccess RW
+Element unifiRameDplaneOperationTimeout BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2544 Access read_only PSID 2544 Default 1000 BFType uint32 BFAccess RO
+Element unifiDebugKeepRadioOn BasicType integer BERType string OID 1.2.3.1.2545 Access read_write PSID 2545 Default 0 BFType bool BFAccess RW
+Element unifiForceFixedDurationSchedule BasicType integer BERType integer OID 1.2.3.1.2546 Access read_write PSID 2546 Default 0 BFType uint16 BFAccess RW
+Element unifiRameUpdateMibs BasicType integer BERType string OID 1.2.3.1.2547 Access read_write PSID 2547 BFType bool BFAccess RW
+Element unifiGOScanAbsenceDuration BasicType integer BERType integer OID 1.2.3.1.2548 Access read_write PSID 2548 Default 7 BFType uint16 BFAccess RW
+Element unifiGOScanAbsencePeriod BasicType integer BERType integer OID 1.2.3.1.2549 Access read_write PSID 2549 Default 14 BFType uint16 BFAccess RW
+Element unifiMaxClient BasicType integer BERType integer OID 1.2.3.1.2550 Access read_write Min 1 Max 10 PSID 2550 Default 10 BFType uint16 BFAccess RW
+Element unifiTdlsInP2pActivated BasicType integer BERType string OID 1.2.3.1.2556 Access read_write PSID 2556 Default 1 BFType bool BFAccess RW
+Element unifiTdlsActivated BasicType integer BERType string OID 1.2.3.1.2558 Access read_write PSID 2558 Default 1 BFType bool BFAccess RW
+Element unifiTdlsTPThresholdPktSecs BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2559 Access read_write PSID 2559 Default 100 BFType uint32 BFAccess RW
+Element unifiTdlsRssiThreshold BasicType integer BERType integer OID 1.2.3.1.2560 Access read_write PSID 2560 Default -75 BFType int16 BFAccess RW
+Element unifiTdlsMaximumRetry BasicType integer BERType integer OID 1.2.3.1.2561 Access read_write PSID 2561 BFType uint16 BFAccess RW
+Element unifiTdlsTPMonitorSecs BasicType integer BERType integer OID 1.2.3.1.2562 Access read_write PSID 2562 Default 10 BFType uint16 BFAccess RW
+Element unifiTdlsBasicHtMcsSet BasicType string BERType string OID 1.2.3.1.2563 Access read_write PSID 2563 BFType var BFAccess RW
+Element unifiTdlsBasicVhtMcsSet BasicType string BERType string OID 1.2.3.1.2564 Access read_write PSID 2564 BFType var BFAccess RW
+Element dot11TDLSDiscoveryRequestWindow BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2565 Access read_write PSID 2565 Default 10 BFType uint32 BFAccess RW
+Element dot11TDLSResponseTimeout BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2566 Access read_write PSID 2566 Default 5 BFType uint32 BFAccess RW
+Element dot11TDLSChannelSwitchActivated BasicType integer BERType string OID 1.2.3.1.2567 Access read_write PSID 2567 BFType bool BFAccess RW
+Element unifiTdlsDesignForTestMode BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2568 Access read_write PSID 2568 BFType uint32 BFAccess RW
+Element unifiTdlsWiderBandwidthProhibited BasicType integer BERType string OID 1.2.3.1.2569 Access read_write PSID 2569 Default 0 BFType bool BFAccess RW
+Element unifiTdlsKeyLifeTimeInterval BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2577 Access read_write PSID 2577 Default 0x000FFFFF BFType uint32 BFAccess RW
+Element unifiTdlsTeardownFrameTxTimeout BasicType integer BERType integer OID 1.2.3.1.2578 Access read_write PSID 2578 Default 500 BFType uint16 BFAccess RW
+Element unifiWifiSharingActivated BasicType integer BERType string OID 1.2.3.1.2580 Access read_write PSID 2580 Default 1 BFType bool BFAccess RW
+Element unifiWiFiSharing5GHzChannel BasicType string BERType string OID 1.2.3.1.2582 Access read_write Min 8 Max 8 PSID 2582 Default 0x00:0xC0:0xFF:0xFF:0x7F:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiWifiSharingChannelSwitchCount BasicType integer BERType integer OID 1.2.3.1.2583 Access read_write Min 3 Max 10 PSID 2583 Default 10 BFType uint16 BFAccess RW
+Element unifiChannelAnnouncementCount BasicType integer BERType integer OID 1.2.3.1.2584 Access read_write PSID 2584 Default 10 BFType uint16 BFAccess RW
+Element unifiRATestStoredSA BasicType string BERType string OID 1.2.3.1.2585 Access read_write PSID 2585 Default "0x00000000" BFType var BFAccess RW
+Element unifiRATestStoreFrame BasicType string BERType string OID 1.2.3.1.2586 Access read_write PSID 2586 Default "0x00000000" BFType var BFAccess RW
+Element dot11TDLSPeerUAPSDBufferSTAActivated BasicType integer BERType string OID 1.2.3.1.2587 Access read_write PSID 2587 Default 1 BFType bool BFAccess RW
+Element unifiProbeResponseLifetimeP2P BasicType integer BERType integer OID 1.2.3.1.2600 Access read_write PSID 2600 Default 500 BFType uint16 BFAccess RW
+Element unifiStaChannelSwitchSlowApActivated BasicType integer BERType string OID 1.2.3.1.2601 Access read_write PSID 2601 Default 0 BFType bool BFAccess RW
+Element unifiStaChannelSwitchSlowApMaxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.1.2604 Access read_write PSID 2604 Default 70 BFType uint32 BFAccess RW
+Element unifiStaChannelSwitchSlowApPollInterval BasicType integer BERType integer OID 1.2.3.1.2605 Access read_write PSID 2605 Default 1 BFType uint16 BFAccess RW
+Element unifiStaChannelSwitchSlowApProcedureTimeoutIncrement BasicType integer BERType integer OID 1.2.3.1.2606 Access read_write PSID 2606 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEScanMaxAerials BasicType integer BERType integer OID 1.2.3.1.2607 Access read_write Min 1 PSID 2607 Default 1 BFType uint16 BFAccess RW
+Element unifiAPFActivated BasicType integer BERType string OID 1.2.3.1.2650 Access read_write PSID 2650 Default 0 BFType bool BFAccess RW
+Element unifiAPFVersion BasicType integer BERType integer OID 1.2.3.1.2651 Access read_write PSID 2651 Default 4 BFType uint16 BFAccess RW
+Element unifiAPFMaxSize BasicType integer BERType integer OID 1.2.3.1.2652 Access read_only PSID 2652 Default 1024 BFType uint16 BFAccess RO
+Element unifiAPFActiveModeEnabled BasicType integer BERType integer OID 1.2.3.1.2653 Access read_write PSID 2653 Default 1 BFType uint16 BFAccess RW
+Element unifiCSROnlyMIBShield BasicType integer BERType integer OID 1.2.3.1.4001 Access not_accessible NamedValues open:1:warn:2:guard:3:alarm:4 NamedValues open:1:warn:2:guard:3:alarm:4 PSID 4001 Default 2 Hide BFType uint16 BFAccess NA
+Element unifiPrivateBbbTxFilterConfig BasicType integer BERType integer OID 1.2.3.1.4071 Access read_write PSID 4071 Default 0x17 Hide BFType uint16 BFAccess RW
+Element unifiPrivateSWAGCFrontEndGain BasicType integer BERType integer OID 1.2.3.1.4075 Access read_write Min -128 Max 127 PSID 4075 Default 0 Hide BFType int16 BFAccess RW
+Element unifiPrivateSWAGCFrontEndLoss BasicType integer BERType integer OID 1.2.3.1.4076 Access read_write Min -128 Max 127 PSID 4076 Default 0 Hide BFType int16 BFAccess RW
+Element unifiPrivateSWAGCExtThresh BasicType integer BERType integer OID 1.2.3.1.4077 Access read_write Min -128 Max 127 PSID 4077 Default -25 Hide BFType int16 BFAccess RW
+Element unifiCSROnlyPowerCalDelay BasicType integer BERType integer OID 1.2.3.1.4078 Access read_write PSID 4078 Default 0 Hide BFType uint16 BFAccess RW
+Element unifiRxAgcControl BasicType string BERType string OID 1.2.3.1.4079 Access read_write Min 9 Max 11 PSID 4079 GetFunction mibbmsgget SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element deprecated_unifiWapiQosMask BasicType integer BERType integer OID 1.2.3.1.4130 Access read_write PSID 4130 Default 15 Hide BFType uint16 BFAccess RW
+Element unifiWMMStallEnable BasicType integer BERType integer OID 1.2.3.1.4139 Access read_write PSID 4139 Default 1 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiRaaTxHostRate BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4148 Access read_write PSID 4148 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiFallbackShortFrameRetryDistribution BasicType string BERType string OID 1.2.3.1.4149 Access read_write Min 6 Max 5 PSID 4149 Default 0x3:0x2:0x2:0x2:0x1:0x0 GetFunction mibdplanefallbackget SetFunction mibdplanefallbackset BFType var BFAccess RW
+Element unifiRXTHROUGHPUTLOW BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4150 Access read_write PSID 4150 Default 37500000 Hide BFType uint32 BFAccess RW
+Element unifiRXTHROUGHPUTHIGH BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4151 Access read_write PSID 4151 Default 50000000 Hide BFType uint32 BFAccess RW
+Element unifiSetFixedAMPDUAggregationSize BasicType integer BERType integer OID 1.2.3.1.4152 Access read_write PSID 4152 Default 0 SetFunction mibuint16set GetFunction mibuint16get BFType uint16 BFAccess RW
+Element unifiThroughputDebugReportInterval BasicType integer BERType integer OID 1.2.3.1.4153 Access read_write PSID 4153 Default 1000 GetFunction mibuint16get SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiDplaneTest1 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4154 Access read_write PSID 4154 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest2 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4155 Access read_write PSID 4155 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest3 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4156 Access read_write PSID 4156 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiDplaneTest4 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.4157 Access read_write PSID 4157 Default 0 SetFunction mibuint32set GetFunction mibuint32get BFType uint32 BFAccess RW
+Element unifiPreEBRTWindow BasicType integer BERType integer OID 1.2.3.1.4171 Access read_only Max 2147483647 PSID 4171 Default 100 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set Hide BFType uint32 BFAccess RO
+Element unifiPostEBRTWindow BasicType integer BERType integer OID 1.2.3.1.4173 Access read_only Max 2147483647 PSID 4173 Default 2000 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set Hide BFType uint32 BFAccess RO
+Element unifiPsPollThreshold BasicType integer BERType integer OID 1.2.3.1.4179 Access read_write PSID 4179 Default 30 GetPerVifFunction mibuint16get SetPerVifFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiSableContainerSizeConfiguration BasicType string BERType string OID 1.2.3.1.5000 Access read_write Min 3 Max 3 PSID 5000 Default 0x64 BFType var BFAccess RW
+Element unifiSableFrameLogMode BasicType integer BERType integer OID 1.2.3.1.5001 Access read_write Min 0 Max 2 PSID 5001 Default 2 SetFunction mibsableframelogmodeset BFType uint16 BFAccess RW
+Element unifiSableFrameLogCpuThresPercent BasicType integer BERType integer OID 1.2.3.1.5002 Access read_write Min 0 Max 100 PSID 5002 Default 95 SetFunction mibsableframelogcputhresset BFType uint16 BFAccess RW
+Element unifiSableFrameLogCpuOverheadPercent BasicType integer BERType integer OID 1.2.3.1.5003 Access read_write Min 0 Max 100 PSID 5003 Default 3 SetFunction mibsableframelogcpuoverheadset BFType uint16 BFAccess RW
+Element unifiDebugSVCModeStackHighWaterMark BasicType integer BERType integer OID 1.2.3.1.5010 Access read_only PSID 5010 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiOverrideEDCAParamBE BasicType string BERType string OID 1.2.3.1.5023 Access read_write PSID 5023 BFType var BFAccess RW
+Element unifiOverrideEDCAParamBEEnable BasicType integer BERType string OID 1.2.3.1.5024 Access read_write PSID 5024 BFType bool BFAccess RW
+Element unifiFaultEnable BasicType integer BERType string OID 1.2.3.1.5027 Access read_write PSID 5027 Default 1 SetFunction mibfaultenableset BFType bool BFAccess RW
+Element unifiTxUsingLdpcActivated BasicType integer BERType string OID 1.2.3.1.5030 Access read_write PSID 5030 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI20Activated BasicType integer BERType string OID 1.2.3.1.5040 Access read_write PSID 5040 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI40Activated BasicType integer BERType string OID 1.2.3.1.5041 Access read_write PSID 5041 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI80Activated BasicType integer BERType string OID 1.2.3.1.5042 Access read_write PSID 5042 Default 1 BFType bool BFAccess RW
+Element unifiTxSGI160Activated BasicType integer BERType string OID 1.2.3.1.5043 Access read_write PSID 5043 Default 0 BFType bool BFAccess RW
+Element unifiMacAddressRandomisation BasicType integer BERType string OID 1.2.3.1.5044 Access read_write PSID 5044 Default 1 BFType bool BFAccess RW
+Element unifiMacAddressRandomisationMask BasicType string BERType string OID 1.2.3.1.5047 Access read_write Min 6 Max 6 PSID 5047 Default 0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiWipsActivated BasicType integer BERType string OID 1.2.3.1.5050 Access read_write PSID 5050 Default 1 BFType bool BFAccess RW
+Element unifiRfTestModeActivated BasicType integer BERType string OID 1.2.3.1.5054 Access read_write PSID 5054 Default 0 BFType bool BFAccess RW
+Element unifiTxOfdmSelect BasicType string BERType string OID 1.2.3.1.5060 Access read_write Min 4 Max 8 PSID 5060 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiTxDigGain BasicType string BERType string OID 1.2.3.1.5061 Access read_write Min 16 Max 48 PSID 5061 SetFunction mibricechangefsmparams BFType var BFAccess RW
+Element unifiChipTemperature BasicType integer BERType integer OID 1.2.3.1.5062 Access read_only PSID 5062 GetFunction mibint16get BFType int16 BFAccess RO
+Element UnifiBatteryVoltage BasicType integer BERType integer OID 1.2.3.1.5063 Access read_only PSID 5063 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiForceShortSlotTime BasicType integer BERType string OID 1.2.3.1.5080 Access read_write PSID 5080 Default 0 BFType bool BFAccess RW
+Element unifiDebugDisableRadioNannyActions BasicType integer BERType integer OID 1.2.3.1.5082 Access read_write PSID 5082 Default 0 GetFunction mibuint16get SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRxCckModemSensitivity BasicType string BERType string OID 1.2.3.1.5083 Access read_write Min 6 Max 6 PSID 5083 SetFunction mibhalmacmodemgenericset BFType var BFAccess RW
+Element unifiDpdPerBandwidth BasicType integer BERType integer OID 1.2.3.1.5084 Access read_write PSID 5084 Default 63 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiBBVersion BasicType integer BERType integer OID 1.2.3.1.5085 Access read_only PSID 5085 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiRFVersion BasicType integer BERType integer OID 1.2.3.1.5086 Access read_only PSID 5086 GetFunction mibuint16get BFType uint16 BFAccess RO
+Element unifiClearRadioTrimCache BasicType integer BERType integer OID 1.2.3.1.5088 Access read_write PSID 5088 SetFunction mibricechangefsmparams BFType uint16 BFAccess RW
+Element unifiRxRadioCsMode BasicType integer BERType integer OID 1.2.3.1.5092 Access read_write PSID 5092 Default 0 BFType uint16 BFAccess RW
+Element unifiRxPriEnergyDetThreshold BasicType integer BERType integer OID 1.2.3.1.5093 Access read_write PSID 5093 Default 0 BFType uint16 BFAccess RW
+Element unifiRxSecEnergyDetThreshold BasicType integer BERType integer OID 1.2.3.1.5094 Access read_write PSID 5094 Default 0 BFType uint16 BFAccess RW
+Element unifiIQBufferSize BasicType integer BERType integer_unsigned32 OID 1.2.3.1.5098 Access read_only PSID 5098 GetFunction mibriceuint32get BFType uint32 BFAccess RO
+Element unifiCCAMasterSwitch BasicType integer BERType integer_unsigned32 OID 1.2.3.1.5102 Access read_write PSID 5102 Default 0x00540050 GetFunction mibhalmacmacconfiggenericget SetFunction mibhalmacmacconfiggenericset BFType uint32 BFAccess RW
+Element unifiRxSyncCCACfg BasicType integer BERType integer OID 1.2.3.1.5103 Access read_write PSID 5103 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset BFType uint16 BFAccess RW
+Element unifiMacSecChanClearTime BasicType integer BERType integer OID 1.2.3.1.5105 Access read_write PSID 5105 GetFunction mibhalmacmacconfiggenericget SetFunction mibhalmacmacconfiggenericset BFType uint16 BFAccess RW
+Element unifiNannyTemperatureReportDelta BasicType integer BERType integer OID 1.2.3.1.5109 Access read_write PSID 5109 Default 4 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiNannyTemperatureReportInterval BasicType integer BERType integer OID 1.2.3.1.5110 Access read_write PSID 5110 Default 200 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRadioRxDcocDebugIqValue BasicType integer BERType integer OID 1.2.3.1.5111 Access read_write PSID 5111 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiRadioRxDcocDebug BasicType integer BERType integer OID 1.2.3.1.5112 Access read_write PSID 5112 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiNannyRetrimDpdMod BasicType integer BERType integer OID 1.2.3.1.5113 Access read_write PSID 5113 Default 2 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiDisableDpdSubIteration BasicType integer BERType string OID 1.2.3.1.5114 Access read_write PSID 5114 Default 0 SetFunction mibricechangenonfsmparams BFType bool BFAccess RW
+Element unifiFleximacCcaEdEnable BasicType integer BERType integer OID 1.2.3.1.5116 Access read_write PSID 5116 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset BFType uint16 BFAccess RW
+Element unifiDisableLNABypass BasicType integer BERType integer OID 1.2.3.1.5118 Access read_write PSID 5118 Default 0 SetFunction mibricechangenonfsmparams BFType uint16 BFAccess RW
+Element unifiEnableFlexiMacWatchdog BasicType integer BERType integer OID 1.2.3.1.5200 Access read_write PSID 5200 Default 0x0000 BFType uint16 BFAccess RW
+Element unifiRttCapabilities BasicType string BERType string OID 1.2.3.1.5300 Access read_write Min 8 Max 8 PSID 5300 Default 0x01:0x01:0x01:0x01:0x00:0x07:0x1c:0x32 BFType var BFAccess RW
+Element unifiFtmMinDeltaFrames BasicType integer BERType integer OID 1.2.3.1.5301 Access read_write Min 0 Max 255 PSID 5301 Default 5 BFType uint16 BFAccess RW
+Element unifiFtmPerBurst BasicType integer BERType integer OID 1.2.3.1.5302 Access read_write Min 1 Max 31 PSID 5302 Default 4 BFType uint16 BFAccess RW
+Element unifiFtmBurstDuration BasicType integer BERType integer OID 1.2.3.1.5303 Access read_write Min 2 Max 11 PSID 5303 Default 6 BFType uint16 BFAccess RW
+Element unifiFtmNumOfBurstsExponent BasicType integer BERType integer OID 1.2.3.1.5304 Access read_write Min 0 Max 14 PSID 5304 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmASAPModeActivated BasicType integer BERType string OID 1.2.3.1.5305 Access read_write PSID 5305 Default 1 BFType bool BFAccess RW
+Element unifiFtmResponderActivated BasicType integer BERType string OID 1.2.3.1.5306 Access read_write PSID 5306 Default 0 BFType bool BFAccess RW
+Element unifiFtmDefaultSessionEstablishmentTimeout BasicType integer BERType integer OID 1.2.3.1.5307 Access read_write Min 10 Max 100 PSID 5307 Default 50 BFType uint16 BFAccess RW
+Element unifiFtmDefaultGapBeforeFirstBurstPerResponder BasicType integer BERType integer OID 1.2.3.1.5308 Access read_write PSID 5308 BFType uint16 BFAccess RW
+Element unifiFtmDefaultGapBetweenBursts BasicType integer BERType integer OID 1.2.3.1.5309 Access read_write Min 5 Max 50 PSID 5309 Default 10 BFType uint16 BFAccess RW
+Element unifiFtmDefaultTriggerDelay BasicType integer BERType integer OID 1.2.3.1.5310 Access read_write Min 0 Max 100 PSID 5310 Default 1 BFType uint16 BFAccess RW
+Element unifiFtmDefaultEndBurstDelay BasicType integer BERType integer OID 1.2.3.1.5311 Access read_write Min 0 Max 100 PSID 5311 Default 10 BFType uint16 BFAccess RW
+Element unifiFtmRequestValidationEnabled BasicType integer BERType string OID 1.2.3.1.5312 Access read_write PSID 5312 Default 0 BFType bool BFAccess RW
+Element unifiFtmResponseValidationEnabled BasicType integer BERType string OID 1.2.3.1.5313 Access read_write PSID 5313 Default 0 BFType bool BFAccess RW
+Element unifiFtmUseResponseParameters BasicType integer BERType string OID 1.2.3.1.5314 Access read_write PSID 5314 Default 0 BFType bool BFAccess RW
+Element unifiFtmInitialResponseTimeout BasicType integer BERType integer OID 1.2.3.1.5315 Access read_write Min 10 Max 100 PSID 5315 Default 50 BFType uint16 BFAccess RW
+Element unifiFtmDSPInpBW BasicType integer BERType integer OID 1.2.3.1.5320 Access read_write Min 0 Max 255 PSID 5320 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmOFDMCutOffset BasicType integer BERType integer OID 1.2.3.1.5321 Access read_write Min 0 Max 255 PSID 5321 Default 0 BFType uint16 BFAccess RW
+Element unifiFtmMeanAroundCluster BasicType integer BERType string OID 1.2.3.1.5322 Access read_write PSID 5322 Default 0 BFType bool BFAccess RW
+Element unifiMLMEScanContinueIfMoreThanXAps BasicType integer BERType integer OID 1.2.3.1.5410 Access read_write PSID 5410 Default 10 BFType uint16 BFAccess RW
+Element unifiMLMEScanStopIfLessThanXNewAps BasicType integer BERType integer OID 1.2.3.1.5411 Access read_write PSID 5411 Default 4 BFType uint16 BFAccess RW
+Element unifiScanMultiVifActivated BasicType integer BERType string OID 1.2.3.1.5412 Access read_write PSID 5412 Default 1 BFType bool BFAccess RW
+Element unifiScanNewAlgorithmActivated BasicType integer BERType string OID 1.2.3.1.5413 Access read_write PSID 5413 Default 1 BFType bool BFAccess RW
+Element unifiUnsyncVifLnaEnabled BasicType integer BERType string OID 1.2.3.1.6010 Access read_write PSID 6010 Default 0 BFType bool BFAccess RW
+Element unifiTPCMinPower2GMIMO BasicType integer BERType integer OID 1.2.3.1.6011 Access read_write PSID 6011 Default 52 BFType int16 BFAccess RW
+Element unifiTPCMinPower5GMIMO BasicType integer BERType integer OID 1.2.3.1.6012 Access read_write PSID 6012 Default 52 BFType int16 BFAccess RW
+Element unifiLnaControlEnabled BasicType integer BERType string OID 1.2.3.1.6013 Access read_write PSID 6013 Default 1 BFType bool BFAccess RW
+Element unifiLnaControlRssiThresholdLower BasicType integer BERType integer OID 1.2.3.1.6014 Access read_write Min -128 Max 127 PSID 6014 Default -40 BFType int16 BFAccess RW
+Element unifiLnaControlRssiThresholdUpper BasicType integer BERType integer OID 1.2.3.1.6015 Access read_write Min -128 Max 127 PSID 6015 Default -30 BFType int16 BFAccess RW
+Element unifiPowerIsGrip BasicType integer BERType string OID 1.2.3.1.6016 Access read_write PSID 6016 Default 0 BFType bool BFAccess RW
+Element unifiLowPowerRxConfig BasicType integer BERType integer OID 1.2.3.1.6018 Access read_write PSID 6018 Default 3 SetFunction mibuint16set BFType uint16 BFAccess RW
+Element unifiTPCEnabled BasicType integer BERType string OID 1.2.3.1.6019 Access read_write PSID 6019 BFType bool BFAccess RW
+Element unifiCurrentTxpowerLevel BasicType integer BERType integer OID 1.2.3.1.6020 Access read_only PSID 6020 Default 0 GetPerVifFunction mibint16get BFType int16 BFAccess RO
+Element unifiUserSetTxpowerLevel BasicType integer BERType integer OID 1.2.3.1.6021 Access read_write PSID 6021 Default 127 SetFunction mlmeusersettxpowerlevel BFType int16 BFAccess RW
+Element unifiTPCMaxPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6022 Access read_write PSID 6022 Default -55 BFType int16 BFAccess RW
+Element unifiTPCMinPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6023 Access read_write PSID 6023 Default -45 BFType int16 BFAccess RW
+Element unifiTPCMinPower2G BasicType integer BERType integer OID 1.2.3.1.6024 Access read_write PSID 6024 Default 52 BFType int16 BFAccess RW
+Element unifiTPCMinPower5G BasicType integer BERType integer OID 1.2.3.1.6025 Access read_write PSID 6025 Default 40 BFType int16 BFAccess RW
+Element unifiTPCUseAfterConnectRsp BasicType integer BERType string OID 1.2.3.1.6027 Access read_write PSID 6027 Default 1 BFType bool BFAccess RW
+Element unifiRadioLpRxRssiThresholdLower BasicType integer BERType integer OID 1.2.3.1.6028 Access read_write Min -128 Max 127 PSID 6028 Default -75 BFType int16 BFAccess RW
+Element unifiRadioLpRxRssiThresholdUpper BasicType integer BERType integer OID 1.2.3.1.6029 Access read_write Min -128 Max 127 PSID 6029 Default -65 BFType int16 BFAccess RW
+Element unifiTestTxPowerEnable BasicType integer BERType integer OID 1.2.3.1.6032 Access read_write PSID 6032 Default 0x03DD BFType uint16 BFAccess RW
+Element unifiLteCoexMaxPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6033 Access read_write PSID 6033 Default -55 BFType int16 BFAccess RW
+Element unifiLteCoexMinPowerRSSIThreshold BasicType integer BERType integer OID 1.2.3.1.6034 Access read_write PSID 6034 Default -45 BFType int16 BFAccess RW
+Element unifiLteCoexPowerReduction BasicType integer BERType integer OID 1.2.3.1.6035 Access read_write Min 0 Max 127 PSID 6035 Default 24 BFType uint16 BFAccess RW
+Element unifiPMFAssociationComebackTimeDelta BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6050 Access read_write PSID 6050 Default 1100 BFType uint32 BFAccess RW
+Element unifiTestTspecHack BasicType integer BERType string OID 1.2.3.1.6060 Access read_write PSID 6060 Default 0 BFType bool BFAccess RW
+Element unifiTestTspecHackValue BasicType integer BERType integer OID 1.2.3.1.6061 Access read_write PSID 6061 Default 0 BFType uint16 BFAccess RW
+Element unifiDebugInstantDelivery BasicType integer BERType string OID 1.2.3.1.6069 Access read_write PSID 6069 Default 0 SetFunction mibdebuginstantdeliveryset BFType bool BFAccess RW
+Element unifiDebugEnable BasicType integer BERType string OID 1.2.3.1.6071 Access read_write PSID 6071 Default 1 SetFunction mibdebugenableset BFType bool BFAccess RW
+Element unifiDPlaneDebug BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6073 Access read_write PSID 6073 Default 0x203 GetPerVifFunction mibdplanedebugmaskget SetPerVifFunction mibdplanedebugmaskset BFType uint32 BFAccess RW
+Element unifiNANActivated BasicType integer BERType string OID 1.2.3.1.6080 Access read_write PSID 6080 Default 1 BFType bool BFAccess RW
+Element unifiNANBeaconCapabilities BasicType integer BERType integer OID 1.2.3.1.6081 Access read_write PSID 6081 Default 0x0620 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentClusters BasicType integer BERType integer OID 1.2.3.1.6082 Access read_write PSID 6082 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentPublishes BasicType integer BERType integer OID 1.2.3.1.6083 Access read_write PSID 6083 Default 2 BFType uint16 BFAccess RW
+Element unifiNANMaxConcurrentSubscribes BasicType integer BERType integer OID 1.2.3.1.6084 Access read_write PSID 6084 Default 2 BFType uint16 BFAccess RW
+Element unifiNANMaxServiceNameLength BasicType integer BERType integer OID 1.2.3.1.6085 Access read_write PSID 6085 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxMatchFilterLength BasicType integer BERType integer OID 1.2.3.1.6086 Access read_write PSID 6086 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxTotalMatchFilterLength BasicType integer BERType integer OID 1.2.3.1.6087 Access read_write PSID 6087 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxServiceSpecificInfoLength BasicType integer BERType integer OID 1.2.3.1.6088 Access read_write PSID 6088 Default 255 BFType uint16 BFAccess RW
+Element unifiNANMaxVSADataLength BasicType integer BERType integer OID 1.2.3.1.6089 Access read_write PSID 6089 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMaxMeshDataLength BasicType integer BERType integer OID 1.2.3.1.6090 Access read_write PSID 6090 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMaxNDIInterfaces BasicType integer BERType integer OID 1.2.3.1.6091 Access read_write PSID 6091 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxNDPSessions BasicType integer BERType integer OID 1.2.3.1.6092 Access read_write PSID 6092 Default 1 BFType uint16 BFAccess RW
+Element unifiNANMaxAppInfoLength BasicType integer BERType integer OID 1.2.3.1.6093 Access read_write PSID 6093 Default 0 BFType uint16 BFAccess RW
+Element unifiNANMatchExpirationTime BasicType integer BERType integer OID 1.2.3.1.6094 Access read_write PSID 6094 Default 60 BFType uint16 BFAccess RW
+Element unifiNANMaxChannelSwitchTime BasicType integer BERType integer OID 1.2.3.1.6097 Access read_write PSID 6097 Default 5000 BFType uint16 BFAccess RW
+Element unifiNANMacRandomisationActivated BasicType integer BERType string OID 1.2.3.1.6098 Access read_write PSID 6098 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteDataElementInt32 BasicType integer BERType integer_counter32 OID 1.2.3.1.6100 Access read_write Min 0 Max 4294967295 PSID 6100 Default 1000 BFType int64 BFAccess RW
+Element hutsReadWriteDataElementBoolean BasicType integer BERType string OID 1.2.3.1.6101 Access read_write PSID 6101 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteDataElementOctetString BasicType string BERType string OID 1.2.3.1.6102 Access read_write Min 9 Max 9 PSID 6102 Default 0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element hutsReadWriteRemoteProcedureCallInt32 BasicType integer BERType integer_unsigned32 OID 1.2.3.1.6105 Access read_write PSID 6105 Default 0x000A0001 GetPerVifFunction mibuint32get SetPerVifFunction mibuint32set BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIInt16 BasicType integer BERType integer OID 1.2.3.1.6108 Access read_write PSID 6108 Default -55 BFType int16 BFAccess RW
+Element hutsReadWriteInternalAPIUint16 BasicType integer BERType integer OID 1.2.3.1.6109 Access read_write PSID 6109 Default 0x0730 BFType uint16 BFAccess RW
+Element hutsReadWriteInternalAPIUint32 BasicType integer BERType integer OID 1.2.3.1.6110 Access read_write Max 2147483647 PSID 6110 Default 30000 BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIInt64 BasicType integer BERType integer OID 1.2.3.1.6111 Access read_only PSID 6111 GetPerVifFunction mibtsftime BFType int64 BFAccess RO
+Element hutsReadWriteInternalAPIBoolean BasicType integer BERType string OID 1.2.3.1.6112 Access read_write PSID 6112 Default 1 BFType bool BFAccess RW
+Element hutsReadWriteInternalAPIOctetString BasicType string BERType string OID 1.2.3.1.6113 Access read_write Min 8 Max 8 PSID 6113 Default 0x00:0x18:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiTestScanNoMedium BasicType integer BERType string OID 1.2.3.1.6122 Access read_write PSID 6122 Default 0 BFType bool BFAccess RW
+Element unifiDualBandConcurrency BasicType integer BERType string OID 1.2.3.1.6123 Access read_write PSID 6123 Default 0 BFType bool BFAccess RW
+Element unifiLoggerMaxDelayedEvents BasicType integer BERType integer OID 1.2.3.1.6124 Access read_only PSID 6124 Default 10 BFType uint16 BFAccess RO
+Element unifiSupportedChannels BasicType string BERType string OID 1.2.3.1.8012 Access read_write Min 0 Max 20 PSID 8012 Default 0x01:0x0d:0x24:0x04:0x34:0x04:0x64:0x0c:0x95:0x05 BFType var BFAccess RW
+Element unifiCountryList BasicType string BERType string OID 1.2.3.1.8014 Access read_only Min 2 Max 270 PSID 8014 Default 0x30:0x30:0x58:0x58:0x41:0x44:0x41:0x45:0x41:0x46:0x41:0x47:0x41:0x49:0x41:0x4c:0x41:0x4d:0x41:0x4e:0x41:0x4f:0x41:0x51:0x41:0x52:0x41:0x53:0x41:0x54:0x41:0x55:0x41:0x57:0x41:0x58:0x41:0x5a:0x42:0x41:0x42:0x42:0x42:0x44:0x42:0x45:0x42:0x46:0x42:0x47:0x42:0x48:0x42:0x49:0x42:0x4a:0x42:0x4c:0x42:0x4d:0x42:0x4e:0x42:0x4f:0x42:0x52:0x42:0x53:0x42:0x54:0x42:0x56:0x42:0x57:0x42:0x59:0x42:0x5a:0x43:0x41:0x43:0x43:0x43:0x44:0x43:0x46:0x43:0x47:0x43:0x48:0x43:0x49:0x43:0x4b:0x43:0x4c:0x43:0x4d:0x43:0x4e:0x43:0x4f:0x43:0x52:0x43:0x55:0x43:0x56:0x43:0x58:0x43:0x59:0x43:0x5a:0x44:0x45:0x44:0x4a:0x44:0x4b:0x44:0x4d:0x44:0x4f:0x44:0x5a:0x45:0x43:0x45:0x45:0x45:0x47:0x45:0x48:0x45:0x52:0x45:0x53:0x45:0x54:0x46:0x49:0x46:0x4a:0x46:0x4b:0x46:0x4c:0x46:0x4d:0x46:0x4f:0x46:0x52:0x47:0x41:0x47:0x42:0x47:0x44:0x47:0x45:0x47:0x46:0x47:0x47:0x47:0x48:0x47:0x49:0x47:0x4c:0x47:0x4d:0x47:0x4e:0x47:0x50:0x47:0x51:0x47:0x52:0x47:0x53:0x47:0x54:0x47:0x55:0x47:0x57:0x47:0x59:0x48:0x4b:0x48:0x4d:0x48:0x4e:0x48:0x52:0x48:0x54:0x48:0x55:0x49:0x44:0x49:0x45:0x49:0x4c:0x49:0x4d:0x49:0x4e:0x49:0x4f:0x49:0x51:0x49:0x52:0x49:0x53:0x49:0x54:0x4a:0x45:0x4a:0x4d:0x4a:0x4f:0x4a:0x50:0x4b:0x45:0x4b:0x47:0x4b:0x48:0x4b:0x49:0x4b:0x4d:0x4b:0x4e:0x4b:0x50:0x4b:0x52:0x4b:0x57:0x4b:0x59:0x4b:0x5a:0x4c:0x41:0x4c:0x42:0x4c:0x43:0x4c:0x49:0x4c:0x4b:0x4c:0x52:0x4c:0x53:0x4c:0x54:0x4c:0x55:0x4c:0x56:0x4c:0x59:0x4d:0x41:0x4d:0x43:0x4d:0x44:0x4d:0x45:0x4d:0x46:0x4d:0x47:0x4d:0x48:0x4d:0x4b:0x4d:0x4c:0x4d:0x4d:0x4d:0x4e:0x4d:0x4f:0x4d:0x50:0x4d:0x51:0x4d:0x52:0x4d:0x53:0x4d:0x54:0x4d:0x55:0x4d:0x56:0x4d:0x57:0x4d:0x58:0x4d:0x59:0x4d:0x5a:0x4e:0x41:0x4e:0x43:0x4e:0x45:0x4e:0x46:0x4e:0x47:0x4e:0x49:0x4e:0x4c:0x4e:0x4f:0x4e:0x50:0x4e:0x52:0x4e:0x55:0x4e:0x5a:0x4f:0x4d:0x50:0x41:0x50:0x45:0x50:0x46:0x50:0x47:0x50:0x48:0x50:0x4b:0x50:0x4c:0x50:0x4d:0x50:0x4e:0x50:0x52:0x50:0x53:0x50:0x54:0x50:0x57:0x50:0x59:0x51:0x41:0x52:0x45:0x52:0x4f:0x52:0x53:0x52:0x55:0x52:0x57:0x53:0x41:0x53:0x42:0x53:0x43:0x53:0x44:0x53:0x45:0x53:0x47:0x53:0x48:0x53:0x49:0x53:0x4a:0x53:0x4b:0x53:0x4c:0x53:0x4d:0x53:0x4e:0x53:0x4f:0x53:0x52:0x53:0x53:0x53:0x54:0x53:0x56:0x53:0x58:0x53:0x59:0x53:0x5a:0x54:0x43:0x54:0x44:0x54:0x46:0x54:0x47:0x54:0x48:0x54:0x4a:0x54:0x4b:0x54:0x4c:0x54:0x4d:0x54:0x4e:0x54:0x4f:0x54:0x52:0x54:0x54:0x54:0x56:0x54:0x57:0x54:0x5a:0x55:0x41:0x55:0x47:0x55:0x4d:0x55:0x53:0x55:0x59:0x55:0x5a:0x56:0x41:0x56:0x43:0x56:0x45:0x56:0x47:0x56:0x49:0x56:0x4e:0x56:0x55:0x57:0x46:0x57:0x53:0x58:0x4b:0x59:0x45:0x59:0x54:0x5a:0x41:0x5a:0x4d:0x5a:0x57 BFType var BFAccess RO
+Element unifiVifCountry BasicType string BERType string OID 1.2.3.1.8016 Access read_write PSID 8016 GetPerVifFunction mibosget BFType var BFAccess RW
+Element unifiNoCellIncludedChannels BasicType string BERType string OID 1.2.3.1.8018 Access read_write Min 8 Max 8 PSID 8018 Default 0x00:0x18:0x00:0x00:0x00:0x00:0x00:0x00 BFType var BFAccess RW
+Element unifiRegDomVersion BasicType integer BERType integer OID 1.2.3.1.8019 Access read_only PSID 8019 Default 0x0107 BFType uint16 BFAccess RO
+Element unifiDefaultCountryWithoutCH12CH13 BasicType integer BERType string OID 1.2.3.1.8020 Access read_write PSID 8020 Default 0 BFType bool BFAccess RW
+Element hutsReadWriteInternalAPIFixSizeTableKeyRow BasicType integer BERType integer_counter32 OID 1.2.3.3.1.2.3.1.6120 Access read_only Min 0 Max 4294967295 PSID 6120 GetFunction mibtsftime ElementTable hutsReadWriteInternalAPIFixSizeTableKeyRowTable ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeyIndex1:hutsReadWriteInternalAPIFixSizeTableKeyIndex2 BFType int64 BFAccess RO
+Element hutsReadWriteInternalAPIFixSizeTableKey1Row BasicType integer BERType integer OID 1.2.3.4.1.2.3.1.6116 Access read_only PSID 6116 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteInternalAPIFixSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeysindex BFType uint16 BFAccess RO
+Element hutsReadWriteInternalAPIFixSizeTableKey2Row BasicType integer BERType integer OID 1.2.3.4.1.2.3.1.6117 Access read_only PSID 6117 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteInternalAPIFixSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixSizeTableKeysindex BFType uint16 BFAccess RO
+Element hutsReadWriteInternalAPIFixVarSizeTableKey1Row BasicType integer BERType integer_unsigned32 OID 1.2.3.5.1.2.3.1.6118 Access read_write PSID 6118 ElementTable hutsReadWriteInternalAPIFixVarSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixVarSizeTableKeysIndex BFType uint32 BFAccess RW
+Element hutsReadWriteInternalAPIFixVarSizeTableKey2Row BasicType string BERType string OID 1.2.3.5.1.2.3.1.6119 Access read_write PSID 6119 ElementTable hutsReadWriteInternalAPIFixVarSizeTableKeys ElementTableIndices hutsReadWriteInternalAPIFixVarSizeTableKeysIndex BFType var BFAccess RW
+Element hutsReadWriteInternalAPIFixedSizeTableRow BasicType integer BERType integer OID 1.2.3.6.1.2.3.1.6114 Access read_write Min 0 Max 100 PSID 6114 DefaultIX1 1::80: DefaultIX1 2::80: DefaultIX1 3::80: DefaultIX1 4::80: ElementTable hutsReadWriteInternalAPIFixedSizeTable ElementTableIndices hutsReadWriteInternalAPIFixedSizeTableIndex BFType int16 BFAccess RW
+Element hutsReadWriteInternalAPIVarSizeTableRow BasicType string BERType string OID 1.2.3.7.1.2.3.1.6115 Access read_only Min 6 Max 73 PSID 6115 DefaultIX1 1:0x53:0x54:0x70:0x73:0x74:0x75:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80:0x81:0x82 DefaultIX1 2:0x01:0x02:0x03:0x05:0x06:0x07:0x08:0x09:0x0A:0x10:0x11:0x80:0x81:0x82 DefaultIX1 3:0x01:0x03:0x05:0x16:0x17:0x19:0x1A:0x1B:0x1C:0x1E:0x1F:0x20:0x21:0x80:0x81:0x82 DefaultIX1 4:0x01:0x02:0x03:0x04:0x05:0x06:0x20:0x21:0x24:0x25:0x26:0x29:0x2A:0x2B:0x3A:0x80:0x81:0x82 ElementTable hutsReadWriteInternalAPIVarSizeTable ElementTableIndices hutsReadWriteInternalAPIVarSizeTableindex BFType var BFAccess RO
+Element hutsReadWriteInternalAPIVarSizeTableKeyRow BasicType string BERType string OID 1.2.3.8.1.2.3.1.6121 Access read_write Min 144 Max 144 PSID 6121 GetFunction miboctetstringget SetFunction miboctetstringset ElementTable hutsReadWriteInternalAPIVarSizeTableKeyTable ElementTableIndices hutsReadWriteInternalAPIVarSizeTableKeyIndex1:hutsReadWriteInternalAPIVarSizeTableKeyIndex2 BFType var BFAccess RW
+Element hutsReadWriteRemoteProcedureCallOctetString BasicType string BERType string OID 1.2.3.9.1.2.3.1.6107 Access read_write Min 144 Max 144 PSID 6107 GetFunction miboctetstringget SetFunction miboctetstringset ElementTable hutsReadWriteRPCTableOctetStringTable ElementTableIndices hutsReadWriteRPCTableOctetStringTableIndex0:hutsReadWriteRPCTableOctetStringTableIndex1 BFType var BFAccess RW
+Element hutsReadWriteTableInt16Row BasicType integer BERType integer OID 1.2.3.10.1.2.3.1.6103 Access read_only Min -32768 Max 32767 PSID 6103 GetPerVifFunction mibhutsint16get ElementTable hutsReadWriteTableInt16IdTable ElementTableIndices hutsReadWriteTableInt16 BFType int16 BFAccess RO
+Element hutsReadWriteTableOctetStringRow BasicType string BERType string OID 1.2.3.11.1.2.3.1.6104 Access read_only Min 6 Max 73 PSID 6104 DefaultIX1 1:0x53:0x54:0x70:0x73:0x74:0x75:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80:0x81:0x82 DefaultIX1 2:0x01:0x02:0x03:0x05:0x06:0x07:0x08:0x09:0x0A:0x10:0x11:0x80:0x81:0x82 DefaultIX1 3:0x01:0x03:0x05:0x16:0x17:0x19:0x1A:0x1B:0x1C:0x1E:0x1F:0x20:0x21:0x80:0x81:0x82 DefaultIX1 4:0x01:0x02:0x03:0x04:0x05:0x06:0x20:0x21:0x24:0x25:0x26:0x29:0x2A:0x2B:0x3A:0x80:0x81:0x82 ElementTable hutsReadWriteTableOctetStringTable ElementTableIndices hutsReadWriteTableOctetString BFType var BFAccess RO
+Element unifiACRetries BasicType integer BERType integer_unsigned32 OID 1.2.3.12.1.2.3.1.2229 Access read_only PSID 2229 GetPerVifFunction mibllsstatsget ElementTable unifiAcTxConfirmTable ElementTableIndices unifiAccessClassIndex BFType uint32 BFAccess RO
+Element unifiTxDataConfirm BasicType integer BERType string OID 1.2.3.12.1.2.3.1.2253 Access read_write PSID 2253 Default 0 SetFunction mibtxdatacfmset ElementTable unifiAcTxConfirmTable ElementTableIndices unifiAccessClassIndex BFType bool BFAccess RW
+Element unifiAgcThresholds BasicType string BERType string OID 1.2.3.13.1.2.3.1.5095 Access read_write Min 0 Max 255 PSID 5095 SetFunction mibricechangefsmparams ElementTable unifiAgcThresholdsTable ElementTableIndices unifiAgcThresholdsTableIndex BFType var BFAccess RW
+Element unifiCCACSThresh BasicType integer BERType integer OID 1.2.3.14.1.2.3.1.5101 Access read_write PSID 5101 GetFunction mibhalmacmodemgenericget SetFunction mibhalmacmodemgenericset ElementTable unifiCCACSThreshTable ElementTableIndices unifiSisoMimoTableIndex BFType uint16 BFAccess RW
+Element unifiDPDTrainPacketConfig BasicType string BERType string OID 1.2.3.15.1.2.3.1.2373 Access read_write Min 8 Max 8 PSID 2373 DefaultIX1 1:0x00:0x00:0x80:0x01:0x80:0x05:0x00:0x00 DefaultIX1 2:0x01:0x00:0x82:0x01:0x80:0x05:0x00:0x00 DefaultIX1 3:0x01:0x00:0x82:0x01:0x82:0x05:0x00:0x00 SetFunction mibricechangefsmparams ElementTable unifiDPDTrainPacketConfigTable ElementTableIndices unifiDPDTrainPacketConfigIndex BFType var BFAccess RW
+Element unifiDebugModuleControl BasicType integer BERType integer OID 1.2.3.16.1.2.3.1.5029 Access read_write PSID 5029 DefaultIX1 1:::0xE003: DefaultIX1 2:::0xE000: DefaultIX1 3:::0x00FF: DefaultIX1 4:::0xE004: DefaultIX1 5:::0x00FF: DefaultIX1 6:::0xE000: DefaultIX1 7:::0xE004: DefaultIX1 8:::0xE004: DefaultIX1 9:::0x00FF: DefaultIX1 10::0x00FF: DefaultIX1 11::0x0001: DefaultIX1 12::0x00FF: DefaultIX1 13::0x00FF: DefaultIX1 14::0xE000: DefaultIX1 15::0x00FF: DefaultIX1 16::0x00FF: DefaultIX1 17::0x0001: DefaultIX1 18::0xE004: DefaultIX1 19::0xE004: DefaultIX1 20::0xE000: DefaultIX1 21::0xE004: DefaultIX1 22::0xE004: DefaultIX1 23::0x0000: DefaultIX1 24::0xE004: DefaultIX1 25::0x0001: DefaultIX1 26::0x00FF: DefaultIX1 27::0x00FF: DefaultIX1 28::0xE004: DefaultIX1 29::0x0001: DefaultIX1 30::0x0001: DefaultIX1 31::0xE000: DefaultIX1 32::0x00FF: DefaultIX1 33::0x00FF: DefaultIX1 34::0x00FF: DefaultIX1 35::0xE001: DefaultIX1 36::0x0000: DefaultIX1 37::0xE004: DefaultIX1 38::0x00FF: DefaultIX1 39::0x0004: DefaultIX1 40::0x00FF: DefaultIX1 41::0x0000: DefaultIX1 42::0x00FF: DefaultIX1 43::0xE004: DefaultIX1 44::0xE004: DefaultIX1 45::0xE000: DefaultIX1 46::0x00FF: DefaultIX1 47::0x00FF: DefaultIX1 48::0x0000: DefaultIX1 49::0x0000: DefaultIX1 50::0x0001: DefaultIX1 51::0xE001: DefaultIX1 52::0x000F: DefaultIX1 53::0xE004: DefaultIX1 54::0xE004: DefaultIX1 55::0x0004: DefaultIX1 56::0x0004: DefaultIX1 57::0x00FF: DefaultIX1 58::0x0000: DefaultIX1 59::0x0000: DefaultIX1 60::0x0000: DefaultIX1 61::0x0000: DefaultIX1 62::0xE001: DefaultIX1 63::0x00FF: DefaultIX1 64::0x0001: DefaultIX1 65::0x00FF: DefaultIX1 66::0xE004: DefaultIX1 67::0xE00F: DefaultIX1 68::0x000F: DefaultIX1 69::0xE004: DefaultIX1 70::0xE004: DefaultIX1 71::0x00FF: DefaultIX1 72::0xE004: DefaultIX1 73::0x0004: DefaultIX1 74::0xE004: DefaultIX1 75::0xE004: DefaultIX1 76::0x0000: ElementTable unifiDebugConfigTable ElementTableIndices unifiDebugModulesIndex BFType uint16 BFAccess RW
+Element unifiDefaultCountry BasicType string BERType string OID 1.2.3.17.1.2.3.1.8013 Access read_write Min 3 Max 3 PSID 8013 DefaultIX1 1:0x30:0x30:0x20 DefaultIX1 2:0x00:0x01:0x02 SetFunction mibdefaultcountryupdate ElementTable unifiDefaultCountryTable ElementTableIndices unifiDefaultCountryIndex BFType var BFAccess RW
+Element unifiDpdDebug BasicType integer BERType integer_unsigned32 OID 1.2.3.18.1.2.3.1.5106 Access read_write PSID 5106 DefaultIX1 1::170: DefaultIX1 2::3::: SetFunction mibricechangenonfsmparams ElementTable unifiDpdDebugTable ElementTableIndices unifiDpdDebugTableIndex BFType uint32 BFAccess RW
+Element unifiDpdPredistortGains BasicType string BERType string OID 1.2.3.19.1.2.3.1.2257 Access read_write Min 14 Max 14 PSID 2257 SetFunction mibricechangefsmparams ElementTable unifiDpdPredistortGainsTable ElementTableIndices unifiDpdPredistortGainsTableIndex BFType var BFAccess RW
+Element unifiFaultSubSystemControl BasicType integer BERType integer OID 1.2.3.20.1.2.3.1.5028 Access read_write PSID 5028 DefaultIX1 1:::0x0001: DefaultIX1 2:::0x0001: DefaultIX1 3:::0x0001: DefaultIX1 4:::0x0001: DefaultIX1 5:::0x0001: DefaultIX1 6:::0x0001: ElementTable unifiFaultConfigTable ElementTableIndices unifiSubSystemsIndex BFType uint16 BFAccess RW
+Element unifiFrameRXCounters BasicType integer BERType integer_unsigned32 OID 1.2.3.21.1.2.3.1.2326 Access read_write PSID 2326 GetPerVifFunction mib_frameRXcounters_get ElementTable unifiFrameRXCountersTable ElementTableIndices unifiFrameRXCountersTableIndex BFType uint32 BFAccess RW
+Element unifiFrameTXCounters BasicType integer BERType integer_unsigned32 OID 1.2.3.22.1.2.3.1.2327 Access read_write PSID 2327 GetPerVifFunction mib_frameTXcounters_get ElementTable unifiFrameTXCountersTable ElementTableIndices unifiFrameTXCountersTableIndex BFType uint32 BFAccess RW
+Element unifiLoadDpdLut BasicType string BERType string OID 1.2.3.23.1.2.3.1.2255 Access read_write Min 147 Max 147 PSID 2255 GetFunction mibbmsgget SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTable ElementTableIndices unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiOverrideDpdLut BasicType string BERType string OID 1.2.3.23.1.2.3.1.2258 Access read_write Min 147 Max 147 PSID 2258 SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTable ElementTableIndices unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiLoadDpdLutPerRadio BasicType string BERType string OID 1.2.3.24.1.2.3.1.2280 Access read_write Min 147 Max 147 PSID 2280 GetFunction mibbmsgget SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTablePerRadio ElementTableIndices unifiLoadDpdLutRadioIndex:unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiOverrideDpdLutPerRadio BasicType string BERType string OID 1.2.3.24.1.2.3.1.2281 Access read_write Min 147 Max 147 PSID 2281 SetFunction mibricedpdlutset ElementTable unifiLoadDpdLutTablePerRadio ElementTableIndices unifiLoadDpdLutRadioIndex:unifiLoadDpdLutGroupIndex:unifiLoadDpdLutTemperatureIndex BFType var BFAccess RW
+Element unifiMacCCABusyTime BasicType integer BERType integer OID 1.2.3.25.1.2.3.1.5104 Access read_write PSID 5104 GetFunction mibhalmacmacconfiggenericget ElementTable unifiMacBusyTimeTable ElementTableIndices unifiMacInstanceIndex:unifiMacBusyTimeTableIndex BFType uint16 BFAccess RW
+Element unifiModemSgiOffset BasicType integer BERType integer OID 1.2.3.26.1.2.3.1.5090 Access read_write PSID 5090 SetFunction mibhalmacmodemgenericset ElementTable unifiModemSgiOffsetTable ElementTableIndices unifiBandTableIndex:unifiBWTableIndex BFType uint16 BFAccess RW
+Element unifiNANDefaultScanDwellTime BasicType integer BERType integer OID 1.2.3.27.1.2.3.1.6095 Access read_write PSID 6095 DefaultIX1 1:200 DefaultIX1 2:200 ElementTable unifiNANDefaultScanDwellTimeTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiNANDefaultScanPeriod BasicType integer BERType integer OID 1.2.3.28.1.2.3.1.6096 Access read_write PSID 6096 DefaultIX1 1:20 DefaultIX1 2:20 ElementTable unifiNANDefaultScanPeriodTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiNarrowbandCCADebug BasicType integer BERType integer_unsigned32 OID 1.2.3.29.1.2.3.1.5107 Access read_only PSID 5107 GetFunction mibhalmacmodemnarrowbandcca ElementTable unifiNarrowbandCCADebugTable ElementTableIndices unifiNarrowbandCCADebugTableIndex BFType uint32 BFAccess RO
+Element unifiNoCellMaxPower BasicType integer BERType integer OID 1.2.3.30.1.2.3.1.8017 Access read_write PSID 8017 DefaultIX1 1::28: DefaultIX1 2::28: DefaultIX1 3::20: DefaultIX1 4::20: ElementTable unifiNoCellTable ElementTableIndices unifiConnectionTypeTableIndex BFType int16 BFAccess RW
+Element unifiOperatingClassParamters BasicType string BERType string OID 1.2.3.31.1.2.3.1.8015 Access read_only Min 1 Max 73 PSID 8015 DefaultIX1 1:0x51:0x53:0x54:0x73:0x74:0x75:0x76:0x77:0x78:0x79:0x7A:0x7B:0x7C:0x7D:0x7E:0x7F:0x80 DefaultIX1 2:0x01:0x02:0x03:0x04:0x05:0x06:0x07:0x08:0x09:0x0A:0x0B:0x0C:0x11:0x80 DefaultIX1 3:0x01:0x02:0x03:0x04:0x05:0x0C:0x16:0x17:0x18:0x19:0x1A:0x1B:0x1C:0x1D:0x1E:0x1F:0x20:0x21:0x80 DefaultIX1 4:0x01:0x1E:0x20:0x21:0x22:0x24:0x25:0x27:0x29:0x2A:0x2C:0x38:0x39:0x3A:0x80 ElementTable unifiOperatingClassTable ElementTableIndices unifiOperatingClassTableIndex BFType var BFAccess RO
+Element unifiOverrideEDCAParam BasicType string BERType string OID 1.2.3.32.1.2.3.1.2156 Access read_write Min 0 Max 255 PSID 2156 DefaultIX1 1:0x0:0x32:0x0:0x0 DefaultIX1 2:0x0:0x32:0x0:0x0 DefaultIX1 3:0x0:0x32:0x0:0x0 DefaultIX1 4:0x0:0x32:0x0:0x0 ElementTable unifiOverrideEDCAParamTable ElementTableIndices unifiAccessClassIndex BFType var BFAccess RW
+Element unifiPanicSubSystemControl BasicType integer BERType integer OID 1.2.3.33.1.2.3.1.5026 Access read_write PSID 5026 DefaultIX1 1:::0x0001: DefaultIX1 2:::0x0001: DefaultIX1 3:::0x0001: DefaultIX1 4:::0x0000: DefaultIX1 5:::0x0001: DefaultIX1 6:::0x0001: ElementTable unifiPanicConfigTable ElementTableIndices unifiSubSystemsIndex BFType uint16 BFAccess RW
+Element unifiPeerBandwidth BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2094 Access read_only PSID 2094 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiCurrentPeerNss BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2095 Access read_only PSID 2095 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiPeerTxDataRate BasicType integer BERType integer_unsigned32 OID 1.2.3.34.1.2.3.1.2096 Access read_only PSID 2096 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint32 BFAccess RO
+Element unifiPeerRSSI BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2097 Access read_only PSID 2097 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType int16 BFAccess RO
+Element unifiPeerRxRetryCount BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2198 Access read_only PSID 2198 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiPeerRxMulticastCount BasicType integer BERType integer OID 1.2.3.34.1.2.3.1.2199 Access read_only PSID 2199 ElementTable unifiPeerIdTable ElementTableIndices unifiPeerid BFType uint16 BFAccess RO
+Element unifiSwToHwQueueStats BasicType integer BERType integer OID 1.2.3.35.1.2.3.1.2250 Access read_only PSID 2250 GetPerVifFunction mibqueuestatsget ElementTable unifiQueueStatsIdTable ElementTableIndices unifiQueueStatsIndex BFType uint16 BFAccess RO
+Element unifiHostToSwQueueStats BasicType integer BERType integer OID 1.2.3.35.1.2.3.1.2251 Access read_only PSID 2251 GetPerVifFunction mibqueuestatsget ElementTable unifiQueueStatsIdTable ElementTableIndices unifiQueueStatsIndex BFType uint16 BFAccess RO
+Element unifiRSSICURoamScanTrigger BasicType integer BERType integer OID 1.2.3.36.1.2.3.1.2307 Access read_write PSID 2307 DefaultIX1 1::-60: DefaultIX1 2::-70: ElementTable unifiRSSICURoamScanTriggerTable ElementTableIndices unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiRadioCCADebug BasicType integer BERType integer_unsigned32 OID 1.2.3.37.1.2.3.1.5100 Access read_only PSID 5100 GetFunction mibriceuint32get ElementTable unifiRadioCCADebugTable ElementTableIndices unifiRadioInstanceIndex:unifiRadioCCADebugTableIndex BFType uint32 BFAccess RO
+Element unifiRadioCCAThresholds BasicType string BERType string OID 1.2.3.38.1.2.3.1.2368 Access read_write Min 0 Max 255 PSID 2368 DefaultIX1 1:0x01:0x03:0x07:0x03:0x03:0x00:0x16:0x00:0x30:0x00:0x16:0x00:0x30 DefaultIX1 2:0x02:0x03:0x07:0x03:0x03:0x00:0x16:0x00:0x30:0x00:0x16:0x00:0x30 SetFunction mibricechangefsmparams ElementTable unifiRadioCCAThresholdsTable ElementTableIndices unifiRadioCCAThresholdsTableIndex BFType var BFAccess RW
+Element unifiNarrowbandCCAThresholds BasicType string BERType string OID 1.2.3.38.1.2.3.1.5099 Access read_write Min 0 Max 255 PSID 5099 DefaultIX1 1:0x01:0x03:0x01:0x03:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x00:0x03 DefaultIX1 2:0x02:0x03:0x06:0x03:0x01:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x1f:0x23:0x03 SetFunction mibhalmacmodemchangeparams ElementTable unifiRadioCCAThresholdsTable ElementTableIndices unifiRadioCCAThresholdsTableIndex BFType var BFAccess RW
+Element unifiRadioOnTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2230 Access read_only PSID 2230 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioTxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2231 Access read_only PSID 2231 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioRxTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2232 Access read_only PSID 2232 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioScanTime BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2233 Access read_only PSID 2233 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioOnTimeNan BasicType integer BERType integer_unsigned32 OID 1.2.3.39.1.2.3.1.2236 Access read_only PSID 2236 GetFunction mibllsstatsget ElementTable unifiRadioIDTable ElementTableIndices unifiRadioIndex BFType uint32 BFAccess RO
+Element unifiRadioRXSettingsRead BasicType string BERType string OID 1.2.3.40.1.2.3.1.5096 Access read_only PSID 5096 GetFunction mibbmsgget ElementTable unifiRadioRXSettingsTable ElementTableIndices unifiRadioInstanceIndex:unifiRadioRXSettingsIndex BFType var BFAccess RO
+Element unifiRadioTXSettingsRead BasicType integer BERType integer_unsigned32 OID 1.2.3.41.1.2.3.1.5089 Access read_only PSID 5089 GetFunction mibriceuint32get ElementTable unifiRadioTXSettingsTable ElementTableIndices unifiMacInstanceIndex:unifiRadioTXSettingsIndex BFType uint32 BFAccess RO
+Element unifiRadioTxIqDelay BasicType string BERType string OID 1.2.3.42.1.2.3.1.5117 Access read_write Min 0 Max 255 PSID 5117 DefaultIX1 1:0x01:0xff:0xff:0xff:0x00 DefaultIX1 2:0x02:0xff:0xff:0xff:0x00 SetFunction mibricechangefsmparams ElementTable unifiRadioTxIqDelayTable ElementTableIndices unifiRadioTxIqDelayTableIndex BFType var BFAccess RW
+Element unifiRadioTxPowerOverride BasicType integer BERType integer OID 1.2.3.43.1.2.3.1.5091 Access read_write Min -128 Max 127 PSID 5091 SetFunction mibricegenericset GetFunction mibint16get ElementTable unifiRadioTxPowerOverrideTable ElementTableIndices unifiRadioTXPowerOverrideTableIndex BFType int16 BFAccess RW
+Element unifiRateStatsRxSuccessCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2206 Access read_only PSID 2206 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiRateStatsTxSuccessCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2207 Access read_only PSID 2207 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiRateStatsRate BasicType integer BERType integer OID 1.2.3.44.1.2.3.1.2212 Access read_only PSID 2212 GetFunction mibuint16get ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint16 BFAccess RO
+Element unifiRateStatsRTSErrorCount BasicType integer BERType integer_unsigned32 OID 1.2.3.44.1.2.3.1.2358 Access read_only PSID 2358 GetPerVifFunction mibratestatsget ElementTable unifiRateStatsTable ElementTableIndices unifiRateStatsIndex BFType uint32 BFAccess RO
+Element unifiReadHardwareCounter BasicType integer BERType integer_unsigned32 OID 1.2.3.45.1.2.3.1.5087 Access read_only PSID 5087 GetFunction mibreadhardwarecounter ElementTable unifiReadHardwareCounterTable ElementTableIndices unifiRadioInstanceIndex:unifiReadHardwareCounterIndex BFType uint32 BFAccess RO
+Element unifiReadReg BasicType integer BERType integer_unsigned32 OID 1.2.3.46.1.2.3.1.8051 Access read_only PSID 8051 GetFunction mibreadreg ElementTable unifiReadRegTable ElementTableIndices unifiReadHardwareCounterIndex BFType uint32 BFAccess RO
+Element unifiRegulatoryParameters BasicType string BERType string OID 1.2.3.47.1.2.3.1.8011 Access read_only Min 3 Max 73 PSID 8011 DefaultIX1 1:0x30:0x30:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x99:0x09:0xB2:0x09:0x28:0x14:0x01:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 2:0x58:0x58:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 3:0x41:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0x50:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 4:0x41:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 5:0x41:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 6:0x41:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 7:0x41:0x49:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 8:0x41:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 9:0x41:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x12:0x00 DefaultIX1 10:0x41:0x4E:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 11:0x41:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 12:0x41:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 13:0x41:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 14:0x41:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 15:0x41:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 16:0x41:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x17:0x12:0x5E:0x15:0xE0:0x15:0x50:0x1E:0x02:0x12:0x16:0x62:0x16:0x50:0x1E:0x02:0x5D:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 17:0x41:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x5D:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 18:0x41:0x58:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 19:0x41:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x12:0x00:0x82:0x14:0xD2:0x14:0x50:0x12:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 20:0x42:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 21:0x42:0x42:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 22:0x42:0x44:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 23:0x42:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 24:0x42:0x46:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 25:0x42:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x5D:0x16:0xF3:0x16:0x50:0x0E:0x00 DefaultIX1 26:0x42:0x48:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x14:0x10:0x82:0x14:0xD2:0x14:0x14:0x14:0x12:0x67:0x16:0xCB:0x16:0x14:0x14:0x00 DefaultIX1 27:0x42:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 28:0x42:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x14:0x14:0x00 DefaultIX1 29:0x42:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 30:0x42:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 31:0x42:0x4E:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 32:0x42:0x4F:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x1E:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x10 DefaultIX1 33:0x42:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 34:0x42:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 35:0x42:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 36:0x42:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 37:0x42:0x57:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 38:0x42:0x59:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x12:0x16:0x4E:0x16:0x28:0x1B:0x02 DefaultIX1 39:0x42:0x5A:0x03:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 40:0x43:0x41:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xE0:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 41:0x43:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 42:0x43:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 43:0x43:0x46:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x11:0x00:0x82:0x14:0xD2:0x14:0x28:0x18:0x02:0x72:0x15:0x4E:0x16:0x28:0x18:0x02 DefaultIX1 44:0x43:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 45:0x43:0x48:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 46:0x43:0x49:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 47:0x43:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 48:0x43:0x4C:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 49:0x43:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 50:0x43:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 51:0x43:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 52:0x43:0x52:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 53:0x43:0x55:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 54:0x43:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 55:0x43:0x58:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0xA0:0x1B:0x02:0x12:0x16:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 56:0x43:0x59:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 57:0x43:0x5A:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 58:0x44:0x45:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 59:0x44:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 60:0x44:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 61:0x44:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 62:0x44:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 63:0x44:0x5A:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xE6:0x14:0x50:0x17:0x02:0x5E:0x15:0x26:0x16:0xA0:0x1E:0x02 DefaultIX1 64:0x45:0x43:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 65:0x45:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 66:0x45:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02 DefaultIX1 67:0x45:0x48:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02 DefaultIX1 68:0x45:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 69:0x45:0x53:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 70:0x45:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 71:0x46:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 72:0x46:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 73:0x46:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 74:0x46:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 75:0x46:0x4D:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 76:0x46:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 77:0x46:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 78:0x47:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 79:0x47:0x42:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 80:0x47:0x44:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 81:0x47:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x12:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 82:0x47:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 83:0x47:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 84:0x47:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 85:0x47:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 86:0x47:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 87:0x47:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 88:0x47:0x4E:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 89:0x47:0x50:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 90:0x47:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 91:0x47:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 92:0x47:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 93:0x47:0x54:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 94:0x47:0x55:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 95:0x47:0x57:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 96:0x47:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 97:0x48:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 98:0x48:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 99:0x48:0x4E:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 100:0x48:0x52:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x5D:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 101:0x48:0x54:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 102:0x48:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 103:0x49:0x44:0x03:0x62:0x09:0xB2:0x09:0x14:0x14:0x00:0x67:0x16:0xCB:0x16:0x14:0x17:0x00 DefaultIX1 104:0x49:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 105:0x49:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x17:0x12:0x72:0x15:0x62:0x16:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x17:0x01 DefaultIX1 106:0x49:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 107:0x49:0x4E:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 108:0x49:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 109:0x49:0x51:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 110:0x49:0x52:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 111:0x49:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 112:0x49:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 113:0x4A:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 114:0x4A:0x4D:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 115:0x4A:0x4F:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x67:0x16:0xCB:0x16:0x50:0x17:0x00 DefaultIX1 116:0x4A:0x50:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0xAA:0x09:0xBE:0x09:0x14:0x14:0x04:0x2E:0x13:0x7E:0x13:0x28:0x17:0x00:0xA6:0x13:0xE2:0x13:0x28:0x17:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x17:0x02 DefaultIX1 117:0x4B:0x45:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x28:0x17:0x00 DefaultIX1 118:0x4B:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 119:0x4B:0x48:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1B:0x00 DefaultIX1 120:0x4B:0x49:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 121:0x4B:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 122:0x4B:0x4E:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 123:0x4B:0x50:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 124:0x4B:0x52:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x5E:0x15:0x62:0x16:0xA0:0x1E:0x02:0x5D:0x16:0xDA:0x16:0x50:0x1E:0x00 DefaultIX1 125:0x4B:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 126:0x4B:0x59:0x01:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 127:0x4B:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xE6:0x14:0x50:0x14:0x02:0x12:0x16:0x4E:0x16:0x50:0x14:0x02 DefaultIX1 128:0x4C:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 129:0x4C:0x42:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 130:0x4C:0x43:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 131:0x4C:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 132:0x4C:0x4B:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x18:0x02:0x72:0x15:0x62:0x16:0x14:0x18:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 133:0x4C:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 134:0x4C:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 135:0x4C:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 136:0x4C:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 137:0x4C:0x56:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 138:0x4C:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 139:0x4D:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12 DefaultIX1 140:0x4D:0x43:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 141:0x4D:0x44:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 142:0x4D:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 143:0x4D:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 144:0x4D:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 145:0x4D:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 146:0x4D:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 147:0x4D:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 148:0x4D:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x4E:0x16:0x50:0x1E:0x02 DefaultIX1 149:0x4D:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 150:0x4D:0x4F:0x01:0x62:0x09:0xB2:0x09:0x28:0x17:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 151:0x4D:0x50:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 152:0x4D:0x51:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 153:0x4D:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 154:0x4D:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 155:0x4D:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 156:0x4D:0x55:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 157:0x4D:0x56:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5D:0x16:0xDA:0x16:0x50:0x14:0x00 DefaultIX1 158:0x4D:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 159:0x4D:0x58:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0xD6:0x15:0x50:0x18:0x02:0x12:0x16:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 160:0x4D:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x12:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x18:0x00 DefaultIX1 161:0x4D:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 162:0x4E:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 163:0x4E:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 164:0x4E:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 165:0x4E:0x46:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0xD6:0x15:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 166:0x4E:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 167:0x4E:0x49:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 168:0x4E:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 169:0x4E:0x4F:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 170:0x4E:0x50:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x67:0x16:0xB7:0x16:0x50:0x14:0x00 DefaultIX1 171:0x4E:0x52:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 172:0x4E:0x55:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 173:0x4E:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 174:0x4F:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 175:0x50:0x41:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x5E:0x15:0x62:0x16:0xA0:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 176:0x50:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 177:0x50:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 178:0x50:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 179:0x50:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 180:0x50:0x4B:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 181:0x50:0x4C:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 182:0x50:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 183:0x50:0x4E:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 184:0x50:0x52:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 185:0x50:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 186:0x50:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 187:0x50:0x57:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 188:0x50:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 189:0x51:0x41:0x03:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x5E:0x15:0x62:0x16:0xA0:0x1B:0x12:0x67:0x16:0xCB:0x16:0x50:0x1E:0x12 DefaultIX1 190:0x52:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 191:0x52:0x4F:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 192:0x52:0x53:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0xE6:0x14:0x28:0x17:0x10:0x5E:0x15:0x5D:0x16:0x14:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 193:0x52:0x55:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x12:0x16:0x62:0x16:0x50:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 194:0x52:0x57:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x4E:0x16:0xA0:0x18:0x02 DefaultIX1 195:0x53:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xB7:0x16:0x50:0x0E:0x00 DefaultIX1 196:0x53:0x42:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 197:0x53:0x43:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 198:0x53:0x44:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 199:0x53:0x45:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 200:0x53:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1E:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 201:0x53:0x48:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 202:0x53:0x49:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 203:0x53:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 204:0x53:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 205:0x53:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 206:0x53:0x4D:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 207:0x53:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02 DefaultIX1 208:0x53:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 209:0x53:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 210:0x53:0x53:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 211:0x53:0x54:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 212:0x53:0x56:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x14:0x11:0x00:0x82:0x14:0xD2:0x14:0x14:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x14:0x1E:0x00 DefaultIX1 213:0x53:0x58:0x00:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 214:0x53:0x59:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 215:0x53:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 216:0x54:0x43:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 217:0x54:0x44:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 DefaultIX1 218:0x54:0x46:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 219:0x54:0x47:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x4E:0x16:0x28:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 220:0x54:0x48:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x12:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 221:0x54:0x4A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 222:0x54:0x4B:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 223:0x54:0x4C:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 224:0x54:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02 DefaultIX1 225:0x54:0x4E:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0xD6:0x15:0x50:0x14:0x02 DefaultIX1 226:0x54:0x4F:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 227:0x54:0x52:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 228:0x54:0x54:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 229:0x54:0x56:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00 DefaultIX1 230:0x54:0x57:0x01:0x60:0x09:0xA8:0x09:0x28:0x1E:0x00:0x1E:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xE6:0x14:0x50:0x17:0x02:0x5E:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xDA:0x16:0x50:0x1E:0x00 DefaultIX1 231:0x54:0x5A:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 232:0x55:0x41:0x02:0x60:0x09:0xB3:0x09:0x28:0x14:0x00:0x1E:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xE6:0x14:0x50:0x14:0x12:0x72:0x15:0x26:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 233:0x55:0x47:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xB7:0x16:0x50:0x1E:0x00 DefaultIX1 234:0x55:0x4D:0x00:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 235:0x55:0x53:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x00:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x72:0x15:0x62:0x16:0xA0:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 236:0x55:0x59:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 237:0x55:0x5A:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02 DefaultIX1 238:0x56:0x41:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 239:0x56:0x43:0x02:0x62:0x09:0xA8:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 240:0x56:0x45:0x01:0x62:0x09:0xB2:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x17:0x10:0x82:0x14:0xD2:0x14:0x50:0x17:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 241:0x56:0x47:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 242:0x56:0x49:0x01:0x62:0x09:0xA8:0x09:0x28:0x1E:0x00:0x32:0x14:0x82:0x14:0x50:0x18:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 243:0x56:0x4E:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x10:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0x50:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 244:0x56:0x55:0x01:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x11:0x00:0x82:0x14:0xD2:0x14:0x50:0x18:0x02:0x72:0x15:0x62:0x16:0xA0:0x18:0x02:0x67:0x16:0xCB:0x16:0x50:0x1E:0x00 DefaultIX1 245:0x57:0x46:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x1B:0x00 DefaultIX1 246:0x57:0x53:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x28:0x14:0x00:0x82:0x14:0xD2:0x14:0x28:0x14:0x02:0x72:0x15:0x62:0x16:0x28:0x1B:0x02:0x67:0x16:0xA3:0x16:0x28:0x1B:0x00 DefaultIX1 247:0x58:0x4B:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 248:0x59:0x45:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 249:0x59:0x54:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 250:0x5A:0x41:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x10:0x82:0x14:0xD2:0x14:0x50:0x14:0x12:0x72:0x15:0x62:0x16:0xA0:0x1E:0x00:0x67:0x16:0xCB:0x16:0x50:0x0E:0x00 DefaultIX1 251:0x5A:0x4D:0x00:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x62:0x16:0xA0:0x14:0x02:0x67:0x16:0xCB:0x16:0x50:0x14:0x00 DefaultIX1 252:0x5A:0x57:0x02:0x62:0x09:0xB2:0x09:0x28:0x14:0x00:0x32:0x14:0x82:0x14:0x50:0x14:0x00:0x82:0x14:0xD2:0x14:0x50:0x14:0x02:0x72:0x15:0x4E:0x16:0xA0:0x1B:0x02 ElementTable unifiRegulatoryTable ElementTableIndices unifiRegulatoryTableIndex BFType var BFAccess RO
+Element unifiRoamCUFactor BasicType string BERType string OID 1.2.3.48.1.2.3.1.2295 Access read_write PSID 2295 DefaultIX1 1:0x09:0x64:0x00 DefaultIX1 2:0x45:0x6F:0x0D DefaultIX1 3:0x65:0x14:0x00 DefaultIX1 4:0x1D:0x64:0x00 DefaultIX1 5:0x4F:0x94:0x10 DefaultIX1 6:0x65:0x14:0x00 ElementTable unifiRoamCUFactorTable ElementTableIndices unifiRoamCUFactorTableIndex BFType var BFAccess RW
+Element unifiRoamCUScanTrigger BasicType integer BERType integer OID 1.2.3.49.1.2.3.1.2308 Access read_write PSID 2308 DefaultIX1 1::70: DefaultIX1 2::70: ElementTable unifiRoamCUScanTriggerTable ElementTableIndices unifiBandTableIndex BFType uint16 BFAccess RW
+Element unifiRoamRSSIBoost BasicType integer BERType integer OID 1.2.3.50.1.2.3.1.2298 Access read_write PSID 2298 DefaultIX1 1:0 DefaultIX1 2:0 ElementTable unifiRoamRSSIBoostTable ElementTableIndices unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiRoamRssiFactor BasicType string BERType string OID 1.2.3.51.1.2.3.1.2306 Access read_write PSID 2306 DefaultIX1 1:0xC9:0x64:0x00:0x00 DefaultIX1 2:0xC4:0x5A:0x02:0x3C DefaultIX1 3:0xBA:0x3C:0x03:0x46 DefaultIX1 4:0xB0:0x14:0x04:0x50 DefaultIX1 5:0xA6:0x00:0x02:0x5A DefaultIX1 6:0x81:0x00:0x00:0x00 ElementTable unifiRoamRssiFactorTable ElementTableIndices unifiRoamRssiFactorTableIndex BFType var BFAccess RW
+Element unifiRxExternalGainFrequency BasicType integer BERType integer OID 1.2.3.52.1.2.3.1.5037 Access read_write Min 3940 Max 12000 PSID 5037 SetFunction mibricegenericset ElementTable unifiRxExternalGainTable ElementTableIndices unifiRxExternalGainTableIndex BFType uint16 BFAccess RW
+Element unifiRxExternalGain BasicType integer BERType integer OID 1.2.3.52.1.2.3.1.5038 Access read_write Min -128 Max 127 PSID 5038 SetFunction mibricegenericset ElementTable unifiRxExternalGainTable ElementTableIndices unifiRxExternalGainTableIndex BFType int16 BFAccess RW
+Element unifiRxRssiAdjustments BasicType string BERType string OID 1.2.3.53.1.2.3.1.5115 Access read_write Min 4 Max 4 PSID 5115 SetFunction mibricegenericset ElementTable unifiRxRssiAdjustmentsTable ElementTableIndices unifiRadioIndex:unifiBandTableIndex BFType var BFAccess RW
+Element unifiSarBackoff BasicType integer BERType integer OID 1.2.3.54.1.2.3.1.6026 Access read_write PSID 6026 DefaultIX2 1:1:60 DefaultIX2 1:2:52 DefaultIX2 2:1:59 DefaultIX2 2:2:51 DefaultIX2 3:1:58 DefaultIX2 3:2:50 DefaultIX2 4:1:57 DefaultIX2 4:2:49 ElementTable unifiSarBackoffTable ElementTableIndices unifiSarModeTableIndex:unifiBandTableIndex BFType int16 BFAccess RW
+Element unifiScanParameters BasicType string BERType string OID 1.2.3.55.1.2.3.1.2154 Access read_write Min 18 Max 18 PSID 2154 DefaultIX1 1:0x06:0x09:0x18:0x00:0x3A:0x00:0x66:0x00:0x00:0x06:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 2:0x06:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x06:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 3:0x02:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x02:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 4:0x06:0x09:0x18:0x00:0x44:0x00:0x66:0x00:0x00:0x06:0x01:0x18:0x00:0x32:0x00:0x66:0x00:0x00 DefaultIX1 5:0x06:0x08:0x18:0x00:0x44:0x00:0x00:0x00:0x00:0x06:0x00:0x18:0x00:0x32:0x00:0x00:0x00:0x00 DefaultIX1 6:0x04:0x09:0x18:0x00:0x3A:0x00:0x00:0x00:0x00:0x04:0x01:0x18:0x00:0x3A:0x00:0x00:0x00:0x00 DefaultIX1 7:0x04:0x09:0x18:0x00:0x27:0x00:0x00:0x00:0x00:0x04:0x01:0x18:0x00:0x27:0x00:0x00:0x00:0x00 DefaultIX1 8:0x00:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x00:0x01:0x44:0x00:0x92:0x00:0x75:0x00:0x00 DefaultIX1 9:0x02:0x09:0x44:0x00:0x92:0x00:0x75:0x00:0x00:0x02:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x00 DefaultIX1 10:0x03:0x09:0x18:0x00:0x3A:0x00:0x66:0x00:0x80:0x03:0x01:0x18:0x00:0x3A:0x00:0x66:0x00:0x80 DefaultIX1 11:0x04:0x0C:0x1B:0x00:0x44:0x00:0x75:0x00:0x04:0x04:0x04:0x1B:0x00:0x44:0x00:0x75:0x00:0x04 DefaultIX1 12:0x04:0x09:0x1B:0x00:0x44:0x00:0x75:0x00:0x04:0x04:0x01:0x1B:0x00:0x44:0x00:0x75:0x00:0x04 DefaultIX1 13:0x08:0x08:0x27:0x00:0x62:0x00:0x75:0x00:0x04:0x08:0x00:0x27:0x00:0x62:0x00:0x75:0x00:0x04 DefaultIX1 14:0x08:0x08:0x27:0x00:0x62:0x00:0x75:0x00:0x04:0x08:0x00:0x27:0x00:0x62:0x00:0x75:0x00:0x04 DefaultIX1 15:0x03:0x09:0x05:0x00:0x14:0x00:0x64:0x00:0x00:0x03:0x01:0x05:0x00:0x14:0x00:0x64:0x00:0x00 DefaultIX1 16:0x03:0x08:0x00:0x00:0x00:0x00:0xC8:0x00:0x01:0x03:0x00:0x00:0x00:0x00:0x00:0xC8:0x00:0x01 DefaultIX1 17:0x04:0x08:0x1B:0x00:0x44:0x00:0x75:0x00:0x00:0x04:0x00:0x1B:0x00:0x44:0x00:0x75:0x00:0x00 DefaultIX1 18:0x00:0x09:0x02:0x03:0x04:0x05:0x06:0x07:0x08:0x09:0x08:0x07:0x06:0x05:0x04:0x03:0x02:0x01 ElementTable unifiScanParametersTable ElementTableIndices unifiScanParametersTableIndex BFType var BFAccess RW
+Element unifiStaticDpdGain BasicType string BERType string OID 1.2.3.56.1.2.3.1.5097 Access read_write Min 11 Max 27 PSID 5097 SetFunction mibricechangefsmparams ElementTable unifiStaticDpdGainTable ElementTableIndices unifiStaticDpdGainTableIndex BFType var BFAccess RW
+Element unifiThroughputDebug BasicType integer BERType integer OID 1.2.3.57.1.2.3.1.2254 Access read_write PSID 2254 GetPerVifFunction mibthroughputdiagnosticsget SetPerVifFunction mibthroughputdiagnosticsset ElementTable unifiThroughputDebugTable ElementTableIndices unifiThroughputDebugIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaConnectionLossFrequency BasicType integer BERType integer OID 1.2.3.58.1.2.3.1.5033 Access read_write Min 3940 Max 12000 PSID 5033 SetFunction mibricegenericset ElementTable unifiTxAntennaConnectionLossTable ElementTableIndices unifiTxAntennaConnectionLossTableIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaConnectionLoss BasicType integer BERType integer OID 1.2.3.58.1.2.3.1.5034 Access read_write Min -128 Max 127 PSID 5034 SetFunction mibricegenericset ElementTable unifiTxAntennaConnectionLossTable ElementTableIndices unifiTxAntennaConnectionLossTableIndex BFType int16 BFAccess RW
+Element unifiTxAntennaMaxGainFrequency BasicType integer BERType integer OID 1.2.3.59.1.2.3.1.5035 Access read_write Min 3940 Max 12000 PSID 5035 SetFunction mibricegenericset ElementTable unifiTxAntennaMaxGainTable ElementTableIndices unifiTxAntennaMaxGainTableIndex BFType uint16 BFAccess RW
+Element unifiTxAntennaMaxGain BasicType integer BERType integer OID 1.2.3.59.1.2.3.1.5036 Access read_write Min -128 Max 127 PSID 5036 SetFunction mibricegenericset ElementTable unifiTxAntennaMaxGainTable ElementTableIndices unifiTxAntennaMaxGainTableIndex BFType int16 BFAccess RW
+Element unifiTxDetectorFrequencyCompensation BasicType string BERType string OID 1.2.3.60.1.2.3.1.5057 Access read_write Min 0 Max 255 PSID 5057 SetFunction mibricechangefsmparams ElementTable unifiTxDetectorFrequencyCompensationTable ElementTableIndices unifiTxDetectorTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxDetectorTemperatureCompensation BasicType string BERType string OID 1.2.3.61.1.2.3.1.5056 Access read_write Min 0 Max 255 PSID 5056 SetFunction mibricechangefsmparams ElementTable unifiTxDetectorTemperatureCompensationTable ElementTableIndices unifiTxDetectorTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxFtrimSettings BasicType string BERType string OID 1.2.3.62.1.2.3.1.2372 Access read_write Min 0 Max 255 PSID 2372 SetFunction mibricechangefsmparams ElementTable unifiTxFtrimSettingsTable ElementTableIndices unifiTxFtrimSettingsTableIndex BFType var BFAccess RW
+Element unifiTxGainSettings BasicType string BERType string OID 1.2.3.63.1.2.3.1.5032 Access read_write Min 0 Max 255 PSID 5032 SetFunction mibricechangefsmparams ElementTable unifiTxGainSettingsTable ElementTableIndices unifiTxGainSettingsTableIndex BFType var BFAccess RW
+Element unifiTxGainStepSettings BasicType string BERType string OID 1.2.3.64.1.2.3.1.5081 Access read_write Min 0 Max 255 PSID 5081 SetFunction mibricechangefsmparams ElementTable unifiTxGainStepSettingsTable ElementTableIndices unifiTxGainStepSettingsTableIndex BFType var BFAccess RW
+Element unifiTxOOBConstraints BasicType string BERType string OID 1.2.3.65.1.2.3.1.5064 Access read_write Min 0 Max 255 PSID 5064 SetFunction mibricechangefsmparams ElementTable unifiTxOOBConstraintTable ElementTableIndices unifiTxOOBConstraintTableIndex BFType var BFAccess RW
+Element unifiTxOpenLoopFrequencyCompensation BasicType string BERType string OID 1.2.3.66.1.2.3.1.5059 Access read_write Min 0 Max 255 PSID 5059 SetFunction mibricechangefsmparams ElementTable unifiTxOpenLoopFrequencyCompensationTable ElementTableIndices unifiTxOpenLoopFrequencyCompensationTableIndex BFType var BFAccess RW
+Element unifiTxOpenLoopTemperatureCompensation BasicType string BERType string OID 1.2.3.67.1.2.3.1.5058 Access read_write Min 0 Max 255 PSID 5058 SetFunction mibricechangefsmparams ElementTable unifiTxOpenLoopTemperatureCompensationTable ElementTableIndices unifiTxOpenLoopTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPaGainDpdFrequencyCompensation BasicType string BERType string OID 1.2.3.68.1.2.3.1.5067 Access read_write Min 0 Max 255 PSID 5067 SetFunction mibricechangefsmparams ElementTable unifiTxPaGainDpdFrequencyCompensationTable ElementTableIndices unifiTxPaGainDpdFrequencyCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPaGainDpdTemperatureCompensation BasicType string BERType string OID 1.2.3.69.1.2.3.1.5066 Access read_write Min 0 Max 255 PSID 5066 SetFunction mibricechangefsmparams ElementTable unifiTxPaGainDpdTemperatureCompensationTable ElementTableIndices unifiTxPaGainDpdTemperatureCompensationTableIndex BFType var BFAccess RW
+Element unifiTxPowerDetectorResponse BasicType string BERType string OID 1.2.3.70.1.2.3.1.5055 Access read_write Min 0 Max 255 PSID 5055 SetFunction mibricechangefsmparams ElementTable unifiTxPowerDetectorResponseTable ElementTableIndices unifiTxPowerDetectorResponseTableIndex BFType var BFAccess RW
+Element unifiTxPowerTrimConfig BasicType string BERType string OID 1.2.3.71.1.2.3.1.5072 Access read_write Min 25 Max 25 PSID 5072 SetFunction mibricechangefsmparams ElementTable unifiTxPowerTrimConfigTable ElementTableIndices unifiTxPowerTrimConfigTableIndex BFType var BFAccess RW
+Element unifiTxSettings BasicType string BERType string OID 1.2.3.72.1.2.3.1.5031 Access read_write Min 0 Max 255 PSID 5031 SetFunction mibricechangefsmparams ElementTable unifiTxSettingsTable ElementTableIndices unifiTxSettingsTableIndex BFType var BFAccess RW
projects / GitHub / moto-9609 / android_vendor_motorola_exynos9610-common.git / commitdiff