drm/i915: Make contexts non-snooped on non-LLC platforms

We don't do CPU access to GPU contexts so making the GPU access snoop
the CPU caches seems silly, and potentially expensive.

v2: Use !IS_VALLEYVIEW instead of HAS_LLC as this is really
    about what the PTEs can represent.
    Add a comment clarifying the situation.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 8827892a099d51ec342ecd405456acde9ea07e08..30b355afb3621eb54d96f37701b26c11fb28aaaf 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -240,7 +240,15 @@ __create_hw_context(struct drm_device *dev,
                return ERR_PTR(-ENOMEM);
        }
 
-       if (INTEL_INFO(dev)->gen >= 7) {
+       /*
+        * Try to make the context utilize L3 as well as LLC.
+        *
+        * On VLV we don't have L3 controls in the PTEs so we
+        * shouldn't touch the cache level, especially as that
+        * would make the object snooped which might have a
+        * negative performance impact.
+        */
+       if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) {
                ret = i915_gem_object_set_cache_level(ctx->obj,
                                                      I915_CACHE_L3_LLC);
                /* Failure shouldn't ever happen this early */