MIPS: Add cases for CPU_P5600

Add a CPU_P5600 case to various switch statements, doing the same thing
as for CPU_PROAPTIV.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6408/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 02f591bd95ca635b82e6016eedcffa5ea1978b93..61f803be4c2e59ecc65f9a082b6b15f0aff2ff65 100644 (file)
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -46,6 +46,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
        case CPU_M14KEC:
        case CPU_INTERAPTIV:
        case CPU_PROAPTIV:
+       case CPU_P5600:
 #endif
 
 #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1

diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index c1fd0bc7a31558d724cdde34eb650c14775dc1eb..04ea1c7a3d31b8e1ce7e24652648edb686b36759 100644 (file)
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -187,6 +187,7 @@ void __init check_wait(void)
        case CPU_1074K:
        case CPU_INTERAPTIV:
        case CPU_PROAPTIV:
+       case CPU_P5600:
                cpu_wait = r4k_wait;
                if (read_c0_config7() & MIPS_CONF7_WII)
                        cpu_wait = r4k_wait_irqoff;

diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 707d957e6a661e1c2b460ac085fe2fcc0a89bac3..f9a693a6aaa742208c9b549b0fbf86a0d339ab2a 100644 (file)
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -208,6 +208,7 @@ void spram_config(void)
        case CPU_1074K:
        case CPU_INTERAPTIV:
        case CPU_PROAPTIV:
+       case CPU_P5600:
                config0 = read_c0_config();
                /* FIXME: addresses are Malta specific */
                if (config0 & (1<<24)) {

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 7ac4d8f44cf0a5aeb028566ec6766fe767463c17..ee1f2fc584ea143a0f7aa0bc0e980d65621673f1 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1439,6 +1439,7 @@ static inline void parity_protection_init(void)
        case CPU_1074K:
        case CPU_INTERAPTIV:
        case CPU_PROAPTIV:
+       case CPU_P5600:
                {
 #define ERRCTL_PE      0x80000000
 #define ERRCTL_L2P     0x00800000

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index d72e9a16cf145b87b4a42f08b90af6f872656910..6c37d21ef2fbd23f5148f941d0b8b1190bbaa296 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1115,6 +1115,7 @@ static void probe_pcache(void)
        case CPU_1004K:
        case CPU_1074K:
        case CPU_INTERAPTIV:
+       case CPU_P5600:
        case CPU_PROAPTIV:
                if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K))
                        alias_74k_erratum(c);

diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 7b3977035a4605bb0dfcce123f090578b0882b7d..99eb8fabab606afe28781620301f430e4b776fd4 100644 (file)
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -79,6 +79,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
        case CPU_1074K:
        case CPU_INTERAPTIV:
        case CPU_PROAPTIV:
+       case CPU_P5600:
        case CPU_BMIPS5000:
                if (config2 & (1 << 12))
                        return 0;

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 151ca264c8a62c5cc0385ae40885b0afc009b66f..ccae9a46e222d291c48e66734884093a52efaa18 100644 (file)
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -511,6 +511,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
                case CPU_74K:
                case CPU_1074K:
                case CPU_PROAPTIV:
+               case CPU_P5600:
                        break;
 
                default: