projects
/
GitHub
/
LineageOS
/
android_kernel_motorola_exynos9610.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
0f334a3
)
MIPS: MTI: Fix accesses to device registers on MIPS boards
author
Chris Dearman
<chris@mips.com>
Fri, 10 Jul 2009 08:53:54 +0000
(
01:53
-0700)
committer
Ralf Baechle
<ralf@linux-mips.org>
Mon, 2 Nov 2009 11:00:04 +0000
(12:00 +0100)
This fixes the remaining problems introduced by
f197465384bf7ef1af184c2ed1a4e268911a91e3
(incorrect access length &
byteswapping in bigendian mode)
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mti-malta/malta-int.c
patch
|
blob
|
blame
|
history
diff --git
a/arch/mips/mti-malta/malta-int.c
b/arch/mips/mti-malta/malta-int.c
index 3e0a9b35ba5cde0019c6b6efa419f1a91613732d..e568d0da060eb5e141321b645cd292ba2d458810 100644
(file)
--- a/
arch/mips/mti-malta/malta-int.c
+++ b/
arch/mips/mti-malta/malta-int.c
@@
-87,7
+87,7
@@
static inline int mips_pcibios_iack(void)
dummy = BONITO_PCIMAP_CFG;
iob(); /* sync */
- irq = readl((u32 *)_pcictrl_bonito_pcicfg);
+ irq =
__raw_
readl((u32 *)_pcictrl_bonito_pcicfg);
iob(); /* sync */
irq &= 0xff;
BONITO_PCIMAP_CFG = 0;