ctx->config.parm.dec.cfg.canvas_mem_mode);
pbuf += sprintf(pbuf, "parm_v4l_canvas_mem_endian:%d;",
ctx->config.parm.dec.cfg.canvas_mem_endian);
+ pbuf += sprintf(pbuf, "parm_v4l_low_latency_mode:%d;",
+ ctx->config.parm.dec.cfg.low_latency_mode);
ctx->config.length = pbuf - ctx->config.buf;
} else {
ctx->config.parm.dec.cfg.double_write_mode = 16;
u32 kpi_first_i_decoded;
int sidebind_type;
int sidebind_channel_id;
+ u32 low_latency_mode;
};
static u32 again_threshold;
if (!field_pic_flag && (((p_H264_Dpb->mSPS.profile_idc == BASELINE) &&
(p_H264_Dpb->reorder_pic_num < 2)) ||
(((unsigned long)(hw->vh264_amstream_dec_info
- .param)) & 0x8))) {
+ .param)) & 0x8) || hw->low_latency_mode & 0x8)) {
p_H264_Dpb->fast_output_enable =
H264_OUTPUT_MODE_FAST;
}
"parm_v4l_canvas_mem_mode",
&config_val) == 0)
hw->canvas_mode = config_val;
+ if (get_config_int(pdata->config,
+ "parm_v4l_low_latency_mode",
+ &config_val) == 0)
+ hw->low_latency_mode = config_val;
if (get_config_int(pdata->config, "sidebind_type",
&config_val) == 0)
hw->sidebind_type = config_val;