mfc_mem_cleanup_user_shared_handle(ctx, &enc->sh_handle_svc);
mfc_mem_cleanup_user_shared_handle(ctx, &enc->sh_handle_roi);
+ mfc_mem_cleanup_user_shared_handle(ctx, &enc->sh_handle_hdr);
mfc_release_enc_roi_buffer(ctx);
kfree(enc);
}
enc->sh_handle_svc.fd = -1;
enc->sh_handle_roi.fd = -1;
+ enc->sh_handle_hdr.fd = -1;
/* Init videobuf2 queue for OUTPUT */
ctx->vq_src.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
.h264_dec_ctx = PAGE_ALIGN(0x200000), /* 1.6MB */
.other_dec_ctx = PAGE_ALIGN(0xC800), /* 50KB */
.h264_enc_ctx = PAGE_ALIGN(0x19000), /* 100KB */
- .hevc_enc_ctx = PAGE_ALIGN(0xA000), /* 40KB */
- .other_enc_ctx = PAGE_ALIGN(0x6400), /* 25KB */
+ .hevc_enc_ctx = PAGE_ALIGN(0xC800), /* 50KB */
+ .other_enc_ctx = PAGE_ALIGN(0xC800), /* 50KB */
.shared_buf = PAGE_ALIGN(0x2000), /* 8KB */
.dbg_info_buf = PAGE_ALIGN(0x1000), /* 4KB for DEBUG INFO */
};
#define ENC_SET_COLOR_ASPECT (1 << 9)
#define ENC_SET_HP_BITRATE_CONTROL (1 << 10)
#define ENC_SET_STATIC_INFO (1 << 11)
+#define ENC_SET_HDR10_PLUS (1 << 12)
#define ENC_SET_VP9_PROFILE_LEVEL (1 << 13)
#define MFC_VER_MAJOR(dev) ((dev->pdata->ip_ver >> 8) & 0xFF)
#define NAL_Q_OUT_ENTRY_SIZE 512
#define NAL_Q_IN_DEC_STR_SIZE 112
-#define NAL_Q_IN_ENC_STR_SIZE 204
+#define NAL_Q_IN_ENC_STR_SIZE 324
#define NAL_Q_OUT_DEC_STR_SIZE 376
#define NAL_Q_OUT_ENC_STR_SIZE 64
#define NAL_Q_DUMP_MAX_STR_SIZE 376
int ExtCtbQpAddr;
int WeightUpper;
int RcMode;
+ int St2094_40sei[30];
char reserved[NAL_Q_IN_ENTRY_SIZE - NAL_Q_IN_ENC_STR_SIZE];
-} EncoderInputStr; /* 51*4 = 204 bytes */
+} EncoderInputStr; /* 81*4 = 324 bytes */
typedef struct __DecoderOutputStr {
int StartCode; /* 0xAAAAAAAA; Decoder output structure marker */
int stored_tag;
struct mfc_user_shared_handle sh_handle_svc;
struct mfc_user_shared_handle sh_handle_roi;
+ struct mfc_user_shared_handle sh_handle_hdr;
int roi_index;
struct mfc_special_buf roi_buf[MFC_MAX_EXTRA_BUF];
struct mfc_enc_roi_info roi_info[MFC_MAX_EXTRA_BUF];
.step = 1,
.default_value = 0,
},
+ {
+ .id = V4L2_CID_MPEG_MFC_HDR_USER_SHARED_HANDLE,
+ .type = V4L2_CTRL_TYPE_INTEGER,
+ .name = "Dynamic HDR10+ SEI metadata",
+ .minimum = INT_MIN,
+ .maximum = INT_MAX,
+ .step = 1,
+ .default_value = 0,
+ },
};
#define NUM_CTRLS ARRAY_SIZE(controls)
if (MFC_FEATURE_SUPPORT(dev, dev->pdata->static_info_enc))
val |= ENC_SET_STATIC_INFO;
+ if (MFC_FEATURE_SUPPORT(dev, dev->pdata->hdr10_plus))
+ val |= ENC_SET_HDR10_PLUS;
+
if (dev->pdata->support_422)
val |= ENC_SET_VP9_PROFILE_LEVEL;
case V4L2_CID_MPEG_VIDEO_SEI_DISPLAY_PRIMARIES_2:
p->display_primaries_2 = ctrl->value;
break;
+ case V4L2_CID_MPEG_MFC_HDR_USER_SHARED_HANDLE:
+ if (enc->sh_handle_hdr.fd == -1) {
+ enc->sh_handle_hdr.fd = ctrl->value;
+ if (mfc_mem_get_user_shared_handle(ctx, &enc->sh_handle_hdr)) {
+ enc->sh_handle_hdr.fd = -1;
+ return -EINVAL;
+ }
+ mfc_debug(2, "[MEMINFO][HDR+] shared handle fd: %d, vaddr: 0x%p\n",
+ enc->sh_handle_hdr.fd,
+ enc->sh_handle_hdr.vaddr);
+ }
+ break;
default:
mfc_err_ctx("Invalid control: 0x%08x\n", ctrl->id);
ret = -EINVAL;
}
if (debug_level >= 5)
- mfc_print_dec_hdr_plus_info(ctx, index);
+ mfc_print_hdr_plus_info(ctx, sei_meta);
+}
+
+static void __mfc_nal_q_set_hdr_plus_info(struct mfc_ctx *ctx, EncoderInputStr *pInStr,
+ struct hdr10_plus_meta *sei_meta)
+{
+ struct mfc_dev *dev = ctx->dev;
+ unsigned int val = 0;
+ int num_win, num_distribution;
+ int i, j;
+
+ pInStr->HevcNalControl &= ~(sei_meta->valid << 6);
+ pInStr->HevcNalControl |= ((sei_meta->valid & 0x1) << 6);
+
+ /* iru_t_t35 */
+ val = 0;
+ val |= (sei_meta->t35_country_code & 0xFF);
+ val |= ((sei_meta->t35_terminal_provider_code & 0xFF) << 8);
+ val |= (((sei_meta->t35_terminal_provider_oriented_code >> 8) & 0xFF) << 24);
+ pInStr->St2094_40sei[0] = val;
+
+ /* window information */
+ num_win = (sei_meta->num_windows & 0x3);
+ if (!num_win || (num_win > dev->pdata->max_hdr_win)) {
+ mfc_debug(3, "NAL Q:[HDR+] num_window is only supported till %d\n",
+ dev->pdata->max_hdr_win);
+ num_win = dev->pdata->max_hdr_win;
+ sei_meta->num_windows = num_win;
+ }
+
+ /* application */
+ val = 0;
+ val |= (sei_meta->t35_terminal_provider_oriented_code & 0xFF);
+ val |= ((sei_meta->application_identifier & 0xFF) << 8);
+ val |= ((sei_meta->application_version & 0xFF) << 16);
+ val |= ((sei_meta->num_windows & 0x3) << 24);
+ pInStr->St2094_40sei[1] = val;
+
+ /* luminance */
+ val = 0;
+ val |= (sei_meta->target_maximum_luminance & 0x7FFFFFF);
+ val |= ((sei_meta->target_actual_peak_luminance_flag & 0x1) << 27);
+ pInStr->St2094_40sei[2] = val;
+
+ /* per window setting */
+ for (i = 0; i < num_win; i++) {
+ /* scl */
+ for (j = 0; j < HDR_MAX_SCL; j++)
+ pInStr->St2094_40sei[3 + j] = (sei_meta->win_info[i].maxscl[j] & 0x1FFFF);
+
+ /* distribution */
+ val = 0;
+ val |= (sei_meta->win_info[i].average_maxrgb & 0x1FFFF);
+ val |= ((sei_meta->win_info[i].num_distribution_maxrgb_percentiles & 0xF) << 17);
+ pInStr->St2094_40sei[6] = val;
+ num_distribution = (sei_meta->win_info[i].num_distribution_maxrgb_percentiles & 0xF);
+ for (j = 0; j < num_distribution; j++) {
+ val = 0;
+ val |= (sei_meta->win_info[i].distribution_maxrgb_percentages[j] & 0x7F);
+ val |= ((sei_meta->win_info[i].distribution_maxrgb_percentiles[j] & 0x1FFFF) << 7);
+ pInStr->St2094_40sei[7 + j] = val;
+ }
+
+ /* bright pixels, luminance */
+ val = 0;
+ val |= (sei_meta->win_info[i].fraction_bright_pixels & 0x3FF);
+ val |= ((sei_meta->mastering_actual_peak_luminance_flag & 0x1) << 10);
+
+ /* tone mapping */
+ val |= ((sei_meta->win_info[i].tone_mapping_flag & 0x1) << 11);
+ pInStr->St2094_40sei[22] = val;
+ if (sei_meta->win_info[i].tone_mapping_flag & 0x1) {
+ val = 0;
+ val |= (sei_meta->win_info[i].knee_point_x & 0xFFF);
+ val |= ((sei_meta->win_info[i].knee_point_y & 0xFFF) << 12);
+ val |= ((sei_meta->win_info[i].num_bezier_curve_anchors & 0xF) << 24);
+ pInStr->St2094_40sei[23] = val;
+ for (j = 0; j < HDR_MAX_BEZIER_CURVES / 3; j++) {
+ val = 0;
+ val |= (sei_meta->win_info[i].bezier_curve_anchors[j * 3] & 0x3FF);
+ val |= ((sei_meta->win_info[i].bezier_curve_anchors[j * 3 + 1] & 0x3FF) << 10);
+ val |= ((sei_meta->win_info[i].bezier_curve_anchors[j * 3 + 2] & 0x3FF) << 20);
+ pInStr->St2094_40sei[24 + j] = val;
+ }
+
+ }
+
+ /* color saturation */
+ if (sei_meta->win_info[i].color_saturation_mapping_flag & 0x1) {
+ val = 0;
+ val |= (sei_meta->win_info[i].color_saturation_mapping_flag & 0x1);
+ val |= ((sei_meta->win_info[i].color_saturation_weight & 0x3F) << 1);
+ pInStr->St2094_40sei[29] = val;
+ }
+ }
+
+ if (debug_level >= 5)
+ mfc_print_hdr_plus_info(ctx, sei_meta);
}
static int __mfc_nal_q_run_in_buf_enc(struct mfc_ctx *ctx, EncoderInputStr *pInStr)
{
struct mfc_dev *dev = ctx->dev;
+ struct mfc_enc *enc = ctx->enc_priv;
struct mfc_buf *src_mb, *dst_mb;
struct mfc_raw_info *raw = NULL;
+ struct hdr10_plus_meta dst_sei_meta, *src_sei_meta;
dma_addr_t src_addr[3] = {0, 0, 0};
dma_addr_t addr_2bit[2] = {0, 0};
unsigned int index, i;
}
}
+ /* HDR10+ sei meta */
+ index = src_mb->vb.vb2_buf.index;
+ if (MFC_FEATURE_SUPPORT(dev, dev->pdata->hdr10_plus)) {
+ if (enc->sh_handle_hdr.fd == -1) {
+ mfc_debug(3, "[NALQ][HDR+] there is no handle for SEI meta\n");
+ } else {
+ src_sei_meta = (struct hdr10_plus_meta *)enc->sh_handle_hdr.vaddr + index;
+ if (src_sei_meta->valid) {
+ mfc_debug(3, "[NALQ][HDR+] there is valid SEI meta data in buf[%d]\n",
+ index);
+ memcpy(&dst_sei_meta, src_sei_meta, sizeof(struct hdr10_plus_meta));
+ __mfc_nal_q_set_hdr_plus_info(ctx, pInStr, &dst_sei_meta);
+ }
+ }
+ }
+
/* move dst_queue -> dst_queue_nal_q */
dst_mb = mfc_get_move_buf(&ctx->buf_queue_lock,
&ctx->dst_buf_nal_queue, &ctx->dst_buf_queue, MFC_BUF_SET_USED, MFC_QUEUE_ADD_BOTTOM);
pix_val, mem_type_10bit, reg);
}
-void mfc_print_dec_hdr_plus_info(struct mfc_ctx *ctx, int index)
+void mfc_print_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta)
{
struct mfc_dev *dev = ctx->dev;
- struct mfc_dec *dec = ctx->dec_priv;
- struct hdr10_plus_meta *sei_meta;
int num_distribution;
int i, j;
- sei_meta = &dec->hdr10_plus_info[index];
+ if (ctx->type == MFCINST_DECODER)
+ mfc_debug(5, "[HDR+] ================= Decoder metadata =================\n");
+ else
+ mfc_debug(5, "[HDR+] ================= Encoder metadata =================\n");
- mfc_debug(5, "[HDR+] ================================================================\n");
mfc_debug(5, "[HDR+] valid: %#x\n", sei_meta->valid);
mfc_debug(5, "[HDR+] itu t35 country_code: %#x, provider_code %#x, oriented_code: %#x\n",
sei_meta->t35_country_code, sei_meta->t35_terminal_provider_code,
if (dev->nal_q_handle->nal_q_state == NAL_Q_STATE_STARTED)
return;
- print_hex_dump(KERN_ERR, "[HDR+] ", DUMP_PREFIX_ADDRESS, 32, 4,
- dev->regs_base + MFC_REG_D_ST_2094_40_SEI_0, 0x78, false);
+ if (ctx->type == MFCINST_DECODER)
+ print_hex_dump(KERN_ERR, "[HDR+] ", DUMP_PREFIX_ADDRESS, 32, 4,
+ dev->regs_base + MFC_REG_D_ST_2094_40_SEI_0, 0x78, false);
+ else
+ print_hex_dump(KERN_ERR, "[HDR+] ", DUMP_PREFIX_ADDRESS, 32, 4,
+ dev->regs_base + MFC_REG_E_ST_2094_40_SEI_0, 0x78, false);
}
void mfc_get_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta)
}
if (debug_level >= 5)
- mfc_print_dec_hdr_plus_info(ctx, index);
+ mfc_print_hdr_plus_info(ctx, sei_meta);
+}
+
+void mfc_set_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta)
+{
+ struct mfc_dev *dev = ctx->dev;
+ unsigned int reg = 0;
+ int num_win, num_distribution;
+ int i, j;
+
+ reg = MFC_READL(MFC_REG_E_HEVC_NAL_CONTROL);
+ reg &= ~(0x1 << 6);
+ reg |= ((sei_meta->valid & 0x1) << 6);
+ MFC_WRITEL(reg, MFC_REG_E_HEVC_NAL_CONTROL);
+
+ /* iru_t_t35 */
+ reg = 0;
+ reg |= (sei_meta->t35_country_code & 0xFF);
+ reg |= ((sei_meta->t35_terminal_provider_code & 0xFF) << 8);
+ reg |= (((sei_meta->t35_terminal_provider_oriented_code >> 8) & 0xFF) << 24);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_0);
+
+ /* window information */
+ num_win = (sei_meta->num_windows & 0x3);
+ if (!num_win || (num_win > dev->pdata->max_hdr_win)) {
+ mfc_debug(3, "[HDR+] num_window is only supported till %d\n",
+ dev->pdata->max_hdr_win);
+ num_win = dev->pdata->max_hdr_win;
+ sei_meta->num_windows = num_win;
+ }
+
+ /* application */
+ reg = 0;
+ reg |= (sei_meta->t35_terminal_provider_oriented_code & 0xFF);
+ reg |= ((sei_meta->application_identifier & 0xFF) << 8);
+ reg |= ((sei_meta->application_version & 0xFF) << 16);
+ reg |= ((sei_meta->num_windows & 0x3) << 24);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_1);
+
+ /* luminance */
+ reg = 0;
+ reg |= (sei_meta->target_maximum_luminance & 0x7FFFFFF);
+ reg |= ((sei_meta->target_actual_peak_luminance_flag & 0x1) << 27);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_2);
+
+ /* per window setting */
+ for (i = 0; i < num_win; i++) {
+ /* scl */
+ for (j = 0; j < HDR_MAX_SCL; j++) {
+ reg = (sei_meta->win_info[i].maxscl[j] & 0x1FFFF);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_3 + (4 * j));
+ }
+
+ /* distribution */
+ reg = 0;
+ reg |= (sei_meta->win_info[i].average_maxrgb & 0x1FFFF);
+ reg |= ((sei_meta->win_info[i].num_distribution_maxrgb_percentiles & 0xF) << 17);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_6);
+ num_distribution = (sei_meta->win_info[i].num_distribution_maxrgb_percentiles & 0xF);
+ for (j = 0; j < num_distribution; j++) {
+ reg = 0;
+ reg |= (sei_meta->win_info[i].distribution_maxrgb_percentages[j] & 0x7F);
+ reg |= ((sei_meta->win_info[i].distribution_maxrgb_percentiles[j] & 0x1FFFF) << 7);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_7 + (4 * j));
+ }
+
+ /* bright pixels, luminance */
+ reg = 0;
+ reg |= (sei_meta->win_info[i].fraction_bright_pixels & 0x3FF);
+ reg |= ((sei_meta->mastering_actual_peak_luminance_flag & 0x1) << 10);
+
+ /* tone mapping */
+ reg |= ((sei_meta->win_info[i].tone_mapping_flag & 0x1) << 11);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_22);
+ if (sei_meta->win_info[i].tone_mapping_flag & 0x1) {
+ reg = 0;
+ reg |= (sei_meta->win_info[i].knee_point_x & 0xFFF);
+ reg |= ((sei_meta->win_info[i].knee_point_y & 0xFFF) << 12);
+ reg |= ((sei_meta->win_info[i].num_bezier_curve_anchors & 0xF) << 24);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_23);
+ for (j = 0; j < HDR_MAX_BEZIER_CURVES / 3; j++) {
+ reg = 0;
+ reg |= (sei_meta->win_info[i].bezier_curve_anchors[j * 3] & 0x3FF);
+ reg |= ((sei_meta->win_info[i].bezier_curve_anchors[j * 3 + 1] & 0x3FF) << 10);
+ reg |= ((sei_meta->win_info[i].bezier_curve_anchors[j * 3 + 2] & 0x3FF) << 20);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_24 + (4 * j));
+ }
+
+ }
+
+ /* color saturation */
+ if (sei_meta->win_info[i].color_saturation_mapping_flag & 0x1) {
+ reg = 0;
+ reg |= (sei_meta->win_info[i].color_saturation_mapping_flag & 0x1);
+ reg |= ((sei_meta->win_info[i].color_saturation_weight & 0x3F) << 1);
+ MFC_WRITEL(reg, MFC_REG_E_ST_2094_40_SEI_29);
+ }
+ }
+
+ if (debug_level >= 5)
+ mfc_print_hdr_plus_info(ctx, sei_meta);
}
void mfc_set_pixel_format(struct mfc_dev *dev, unsigned int format);
-void mfc_print_dec_hdr_plus_info(struct mfc_ctx *ctx, int index);
+void mfc_print_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta);
void mfc_get_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta);
+void mfc_set_hdr_plus_info(struct mfc_ctx *ctx, struct hdr10_plus_meta *sei_meta);
#endif /* __MFC_REG_API_H */
#define MFC_REG_E_MASTERING_DISPLAY_COLOUR_VOLUME_SEI_4 0xFE0C
#define MFC_REG_E_MASTERING_DISPLAY_COLOUR_VOLUME_SEI_5 0xFE10
+#define MFC_REG_E_ST_2094_40_SEI_0 0xFE14
+#define MFC_REG_E_ST_2094_40_SEI_1 0xFE18
+#define MFC_REG_E_ST_2094_40_SEI_2 0xFE1C
+#define MFC_REG_E_ST_2094_40_SEI_3 0xFE20
+#define MFC_REG_E_ST_2094_40_SEI_4 0xFE24
+#define MFC_REG_E_ST_2094_40_SEI_5 0xFE28
+#define MFC_REG_E_ST_2094_40_SEI_6 0xFE2C
+#define MFC_REG_E_ST_2094_40_SEI_7 0xFE30
+#define MFC_REG_E_ST_2094_40_SEI_8 0xFE34
+#define MFC_REG_E_ST_2094_40_SEI_9 0xFE38
+#define MFC_REG_E_ST_2094_40_SEI_10 0xFE3C
+#define MFC_REG_E_ST_2094_40_SEI_11 0xFE40
+#define MFC_REG_E_ST_2094_40_SEI_12 0xFE44
+#define MFC_REG_E_ST_2094_40_SEI_13 0xFE48
+#define MFC_REG_E_ST_2094_40_SEI_14 0xFE4C
+#define MFC_REG_E_ST_2094_40_SEI_15 0xFE50
+#define MFC_REG_E_ST_2094_40_SEI_16 0xFE54
+#define MFC_REG_E_ST_2094_40_SEI_17 0xFE58
+#define MFC_REG_E_ST_2094_40_SEI_18 0xFE5C
+#define MFC_REG_E_ST_2094_40_SEI_19 0xFE60
+#define MFC_REG_E_ST_2094_40_SEI_20 0xFE64
+#define MFC_REG_E_ST_2094_40_SEI_21 0xFE68
+#define MFC_REG_E_ST_2094_40_SEI_22 0xFE6C
+#define MFC_REG_E_ST_2094_40_SEI_23 0xFE70
+#define MFC_REG_E_ST_2094_40_SEI_24 0xFE74
+#define MFC_REG_E_ST_2094_40_SEI_25 0xFE78
+#define MFC_REG_E_ST_2094_40_SEI_26 0xFE7C
+#define MFC_REG_E_ST_2094_40_SEI_27 0xFE80
+#define MFC_REG_E_ST_2094_40_SEI_28 0xFE84
+#define MFC_REG_E_ST_2094_40_SEI_29 0xFE88
+
#define MFC_REG_D_ST_2094_40_SEI_0 0xFF00
#define MFC_REG_D_ST_2094_40_SEI_1 0xFF04
#define MFC_REG_D_ST_2094_40_SEI_2 0xFF08
int mfc_run_enc_frame(struct mfc_ctx *ctx)
{
+ struct mfc_dev *dev = ctx->dev;
+ struct mfc_enc *enc = ctx->enc_priv;
struct mfc_buf *dst_mb;
struct mfc_buf *src_mb;
struct mfc_raw_info *raw;
+ struct hdr10_plus_meta dst_sei_meta, *src_sei_meta;
unsigned int index, i;
int last_frame = 0;
mfc_set_enc_frame_buffer(ctx, src_mb, raw->num_planes);
+ /* HDR10+ sei meta */
+ if (MFC_FEATURE_SUPPORT(dev, dev->pdata->hdr10_plus)) {
+ if (enc->sh_handle_hdr.fd == -1) {
+ mfc_debug(3, "[HDR+] there is no handle for SEI meta\n");
+ } else {
+ src_sei_meta = (struct hdr10_plus_meta *)enc->sh_handle_hdr.vaddr + index;
+ if (src_sei_meta->valid) {
+ mfc_debug(3, "[HDR+] there is valid SEI meta data in buf[%d]\n",
+ index);
+ memcpy(&dst_sei_meta, src_sei_meta, sizeof(struct hdr10_plus_meta));
+ mfc_set_hdr_plus_info(ctx, &dst_sei_meta);
+ }
+ }
+ }
+
dst_mb = mfc_get_buf(&ctx->buf_queue_lock, &ctx->dst_buf_queue, MFC_BUF_SET_USED);
if (!dst_mb) {
mfc_debug(2, "no dst buffers\n");
projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / commitdiff