writel(val, adc->mfd_tscadc->tscadc_base + reg);
}
+static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
+{
+ u32 step_en;
+
+ step_en = ((1 << adc_dev->channels) - 1);
+ step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
+ return step_en;
+}
+
static void tiadc_step_config(struct tiadc_device *adc_dev)
{
unsigned int stepconfig;
int i, channels = 0, steps;
+ u32 step_en;
/*
* There are 16 configurable steps and 8 analog input
STEPCONFIG_OPENDLY);
channels++;
}
- tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
+ step_en = get_adc_step_mask(adc_dev);
+ am335x_tsc_se_set(adc_dev->mfd_tscadc, step_en);
}
static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
if (i == chan->channel)
*val = readx1 & 0xfff;
}
- tiadc_writel(adc_dev, REG_SE, STPENB_STEPENB);
+ am335x_tsc_se_update(adc_dev->mfd_tscadc);
return IIO_VAL_INT;
}
static int tiadc_remove(struct platform_device *pdev)
{
struct iio_dev *indio_dev = platform_get_drvdata(pdev);
+ struct tiadc_device *adc_dev = iio_priv(indio_dev);
+ u32 step_en;
iio_device_unregister(indio_dev);
tiadc_channels_remove(indio_dev);
+ step_en = get_adc_step_mask(adc_dev);
+ am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
+
iio_device_free(indio_dev);
return 0;
static void titsc_step_config(struct titsc *ts_dev)
{
unsigned int config;
+ unsigned int stepenable = 0;
int i, total_steps;
/* Configure the Step registers */
titsc_writel(ts_dev, REG_STEPDELAY(total_steps + 2),
STEPCONFIG_OPENDLY);
- titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC);
+ /* The steps1 … end and bit 0 for TS_Charge */
+ stepenable = (1 << (total_steps + 2)) - 1;
+ am335x_tsc_se_set(ts_dev->mfd_tscadc, stepenable);
}
static void titsc_read_coordinates(struct titsc *ts_dev,
titsc_writel(ts_dev, REG_IRQSTATUS, irqclr);
- titsc_writel(ts_dev, REG_SE, STPENB_STEPENB_TC);
+ am335x_tsc_se_update(ts_dev->mfd_tscadc);
return IRQ_HANDLED;
}
free_irq(ts_dev->irq, ts_dev);
+ /* total steps followed by the enable mask */
+ steps = 2 * ts_dev->steps_to_configure + 2;
+ steps = (1 << steps) - 1;
+ am335x_tsc_se_clr(ts_dev->mfd_tscadc, steps);
+
input_unregister_device(ts_dev->input);
platform_set_drvdata(pdev, NULL);
.val_bits = 32,
};
+void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc)
+{
+ tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache);
+}
+EXPORT_SYMBOL_GPL(am335x_tsc_se_update);
+
+void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val)
+{
+ spin_lock(&tsadc->reg_lock);
+ tsadc->reg_se_cache |= val;
+ spin_unlock(&tsadc->reg_lock);
+
+ am335x_tsc_se_update(tsadc);
+}
+EXPORT_SYMBOL_GPL(am335x_tsc_se_set);
+
+void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val)
+{
+ spin_lock(&tsadc->reg_lock);
+ tsadc->reg_se_cache &= ~val;
+ spin_unlock(&tsadc->reg_lock);
+
+ am335x_tsc_se_update(tsadc);
+}
+EXPORT_SYMBOL_GPL(am335x_tsc_se_clr);
+
static void tscadc_idle_config(struct ti_tscadc_dev *config)
{
unsigned int idleconfig;
goto ret;
}
+ spin_lock_init(&tscadc->reg_lock);
pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);
CNTRLREG_STEPID | CNTRLREG_4WIRE;
tscadc_writel(tscadc_dev, REG_CTRL, ctrl);
tscadc_idle_config(tscadc_dev);
- tscadc_writel(tscadc_dev, REG_SE, STPENB_STEPENB);
+ am335x_tsc_se_update(tscadc_dev);
restore = tscadc_readl(tscadc_dev, REG_CTRL);
tscadc_writel(tscadc_dev, REG_CTRL,
(restore | CNTRLREG_TSCSSENB));
/* Step Enable */
#define STEPENB_MASK (0x1FFFF << 0)
#define STEPENB(val) ((val) << 0)
-#define STPENB_STEPENB STEPENB(0x1FFFF)
-#define STPENB_STEPENB_TC STEPENB(0x1FFF)
/* IRQ enable */
#define IRQENB_HW_PEN BIT(0)
void __iomem *tscadc_base;
int irq;
struct mfd_cell cells[TSCADC_CELLS];
+ u32 reg_se_cache;
+ spinlock_t reg_lock;
/* tsc device */
struct titsc *tsc;
return *tscadc_dev;
}
+void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc);
+void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val);
+void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val);
+
#endif