Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding
authorThor Thayer <tthayer@opensource.altera.com>
Thu, 31 Mar 2016 18:48:04 +0000 (13:48 -0500)
committerBorislav Petkov <bp@suse.de>
Sat, 2 Apr 2016 11:49:07 +0000 (13:49 +0200)
Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1459450087-24792-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt

index 37ff9bfea5f41b1f8a7e9bd2a13630c6c04a89c3..5a6b16070a33c8d42c8e8e264665fb363aaa224e 100644 (file)
@@ -71,6 +71,11 @@ Required Properties:
 - compatible : Should be "altr,socfpga-a10-l2-ecc"
 - reg : Address and size for ECC error interrupt clear registers.
 
+On-Chip RAM ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-a10-ocram-ecc"
+- reg        : Address and size for ECC block registers.
+
 Example:
 
        eccmgr: eccmgr@ffd06000 {
@@ -86,4 +91,9 @@ Example:
                        compatible = "altr,socfpga-a10-l2-ecc";
                        reg = <0xffd06010 0x4>;
                };
+
+               ocram-ecc@ff8c3000 {
+                       compatible = "altr,socfpga-a10-ocram-ecc";
+                       reg = <0xff8c3000 0x90>;
+               };
        };