Merge branch 'imx/imx6q' into next/soc
authorArnd Bergmann <arnd@arndb.de>
Wed, 2 Nov 2011 01:46:55 +0000 (02:46 +0100)
committerArnd Bergmann <arnd@arndb.de>
Wed, 2 Nov 2011 01:46:55 +0000 (02:46 +0100)
Conflicts:
Documentation/devicetree/bindings/arm/fsl.txt
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/plat-mxc/include/mach/common.h

1  2 
Documentation/devicetree/bindings/arm/fsl.txt
MAINTAINERS
arch/arm/Kconfig
arch/arm/Kconfig.debug
arch/arm/Makefile
arch/arm/mm/Kconfig
arch/arm/plat-mxc/include/mach/common.h

index e2401cd632abf991af6ed3723cb4b4fab58f2f16,345bfc036561baf3f5130c541ccae035bf93038e..c9848ad0e2e3c65967d5c047284a399987b32f33
@@@ -1,19 -1,6 +1,26 @@@
+ Freescale i.MX Platforms Device Tree Bindings
+ -----------------------------------------------
 +i.MX51 Babbage Board
 +Required root node properties:
 +    - compatible = "fsl,imx51-babbage", "fsl,imx51";
 +
 +i.MX53 Automotive Reference Design Board
 +Required root node properties:
 +    - compatible = "fsl,imx53-ard", "fsl,imx53";
 +
 +i.MX53 Evaluation Kit
 +Required root node properties:
 +    - compatible = "fsl,imx53-evk", "fsl,imx53";
 +
 +i.MX53 Quick Start Board
 +Required root node properties:
 +    - compatible = "fsl,imx53-qsb", "fsl,imx53";
 +
 +i.MX53 Smart Mobile Reference Design Board
 +Required root node properties:
 +    - compatible = "fsl,imx53-smd", "fsl,imx53";
++
+ i.MX6 Quad SABRE Automotive Board
+ Required root node properties:
+     - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
diff --cc MAINTAINERS
Simple merge
index 4fe1db171464a6f145f07b0fb4cbaf82d0c91aa2,18400a7b6ca1e932de1506a69c7c407352297b08..f41fe7a40019b4f59b4d80aac85fa0e867cb4129
@@@ -1435,7 -1402,7 +1435,7 @@@ config SM
        depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
                 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
                 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
-                ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK
 -               ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || SOC_IMX6Q
++               ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q
        select USE_GENERIC_SMP_HELPERS
        select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
        help
index 4bb7eb90f0706797f84b47dd442ebedf4295887e,a1cb48497312393b7c1156b7390f4cc0eaa16b95..c865b927136464568904dee22f05ca586e11dced
@@@ -128,13 -128,118 +128,125 @@@ choic
                  Say Y here if you want the debug print routines to direct
                  their output to the second serial port on these devices.
  
 +      config DEBUG_HIGHBANK_UART
 +              bool "Kernel low-level debugging messages via Highbank UART"
 +              depends on ARCH_HIGHBANK
 +              help
 +                Say Y here if you want the debug print routines to direct
 +                their output to the UART on Highbank based devices.
 +
+       config DEBUG_IMX1_UART
+               bool "i.MX1 Debug UART"
+               depends on SOC_IMX1
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX1.
+       config DEBUG_IMX23_UART
+               bool "i.MX23 Debug UART"
+               depends on SOC_IMX23
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX23.
+       config DEBUG_IMX25_UART
+               bool "i.MX25 Debug UART"
+               depends on SOC_IMX25
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX25.
+       config DEBUG_IMX21_IMX27_UART
+               bool "i.MX21 and i.MX27 Debug UART"
+               depends on SOC_IMX21 || SOC_IMX27
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX21 or i.MX27.
+       config DEBUG_IMX28_UART
+               bool "i.MX28 Debug UART"
+               depends on SOC_IMX28
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX28.
+       config DEBUG_IMX31_IMX35_UART
+               bool "i.MX31 and i.MX35 Debug UART"
+               depends on SOC_IMX31 || SOC_IMX35
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX31 or i.MX35.
+       config DEBUG_IMX51_UART
+               bool "i.MX51 Debug UART"
+               depends on SOC_IMX51
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX51.
+       config DEBUG_IMX50_IMX53_UART
+               bool "i.MX50 and i.MX53 Debug UART"
+               depends on SOC_IMX50 || SOC_IMX53
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX50 or i.MX53.
+       config DEBUG_IMX6Q_UART
+               bool "i.MX6Q Debug UART"
+               depends on SOC_IMX6Q
+               help
+                 Say Y here if you want kernel low-level debugging support
+                 on i.MX6Q.
+       config DEBUG_S3C_UART0
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 0 for low-level debug"
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to UART 0. The port must have been initialised
+                 by the boot-loader before use.
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+       config DEBUG_S3C_UART1
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 1 for low-level debug"
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to UART 1. The port must have been initialised
+                 by the boot-loader before use.
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+       config DEBUG_S3C_UART2
+               depends on PLAT_SAMSUNG
+               bool "Use S3C UART 2 for low-level debug"
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to UART 2. The port must have been initialised
+                 by the boot-loader before use.
+                 The uncompressor code port configuration is now handled
+                 by CONFIG_S3C_LOWLEVEL_UART_PORT.
+       config DEBUG_REALVIEW_STD_PORT
+               bool "RealView Default UART"
+               depends on ARCH_REALVIEW
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the serial port on RealView EB, PB11MP, PBA8
+                 and PBX platforms.
+       config DEBUG_REALVIEW_PB1176_PORT
+               bool "RealView PB1176 UART"
+               depends on MACH_REALVIEW_PB1176
+               help
+                 Say Y here if you want the debug print routines to direct
+                 their output to the standard serial port on the RealView
+                 PB1176 platform.
  endchoice
  
  config EARLY_PRINTK
Simple merge
index 7d5fff7b36322ef5b8b1ff49a62737c27ec6835b,9ab5be07061a21dd6f67d7f476c3cec2c314774a..67f75a0b66d640c4ffdd44b74fc2ac37e8b0063d
@@@ -819,10 -819,10 +819,10 @@@ config CACHE_FEROCEON_L2_WRITETHROUG
  config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
-                  REALVIEW_EB_A9MP || SOC_IMX35 || SOC_IMX31 || MACH_REALVIEW_PBX || \
+                  REALVIEW_EB_A9MP || ARCH_IMX_V6_V7 || MACH_REALVIEW_PBX || \
                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_EXYNOS4 || ARCH_TEGRA || \
                   ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE || \
 -                 ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX
 +                 ARCH_PRIMA2 || ARCH_ZYNQ || ARCH_CNS3XXX || ARCH_HIGHBANK
        default y
        select OUTER_CACHE
        select OUTER_CACHE_SYNC
index c850af3650ea5754ab0c6653a9d1cd1e2893c852,6a7d993a17a695075862f50ccf9b81179d943173..83b745a5e1b724e92ee87be633dc15b00edab968
@@@ -64,8 -65,7 +65,9 @@@ extern int mx51_clocks_init(unsigned lo
                        unsigned long ckih1, unsigned long ckih2);
  extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
                        unsigned long ckih1, unsigned long ckih2);
 +extern int mx51_clocks_init_dt(void);
 +extern int mx53_clocks_init_dt(void);
+ extern int mx6q_clocks_init(void);
  extern struct platform_device *mxc_register_gpio(char *name, int id,
        resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
  extern void mxc_set_cpu_type(unsigned int type);
@@@ -98,10 -99,31 +101,36 @@@ void gic_handle_irq(struct pt_regs *)
  #define imx50_handle_irq tzic_handle_irq
  #define imx51_handle_irq tzic_handle_irq
  #define imx53_handle_irq tzic_handle_irq
+ #define imx6q_handle_irq gic_handle_irq
  
+ extern void imx_enable_cpu(int cpu, bool enable);
+ extern void imx_set_cpu_jump(int cpu, void *jump_addr);
+ #ifdef CONFIG_DEBUG_LL
+ extern void imx_lluart_map_io(void);
+ #else
+ static inline void imx_lluart_map_io(void) {}
+ #endif
+ extern void v7_cpu_resume(void);
+ extern u32 *pl310_get_save_ptr(void);
+ #ifdef CONFIG_SMP
+ extern void v7_secondary_startup(void);
+ extern void imx_scu_map_io(void);
+ extern void imx_smp_prepare(void);
+ #else
+ static inline void imx_scu_map_io(void) {}
+ static inline void imx_smp_prepare(void) {}
+ #endif
+ extern void imx_enable_cpu(int cpu, bool enable);
+ extern void imx_set_cpu_jump(int cpu, void *jump_addr);
+ extern void imx_src_init(void);
+ extern void imx_gpc_init(void);
+ extern void imx_gpc_pre_suspend(void);
+ extern void imx_gpc_post_resume(void);
 +extern void imx51_babbage_common_init(void);
 +extern void imx53_ard_common_init(void);
 +extern void imx53_evk_common_init(void);
 +extern void imx53_qsb_common_init(void);
 +extern void imx53_smd_common_init(void);
+ extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
+ extern void imx6q_pm_init(void);
  #endif