dmaengine: ioatdma: add Broadwell EP ioatdma PCI dev IDs

Adding the Broadwell Xeon ioatdma PCI device IDs and
related bits. This is still IOATDMA 3.2 based hw.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/ioat/hw.h b/drivers/dma/ioat/hw.h
index ec64aced5655acf59c660e15f58e6e994d3041fd..690e3b4f820227b58fec58546b8cf5496207461f 100644 (file)
--- a/drivers/dma/ioat/hw.h
+++ b/drivers/dma/ioat/hw.h
@@ -53,6 +53,17 @@
 #define PCI_DEVICE_ID_INTEL_IOAT_BDXDE2        0x6f52
 #define PCI_DEVICE_ID_INTEL_IOAT_BDXDE3        0x6f53
 
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX0  0x6f20
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX1  0x6f21
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX2  0x6f22
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX3  0x6f23
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX4  0x6f24
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX5  0x6f25
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX6  0x6f26
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX7  0x6f27
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX8  0x6f2e
+#define PCI_DEVICE_ID_INTEL_IOAT_BDX9  0x6f2f
+
 #define IOAT_VER_1_2            0x12    /* Version 1.2 */
 #define IOAT_VER_2_0            0x20    /* Version 2.0 */
 #define IOAT_VER_3_0            0x30    /* Version 3.0 */

diff --git a/drivers/dma/ioat/init.c b/drivers/dma/ioat/init.c
index 60a7c3211e0d466fc24edcb0efbb10767722fadb..1c3c9b0abf4e9bfde2dacd0b5e1086b3036afc4e 100644 (file)
--- a/drivers/dma/ioat/init.c
+++ b/drivers/dma/ioat/init.c
@@ -93,6 +93,17 @@ static struct pci_device_id ioat_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW8) },
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW9) },
 
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX0) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX1) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX2) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX3) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX4) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX5) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX6) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX7) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX8) },
+       { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX9) },
+
        /* I/OAT v3.3 platforms */
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD0) },
        { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD1) },
@@ -219,10 +230,29 @@ static bool is_hsw_ioat(struct pci_dev *pdev)
 
 }
 
+static bool is_bdx_ioat(struct pci_dev *pdev)
+{
+       switch (pdev->device) {
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX0:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX1:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX2:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX3:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX4:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX5:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX6:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX7:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX8:
+       case PCI_DEVICE_ID_INTEL_IOAT_BDX9:
+               return true;
+       default:
+               return false;
+       }
+}
+
 static bool is_xeon_cb32(struct pci_dev *pdev)
 {
        return is_jf_ioat(pdev) || is_snb_ioat(pdev) || is_ivb_ioat(pdev) ||
-               is_hsw_ioat(pdev);
+               is_hsw_ioat(pdev) || is_bdx_ioat(pdev);
 }
 
 bool is_bwd_ioat(struct pci_dev *pdev)