clk: imx7d: add ADC root clock
authorHaibo Chen <haibo.chen@freescale.com>
Thu, 8 Oct 2015 10:59:06 +0000 (18:59 +0800)
committerShawn Guo <shawnguo@kernel.org>
Fri, 9 Oct 2015 03:01:50 +0000 (11:01 +0800)
Add ADC root clock support in imx7d clock tree.

Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx7d.c
include/dt-bindings/clock/imx7d-clock.h

index f86b6804987292efea98ac4e4012fb0e0f470c35..448ef321948b1c1d5e0b4c614b9875728b133d58 100644 (file)
@@ -829,6 +829,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        clks[IMX7D_CSI_MCLK_ROOT_CLK] = imx_clk_gate2("csi_mclk_root_clk", "csi_mclk_post_div", base + 0x4490, 0);
        clks[IMX7D_AUDIO_MCLK_ROOT_CLK] = imx_clk_gate2("audio_mclk_root_clk", "audio_mclk_post_div", base + 0x4790, 0);
        clks[IMX7D_WRCLK_ROOT_CLK] = imx_clk_gate2("wrclk_root_clk", "wrclk_post_div", base + 0x47a0, 0);
+       clks[IMX7D_ADC_ROOT_CLK] = imx_clk_gate2("adc_root_clk", "ipg_root_clk", base + 0x4200, 0);
 
        clks[IMX7D_GPT_3M_CLK] = imx_clk_fixed_factor("gpt_3m", "osc", 1, 8);
 
index 728df28b00d549e6d9a366cd148f09c9b9d65038..a4a7a9ce345737fc39e0f55f5b850b34dc828ce1 100644 (file)
 #define IMX7D_MU_ROOT_CLK              433
 #define IMX7D_SEMA4_HS_ROOT_CLK                434
 #define IMX7D_PLL_DRAM_TEST_DIV                435
-#define IMX7D_CLK_END                  436
+#define IMX7D_ADC_ROOT_CLK             436
+#define IMX7D_CLK_END                  437
 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */