MIPS: ath79: Add initial support for the Atheros AP81 reference board
authorGabor Juhos <juhosg@openwrt.org>
Tue, 4 Jan 2011 20:28:28 +0000 (21:28 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 18 Jan 2011 18:30:27 +0000 (19:30 +0100)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1952/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/ath79/Kconfig
arch/mips/ath79/Makefile
arch/mips/ath79/mach-ap81.c [new file with mode: 0644]
arch/mips/ath79/machtypes.h

index cd6c738a916c422358eee08fcb5923a73055aa5c..2e397708e2f75b47b0d29ad88fdb4bac9a7dc7d2 100644 (file)
@@ -2,6 +2,16 @@ if ATH79
 
 menu "Atheros AR71XX/AR724X/AR913X machine selection"
 
+config ATH79_MACH_AP81
+       bool "Atheros AP81 reference board"
+       select SOC_AR913X
+       select ATH79_DEV_GPIO_BUTTONS
+       select ATH79_DEV_LEDS_GPIO
+       select ATH79_DEV_SPI
+       help
+         Say 'Y' here if you want your kernel to support the
+         Atheros AP81 reference board.
+
 config ATH79_MACH_PB44
        bool "Atheros PB44 reference board"
        select SOC_AR71XX
index 42f4295e650aacc45749236afab2523b2856b261..a245e3645271866d916581d70d0b4e4e34c560af 100644 (file)
@@ -23,4 +23,5 @@ obj-$(CONFIG_ATH79_DEV_SPI)           += dev-spi.o
 #
 # Machines
 #
+obj-$(CONFIG_ATH79_MACH_AP81)          += mach-ap81.o
 obj-$(CONFIG_ATH79_MACH_PB44)          += mach-pb44.o
diff --git a/arch/mips/ath79/mach-ap81.c b/arch/mips/ath79/mach-ap81.c
new file mode 100644 (file)
index 0000000..4e4ccd4
--- /dev/null
@@ -0,0 +1,92 @@
+/*
+ *  Atheros AP81 board support
+ *
+ *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
+#include "machtypes.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-spi.h"
+
+#define AP81_GPIO_LED_STATUS   1
+#define AP81_GPIO_LED_AOSS     3
+#define AP81_GPIO_LED_WLAN     6
+#define AP81_GPIO_LED_POWER    14
+
+#define AP81_GPIO_BTN_SW4      12
+#define AP81_GPIO_BTN_SW1      21
+
+#define AP81_KEYS_POLL_INTERVAL                20      /* msecs */
+#define AP81_KEYS_DEBOUNCE_INTERVAL    (3 * AP81_KEYS_POLL_INTERVAL)
+
+static struct gpio_led ap81_leds_gpio[] __initdata = {
+       {
+               .name           = "ap81:green:status",
+               .gpio           = AP81_GPIO_LED_STATUS,
+               .active_low     = 1,
+       }, {
+               .name           = "ap81:amber:aoss",
+               .gpio           = AP81_GPIO_LED_AOSS,
+               .active_low     = 1,
+       }, {
+               .name           = "ap81:green:wlan",
+               .gpio           = AP81_GPIO_LED_WLAN,
+               .active_low     = 1,
+       }, {
+               .name           = "ap81:green:power",
+               .gpio           = AP81_GPIO_LED_POWER,
+               .active_low     = 1,
+       }
+};
+
+static struct gpio_keys_button ap81_gpio_keys[] __initdata = {
+       {
+               .desc           = "sw1",
+               .type           = EV_KEY,
+               .code           = BTN_0,
+               .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = AP81_GPIO_BTN_SW1,
+               .active_low     = 1,
+       } , {
+               .desc           = "sw4",
+               .type           = EV_KEY,
+               .code           = BTN_1,
+               .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL,
+               .gpio           = AP81_GPIO_BTN_SW4,
+               .active_low     = 1,
+       }
+};
+
+static struct spi_board_info ap81_spi_info[] = {
+       {
+               .bus_num        = 0,
+               .chip_select    = 0,
+               .max_speed_hz   = 25000000,
+               .modalias       = "m25p64",
+       }
+};
+
+static struct ath79_spi_platform_data ap81_spi_data = {
+       .bus_num        = 0,
+       .num_chipselect = 1,
+};
+
+static void __init ap81_setup(void)
+{
+       ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio),
+                                ap81_leds_gpio);
+       ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
+                                       ARRAY_SIZE(ap81_gpio_keys),
+                                       ap81_gpio_keys);
+       ath79_register_spi(&ap81_spi_data, ap81_spi_info,
+                          ARRAY_SIZE(ap81_spi_info));
+}
+
+MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
+            ap81_setup);
index a796fa3f92a35f0d03bdbef7891367faa27db0d3..3940fe470b2dfaf2bbaea81b7f6c1ae928802ea3 100644 (file)
@@ -16,6 +16,7 @@
 
 enum ath79_mach_type {
        ATH79_MACH_GENERIC = 0,
+       ATH79_MACH_AP81,                /* Atheros AP81 reference board */
        ATH79_MACH_PB44,                /* Atheros PB44 reference board */
 };