config PPC_PSERIES
depends on PPC_MULTIPLATFORM && PPC64
bool "IBM pSeries & new (POWER5-based) iSeries"
+ select MPIC
select PPC_I8259
select PPC_RTAS
select RTAS_ERROR_LOGGING
config PPC_CHRP
bool "Common Hardware Reference Platform (CHRP) based machines"
depends on PPC_MULTIPLATFORM && PPC32
+ select MPIC
select PPC_I8259
select PPC_INDIRECT_PCI
select PPC_RTAS
config PPC_PMAC
bool "Apple PowerMac based machines"
depends on PPC_MULTIPLATFORM
+ select MPIC
select PPC_INDIRECT_PCI if PPC32
select PPC_MPC106 if PPC32
default y
config PPC_PMAC64
bool
depends on PPC_PMAC && POWER4
+ select MPIC
select U3_DART
select MPIC_BROKEN_U3
select GENERIC_TBSYNC
config PPC_PREP
bool "PowerPC Reference Platform (PReP) based machines"
depends on PPC_MULTIPLATFORM && PPC32 && BROKEN
+ select MPIC
select PPC_I8259
select PPC_INDIRECT_PCI
select PPC_UDBG_16550
config PPC_MAPLE
depends on PPC_MULTIPLATFORM && PPC64
bool "Maple 970FX Evaluation Board"
+ select MPIC
select U3_DART
select MPIC_BROKEN_U3
select GENERIC_TBSYNC
select UDBG_RTAS_CONSOLE
config UDBG_RTAS_CONSOLE
- bool
+ bool "RTAS based debug console"
+ depends on PPC_RTAS
default n
config XICS
depends on PPC_MULTIPLATFORM && PPC64
default n
- config MPIC
- depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP \
- || MPC7448HPC2
- bool
- default y
-
config PPC_RTAS
bool
default n
depends on PPC64 || POWER4 || 6xx && !CPM2
default y
+ config MPIC
+ bool
+ default n
+
+ config MPIC_WEIRD
+ bool
+ default n
+
config PPC_I8259
bool
default n
#include <linux/radix-tree.h>
#include <linux/mutex.h>
#include <linux/bootmem.h>
+#include <linux/pci.h>
#include <asm/uaccess.h>
#include <asm/system.h>
static LIST_HEAD(irq_hosts);
static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
-
+ static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
+ static unsigned int irq_radix_writer;
struct irq_map_entry irq_map[NR_IRQS];
static unsigned int irq_virq_count = NR_IRQS;
static struct irq_host *irq_default_host;
irq_virq_count = count;
}
+ /* radix tree not lockless safe ! we use a brlock-type mecanism
+ * for now, until we can use a lockless radix tree
+ */
+ static void irq_radix_wrlock(unsigned long *flags)
+ {
+ unsigned int cpu, ok;
+
+ spin_lock_irqsave(&irq_big_lock, *flags);
+ irq_radix_writer = 1;
+ smp_mb();
+ do {
+ barrier();
+ ok = 1;
+ for_each_possible_cpu(cpu) {
+ if (per_cpu(irq_radix_reader, cpu)) {
+ ok = 0;
+ break;
+ }
+ }
+ if (!ok)
+ cpu_relax();
+ } while(!ok);
+ }
+
+ static void irq_radix_wrunlock(unsigned long flags)
+ {
+ smp_wmb();
+ irq_radix_writer = 0;
+ spin_unlock_irqrestore(&irq_big_lock, flags);
+ }
+
+ static void irq_radix_rdlock(unsigned long *flags)
+ {
+ local_irq_save(*flags);
+ __get_cpu_var(irq_radix_reader) = 1;
+ smp_mb();
+ if (likely(irq_radix_writer == 0))
+ return;
+ __get_cpu_var(irq_radix_reader) = 0;
+ smp_wmb();
+ spin_lock(&irq_big_lock);
+ __get_cpu_var(irq_radix_reader) = 1;
+ spin_unlock(&irq_big_lock);
+ }
+
+ static void irq_radix_rdunlock(unsigned long flags)
+ {
+ __get_cpu_var(irq_radix_reader) = 0;
+ local_irq_restore(flags);
+ }
+
+
unsigned int irq_create_mapping(struct irq_host *host,
irq_hw_number_t hwirq)
{
/* Check if radix tree allocated yet */
if (host->revmap_data.tree.gfp_mask == 0)
break;
- /* XXX radix tree not safe ! remove lock whem it becomes safe
- * and use some RCU sync to make sure everything is ok before we
- * can re-use that map entry
- */
- spin_lock_irqsave(&irq_big_lock, flags);
+ irq_radix_wrlock(&flags);
radix_tree_delete(&host->revmap_data.tree, hwirq);
- spin_unlock_irqrestore(&irq_big_lock, flags);
+ irq_radix_wrunlock(flags);
break;
}
if (tree->gfp_mask == 0)
return irq_find_mapping(host, hwirq);
- /* XXX Current radix trees are NOT SMP safe !!! Remove that lock
- * when that is fixed (when Nick's patch gets in
- */
- spin_lock_irqsave(&irq_big_lock, flags);
-
/* Now try to resolve */
+ irq_radix_rdlock(&flags);
ptr = radix_tree_lookup(tree, hwirq);
+ irq_radix_rdunlock(flags);
+
/* Found it, return */
if (ptr) {
virq = ptr - irq_map;
- goto bail;
+ return virq;
}
/* If not there, try to insert it */
virq = irq_find_mapping(host, hwirq);
- if (virq != NO_IRQ)
+ if (virq != NO_IRQ) {
+ irq_radix_wrlock(&flags);
radix_tree_insert(tree, hwirq, &irq_map[virq]);
- bail:
- spin_unlock_irqrestore(&irq_big_lock, flags);
+ irq_radix_wrunlock(flags);
+ }
return virq;
}
struct irq_host *h;
unsigned long flags;
- spin_lock_irqsave(&irq_big_lock, flags);
+ irq_radix_wrlock(&flags);
list_for_each_entry(h, &irq_hosts, link) {
if (h->revmap_type == IRQ_HOST_MAP_TREE)
INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
}
- spin_unlock_irqrestore(&irq_big_lock, flags);
+ irq_radix_wrunlock(flags);
return 0;
}
else
return -1;
}
+EXPORT_SYMBOL(pci_enable_msi);
void pci_disable_msi(struct pci_dev * pdev)
{
if (ppc_md.disable_msi)
ppc_md.disable_msi(pdev);
}
+EXPORT_SYMBOL(pci_disable_msi);
void pci_scan_msi_device(struct pci_dev *dev) {}
int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}
void pci_no_msi(void) {}
+EXPORT_SYMBOL(pci_enable_msix);
+EXPORT_SYMBOL(pci_disable_msix);
#endif
spin_unlock(&hose_spinlock);
}
-static void add_linux_pci_domain(struct device_node *dev,
- struct pci_controller *phb)
-{
- struct property *of_prop;
- unsigned int size;
-
- of_prop = (struct property *)
- get_property(dev, "linux,pci-domain", &size);
- if (of_prop != NULL)
- return;
- WARN_ON(of_prop && size < sizeof(int));
- if (of_prop && size < sizeof(int))
- of_prop = NULL;
- size = sizeof(struct property) + sizeof(int);
- if (of_prop == NULL) {
- if (mem_init_done)
- of_prop = kmalloc(size, GFP_KERNEL);
- else
- of_prop = alloc_bootmem(size);
- }
- memset(of_prop, 0, sizeof(struct property));
- of_prop->name = "linux,pci-domain";
- of_prop->length = sizeof(int);
- of_prop->value = (unsigned char *)&of_prop[1];
- *((int *)of_prop->value) = phb->global_number;
- prom_add_property(dev, of_prop);
-}
-
struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
{
struct pci_controller *phb;
pci_setup_pci_controller(phb);
phb->arch_data = dev;
phb->is_dynamic = mem_init_done;
- if (dev) {
+ if (dev)
PHB_SET_NODE(phb, of_node_to_nid(dev));
- add_linux_pci_domain(dev, phb);
- }
return phb;
}
void pcibios_free_controller(struct pci_controller *phb)
{
- if (phb->arch_data) {
- struct device_node *np = phb->arch_data;
- int *domain = (int *)get_property(np,
- "linux,pci-domain", NULL);
- if (domain)
- *domain = -1;
- }
if (phb->is_dynamic)
kfree(phb);
}
#ifdef CONFIG_PPC_MULTIPLATFORM
static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
{
- u32 *prop;
+ const u32 *prop;
int len;
- prop = (u32 *) get_property(np, name, &len);
+ prop = get_property(np, name, &len);
if (prop && len >= 4)
return *prop;
return def;
u64 base, size;
unsigned int flags;
struct resource *res;
- u32 *addrs, i;
+ const u32 *addrs;
+ u32 i;
int proplen;
- addrs = (u32 *) get_property(node, "assigned-addresses", &proplen);
+ addrs = get_property(node, "assigned-addresses", &proplen);
if (!addrs)
return;
DBG(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
struct pci_bus *bus)
{
struct device_node *child = NULL;
- u32 *reg;
+ const u32 *reg;
int reglen, devfn;
struct pci_dev *dev;
while ((child = of_get_next_child(node, child)) != NULL) {
DBG(" * %s\n", child->full_name);
- reg = (u32 *) get_property(child, "reg", ®len);
+ reg = get_property(child, "reg", ®len);
if (reg == NULL || reglen < 20)
continue;
devfn = (reg[0] >> 8) & 0xff;
struct pci_dev *dev)
{
struct pci_bus *bus;
- u32 *busrange, *ranges;
+ const u32 *busrange, *ranges;
int len, i, mode;
struct resource *res;
unsigned int flags;
DBG("of_scan_pci_bridge(%s)\n", node->full_name);
/* parse bus-range property */
- busrange = (u32 *) get_property(node, "bus-range", &len);
+ busrange = get_property(node, "bus-range", &len);
if (busrange == NULL || len != 8) {
printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
node->full_name);
return;
}
- ranges = (u32 *) get_property(node, "ranges", &len);
+ ranges = get_property(node, "ranges", &len);
if (ranges == NULL) {
printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
node->full_name);
unsigned int size;
};
- struct isa_range *range;
+ const struct isa_range *range;
unsigned long pci_addr;
unsigned int isa_addr;
unsigned int size;
int rlen = 0;
- range = (struct isa_range *) get_property(isa_node, "ranges", &rlen);
+ range = get_property(isa_node, "ranges", &rlen);
if (range == NULL || (rlen < sizeof(struct isa_range))) {
printk(KERN_ERR "no ISA ranges or unexpected isa range size,"
"mapping 64k\n");
void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int prim)
{
- unsigned int *ranges, pci_space;
+ const unsigned int *ranges;
+ unsigned int pci_space;
unsigned long size;
int rlen = 0;
int memno = 0;
* (size depending on dev->n_addr_cells)
* cells 4+5 or 5+6: the size of the range
*/
- ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
+ ranges = get_property(dev, "ranges", &rlen);
if (ranges == NULL)
return;
hose->io_base_phys = 0;
DBG("Try to map irq for %s...\n", pci_name(pci_dev));
+ #ifdef DEBUG
+ memset(&oirq, 0xff, sizeof(oirq));
+ #endif
/* Try to get a mapping from the device-tree */
if (of_irq_map_pci(pci_dev, &oirq)) {
u8 line, pin;
if (virq != NO_IRQ)
set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
} else {
- DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
- oirq.size, oirq.specifier[0], oirq.controller->full_name);
+ DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
+ oirq.size, oirq.specifier[0], oirq.specifier[1],
+ oirq.controller->full_name);
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
oirq.size);
DBG(" -> failed to map !\n");
return -1;
}
+
+ DBG(" -> mapped to linux irq %d\n", virq);
+
pci_dev->irq = virq;
pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq);
5 - 1, /* 5 option vectors */
/* option vector 1: processor architectures supported */
- 3 - 1, /* length */
+ 3 - 2, /* length */
0, /* don't ignore, don't halt */
OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
OV1_PPC_2_04 | OV1_PPC_2_05,
/* option vector 2: Open Firmware options supported */
- 34 - 1, /* length */
+ 34 - 2, /* length */
OV2_REAL_MODE,
0, 0,
W(0xffffffff), /* real_base */
48, /* max log_2(hash table size) */
/* option vector 3: processor options supported */
- 3 - 1, /* length */
+ 3 - 2, /* length */
0, /* don't ignore, don't halt */
OV3_FP | OV3_VMX,
/* option vector 4: IBM PAPR implementation */
- 2 - 1, /* length */
+ 2 - 2, /* length */
0, /* don't halt */
/* option vector 5: PAPR/OF options */
- 3 - 1, /* length */
+ 3 - 2, /* length */
0, /* don't ignore, don't halt */
OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES,
};
#endif
#ifdef CONFIG_PPC_CHRP
-/* Pegasos lacks the "ranges" property in the isa node */
+/* Pegasos and BriQ lacks the "ranges" property in the isa node */
static void __init fixup_device_tree_chrp(void)
{
phandle isa;
u32 isa_ranges[6];
+ u32 rloc = 0x01006000; /* IO space; PCI device = 12 */
char *name;
int rc;
name = "/pci@80000000/isa@c";
isa = call_prom("finddevice", 1, 1, ADDR(name));
+ if (!PHANDLE_VALID(isa)) {
+ name = "/pci@ff500000/isa@6";
+ isa = call_prom("finddevice", 1, 1, ADDR(name));
+ rloc = 0x01003000; /* IO space; PCI device = 6 */
+ }
if (!PHANDLE_VALID(isa))
return;
isa_ranges[0] = 0x1;
isa_ranges[1] = 0x0;
- isa_ranges[2] = 0x01006000;
+ isa_ranges[2] = rloc;
isa_ranges[3] = 0x0;
isa_ranges[4] = 0x0;
isa_ranges[5] = 0x00010000;
/* Debug utility */
#ifdef DEBUG
-static void of_dump_addr(const char *s, u32 *addr, int na)
+static void of_dump_addr(const char *s, const u32 *addr, int na)
{
printk("%s", s);
while(na--)
printk("\n");
}
#else
-static void of_dump_addr(const char *s, u32 *addr, int na) { }
+static void of_dump_addr(const char *s, const u32 *addr, int na) { }
#endif
int (*match)(struct device_node *parent);
void (*count_cells)(struct device_node *child,
int *addrc, int *sizec);
- u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
+ u64 (*map)(u32 *addr, const u32 *range,
+ int na, int ns, int pna);
int (*translate)(u32 *addr, u64 offset, int na);
- unsigned int (*get_flags)(u32 *addr);
+ unsigned int (*get_flags)(const u32 *addr);
};
*sizec = prom_n_size_cells(dev);
}
-static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
+static u64 of_bus_default_map(u32 *addr, const u32 *range,
+ int na, int ns, int pna)
{
u64 cp, s, da;
return 0;
}
-static unsigned int of_bus_default_get_flags(u32 *addr)
+static unsigned int of_bus_default_get_flags(const u32 *addr)
{
return IORESOURCE_MEM;
}
*sizec = 2;
}
-static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
+static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna)
{
u64 cp, s, da;
return of_bus_default_translate(addr + 1, offset, na - 1);
}
-static unsigned int of_bus_pci_get_flags(u32 *addr)
+static unsigned int of_bus_pci_get_flags(const u32 *addr)
{
unsigned int flags = 0;
u32 w = addr[0];
*sizec = 1;
}
-static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
+static u64 of_bus_isa_map(u32 *addr, const u32 *range, int na, int ns, int pna)
{
u64 cp, s, da;
return of_bus_default_translate(addr + 1, offset, na - 1);
}
-static unsigned int of_bus_isa_get_flags(u32 *addr)
+static unsigned int of_bus_isa_get_flags(const u32 *addr)
{
unsigned int flags = 0;
u32 w = addr[0];
struct of_bus *pbus, u32 *addr,
int na, int ns, int pna)
{
- u32 *ranges;
+ const u32 *ranges;
unsigned int rlen;
int rone;
u64 offset = OF_BAD_ADDR;
* to translate addresses that aren't supposed to be translated in
* the first place. --BenH.
*/
- ranges = (u32 *)get_property(parent, "ranges", &rlen);
+ ranges = get_property(parent, "ranges", &rlen);
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
* that can be mapped to a cpu physical address). This is not really specified
* that way, but this is traditionally the way IBM at least do things
*/
-u64 of_translate_address(struct device_node *dev, u32 *in_addr)
+u64 of_translate_address(struct device_node *dev, const u32 *in_addr)
{
struct device_node *parent = NULL;
struct of_bus *bus, *pbus;
}
EXPORT_SYMBOL(of_translate_address);
-u32 *of_get_address(struct device_node *dev, int index, u64 *size,
+const u32 *of_get_address(struct device_node *dev, int index, u64 *size,
unsigned int *flags)
{
- u32 *prop;
+ const u32 *prop;
unsigned int psize;
struct device_node *parent;
struct of_bus *bus;
return NULL;
/* Get "reg" or "assigned-addresses" property */
- prop = (u32 *)get_property(dev, bus->addresses, &psize);
+ prop = get_property(dev, bus->addresses, &psize);
if (prop == NULL)
return NULL;
psize /= 4;
}
EXPORT_SYMBOL(of_get_address);
-u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
+const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
unsigned int *flags)
{
- u32 *prop;
+ const u32 *prop;
unsigned int psize;
struct device_node *parent;
struct of_bus *bus;
return NULL;
/* Get "reg" or "assigned-addresses" property */
- prop = (u32 *)get_property(dev, bus->addresses, &psize);
+ prop = get_property(dev, bus->addresses, &psize);
if (prop == NULL)
return NULL;
psize /= 4;
}
EXPORT_SYMBOL(of_get_pci_address);
-static int __of_address_to_resource(struct device_node *dev, u32 *addrp,
+static int __of_address_to_resource(struct device_node *dev, const u32 *addrp,
u64 size, unsigned int flags,
struct resource *r)
{
int of_address_to_resource(struct device_node *dev, int index,
struct resource *r)
{
- u32 *addrp;
+ const u32 *addrp;
u64 size;
unsigned int flags;
int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r)
{
- u32 *addrp;
+ const u32 *addrp;
u64 size;
unsigned int flags;
}
EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
-void of_parse_dma_window(struct device_node *dn, unsigned char *dma_window_prop,
+void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size)
{
- u32 *dma_window, cells;
- unsigned char *prop;
+ const u32 *dma_window;
+ u32 cells;
+ const unsigned char *prop;
- dma_window = (u32 *)dma_window_prop;
+ dma_window = dma_window_prop;
/* busno is always one cell */
*busno = *(dma_window++);
static struct device_node *of_irq_find_parent(struct device_node *child)
{
struct device_node *p;
- phandle *parp;
+ const phandle *parp;
if (!of_node_get(child))
return NULL;
do {
- parp = (phandle *)get_property(child, "interrupt-parent", NULL);
+ parp = get_property(child, "interrupt-parent", NULL);
if (parp == NULL)
p = of_get_parent(child);
else {
}
- int of_irq_map_raw(struct device_node *parent, const u32 *intspec,
-int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 ointsize,
- u32 *addr, struct of_irq *out_irq)
++int of_irq_map_raw(struct device_node *parent, const u32 *intspec, u32 ointsize,
+ const u32 *addr, struct of_irq *out_irq)
{
struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL;
- u32 *tmp, *imap, *imask;
+ const u32 *tmp, *imap, *imask;
u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0;
int imaplen, match, i;
+ DBG("of_irq_map_raw: par=%s,intspec=[0x%08x 0x%08x...],ointsize=%d\n",
+ parent->full_name, intspec[0], intspec[1], ointsize);
+
ipar = of_node_get(parent);
/* First get the #interrupt-cells property of the current cursor
* is none, we are nice and just walk up the tree
*/
do {
- tmp = (u32 *)get_property(ipar, "#interrupt-cells", NULL);
+ tmp = get_property(ipar, "#interrupt-cells", NULL);
if (tmp != NULL) {
intsize = *tmp;
break;
DBG("of_irq_map_raw: ipar=%s, size=%d\n", ipar->full_name, intsize);
+ if (ointsize != intsize)
+ return -EINVAL;
+
/* Look for this #address-cells. We have to implement the old linux
* trick of looking for the parent here as some device-trees rely on it
*/
old = of_node_get(ipar);
do {
- tmp = (u32 *)get_property(old, "#address-cells", NULL);
+ tmp = get_property(old, "#address-cells", NULL);
tnode = of_get_parent(old);
of_node_put(old);
old = tnode;
}
/* Now look for an interrupt-map */
- imap = (u32 *)get_property(ipar, "interrupt-map", &imaplen);
+ imap = get_property(ipar, "interrupt-map", &imaplen);
/* No interrupt map, check for an interrupt parent */
if (imap == NULL) {
DBG(" -> no map, getting parent\n");
imaplen /= sizeof(u32);
/* Look for a mask */
- imask = (u32 *)get_property(ipar, "interrupt-map-mask", NULL);
+ imask = get_property(ipar, "interrupt-map-mask", NULL);
/* If we were passed no "reg" property and we attempt to parse
* an interrupt-map, then #address-cells must be 0.
/* Get #interrupt-cells and #address-cells of new
* parent
*/
- tmp = (u32 *)get_property(newpar, "#interrupt-cells",
+ tmp = get_property(newpar, "#interrupt-cells",
NULL);
if (tmp == NULL) {
DBG(" -> parent lacks #interrupt-cells !\n");
goto fail;
}
newintsize = *tmp;
- tmp = (u32 *)get_property(newpar, "#address-cells",
+ tmp = get_property(newpar, "#address-cells",
NULL);
newaddrsize = (tmp == NULL) ? 0 : *tmp;
static int of_irq_map_oldworld(struct device_node *device, int index,
struct of_irq *out_irq)
{
- u32 *ints;
+ const u32 *ints;
int intlen;
/*
* Old machines just have a list of interrupt numbers
* and no interrupt-controller nodes.
*/
- ints = (u32 *) get_property(device, "AAPL,interrupts", &intlen);
+ ints = get_property(device, "AAPL,interrupts", &intlen);
if (ints == NULL)
return -EINVAL;
intlen /= sizeof(u32);
int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq)
{
struct device_node *p;
- u32 *intspec, *tmp, intsize, intlen, *addr;
+ const u32 *intspec, *tmp, *addr;
+ u32 intsize, intlen;
int res;
DBG("of_irq_map_one: dev=%s, index=%d\n", device->full_name, index);
return of_irq_map_oldworld(device, index, out_irq);
/* Get the interrupts property */
- intspec = (u32 *)get_property(device, "interrupts", &intlen);
+ intspec = get_property(device, "interrupts", &intlen);
if (intspec == NULL)
return -EINVAL;
intlen /= sizeof(u32);
/* Get the reg property (if any) */
- addr = (u32 *)get_property(device, "reg", NULL);
+ addr = get_property(device, "reg", NULL);
/* Look for the interrupt parent. */
p = of_irq_find_parent(device);
return -EINVAL;
/* Get size of interrupt specifier */
- tmp = (u32 *)get_property(p, "#interrupt-cells", NULL);
+ tmp = get_property(p, "#interrupt-cells", NULL);
if (tmp == NULL) {
of_node_put(p);
return -EINVAL;
}
intsize = *tmp;
+ DBG(" intsize=%d intlen=%d\n", intsize, intlen);
+
/* Check index */
if ((index + 1) * intsize > intlen)
return -EINVAL;
/* Get new specifier and map it */
- res = of_irq_map_raw(p, intspec + index * intsize, addr, out_irq);
+ res = of_irq_map_raw(p, intspec + index * intsize, intsize,
+ addr, out_irq);
of_node_put(p);
return res;
}
laddr[0] = (pdev->bus->number << 16)
| (pdev->devfn << 8);
laddr[1] = laddr[2] = 0;
- return of_irq_map_raw(ppnode, &lspec, laddr, out_irq);
+ return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
}
EXPORT_SYMBOL_GPL(of_irq_map_pci);
#endif /* CONFIG_PCI */
unsigned long ppc_proc_freq;
unsigned long ppc_tb_freq;
- u64 tb_last_jiffy __cacheline_aligned_in_smp;
- unsigned long tb_last_stamp;
-
- /*
- * Note that on ppc32 this only stores the bottom 32 bits of
- * the timebase value, but that's enough to tell when a jiffy
- * has passed.
- */
- DEFINE_PER_CPU(unsigned long, last_jiffy);
+ static u64 tb_last_jiffy __cacheline_aligned_in_smp;
+ static DEFINE_PER_CPU(u64, last_jiffy);
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
/*
do {
seq = read_seqbegin_irqsave(&xtime_lock, flags);
sec = xtime.tv_sec;
- nsec = xtime.tv_nsec + tb_ticks_since(tb_last_stamp);
+ nsec = xtime.tv_nsec + tb_ticks_since(tb_last_jiffy);
} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
usec = nsec / 1000;
while (usec >= 1000000) {
tb_next_jiffy = tb_last_jiffy + tb_ticks_per_jiffy;
if (per_cpu(last_jiffy, cpu) >= tb_next_jiffy) {
tb_last_jiffy = tb_next_jiffy;
- tb_last_stamp = per_cpu(last_jiffy, cpu);
do_timer(regs);
timer_recalc_offset(tb_last_jiffy);
timer_check_rtc();
int i;
unsigned long half = tb_ticks_per_jiffy / 2;
unsigned long offset = tb_ticks_per_jiffy / max_cpus;
- unsigned long previous_tb = per_cpu(last_jiffy, boot_cpuid);
+ u64 previous_tb = per_cpu(last_jiffy, boot_cpuid);
/* make sure tb > per_cpu(last_jiffy, cpu) for all cpus always */
previous_tb -= tb_ticks_per_jiffy;
* and therefore the (jiffies - wall_jiffies) computation
* has been removed.
*/
- tb_delta = tb_ticks_since(tb_last_stamp);
+ tb_delta = tb_ticks_since(tb_last_jiffy);
tb_delta = mulhdu(tb_delta, do_gtod.varp->tb_to_xs); /* in xsec */
new_nsec -= SCALE_XSEC(tb_delta, 1000000000);
static int __init get_freq(char *name, int cells, unsigned long *val)
{
struct device_node *cpu;
- unsigned int *fp;
+ const unsigned int *fp;
int found = 0;
/* The cpu node should have timebase and clock frequency properties */
cpu = of_find_node_by_type(NULL, "cpu");
if (cpu) {
- fp = (unsigned int *)get_property(cpu, name, NULL);
+ fp = get_property(cpu, name, NULL);
if (fp) {
found = 1;
*val = 0;
if (__USE_RTC()) {
/* 601 processor: dec counts down by 128 every 128ns */
ppc_tb_freq = 1000000000;
- tb_last_stamp = get_rtcl();
- tb_last_jiffy = tb_last_stamp;
+ tb_last_jiffy = get_rtcl();
} else {
/* Normal PowerPC with timebase register */
ppc_md.calibrate_decr();
ppc_tb_freq / 1000000, ppc_tb_freq % 1000000);
printk(KERN_DEBUG "time_init: processor frequency = %lu.%.6lu MHz\n",
ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
- tb_last_stamp = tb_last_jiffy = get_tb();
+ tb_last_jiffy = get_tb();
}
tb_ticks_per_jiffy = ppc_tb_freq / HZ;
do_gtod.varp = &do_gtod.vars[0];
do_gtod.var_idx = 0;
do_gtod.varp->tb_orig_stamp = tb_last_jiffy;
- __get_cpu_var(last_jiffy) = tb_last_stamp;
+ __get_cpu_var(last_jiffy) = tb_last_jiffy;
do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC;
do_gtod.tb_ticks_per_sec = tb_ticks_per_sec;
do_gtod.varp->tb_to_xs = tb_to_xs;
unsigned long isa_mem_base = 0;
#endif
- #ifdef CONFIG_PCI
- static int
- mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
- {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */
- {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */
- };
-
- const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- #endif /* CONFIG_PCI */
-
/* ************************************************************************
*
* Setup the architecture
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
- unsigned int *fp =
- (int *)get_property(np, "clock-frequency", NULL);
+ const unsigned int *fp =
+ get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc83xx_map_irq;
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
void __init mpc834x_itx_init_IRQ(void)
{
- u8 senses[8] = {
- 0, /* EXT 0 */
- IRQ_SENSE_LEVEL, /* EXT 1 */
- IRQ_SENSE_LEVEL, /* EXT 2 */
- 0, /* EXT 3 */
- #ifdef CONFIG_PCI
- IRQ_SENSE_LEVEL, /* EXT 4 */
- IRQ_SENSE_LEVEL, /* EXT 5 */
- IRQ_SENSE_LEVEL, /* EXT 6 */
- IRQ_SENSE_LEVEL, /* EXT 7 */
- #else
- 0, /* EXT 4 */
- 0, /* EXT 5 */
- 0, /* EXT 6 */
- 0, /* EXT 7 */
- #endif
- };
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "ipic");
+ if (!np)
+ return;
- ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
+ ipic_init(np, 0);
/* Initialize the default interrupt mapping priorities,
* in case the boot rom changed something on us.
.time_init = mpc83xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
+ #ifdef CONFIG_PCI
+ .pcibios_fixup = mpc83xx_pcibios_fixup,
+ #endif
};
unsigned long isa_mem_base = 0;
#endif
- #ifdef CONFIG_PCI
- static int
- mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
- {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
- {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
- {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
- {0, 0, 0, 0},
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
- {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
- {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
- {0, 0, 0, 0}, /* idsel 0x19 */
- {0, 0, 0, 0}, /* idsel 0x20 */
- };
-
- const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- #endif /* CONFIG_PCI */
-
/* ************************************************************************
*
* Setup the architecture
np = of_find_node_by_type(NULL, "cpu");
if (np != 0) {
- unsigned int *fp =
- (int *)get_property(np, "clock-frequency", NULL);
+ const unsigned int *fp =
+ get_property(np, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc83xx_map_irq;
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
#endif
void __init mpc834x_sys_init_IRQ(void)
{
- u8 senses[8] = {
- 0, /* EXT 0 */
- IRQ_SENSE_LEVEL, /* EXT 1 */
- IRQ_SENSE_LEVEL, /* EXT 2 */
- 0, /* EXT 3 */
- #ifdef CONFIG_PCI
- IRQ_SENSE_LEVEL, /* EXT 4 */
- IRQ_SENSE_LEVEL, /* EXT 5 */
- IRQ_SENSE_LEVEL, /* EXT 6 */
- IRQ_SENSE_LEVEL, /* EXT 7 */
- #else
- 0, /* EXT 4 */
- 0, /* EXT 5 */
- 0, /* EXT 6 */
- 0, /* EXT 7 */
- #endif
- };
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "ipic");
+ if (!np)
+ return;
- ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
+ ipic_init(np, 0);
/* Initialize the default interrupt mapping priorities,
* in case the boot rom changed something on us.
.time_init = mpc83xx_time_init,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
+ #ifdef CONFIG_PCI
+ .pcibios_fixup = mpc83xx_pcibios_fixup,
+ #endif
};
return PCIBIOS_SUCCESSFUL;
}
+ void __init mpc83xx_pcibios_fixup(void)
+ {
+ struct pci_dev *dev = NULL;
+
+ /* map all the PCI irqs */
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+ }
+
int __init add_bridge(struct device_node *dev)
{
int len;
struct pci_controller *hose;
struct resource rsrc;
- int *bus_range;
+ const int *bus_range;
int primary = 1, has_address = 0;
phys_addr_t immr = get_immrbase();
has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
/* Get bus range if any */
- bus_range = (int *)get_property(dev, "bus-range", &len);
+ bus_range = get_property(dev, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
printk(KERN_WARNING "Can't get bus-range for %s, assume"
" bus 0\n", dev->full_name);
{
struct pci_controller *hose;
struct device_node *node;
- unsigned int *interrupt;
+ const unsigned int *interrupt;
int busnr;
int len;
u8 slot;
if (!node)
printk(KERN_ERR "No pci node found\n");
- interrupt = (unsigned int *) get_property(node, "interrupt-map", &len);
+ interrupt = get_property(node, "interrupt-map", &len);
slot = find_slot_by_devfn(interrupt, dev->devfn);
pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
if (pin == 0 || pin > 4)
cpu = of_find_node_by_type(NULL, "cpu");
if (cpu != 0) {
- unsigned int *fp;
+ const unsigned int *fp;
- fp = (int *)get_property(cpu, "clock-frequency", NULL);
+ fp = get_property(cpu, "clock-frequency", NULL);
if (fp != 0)
loops_per_jiffy = *fp / HZ;
else
mpic = mpic_alloc(tsi_pic, mpic_paddr,
MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
- MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108),
+ MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
0, /* num_sources used */
0, /* num_sources used */
"Tsi108_PIC");
int result;
result = -ENOMEM;
- if (spider_net_init_chain(card, &card->tx_chain,
- card->descr,
- PCI_DMA_TODEVICE, tx_descriptors))
+ if (spider_net_init_chain(card, &card->tx_chain, card->descr,
+ PCI_DMA_TODEVICE, card->tx_desc))
goto alloc_tx_failed;
if (spider_net_init_chain(card, &card->rx_chain,
- card->descr + tx_descriptors,
- PCI_DMA_FROMDEVICE, rx_descriptors))
+ card->descr + card->rx_desc,
+ PCI_DMA_FROMDEVICE, card->rx_desc))
goto alloc_rx_failed;
/* allocate rx skbs */
*/
static int
spider_net_download_firmware(struct spider_net_card *card,
- u8 *firmware_ptr)
+ const void *firmware_ptr)
{
int sequencer, i;
- u32 *fw_ptr = (u32 *)firmware_ptr;
+ const u32 *fw_ptr = firmware_ptr;
/* stop sequencers */
spider_net_write_reg(card, SPIDER_NET_GSINIT,
{
struct firmware *firmware = NULL;
struct device_node *dn;
- u8 *fw_prop = NULL;
+ const u8 *fw_prop = NULL;
int err = -ENOENT;
int fw_size;
if (!dn)
goto out_err;
- fw_prop = (u8 *)get_property(dn, "firmware", &fw_size);
+ fw_prop = get_property(dn, "firmware", &fw_size);
if (!fw_prop)
goto out_err;
struct net_device *netdev = card->netdev;
struct device_node *dn;
struct sockaddr addr;
- u8 *mac;
+ const u8 *mac;
SET_MODULE_OWNER(netdev);
SET_NETDEV_DEV(netdev, &card->pdev->dev);
card->options.rx_csum = SPIDER_NET_RX_CSUM_DEFAULT;
+ card->tx_desc = tx_descriptors;
+ card->rx_desc = rx_descriptors;
+
spider_net_setup_netdev_ops(netdev);
netdev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
if (!dn)
return -EIO;
- mac = (u8 *)get_property(dn, "local-mac-address", NULL);
+ mac = get_property(dn, "local-mac-address", NULL);
if (!mac)
return -EIO;
memcpy(addr.sa_data, mac, ETH_ALEN);
static void riva_bl_set_power(struct fb_info *info, int power)
{
+ if (info->bl_dev == NULL)
+ return;
+
mutex_lock(&info->bl_mutex);
up(&info->bl_dev->sem);
info->bl_dev->props->power = power;
bd = backlight_device_register(name, par, &riva_bl_data);
if (IS_ERR(bd)) {
info->bl_dev = NULL;
- printk("riva: Backlight registration failed\n");
+ printk(KERN_WARNING "riva: Backlight registration failed\n");
goto error;
}
NVTRACE_ENTER();
dp = pci_device_to_OF_node(pd);
for (; dp != NULL; dp = dp->child) {
- disptype = (unsigned char *)get_property(dp, "display-type", NULL);
+ disptype = get_property(dp, "display-type", NULL);
if (disptype == NULL)
continue;
if (strncmp(disptype, "LCD", 3) != 0)
continue;
for (i = 0; propnames[i] != NULL; ++i) {
- pedid = (unsigned char *)
- get_property(dp, propnames[i], NULL);
+ pedid = get_property(dp, propnames[i], NULL);
if (pedid != NULL) {
par->EDID = pedid;
NVTRACE("LCD found.\n");
};
struct device_node {
- char *name;
- char *type;
+ const char *name;
+ const char *type;
phandle node;
phandle linux_phandle;
char *full_name;
extern void early_init_devtree(void *);
extern int device_is_compatible(struct device_node *device, const char *);
extern int machine_is_compatible(const char *compat);
-extern void *get_property(struct device_node *node, const char *name,
+extern const void *get_property(struct device_node *node, const char *name,
int *lenp);
extern void print_properties(struct device_node *node);
extern int prom_n_addr_cells(struct device_node* np);
/* Helper to read a big number */
-static inline u64 of_read_number(u32 *cell, int size)
+static inline u64 of_read_number(const u32 *cell, int size)
{
u64 r = 0;
while (size--)
/* Translate an OF address block into a CPU physical address
*/
#define OF_BAD_ADDR ((u64)-1)
-extern u64 of_translate_address(struct device_node *np, u32 *addr);
+extern u64 of_translate_address(struct device_node *np, const u32 *addr);
/* Extract an address from a device, returns the region size and
* the address space flags too. The PCI version uses a BAR number
* instead of an absolute index
*/
-extern u32 *of_get_address(struct device_node *dev, int index,
+extern const u32 *of_get_address(struct device_node *dev, int index,
u64 *size, unsigned int *flags);
-extern u32 *of_get_pci_address(struct device_node *dev, int bar_no,
+extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no,
u64 *size, unsigned int *flags);
/* Get an address as a resource. Note that if your address is
/* Parse the ibm,dma-window property of an OF node into the busno, phys and
* size parameters.
*/
-void of_parse_dma_window(struct device_node *dn, unsigned char *dma_window_prop,
+void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size);
extern void kdump_move_device_tree(void);
u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */
};
-/***
+/**
* of_irq_map_init - Initialize the irq remapper
* @flags: flags defining workarounds to enable
*
extern void of_irq_map_init(unsigned int flags);
-/***
+/**
* of_irq_map_raw - Low level interrupt tree parsing
* @parent: the device interrupt parent
* @intspec: interrupt specifier ("interrupts" property of the device)
+ * @ointsize: size of the passed in interrupt specifier
* @addr: address specifier (start of "reg" property of the device)
* @out_irq: structure of_irq filled by this function
*
*
*/
-extern int of_irq_map_raw(struct device_node *parent, u32 *intspec,
- u32 ointsize, u32 *addr,
+extern int of_irq_map_raw(struct device_node *parent, const u32 *intspec,
- const u32 *addr, struct of_irq *out_irq);
++ u32 ointsize, const u32 *addr,
+ struct of_irq *out_irq);
-/***
+/**
* of_irq_map_one - Resolve an interrupt for a device
* @device: the device whose interrupt is to be resolved
* @index: index of the interrupt to resolve
extern int of_irq_map_one(struct device_node *device, int index,
struct of_irq *out_irq);
-/***
+/**
* of_irq_map_pci - Resolve the interrupt for a PCI device
* @pdev: the device whose interrupt is to be resolved
* @out_irq: structure of_irq filled by this function
projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / commitdiff