drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag and getparam
authorAbdiel Janulgue <abdiel.janulgue@linux.intel.com>
Wed, 1 Jul 2015 07:12:23 +0000 (10:12 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 6 Jul 2015 08:36:46 +0000 (10:36 +0200)
Ensures that the batch buffer is executed by the resource streamer.
And will let userspace know whether Resource Streamer is supported in
the kernel.

v2: Don't skip 1<<15 for the exec flags (Jani Nikula)
v3: Use HAS_RESOURCE_STREAMER macro for execbuf validation (Chris Wilson)

(from getparam patch)

v2: Update I915_PARAM_HAS_RESOURCE_STREAMER so it's after
    I915_PARAM_HAS_GPU_RESET.
v3: Only advertise RS support for hardware that supports it.
v4: Add HAS_RESOURCE_STREAMER() macro (Chris)

Testcase: igt/gem_exec_params
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
[danvet: squash in getparam patch since it'd break bisect, suggested
by Chris.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_execbuffer.c
include/uapi/drm/i915_drm.h

index c5349fa3fccef323d61f38ac9e869be153d5b9d1..a42f1659243354c1cf42a6a8b946d28104075f14 100644 (file)
@@ -167,6 +167,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
                value = i915.enable_hangcheck &&
                        intel_has_gpu_reset(dev);
                break;
+       case I915_PARAM_HAS_RESOURCE_STREAMER:
+               value = HAS_RESOURCE_STREAMER(dev);
+               break;
        default:
                DRM_DEBUG("Unknown parameter %d\n", param->param);
                return -EINVAL;
index 950a9811a16f669af228aca6a2f095b670748245..63daf4cd2477aa2348f5cf49069aa477e2f7b041 100644 (file)
@@ -2539,6 +2539,9 @@ struct drm_i915_cmd_table {
 
 #define HAS_CSR(dev)   (IS_SKYLAKE(dev))
 
+#define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
+                                   INTEL_INFO(dev)->gen >= 8)
+
 #define INTEL_PCH_DEVICE_ID_MASK               0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE           0x3b00
 #define INTEL_PCH_CPT_DEVICE_ID_TYPE           0x1c00
index 600db7441847bc0b6d8cd8d289b5b5e1c2f30784..83577c6159624230ea70ec4bc6f9f5214fa1c504 100644 (file)
@@ -1490,6 +1490,20 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                return -EINVAL;
        }
 
+       if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
+               if (!HAS_RESOURCE_STREAMER(dev)) {
+                       DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n");
+                       return -EINVAL;
+               }
+               if (ring->id != RCS) {
+                       DRM_DEBUG("RS is not available on %s\n",
+                                ring->name);
+                       return -EINVAL;
+               }
+
+               dispatch_flags |= I915_DISPATCH_RS;
+       }
+
        intel_runtime_pm_get(dev_priv);
 
        ret = i915_mutex_lock_interruptible(dev);
index f88cc1cac5d98ddfa0153b89290f85590f9ace56..e7c29f1659ad1e272cb829afc7efaaca6495bc35 100644 (file)
@@ -355,6 +355,7 @@ typedef struct drm_i915_irq_wait {
 #define I915_PARAM_SUBSLICE_TOTAL       33
 #define I915_PARAM_EU_TOTAL             34
 #define I915_PARAM_HAS_GPU_RESET        35
+#define I915_PARAM_HAS_RESOURCE_STREAMER 36
 
 typedef struct drm_i915_getparam {
        int param;
@@ -765,7 +766,12 @@ struct drm_i915_gem_execbuffer2 {
 #define I915_EXEC_BSD_RING1            (1<<13)
 #define I915_EXEC_BSD_RING2            (2<<13)
 
-#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15)
+/** Tell the kernel that the batchbuffer is processed by
+ *  the resource streamer.
+ */
+#define I915_EXEC_RESOURCE_STREAMER     (1<<15)
+
+#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER<<1)
 
 #define I915_EXEC_CONTEXT_ID_MASK      (0xffffffff)
 #define i915_execbuffer2_set_context_id(eb2, context) \