drm/panel: Add display timing for Okaya RS800480T-7X0GP

Add support for the Okaya RS800480T-7X0GP to the DRM simple panel
driver.

The RS800480T-7X0GP is a WVGA (800x480) panel with an 18-bit parallel
LCD interface. It supports pixel clocks in the range of 30-40 MHz.

This panel details can be found at:
http://boundarydevices.com/product/7-800x480-display/

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/Documentation/devicetree/bindings/panel/okaya,rs800480t-7x0gp.txt b/Documentation/devicetree/bindings/panel/okaya,rs800480t-7x0gp.txt
new file mode 100644 (file)
index 0000000..ddf8e21
--- /dev/null
+++ b/Documentation/devicetree/bindings/panel/okaya,rs800480t-7x0gp.txt
@@ -0,0 +1,7 @@
+OKAYA Electric America, Inc. RS800480T-7X0GP 7" WVGA LCD panel
+
+Required properties:
+- compatible: should be "okaya,rs800480t-7x0gp"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 57eceb24912debe6185bcc457aa4b1477c78c2c6..f97b73ec4713722ae3af5a05ba048ea95042e4e0 100644 (file)
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -973,6 +973,36 @@ static const struct panel_desc nec_nl4827hc19_05b = {
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24
 };
 
+static const struct display_timing okaya_rs800480t_7x0gp_timing = {
+       .pixelclock = { 30000000, 30000000, 40000000 },
+       .hactive = { 800, 800, 800 },
+       .hfront_porch = { 40, 40, 40 },
+       .hback_porch = { 40, 40, 40 },
+       .hsync_len = { 1, 48, 48 },
+       .vactive = { 480, 480, 480 },
+       .vfront_porch = { 13, 13, 13 },
+       .vback_porch = { 29, 29, 29 },
+       .vsync_len = { 3, 3, 3 },
+       .flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc okaya_rs800480t_7x0gp = {
+       .timings = &okaya_rs800480t_7x0gp_timing,
+       .num_timings = 1,
+       .bpc = 6,
+       .size = {
+               .width = 154,
+               .height = 87,
+       },
+       .delay = {
+               .prepare = 41,
+               .enable = 50,
+               .unprepare = 41,
+               .disable = 50,
+       },
+       .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+};
+
 static const struct drm_display_mode ortustech_com43h4m85ulc_mode  = {
        .clock = 25000,
        .hdisplay = 480,
@@ -1145,6 +1175,9 @@ static const struct of_device_id platform_of_match[] = {
        }, {
                .compatible = "nec,nl4827hc19-05b",
                .data = &nec_nl4827hc19_05b,
+       }, {
+               .compatible = "okaya,rs800480t-7x0gp",
+               .data = &okaya_rs800480t_7x0gp,
        }, {
                .compatible = "ortustech,com43h4m85ulc",
                .data = &ortustech_com43h4m85ulc,