davinci: Make GPIO code more generic

The current gpio code needs to know the number of
gpio irqs there are and what the bank irq number is.
To determine those values, it checks the SoC type.

It also assumes that the base address and the number
of irqs the interrupt controller uses is fixed.

To clean up the SoC checks and make it support
different base addresses and interrupt controllers,
have the SoC-specific code set those values in
the soc_info structure and have the gpio code
reference them there.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 1b7c16cd2672cb3d229ba2e1e12b0ef75250bfcb..757def752010260b982ed94fc78f878ff87bad9c 100644 (file)
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -13,6 +13,7 @@
 #include <linux/clk.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
+#include <linux/gpio.h>
 
 #include <linux/spi/spi.h>
 
@@ -647,6 +648,9 @@ static struct davinci_soc_info davinci_soc_info_dm355 = {
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm355_timer_info,
        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
+       .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
+       .gpio_num               = 104,
+       .gpio_irq               = IRQ_DM355_GPIOBNK0,
 };
 
 void __init dm355_init(void)

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c66269264cca3029cea7e6039056ec9d7ed8af50..cfd918e41e2df0c8859c7aca644986d965e33595 100644 (file)
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 
@@ -590,6 +591,9 @@ static struct davinci_soc_info davinci_soc_info_dm644x = {
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm644x_timer_info,
        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
+       .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
+       .gpio_num               = 71,
+       .gpio_irq               = IRQ_GPIOBNK0,
 };
 
 void __init dm644x_init(void)

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 83d67cf6935f9ab440fefd5404d927675e273b02..f980c2f95de4b6f7a3d0fa4bbfcbacbdaebe213c 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
+#include <linux/gpio.h>
 
 #include <asm/mach/map.h>
 
@@ -569,6 +570,9 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
        .intc_irq_num           = DAVINCI_N_AINTC_IRQ,
        .timer_info             = &dm646x_timer_info,
        .wdt_base               = IO_ADDRESS(DAVINCI_WDOG_BASE),
+       .gpio_base              = IO_ADDRESS(DAVINCI_GPIO_BASE),
+       .gpio_num               = 43, /* Only 33 usable */
+       .gpio_irq               = IRQ_DM646X_GPIOBNK0,
 };
 
 void __init dm646x_init(void)

diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 40327b557d79b6a0b092962c60fef101d98195ef..1b6532159c58813b8973aa906bcec26c9ea138de 100644 (file)
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -23,6 +23,7 @@
 #include <mach/cputype.h>
 #include <mach/irqs.h>
 #include <mach/hardware.h>
+#include <mach/common.h>
 #include <mach/gpio.h>
 
 #include <asm/mach/irq.h>
@@ -37,8 +38,6 @@ struct davinci_gpio {
 
 static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
 
-static unsigned __initdata ngpio;
-
 /* create a non-inlined version */
 static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio)
 {
@@ -116,23 +115,16 @@ davinci_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 static int __init davinci_gpio_setup(void)
 {
        int i, base;
+       unsigned ngpio;
+       struct davinci_soc_info *soc_info = &davinci_soc_info;
 
-       /* The gpio banks conceptually expose a segmented bitmap,
+       /*
+        * The gpio banks conceptually expose a segmented bitmap,
         * and "ngpio" is one more than the largest zero-based
         * bit index that's valid.
         */
-       if (cpu_is_davinci_dm355()) {           /* or dm335() */
-               ngpio = 104;
-       } else if (cpu_is_davinci_dm644x()) {   /* or dm337() */
-               ngpio = 71;
-       } else if (cpu_is_davinci_dm646x()) {
-               /* NOTE:  each bank has several "reserved" bits,
-                * unusable as GPIOs.  Only 33 of the GPIO numbers
-                * are usable, and we're not rejecting the others.
-                */
-               ngpio = 43;
-       } else {
-               /* if cpu_is_davinci_dm643x() ngpio = 111 */
+       ngpio = soc_info->gpio_num;
+       if (ngpio == 0) {
                pr_err("GPIO setup:  how many GPIOs?\n");
                return -EINVAL;
        }
@@ -279,17 +271,15 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 static int __init davinci_gpio_irq_setup(void)
 {
        unsigned        gpio, irq, bank;
-       unsigned        bank_irq;
        struct clk      *clk;
        u32             binten = 0;
+       unsigned        ngpio, bank_irq;
+       struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+       ngpio = soc_info->gpio_num;
 
-       if (cpu_is_davinci_dm355()) {           /* or dm335() */
-               bank_irq = IRQ_DM355_GPIOBNK0;
-       } else if (cpu_is_davinci_dm644x()) {
-               bank_irq = IRQ_GPIOBNK0;
-       } else if (cpu_is_davinci_dm646x()) {
-               bank_irq = IRQ_DM646X_GPIOBNK0;
-       } else {
+       bank_irq = soc_info->gpio_irq;
+       if (bank_irq == 0) {
                printk(KERN_ERR "Don't know first GPIO bank IRQ.\n");
                return -EINVAL;
        }
@@ -329,8 +319,7 @@ static int __init davinci_gpio_irq_setup(void)
        /* BINTEN -- per-bank interrupt enable. genirq would also let these
         * bits be set/cleared dynamically.
         */
-       __raw_writel(binten, (void *__iomem)
-                    IO_ADDRESS(DAVINCI_GPIO_BASE + 0x08));
+       __raw_writel(binten, soc_info->gpio_base + 0x08);
 
        printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
 

diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index d63703826a6015f6d6fd6dccebc5d8d49ff69448..06ff6d6e36780a9232ed3d009a026340807ae57f 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -58,6 +58,9 @@ struct davinci_soc_info {
        unsigned long                   intc_irq_num;
        struct davinci_timer_info       *timer_info;
        void __iomem                    *wdt_base;
+       void __iomem                    *gpio_base;
+       unsigned                        gpio_num;
+       unsigned                        gpio_irq;
 };
 
 extern struct davinci_soc_info davinci_soc_info;

diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h
index efe3281364e6367f681926625d782ac628e1d00a..ae07455683162117c30fec9e3cf0ea157ca8dd2d 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/gpio.h
+++ b/arch/arm/mach-davinci/include/mach/gpio.h
@@ -17,6 +17,7 @@
 #include <asm-generic/gpio.h>
 
 #include <mach/irqs.h>
+#include <mach/common.h>
 
 #define DAVINCI_GPIO_BASE 0x01C67000
 
@@ -67,15 +68,16 @@ static inline struct gpio_controller *__iomem
 __gpio_to_controller(unsigned gpio)
 {
        void *__iomem ptr;
+       void __iomem *base = davinci_soc_info.gpio_base;
 
        if (gpio < 32 * 1)
-               ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
+               ptr = base + 0x10;
        else if (gpio < 32 * 2)
-               ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
+               ptr = base + 0x38;
        else if (gpio < 32 * 3)
-               ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
+               ptr = base + 0x60;
        else if (gpio < 32 * 4)
-               ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x88);
+               ptr = base + 0x88;
        else
                ptr = NULL;
        return ptr;
@@ -142,13 +144,13 @@ static inline int gpio_to_irq(unsigned gpio)
 {
        if (gpio >= DAVINCI_N_GPIO)
                return -EINVAL;
-       return DAVINCI_N_AINTC_IRQ + gpio;
+       return davinci_soc_info.intc_irq_num + gpio;
 }
 
 static inline int irq_to_gpio(unsigned irq)
 {
        /* caller guarantees gpio_to_irq() succeeded */
-       return irq - DAVINCI_N_AINTC_IRQ;
+       return irq - davinci_soc_info.intc_irq_num;
 }
 
 #endif                         /* __DAVINCI_GPIO_H */