gma500: move configuration bits into the psb_ops structure
authorAlan Cox <alan@linux.intel.com>
Tue, 5 Jul 2011 14:40:16 +0000 (15:40 +0100)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 5 Jul 2011 15:20:41 +0000 (08:20 -0700)
We can stuff things like the number of pipes and the SGX offset away in
here as well and clean up more conditional code.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/staging/gma500/mdfld_device.c
drivers/staging/gma500/mrst_bios.c
drivers/staging/gma500/mrst_bios.h
drivers/staging/gma500/mrst_device.c
drivers/staging/gma500/psb_device.c
drivers/staging/gma500/psb_drv.c
drivers/staging/gma500/psb_drv.h

index e66d04a71191854c235e5280ac54c000aacb40ce..daa9487dc44f9befc21ec9b7d05638c04129998d 100644 (file)
@@ -26,6 +26,7 @@
 #include "psb_drv.h"
 #include "mdfld_output.h"
 #include "mdfld_dsi_output.h"
+#include "mrst_bios.h"
 
 /*
  *     Provide the Medfield specific backlight management
@@ -689,6 +690,11 @@ static int mdfld_power_up(struct drm_device *dev)
 const struct psb_ops mdfld_chip_ops = {
        .name = "Medfield",
        .accel_2d = 0,
+       .pipes = 3,
+       .sgx_offset = MRST_SGX_OFFSET,
+
+       .chip_setup = mid_chip_setup,
+
        .crtc_helper = &mdfld_helper_funcs,
        .crtc_funcs = &mdfld_intel_crtc_funcs,
 
index c3707f4b85f0586664590807637d49f086b33705..cf015df5b1e577548b64fbc7a3d7a5eea2f7a85e 100644 (file)
@@ -35,7 +35,7 @@ module_param_named(panel_id, panel_id, int, 0600);
 MODULE_PARM_DESC(panel_id, "Panel Identifier");
 
 
-void mrst_get_fuse_settings(struct drm_device *dev)
+static void mid_get_fuse_settings(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
        struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
@@ -102,7 +102,7 @@ void mrst_get_fuse_settings(struct drm_device *dev)
 /*
  *     Get the revison ID, B0:D2:F0;0x08
  */
-void mid_get_pci_revID(struct drm_psb_private *dev_priv)
+static void mid_get_pci_revID(struct drm_psb_private *dev_priv)
 {
        uint32_t platform_rev_id = 0;
        struct pci_dev *pci_gfx_root = pci_get_bus_and_slot(0, PCI_DEVFN(2, 0));
@@ -114,7 +114,7 @@ void mid_get_pci_revID(struct drm_psb_private *dev_priv)
                                        dev_priv->platform_rev_id);
 }
 
-void mrst_get_vbt_data(struct drm_psb_private *dev_priv)
+static void mid_get_vbt_data(struct drm_psb_private *dev_priv)
 {
        struct drm_device *dev = dev_priv->dev;
        struct mrst_vbt *vbt = &dev_priv->vbt_data;
@@ -261,3 +261,11 @@ void mrst_get_vbt_data(struct drm_psb_private *dev_priv)
        }
 }
 
+int mid_chip_setup(struct drm_device *dev)
+{
+       struct drm_psb_private *dev_priv = dev->dev_private;
+       mid_get_fuse_settings(dev);
+       mid_get_vbt_data(dev_priv);
+       mid_get_pci_revID(dev_priv);
+       return 0;
+}
\ No newline at end of file
index a257306d7e740f89a4ff93c6ed467359f76a03fe..00e7d564b7eb9c2d3e3ca8289e998a40828346a6 100644 (file)
@@ -17,6 +17,5 @@
  *
  **************************************************************************/
 
-extern void mrst_get_fuse_settings(struct drm_device *dev);
-extern void mid_get_pci_revID(struct drm_psb_private *dev_priv);
-extern void mrst_get_vbt_data(struct drm_psb_private *dev_priv);
+extern int mid_chip_setup(struct drm_device *dev);
+
index 79cd784b78056387fe039fe08bc3bc6b5211b46a..d71e8d3386d2e604ae55256610ff6dedea93b6b5 100644 (file)
@@ -25,6 +25,7 @@
 #include "psb_reg.h"
 #include "psb_intel_reg.h"
 #include <asm/intel_scu_ipc.h>
+#include "mrst_bios.h"
 
 /* IPC message and command defines used to enable/disable mipi panel voltages */
 #define IPC_MSG_PANEL_ON_OFF    0xE9
@@ -354,6 +355,10 @@ static int mrst_power_up(struct drm_device *dev)
 const struct psb_ops mrst_chip_ops = {
        .name = "Moorestown",
        .accel_2d = 1,
+       .pipes = 1,
+       .sgx_offset = MRST_SGX_OFFSET,
+
+       .chip_setup = mid_chip_setup,
        .crtc_helper = &mrst_helper_funcs,
        .crtc_funcs = &psb_intel_crtc_funcs,
 
index 040217136ae32b590480307e84ddfdd370be570d..1be6434be73a16ef2d0ac342bc815c07c187cb8c 100644 (file)
@@ -271,19 +271,69 @@ static int psb_restore_display_registers(struct drm_device *dev)
        return 0;
 }
 
-int psb_power_down(struct drm_device *dev)
+static int psb_power_down(struct drm_device *dev)
 {
        return 0;
 }
 
-int psb_power_up(struct drm_device *dev)
+static int psb_power_up(struct drm_device *dev)
 {
        return 0;
 }
 
+static void psb_get_core_freq(struct drm_device *dev)
+{
+       uint32_t clock;
+       struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
+       struct drm_psb_private *dev_priv = dev->dev_private;
+
+       /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
+       /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
+
+       pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
+       pci_read_config_dword(pci_root, 0xD4, &clock);
+       pci_dev_put(pci_root);
+
+       switch (clock & 0x07) {
+       case 0:
+               dev_priv->core_freq = 100;
+               break;
+       case 1:
+               dev_priv->core_freq = 133;
+               break;
+       case 2:
+               dev_priv->core_freq = 150;
+               break;
+       case 3:
+               dev_priv->core_freq = 178;
+               break;
+       case 4:
+               dev_priv->core_freq = 200;
+               break;
+       case 5:
+       case 6:
+       case 7:
+               dev_priv->core_freq = 266;
+       default:
+               dev_priv->core_freq = 0;
+       }
+}
+
+static int psb_chip_setup(struct drm_device *dev)
+{
+       psb_get_core_freq(dev);
+       psb_intel_opregion_init(dev);
+       psb_intel_init_bios(dev);
+       return 0;
+}
+
 const struct psb_ops psb_chip_ops = {
        .name = "Poulsbo",
        .accel_2d = 1,
+       .pipes = 2,
+       .sgx_offset = PSB_SGX_OFFSET,
+       .chip_setup = psb_chip_setup,
+
        .crtc_helper = &psb_intel_helper_funcs,
        .crtc_funcs = &psb_intel_crtc_funcs,
 
index dfb3f3a88597ed00261b20979461b08ae2e35523..b95d0a6970a1a93f30f81a27469689f2f3ed04df 100644 (file)
@@ -158,44 +158,6 @@ static void psb_do_takedown(struct drm_device *dev)
        /* FIXME: do we need to clean up the gtt here ? */
 }
 
-static void psb_get_core_freq(struct drm_device *dev)
-{
-       uint32_t clock;
-       struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
-       struct drm_psb_private *dev_priv = dev->dev_private;
-
-       /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
-       /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
-
-       pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
-       pci_read_config_dword(pci_root, 0xD4, &clock);
-       pci_dev_put(pci_root);
-
-       switch (clock & 0x07) {
-       case 0:
-               dev_priv->core_freq = 100;
-               break;
-       case 1:
-               dev_priv->core_freq = 133;
-               break;
-       case 2:
-               dev_priv->core_freq = 150;
-               break;
-       case 3:
-               dev_priv->core_freq = 178;
-               break;
-       case 4:
-               dev_priv->core_freq = 200;
-               break;
-       case 5:
-       case 6:
-       case 7:
-               dev_priv->core_freq = 266;
-       default:
-               dev_priv->core_freq = 0;
-       }
-}
-
 static int psb_do_init(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv =
@@ -336,13 +298,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
        dev_priv->dev = dev;
        dev->dev_private = (void *) dev_priv;
 
-       if (IS_MRST(dev))
-               dev_priv->num_pipe = 1;
-       else if (IS_MFLD(dev))
-               dev_priv->num_pipe = 3;
-       else
-               dev_priv->num_pipe = 2;
-
+       dev_priv->num_pipe = dev_priv->ops->pipes;
 
        resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
 
@@ -351,25 +307,14 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
        if (!dev_priv->vdc_reg)
                goto out_err;
 
-       if (IS_MRST(dev) || IS_MFLD(dev))
-               dev_priv->sgx_reg = ioremap(resource_start + MRST_SGX_OFFSET,
+       dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
                                                        PSB_SGX_SIZE);
-       else
-               dev_priv->sgx_reg = ioremap(resource_start + PSB_SGX_OFFSET,
-                                                       PSB_SGX_SIZE);
-
        if (!dev_priv->sgx_reg)
                goto out_err;
 
-       if (IS_MRST(dev) || IS_MFLD(dev)) {
-               mrst_get_fuse_settings(dev);
-               mrst_get_vbt_data(dev_priv);
-               mid_get_pci_revID(dev_priv);
-       } else {
-               psb_get_core_freq(dev);
-               psb_intel_opregion_init(dev);
-               psb_intel_init_bios(dev);
-       }
+       ret = dev_priv->ops->chip_setup(dev);
+       if (ret)
+               goto out_err;
 
        /* Init OSPM support */
        gma_power_init(dev);
index 4bc5e8dbf6b8be5a26bf0dc1e8af36fb59d1a4ea..7e6f1780cd34b6fe80202aedf21f68a91bd62b4c 100644 (file)
@@ -619,11 +619,16 @@ struct drm_psb_private {
 struct psb_ops {
        const char *name;
        unsigned int accel_2d:1;
+       int pipes;              /* Number of output pipes */
+       int sgx_offset;         /* Base offset of SGX device */
 
        /* Sub functions */
        struct drm_crtc_helper_funcs const *crtc_helper;
        struct drm_crtc_funcs const *crtc_funcs;
 
+       /* Setup hooks */
+       int (*chip_setup)(struct drm_device *dev);
+
        /* Display management hooks */
        int (*output_init)(struct drm_device *dev);
        /* Power management hooks */