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Blackfin arch: use the new bfin_addr_dcachable() function
author
Mike Frysinger
<vapier.adi@gmail.com>
Thu, 16 Oct 2008 15:25:34 +0000
(23:25 +0800)
committer
Bryan Wu
<cooloney@kernel.org>
Thu, 16 Oct 2008 15:25:34 +0000
(23:25 +0800)
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
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diff --git
a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 5094677fd09eae3235b524490960b157e662ea5f..baa52e261f0d501dab0206a4edaebdc678f9b33f 100644
(file)
--- a/
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/
arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@
-21,6
+21,7
@@
#include <linux/mm.h>
#include <asm/blackfin.h>
+#include <asm/cacheflush.h>
#include <asm/cplbinit.h>
#include <asm/mmu_context.h>
@@
-144,9
+145,7
@@
static noinline int dcplb_miss(void)
d_data = CPLB_SUPV_WR | CPLB_VALID | CPLB_DIRTY | PAGE_SIZE_4KB;
#ifdef CONFIG_BFIN_DCACHE
- if (addr < _ramend - DMA_UNCACHED_REGION ||
- (reserved_mem_dcache_on && addr >= _ramend &&
- addr < physical_mem_end)) {
+ if (bfin_addr_dcachable(addr)) {
d_data |= CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND;
#ifdef CONFIG_BFIN_WT
d_data |= CPLB_L1_AOW | CPLB_WT;