drm/i915: implement ironlake_wait_for_vblank
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 4 May 2012 20:18:15 +0000 (17:18 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 8 May 2012 13:07:38 +0000 (15:07 +0200)
intel_wait_for_vblank uses PIPESTAT, which does not exist on Ironlake
and newer, so now we use PIPEFRAME.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Ditch the check for disable pipe from the new ilk wait for
vblank function to keep it consisten with existing behaviour.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index ae3f4454928e89ac8e1284a98bb927a85dbfcbf9..b322bde98675bba80b060248c2e5a12188124de3 100644 (file)
@@ -784,6 +784,17 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
        return true;
 }
 
+static void ironlake_wait_for_vblank(struct drm_device *dev, int pipe)
+{
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       u32 frame, frame_reg = PIPEFRAME(pipe);
+
+       frame = I915_READ(frame_reg);
+
+       if (wait_for(I915_READ_NOTRACE(frame_reg) != frame, 50))
+               DRM_DEBUG_KMS("vblank wait timed out\n");
+}
+
 /**
  * intel_wait_for_vblank - wait for vblank on a given pipe
  * @dev: drm device
@@ -797,6 +808,11 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe)
        struct drm_i915_private *dev_priv = dev->dev_private;
        int pipestat_reg = PIPESTAT(pipe);
 
+       if (INTEL_INFO(dev)->gen >= 5) {
+               ironlake_wait_for_vblank(dev, pipe);
+               return;
+       }
+
        /* Clear existing vblank status. Note this will clear any other
         * sticky status fields as well.
         *