ARM: dts: Add xo to sdhc clock node on qcom platforms

Add xo entry to sdhc clock node on all qcom platforms.

Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 39eb7a4ed16aa2db2cf9c16676eaaf75faf80ef2..80d48867107f2a5c6b141786bacfbf250011b7bc 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -182,13 +182,13 @@
        };
 
        clocks {
-               xo_board {
+               xo_board: xo_board {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <19200000>;
                };
 
-               sleep_clk {
+               sleep_clk: sleep_clk {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <32768>;
@@ -416,8 +416,10 @@
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 123 0>, <0 138 0>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
-                       clock-names = "core", "iface";
+                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&xo_board>;
+                       clock-names = "core", "iface", "xo";
                        status = "disabled";
                };
 
@@ -427,8 +429,10 @@
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 125 0>, <0 221 0>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
-                       clock-names = "core", "iface";
+                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+                                <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&xo_board>;
+                       clock-names = "core", "iface", "xo";
                        status = "disabled";
                };
 

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d2109475bdfdc5761aa5764ee8ba60a4e81e7f59..49d579f288654aace0b7a2b630286a10322f8136 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -220,13 +220,13 @@
        };
 
        clocks {
-               xo_board {
+               xo_board: xo_board {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <19200000>;
                };
 
-               sleep_clk {
+               sleep_clk: sleep_clk {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <32768>;
@@ -558,8 +558,10 @@
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 123 0>, <0 138 0>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
-                       clock-names = "core", "iface";
+                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&gcc GCC_SDCC1_AHB_CLK>,
+                                <&xo_board>;
+                       clock-names = "core", "iface", "xo";
                        status = "disabled";
                };
 
@@ -569,8 +571,10 @@
                        reg-names = "hc_mem", "core_mem";
                        interrupts = <0 125 0>, <0 221 0>;
                        interrupt-names = "hc_irq", "pwr_irq";
-                       clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
-                       clock-names = "core", "iface";
+                       clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+                                <&gcc GCC_SDCC2_AHB_CLK>,
+                                <&xo_board>;
+                       clock-names = "core", "iface", "xo";
                        status = "disabled";
                };