drm/nv20/fb: split implementation into nv20/nv25 pieces

There's more stuff that can be shared in the constructor, will be merged
together again later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index a990df4d6c049d263087d3567ab4d24a24e01aef..b80092b85153addd23d7cf8b94cf15917fda9aea 100644 (file)
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -65,6 +65,7 @@ nouveau-y += core/subdev/fb/base.o
 nouveau-y += core/subdev/fb/nv04.o
 nouveau-y += core/subdev/fb/nv10.o
 nouveau-y += core/subdev/fb/nv20.o
+nouveau-y += core/subdev/fb/nv25.o
 nouveau-y += core/subdev/fb/nv30.o
 nouveau-y += core/subdev/fb/nv40.o
 nouveau-y += core/subdev/fb/nv50.o

diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
index 5a8c06e503418710a52ef8dc02ac66469403439f..acdd96c85961afd09097cef92d29b318271b7acf 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
+++ b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
@@ -114,6 +114,7 @@ int  _nouveau_fb_init(struct nouveau_object *);
 extern struct nouveau_oclass nv04_fb_oclass;
 extern struct nouveau_oclass nv10_fb_oclass;
 extern struct nouveau_oclass nv20_fb_oclass;
+extern struct nouveau_oclass nv25_fb_oclass;
 extern struct nouveau_oclass nv30_fb_oclass;
 extern struct nouveau_oclass nv40_fb_oclass;
 extern struct nouveau_oclass nv50_fb_oclass;
@@ -126,6 +127,11 @@ bool nv04_fb_memtype_valid(struct nouveau_fb *, u32 memtype);
 
 void nv10_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);
 
+void nv20_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
+                      u32 pitch, u32 flags, struct nouveau_fb_tile *);
+void nv20_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);
+void nv20_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);
+
 void nv30_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
                       u32 pitch, u32 flags, struct nouveau_fb_tile *);
 void nv30_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);

diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
index 5fa58b7369b5708f990179c45150858b40d00b5d..74f88f48e1c2cd53a346b1320ef1815e367c7ead 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c
@@ -72,7 +72,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_FB     ] = &nv20_fb_oclass;
+               device->oclass[NVDEV_SUBDEV_FB     ] = &nv25_fb_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -90,7 +90,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_FB     ] = &nv20_fb_oclass;
+               device->oclass[NVDEV_SUBDEV_FB     ] = &nv25_fb_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -108,7 +108,7 @@ nv20_identify(struct nouveau_device *device)
                device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv20_devinit_oclass;
                device->oclass[NVDEV_SUBDEV_MC     ] = &nv04_mc_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
-               device->oclass[NVDEV_SUBDEV_FB     ] = &nv20_fb_oclass;
+               device->oclass[NVDEV_SUBDEV_FB     ] = &nv25_fb_oclass;
                device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
                device->oclass[NVDEV_SUBDEV_VM     ] = &nv04_vmmgr_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;

diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
index e86dd48db8a1df7de03c1c6b24a8e992929d0a8b..86bceb1b02e0903b437802a6c05f660730928450 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
@@ -30,7 +30,7 @@ struct nv20_fb_priv {
        struct nouveau_fb base;
 };
 
-static void
+void
 nv20_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
                  u32 flags, struct nouveau_fb_tile *tile)
 {
@@ -47,7 +47,6 @@ static void
 nv20_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags,
                  struct nouveau_fb_tile *tile)
 {
-       struct nouveau_device *device = nv_device(pfb);
        int bpp = (flags & 2) ? 32 : 16;
 
        /* Allocate some of the on-die tag memory, used to store Z
@@ -59,20 +58,13 @@ nv20_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags,
        if (!nouveau_mm_head(&pfb->tags, 1, size, size, 1, &tile->tag)) {
                /* Enable Z compression */
                tile->zcomp = tile->tag->offset;
-               if (device->chipset >= 0x25) {
-                       if (bpp == 16)
-                               tile->zcomp |= 0x00100000;
-                       else
-                               tile->zcomp |= 0x00200000;
-               } else {
-                       tile->zcomp |= 0x80000000;
-                       if (bpp != 16)
-                               tile->zcomp |= 0x04000000;
-               }
+               tile->zcomp |= 0x80000000;
+               if (bpp != 16)
+                       tile->zcomp |= 0x04000000;
        }
 }
 
-static void
+void
 nv20_fb_tile_fini(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
 {
        tile->addr  = 0;
@@ -82,7 +74,7 @@ nv20_fb_tile_fini(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
        nouveau_mm_free(&pfb->tags, &tile->tag);
 }
 
-static void
+void
 nv20_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
 {
        nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);

diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c
new file mode 100644 (file)
index 0000000..257a025
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2010 Francisco Jerez.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sublicense, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial
+ * portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#include <subdev/fb.h>
+
+struct nv25_fb_priv {
+       struct nouveau_fb base;
+};
+
+static void
+nv25_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags,
+                 struct nouveau_fb_tile *tile)
+{
+       int bpp = (flags & 2) ? 32 : 16;
+
+       /* Allocate some of the on-die tag memory, used to store Z
+        * compression meta-data (most likely just a bitmap determining
+        * if a given tile is compressed or not).
+        */
+       size /= 256;
+
+       if (!nouveau_mm_head(&pfb->tags, 1, size, size, 1, &tile->tag)) {
+               /* Enable Z compression */
+               tile->zcomp = tile->tag->offset;
+               if (bpp == 16)
+                       tile->zcomp |= 0x00100000;
+               else
+                       tile->zcomp |= 0x00200000;
+       }
+}
+
+static int
+nv25_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+            struct nouveau_oclass *oclass, void *data, u32 size,
+            struct nouveau_object **pobject)
+{
+       struct nouveau_device *device = nv_device(parent);
+       struct nv25_fb_priv *priv;
+       u32 pbus1218;
+       int ret;
+
+       ret = nouveau_fb_create(parent, engine, oclass, &priv);
+       *pobject = nv_object(priv);
+       if (ret)
+               return ret;
+
+       pbus1218 = nv_rd32(priv, 0x001218);
+       switch (pbus1218 & 0x00000300) {
+       case 0x00000000: priv->base.ram.type = NV_MEM_TYPE_SDRAM; break;
+       case 0x00000100: priv->base.ram.type = NV_MEM_TYPE_DDR1; break;
+       case 0x00000200: priv->base.ram.type = NV_MEM_TYPE_GDDR3; break;
+       case 0x00000300: priv->base.ram.type = NV_MEM_TYPE_GDDR2; break;
+       }
+       priv->base.ram.size = nv_rd32(priv, 0x10020c) & 0xff000000;
+
+       if (device->chipset >= 0x25)
+               ret = nouveau_mm_init(&priv->base.tags, 0, 64 * 1024, 1);
+       else
+               ret = nouveau_mm_init(&priv->base.tags, 0, 32 * 1024, 1);
+       if (ret)
+               return ret;
+
+       priv->base.memtype_valid = nv04_fb_memtype_valid;
+       priv->base.tile.regions = 8;
+       priv->base.tile.init = nv20_fb_tile_init;
+       priv->base.tile.comp = nv25_fb_tile_comp;
+       priv->base.tile.fini = nv20_fb_tile_fini;
+       priv->base.tile.prog = nv20_fb_tile_prog;
+       return nouveau_fb_created(&priv->base);
+}
+
+struct nouveau_oclass
+nv25_fb_oclass = {
+       .handle = NV_SUBDEV(FB, 0x25),
+       .ofuncs = &(struct nouveau_ofuncs) {
+               .ctor = nv25_fb_ctor,
+               .dtor = _nouveau_fb_dtor,
+               .init = _nouveau_fb_init,
+               .fini = _nouveau_fb_fini,
+       },
+};