drm/omap: omap_display_timings: rename hbp to hback_porch
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Thu, 22 Sep 2016 11:06:50 +0000 (14:06 +0300)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 2 Nov 2016 08:48:18 +0000 (10:48 +0200)
In preparation to move the stack to use the generic videmode struct for
display timing information rename the hbp member to hback_porch.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
18 files changed:
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
drivers/gpu/drm/omapdrm/displays/connector-dvi.c
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
drivers/gpu/drm/omapdrm/dss/dispc.c
drivers/gpu/drm/omapdrm/dss/display.c
drivers/gpu/drm/omapdrm/dss/dsi.c
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
drivers/gpu/drm/omapdrm/dss/omapdss.h
drivers/gpu/drm/omapdrm/dss/rfbi.c
drivers/gpu/drm/omapdrm/dss/venc.c
drivers/gpu/drm/omapdrm/omap_connector.c

index 6d089b337bcbed11e923d59b8c2efa144a72fd9e..2dbc6a42fb32d90d1301064456768aa1183dcd46 100644 (file)
@@ -35,7 +35,7 @@ static const struct omap_video_timings tvc_pal_timings = {
        .pixelclock     = 13500000,
        .hsync_len      = 64,
        .hfront_porch   = 12,
-       .hbp            = 68,
+       .hback_porch    = 68,
        .vsw            = 5,
        .vfp            = 5,
        .vbp            = 41,
index cf893866aca0e5f243f3090cdb2049f5756e6f54..6cf541cb9933db2ec5b034902819a8317c246f51 100644 (file)
@@ -27,7 +27,7 @@ static const struct omap_video_timings dvic_default_timings = {
 
        .hfront_porch   = 48,
        .hsync_len      = 32,
-       .hbp            = 80,
+       .hback_porch    = 80,
 
        .vfp            = 3,
        .vsw            = 4,
index fd1178b57f7924583936e5386ea7177ff3cbdb34..24d047844b7cdcb316d72e2cd57be8729826c085 100644 (file)
@@ -27,7 +27,7 @@ static const struct omap_video_timings hdmic_default_timings = {
        .pixelclock     = 25175000,
        .hsync_len      = 96,
        .hfront_porch   = 16,
-       .hbp            = 48,
+       .hback_porch    = 48,
        .vsw            = 2,
        .vfp            = 11,
        .vbp            = 31,
index 677db7b22a02d79730e551e60d55784a116bac9f..295904a5f28dcc254841d6e7e81264b0c56c2e74 100644 (file)
@@ -27,7 +27,7 @@ static struct omap_video_timings lb035q02_timings = {
 
        .hsync_len      = 2,
        .hfront_porch   = 20,
-       .hbp            = 68,
+       .hback_porch    = 68,
 
        .vsw            = 2,
        .vfp            = 4,
index aff07f8107964f09e4ca092eed2b1e87006f58f4..d408824a3341af30c7722a2a2fa10e6dc72da37a 100644 (file)
@@ -71,7 +71,7 @@ static const struct omap_video_timings nec_8048_panel_timings = {
        .pixelclock     = LCD_PIXEL_CLOCK,
        .hfront_porch   = 6,
        .hsync_len      = 1,
-       .hbp            = 4,
+       .hback_porch    = 4,
        .vfp            = 3,
        .vsw            = 1,
        .vbp            = 4,
index c8348090e7451ba7614f1e91d30cd01bfa6260da..b36df2c66db113bbf09d533189164bdbc52824fc 100644 (file)
@@ -43,7 +43,7 @@ static const struct omap_video_timings sharp_ls_timings = {
 
        .hsync_len      = 2,
        .hfront_porch   = 1,
-       .hbp            = 28,
+       .hback_porch    = 28,
 
        .vsw            = 1,
        .vfp            = 1,
index fab0e98577f54c2acac8ad7cb63cb8239d820c95..ed55ad9fa73199deed4d9e0b6f37a17baeb0f6b0 100644 (file)
@@ -98,7 +98,7 @@ static const struct omap_video_timings acx565akm_panel_timings = {
        .pixelclock     = 24000000,
        .hfront_porch   = 28,
        .hsync_len      = 4,
-       .hbp            = 24,
+       .hback_porch    = 24,
        .vfp            = 3,
        .vsw            = 3,
        .vbp            = 4,
index 694b2e117e089e5a04c70da843fc5d3337af33ef..f1cc3fa275e622d6cfc6473e8f56dbe36d9f1937 100644 (file)
@@ -48,7 +48,7 @@ static struct omap_video_timings td028ttec1_panel_timings = {
        .pixelclock     = 22153000,
        .hfront_porch   = 24,
        .hsync_len      = 8,
-       .hbp            = 8,
+       .hback_porch    = 8,
        .vfp            = 4,
        .vsw            = 2,
        .vbp            = 2,
index 8960e8389d6a3e3b0834d5e160f5de21a2d1df5f..458a4541f85c9015b220f8eb43481cc02aef1d98 100644 (file)
@@ -80,7 +80,7 @@ static const struct omap_video_timings tpo_td043_timings = {
 
        .hsync_len      = 1,
        .hfront_porch   = 68,
-       .hbp            = 214,
+       .hback_porch    = 214,
 
        .vsw            = 1,
        .vfp            = 39,
index 3f5c57fbfa94d8d1c5991f4c13775afd58071111..0d115aa6c86ec7a2725de988cad6d0117e6e13fc 100644 (file)
@@ -2190,14 +2190,14 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk,
        int i;
 
        nonactive = t->hactive + t->hfront_porch + t->hsync_len +
-                   t->hbp - out_width;
+                   t->hback_porch - out_width;
 
        i = 0;
        if (out_height < height)
                i++;
        if (out_width < width)
                i++;
-       blank = div_u64((u64)(t->hbp + t->hsync_len + t->hfront_porch) *
+       blank = div_u64((u64)(t->hback_porch + t->hsync_len + t->hfront_porch) *
                        lclk, pclk);
        DSSDBG("blanking period + ppl = %llu (limit = %u)\n", blank, limits[i]);
        if (blank <= limits[i])
@@ -3132,7 +3132,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,
                        return false;
 
                if (!_dispc_lcd_timings_ok(timings->hsync_len,
-                               timings->hfront_porch, timings->hbp,
+                               timings->hfront_porch, timings->hback_porch,
                                timings->vsw, timings->vfp, timings->vbp))
                        return false;
        }
@@ -3270,11 +3270,11 @@ void dispc_mgr_set_timings(enum omap_channel channel,
 
        if (dss_mgr_is_lcd(channel)) {
                _dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfront_porch,
-                               t.hbp, t.vsw, t.vfp, t.vbp, t.vsync_level,
-                               t.hsync_level, t.data_pclk_edge, t.de_level,
-                               t.sync_pclk_edge);
+                               t.hback_porch, t.vsw, t.vfp, t.vbp,
+                               t.vsync_level, t.hsync_level, t.data_pclk_edge,
+                               t.de_level, t.sync_pclk_edge);
 
-               xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hbp;
+               xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hback_porch;
                ytot = t.vactive + t.vfp + t.vsw + t.vbp;
 
                ht = timings->pixelclock / xtot;
@@ -3282,7 +3282,8 @@ void dispc_mgr_set_timings(enum omap_channel channel,
 
                DSSDBG("pck %u\n", timings->pixelclock);
                DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
-                       t.hsync_len, t.hfront_porch, t.hbp, t.vsw, t.vfp, t.vbp);
+                       t.hsync_len, t.hfront_porch, t.hback_porch,
+                       t.vsw, t.vfp, t.vbp);
                DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n",
                        t.vsync_level, t.hsync_level, t.data_pclk_edge,
                        t.de_level, t.sync_pclk_edge);
@@ -4225,7 +4226,7 @@ static const struct dispc_errata_i734_data {
        .timings = {
                .hactive = 8, .vactive = 1,
                .pixelclock = 16000000,
-               .hsync_len = 8, .hfront_porch = 4, .hbp = 4,
+               .hsync_len = 8, .hfront_porch = 4, .hback_porch = 4,
                .vsw = 1, .vfp = 1, .vbp = 1,
                .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
                .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
index f147c6c663d3b23bbd4cc636b6c69f48edc75a96..336521cdf824b500f8a7f5c549f0677c6adacf55 100644 (file)
@@ -225,7 +225,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
 
        ovt->pixelclock = vm->pixelclock;
        ovt->hactive = vm->hactive;
-       ovt->hbp = vm->hback_porch;
+       ovt->hback_porch = vm->hback_porch;
        ovt->hfront_porch = vm->hfront_porch;
        ovt->hsync_len = vm->hsync_len;
        ovt->vactive = vm->vactive;
@@ -258,7 +258,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
        vm->pixelclock = ovt->pixelclock;
 
        vm->hactive = ovt->hactive;
-       vm->hback_porch = ovt->hbp;
+       vm->hback_porch = ovt->hback_porch;
        vm->hfront_porch = ovt->hfront_porch;
        vm->hsync_len = ovt->hsync_len;
        vm->vactive = ovt->vactive;
index 17eb16f86adc06b09883cad7d11f5af676fecb2c..a542d44ed53a2bd2f8c8ed18d9b17f3a71624e14 100644 (file)
@@ -4423,7 +4423,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
        t->pixelclock = pck;
        t->hactive = ctx->config->timings->hactive;
        t->vactive = ctx->config->timings->vactive;
-       t->hsync_len = t->hfront_porch = t->hbp = t->vsw = 1;
+       t->hsync_len = t->hfront_porch = t->hback_porch = t->vsw = 1;
        t->vfp = t->vbp = 0;
 
        return true;
@@ -4527,7 +4527,8 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
 
        xres = req_vm->hactive;
 
-       panel_hbl = req_vm->hfront_porch + req_vm->hbp + req_vm->hsync_len;
+       panel_hbl = req_vm->hfront_porch + req_vm->hback_porch +
+                   req_vm->hsync_len;
        panel_htot = xres + panel_hbl;
 
        dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(xres * bitspp, 8) + 6, ndl);
@@ -4603,7 +4604,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
                hsa = max(hsa - hse, 1);
        }
 
-       hbp = div64_u64((u64)req_vm->hbp * byteclk, req_pck_nom);
+       hbp = div64_u64((u64)req_vm->hback_porch * byteclk, req_pck_nom);
        hbp = max(hbp, 1);
 
        hfp = dsi_hbl - (hss + hsa + hse + hbp);
@@ -4662,7 +4663,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
                hsa = 1;
        }
 
-       hbp = div64_u64((u64)req_vm->hbp * dispc_pck, req_pck_nom);
+       hbp = div64_u64((u64)req_vm->hback_porch * dispc_pck, req_pck_nom);
        hbp = max(hbp, 1);
 
        hfp = dispc_hbl - hsa - hbp;
@@ -4687,7 +4688,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
 
        dispc_vm->hfront_porch = hfp;
        dispc_vm->hsync_len = hsa;
-       dispc_vm->hbp = hbp;
+       dispc_vm->hback_porch = hbp;
 
        return true;
 }
index 26012224e7e48fefc20a6c397f9d41444574fbb7..f986b323764b10068f691e990322028cc93d6d34 100644 (file)
@@ -297,7 +297,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
        /* video core */
        video_cfg->data_enable_pol = 1; /* It is always 1*/
        video_cfg->hblank = cfg->timings.hfront_porch +
-                               cfg->timings.hbp + cfg->timings.hsync_len;
+                           cfg->timings.hback_porch + cfg->timings.hsync_len;
        video_cfg->vblank_osc = 0;
        video_cfg->vblank = cfg->timings.vsw +
                                cfg->timings.vfp + cfg->timings.vbp;
@@ -320,7 +320,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
                video_cfg->hblank *= 2;
                video_cfg->v_fc_config.timings.hfront_porch *= 2;
                video_cfg->v_fc_config.timings.hsync_len *= 2;
-               video_cfg->v_fc_config.timings.hbp *= 2;
+               video_cfg->v_fc_config.timings.hback_porch *= 2;
        }
 }
 
index 7b7efb6dc5d747f524d186a71fa6f00acf51b1d6..e4a431cb33a4d00cd121a295e1abc024deeae700 100644 (file)
@@ -181,7 +181,7 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
            omapdss_get_version() == OMAPDSS_VER_OMAP4)
                hsync_len_offset = 0;
 
-       timing_h |= FLD_VAL(timings->hbp, 31, 20);
+       timing_h |= FLD_VAL(timings->hback_porch, 31, 20);
        timing_h |= FLD_VAL(timings->hfront_porch, 19, 8);
        timing_h |= FLD_VAL(timings->hsync_len - hsync_len_offset, 7, 0);
        hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h);
@@ -201,7 +201,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
        video_fmt->y_res = param->timings.vactive;
        video_fmt->x_res = param->timings.hactive;
 
-       timings->hbp = param->timings.hbp;
+       timings->hback_porch = param->timings.hback_porch;
        timings->hfront_porch = param->timings.hfront_porch;
        timings->hsync_len = param->timings.hsync_len;
        timings->vbp = param->timings.vbp;
@@ -224,7 +224,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
                video_fmt->x_res *= 2;
                timings->hfront_porch *= 2;
                timings->hsync_len *= 2;
-               timings->hbp *= 2;
+               timings->hback_porch *= 2;
        }
 }
 
index b540baf81e0d44c1e1ff084290b96ebe839a526a..f8db4c29be83f594408352e186f6434458149606 100644 (file)
@@ -311,7 +311,7 @@ struct omap_video_timings {
        /* Unit: pixel clocks */
        u16 hfront_porch;       /* Horizontal front porch */
        /* Unit: pixel clocks */
-       u16 hbp;        /* Horizontal back porch */
+       u16 hback_porch;        /* Horizontal back porch */
        /* Unit: line clocks */
        u16 vsw;        /* Vertical synchronization pulse width */
        /* Unit: line clocks */
index 32b87bfd6d3fbb49478596a9198bc5d0222e292b..0f721fbbe57010b30e723f86883f75d972db9789 100644 (file)
@@ -860,7 +860,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
         */
        rfbi.timings.hsync_len = 1;
        rfbi.timings.hfront_porch = 1;
-       rfbi.timings.hbp = 1;
+       rfbi.timings.hback_porch = 1;
        rfbi.timings.vsw = 1;
        rfbi.timings.vfp = 0;
        rfbi.timings.vbp = 0;
index 92dbcab2d72ace237f6aa4b606669ab227bcfb95..f192368bec60efb1b1888b319cdd2a6d13293af7 100644 (file)
@@ -268,7 +268,7 @@ const struct omap_video_timings omap_dss_pal_timings = {
        .pixelclock     = 13500000,
        .hsync_len      = 64,
        .hfront_porch   = 12,
-       .hbp            = 68,
+       .hback_porch    = 68,
        .vsw            = 5,
        .vfp            = 5,
        .vbp            = 41,
@@ -289,7 +289,7 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
        .pixelclock     = 13500000,
        .hsync_len      = 64,
        .hfront_porch   = 16,
-       .hbp            = 58,
+       .hback_porch    = 58,
        .vsw            = 6,
        .vfp            = 6,
        .vbp            = 31,
index 2399a6facea4f34855f05ea62d69645da5e4bc6e..3d1b418fd858e667a9edc9bdace05243c4a5a85b 100644 (file)
@@ -50,7 +50,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
        mode->hdisplay = timings->hactive;
        mode->hsync_start = mode->hdisplay + timings->hfront_porch;
        mode->hsync_end = mode->hsync_start + timings->hsync_len;
-       mode->htotal = mode->hsync_end + timings->hbp;
+       mode->htotal = mode->hsync_end + timings->hback_porch;
 
        mode->vdisplay = timings->vactive;
        mode->vsync_start = mode->vdisplay + timings->vfp;
@@ -84,7 +84,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
        timings->hactive = mode->hdisplay;
        timings->hfront_porch = mode->hsync_start - mode->hdisplay;
        timings->hsync_len = mode->hsync_end - mode->hsync_start;
-       timings->hbp = mode->htotal - mode->hsync_end;
+       timings->hback_porch = mode->htotal - mode->hsync_end;
 
        timings->vactive = mode->vdisplay;
        timings->vfp = mode->vsync_start - mode->vdisplay;