Blackfin: NOMPU: skip DMA ICPLB hole when it is redundant

Normally there is no user-reserved memory after the DMA region which means
there is no user-reserved ICPLB coverage.  So the DMA hole can be covered
by the large hole that is always added to cover up to the async bank.  We
only need an explicit DMA whole when we also add an explicit mapping for
the user-reserved memory.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index c9b0a4d53dc15f2b8cb5cb8453ecbc7e6b8cb43a..282a7919821b0a8776dd9283bdca4e2677f893a0 100644 (file)
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -147,12 +147,13 @@ void __init generate_cplb_tables_all(void)
        /* Normal RAM, including MTD FS.  */
        icplb_bounds[i_i].eaddr = uncached_end;
        icplb_bounds[i_i++].data = SDRAM_IGENERIC;
-       /* DMA uncached region.  */
-       if (DMA_UNCACHED_REGION) {
-               icplb_bounds[i_i].eaddr = _ramend;
-               icplb_bounds[i_i++].data = 0;
-       }
        if (_ramend != physical_mem_end) {
+               /* DMA uncached region.  */
+               if (DMA_UNCACHED_REGION) {
+                       /* Normally this hole is caught by the async below.  */
+                       icplb_bounds[i_i].eaddr = _ramend;
+                       icplb_bounds[i_i++].data = 0;
+               }
                /* Reserved memory.  */
                icplb_bounds[i_i].eaddr = physical_mem_end;
                icplb_bounds[i_i++].data = (reserved_mem_icache_on ?