struct pxafb_info *);
static void set_ctrlr_state(struct pxafb_info *fbi, u_int state);
+static inline unsigned long
+lcd_readl(struct pxafb_info *fbi, unsigned int off)
+{
+ return __raw_readl(fbi->mmio_base + off);
+}
+
+static inline void
+lcd_writel(struct pxafb_info *fbi, unsigned int off, unsigned long val)
+{
+ __raw_writel(val, fbi->mmio_base + off);
+}
+
static inline void pxafb_schedule_work(struct pxafb_info *fbi, u_int state)
{
unsigned long flags;
fbi->reg_lccr1 = new_regs.lccr1;
fbi->reg_lccr2 = new_regs.lccr2;
fbi->reg_lccr3 = new_regs.lccr3;
- fbi->reg_lccr4 = __raw_readl(fbi->mmio_base + LCCR4) &
- (~LCCR4_PAL_FOR_MASK);
+ fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK;
fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
set_hsync_time(fbi, pcd);
local_irq_restore(flags);
* Only update the registers if the controller is enabled
* and something has changed.
*/
- if ((__raw_readl(fbi->mmio_base + LCCR0) != fbi->reg_lccr0) ||
- (__raw_readl(fbi->mmio_base + LCCR1) != fbi->reg_lccr1) ||
- (__raw_readl(fbi->mmio_base + LCCR2) != fbi->reg_lccr2) ||
- (__raw_readl(fbi->mmio_base + LCCR3) != fbi->reg_lccr3) ||
- (__raw_readl(fbi->mmio_base + FDADR0) != fbi->fdadr[0]) ||
- (__raw_readl(fbi->mmio_base + FDADR1) != fbi->fdadr[1]))
+ if ((lcd_readl(fbi, LCCR0) != fbi->reg_lccr0) ||
+ (lcd_readl(fbi, LCCR1) != fbi->reg_lccr1) ||
+ (lcd_readl(fbi, LCCR2) != fbi->reg_lccr2) ||
+ (lcd_readl(fbi, LCCR3) != fbi->reg_lccr3) ||
+ (lcd_readl(fbi, FDADR0) != fbi->fdadr[0]) ||
+ (lcd_readl(fbi, FDADR1) != fbi->fdadr[1]))
pxafb_schedule_work(fbi, C_REENABLE);
return 0;
clk_enable(fbi->clk);
/* Sequence from 11.7.10 */
- __raw_writel(fbi->reg_lccr3, fbi->mmio_base + LCCR3);
- __raw_writel(fbi->reg_lccr2, fbi->mmio_base + LCCR2);
- __raw_writel(fbi->reg_lccr1, fbi->mmio_base + LCCR1);
- __raw_writel(fbi->reg_lccr0 & ~LCCR0_ENB, fbi->mmio_base + LCCR0);
-
- __raw_writel(fbi->fdadr[0], fbi->mmio_base + FDADR0);
- __raw_writel(fbi->fdadr[1], fbi->mmio_base + FDADR1);
- __raw_writel(fbi->reg_lccr0 | LCCR0_ENB, fbi->mmio_base + LCCR0);
+ lcd_writel(fbi, LCCR3, fbi->reg_lccr3);
+ lcd_writel(fbi, LCCR2, fbi->reg_lccr2);
+ lcd_writel(fbi, LCCR1, fbi->reg_lccr1);
+ lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB);
+
+ lcd_writel(fbi, FDADR0, fbi->fdadr[0]);
+ lcd_writel(fbi, FDADR1, fbi->fdadr[1]);
+ lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB);
}
static void pxafb_disable_controller(struct pxafb_info *fbi)
add_wait_queue(&fbi->ctrlr_wait, &wait);
/* Clear LCD Status Register */
- __raw_writel(0xffffffff, fbi->mmio_base + LCSR);
+ lcd_writel(fbi, LCSR, 0xffffffff);
- lccr0 = __raw_readl(fbi->mmio_base + LCCR0) & ~LCCR0_LDM;
- __raw_writel(lccr0, fbi->mmio_base + LCCR0);
- __raw_writel(lccr0 | LCCR0_DIS, fbi->mmio_base + LCCR0);
+ lccr0 = lcd_readl(fbi, LCCR0) & ~LCCR0_LDM;
+ lcd_writel(fbi, LCCR0, lccr0);
+ lcd_writel(fbi, LCCR0, lccr0 | LCCR0_DIS);
schedule_timeout(200 * HZ / 1000);
remove_wait_queue(&fbi->ctrlr_wait, &wait);
static irqreturn_t pxafb_handle_irq(int irq, void *dev_id)
{
struct pxafb_info *fbi = dev_id;
- unsigned int lccr0, lcsr = __raw_readl(fbi->mmio_base + LCSR);
+ unsigned int lccr0, lcsr = lcd_readl(fbi, LCSR);
if (lcsr & LCSR_LDD) {
- lccr0 = __raw_readl(fbi->mmio_base + LCCR0) | LCCR0_LDM;
- __raw_writel(lccr0, fbi->mmio_base + LCCR0);
+ lccr0 = lcd_readl(fbi, LCCR0);
+ lcd_writel(fbi, LCCR0, lccr0 | LCCR0_LDM);
wake_up(&fbi->ctrlr_wait);
}
- __raw_writel(lcsr, fbi->mmio_base + LCSR);
+ lcd_writel(fbi, LCSR, lcsr);
return IRQ_HANDLED;
}