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clk: renesas: r8a7796: Add HS-USB clock
authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Wed, 19 Apr 2017 17:46:37 +0000 (02:46 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 May 2017 07:46:31 +0000 (09:46 +0200)
This patch adds HS-USB-IF clock for R8A7796 SoC.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c patch | blob | blame | history

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 63c664f1c2d7b844ed88f2239e483a5d940722df..5c95e636a8d6ace9ff6f44023a13dc616d02c8af 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -171,6 +171,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("vspi0",                 631,   R8A7796_CLK_S0D1),
        DEF_MOD("ehci1",                 702,   R8A7796_CLK_S3D4),
        DEF_MOD("ehci0",                 703,   R8A7796_CLK_S3D4),
+       DEF_MOD("hsusb",                 704,   R8A7796_CLK_S3D4),
        DEF_MOD("csi20",                 714,   R8A7796_CLK_CSI0),
        DEF_MOD("csi40",                 716,   R8A7796_CLK_CSI0),
        DEF_MOD("du2",                   722,   R8A7796_CLK_S2D1),