iwlwifi: define ANA_PLL values in iwl-csr.h
authorTomas Winkler <tomas.winkler@intel.com>
Thu, 17 Apr 2008 23:03:38 +0000 (16:03 -0700)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 7 May 2008 19:02:11 +0000 (15:02 -0400)
This patch defines ANA_PLL values in iwl-csr.h

Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/iwlwifi/iwl-3945.c
drivers/net/wireless/iwlwifi/iwl-csr.h

index d3406830c8e3591231d7234680effc342d4ef69a..8464397f78165154bf3dc03a3fc181238fa6c3f6 100644 (file)
@@ -1229,7 +1229,7 @@ int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
        iwl3945_power_init_handle(priv);
 
        spin_lock_irqsave(&priv->lock, flags);
-       iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
+       iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
        iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
                    CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 
index a59f48b02f05436a7ac17238c04dac7930500425..82c7445d292754c08f083e5eaf4c0bff6b793f76 100644 (file)
@@ -95,8 +95,7 @@
 #define CSR_GIO_CHICKEN_BITS    (CSR_BASE+0x100)
 #define CSR_LED_REG             (CSR_BASE+0x094)
 
-/* Analog phase-lock-loop configuration (3945 only)
- * Set bit 24. */
+/* Analog phase-lock-loop configuration  */
 #define CSR_ANA_PLL_CFG         (CSR_BASE+0x20c)
 /*
  * Indicates hardware rev, to determine CCK backoff for txpower calculation.
 #define CSR_LED_REG_TRUN_ON (0x78)
 #define CSR_LED_REG_TRUN_OFF (0x38)
 
+/* ANA_PLL */
+#define CSR39_ANA_PLL_CFG_VAL        (0x01000000)
+#define CSR50_ANA_PLL_CFG_VAL        (0x00880300)
+
 /*=== HBUS (Host-side Bus) ===*/
 #define HBUS_BASE      (0x400)
 /*