mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a
authoryangbo lu <yangbo.lu@nxp.com>
Thu, 20 Apr 2017 06:58:29 +0000 (14:58 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Fri, 28 Apr 2017 12:53:13 +0000 (14:53 +0200)
The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-of-esdhc.c

index 77dfc5915ddce5523f21512d9bc03834b3bbf2a8..44b016baa58592ceb126ef715652b51b9d758f3d 100644 (file)
@@ -457,6 +457,20 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
        if (esdhc->vendor_ver < VENDOR_V_23)
                pre_div = 2;
 
+       /*
+        * Limit SD clock to 167MHz for ls1046a according to its datasheet
+        */
+       if (clock > 167000000 &&
+           of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc"))
+               clock = 167000000;
+
+       /*
+        * Limit SD clock to 125MHz for ls1012a according to its datasheet
+        */
+       if (clock > 125000000 &&
+           of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc"))
+               clock = 125000000;
+
        /* Workaround to reduce the clock frequency for p1010 esdhc */
        if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
                if (clock > 20000000)