MIPS: Add Loongson cpu-feature-overrides.h

I have taken Wu Zhangjin's and Philippe Vachon's version as references,
did a little modification and tested on 16K page size kernel. It works
well.

Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k
page size still not working.  More work needed here.

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
new file mode 100644 (file)
index 0000000..550a10d
--- /dev/null
+++ b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h
@@ -0,0 +1,59 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2009 Wu Zhangjin <wuzj@lemote.com>
+ * Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
+ * Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
+ *
+ * reference: /proc/cpuinfo,
+ *     arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
+ *     arch/mips/kernel/proc.c(show_cpuinfo),
+ *      loongson2f user manual.
+ */
+
+#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_dcache_line_size() 32
+#define cpu_icache_line_size() 32
+#define cpu_scache_line_size() 32
+
+
+#define cpu_has_32fpr          1
+#define cpu_has_3k_cache       0
+#define cpu_has_4k_cache       1
+#define cpu_has_4kex           1
+#define cpu_has_64bits         1
+#define cpu_has_cache_cdex_p   0
+#define cpu_has_cache_cdex_s   0
+#define cpu_has_counter                1
+#define cpu_has_dc_aliases     1
+#define cpu_has_divec          0
+#define cpu_has_dsp            0
+#define cpu_has_ejtag          0
+#define cpu_has_fpu            1
+#define cpu_has_ic_fills_f_dc  0
+#define cpu_has_inclusive_pcaches      1
+#define cpu_has_llsc           1
+#define cpu_has_mcheck         0
+#define cpu_has_mdmx           0
+#define cpu_has_mips16         0
+#define cpu_has_mips32r1       0
+#define cpu_has_mips32r2       0
+#define cpu_has_mips3d         0
+#define cpu_has_mips64r1       0
+#define cpu_has_mips64r2       0
+#define cpu_has_mipsmt         0
+#define cpu_has_prefetch       0
+#define cpu_has_smartmips      0
+#define cpu_has_tlb            1
+#define cpu_has_tx39_cache     0
+#define cpu_has_userlocal      0
+#define cpu_has_vce            0
+#define cpu_has_vtag_icache    0
+#define cpu_has_watch          1
+#define cpu_icache_snoops_remote_store 1
+
+#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */