extern void dhd_os_dhdiovar_unlock(dhd_pub_t *pub);
extern int dhd_os_proto_block(dhd_pub_t * pub);
extern int dhd_os_proto_unblock(dhd_pub_t * pub);
-extern int dhd_os_ioctl_resp_wait(dhd_pub_t * pub, uint * condition, bool resched);
+extern int dhd_os_ioctl_resp_wait(dhd_pub_t * pub, uint * condition);
extern int dhd_os_ioctl_resp_wake(dhd_pub_t * pub);
extern unsigned int dhd_os_get_ioctl_resp_timeout(void);
extern void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec);
#define FW_BCM43438A0 "fw_bcm43438a0"
#define FW_BCM43438A1 "fw_bcm43438a1"
#define FW_BCM43436B0 "fw_bcm43436b0"
-#define FW_BCM43013B0 "fw_bcm43013b0"
+#define FW_BCM43012B0 "fw_bcm43012b0"
#define FW_BCM43341B1 "fw_bcm43341b0_ag"
#define FW_BCM43241B4 "fw_bcm43241b4_ag"
#define FW_BCM4339A0 "fw_bcm4339a0_ag"
#define FW_BCM4359B1 "fw_bcm4359b1_ag"
#define FW_BCM4359C0 "fw_bcm4359c0_ag"
-#define CLM_BCM43013B0 "clm_bcm43013b0"
+#define CLM_BCM43012B0 "clm_bcm43012b0"
#endif
#ifdef BCMPCIE
#define FW_BCM4356A2 "fw_bcm4356a2_pcie_ag"
strcpy(&fw_path[i+1], FW_BCM43436B0);
break;
case BCM43012_CHIP_ID:
- if (chiprev == BCM43013B0_CHIP_REV)
- strcpy(&fw_path[i+1], FW_BCM43013B0);
+ if (chiprev == BCM43012B0_CHIP_REV)
+ strcpy(&fw_path[i+1], FW_BCM43012B0);
break;
case BCM4334_CHIP_ID:
if (chiprev == BCM4334B1_CHIP_REV)
switch (chip) {
#ifdef BCMSDIO
case BCM43012_CHIP_ID:
- if (chiprev == BCM43013B0_CHIP_REV)
- strcpy(&clm_path[i+1], CLM_BCM43013B0);
+ if (chiprev == BCM43012B0_CHIP_REV)
+ strcpy(&clm_path[i+1], CLM_BCM43012B0);
break;
#endif
default:
conf->bus_rxglom = TRUE;
printf("%s: bus:rxglom = %d\n", __FUNCTION__, conf->bus_rxglom);
}
+ else if (!strncmp("dhd_poll=", full_param, len_param)) {
+ if (!strncmp(data, "0", 1))
+ conf->dhd_poll = 0;
+ else
+ conf->dhd_poll = 1;
+ printf("%s: dhd_poll = %d\n", __FUNCTION__, conf->dhd_poll);
+ }
else if (!strncmp("deferred_tx_len=", full_param, len_param)) {
conf->deferred_tx_len = (int)simple_strtol(data, NULL, 10);
printf("%s: deferred_tx_len = %d\n", __FUNCTION__, conf->deferred_tx_len);
}
#endif
-#ifdef BCMPCIE
-bool
-dhd_conf_read_pcie_params(dhd_pub_t *dhd, char *full_param, uint len_param)
-{
- struct dhd_conf *conf = dhd->conf;
- char *data = full_param+len_param;
-
- if (!strncmp("bus:deepsleep_disable=", full_param, len_param)) {
- if (!strncmp(data, "0", 1))
- conf->bus_deepsleep_disable = 0;
- else
- conf->bus_deepsleep_disable = 1;
- printf("%s: bus:deepsleep_disable = %d\n", __FUNCTION__, conf->bus_deepsleep_disable);
- }
- else
- return false;
-
- return true;
-}
-#endif
-
bool
dhd_conf_read_pm_params(dhd_pub_t *dhd, char *full_param, uint len_param)
{
char *pch, *pick_tmp;
int i;
- if (!strncmp("dhd_poll=", full_param, len_param)) {
- if (!strncmp(data, "0", 1))
- conf->dhd_poll = 0;
- else
- conf->dhd_poll = 1;
- printf("%s: dhd_poll = %d\n", __FUNCTION__, conf->dhd_poll);
- }
- else if (!strncmp("dhd_watchdog_ms=", full_param, len_param)) {
- dhd_watchdog_ms = (int)simple_strtol(data, NULL, 10);
- printf("%s: dhd_watchdog_ms = %d\n", __FUNCTION__, dhd_watchdog_ms);
- }
- else if (!strncmp("band=", full_param, len_param)) {
+ if (!strncmp("band=", full_param, len_param)) {
/* Process band:
* band=a for 5GHz only and band=b for 2.4GHz only
*/
conf->tsq = (int)simple_strtol(data, NULL, 10);
printf("%s: tsq = %d\n", __FUNCTION__, conf->tsq);
}
- else if (!strncmp("ctrl_resched=", full_param, len_param)) {
- conf->ctrl_resched = (int)simple_strtol(data, NULL, 10);
- printf("%s: ctrl_resched = %d\n", __FUNCTION__, conf->ctrl_resched);
- }
- else if (!strncmp("dhd_ioctl_timeout_msec=", full_param, len_param)) {
- conf->dhd_ioctl_timeout_msec = (int)simple_strtol(data, NULL, 10);
- printf("%s: dhd_ioctl_timeout_msec = %d\n", __FUNCTION__, conf->dhd_ioctl_timeout_msec);
- }
else
return false;
else if (dhd_conf_read_sdio_params(dhd, pick, len_param))
continue;
#endif /* BCMSDIO */
-#ifdef BCMPCIE
- else if (dhd_conf_read_pcie_params(dhd, pick, len_param))
- continue;
-#endif /* BCMPCIE */
else if (dhd_conf_read_pm_params(dhd, pick, len_param))
continue;
else if (dhd_conf_read_others(dhd, pick, len_param))
dhd_conf_preinit(dhd_pub_t *dhd)
{
struct dhd_conf *conf = dhd->conf;
-// int i;
CONFIG_TRACE(("%s: Enter\n", __FUNCTION__));
conf->txbf = -1;
conf->lpc = -1;
conf->disable_proptx = -1;
- conf->dhd_poll = -1;
#ifdef BCMSDIO
conf->bus_txglom = -1;
conf->use_rxchain = 0;
conf->txglom_ext = FALSE;
conf->tx_max_offset = 0;
conf->txglomsize = SDPCM_DEFGLOM_SIZE;
+ conf->dhd_poll = -1;
conf->txctl_tmo_fix = FALSE;
conf->tx_in_rx = TRUE;
conf->txglom_mode = SDPCM_TXGLOM_MDESC;
conf->txinrx_thres = -1;
conf->sd_f2_blocksize = 0;
conf->oob_enabled_later = FALSE;
-#endif
-#ifdef BCMPCIE
- conf->bus_deepsleep_disable = -1;
#endif
conf->ampdu_ba_wsize = 0;
conf->ampdu_hostreorder = -1;
conf->rsdb_mode = -2;
conf->vhtmode = -1;
conf->autocountry = -1;
- conf->ctrl_resched = 2;
- conf->dhd_ioctl_timeout_msec = 0;
#ifdef IAPSTA_PREINIT
memset(conf->iapsta_init, 0, sizeof(conf->iapsta_init));
memset(conf->iapsta_config, 0, sizeof(conf->iapsta_config));
conf->chip == BCM4371_CHIP_ID || conf->chip == BCM43569_CHIP_ID ||
conf->chip == BCM4359_CHIP_ID) {
#ifdef DHDTCPACK_SUPPRESS
-#ifdef BCMSDIO
conf->tcpack_sup_mode = TCPACK_SUP_REPLACE;
-#endif
#endif
dhd_rxbound = 128;
dhd_txbound = 64;
#define BCM43430A0_CHIP_REV 0
#define BCM43430A1_CHIP_REV 1
#define BCM43430A2_CHIP_REV 2
-#define BCM43013B0_CHIP_REV 1
+#define BCM43012B0_CHIP_REV 1
#define BCM4330B2_CHIP_REV 4
#define BCM4334B1_CHIP_REV 3
#define BCM43341B0_CHIP_REV 2
int txbf;
int lpc;
int disable_proptx;
- int dhd_poll;
#ifdef BCMSDIO
int bus_txglom;
int use_rxchain;
*/
int tx_max_offset;
uint txglomsize;
+ int dhd_poll;
bool txctl_tmo_fix;
bool tx_in_rx;
bool txglom_mode;
int dhd_txminmax; // -1=DATABUFCNT(bus)
uint sd_f2_blocksize;
bool oob_enabled_later;
-#endif
-#ifdef BCMPCIE
- int bus_deepsleep_disable;
#endif
int ampdu_ba_wsize;
int ampdu_hostreorder;
char iapsta_enable[50];
#endif
int autocountry;
- int ctrl_resched;
- int dhd_ioctl_timeout_msec;
int tsq;
} dhd_conf_t;
// terence 20151210: set bus:txglom after dhd_txglom_enable since it's possible changed in dhd_conf_set_txglom_params
dhd_conf_set_intiovar(dhd, WLC_SET_VAR, "bus:txglom", dhd->conf->bus_txglom, 0, FALSE);
#endif /* defined(BCMSDIO) */
-#if defined(BCMPCIE)
- dhd_conf_set_intiovar(dhd, WLC_SET_VAR, "bus:deepsleep_disable", dhd->conf->bus_deepsleep_disable, 0, FALSE);
-#endif /* defined(BCMPCIE) */
#if defined(BCMSDIO)
#ifdef PROP_TXSTATUS
}
int
-dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool resched)
+dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition)
{
dhd_info_t * dhd = (dhd_info_t *)(pub->info);
- int timeout, timeout_tmp = dhd_ioctl_timeout_msec;
-
- if (!resched && pub->conf->ctrl_resched>0 && pub->conf->dhd_ioctl_timeout_msec>0) {
- timeout_tmp = dhd_ioctl_timeout_msec;
- dhd_ioctl_timeout_msec = pub->conf->dhd_ioctl_timeout_msec;
- }
+ int timeout;
/* Convert timeout in millsecond to jiffies */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27))
timeout = wait_event_timeout(dhd->ioctl_resp_wait, (*condition), timeout);
- if (!resched && pub->conf->ctrl_resched>0 && pub->conf->dhd_ioctl_timeout_msec>0) {
- dhd_ioctl_timeout_msec = timeout_tmp;
- }
-
DHD_PERIM_LOCK(pub);
return timeout;
#include <pcie_core.h>
#include <bcmpcie.h>
#include <dhd_pcie.h>
-#include <dhd_config.h>
#if defined(DHD_LB)
#include <linux/cpu.h>
int timeleft;
unsigned long flags;
int ret = 0;
- static uint cnt = 0;
DHD_TRACE(("%s: Enter\n", __FUNCTION__));
dhd_msgbuf_rxbuf_post_ioctlresp_bufs(dhd);
- timeleft = dhd_os_ioctl_resp_wait(dhd, &prot->ioctl_received, false);
-
- if (dhd->conf->ctrl_resched > 0 && timeleft == 0) {
- cnt++;
- if (cnt <= dhd->conf->ctrl_resched) {
- uint32 intstatus = 0, intmask = 0;
- intstatus = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, PCIMailBoxInt, 0, 0);
- intmask = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, PCIMailBoxMask, 0, 0);
- if (intstatus) {
- DHD_ERROR(("%s: reschedule dhd_dpc, cnt=%d, intstatus=0x%x, intmask=0x%x\n",
- __FUNCTION__, cnt, intstatus, intmask));
- dhd->bus->ipend = TRUE;
- dhd->bus->dpc_sched = TRUE;
- dhd_sched_dpc(dhd);
- timeleft = dhd_os_ioctl_resp_wait(dhd, &prot->ioctl_received, true);
- }
- }
- } else {
- cnt = 0;
- }
-
+ timeleft = dhd_os_ioctl_resp_wait(dhd, &prot->ioctl_received);
if (timeleft == 0) {
dhd->rxcnt_timeout++;
dhd->rx_ctlerrs++;
dhdpcie_bus_intstatus(dhd_bus_t *bus)
{
uint32 intstatus = 0;
-#ifndef DHD_READ_INTSTATUS_IN_DPC
uint32 intmask = 0;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
if ((bus->sih->buscorerev == 6) || (bus->sih->buscorerev == 4) ||
(bus->sih->buscorerev == 2)) {
/* this is a PCIE core register..not a config register... */
intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, PCIMailBoxInt, 0, 0);
-#ifndef DHD_READ_INTSTATUS_IN_DPC
/* this is a PCIE core register..not a config register... */
intmask = si_corereg(bus->sih, bus->sih->buscoreidx, PCIMailBoxMask, 0, 0);
intstatus);
intstatus &= intmask;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
/* Is device removed. intstatus & intmask read 0xffffffff */
if (intstatus == (uint32)-1) {
#endif /* CUSTOMER_HW4_DEBUG */
}
-#ifdef DHD_READ_INTSTATUS_IN_DPC
- /*
- * The fourth argument to si_corereg is the "mask" fields of the register to update
- * and the fifth field is the "value" to update. Now if we are interested in only
- * few fields of the "mask" bit map, we should not be writing back what we read
- * By doing so, we might clear/ack interrupts that are not handled yet.
- */
- si_corereg(bus->sih, bus->sih->buscoreidx, PCIMailBoxInt, bus->def_intmask,
- intstatus);
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
intstatus &= bus->def_intmask;
}
int32
dhdpcie_bus_isr(dhd_bus_t *bus)
{
-#ifndef DHD_READ_INTSTATUS_IN_DPC
uint32 intstatus = 0;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
do {
DHD_TRACE(("%s: Enter\n", __FUNCTION__));
break;
}
-#ifndef DHD_READ_INTSTATUS_IN_DPC
intstatus = dhdpcie_bus_intstatus(bus);
/* Check if the interrupt is ours or not */
/* Count the interrupt call */
bus->intrcount++;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
/* read interrupt status register!! Status bits will be cleared in DPC !! */
bus->ipend = TRUE;
/* Set the poll and/or interrupt flags */
bus->intr = (bool)dhd_intr;
- if ((bus->poll = (bool)dhd_poll))
- bus->pollrate = 1;
bus->wait_for_d3_ack = 1;
bus->suspended = FALSE;
bool dhd_bus_watchdog(dhd_pub_t *dhd)
{
unsigned long flags;
+#ifdef DHD_DEBUG
dhd_bus_t *bus;
bus = dhd->bus;
dhd->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_WD;
DHD_GENERAL_UNLOCK(dhd, flags);
-#ifdef DHD_DEBUG
#ifdef DHD_PCIE_RUNTIMEPM
dhdpcie_runtime_bus_wake(dhd, TRUE, __builtin_return_address(0));
#endif /* DHD_PCIE_RUNTIMEPM */
}
#endif /* DHD_DEBUG */
-#ifdef DHD_READ_INTSTATUS_IN_DPC
- if (bus->poll) {
- bus->ipend = TRUE;
- bus->dpc_sched = TRUE;
- dhd_sched_dpc(bus->dhd); /* queue DPC now!! */
- }
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
-
#ifdef PCIE_OOB
/* If haven't communicated with device for a while, deassert the Device_Wake GPIO */
if (dhd_doorbell_timeout != 0 && !(bus->dhd->busstate == DHD_BUS_SUSPEND) &&
/* External conf takes precedence if specified */
dhd_conf_preinit(bus->dhd);
- if (bus->dhd->conf_path[0] == '\0') {
- dhd_conf_set_path(bus->dhd, "config.txt", bus->dhd->conf_path, bus->nv_path);
- }
if (bus->dhd->clm_path[0] == '\0') {
dhd_conf_set_path(bus->dhd, "clm.blob", bus->dhd->clm_path, bus->fw_path);
}
+ dhd_conf_set_clm_name_by_chip(bus->dhd, bus->dhd->clm_path);
+ if (bus->dhd->conf_path[0] == '\0') {
+ dhd_conf_set_path(bus->dhd, "config.txt", bus->dhd->conf_path, bus->nv_path);
+ }
#ifdef CONFIG_PATH_AUTO_SELECT
dhd_conf_set_conf_name_by_chip(bus->dhd, bus->dhd->conf_path);
#endif
}
-void
-dhd_set_bus_params(struct dhd_bus *bus)
-{
- if (bus->dhd->conf->dhd_poll >= 0) {
- bus->poll = bus->dhd->conf->dhd_poll;
- if (!bus->pollrate)
- bus->pollrate = 1;
- printf("%s: set polling mode %d\n", __FUNCTION__, bus->dhd->conf->dhd_poll);
- }
-}
-
static int
dhdpcie_download_firmware(struct dhd_bus *bus, osl_t *osh)
{
DHD_OS_WAKE_LOCK(bus->dhd);
dhd_set_path_params(bus);
- dhd_set_bus_params(bus);
ret = _dhdpcie_download_firmware(bus);
bus->dhd->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DPC;
DHD_GENERAL_UNLOCK(bus->dhd, flags);
-#ifdef DHD_READ_INTSTATUS_IN_DPC
- if (bus->ipend) {
- bus->ipend = FALSE;
- bus->intstatus = dhdpcie_bus_intstatus(bus);
- /* Check if the interrupt is ours or not */
- if (bus->intstatus == 0) {
- goto INTR_ON;
- }
- bus->intrcount++;
- }
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
-
resched = dhdpcie_bus_process_mailbox_intr(bus, bus->intstatus);
if (!resched) {
bus->intstatus = 0;
-#ifdef DHD_READ_INTSTATUS_IN_DPC
-INTR_ON:
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
if (!bus->pci_d3hot_done) {
dhdpcie_bus_intr_enable(bus);
} else {
struct pktq txq; /* Queue length used for flow-control */
bool intr; /* Use interrupts */
- bool poll; /* Use polling */
bool ipend; /* Device interrupt is pending */
bool intdis; /* Interrupts disabled by isr */
uint intrcount; /* Count of device interrupt callbacks */
snprintf(dhdpcie_info->pciname, sizeof(dhdpcie_info->pciname),
"dhdpcie:%s", pci_name(pdev));
#ifdef DHD_USE_MSI
- printf("%s: MSI enabled\n", __FUNCTION__);
- err = pci_enable_msi(pdev);
- if (err < 0) {
- DHD_ERROR(("%s: pci_enable_msi() failed, %d, fall back to INTx\n", __FUNCTION__, err));
- }
-#else
- printf("%s: MSI not enabled\n", __FUNCTION__);
+ pci_enable_msi(pdev);
#endif /* DHD_USE_MSI */
err = request_irq(pdev->irq, dhdpcie_isr, IRQF_SHARED,
dhdpcie_info->pciname, bus);
{
int timeleft;
uint rxlen = 0;
- static uint cnt = 0;
DHD_TRACE(("%s: Enter\n", __FUNCTION__));
return -EIO;
/* Wait until control frame is available */
- timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, false);
+ timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen);
dhd_os_sdlock(bus->dhd);
rxlen = bus->rxlen;
bus->rxlen = 0;
dhd_os_sdunlock(bus->dhd);
- if (bus->dhd->conf->ctrl_resched > 0 && !rxlen && timeleft == 0) {
- cnt++;
- if (cnt <= bus->dhd->conf->ctrl_resched) {
- uint32 status, retry = 0;
- R_SDREG(status, &bus->regs->intstatus, retry);
- if ((status & I_HMB_HOST_INT) || PKT_AVAILABLE(bus, status)) {
- DHD_ERROR(("%s: reschedule dhd_dpc, cnt=%d, status=0x%x\n",
- __FUNCTION__, cnt, status));
- bus->ipend = TRUE;
- bus->dpc_sched = TRUE;
- dhd_sched_dpc(bus->dhd);
-
- /* Wait until control frame is available */
- timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, true);
-
- dhd_os_sdlock(bus->dhd);
- rxlen = bus->rxlen;
- bcopy(bus->rxctl, msg, MIN(msglen, rxlen));
- bus->rxlen = 0;
- dhd_os_sdunlock(bus->dhd);
- }
- }
- } else {
- cnt = 0;
- }
-
if (rxlen) {
DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
__FUNCTION__, rxlen, msglen));
#define EPI_VERSION_DEV 1.363.59
/* Driver Version String, ASCII, 32 chars max */
-#define EPI_VERSION_STR "1.363.59.144.11 (r)"
+#define EPI_VERSION_STR "1.363.59.144.10 (r)"
#endif /* _epivers_h_ */
-DWIFI_ACT_FRAME -DARP_OFFLOAD_SUPPORT -DSUPPORT_PM2_ONLY \
-DKEEP_ALIVE -DPKT_FILTER_SUPPORT -DPNO_SUPPORT -DDHDTCPACK_SUPPRESS \
-DDHD_DONOT_FORWARD_BCMEVENT_AS_NETWORK_PKT -DRXFRAME_THREAD \
- -DTSQ_MULTIPLIER -DMFP -DWL_EXT_IAPSTA \
+ -DTSQ_MULTIPLIER -DMFP \
+ -DBCMSDIOH_TXGLOM_EXT -DWL_EXT_IAPSTA \
-DENABLE_INSMOD_NO_FW_LOAD \
-I$(src) -I$(src)/include
ifneq ($(CONFIG_BCMDHD_SDIO),)
DHDCFLAGS += \
-DBCMSDIO -DMMC_SDIO_ABORT -DBCMLXSDMMC -DUSE_SDIOFIFO_IOVAR \
- -DBDC -DDHD_USE_IDLECOUNT -DBCMSDIOH_TXGLOM -DBCMSDIOH_TXGLOM_EXT \
+ -DBDC -DDHD_USE_IDLECOUNT -DBCMSDIOH_TXGLOM \
-DCUSTOM_SDIO_F2_BLKSIZE=256
+ifeq ($(CONFIG_VTS_SUPPORT),y)
+DHDCFLAGS += \
+ -DGSCAN_SUPPORT -DRTT_SUPPORT -DCUSTOM_FORCE_NODFS_FLAG \
+ -DLINKSTAT_SUPPORT -DDEBUGABILITY -DDBG_PKT_MON -DKEEP_ALIVE -DPKT_FILTER_SUPPORT \
+ -DAPF -DNDO_CONFIG_SUPPORT -DRSSI_MONITOR_SUPPORT -DDHDTCPACK_SUPPRESS -DDHD_WAKE_STATUS \
+ -DCUSTOM_COUNTRY_CODE -DDHD_FW_COREDUMP -DDHD_USE_STATIC_MEMDUMP
+
+DHDOFILES += dhd_debug_linux.o dhd_debug.o bcmxtlv.o \
+ dhd_rtt.o bcm_app_utils.o
+endif
+
DHDOFILES += bcmsdh.o bcmsdh_linux.o bcmsdh_sdmmc.o bcmsdh_sdmmc_linux.o \
dhd_sdio.o dhd_cdc.o dhd_wlfc.o
DHDCFLAGS += \
-DPCIE_FULL_DONGLE -DBCMPCIE -DCUSTOM_DPC_PRIO_SETTING=-1
DHDCFLAGS += -DDHD_PCIE_BAR1_WIN_BASE_FIX=0x200000
-ifneq ($(CONFIG_PCI_MSI),)
DHDCFLAGS += -DDHD_USE_MSI
-endif
-ifeq ($(CONFIG_DHD_USE_STATIC_BUF),y)
-DHDCFLAGS += -DDHD_USE_STATIC_CTRLBUF
-endif
DHDOFILES += dhd_pcie.o dhd_pcie_linux.o pcie_core.o dhd_flowring.o \
dhd_msgbuf.o
endif
-ifeq ($(CONFIG_VTS_SUPPORT),y)
-DHDCFLAGS += \
- -DGSCAN_SUPPORT -DRTT_SUPPORT -DCUSTOM_FORCE_NODFS_FLAG \
- -DLINKSTAT_SUPPORT -DDEBUGABILITY -DDBG_PKT_MON -DKEEP_ALIVE -DPKT_FILTER_SUPPORT \
- -DAPF -DNDO_CONFIG_SUPPORT -DRSSI_MONITOR_SUPPORT -DDHDTCPACK_SUPPRESS -DDHD_WAKE_STATUS \
- -DCUSTOM_COUNTRY_CODE -DDHD_FW_COREDUMP -DEXPLICIT_DISCIF_CLEANUP
-
-DHDOFILES += dhd_debug_linux.o dhd_debug.o bcmxtlv.o \
- dhd_rtt.o bcm_app_utils.o
-endif
-
obj-$(CONFIG_BCMDHD) += dhd.o
dhd-objs += $(DHDOFILES)
ifeq ($(CONFIG_DHD_USE_STATIC_BUF),y)
#obj-m += dhd_static_buf.o
-DHDCFLAGS += -DSTATIC_WL_PRIV_STRUCT -DENHANCED_STATIC_BUF
-DHDCFLAGS += -DDHD_USE_STATIC_MEMDUMP -DCONFIG_DHD_USE_STATIC_BUF
+DHDCFLAGS += -DSTATIC_WL_PRIV_STRUCT -DENHANCED_STATIC_BUF -DCONFIG_DHD_USE_STATIC_BUF
endif
ifneq ($(CONFIG_WIRELESS_EXT),)
#include <drivers/mmc/core/host.h>
#else
#include <linux/mmc/host.h>
+static inline void mmc_host_clk_hold(struct mmc_host *host)
+{
+}
+
+static inline void mmc_host_clk_release(struct mmc_host *host)
+{
+}
+
+static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
+{
+ return host->ios.clock;
+}
#endif /* (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 0, 0)) */
#include <linux/mmc/card.h>
#include <linux/mmc/sdio_func.h>
extern void dhd_os_dhdiovar_unlock(dhd_pub_t *pub);
extern int dhd_os_proto_block(dhd_pub_t * pub);
extern int dhd_os_proto_unblock(dhd_pub_t * pub);
-extern int dhd_os_ioctl_resp_wait(dhd_pub_t * pub, uint * condition, bool resched);
+extern int dhd_os_ioctl_resp_wait(dhd_pub_t * pub, uint * condition);
extern int dhd_os_ioctl_resp_wake(dhd_pub_t * pub);
extern unsigned int dhd_os_get_ioctl_resp_timeout(void);
extern void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec);
#define CONFIG_BCM43341B0 "config_43341b0.txt"\r
#define CONFIG_BCM43241B4 "config_43241b4.txt"\r
#define CONFIG_BCM4339A0 "config_4339a0.txt"\r
-#define CONFIG_BCM43454C0 "config_43454c0.txt"\r
#define CONFIG_BCM43455C0 "config_43455c0.txt"\r
#define CONFIG_BCM43456C5 "config_43456c5.txt"\r
#define CONFIG_BCM4354A1 "config_4354a1.txt"\r
#endif\r
#define CONFIG_BCM4356A2 "config_4356a2.txt"\r
-#define CONFIG_BCM4358A3 "config_4358a3.txt"\r
+#define CONFIG_BCM4358A3 "config_4358.txt"\r
#define CONFIG_BCM4359B1 "config_4359b1.txt"\r
#define CONFIG_BCM4359C0 "config_4359c0.txt"\r
#endif\r
#define FW_BCM43438A0 "fw_bcm43438a0"\r
#define FW_BCM43438A1 "fw_bcm43438a1"\r
#define FW_BCM43436B0 "fw_bcm43436b0"\r
-#define FW_BCM43013B0 "fw_bcm43013b0"\r
+#define FW_BCM43012B0 "fw_bcm43012b0"\r
#define FW_BCM43341B1 "fw_bcm43341b0_ag"\r
#define FW_BCM43241B4 "fw_bcm43241b4_ag"\r
#define FW_BCM4339A0 "fw_bcm4339a0_ag"\r
#define FW_BCM43456C5 "fw_bcm43456c5_ag"\r
#define FW_BCM4354A1 "fw_bcm4354a1_ag"\r
#define FW_BCM4356A2 "fw_bcm4356a2_ag"\r
-#define FW_BCM4358A3 "fw_bcm4358a3_ag"\r
+#define FW_BCM4358A3 "fw_bcm4358_ag"\r
#define FW_BCM4359B1 "fw_bcm4359b1_ag"\r
#define FW_BCM4359C0 "fw_bcm4359c0_ag"\r
\r
-#define CLM_BCM43013B0 "clm_bcm43013b0"\r
+#define CLM_BCM43012B0 "clm_bcm43012b0"\r
#endif\r
#ifdef BCMPCIE\r
#define FW_BCM4356A2 "fw_bcm4356a2_pcie_ag"\r
strcpy(&fw_path[i+1], FW_BCM43436B0);\r
break;\r
case BCM43012_CHIP_ID:\r
- if (chiprev == BCM43013B0_CHIP_REV)\r
- strcpy(&fw_path[i+1], FW_BCM43013B0);\r
+ if (chiprev == BCM43012B0_CHIP_REV)\r
+ strcpy(&fw_path[i+1], FW_BCM43012B0);\r
break;\r
case BCM4334_CHIP_ID:\r
if (chiprev == BCM4334B1_CHIP_REV)\r
if (chiprev == BCM4339A0_CHIP_REV)\r
strcpy(&fw_path[i+1], FW_BCM4339A0);\r
break;\r
- case BCM4345_CHIP_ID:\r
case BCM43454_CHIP_ID:\r
if (chiprev == BCM43455C0_CHIP_REV)\r
strcpy(&fw_path[i+1], FW_BCM43455C0);\r
- else if (chiprev == BCM43456C5_CHIP_REV)\r
+ break;\r
+ case BCM4345_CHIP_ID:\r
+ if (chiprev == BCM43455C0_CHIP_REV)\r
+ strcpy(&fw_path[i+1], FW_BCM43455C0);\r
+ else if (chiprev == BCM43455C5_CHIP_REV)\r
strcpy(&fw_path[i+1], FW_BCM43456C5);\r
break;\r
case BCM4354_CHIP_ID:\r
switch (chip) {\r
#ifdef BCMSDIO\r
case BCM43012_CHIP_ID:\r
- if (chiprev == BCM43013B0_CHIP_REV)\r
- strcpy(&clm_path[i+1], CLM_BCM43013B0);\r
+ if (chiprev == BCM43012B0_CHIP_REV)\r
+ strcpy(&clm_path[i+1], CLM_BCM43012B0);\r
break;\r
#endif\r
default:\r
if (chiprev == BCM4335A0_CHIP_REV)\r
strcpy(&conf_path[i+1], CONFIG_BCM4339A0);\r
break;\r
- case BCM43454_CHIP_ID:\r
- if (chiprev == BCM43455C0_CHIP_REV)\r
- strcpy(&conf_path[i+1], CONFIG_BCM43454C0);\r
- break;\r
case BCM4345_CHIP_ID:\r
+ case BCM43454_CHIP_ID:\r
if (chiprev == BCM43455C0_CHIP_REV)\r
strcpy(&conf_path[i+1], CONFIG_BCM43455C0);\r
- else if (chiprev == BCM43456C5_CHIP_REV)\r
+ else if (chiprev == BCM43455C5_CHIP_REV)\r
strcpy(&conf_path[i+1], CONFIG_BCM43456C5);\r
break;\r
case BCM4339_CHIP_ID:\r
dhd_conf_add_pkt_filter(dhd_pub_t *dhd)\r
{\r
int i, j;\r
- char str[16];\r
+ char str[12];\r
#define MACS "%02x%02x%02x%02x%02x%02x"\r
\r
/*\r
}\r
dhd->pktfilter_count += i;\r
\r
- if (dhd->conf->magic_pkt_filter_add) {\r
- strcat(dhd->conf->magic_pkt_filter_add, " 0x");\r
- strcat(dhd->conf->magic_pkt_filter_add, "FFFFFFFFFFFF");\r
+ for(i=0; i<dhd->conf->magic_pkt_filter_add.count; i++) {\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], " 0x");\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], "FFFFFFFFFFFF");\r
for (j=0; j<16; j++)\r
- strcat(dhd->conf->magic_pkt_filter_add, "FFFFFFFFFFFF");\r
- strcat(dhd->conf->magic_pkt_filter_add, " 0x");\r
- strcat(dhd->conf->magic_pkt_filter_add, "FFFFFFFFFFFF");\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], "FFFFFFFFFFFF");\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], " 0x");\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], "FFFFFFFFFFFF");\r
sprintf(str, MACS, MAC2STRDBG(dhd->mac.octet));\r
for (j=0; j<16; j++)\r
- strncat(dhd->conf->magic_pkt_filter_add, str, 12);\r
- dhd->pktfilter[dhd->pktfilter_count] = dhd->conf->magic_pkt_filter_add;\r
+ strcat(&dhd->conf->magic_pkt_filter_add.filter[i][0], str);\r
+ dhd->pktfilter[i+dhd->pktfilter_count] = dhd->conf->magic_pkt_filter_add.filter[i];\r
dhd->pktfilter_count += 1;\r
}\r
}\r
printf("\n");\r
}\r
else if (!strncmp("magic_pkt_filter_add=", full_param, len_param)) {\r
- if (!(conf->magic_pkt_filter_add = kmalloc(MAGIC_PKT_FILTER_LEN, GFP_KERNEL))) {\r
- CONFIG_ERROR(("%s: kmalloc failed\n", __FUNCTION__));\r
- } else {\r
- strcpy(conf->magic_pkt_filter_add, data);\r
- printf("%s: magic_pkt_filter_add = %s\n", __FUNCTION__, conf->magic_pkt_filter_add);\r
+ pick_tmp = data;\r
+ pch = bcmstrtok(&pick_tmp, ",.-", 0);\r
+ i=0;\r
+ while (pch != NULL && i<DHD_CONF_FILTER_MAX) {\r
+ strcpy(&conf->magic_pkt_filter_add.filter[i][0], pch);\r
+ printf("%s: magic_pkt_filter_add[%d][] = %s\n", __FUNCTION__, i, &conf->magic_pkt_filter_add.filter[i][0]);\r
+ pch = bcmstrtok(&pick_tmp, ",.-", 0);\r
+ i++;\r
}\r
+ conf->magic_pkt_filter_add.count = i;\r
}\r
else\r
return false;\r
conf->bus_rxglom = TRUE;\r
printf("%s: bus:rxglom = %d\n", __FUNCTION__, conf->bus_rxglom);\r
}\r
+ else if (!strncmp("dhd_poll=", full_param, len_param)) {\r
+ if (!strncmp(data, "0", 1))\r
+ conf->dhd_poll = 0;\r
+ else\r
+ conf->dhd_poll = 1;\r
+ printf("%s: dhd_poll = %d\n", __FUNCTION__, conf->dhd_poll);\r
+ }\r
else if (!strncmp("deferred_tx_len=", full_param, len_param)) {\r
conf->deferred_tx_len = (int)simple_strtol(data, NULL, 10);\r
printf("%s: deferred_tx_len = %d\n", __FUNCTION__, conf->deferred_tx_len);\r
}\r
#endif\r
\r
-#ifdef BCMPCIE\r
-bool\r
-dhd_conf_read_pcie_params(dhd_pub_t *dhd, char *full_param, uint len_param)\r
-{\r
- struct dhd_conf *conf = dhd->conf;\r
- char *data = full_param+len_param;\r
-\r
- if (!strncmp("bus:deepsleep_disable=", full_param, len_param)) {\r
- if (!strncmp(data, "0", 1))\r
- conf->bus_deepsleep_disable = 0;\r
- else\r
- conf->bus_deepsleep_disable = 1;\r
- printf("%s: bus:deepsleep_disable = %d\n", __FUNCTION__, conf->bus_deepsleep_disable);\r
- }\r
- else\r
- return false;\r
-\r
- return true;\r
-}\r
-#endif\r
-\r
bool\r
dhd_conf_read_pm_params(dhd_pub_t *dhd, char *full_param, uint len_param)\r
{\r
char *pch, *pick_tmp;\r
int i;\r
\r
- if (!strncmp("dhd_poll=", full_param, len_param)) {\r
- if (!strncmp(data, "0", 1))\r
- conf->dhd_poll = 0;\r
- else\r
- conf->dhd_poll = 1;\r
- printf("%s: dhd_poll = %d\n", __FUNCTION__, conf->dhd_poll);\r
- }\r
- else if (!strncmp("dhd_watchdog_ms=", full_param, len_param)) {\r
- dhd_watchdog_ms = (int)simple_strtol(data, NULL, 10);\r
- printf("%s: dhd_watchdog_ms = %d\n", __FUNCTION__, dhd_watchdog_ms);\r
- }\r
- else if (!strncmp("band=", full_param, len_param)) {\r
+ if (!strncmp("band=", full_param, len_param)) {\r
/* Process band:\r
* band=a for 5GHz only and band=b for 2.4GHz only\r
*/\r
conf->tsq = (int)simple_strtol(data, NULL, 10);\r
printf("%s: tsq = %d\n", __FUNCTION__, conf->tsq);\r
}\r
- else if (!strncmp("ctrl_resched=", full_param, len_param)) {\r
- conf->ctrl_resched = (int)simple_strtol(data, NULL, 10);\r
- printf("%s: ctrl_resched = %d\n", __FUNCTION__, conf->ctrl_resched);\r
- }\r
- else if (!strncmp("dhd_ioctl_timeout_msec=", full_param, len_param)) {\r
- conf->dhd_ioctl_timeout_msec = (int)simple_strtol(data, NULL, 10);\r
- printf("%s: dhd_ioctl_timeout_msec = %d\n", __FUNCTION__, conf->dhd_ioctl_timeout_msec);\r
- }\r
else\r
return false;\r
\r
else if (dhd_conf_read_sdio_params(dhd, pick, len_param))\r
continue;\r
#endif /* BCMSDIO */\r
-#ifdef BCMPCIE\r
- else if (dhd_conf_read_pcie_params(dhd, pick, len_param))\r
- continue;\r
-#endif /* BCMPCIE */\r
else if (dhd_conf_read_pm_params(dhd, pick, len_param))\r
continue;\r
else if (dhd_conf_read_others(dhd, pick, len_param))\r
dhd_conf_preinit(dhd_pub_t *dhd)\r
{\r
struct dhd_conf *conf = dhd->conf;\r
-// int i;\r
\r
CONFIG_TRACE(("%s: Enter\n", __FUNCTION__));\r
\r
dhd_conf_free_mac_list(&conf->nv_by_mac);\r
dhd_conf_free_chip_nv_path_list(&conf->nv_by_chip);\r
#endif\r
- if (conf->magic_pkt_filter_add)\r
- kfree(conf->magic_pkt_filter_add);\r
memset(&conf->country_list, 0, sizeof(conf_country_list_t));\r
conf->band = -1;\r
conf->mimo_bw_cap = -1;\r
#ifdef PKT_FILTER_SUPPORT\r
memset(&conf->pkt_filter_add, 0, sizeof(conf_pkt_filter_add_t));\r
memset(&conf->pkt_filter_del, 0, sizeof(conf_pkt_filter_del_t));\r
+ memset(&conf->magic_pkt_filter_add, 0, sizeof(conf_pkt_filter_del_t));\r
#endif\r
conf->srl = -1;\r
conf->lrl = -1;\r
conf->txbf = -1;\r
conf->lpc = -1;\r
conf->disable_proptx = -1;\r
- conf->dhd_poll = -1;\r
#ifdef BCMSDIO\r
conf->bus_txglom = -1;\r
conf->use_rxchain = 0;\r
conf->txglom_ext = FALSE;\r
conf->tx_max_offset = 0;\r
conf->txglomsize = SDPCM_DEFGLOM_SIZE;\r
+ conf->dhd_poll = -1;\r
conf->txctl_tmo_fix = 5;\r
conf->tx_in_rx = TRUE;\r
conf->txglom_mode = SDPCM_TXGLOM_MDESC;\r
conf->txinrx_thres = -1;\r
conf->sd_f2_blocksize = 0;\r
conf->oob_enabled_later = FALSE;\r
-#endif\r
-#ifdef BCMPCIE\r
- conf->bus_deepsleep_disable = 1;\r
#endif\r
conf->ampdu_ba_wsize = 0;\r
conf->ampdu_hostreorder = -1;\r
conf->rsdb_mode = -2;\r
conf->vhtmode = -1;\r
conf->autocountry = -1;\r
- conf->ctrl_resched = 2;\r
- conf->dhd_ioctl_timeout_msec = 0;\r
#ifdef IAPSTA_PREINIT\r
memset(conf->iapsta_init, 0, sizeof(conf->iapsta_init));\r
memset(conf->iapsta_config, 0, sizeof(conf->iapsta_config));\r
conf->chip == BCM4371_CHIP_ID || conf->chip == BCM43569_CHIP_ID ||\r
conf->chip == BCM4359_CHIP_ID) {\r
#ifdef DHDTCPACK_SUPPRESS\r
-#ifdef BCMSDIO\r
conf->tcpack_sup_mode = TCPACK_SUP_REPLACE;\r
-#endif\r
#endif\r
dhd_rxbound = 128;\r
dhd_txbound = 64;\r
dhd_conf_free_mac_list(&dhd->conf->nv_by_mac);\r
dhd_conf_free_chip_nv_path_list(&dhd->conf->nv_by_chip);\r
#endif\r
- if (dhd->conf->magic_pkt_filter_add)\r
- kfree(dhd->conf->magic_pkt_filter_add);\r
memset(dhd->conf, 0, sizeof(dhd_conf_t));\r
return 0;\r
}\r
dhd_conf_free_mac_list(&dhd->conf->nv_by_mac);\r
dhd_conf_free_chip_nv_path_list(&dhd->conf->nv_by_chip);\r
#endif\r
- if (dhd->conf->magic_pkt_filter_add)\r
- kfree(dhd->conf->magic_pkt_filter_add);\r
MFREE(dhd->osh, dhd->conf, sizeof(dhd_conf_t));\r
}\r
dhd->conf = NULL;\r
#define BCM43430A0_CHIP_REV 0
#define BCM43430A1_CHIP_REV 1
#define BCM43430A2_CHIP_REV 2
-#define BCM43013B0_CHIP_REV 1
+#define BCM43012B0_CHIP_REV 1
#define BCM4330B2_CHIP_REV 4
#define BCM4334B1_CHIP_REV 3
#define BCM43341B0_CHIP_REV 2
#define BCM4335A0_CHIP_REV 2
#define BCM4339A0_CHIP_REV 1
#define BCM43455C0_CHIP_REV 6
-#define BCM43456C5_CHIP_REV 9
+#define BCM43455C5_CHIP_REV 9
#define BCM4354A1_CHIP_REV 1
#define BCM4359B1_CHIP_REV 5
#define BCM4359C0_CHIP_REV 9
#ifdef PKT_FILTER_SUPPORT
#define DHD_CONF_FILTER_MAX 8
#define PKT_FILTER_LEN 300
-#define MAGIC_PKT_FILTER_LEN 450
typedef struct conf_pkt_filter_add {
uint32 count;
char filter[DHD_CONF_FILTER_MAX][PKT_FILTER_LEN];
wl_channel_list_t channels;
uint roam_off;
uint roam_off_suspend;
- int roam_trigger[2];
+ int roam_trigger[2];
int roam_scan_period[2];
int roam_delta[2];
int fullroamperiod;
#ifdef PKT_FILTER_SUPPORT
conf_pkt_filter_add_t pkt_filter_add;
conf_pkt_filter_del_t pkt_filter_del;
- char *magic_pkt_filter_add;
+ conf_pkt_filter_add_t magic_pkt_filter_add;
#endif
int srl;
int lrl;
int txbf;
int lpc;
int disable_proptx;
- int dhd_poll;
#ifdef BCMSDIO
int bus_txglom;
int use_rxchain;
*/
int tx_max_offset;
uint txglomsize;
+ int dhd_poll;
int txctl_tmo_fix;
bool tx_in_rx;
bool txglom_mode;
int dhd_txminmax; // -1=DATABUFCNT(bus)
uint sd_f2_blocksize;
bool oob_enabled_later;
-#endif
-#ifdef BCMPCIE
- int bus_deepsleep_disable;
#endif
int ampdu_ba_wsize;
int ampdu_hostreorder;
char iapsta_enable[50];
#endif
int autocountry;
- int ctrl_resched;
- int dhd_ioctl_timeout_msec;
int tsq;
} dhd_conf_t;
#include <linux/mmc/sdio_func.h>
#endif /* defined(BUS_POWER_RESTORE) && defined(BCMSDIO) */
-#ifdef CONFIG_DHD_USE_STATIC_BUF
-extern void *bcm_wlan_prealloc(int section, unsigned long size);
-#endif /* CONFIG_DHD_USE_STATIC_BUF */
static int gpio_wl_reg_on = -1; // WL_REG_ON is input pin of WLAN module
#ifdef CUSTOMER_OOB
return err;
}
+#ifdef CONFIG_DHD_USE_STATIC_BUF
+extern void *bcmdhd_mem_prealloc(int section, unsigned long size);
+void* bcm_wlan_prealloc(int section, unsigned long size)
+{
+ void *alloc_ptr = NULL;
+ alloc_ptr = bcmdhd_mem_prealloc(section, size);
+ if (alloc_ptr) {
+ printf("success alloc section %d, size %ld\n", section, size);
+ if (size != 0L)
+ bzero(alloc_ptr, size);
+ return alloc_ptr;
+ }
+ printf("can't alloc section %d\n", section);
+ return NULL;
+}
+#endif
static struct cntry_locales_custom brcm_wlan_translate_custom_table[] = {
/* Table should be filled out based on custom platform regulatory requirement */
-#ifdef EXAMPLE_TABLE
{"", "XT", 49}, /* Universal if Country code is unknown or empty */
{"US", "US", 0},
-#endif /* EXMAPLE_TABLE */
};
#ifdef CUSTOM_FORCE_NODFS_FLAG
struct cntry_locales_custom brcm_wlan_translate_nodfs_table[] = {
-#ifdef EXAMPLE_TABLE
{"", "XT", 50}, /* Universal if Country code is unknown or empty */
{"US", "US", 0},
-#endif /* EXMAPLE_TABLE */
};
#endif
// terence 20151210: set bus:txglom after dhd_txglom_enable since it's possible changed in dhd_conf_set_txglom_params
dhd_conf_set_intiovar(dhd, WLC_SET_VAR, "bus:txglom", dhd->conf->bus_txglom, 0, FALSE);
#endif /* defined(BCMSDIO) */
-#if defined(BCMPCIE)
- dhd_conf_set_intiovar(dhd, WLC_SET_VAR, "bus:deepsleep_disable", dhd->conf->bus_deepsleep_disable, 0, FALSE);
-#endif /* defined(BCMPCIE) */
#if defined(BCMSDIO)
#ifdef PROP_TXSTATUS
}
int
-dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool resched)
+dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition)
{
dhd_info_t * dhd = (dhd_info_t *)(pub->info);
- int timeout, timeout_tmp = dhd_ioctl_timeout_msec;
-
- if (!resched && pub->conf->ctrl_resched>0 && pub->conf->dhd_ioctl_timeout_msec>0) {
- timeout_tmp = dhd_ioctl_timeout_msec;
- dhd_ioctl_timeout_msec = pub->conf->dhd_ioctl_timeout_msec;
- }
+ int timeout;
/* Convert timeout in millsecond to jiffies */
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27))
timeout = wait_event_timeout(dhd->ioctl_resp_wait, (*condition), timeout);
- if (!resched && pub->conf->ctrl_resched>0 && pub->conf->dhd_ioctl_timeout_msec>0) {
- dhd_ioctl_timeout_msec = timeout_tmp;
- }
-
DHD_PERIM_LOCK(pub);
return timeout;
if (dhd_is_pno_supported(dhd)) {
feature_set |= WIFI_FEATURE_PNO;
#ifdef GSCAN_SUPPORT
- /* terence 20171115: remove to get GTS PASS
- * com.google.android.gts.wifi.WifiHostTest#testWifiScannerBatchTimestamp
- */
// feature_set |= WIFI_FEATURE_GSCAN;
// feature_set |= WIFI_FEATURE_HAL_EPNO;
#endif /* GSCAN_SUPPORT */
DHD_ERROR(("%s(): dhd is NULL \r\n", __FUNCTION__));
return;
}
-
if (&dhd->dhd_kobj != NULL)
kobject_put(&dhd->dhd_kobj);
}
#include <pcie_core.h>
#include <bcmpcie.h>
#include <dhd_pcie.h>
-#include <dhd_config.h>
#ifdef DHD_TIMESYNC
#include <dhd_timesync.h>
#endif /* DHD_TIMESYNC */
int timeleft;
unsigned long flags;
int ret = 0;
- static uint cnt = 0;
DHD_TRACE(("%s: Enter\n", __FUNCTION__));
goto out;
}
- timeleft = dhd_os_ioctl_resp_wait(dhd, (uint *)&prot->ioctl_received, false);
+ timeleft = dhd_os_ioctl_resp_wait(dhd, (uint *)&prot->ioctl_received);
#ifdef DHD_RECOVER_TIMEOUT
if (prot->ioctl_received == 0) {
}
#endif /* DHD_RECOVER_TIMEOUT */
- if (dhd->conf->ctrl_resched > 0 && timeleft == 0 && (!dhd_query_bus_erros(dhd))) {
- cnt++;
- if (cnt <= dhd->conf->ctrl_resched) {
- uint32 intstatus = 0, intmask = 0;
- intstatus = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, PCIMailBoxInt, 0, 0);
- intmask = si_corereg(dhd->bus->sih, dhd->bus->sih->buscoreidx, PCIMailBoxMask, 0, 0);
- if (intstatus) {
- DHD_ERROR(("%s: reschedule dhd_dpc, cnt=%d, intstatus=0x%x, intmask=0x%x\n",
- __FUNCTION__, cnt, intstatus, intmask));
- dhd->bus->ipend = TRUE;
- dhd->bus->dpc_sched = TRUE;
- dhd_sched_dpc(dhd);
- timeleft = dhd_os_ioctl_resp_wait(dhd, &prot->ioctl_received, true);
- }
- }
- } else {
- cnt = 0;
- }
-
if (timeleft == 0 && (!dhd_query_bus_erros(dhd))) {
uint32 intstatus;
dhdpcie_bus_intstatus(dhd_bus_t *bus)
{
uint32 intstatus = 0;
-#ifndef DHD_READ_INTSTATUS_IN_DPC
uint32 intmask = 0;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
if ((bus->dhd->busstate == DHD_BUS_SUSPEND || bus->d3_suspend_pending) &&
bus->wait_for_d3_ack) {
/* this is a PCIE core register..not a config register... */
intstatus = si_corereg(bus->sih, bus->sih->buscoreidx, PCIMailBoxInt, 0, 0);
-#ifndef DHD_READ_INTSTATUS_IN_DPC
/* this is a PCIE core register..not a config register... */
intmask = si_corereg(bus->sih, bus->sih->buscoreidx, PCIMailBoxMask, 0, 0);
intstatus &= intmask;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
/* Is device removed. intstatus & intmask read 0xffffffff */
if (intstatus == (uint32)-1) {
DHD_ERROR(("%s: Device is removed or Link is down.\n", __FUNCTION__));
}
}
-#ifndef DHD_READ_INTSTATUS_IN_DPC
intstatus = dhdpcie_bus_intstatus(bus);
/* Check if the interrupt is ours or not */
/* Count the interrupt call */
bus->intrcount++;
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
bus->ipend = TRUE;
/* Set the poll and/or interrupt flags */
bus->intr = (bool)dhd_intr;
- if ((bus->poll = (bool)dhd_poll))
- bus->pollrate = 1;
bus->wait_for_d3_ack = 1;
#ifdef PCIE_OOB
}
}
-#ifdef DHD_READ_INTSTATUS_IN_DPC
- if (bus->poll) {
- bus->ipend = TRUE;
- bus->dpc_sched = TRUE;
- dhd_sched_dpc(bus->dhd); /* queue DPC now!! */
- }
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
-
#if defined(PCIE_OOB) || defined(PCIE_INB_DW)
/* If haven't communicated with device for a while, deassert the Device_Wake GPIO */
if (dhd_doorbell_timeout != 0 && dhd->busstate == DHD_BUS_DATA &&
}
-void
-dhd_set_bus_params(struct dhd_bus *bus)
-{
- if (bus->dhd->conf->dhd_poll >= 0) {
- bus->poll = bus->dhd->conf->dhd_poll;
- if (!bus->pollrate)
- bus->pollrate = 1;
- printf("%s: set polling mode %d\n", __FUNCTION__, bus->dhd->conf->dhd_poll);
- }
-}
-
static int
dhdpcie_download_firmware(struct dhd_bus *bus, osl_t *osh)
{
DHD_OS_WAKE_LOCK(bus->dhd);
dhd_set_path_params(bus);
- dhd_set_bus_params(bus);
ret = _dhdpcie_download_firmware(bus);
DHD_BUS_BUSY_SET_IN_DPC(bus->dhd);
DHD_GENERAL_UNLOCK(bus->dhd, flags);
-#ifdef DHD_READ_INTSTATUS_IN_DPC
- if (bus->ipend) {
- bus->ipend = FALSE;
- bus->intstatus = dhdpcie_bus_intstatus(bus);
- /* Check if the interrupt is ours or not */
- if (bus->intstatus == 0) {
- goto INTR_ON;
- }
- bus->intrcount++;
- }
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
resched = dhdpcie_bus_process_mailbox_intr(bus, bus->intstatus);
if (!resched) {
bus->intstatus = 0;
-#ifdef DHD_READ_INTSTATUS_IN_DPC
-INTR_ON:
-#endif /* DHD_READ_INTSTATUS_IN_DPC */
bus->dpc_intr_enable_count++;
dhdpcie_bus_intr_enable(bus); /* Enable back interrupt using Intmask!! */
}
struct pktq txq; /* Queue length used for flow-control */
bool intr; /* Use interrupts */
- bool poll; /* Use polling */
bool ipend; /* Device interrupt is pending */
bool intdis; /* Interrupts disabled by isr */
uint intrcount; /* Count of device interrupt callbacks */
if (!bus->irq_registered) {
snprintf(dhdpcie_info->pciname, sizeof(dhdpcie_info->pciname),
"dhdpcie:%s", pci_name(pdev));
-#ifdef DHD_USE_MSI
- printf("%s: MSI enabled\n", __FUNCTION__);
- err = pci_enable_msi(pdev);
- if (err < 0) {
- DHD_ERROR(("%s: pci_enable_msi() failed, %d, fall back to INTx\n", __FUNCTION__, err));
- }
-#else
- printf("%s: MSI not enabled\n", __FUNCTION__);
-#endif /* DHD_USE_MSI */
err = request_irq(pdev->irq, dhdpcie_isr, IRQF_SHARED,
dhdpcie_info->pciname, bus);
if (err) {
DHD_ERROR(("%s: request_irq() failed\n", __FUNCTION__));
-#ifdef DHD_USE_MSI
- pci_disable_msi(pdev);
-#endif /* DHD_USE_MSI */
return -1;
} else {
bus->irq_registered = TRUE;
if (bus->irq_registered) {
free_irq(pdev->irq, bus);
bus->irq_registered = FALSE;
-#ifdef DHD_USE_MSI
- pci_disable_msi(pdev);
-#endif /* DHD_USE_MSI */
} else {
DHD_ERROR(("%s: PCIe IRQ is not registered\n", __FUNCTION__));
}
bytes_written = (int32)(bp - buf);
return bytes_written;
}
-
static int
_dhd_pno_clear_all_batch_results(dhd_pub_t *dhd, struct list_head *head, bool only_last)
{
exit:
return err;
}
-
static int
_dhd_pno_reinitialize_prof(dhd_pub_t *dhd, dhd_pno_params_t *params, dhd_pno_mode_t mode)
{
kfree(buf);
return err;
}
-
int dhd_pno_deinit(dhd_pub_t *dhd)
{
int err = BCME_OK;
uint8 wr_val = 0, rd_val, cmp_val, bmask;
int err = 0;
int try_cnt = 0;
-
+ return 0;
KSO_DBG(("%s> op:%s\n", __FUNCTION__, (on ? "KSO_SET" : "KSO_CLR")));
wr_val |= (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
{
int timeleft;
uint rxlen = 0;
- static uint cnt = 0;
DHD_TRACE(("%s: Enter\n", __FUNCTION__));
return -EIO;
/* Wait until control frame is available */
- timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, false);
+ timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen);
dhd_os_sdlock(bus->dhd);
rxlen = bus->rxlen;
bus->rxlen = 0;
dhd_os_sdunlock(bus->dhd);
- if (bus->dhd->conf->ctrl_resched > 0 && !rxlen && timeleft == 0) {
- cnt++;
- if (cnt <= bus->dhd->conf->ctrl_resched) {
- uint32 status, retry = 0;
- R_SDREG(status, &bus->regs->intstatus, retry);
- if ((status & I_HMB_HOST_INT) || PKT_AVAILABLE(bus, status)) {
- DHD_ERROR(("%s: reschedule dhd_dpc, cnt=%d, status=0x%x\n",
- __FUNCTION__, cnt, status));
- bus->ipend = TRUE;
- bus->dpc_sched = TRUE;
- dhd_sched_dpc(bus->dhd);
-
- /* Wait until control frame is available */
- timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, true);
-
- dhd_os_sdlock(bus->dhd);
- rxlen = bus->rxlen;
- bcopy(bus->rxctl, msg, MIN(msglen, rxlen));
- bus->rxlen = 0;
- dhd_os_sdunlock(bus->dhd);
- }
- }
- } else {
- cnt = 0;
- }
-
if (rxlen) {
DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
__FUNCTION__, rxlen, msglen));
#define DHD_PREALLOC_OSL_BUF_SIZE (STATIC_BUF_MAX_NUM * STATIC_BUF_SIZE)\r
#define DHD_PREALLOC_WIPHY_ESCAN0_SIZE (64 * 1024)\r
#define DHD_PREALLOC_DHD_INFO_SIZE (30 * 1024)\r
-#define DHD_PREALLOC_MEMDUMP_RAM_SIZE (810 * 1024)\r
+#define DHD_PREALLOC_MEMDUMP_RAM_SIZE (770 * 1024)\r
#define DHD_PREALLOC_DHD_WLFC_HANGER_SIZE (73 * 1024)\r
#define DHD_PREALLOC_WL_ESCAN_INFO_SIZE (66 * 1024)\r
#ifdef CONFIG_64BIT\r
struct ether_addr mac_addr; /* Optional Mac address */
} wl_interface_create_t;
+typedef struct wl_interface_create_v0 {
+ uint16 ver; /* version of this struct */
+ struct ether_addr mac_addr; /* MAC address of the interface */
+ char ifname[BCM_MSG_IFNAME_MAX]; /* name of interface */
+ uint8 bsscfgidx; /* source bsscfg index */
+} wl_interface_info_t;
+
typedef struct wl_interface_create_v1 {
uint16 ver; /**< version of this struct */
uint8 pad1[2]; /**< Padding bytes */
dtoh32(revinfo.deviceid), dtoh32(revinfo.vendorid), dtoh32(revinfo.chipnum)));
chipnum = revinfo.chipnum;
if ((chipnum == BCM4350_CHIP_ID) || (chipnum == BCM4355_CHIP_ID) ||
- (chipnum == BCM4345_CHIP_ID) || (chipnum == BCM43430_CHIP_ID)) {
+ (chipnum == BCM4345_CHIP_ID)) {
/* WAR required */
return true;
}