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arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 30 Sep 2015 13:22:15 +0000 (15:22 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 17 Feb 2016 05:53:08 +0000 (14:53 +0900)
Add the missing "cache-unified" and "cache-level" properties to the
Cortex-A57 cache-controller node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a7795.dtsi patch | blob | blame | history

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 832a5665bb27bd87c99ce024cecb01071dfdf9e7..ea56066c2260bc3813b8482b2a34cfe52e590a55 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -68,6 +68,8 @@
 
        L2_CA57: cache-controller@0 {
                compatible = "cache";
+               cache-unified;
+               cache-level = <2>;
        };
 
        extal_clk: extal {