drm/nouveau/mxm: convert to new-style nvkm_subdev
authorBen Skeggs <bskeggs@redhat.com>
Thu, 20 Aug 2015 04:54:21 +0000 (14:54 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 28 Aug 2015 02:40:45 +0000 (12:40 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/mxm.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.c
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.h
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/mxm/priv.h [new file with mode: 0644]

index 93f9a4ec232051adffb2116a873ca9eac7ad90e2..ed0250139dae5b07269d7861d24e0009ca20545e 100644 (file)
@@ -2,33 +2,5 @@
 #define __NVKM_MXM_H__
 #include <core/subdev.h>
 
-#define MXM_SANITISE_DCB 0x00000001
-
-struct nvkm_mxm {
-       struct nvkm_subdev subdev;
-       u32 action;
-       u8 *mxms;
-};
-
-static inline struct nvkm_mxm *
-nvkm_mxm(void *obj)
-{
-       return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_MXM);
-}
-
-#define nvkm_mxm_create(p,e,o,d)                                            \
-       nvkm_mxm_create_((p), (e), (o), sizeof(**d), (void **)d)
-#define nvkm_mxm_init(p)                                                    \
-       nvkm_subdev_init_old(&(p)->subdev)
-#define nvkm_mxm_fini(p,s)                                                  \
-       nvkm_subdev_fini_old(&(p)->subdev, (s))
-int  nvkm_mxm_create_(struct nvkm_object *, struct nvkm_object *,
-                        struct nvkm_oclass *, int, void **);
-void nvkm_mxm_destroy(struct nvkm_mxm *);
-
-#define _nvkm_mxm_dtor _nvkm_subdev_dtor
-#define _nvkm_mxm_init _nvkm_subdev_init
-#define _nvkm_mxm_fini _nvkm_subdev_fini
-
-extern struct nvkm_oclass nv50_mxm_oclass;
+int nv50_mxm_new(struct nvkm_device *, int, struct nvkm_subdev **);
 #endif
index 7da5dc44baf4788b44f8f5b0eadaa9bc0899262d..350daa3c630ce527d195b06894a5626cc6938765 100644 (file)
@@ -790,7 +790,7 @@ nv50_chipset = {
        .imem = nv50_instmem_new,
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = nv50_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -893,7 +893,7 @@ nv84_chipset = {
        .imem = nv50_instmem_new,
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -924,7 +924,7 @@ nv86_chipset = {
        .imem = nv50_instmem_new,
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -955,7 +955,7 @@ nv92_chipset = {
        .imem = nv50_instmem_new,
        .mc = nv50_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -986,7 +986,7 @@ nv94_chipset = {
        .imem = nv50_instmem_new,
        .mc = g94_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -1011,7 +1011,7 @@ nv96_chipset = {
        .fuse = nv50_fuse_new,
        .clk = g84_clk_new,
 //     .therm = g84_therm_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
        .devinit = g84_devinit_new,
        .mc = g94_mc_new,
        .bus = g94_bus_new,
@@ -1042,7 +1042,7 @@ nv98_chipset = {
        .fuse = nv50_fuse_new,
        .clk = g84_clk_new,
 //     .therm = g84_therm_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
        .devinit = g98_devinit_new,
        .mc = g98_mc_new,
        .bus = g94_bus_new,
@@ -1079,7 +1079,7 @@ nva0_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -1110,7 +1110,7 @@ nva3_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gt215_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1143,7 +1143,7 @@ nva5_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gt215_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1175,7 +1175,7 @@ nva8_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gt215_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1207,7 +1207,7 @@ nvaa_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -1238,7 +1238,7 @@ nvac_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = g84_therm_new,
 //     .timer = nv04_timer_new,
 //     .volt = nv40_volt_new,
@@ -1269,7 +1269,7 @@ nvaf_chipset = {
        .imem = nv50_instmem_new,
        .mc = g98_mc_new,
        .mmu = nv50_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gt215_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1303,7 +1303,7 @@ nvc0_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1338,7 +1338,7 @@ nvc1_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1372,7 +1372,7 @@ nvc3_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1406,7 +1406,7 @@ nvc4_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1441,7 +1441,7 @@ nvc8_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1476,7 +1476,7 @@ nvce_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf100_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1511,7 +1511,7 @@ nvcf_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf100_pmu_new,
 //     .therm = gt215_therm_new,
 //     .timer = nv04_timer_new,
@@ -1545,7 +1545,7 @@ nvd7_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
 //     .ce[0] = gf100_ce0_new,
@@ -1577,7 +1577,7 @@ nvd9_chipset = {
        .ltc = gf100_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf110_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1611,7 +1611,7 @@ nve4_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk104_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1647,7 +1647,7 @@ nve6_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk104_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1683,7 +1683,7 @@ nve7_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gf110_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1743,7 +1743,7 @@ nvf0_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk110_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1779,7 +1779,7 @@ nvf1_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gf106_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk110_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1815,7 +1815,7 @@ nv106_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk208_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1850,7 +1850,7 @@ nv108_chipset = {
        .ltc = gk104_ltc_new,
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk208_pmu_new,
 //     .therm = gf110_therm_new,
 //     .timer = nv04_timer_new,
@@ -1885,7 +1885,7 @@ nv117_chipset = {
        .ltc = gm107_ltc_new,
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk208_pmu_new,
 //     .therm = gm107_therm_new,
 //     .timer = gk20a_timer_new,
@@ -1914,7 +1914,7 @@ nv124_chipset = {
        .ltc = gm107_ltc_new,
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk208_pmu_new,
 //     .timer = gk20a_timer_new,
 //     .ce[0] = gm204_ce0_new,
@@ -1943,7 +1943,7 @@ nv126_chipset = {
        .ltc = gm107_ltc_new,
        .mc = gk20a_mc_new,
        .mmu = gf100_mmu_new,
-//     .mxm = nv50_mxm_new,
+       .mxm = nv50_mxm_new,
 //     .pmu = gk208_pmu_new,
 //     .timer = gk20a_timer_new,
 //     .ce[0] = gm204_ce0_new,
index cf49c1d150e3d5e74ef8ec4ca0238bba971becea..ef161ef6be557c9f98311a36ebaad229f9f38045 100644 (file)
@@ -29,7 +29,6 @@ gf100_identify(struct nvkm_device *device)
        switch (device->chipset) {
        case 0xc0:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -47,7 +46,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xc4:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -65,7 +63,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xc3:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -82,7 +79,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xce:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -100,7 +96,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xcf:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -117,7 +112,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xc1:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -134,7 +128,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xc8:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf100_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -152,7 +145,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xd9:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -169,7 +161,6 @@ gf100_identify(struct nvkm_device *device)
                break;
        case 0xd7:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
                device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;
index df6aa5a98f5db680f245af0e3c86a9a7f2f7153e..e649e38a11b5f66fbe6530864bb2b322f4ff423f 100644 (file)
@@ -29,7 +29,6 @@ gk104_identify(struct nvkm_device *device)
        switch (device->chipset) {
        case 0xe4:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -48,7 +47,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0xe7:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gf110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -67,7 +65,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0xe6:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk104_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -97,7 +94,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0xf0:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -116,7 +112,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0xf1:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk110_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -135,7 +130,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0x106:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -153,7 +147,6 @@ gk104_identify(struct nvkm_device *device)
                break;
        case 0x108:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gf110_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
index 3076601d41121f8b6f4d00a3805dc9cd9d79b8aa..e1dfea9764deafd969562f15b19d0e1d142302cd 100644 (file)
@@ -29,7 +29,6 @@ gm100_identify(struct nvkm_device *device)
        switch (device->chipset) {
        case 0x117:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 
@@ -58,7 +57,6 @@ gm100_identify(struct nvkm_device *device)
                /* priv ring says no to 0x10eb14 writes */
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
 #endif
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 #if 0
@@ -84,7 +82,6 @@ gm100_identify(struct nvkm_device *device)
                /* priv ring says no to 0x10eb14 writes */
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
 #endif
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gk208_pmu_oclass;
 #if 0
index 23cbb0f39d84cd76716d56220454361cf66e208a..fad8e6819dcaf7414e690a1e88ec91ba20e5b43c 100644 (file)
@@ -29,7 +29,6 @@ nv50_identify(struct nvkm_device *device)
        switch (device->chipset) {
        case 0x50:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &nv50_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -42,7 +41,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x84:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -58,7 +56,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x86:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -74,7 +71,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x92:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -90,7 +86,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x94:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -106,7 +101,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x96:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -122,7 +116,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0x98:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -138,7 +131,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xa0:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -154,7 +146,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xaa:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -170,7 +161,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xac:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &g84_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
                device->oclass[NVDEV_ENGINE_DMAOBJ ] =  nv50_dmaeng_oclass;
@@ -186,7 +176,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xa3:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -204,7 +193,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xa5:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -221,7 +209,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xa8:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
@@ -238,7 +225,6 @@ nv50_identify(struct nvkm_device *device)
                break;
        case 0xaf:
                device->oclass[NVDEV_SUBDEV_THERM  ] = &gt215_therm_oclass;
-               device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;
                device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;
                device->oclass[NVDEV_SUBDEV_PMU    ] =  gt215_pmu_oclass;
                device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
index ed380db94fb4db7efc2d37356f7e9fb79761e6b3..442b5e200a7780a55dd4bdfa9e9ad40a6bc989d4 100644 (file)
@@ -226,22 +226,22 @@ mxm_shadow(struct nvkm_mxm *mxm, u8 version)
        return -ENOENT;
 }
 
+static const struct nvkm_subdev_func
+nvkm_mxm = {
+};
+
 int
-nvkm_mxm_create_(struct nvkm_object *parent, struct nvkm_object *engine,
-                struct nvkm_oclass *oclass, int length, void **pobject)
+nvkm_mxm_new_(struct nvkm_device *device, int index, struct nvkm_mxm **pmxm)
 {
-       struct nvkm_device *device = (void *)parent;
        struct nvkm_bios *bios = device->bios;
        struct nvkm_mxm *mxm;
        u8  ver, len;
        u16 data;
-       int ret;
 
-       ret = nvkm_subdev_create_(parent, engine, oclass, 0, "MXM", "mxm",
-                                 length, pobject);
-       mxm = *pobject;
-       if (ret)
-               return ret;
+       if (!(mxm = *pmxm = kzalloc(sizeof(*mxm), GFP_KERNEL)))
+               return -ENOMEM;
+
+       nvkm_subdev_ctor(&nvkm_mxm, device, index, 0, &mxm->subdev);
 
        data = mxm_table(bios, &ver, &len);
        if (!data || !(ver = nvbios_rd08(bios, data))) {
index 1b3f5e32c7381a8c0fb76c8d5a2ac0721e627896..45a2f8e784f9f01be2bd6b15c2199a9aa7470f26 100644 (file)
@@ -145,7 +145,7 @@ mxms_foreach(struct nvkm_mxm *mxm, u8 types,
                        return false;
                }
 
-               if (nv_subdev(mxm)->debug >= NV_DBG_DEBUG && (exec == NULL)) {
+               if (mxm->subdev.debug >= NV_DBG_DEBUG && (exec == NULL)) {
                        static const char * mxms_desc[] = {
                                "ODS", "SCCS", "TS", "IPS",
                                "GSD", "VSS", "BCS", "FCS",
index 4ef804012d06e21f0287732af83740ae44075381..333e0c01545a1f5c401a3b800dab782b64d8da2e 100644 (file)
@@ -1,6 +1,6 @@
 #ifndef __NVMXM_MXMS_H__
 #define __NVMXM_MXMS_H__
-#include <subdev/mxm.h>
+#include "priv.h"
 
 struct mxms_odev {
        u8 outp_type;
index 9167e6098d6a08e9f042f87b722f1f8ee967c321..db14fad2ddfc9a405329e84b90d5d8ded5d8fd2a 100644 (file)
@@ -199,31 +199,20 @@ mxm_dcb_sanitise(struct nvkm_mxm *mxm)
        mxms_foreach(mxm, 0x01, mxm_show_unmatched, NULL);
 }
 
-static int
-nv50_mxm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
-             struct nvkm_oclass *oclass, void *data, u32 size,
-             struct nvkm_object **pobject)
+int
+nv50_mxm_new(struct nvkm_device *device, int index, struct nvkm_subdev **pmxm)
 {
        struct nvkm_mxm *mxm;
        int ret;
 
-       ret = nvkm_mxm_create(parent, engine, oclass, &mxm);
-       *pobject = nv_object(mxm);
+       ret = nvkm_mxm_new_(device, index, &mxm);
+       if (mxm)
+               *pmxm = &mxm->subdev;
        if (ret)
                return ret;
 
        if (mxm->action & MXM_SANITISE_DCB)
                mxm_dcb_sanitise(mxm);
+
        return 0;
 }
-
-struct nvkm_oclass
-nv50_mxm_oclass = {
-       .handle = NV_SUBDEV(MXM, 0x50),
-       .ofuncs = &(struct nvkm_ofuncs) {
-               .ctor = nv50_mxm_ctor,
-               .dtor = _nvkm_mxm_dtor,
-               .init = _nvkm_mxm_init,
-               .fini = _nvkm_mxm_fini,
-       },
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/priv.h b/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/priv.h
new file mode 100644 (file)
index 0000000..7d97015
--- /dev/null
@@ -0,0 +1,15 @@
+#ifndef __NVKM_MXM_PRIV_H__
+#define __NVKM_MXM_PRIV_H__
+#define nvkm_mxm(p) container_of((p), struct nvkm_mxm, subdev)
+#include <subdev/mxm.h>
+
+#define MXM_SANITISE_DCB 0x00000001
+
+struct nvkm_mxm {
+       struct nvkm_subdev subdev;
+       u32 action;
+       u8 *mxms;
+};
+
+int nvkm_mxm_new_(struct nvkm_device *, int index, struct nvkm_mxm **);
+#endif