drm/amdgpu: add gfx clock gating for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index eb6af63000a7c4c2ba81fb18f857b128fe45ec7b..fefd6187db12bc48b66e4a83f8f5b1bce6eac7c1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2877,6 +2877,7 @@ static int gfx_v9_0_set_clockgating_state(void *handle,
 
        switch (adev->asic_type) {
        case CHIP_VEGA10:
+       case CHIP_RAVEN:
                gfx_v9_0_update_gfx_clock_gating(adev,
                                                 state == AMD_CG_STATE_GATE ? true : false);
                break;
@@ -3736,6 +3737,7 @@ static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev)
 {
        switch (adev->asic_type) {
        case CHIP_VEGA10:
+       case CHIP_RAVEN:
                adev->gfx.rlc.funcs = &gfx_v9_0_rlc_funcs;
                break;
        default: