drm/radeon/kms: evergreen & ni reset SPI block on CP resume
authorJerome Glisse <jglisse@redhat.com>
Wed, 24 Aug 2011 20:00:17 +0000 (20:00 +0000)
committerDave Airlie <airlied@redhat.com>
Tue, 30 Aug 2011 09:55:10 +0000 (10:55 +0100)
For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function

Signed-off-by: Jerome Glisse <jglisse@redhat.com
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/ni.c

index fb5fa089886829fdf3fe3ecb262e5971aa4f814f..d8d71a399f527ac1c729e25221fc95f503251091 100644 (file)
@@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
                                 SOFT_RESET_PA |
                                 SOFT_RESET_SH |
                                 SOFT_RESET_VGT |
+                                SOFT_RESET_SPI |
                                 SOFT_RESET_SX));
        RREG32(GRBM_SOFT_RESET);
        mdelay(15);
index 44c4750f4518c3f010e96b38c981e7208cb84a1a..a2e00fa9c6185989f02e9847d81dc156335adda8 100644 (file)
@@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
                                 SOFT_RESET_PA |
                                 SOFT_RESET_SH |
                                 SOFT_RESET_VGT |
+                                SOFT_RESET_SPI |
                                 SOFT_RESET_SX));
        RREG32(GRBM_SOFT_RESET);
        mdelay(15);