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ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
authorLaxman Dewangan <ldewangan@nvidia.com>
Thu, 5 Dec 2013 10:44:09 +0000 (16:14 +0530)
committerStephen Warren <swarren@nvidia.com>
Mon, 16 Dec 2013 21:09:20 +0000 (14:09 -0700)
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra30-beaver.dts patch | blob | blame | history
arch/arm/boot/dts/tegra30-cardhu.dtsi patch | blob | blame | history
arch/arm/boot/dts/tegra30.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 3ad193c37436bf7ba226967f35562e024becafae..7e8562a8507ddba70a7d19f937d54e538284227e 100644 (file)
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -52,8 +52,8 @@
                        sdmmc1_clk_pz0 {
                                nvidia,pins = "sdmmc1_clk_pz0";
                                nvidia,function = "sdmmc1";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc1_cmd_pz1 {
                                nvidia,pins =   "sdmmc1_cmd_pz1",
@@ -62,14 +62,14 @@
                                                "sdmmc1_dat2_py5",
                                                "sdmmc1_dat3_py4";
                                nvidia,function = "sdmmc1";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc3_clk_pa6 {
                                nvidia,pins = "sdmmc3_clk_pa6";
                                nvidia,function = "sdmmc3";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc3_cmd_pa7 {
                                nvidia,pins =   "sdmmc3_cmd_pa7",
@@ -78,15 +78,15 @@
                                                "sdmmc3_dat2_pb5",
                                                "sdmmc3_dat3_pb4";
                                nvidia,function = "sdmmc3";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc4_clk_pcc4 {
                                nvidia,pins =   "sdmmc4_clk_pcc4",
                                                "sdmmc4_rst_n_pcc3";
                                nvidia,function = "sdmmc4";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc4_dat0_paa0 {
                                nvidia,pins =   "sdmmc4_dat0_paa0",
@@ -98,8 +98,8 @@
                                                "sdmmc4_dat6_paa6",
                                                "sdmmc4_dat7_paa7";
                                nvidia,function = "sdmmc4";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        dap2_fs_pa2 {
                                nvidia,pins =   "dap2_fs_pa2",
@@ -107,18 +107,18 @@
                                                "dap2_din_pa4",
                                                "dap2_dout_pa5";
                                nvidia,function = "i2s1";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        pex_l1_prsnt_n_pdd4 {
                                nvidia,pins =   "pex_l1_prsnt_n_pdd4",
                                                "pex_l1_clkreq_n_pdd6";
-                               nvidia,pull = <2>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
                        };
                        sdio3 {
                                nvidia,pins = "drive_sdio3";
-                               nvidia,high-speed-mode = <0>;
-                               nvidia,schmitt = <0>;
+                               nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
                                nvidia,pull-down-strength = <46>;
                                nvidia,pull-up-strength = <42>;
                                nvidia,slew-rate-rising = <1>;
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 748b4ba945eeb009c28f3f967a6b008a2c308a63..f3aab9eb64535b2d81fc7f69856c7dc4640eeab8 100644 (file)
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -59,8 +59,8 @@
                        sdmmc1_clk_pz0 {
                                nvidia,pins = "sdmmc1_clk_pz0";
                                nvidia,function = "sdmmc1";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc1_cmd_pz1 {
                                nvidia,pins =   "sdmmc1_cmd_pz1",
@@ -69,14 +69,14 @@
                                                "sdmmc1_dat2_py5",
                                                "sdmmc1_dat3_py4";
                                nvidia,function = "sdmmc1";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc3_clk_pa6 {
                                nvidia,pins = "sdmmc3_clk_pa6";
                                nvidia,function = "sdmmc3";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc3_cmd_pa7 {
                                nvidia,pins =   "sdmmc3_cmd_pa7",
@@ -85,15 +85,15 @@
                                                "sdmmc3_dat2_pb5",
                                                "sdmmc3_dat3_pb4";
                                nvidia,function = "sdmmc3";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc4_clk_pcc4 {
                                nvidia,pins =   "sdmmc4_clk_pcc4",
                                                "sdmmc4_rst_n_pcc3";
                                nvidia,function = "sdmmc4";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdmmc4_dat0_paa0 {
                                nvidia,pins =   "sdmmc4_dat0_paa0",
@@ -105,8 +105,8 @@
                                                "sdmmc4_dat6_paa6",
                                                "sdmmc4_dat7_paa7";
                                nvidia,function = "sdmmc4";
-                               nvidia,pull = <2>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_UP>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        dap2_fs_pa2 {
                                nvidia,pins =   "dap2_fs_pa2",
@@ -114,17 +114,17 @@
                                                "dap2_din_pa4",
                                                "dap2_dout_pa5";
                                nvidia,function = "i2s1";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                        sdio3 {
                                nvidia,pins = "drive_sdio3";
-                               nvidia,high-speed-mode = <0>;
-                               nvidia,schmitt = <0>;
+                               nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
+                               nvidia,schmitt = <TEGRA_PIN_DISABLE>;
                                nvidia,pull-down-strength = <46>;
                                nvidia,pull-up-strength = <42>;
-                               nvidia,slew-rate-rising = <1>;
-                               nvidia,slew-rate-falling = <1>;
+                               nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
+                               nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
                        };
                        uart3_txd_pw6 {
                                nvidia,pins =   "uart3_txd_pw6",
@@ -132,8 +132,8 @@
                                                "uart3_rts_n_pc0",
                                                "uart3_rxd_pw7";
                                nvidia,function = "uartc";
-                               nvidia,pull = <0>;
-                               nvidia,tristate = <0>;
+                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
+                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
                        };
                };
        };
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 829eb4b5091da76d6d82fa3b9c01ea84de85e162..ee5e9d8bf19402cc3f9f9c8731f0f36e16192f3d 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,5 +1,6 @@
 #include <dt-bindings/clock/tegra30-car.h>
 #include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"