MIPS: Fix is_jump_ins() handling of 16b microMIPS instructions

commit 67c75057709a6d85c681c78b9b2f9b71191f01a2 upstream.

is_jump_ins() checks 16b instruction fields without verifying that the
instruction is indeed 16b, as is done by is_ra_save_ins() &
is_sp_move_ins(). Add the appropriate check.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 34c2f668d0f6 ("MIPS: microMIPS: Add unaligned access support.")
Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/14531/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Willy Tarreau <w@1wt.eu>

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index e67e17aec9ea70f0e59df07de06c26cb6e7f299d..427187b1807524758848e9c024222169cf3e8760 100644 (file)
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -260,9 +260,14 @@ static inline int is_jump_ins(union mips_instruction *ip)
         *
         * microMIPS is kind of more fun...
         */
-       if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
-           (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) ||
-           ip->j_format.opcode == mm_jal32_op)
+       if (mm_insn_16bit(ip->halfword[1])) {
+               if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
+                   (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
+                       return 1;
+               return 0;
+       }
+
+       if (ip->j_format.opcode == mm_jal32_op)
                return 1;
        if (ip->r_format.opcode != mm_pool32a_op ||
                        ip->r_format.func != mm_pool32axf_op)