e1000e: Relax condition to trigger reset for ME workaround

commit d601afcae2febc49665008e9a79e701248d56c50 upstream.

It's an error if the value of the RX/TX tail descriptor does not match
what was written. The error condition is true regardless the duration
of the interference from ME. But the driver only performs the reset if
E1000_ICH_FWSM_PCIM2PCI_COUNT (2000) iterations of 50us delay have
transpired. The extra condition can lead to inconsistency between the
state of hardware as expected by the driver.

Fix this by dropping the check for number of delay iterations.

While at it, also make __ew32_prepare() static as it's not used
anywhere else.

CC: stable <stable@vger.kernel.org>
Signed-off-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Alexander Duyck <alexander.h.duyck@linux.intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/ethernet/intel/e1000e/e1000.h b/drivers/net/ethernet/intel/e1000e/e1000.h
index 98e68888abb1d94a5f18616d1bed78fbe4e2742f..e0ef6007c27558a0fffd04e66137f40a5fcc965d 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/e1000.h
+++ b/drivers/net/ethernet/intel/e1000e/e1000.h
@@ -596,7 +596,6 @@ static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
 
 #define er32(reg)      __er32(hw, E1000_##reg)
 
-s32 __ew32_prepare(struct e1000_hw *hw);
 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val);
 
 #define ew32(reg, val) __ew32(hw, E1000_##reg, (val))

diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index a517b81be973e296ddff717c21c2ecc088a7b95f..5269af303f5558b3dc26c873b22f34d29a3874a4 100644 (file)
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -137,14 +137,12 @@ static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
  * and try again a number of times.
  **/
-s32 __ew32_prepare(struct e1000_hw *hw)
+static void __ew32_prepare(struct e1000_hw *hw)
 {
        s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 
        while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
                udelay(50);
-
-       return i;
 }
 
 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
@@ -625,11 +623,11 @@ static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 {
        struct e1000_adapter *adapter = rx_ring->adapter;
        struct e1000_hw *hw = &adapter->hw;
-       s32 ret_val = __ew32_prepare(hw);
 
+       __ew32_prepare(hw);
        writel(i, rx_ring->tail);
 
-       if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
+       if (unlikely(i != readl(rx_ring->tail))) {
                u32 rctl = er32(RCTL);
 
                ew32(RCTL, rctl & ~E1000_RCTL_EN);
@@ -642,11 +640,11 @@ static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 {
        struct e1000_adapter *adapter = tx_ring->adapter;
        struct e1000_hw *hw = &adapter->hw;
-       s32 ret_val = __ew32_prepare(hw);
 
+       __ew32_prepare(hw);
        writel(i, tx_ring->tail);
 
-       if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
+       if (unlikely(i != readl(tx_ring->tail))) {
                u32 tctl = er32(TCTL);
 
                ew32(TCTL, tctl & ~E1000_TCTL_EN);