The initial BF54x port included some defines to keep code simple across
different processors, but it just ended up causing the UART0 DMA IRQs to
be set to the UART1 channels.
Signed-off-by: Stefan Pledl <stefan.pledl@mesutronic.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
ret_irq = IRQ_SPI1;
break;
case CH_UART0_RX:
- ret_irq = IRQ_UART_RX;
+ ret_irq = IRQ_UART0_RX;
break;
case CH_UART0_TX:
- ret_irq = IRQ_UART_TX;
+ ret_irq = IRQ_UART0_TX;
break;
case CH_UART1_RX:
- ret_irq = IRQ_UART_RX;
+ ret_irq = IRQ_UART1_RX;
break;
case CH_UART1_TX:
- ret_irq = IRQ_UART_TX;
+ ret_irq = IRQ_UART1_TX;
break;
case CH_EPPI0:
ret_irq = IRQ_EPPI0;