powerpc/book3e: Hack to get gdb moving along on Book3E 64-bit

Our handling of debug interrupts on Book3E 64-bit is not quite
the way it should be just yet. This is a workaround to let gdb
work at least for now. We ensure that when context switching,
we set the appropriate DBCR0 value for the new task. We also
make sure that we turn off MSR[DE] within the kernel, and set
it as part of the bits that get set when going back to userspace.

In the long run, we will probably set the userspace DBCR0 on the
exception exit code path and ensure we have some proper kernel
value to set on the way into the kernel, a bit like ppc32 does,
but that will take more work.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 2360317179a9163412449bcecb62efd976acd20a..66dc6f0d3ad8a52310378bb5fd5e3f03faf1ac7e 100644 (file)
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -29,8 +29,8 @@
 #if defined(CONFIG_PPC_BOOK3E_64)
 #define MSR_           MSR_ME | MSR_CE
 #define MSR_KERNEL      MSR_ | MSR_CM
-#define MSR_USER32     MSR_ | MSR_PR | MSR_EE
-#define MSR_USER64     MSR_USER32 | MSR_CM
+#define MSR_USER32     MSR_ | MSR_PR | MSR_EE | MSR_DE
+#define MSR_USER64     MSR_USER32 | MSR_CM | MSR_DE
 #elif defined (CONFIG_40x)
 #define MSR_KERNEL     (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
 #define MSR_USER       (MSR_KERNEL|MSR_PR|MSR_EE)

diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 1e78453645bee86742422c3095c6d64508f32017..551f6713ff428930bcfa35556bd5ebd8676c30f4 100644 (file)
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -477,6 +477,28 @@ struct task_struct *__switch_to(struct task_struct *prev,
        new_thread = &new->thread;
        old_thread = &current->thread;
 
+#if defined(CONFIG_PPC_BOOK3E_64)
+       /* XXX Current Book3E code doesn't deal with kernel side DBCR0,
+        * we always hold the user values, so we set it now.
+        *
+        * However, we ensure the kernel MSR:DE is appropriately cleared too
+        * to avoid spurrious single step exceptions in the kernel.
+        *
+        * This will have to change to merge with the ppc32 code at some point,
+        * but I don't like much what ppc32 is doing today so there's some
+        * thinking needed there
+        */
+       if ((new_thread->dbcr0 | old_thread->dbcr0) & DBCR0_IDM) {
+               u32 dbcr0;
+
+               mtmsr(mfmsr() & ~MSR_DE);
+               isync();
+               dbcr0 = mfspr(SPRN_DBCR0);
+               dbcr0 = (dbcr0 & DBCR0_EDM) | new_thread->dbcr0;
+               mtspr(SPRN_DBCR0, dbcr0);
+       }
+#endif /* CONFIG_PPC64_BOOK3E */
+
 #ifdef CONFIG_PPC64
        /*
         * Collect processor utilization data per process