clk: tegra: Add flags to tegra_clk_periph()
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 3 Apr 2013 14:40:42 +0000 (17:40 +0300)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 22:10:56 +0000 (16:10 -0600)
We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag,
most notably mselect, which is a bridge between AXI and most peripherals.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-periph.c
drivers/clk/tegra/clk-tegra20.c
drivers/clk/tegra/clk-tegra30.c
drivers/clk/tegra/clk.h

index 9dbd301ace77373e440aaad6315258cedd84c2fb..b2309d37a9637b70cfc823ea3ada7dc32d99c88a 100644 (file)
@@ -173,14 +173,15 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = {
 static struct clk *_tegra_clk_register_periph(const char *name,
                        const char **parent_names, int num_parents,
                        struct tegra_clk_periph *periph,
-                       void __iomem *clk_base, u32 offset, bool div)
+                       void __iomem *clk_base, u32 offset, bool div,
+                       unsigned long flags)
 {
        struct clk *clk;
        struct clk_init_data init;
 
        init.name = name;
        init.ops = div ? &tegra_clk_periph_ops : &tegra_clk_periph_nodiv_ops;
-       init.flags = div ? 0 : CLK_SET_RATE_PARENT;
+       init.flags = flags;
        init.parent_names = parent_names;
        init.num_parents = num_parents;
 
@@ -205,10 +206,10 @@ static struct clk *_tegra_clk_register_periph(const char *name,
 struct clk *tegra_clk_register_periph(const char *name,
                const char **parent_names, int num_parents,
                struct tegra_clk_periph *periph, void __iomem *clk_base,
-               u32 offset)
+               u32 offset, unsigned long flags)
 {
        return _tegra_clk_register_periph(name, parent_names, num_parents,
-                       periph, clk_base, offset, true);
+                       periph, clk_base, offset, true, flags);
 }
 
 struct clk *tegra_clk_register_periph_nodiv(const char *name,
@@ -217,5 +218,5 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
                u32 offset)
 {
        return _tegra_clk_register_periph(name, parent_names, num_parents,
-                       periph, clk_base, offset, false);
+                       periph, clk_base, offset, false, CLK_SET_RATE_PARENT);
 }
index 5c7b58b9691188ea0dcf7518847f423995456aca..b0405b67f49c710843e9d16d46930f015f25bf59 100644 (file)
@@ -1019,7 +1019,7 @@ static void __init tegra20_periph_clk_init(void)
                data = &tegra_periph_clk_list[i];
                clk = tegra_clk_register_periph(data->name, data->parent_names,
                                data->num_parents, &data->periph,
-                               clk_base, data->offset);
+                               clk_base, data->offset, data->flags);
                clk_register_clkdev(clk, data->con_id, data->dev_id);
                clks[data->clk_id] = clk;
        }
index 735f964edc6530aef9e11a443b45999b7de965dd..2dc0c5602613eae83cb40704cc0516dd5d64a42b 100644 (file)
@@ -1668,7 +1668,7 @@ static void __init tegra30_periph_clk_init(void)
                data = &tegra_periph_clk_list[i];
                clk = tegra_clk_register_periph(data->name, data->parent_names,
                                data->num_parents, &data->periph,
-                               clk_base, data->offset);
+                               clk_base, data->offset, data->flags);
                clk_register_clkdev(clk, data->con_id, data->dev_id);
                clks[data->clk_id] = clk;
        }
index 8cedb092a23981e23c7794301f633b07306fe65e..fd12b77c985dbf9b3145e226ea3c258d80c3bb15 100644 (file)
@@ -417,7 +417,7 @@ extern const struct clk_ops tegra_clk_periph_ops;
 struct clk *tegra_clk_register_periph(const char *name,
                const char **parent_names, int num_parents,
                struct tegra_clk_periph *periph, void __iomem *clk_base,
-               u32 offset);
+               u32 offset, unsigned long flags);
 struct clk *tegra_clk_register_periph_nodiv(const char *name,
                const char **parent_names, int num_parents,
                struct tegra_clk_periph *periph, void __iomem *clk_base,
@@ -460,12 +460,14 @@ struct tegra_periph_init_data {
        u32 offset;
        const char *con_id;
        const char *dev_id;
+       unsigned long flags;
 };
 
 #define TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\
                        _mux_shift, _mux_mask, _mux_flags, _div_shift,  \
                        _div_width, _div_frac_width, _div_flags, _regs, \
-                       _clk_num, _enb_refcnt, _gate_flags, _clk_id, _table) \
+                       _clk_num, _enb_refcnt, _gate_flags, _clk_id, _table,\
+                       _flags) \
        {                                                               \
                .name = _name,                                          \
                .clk_id = _clk_id,                                      \
@@ -480,6 +482,7 @@ struct tegra_periph_init_data {
                .offset = _offset,                                      \
                .con_id = _con_id,                                      \
                .dev_id = _dev_id,                                      \
+               .flags = _flags                                         \
        }
 
 #define TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parent_names, _offset,\
@@ -490,7 +493,7 @@ struct tegra_periph_init_data {
                        _mux_shift, BIT(_mux_width) - 1, _mux_flags,    \
                        _div_shift, _div_width, _div_frac_width, _div_flags, \
                        _regs, _clk_num, _enb_refcnt, _gate_flags, _clk_id,\
-                       NULL)
+                       NULL, 0)
 
 /**
  * struct clk_super_mux - super clock